drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/kthread.h>
  20 #include <linux/printk.h>
  21 #include <linux/pci_ids.h>
  22 #include <linux/netdevice.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/sched.h>
  25 #include <linux/mmc/sdio.h>
  26 #include <linux/mmc/sdio_func.h>
  27 #include <linux/mmc/card.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/firmware.h>
  30 #include <linux/module.h>
  31 #include <linux/bcma/bcma.h>
  32 #include <linux/debugfs.h>
  33 #include <linux/vmalloc.h>
  34 #include <linux/platform_data/brcmfmac-sdio.h>
  35 #include <linux/moduleparam.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio_host.h"
  43 #include "sdio_chip.h"
  44 #include "nvram.h"
  45
  46 #define DCMD_RESP_TIMEOUT  2000 /* In milli second */
  47
  48 #ifdef DEBUG
  49
  50 #define BRCMF_TRAP_INFO_SIZE    80
  51
  52 #define CBUF_LEN        (128)
  53
  54 /* Device console log buffer state */
  55 #define CONSOLE_BUFFER_MAX      2024
  56
  57 struct rte_log_le {
  58         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  59         __le32 buf_size;
  60         __le32 idx;
  61         char *_buf_compat;      /* Redundant pointer for backward compat. */
  62 };
  63
  64 struct rte_console {
  65         /* Virtual UART
  66          * When there is no UART (e.g. Quickturn),
  67          * the host should write a complete
  68          * input line directly into cbuf and then write
  69          * the length into vcons_in.
  70          * This may also be used when there is a real UART
  71          * (at risk of conflicting with
  72          * the real UART).  vcons_out is currently unused.
  73          */
  74         uint vcons_in;
  75         uint vcons_out;
  76
  77         /* Output (logging) buffer
  78          * Console output is written to a ring buffer log_buf at index log_idx.
  79          * The host may read the output when it sees log_idx advance.
  80          * Output will be lost if the output wraps around faster than the host
  81          * polls.
  82          */
  83         struct rte_log_le log_le;
  84
  85         /* Console input line buffer
  86          * Characters are read one at a time into cbuf
  87          * until <CR> is received, then
  88          * the buffer is processed as a command line.
  89          * Also used for virtual UART.
  90          */
  91         uint cbuf_idx;
  92         char cbuf[CBUF_LEN];
  93 };
  94
  95 #endif                          /* DEBUG */
  96 #include <chipcommon.h>
  97
  98 #include "dhd_bus.h"
  99 #include "dhd_dbg.h"
 100 #include "tracepoint.h"
 101
 102 #define TXQLEN          2048    /* bulk tx queue length */
 103 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 104 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 105 #define PRIOMASK        7
 106
 107 #define TXRETRIES       2       /* # of retries for tx frames */
 108
 109 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 110                                  one scheduling */
 111
 112 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 113                                  one scheduling */
 114
 115 #define BRCMF_DEFAULT_TXGLOM_SIZE       32  /* max tx frames in glom chain */
 116
 117 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 118
 119 #define MEMBLOCK        2048    /* Block size used for downloading
 120                                  of dongle image */
 121 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 122                                  biggest possible glom */
 123
 124 #define BRCMF_FIRSTREAD (1 << 6)
 125
 126
 127 /* SBSDIO_DEVICE_CTL */
 128
 129 /* 1: device will assert busy signal when receiving CMD53 */
 130 #define SBSDIO_DEVCTL_SETBUSY           0x01
 131 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 132 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 133 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 134 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 135 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 136  * sdio bus power cycle to clear (rev 9) */
 137 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 138 /* Force SD->SB reset mapping (rev 11) */
 139 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 140 /*   Determined by CoreControl bit */
 141 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 142 /*   Force backplane reset */
 143 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 144 /*   Force no backplane reset */
 145 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 146
 147 /* direct(mapped) cis space */
 148
 149 /* MAPPED common CIS address */
 150 #define SBSDIO_CIS_BASE_COMMON          0x1000
 151 /* maximum bytes in one CIS */
 152 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 153 /* cis offset addr is < 17 bits */
 154 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 155
 156 /* manfid tuple length, include tuple, link bytes */
 157 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 158
 159 /* intstatus */
 160 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 161 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 162 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 163 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 164 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 165 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 166 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 167 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 168 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 169 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 170 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 171 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 172 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 173 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 174 #define I_PC            (1 << 10)       /* descriptor error */
 175 #define I_PD            (1 << 11)       /* data error */
 176 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 177 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 178 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 179 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 180 #define I_RI            (1 << 16)       /* Receive Interrupt */
 181 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 182 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 183 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 184 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 185 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 186 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 187 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 188 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 189 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 190 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 191 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 192 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 193
 194 /* corecontrol */
 195 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 196 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 197 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 198 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 199 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 200 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 201
 202 /* SDA_FRAMECTRL */
 203 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 204 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 205 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 206 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 207
 208 /*
 209  * Software allocation of To SB Mailbox resources
 210  */
 211
 212 /* tosbmailbox bits corresponding to intstatus bits */
 213 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 214 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 215 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 216 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 217
 218 /* tosbmailboxdata */
 219 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 220
 221 /*
 222  * Software allocation of To Host Mailbox resources
 223  */
 224
 225 /* intstatus bits */
 226 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 227 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 228 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 229 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 230
 231 /* tohostmailboxdata */
 232 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 233 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 234 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 235 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 236
 237 #define HMB_DATA_FCDATA_MASK    0xff000000
 238 #define HMB_DATA_FCDATA_SHIFT   24
 239
 240 #define HMB_DATA_VERSION_MASK   0x00ff0000
 241 #define HMB_DATA_VERSION_SHIFT  16
 242
 243 /*
 244  * Software-defined protocol header
 245  */
 246
 247 /* Current protocol version */
 248 #define SDPCM_PROT_VERSION      4
 249
 250 /*
 251  * Shared structure between dongle and the host.
 252  * The structure contains pointers to trap or assert information.
 253  */
 254 #define SDPCM_SHARED_VERSION       0x0003
 255 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 256 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 257 #define SDPCM_SHARED_ASSERT        0x0200
 258 #define SDPCM_SHARED_TRAP          0x0400
 259
 260 /* Space for header read, limit for data packets */
 261 #define MAX_HDR_READ    (1 << 6)
 262 #define MAX_RX_DATASZ   2048
 263
 264 /* Bump up limit on waiting for HT to account for first startup;
 265  * if the image is doing a CRC calculation before programming the PMU
 266  * for HT availability, it could take a couple hundred ms more, so
 267  * max out at a 1 second (1000000us).
 268  */
 269 #undef PMU_MAX_TRANSITION_DLY
 270 #define PMU_MAX_TRANSITION_DLY 1000000
 271
 272 /* Value for ChipClockCSR during initial setup */
 273 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 274                                         SBSDIO_ALP_AVAIL_REQ)
 275
 276 /* Flags for SDH calls */
 277 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 278
 279 #define BRCMF_IDLE_IMMEDIATE    (-1)    /* Enter idle immediately */
 280 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 281                                          * when idle
 282                                          */
 283 #define BRCMF_IDLE_INTERVAL     1
 284
 285 #define KSO_WAIT_US 50
 286 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 287
 288 /*
 289  * Conversion of 802.1D priority to precedence level
 290  */
 291 static uint prio2prec(u32 prio)
 292 {
 293         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 294                (prio^2) : prio;
 295 }
 296
 297 #ifdef DEBUG
 298 /* Device console log buffer state */
 299 struct brcmf_console {
 300         uint count;             /* Poll interval msec counter */
 301         uint log_addr;          /* Log struct address (fixed) */
 302         struct rte_log_le log_le;       /* Log struct (host copy) */
 303         uint bufsize;           /* Size of log buffer */
 304         u8 *buf;                /* Log buffer (host copy) */
 305         uint last;              /* Last buffer read index */
 306 };
 307
 308 struct brcmf_trap_info {
 309         __le32          type;
 310         __le32          epc;
 311         __le32          cpsr;
 312         __le32          spsr;
 313         __le32          r0;     /* a1 */
 314         __le32          r1;     /* a2 */
 315         __le32          r2;     /* a3 */
 316         __le32          r3;     /* a4 */
 317         __le32          r4;     /* v1 */
 318         __le32          r5;     /* v2 */
 319         __le32          r6;     /* v3 */
 320         __le32          r7;     /* v4 */
 321         __le32          r8;     /* v5 */
 322         __le32          r9;     /* sb/v6 */
 323         __le32          r10;    /* sl/v7 */
 324         __le32          r11;    /* fp/v8 */
 325         __le32          r12;    /* ip */
 326         __le32          r13;    /* sp */
 327         __le32          r14;    /* lr */
 328         __le32          pc;     /* r15 */
 329 };
 330 #endif                          /* DEBUG */
 331
 332 struct sdpcm_shared {
 333         u32 flags;
 334         u32 trap_addr;
 335         u32 assert_exp_addr;
 336         u32 assert_file_addr;
 337         u32 assert_line;
 338         u32 console_addr;       /* Address of struct rte_console */
 339         u32 msgtrace_addr;
 340         u8 tag[32];
 341         u32 brpt_addr;
 342 };
 343
 344 struct sdpcm_shared_le {
 345         __le32 flags;
 346         __le32 trap_addr;
 347         __le32 assert_exp_addr;
 348         __le32 assert_file_addr;
 349         __le32 assert_line;
 350         __le32 console_addr;    /* Address of struct rte_console */
 351         __le32 msgtrace_addr;
 352         u8 tag[32];
 353         __le32 brpt_addr;
 354 };
 355
 356 /* dongle SDIO bus specific header info */
 357 struct brcmf_sdio_hdrinfo {
 358         u8 seq_num;
 359         u8 channel;
 360         u16 len;
 361         u16 len_left;
 362         u16 len_nxtfrm;
 363         u8 dat_offset;
 364         bool lastfrm;
 365         u16 tail_pad;
 366 };
 367
 368 /* misc chip info needed by some of the routines */
 369 /* Private data for SDIO bus interaction */
 370 struct brcmf_sdio {
 371         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 372         struct chip_info *ci;   /* Chip info struct */
 373
 374         u32 ramsize;            /* Size of RAM in SOCRAM (bytes) */
 375
 376         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 377         atomic_t intstatus;     /* Intstatus bits (events) pending */
 378         atomic_t fcstate;       /* State of dongle flow-control */
 379
 380         uint blocksize;         /* Block size of SDIO transfers */
 381         uint roundup;           /* Max roundup limit */
 382
 383         struct pktq txq;        /* Queue length used for flow-control */
 384         u8 flowcontrol; /* per prio flow control bitmask */
 385         u8 tx_seq;              /* Transmit sequence number (next) */
 386         u8 tx_max;              /* Maximum transmit sequence allowed */
 387
 388         u8 *hdrbuf;             /* buffer for handling rx frame */
 389         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 390         u8 rx_seq;              /* Receive sequence number (expected) */
 391         struct brcmf_sdio_hdrinfo cur_read;
 392                                 /* info of current read frame */
 393         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 394         bool rxpending;         /* Data frame pending in dongle */
 395
 396         uint rxbound;           /* Rx frames to read before resched */
 397         uint txbound;           /* Tx frames to send before resched */
 398         uint txminmax;
 399
 400         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 401         struct sk_buff_head glom; /* Packet list for glommed superframe */
 402         uint glomerr;           /* Glom packet read errors */
 403
 404         u8 *rxbuf;              /* Buffer for receiving control packets */
 405         uint rxblen;            /* Allocated length of rxbuf */
 406         u8 *rxctl;              /* Aligned pointer into rxbuf */
 407         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 408         uint rxlen;             /* Length of valid data in buffer */
 409         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 410
 411         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 412
 413         bool intr;              /* Use interrupts */
 414         bool poll;              /* Use polling */
 415         atomic_t ipend;         /* Device interrupt is pending */
 416         uint spurious;          /* Count of spurious interrupts */
 417         uint pollrate;          /* Ticks between device polls */
 418         uint polltick;          /* Tick counter */
 419
 420 #ifdef DEBUG
 421         uint console_interval;
 422         struct brcmf_console console;   /* Console output polling support */
 423         uint console_addr;      /* Console address from shared struct */
 424 #endif                          /* DEBUG */
 425
 426         uint clkstate;          /* State of sd and backplane clock(s) */
 427         bool activity;          /* Activity flag for clock down */
 428         s32 idletime;           /* Control for activity timeout */
 429         s32 idlecount;  /* Activity timeout counter */
 430         s32 idleclock;  /* How to set bus driver when idle */
 431         bool rxflow_mode;       /* Rx flow control mode */
 432         bool rxflow;            /* Is rx flow control on */
 433         bool alp_only;          /* Don't use HT clock (ALP only) */
 434
 435         u8 *ctrl_frame_buf;
 436         u32 ctrl_frame_len;
 437         bool ctrl_frame_stat;
 438
 439         spinlock_t txqlock;
 440         wait_queue_head_t ctrl_wait;
 441         wait_queue_head_t dcmd_resp_wait;
 442
 443         struct timer_list timer;
 444         struct completion watchdog_wait;
 445         struct task_struct *watchdog_tsk;
 446         bool wd_timer_valid;
 447         uint save_ms;
 448
 449         struct workqueue_struct *brcmf_wq;
 450         struct work_struct datawork;
 451         atomic_t dpc_tskcnt;
 452
 453         bool txoff;             /* Transmit flow-controlled */
 454         struct brcmf_sdio_count sdcnt;
 455         bool sr_enabled; /* SaveRestore enabled */
 456         bool sleeping; /* SDIO bus sleeping */
 457
 458         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 459         bool txglom;            /* host tx glomming enable flag */
 460         struct sk_buff *txglom_sgpad;   /* scatter-gather padding buffer */
 461         u16 head_align;         /* buffer pointer alignment */
 462         u16 sgentry_align;      /* scatter-gather buffer alignment */
 463 };
 464
 465 /* clkstate */
 466 #define CLK_NONE        0
 467 #define CLK_SDONLY      1
 468 #define CLK_PENDING     2
 469 #define CLK_AVAIL       3
 470
 471 #ifdef DEBUG
 472 static int qcount[NUMPRIO];
 473 #endif                          /* DEBUG */
 474
 475 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 476
 477 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 478
 479 /* Retry count for register access failures */
 480 static const uint retry_limit = 2;
 481
 482 /* Limit on rounding up frames */
 483 static const uint max_roundup = 512;
 484
 485 #define ALIGNMENT  4
 486
 487 static int brcmf_sdio_txglomsz = BRCMF_DEFAULT_TXGLOM_SIZE;
 488 module_param_named(txglomsz, brcmf_sdio_txglomsz, int, 0);
 489 MODULE_PARM_DESC(txglomsz, "maximum tx packet chain size [SDIO]");
 490
 491 enum brcmf_sdio_frmtype {
 492         BRCMF_SDIO_FT_NORMAL,
 493         BRCMF_SDIO_FT_SUPER,
 494         BRCMF_SDIO_FT_SUB,
 495 };
 496
 497 #define BCM43143_FIRMWARE_NAME          "brcm/brcmfmac43143-sdio.bin"
 498 #define BCM43143_NVRAM_NAME             "brcm/brcmfmac43143-sdio.txt"
 499 #define BCM43241B0_FIRMWARE_NAME        "brcm/brcmfmac43241b0-sdio.bin"
 500 #define BCM43241B0_NVRAM_NAME           "brcm/brcmfmac43241b0-sdio.txt"
 501 #define BCM43241B4_FIRMWARE_NAME        "brcm/brcmfmac43241b4-sdio.bin"
 502 #define BCM43241B4_NVRAM_NAME           "brcm/brcmfmac43241b4-sdio.txt"
 503 #define BCM4329_FIRMWARE_NAME           "brcm/brcmfmac4329-sdio.bin"
 504 #define BCM4329_NVRAM_NAME              "brcm/brcmfmac4329-sdio.txt"
 505 #define BCM4330_FIRMWARE_NAME           "brcm/brcmfmac4330-sdio.bin"
 506 #define BCM4330_NVRAM_NAME              "brcm/brcmfmac4330-sdio.txt"
 507 #define BCM4334_FIRMWARE_NAME           "brcm/brcmfmac4334-sdio.bin"
 508 #define BCM4334_NVRAM_NAME              "brcm/brcmfmac4334-sdio.txt"
 509 #define BCM4335_FIRMWARE_NAME           "brcm/brcmfmac4335-sdio.bin"
 510 #define BCM4335_NVRAM_NAME              "brcm/brcmfmac4335-sdio.txt"
 511 #define BCM43362_FIRMWARE_NAME          "brcm/brcmfmac43362-sdio.bin"
 512 #define BCM43362_NVRAM_NAME             "brcm/brcmfmac43362-sdio.txt"
 513 #define BCM4339_FIRMWARE_NAME           "brcm/brcmfmac4339-sdio.bin"
 514 #define BCM4339_NVRAM_NAME              "brcm/brcmfmac4339-sdio.txt"
 515
 516 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
 517 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
 518 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
 519 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
 520 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
 521 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
 522 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
 523 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
 524 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
 525 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
 526 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
 527 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
 528 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
 529 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
 530 MODULE_FIRMWARE(BCM43362_FIRMWARE_NAME);
 531 MODULE_FIRMWARE(BCM43362_NVRAM_NAME);
 532 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
 533 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
 534
 535 struct brcmf_firmware_names {
 536         u32 chipid;
 537         u32 revmsk;
 538         const char *bin;
 539         const char *nv;
 540 };
 541
 542 enum brcmf_firmware_type {
 543         BRCMF_FIRMWARE_BIN,
 544         BRCMF_FIRMWARE_NVRAM
 545 };
 546
 547 #define BRCMF_FIRMWARE_NVRAM(name) \
 548         name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
 549
 550 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
 551         { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
 552         { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
 553         { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
 554         { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
 555         { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
 556         { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
 557         { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
 558         { BCM43362_CHIP_ID, 0xFFFFFFFE, BRCMF_FIRMWARE_NVRAM(BCM43362) },
 559         { BCM4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) }
 560 };
 561
 562
 563 static const struct firmware *brcmf_sdio_get_fw(struct brcmf_sdio *bus,
 564                                                   enum brcmf_firmware_type type)
 565 {
 566         const struct firmware *fw;
 567         const char *name;
 568         int err, i;
 569
 570         for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
 571                 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
 572                     brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
 573                         switch (type) {
 574                         case BRCMF_FIRMWARE_BIN:
 575                                 name = brcmf_fwname_data[i].bin;
 576                                 break;
 577                         case BRCMF_FIRMWARE_NVRAM:
 578                                 name = brcmf_fwname_data[i].nv;
 579                                 break;
 580                         default:
 581                                 brcmf_err("invalid firmware type (%d)\n", type);
 582                                 return NULL;
 583                         }
 584                         goto found;
 585                 }
 586         }
 587         brcmf_err("Unknown chipid %d [%d]\n",
 588                   bus->ci->chip, bus->ci->chiprev);
 589         return NULL;
 590
 591 found:
 592         err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
 593         if ((err) || (!fw)) {
 594                 brcmf_err("fail to request firmware %s (%d)\n", name, err);
 595                 return NULL;
 596         }
 597
 598         return fw;
 599 }
 600
 601 static void pkt_align(struct sk_buff *p, int len, int align)
 602 {
 603         uint datalign;
 604         datalign = (unsigned long)(p->data);
 605         datalign = roundup(datalign, (align)) - datalign;
 606         if (datalign)
 607                 skb_pull(p, datalign);
 608         __skb_trim(p, len);
 609 }
 610
 611 /* To check if there's window offered */
 612 static bool data_ok(struct brcmf_sdio *bus)
 613 {
 614         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 615                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 616 }
 617
 618 /*
 619  * Reads a register in the SDIO hardware block. This block occupies a series of
 620  * adresses on the 32 bit backplane bus.
 621  */
 622 static int
 623 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 624 {
 625         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 626         int ret;
 627
 628         *regvar = brcmf_sdiod_regrl(bus->sdiodev,
 629                                     bus->ci->c_inf[idx].base + offset, &ret);
 630
 631         return ret;
 632 }
 633
 634 static int
 635 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 636 {
 637         u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
 638         int ret;
 639
 640         brcmf_sdiod_regwl(bus->sdiodev,
 641                           bus->ci->c_inf[idx].base + reg_offset,
 642                           regval, &ret);
 643
 644         return ret;
 645 }
 646
 647 static int
 648 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 649 {
 650         u8 wr_val = 0, rd_val, cmp_val, bmask;
 651         int err = 0;
 652         int try_cnt = 0;
 653
 654         brcmf_dbg(TRACE, "Enter\n");
 655
 656         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 657         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 658         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 659                           wr_val, &err);
 660         if (err) {
 661                 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
 662                 return err;
 663         }
 664
 665         if (on) {
 666                 /* device WAKEUP through KSO:
 667                  * write bit 0 & read back until
 668                  * both bits 0 (kso bit) & 1 (dev on status) are set
 669                  */
 670                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 671                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 672                 bmask = cmp_val;
 673                 usleep_range(2000, 3000);
 674         } else {
 675                 /* Put device to sleep, turn off KSO */
 676                 cmp_val = 0;
 677                 /* only check for bit0, bit1(dev on status) may not
 678                  * get cleared right away
 679                  */
 680                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 681         }
 682
 683         do {
 684                 /* reliable KSO bit set/clr:
 685                  * the sdiod sleep write access is synced to PMU 32khz clk
 686                  * just one write attempt may fail,
 687                  * read it back until it matches written value
 688                  */
 689                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 690                                            &err);
 691                 if (((rd_val & bmask) == cmp_val) && !err)
 692                         break;
 693                 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
 694                           try_cnt, MAX_KSO_ATTEMPTS, err);
 695                 udelay(KSO_WAIT_US);
 696                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 697                                   wr_val, &err);
 698         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 699
 700         return err;
 701 }
 702
 703 #define PKT_AVAILABLE()         (intstatus & I_HMB_FRAME_IND)
 704
 705 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 706
 707 /* Turn backplane clock on or off */
 708 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 709 {
 710         int err;
 711         u8 clkctl, clkreq, devctl;
 712         unsigned long timeout;
 713
 714         brcmf_dbg(SDIO, "Enter\n");
 715
 716         clkctl = 0;
 717
 718         if (bus->sr_enabled) {
 719                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 720                 return 0;
 721         }
 722
 723         if (on) {
 724                 /* Request HT Avail */
 725                 clkreq =
 726                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 727
 728                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 729                                   clkreq, &err);
 730                 if (err) {
 731                         brcmf_err("HT Avail request error: %d\n", err);
 732                         return -EBADE;
 733                 }
 734
 735                 /* Check current status */
 736                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 737                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 738                 if (err) {
 739                         brcmf_err("HT Avail read error: %d\n", err);
 740                         return -EBADE;
 741                 }
 742
 743                 /* Go to pending and await interrupt if appropriate */
 744                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 745                         /* Allow only clock-available interrupt */
 746                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 747                                                    SBSDIO_DEVICE_CTL, &err);
 748                         if (err) {
 749                                 brcmf_err("Devctl error setting CA: %d\n",
 750                                           err);
 751                                 return -EBADE;
 752                         }
 753
 754                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 755                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 756                                           devctl, &err);
 757                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 758                         bus->clkstate = CLK_PENDING;
 759
 760                         return 0;
 761                 } else if (bus->clkstate == CLK_PENDING) {
 762                         /* Cancel CA-only interrupt filter */
 763                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 764                                                    SBSDIO_DEVICE_CTL, &err);
 765                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 766                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 767                                           devctl, &err);
 768                 }
 769
 770                 /* Otherwise, wait here (polling) for HT Avail */
 771                 timeout = jiffies +
 772                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 773                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 774                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 775                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 776                                                    &err);
 777                         if (time_after(jiffies, timeout))
 778                                 break;
 779                         else
 780                                 usleep_range(5000, 10000);
 781                 }
 782                 if (err) {
 783                         brcmf_err("HT Avail request error: %d\n", err);
 784                         return -EBADE;
 785                 }
 786                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 787                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 788                                   PMU_MAX_TRANSITION_DLY, clkctl);
 789                         return -EBADE;
 790                 }
 791
 792                 /* Mark clock available */
 793                 bus->clkstate = CLK_AVAIL;
 794                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 795
 796 #if defined(DEBUG)
 797                 if (!bus->alp_only) {
 798                         if (SBSDIO_ALPONLY(clkctl))
 799                                 brcmf_err("HT Clock should be on\n");
 800                 }
 801 #endif                          /* defined (DEBUG) */
 802
 803                 bus->activity = true;
 804         } else {
 805                 clkreq = 0;
 806
 807                 if (bus->clkstate == CLK_PENDING) {
 808                         /* Cancel CA-only interrupt filter */
 809                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 810                                                    SBSDIO_DEVICE_CTL, &err);
 811                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 812                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 813                                           devctl, &err);
 814                 }
 815
 816                 bus->clkstate = CLK_SDONLY;
 817                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 818                                   clkreq, &err);
 819                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 820                 if (err) {
 821                         brcmf_err("Failed access turning clock off: %d\n",
 822                                   err);
 823                         return -EBADE;
 824                 }
 825         }
 826         return 0;
 827 }
 828
 829 /* Change idle/active SD state */
 830 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 831 {
 832         brcmf_dbg(SDIO, "Enter\n");
 833
 834         if (on)
 835                 bus->clkstate = CLK_SDONLY;
 836         else
 837                 bus->clkstate = CLK_NONE;
 838
 839         return 0;
 840 }
 841
 842 /* Transition SD and backplane clock readiness */
 843 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 844 {
 845 #ifdef DEBUG
 846         uint oldstate = bus->clkstate;
 847 #endif                          /* DEBUG */
 848
 849         brcmf_dbg(SDIO, "Enter\n");
 850
 851         /* Early exit if we're already there */
 852         if (bus->clkstate == target) {
 853                 if (target == CLK_AVAIL) {
 854                         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 855                         bus->activity = true;
 856                 }
 857                 return 0;
 858         }
 859
 860         switch (target) {
 861         case CLK_AVAIL:
 862                 /* Make sure SD clock is available */
 863                 if (bus->clkstate == CLK_NONE)
 864                         brcmf_sdio_sdclk(bus, true);
 865                 /* Now request HT Avail on the backplane */
 866                 brcmf_sdio_htclk(bus, true, pendok);
 867                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 868                 bus->activity = true;
 869                 break;
 870
 871         case CLK_SDONLY:
 872                 /* Remove HT request, or bring up SD clock */
 873                 if (bus->clkstate == CLK_NONE)
 874                         brcmf_sdio_sdclk(bus, true);
 875                 else if (bus->clkstate == CLK_AVAIL)
 876                         brcmf_sdio_htclk(bus, false, false);
 877                 else
 878                         brcmf_err("request for %d -> %d\n",
 879                                   bus->clkstate, target);
 880                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
 881                 break;
 882
 883         case CLK_NONE:
 884                 /* Make sure to remove HT request */
 885                 if (bus->clkstate == CLK_AVAIL)
 886                         brcmf_sdio_htclk(bus, false, false);
 887                 /* Now remove the SD clock */
 888                 brcmf_sdio_sdclk(bus, false);
 889                 brcmf_sdio_wd_timer(bus, 0);
 890                 break;
 891         }
 892 #ifdef DEBUG
 893         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 894 #endif                          /* DEBUG */
 895
 896         return 0;
 897 }
 898
 899 static int
 900 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 901 {
 902         int err = 0;
 903         brcmf_dbg(TRACE, "Enter\n");
 904         brcmf_dbg(SDIO, "request %s currently %s\n",
 905                   (sleep ? "SLEEP" : "WAKE"),
 906                   (bus->sleeping ? "SLEEP" : "WAKE"));
 907
 908         /* If SR is enabled control bus state with KSO */
 909         if (bus->sr_enabled) {
 910                 /* Done if we're already in the requested state */
 911                 if (sleep == bus->sleeping)
 912                         goto end;
 913
 914                 /* Going to sleep */
 915                 if (sleep) {
 916                         /* Don't sleep if something is pending */
 917                         if (atomic_read(&bus->intstatus) ||
 918                             atomic_read(&bus->ipend) > 0 ||
 919                             (!atomic_read(&bus->fcstate) &&
 920                             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
 921                             data_ok(bus)))
 922                                  return -EBUSY;
 923                         err = brcmf_sdio_kso_control(bus, false);
 924                         /* disable watchdog */
 925                         if (!err)
 926                                 brcmf_sdio_wd_timer(bus, 0);
 927                 } else {
 928                         bus->idlecount = 0;
 929                         err = brcmf_sdio_kso_control(bus, true);
 930                 }
 931                 if (!err) {
 932                         /* Change state */
 933                         bus->sleeping = sleep;
 934                         brcmf_dbg(SDIO, "new state %s\n",
 935                                   (sleep ? "SLEEP" : "WAKE"));
 936                 } else {
 937                         brcmf_err("error while changing bus sleep state %d\n",
 938                                   err);
 939                         return err;
 940                 }
 941         }
 942
 943 end:
 944         /* control clocks */
 945         if (sleep) {
 946                 if (!bus->sr_enabled)
 947                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 948         } else {
 949                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 950         }
 951
 952         return err;
 953
 954 }
 955
 956 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
 957 {
 958         u32 intstatus = 0;
 959         u32 hmb_data;
 960         u8 fcbits;
 961         int ret;
 962
 963         brcmf_dbg(SDIO, "Enter\n");
 964
 965         /* Read mailbox data and ack that we did so */
 966         ret = r_sdreg32(bus, &hmb_data,
 967                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
 968
 969         if (ret == 0)
 970                 w_sdreg32(bus, SMB_INT_ACK,
 971                           offsetof(struct sdpcmd_regs, tosbmailbox));
 972         bus->sdcnt.f1regdata += 2;
 973
 974         /* Dongle recomposed rx frames, accept them again */
 975         if (hmb_data & HMB_DATA_NAKHANDLED) {
 976                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
 977                           bus->rx_seq);
 978                 if (!bus->rxskip)
 979                         brcmf_err("unexpected NAKHANDLED!\n");
 980
 981                 bus->rxskip = false;
 982                 intstatus |= I_HMB_FRAME_IND;
 983         }
 984
 985         /*
 986          * DEVREADY does not occur with gSPI.
 987          */
 988         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
 989                 bus->sdpcm_ver =
 990                     (hmb_data & HMB_DATA_VERSION_MASK) >>
 991                     HMB_DATA_VERSION_SHIFT;
 992                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
 993                         brcmf_err("Version mismatch, dongle reports %d, "
 994                                   "expecting %d\n",
 995                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
 996                 else
 997                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
 998                                   bus->sdpcm_ver);
 999         }
1000
1001         /*
1002          * Flow Control has been moved into the RX headers and this out of band
1003          * method isn't used any more.
1004          * remaining backward compatible with older dongles.
1005          */
1006         if (hmb_data & HMB_DATA_FC) {
1007                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1008                                                         HMB_DATA_FCDATA_SHIFT;
1009
1010                 if (fcbits & ~bus->flowcontrol)
1011                         bus->sdcnt.fc_xoff++;
1012
1013                 if (bus->flowcontrol & ~fcbits)
1014                         bus->sdcnt.fc_xon++;
1015
1016                 bus->sdcnt.fc_rcvd++;
1017                 bus->flowcontrol = fcbits;
1018         }
1019
1020         /* Shouldn't be any others */
1021         if (hmb_data & ~(HMB_DATA_DEVREADY |
1022                          HMB_DATA_NAKHANDLED |
1023                          HMB_DATA_FC |
1024                          HMB_DATA_FWREADY |
1025                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1026                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1027                           hmb_data);
1028
1029         return intstatus;
1030 }
1031
1032 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1033 {
1034         uint retries = 0;
1035         u16 lastrbc;
1036         u8 hi, lo;
1037         int err;
1038
1039         brcmf_err("%sterminate frame%s\n",
1040                   abort ? "abort command, " : "",
1041                   rtx ? ", send NAK" : "");
1042
1043         if (abort)
1044                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1045
1046         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1047                           SFC_RF_TERM, &err);
1048         bus->sdcnt.f1regdata++;
1049
1050         /* Wait until the packet has been flushed (device/FIFO stable) */
1051         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1052                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1053                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1054                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1055                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1056                 bus->sdcnt.f1regdata += 2;
1057
1058                 if ((hi == 0) && (lo == 0))
1059                         break;
1060
1061                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1062                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1063                                   lastrbc, (hi << 8) + lo);
1064                 }
1065                 lastrbc = (hi << 8) + lo;
1066         }
1067
1068         if (!retries)
1069                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1070         else
1071                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1072
1073         if (rtx) {
1074                 bus->sdcnt.rxrtx++;
1075                 err = w_sdreg32(bus, SMB_NAK,
1076                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1077
1078                 bus->sdcnt.f1regdata++;
1079                 if (err == 0)
1080                         bus->rxskip = true;
1081         }
1082
1083         /* Clear partial in any case */
1084         bus->cur_read.len = 0;
1085
1086         /* If we can't reach the device, signal failure */
1087         if (err)
1088                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1089 }
1090
1091 /* return total length of buffer chain */
1092 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1093 {
1094         struct sk_buff *p;
1095         uint total;
1096
1097         total = 0;
1098         skb_queue_walk(&bus->glom, p)
1099                 total += p->len;
1100         return total;
1101 }
1102
1103 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1104 {
1105         struct sk_buff *cur, *next;
1106
1107         skb_queue_walk_safe(&bus->glom, cur, next) {
1108                 skb_unlink(cur, &bus->glom);
1109                 brcmu_pkt_buf_free_skb(cur);
1110         }
1111 }
1112
1113 /**
1114  * brcmfmac sdio bus specific header
1115  * This is the lowest layer header wrapped on the packets transmitted between
1116  * host and WiFi dongle which contains information needed for SDIO core and
1117  * firmware
1118  *
1119  * It consists of 3 parts: hardware header, hardware extension header and
1120  * software header
1121  * hardware header (frame tag) - 4 bytes
1122  * Byte 0~1: Frame length
1123  * Byte 2~3: Checksum, bit-wise inverse of frame length
1124  * hardware extension header - 8 bytes
1125  * Tx glom mode only, N/A for Rx or normal Tx
1126  * Byte 0~1: Packet length excluding hw frame tag
1127  * Byte 2: Reserved
1128  * Byte 3: Frame flags, bit 0: last frame indication
1129  * Byte 4~5: Reserved
1130  * Byte 6~7: Tail padding length
1131  * software header - 8 bytes
1132  * Byte 0: Rx/Tx sequence number
1133  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1134  * Byte 2: Length of next data frame, reserved for Tx
1135  * Byte 3: Data offset
1136  * Byte 4: Flow control bits, reserved for Tx
1137  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1138  * Byte 6~7: Reserved
1139  */
1140 #define SDPCM_HWHDR_LEN                 4
1141 #define SDPCM_HWEXT_LEN                 8
1142 #define SDPCM_SWHDR_LEN                 8
1143 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1144 /* software header */
1145 #define SDPCM_SEQ_MASK                  0x000000ff
1146 #define SDPCM_SEQ_WRAP                  256
1147 #define SDPCM_CHANNEL_MASK              0x00000f00
1148 #define SDPCM_CHANNEL_SHIFT             8
1149 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1150 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1151 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1152 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1153 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1154 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1155 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1156 #define SDPCM_NEXTLEN_SHIFT             16
1157 #define SDPCM_DOFFSET_MASK              0xff000000
1158 #define SDPCM_DOFFSET_SHIFT             24
1159 #define SDPCM_FCMASK_MASK               0x000000ff
1160 #define SDPCM_WINDOW_MASK               0x0000ff00
1161 #define SDPCM_WINDOW_SHIFT              8
1162
1163 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1164 {
1165         u32 hdrvalue;
1166         hdrvalue = *(u32 *)swheader;
1167         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1168 }
1169
1170 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1171                               struct brcmf_sdio_hdrinfo *rd,
1172                               enum brcmf_sdio_frmtype type)
1173 {
1174         u16 len, checksum;
1175         u8 rx_seq, fc, tx_seq_max;
1176         u32 swheader;
1177
1178         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1179
1180         /* hw header */
1181         len = get_unaligned_le16(header);
1182         checksum = get_unaligned_le16(header + sizeof(u16));
1183         /* All zero means no more to read */
1184         if (!(len | checksum)) {
1185                 bus->rxpending = false;
1186                 return -ENODATA;
1187         }
1188         if ((u16)(~(len ^ checksum))) {
1189                 brcmf_err("HW header checksum error\n");
1190                 bus->sdcnt.rx_badhdr++;
1191                 brcmf_sdio_rxfail(bus, false, false);
1192                 return -EIO;
1193         }
1194         if (len < SDPCM_HDRLEN) {
1195                 brcmf_err("HW header length error\n");
1196                 return -EPROTO;
1197         }
1198         if (type == BRCMF_SDIO_FT_SUPER &&
1199             (roundup(len, bus->blocksize) != rd->len)) {
1200                 brcmf_err("HW superframe header length error\n");
1201                 return -EPROTO;
1202         }
1203         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1204                 brcmf_err("HW subframe header length error\n");
1205                 return -EPROTO;
1206         }
1207         rd->len = len;
1208
1209         /* software header */
1210         header += SDPCM_HWHDR_LEN;
1211         swheader = le32_to_cpu(*(__le32 *)header);
1212         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1213                 brcmf_err("Glom descriptor found in superframe head\n");
1214                 rd->len = 0;
1215                 return -EINVAL;
1216         }
1217         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1218         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1219         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1220             type != BRCMF_SDIO_FT_SUPER) {
1221                 brcmf_err("HW header length too long\n");
1222                 bus->sdcnt.rx_toolong++;
1223                 brcmf_sdio_rxfail(bus, false, false);
1224                 rd->len = 0;
1225                 return -EPROTO;
1226         }
1227         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1228                 brcmf_err("Wrong channel for superframe\n");
1229                 rd->len = 0;
1230                 return -EINVAL;
1231         }
1232         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1233             rd->channel != SDPCM_EVENT_CHANNEL) {
1234                 brcmf_err("Wrong channel for subframe\n");
1235                 rd->len = 0;
1236                 return -EINVAL;
1237         }
1238         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1239         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1240                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1241                 bus->sdcnt.rx_badhdr++;
1242                 brcmf_sdio_rxfail(bus, false, false);
1243                 rd->len = 0;
1244                 return -ENXIO;
1245         }
1246         if (rd->seq_num != rx_seq) {
1247                 brcmf_err("seq %d: sequence number error, expect %d\n",
1248                           rx_seq, rd->seq_num);
1249                 bus->sdcnt.rx_badseq++;
1250                 rd->seq_num = rx_seq;
1251         }
1252         /* no need to check the reset for subframe */
1253         if (type == BRCMF_SDIO_FT_SUB)
1254                 return 0;
1255         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1256         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1257                 /* only warm for NON glom packet */
1258                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1259                         brcmf_err("seq %d: next length error\n", rx_seq);
1260                 rd->len_nxtfrm = 0;
1261         }
1262         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1263         fc = swheader & SDPCM_FCMASK_MASK;
1264         if (bus->flowcontrol != fc) {
1265                 if (~bus->flowcontrol & fc)
1266                         bus->sdcnt.fc_xoff++;
1267                 if (bus->flowcontrol & ~fc)
1268                         bus->sdcnt.fc_xon++;
1269                 bus->sdcnt.fc_rcvd++;
1270                 bus->flowcontrol = fc;
1271         }
1272         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1273         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1274                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1275                 tx_seq_max = bus->tx_seq + 2;
1276         }
1277         bus->tx_max = tx_seq_max;
1278
1279         return 0;
1280 }
1281
1282 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1283 {
1284         *(__le16 *)header = cpu_to_le16(frm_length);
1285         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1286 }
1287
1288 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1289                               struct brcmf_sdio_hdrinfo *hd_info)
1290 {
1291         u32 hdrval;
1292         u8 hdr_offset;
1293
1294         brcmf_sdio_update_hwhdr(header, hd_info->len);
1295         hdr_offset = SDPCM_HWHDR_LEN;
1296
1297         if (bus->txglom) {
1298                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1299                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1300                 hdrval = (u16)hd_info->tail_pad << 16;
1301                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1302                 hdr_offset += SDPCM_HWEXT_LEN;
1303         }
1304
1305         hdrval = hd_info->seq_num;
1306         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1307                   SDPCM_CHANNEL_MASK;
1308         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1309                   SDPCM_DOFFSET_MASK;
1310         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1311         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1312         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1313 }
1314
1315 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1316 {
1317         u16 dlen, totlen;
1318         u8 *dptr, num = 0;
1319         u16 sublen;
1320         struct sk_buff *pfirst, *pnext;
1321
1322         int errcode;
1323         u8 doff, sfdoff;
1324
1325         struct brcmf_sdio_hdrinfo rd_new;
1326
1327         /* If packets, issue read(s) and send up packet chain */
1328         /* Return sequence numbers consumed? */
1329
1330         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1331                   bus->glomd, skb_peek(&bus->glom));
1332
1333         /* If there's a descriptor, generate the packet chain */
1334         if (bus->glomd) {
1335                 pfirst = pnext = NULL;
1336                 dlen = (u16) (bus->glomd->len);
1337                 dptr = bus->glomd->data;
1338                 if (!dlen || (dlen & 1)) {
1339                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1340                                   dlen);
1341                         dlen = 0;
1342                 }
1343
1344                 for (totlen = num = 0; dlen; num++) {
1345                         /* Get (and move past) next length */
1346                         sublen = get_unaligned_le16(dptr);
1347                         dlen -= sizeof(u16);
1348                         dptr += sizeof(u16);
1349                         if ((sublen < SDPCM_HDRLEN) ||
1350                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1351                                 brcmf_err("descriptor len %d bad: %d\n",
1352                                           num, sublen);
1353                                 pnext = NULL;
1354                                 break;
1355                         }
1356                         if (sublen % bus->sgentry_align) {
1357                                 brcmf_err("sublen %d not multiple of %d\n",
1358                                           sublen, bus->sgentry_align);
1359                         }
1360                         totlen += sublen;
1361
1362                         /* For last frame, adjust read len so total
1363                                  is a block multiple */
1364                         if (!dlen) {
1365                                 sublen +=
1366                                     (roundup(totlen, bus->blocksize) - totlen);
1367                                 totlen = roundup(totlen, bus->blocksize);
1368                         }
1369
1370                         /* Allocate/chain packet for next subframe */
1371                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1372                         if (pnext == NULL) {
1373                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1374                                           num, sublen);
1375                                 break;
1376                         }
1377                         skb_queue_tail(&bus->glom, pnext);
1378
1379                         /* Adhere to start alignment requirements */
1380                         pkt_align(pnext, sublen, bus->sgentry_align);
1381                 }
1382
1383                 /* If all allocations succeeded, save packet chain
1384                          in bus structure */
1385                 if (pnext) {
1386                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1387                                   totlen, num);
1388                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1389                             totlen != bus->cur_read.len) {
1390                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1391                                           bus->cur_read.len, totlen, rxseq);
1392                         }
1393                         pfirst = pnext = NULL;
1394                 } else {
1395                         brcmf_sdio_free_glom(bus);
1396                         num = 0;
1397                 }
1398
1399                 /* Done with descriptor packet */
1400                 brcmu_pkt_buf_free_skb(bus->glomd);
1401                 bus->glomd = NULL;
1402                 bus->cur_read.len = 0;
1403         }
1404
1405         /* Ok -- either we just generated a packet chain,
1406                  or had one from before */
1407         if (!skb_queue_empty(&bus->glom)) {
1408                 if (BRCMF_GLOM_ON()) {
1409                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1410                         skb_queue_walk(&bus->glom, pnext) {
1411                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1412                                           pnext, (u8 *) (pnext->data),
1413                                           pnext->len, pnext->len);
1414                         }
1415                 }
1416
1417                 pfirst = skb_peek(&bus->glom);
1418                 dlen = (u16) brcmf_sdio_glom_len(bus);
1419
1420                 /* Do an SDIO read for the superframe.  Configurable iovar to
1421                  * read directly into the chained packet, or allocate a large
1422                  * packet and and copy into the chain.
1423                  */
1424                 sdio_claim_host(bus->sdiodev->func[1]);
1425                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1426                                                  &bus->glom, dlen);
1427                 sdio_release_host(bus->sdiodev->func[1]);
1428                 bus->sdcnt.f2rxdata++;
1429
1430                 /* On failure, kill the superframe, allow a couple retries */
1431                 if (errcode < 0) {
1432                         brcmf_err("glom read of %d bytes failed: %d\n",
1433                                   dlen, errcode);
1434
1435                         sdio_claim_host(bus->sdiodev->func[1]);
1436                         if (bus->glomerr++ < 3) {
1437                                 brcmf_sdio_rxfail(bus, true, true);
1438                         } else {
1439                                 bus->glomerr = 0;
1440                                 brcmf_sdio_rxfail(bus, true, false);
1441                                 bus->sdcnt.rxglomfail++;
1442                                 brcmf_sdio_free_glom(bus);
1443                         }
1444                         sdio_release_host(bus->sdiodev->func[1]);
1445                         return 0;
1446                 }
1447
1448                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1449                                    pfirst->data, min_t(int, pfirst->len, 48),
1450                                    "SUPERFRAME:\n");
1451
1452                 rd_new.seq_num = rxseq;
1453                 rd_new.len = dlen;
1454                 sdio_claim_host(bus->sdiodev->func[1]);
1455                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1456                                              BRCMF_SDIO_FT_SUPER);
1457                 sdio_release_host(bus->sdiodev->func[1]);
1458                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1459
1460                 /* Remove superframe header, remember offset */
1461                 skb_pull(pfirst, rd_new.dat_offset);
1462                 sfdoff = rd_new.dat_offset;
1463                 num = 0;
1464
1465                 /* Validate all the subframe headers */
1466                 skb_queue_walk(&bus->glom, pnext) {
1467                         /* leave when invalid subframe is found */
1468                         if (errcode)
1469                                 break;
1470
1471                         rd_new.len = pnext->len;
1472                         rd_new.seq_num = rxseq++;
1473                         sdio_claim_host(bus->sdiodev->func[1]);
1474                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1475                                                      BRCMF_SDIO_FT_SUB);
1476                         sdio_release_host(bus->sdiodev->func[1]);
1477                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1478                                            pnext->data, 32, "subframe:\n");
1479
1480                         num++;
1481                 }
1482
1483                 if (errcode) {
1484                         /* Terminate frame on error, request
1485                                  a couple retries */
1486                         sdio_claim_host(bus->sdiodev->func[1]);
1487                         if (bus->glomerr++ < 3) {
1488                                 /* Restore superframe header space */
1489                                 skb_push(pfirst, sfdoff);
1490                                 brcmf_sdio_rxfail(bus, true, true);
1491                         } else {
1492                                 bus->glomerr = 0;
1493                                 brcmf_sdio_rxfail(bus, true, false);
1494                                 bus->sdcnt.rxglomfail++;
1495                                 brcmf_sdio_free_glom(bus);
1496                         }
1497                         sdio_release_host(bus->sdiodev->func[1]);
1498                         bus->cur_read.len = 0;
1499                         return 0;
1500                 }
1501
1502                 /* Basic SD framing looks ok - process each packet (header) */
1503
1504                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1505                         dptr = (u8 *) (pfirst->data);
1506                         sublen = get_unaligned_le16(dptr);
1507                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1508
1509                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1510                                            dptr, pfirst->len,
1511                                            "Rx Subframe Data:\n");
1512
1513                         __skb_trim(pfirst, sublen);
1514                         skb_pull(pfirst, doff);
1515
1516                         if (pfirst->len == 0) {
1517                                 skb_unlink(pfirst, &bus->glom);
1518                                 brcmu_pkt_buf_free_skb(pfirst);
1519                                 continue;
1520                         }
1521
1522                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1523                                            pfirst->data,
1524                                            min_t(int, pfirst->len, 32),
1525                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1526                                            bus->glom.qlen, pfirst, pfirst->data,
1527                                            pfirst->len, pfirst->next,
1528                                            pfirst->prev);
1529                         skb_unlink(pfirst, &bus->glom);
1530                         brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1531                         bus->sdcnt.rxglompkts++;
1532                 }
1533
1534                 bus->sdcnt.rxglomframes++;
1535         }
1536         return num;
1537 }
1538
1539 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1540                                      bool *pending)
1541 {
1542         DECLARE_WAITQUEUE(wait, current);
1543         int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1544
1545         /* Wait until control frame is available */
1546         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1547         set_current_state(TASK_INTERRUPTIBLE);
1548
1549         while (!(*condition) && (!signal_pending(current) && timeout))
1550                 timeout = schedule_timeout(timeout);
1551
1552         if (signal_pending(current))
1553                 *pending = true;
1554
1555         set_current_state(TASK_RUNNING);
1556         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1557
1558         return timeout;
1559 }
1560
1561 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1562 {
1563         if (waitqueue_active(&bus->dcmd_resp_wait))
1564                 wake_up_interruptible(&bus->dcmd_resp_wait);
1565
1566         return 0;
1567 }
1568 static void
1569 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1570 {
1571         uint rdlen, pad;
1572         u8 *buf = NULL, *rbuf;
1573         int sdret;
1574
1575         brcmf_dbg(TRACE, "Enter\n");
1576
1577         if (bus->rxblen)
1578                 buf = vzalloc(bus->rxblen);
1579         if (!buf)
1580                 goto done;
1581
1582         rbuf = bus->rxbuf;
1583         pad = ((unsigned long)rbuf % bus->head_align);
1584         if (pad)
1585                 rbuf += (bus->head_align - pad);
1586
1587         /* Copy the already-read portion over */
1588         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1589         if (len <= BRCMF_FIRSTREAD)
1590                 goto gotpkt;
1591
1592         /* Raise rdlen to next SDIO block to avoid tail command */
1593         rdlen = len - BRCMF_FIRSTREAD;
1594         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1595                 pad = bus->blocksize - (rdlen % bus->blocksize);
1596                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1597                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1598                         rdlen += pad;
1599         } else if (rdlen % bus->head_align) {
1600                 rdlen += bus->head_align - (rdlen % bus->head_align);
1601         }
1602
1603         /* Drop if the read is too big or it exceeds our maximum */
1604         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1605                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1606                           rdlen, bus->sdiodev->bus_if->maxctl);
1607                 brcmf_sdio_rxfail(bus, false, false);
1608                 goto done;
1609         }
1610
1611         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1612                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1613                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1614                 bus->sdcnt.rx_toolong++;
1615                 brcmf_sdio_rxfail(bus, false, false);
1616                 goto done;
1617         }
1618
1619         /* Read remain of frame body */
1620         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1621         bus->sdcnt.f2rxdata++;
1622
1623         /* Control frame failures need retransmission */
1624         if (sdret < 0) {
1625                 brcmf_err("read %d control bytes failed: %d\n",
1626                           rdlen, sdret);
1627                 bus->sdcnt.rxc_errors++;
1628                 brcmf_sdio_rxfail(bus, true, true);
1629                 goto done;
1630         } else
1631                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1632
1633 gotpkt:
1634
1635         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1636                            buf, len, "RxCtrl:\n");
1637
1638         /* Point to valid data and indicate its length */
1639         spin_lock_bh(&bus->rxctl_lock);
1640         if (bus->rxctl) {
1641                 brcmf_err("last control frame is being processed.\n");
1642                 spin_unlock_bh(&bus->rxctl_lock);
1643                 vfree(buf);
1644                 goto done;
1645         }
1646         bus->rxctl = buf + doff;
1647         bus->rxctl_orig = buf;
1648         bus->rxlen = len - doff;
1649         spin_unlock_bh(&bus->rxctl_lock);
1650
1651 done:
1652         /* Awake any waiters */
1653         brcmf_sdio_dcmd_resp_wake(bus);
1654 }
1655
1656 /* Pad read to blocksize for efficiency */
1657 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1658 {
1659         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1660                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1661                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1662                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1663                         *rdlen += *pad;
1664         } else if (*rdlen % bus->head_align) {
1665                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1666         }
1667 }
1668
1669 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1670 {
1671         struct sk_buff *pkt;            /* Packet for event or data frames */
1672         u16 pad;                /* Number of pad bytes to read */
1673         uint rxleft = 0;        /* Remaining number of frames allowed */
1674         int ret;                /* Return code from calls */
1675         uint rxcount = 0;       /* Total frames read */
1676         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1677         u8 head_read = 0;
1678
1679         brcmf_dbg(TRACE, "Enter\n");
1680
1681         /* Not finished unless we encounter no more frames indication */
1682         bus->rxpending = true;
1683
1684         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1685              !bus->rxskip && rxleft &&
1686              bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1687              rd->seq_num++, rxleft--) {
1688
1689                 /* Handle glomming separately */
1690                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1691                         u8 cnt;
1692                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1693                                   bus->glomd, skb_peek(&bus->glom));
1694                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1695                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1696                         rd->seq_num += cnt - 1;
1697                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1698                         continue;
1699                 }
1700
1701                 rd->len_left = rd->len;
1702                 /* read header first for unknow frame length */
1703                 sdio_claim_host(bus->sdiodev->func[1]);
1704                 if (!rd->len) {
1705                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1706                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1707                         bus->sdcnt.f2rxhdrs++;
1708                         if (ret < 0) {
1709                                 brcmf_err("RXHEADER FAILED: %d\n",
1710                                           ret);
1711                                 bus->sdcnt.rx_hdrfail++;
1712                                 brcmf_sdio_rxfail(bus, true, true);
1713                                 sdio_release_host(bus->sdiodev->func[1]);
1714                                 continue;
1715                         }
1716
1717                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1718                                            bus->rxhdr, SDPCM_HDRLEN,
1719                                            "RxHdr:\n");
1720
1721                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1722                                                BRCMF_SDIO_FT_NORMAL)) {
1723                                 sdio_release_host(bus->sdiodev->func[1]);
1724                                 if (!bus->rxpending)
1725                                         break;
1726                                 else
1727                                         continue;
1728                         }
1729
1730                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1731                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1732                                                         rd->len,
1733                                                         rd->dat_offset);
1734                                 /* prepare the descriptor for the next read */
1735                                 rd->len = rd->len_nxtfrm << 4;
1736                                 rd->len_nxtfrm = 0;
1737                                 /* treat all packet as event if we don't know */
1738                                 rd->channel = SDPCM_EVENT_CHANNEL;
1739                                 sdio_release_host(bus->sdiodev->func[1]);
1740                                 continue;
1741                         }
1742                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1743                                        rd->len - BRCMF_FIRSTREAD : 0;
1744                         head_read = BRCMF_FIRSTREAD;
1745                 }
1746
1747                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1748
1749                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1750                                             bus->head_align);
1751                 if (!pkt) {
1752                         /* Give up on data, request rtx of events */
1753                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1754                         brcmf_sdio_rxfail(bus, false,
1755                                             RETRYCHAN(rd->channel));
1756                         sdio_release_host(bus->sdiodev->func[1]);
1757                         continue;
1758                 }
1759                 skb_pull(pkt, head_read);
1760                 pkt_align(pkt, rd->len_left, bus->head_align);
1761
1762                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1763                 bus->sdcnt.f2rxdata++;
1764                 sdio_release_host(bus->sdiodev->func[1]);
1765
1766                 if (ret < 0) {
1767                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1768                                   rd->len, rd->channel, ret);
1769                         brcmu_pkt_buf_free_skb(pkt);
1770                         sdio_claim_host(bus->sdiodev->func[1]);
1771                         brcmf_sdio_rxfail(bus, true,
1772                                             RETRYCHAN(rd->channel));
1773                         sdio_release_host(bus->sdiodev->func[1]);
1774                         continue;
1775                 }
1776
1777                 if (head_read) {
1778                         skb_push(pkt, head_read);
1779                         memcpy(pkt->data, bus->rxhdr, head_read);
1780                         head_read = 0;
1781                 } else {
1782                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1783                         rd_new.seq_num = rd->seq_num;
1784                         sdio_claim_host(bus->sdiodev->func[1]);
1785                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1786                                                BRCMF_SDIO_FT_NORMAL)) {
1787                                 rd->len = 0;
1788                                 brcmu_pkt_buf_free_skb(pkt);
1789                         }
1790                         bus->sdcnt.rx_readahead_cnt++;
1791                         if (rd->len != roundup(rd_new.len, 16)) {
1792                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1793                                           rd->len,
1794                                           roundup(rd_new.len, 16) >> 4);
1795                                 rd->len = 0;
1796                                 brcmf_sdio_rxfail(bus, true, true);
1797                                 sdio_release_host(bus->sdiodev->func[1]);
1798                                 brcmu_pkt_buf_free_skb(pkt);
1799                                 continue;
1800                         }
1801                         sdio_release_host(bus->sdiodev->func[1]);
1802                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1803                         rd->channel = rd_new.channel;
1804                         rd->dat_offset = rd_new.dat_offset;
1805
1806                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1807                                              BRCMF_DATA_ON()) &&
1808                                            BRCMF_HDRS_ON(),
1809                                            bus->rxhdr, SDPCM_HDRLEN,
1810                                            "RxHdr:\n");
1811
1812                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1813                                 brcmf_err("readahead on control packet %d?\n",
1814                                           rd_new.seq_num);
1815                                 /* Force retry w/normal header read */
1816                                 rd->len = 0;
1817                                 sdio_claim_host(bus->sdiodev->func[1]);
1818                                 brcmf_sdio_rxfail(bus, false, true);
1819                                 sdio_release_host(bus->sdiodev->func[1]);
1820                                 brcmu_pkt_buf_free_skb(pkt);
1821                                 continue;
1822                         }
1823                 }
1824
1825                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1826                                    pkt->data, rd->len, "Rx Data:\n");
1827
1828                 /* Save superframe descriptor and allocate packet frame */
1829                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1830                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1831                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1832                                           rd->len);
1833                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1834                                                    pkt->data, rd->len,
1835                                                    "Glom Data:\n");
1836                                 __skb_trim(pkt, rd->len);
1837                                 skb_pull(pkt, SDPCM_HDRLEN);
1838                                 bus->glomd = pkt;
1839                         } else {
1840                                 brcmf_err("%s: glom superframe w/o "
1841                                           "descriptor!\n", __func__);
1842                                 sdio_claim_host(bus->sdiodev->func[1]);
1843                                 brcmf_sdio_rxfail(bus, false, false);
1844                                 sdio_release_host(bus->sdiodev->func[1]);
1845                         }
1846                         /* prepare the descriptor for the next read */
1847                         rd->len = rd->len_nxtfrm << 4;
1848                         rd->len_nxtfrm = 0;
1849                         /* treat all packet as event if we don't know */
1850                         rd->channel = SDPCM_EVENT_CHANNEL;
1851                         continue;
1852                 }
1853
1854                 /* Fill in packet len and prio, deliver upward */
1855                 __skb_trim(pkt, rd->len);
1856                 skb_pull(pkt, rd->dat_offset);
1857
1858                 /* prepare the descriptor for the next read */
1859                 rd->len = rd->len_nxtfrm << 4;
1860                 rd->len_nxtfrm = 0;
1861                 /* treat all packet as event if we don't know */
1862                 rd->channel = SDPCM_EVENT_CHANNEL;
1863
1864                 if (pkt->len == 0) {
1865                         brcmu_pkt_buf_free_skb(pkt);
1866                         continue;
1867                 }
1868
1869                 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1870         }
1871
1872         rxcount = maxframes - rxleft;
1873         /* Message if we hit the limit */
1874         if (!rxleft)
1875                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1876         else
1877                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1878         /* Back off rxseq if awaiting rtx, update rx_seq */
1879         if (bus->rxskip)
1880                 rd->seq_num--;
1881         bus->rx_seq = rd->seq_num;
1882
1883         return rxcount;
1884 }
1885
1886 static void
1887 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
1888 {
1889         if (waitqueue_active(&bus->ctrl_wait))
1890                 wake_up_interruptible(&bus->ctrl_wait);
1891         return;
1892 }
1893
1894 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
1895 {
1896         u16 head_pad;
1897         u8 *dat_buf;
1898
1899         dat_buf = (u8 *)(pkt->data);
1900
1901         /* Check head padding */
1902         head_pad = ((unsigned long)dat_buf % bus->head_align);
1903         if (head_pad) {
1904                 if (skb_headroom(pkt) < head_pad) {
1905                         bus->sdiodev->bus_if->tx_realloc++;
1906                         head_pad = 0;
1907                         if (skb_cow(pkt, head_pad))
1908                                 return -ENOMEM;
1909                 }
1910                 skb_push(pkt, head_pad);
1911                 dat_buf = (u8 *)(pkt->data);
1912                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1913         }
1914         return head_pad;
1915 }
1916
1917 /**
1918  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1919  * bus layer usage.
1920  */
1921 /* flag marking a dummy skb added for DMA alignment requirement */
1922 #define ALIGN_SKB_FLAG          0x8000
1923 /* bit mask of data length chopped from the previous packet */
1924 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1925
1926 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
1927                                     struct sk_buff_head *pktq,
1928                                     struct sk_buff *pkt, u16 total_len)
1929 {
1930         struct brcmf_sdio_dev *sdiodev;
1931         struct sk_buff *pkt_pad;
1932         u16 tail_pad, tail_chop, chain_pad;
1933         unsigned int blksize;
1934         bool lastfrm;
1935         int ntail, ret;
1936
1937         sdiodev = bus->sdiodev;
1938         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1939         /* sg entry alignment should be a divisor of block size */
1940         WARN_ON(blksize % bus->sgentry_align);
1941
1942         /* Check tail padding */
1943         lastfrm = skb_queue_is_last(pktq, pkt);
1944         tail_pad = 0;
1945         tail_chop = pkt->len % bus->sgentry_align;
1946         if (tail_chop)
1947                 tail_pad = bus->sgentry_align - tail_chop;
1948         chain_pad = (total_len + tail_pad) % blksize;
1949         if (lastfrm && chain_pad)
1950                 tail_pad += blksize - chain_pad;
1951         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
1952                 pkt_pad = bus->txglom_sgpad;
1953                 if (pkt_pad == NULL)
1954                           brcmu_pkt_buf_get_skb(tail_pad + tail_chop);
1955                 if (pkt_pad == NULL)
1956                         return -ENOMEM;
1957                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
1958                 if (unlikely(ret < 0))
1959                         return ret;
1960                 memcpy(pkt_pad->data,
1961                        pkt->data + pkt->len - tail_chop,
1962                        tail_chop);
1963                 *(u32 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
1964                 skb_trim(pkt, pkt->len - tail_chop);
1965                 __skb_queue_after(pktq, pkt, pkt_pad);
1966         } else {
1967                 ntail = pkt->data_len + tail_pad -
1968                         (pkt->end - pkt->tail);
1969                 if (skb_cloned(pkt) || ntail > 0)
1970                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
1971                                 return -ENOMEM;
1972                 if (skb_linearize(pkt))
1973                         return -ENOMEM;
1974                 __skb_put(pkt, tail_pad);
1975         }
1976
1977         return tail_pad;
1978 }
1979
1980 /**
1981  * brcmf_sdio_txpkt_prep - packet preparation for transmit
1982  * @bus: brcmf_sdio structure pointer
1983  * @pktq: packet list pointer
1984  * @chan: virtual channel to transmit the packet
1985  *
1986  * Processes to be applied to the packet
1987  *      - Align data buffer pointer
1988  *      - Align data buffer length
1989  *      - Prepare header
1990  * Return: negative value if there is error
1991  */
1992 static int
1993 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
1994                       uint chan)
1995 {
1996         u16 head_pad, total_len;
1997         struct sk_buff *pkt_next;
1998         u8 txseq;
1999         int ret;
2000         struct brcmf_sdio_hdrinfo hd_info = {0};
2001
2002         txseq = bus->tx_seq;
2003         total_len = 0;
2004         skb_queue_walk(pktq, pkt_next) {
2005                 /* alignment packet inserted in previous
2006                  * loop cycle can be skipped as it is
2007                  * already properly aligned and does not
2008                  * need an sdpcm header.
2009                  */
2010                 if (*(u32 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2011                         continue;
2012
2013                 /* align packet data pointer */
2014                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2015                 if (ret < 0)
2016                         return ret;
2017                 head_pad = (u16)ret;
2018                 if (head_pad)
2019                         memset(pkt_next->data, 0, head_pad + bus->tx_hdrlen);
2020
2021                 total_len += pkt_next->len;
2022
2023                 hd_info.len = pkt_next->len;
2024                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2025                 if (bus->txglom && pktq->qlen > 1) {
2026                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2027                                                        pkt_next, total_len);
2028                         if (ret < 0)
2029                                 return ret;
2030                         hd_info.tail_pad = (u16)ret;
2031                         total_len += (u16)ret;
2032                 }
2033
2034                 hd_info.channel = chan;
2035                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2036                 hd_info.seq_num = txseq++;
2037
2038                 /* Now fill the header */
2039                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2040
2041                 if (BRCMF_BYTES_ON() &&
2042                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2043                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2044                         brcmf_dbg_hex_dump(true, pkt_next, hd_info.len,
2045                                            "Tx Frame:\n");
2046                 else if (BRCMF_HDRS_ON())
2047                         brcmf_dbg_hex_dump(true, pkt_next,
2048                                            head_pad + bus->tx_hdrlen,
2049                                            "Tx Header:\n");
2050         }
2051         /* Hardware length tag of the first packet should be total
2052          * length of the chain (including padding)
2053          */
2054         if (bus->txglom)
2055                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2056         return 0;
2057 }
2058
2059 /**
2060  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2061  * @bus: brcmf_sdio structure pointer
2062  * @pktq: packet list pointer
2063  *
2064  * Processes to be applied to the packet
2065  *      - Remove head padding
2066  *      - Remove tail padding
2067  */
2068 static void
2069 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2070 {
2071         u8 *hdr;
2072         u32 dat_offset;
2073         u16 tail_pad;
2074         u32 dummy_flags, chop_len;
2075         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2076
2077         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2078                 dummy_flags = *(u32 *)(pkt_next->cb);
2079                 if (dummy_flags & ALIGN_SKB_FLAG) {
2080                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2081                         if (chop_len) {
2082                                 pkt_prev = pkt_next->prev;
2083                                 skb_put(pkt_prev, chop_len);
2084                         }
2085                         __skb_unlink(pkt_next, pktq);
2086                         brcmu_pkt_buf_free_skb(pkt_next);
2087                 } else {
2088                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2089                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2090                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2091                                      SDPCM_DOFFSET_SHIFT;
2092                         skb_pull(pkt_next, dat_offset);
2093                         if (bus->txglom) {
2094                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2095                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2096                         }
2097                 }
2098         }
2099 }
2100
2101 /* Writes a HW/SW header into the packet and sends it. */
2102 /* Assumes: (a) header space already there, (b) caller holds lock */
2103 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2104                             uint chan)
2105 {
2106         int ret;
2107         int i;
2108         struct sk_buff *pkt_next, *tmp;
2109
2110         brcmf_dbg(TRACE, "Enter\n");
2111
2112         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2113         if (ret)
2114                 goto done;
2115
2116         sdio_claim_host(bus->sdiodev->func[1]);
2117         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2118         bus->sdcnt.f2txdata++;
2119
2120         if (ret < 0) {
2121                 /* On failure, abort the command and terminate the frame */
2122                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2123                           ret);
2124                 bus->sdcnt.tx_sderrs++;
2125
2126                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2127                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2128                                   SFC_WF_TERM, NULL);
2129                 bus->sdcnt.f1regdata++;
2130
2131                 for (i = 0; i < 3; i++) {
2132                         u8 hi, lo;
2133                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2134                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2135                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2136                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2137                         bus->sdcnt.f1regdata += 2;
2138                         if ((hi == 0) && (lo == 0))
2139                                 break;
2140                 }
2141         }
2142         sdio_release_host(bus->sdiodev->func[1]);
2143
2144 done:
2145         brcmf_sdio_txpkt_postp(bus, pktq);
2146         if (ret == 0)
2147                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2148         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2149                 __skb_unlink(pkt_next, pktq);
2150                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2151         }
2152         return ret;
2153 }
2154
2155 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2156 {
2157         struct sk_buff *pkt;
2158         struct sk_buff_head pktq;
2159         u32 intstatus = 0;
2160         int ret = 0, prec_out, i;
2161         uint cnt = 0;
2162         u8 tx_prec_map, pkt_num;
2163
2164         brcmf_dbg(TRACE, "Enter\n");
2165
2166         tx_prec_map = ~bus->flowcontrol;
2167
2168         /* Send frames until the limit or some other event */
2169         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2170                 pkt_num = 1;
2171                 __skb_queue_head_init(&pktq);
2172                 if (bus->txglom)
2173                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2174                                         brcmf_sdio_txglomsz);
2175                 pkt_num = min_t(u32, pkt_num,
2176                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2177                 spin_lock_bh(&bus->txqlock);
2178                 for (i = 0; i < pkt_num; i++) {
2179                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2180                                               &prec_out);
2181                         if (pkt == NULL)
2182                                 break;
2183                         __skb_queue_tail(&pktq, pkt);
2184                 }
2185                 spin_unlock_bh(&bus->txqlock);
2186                 if (i == 0)
2187                         break;
2188
2189                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2190                 cnt += i;
2191
2192                 /* In poll mode, need to check for other events */
2193                 if (!bus->intr && cnt) {
2194                         /* Check device status, signal pending interrupt */
2195                         sdio_claim_host(bus->sdiodev->func[1]);
2196                         ret = r_sdreg32(bus, &intstatus,
2197                                         offsetof(struct sdpcmd_regs,
2198                                                  intstatus));
2199                         sdio_release_host(bus->sdiodev->func[1]);
2200                         bus->sdcnt.f2txdata++;
2201                         if (ret != 0)
2202                                 break;
2203                         if (intstatus & bus->hostintmask)
2204                                 atomic_set(&bus->ipend, 1);
2205                 }
2206         }
2207
2208         /* Deflow-control stack if needed */
2209         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2210             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2211                 bus->txoff = false;
2212                 brcmf_txflowblock(bus->sdiodev->dev, false);
2213         }
2214
2215         return cnt;
2216 }
2217
2218 static void brcmf_sdio_bus_stop(struct device *dev)
2219 {
2220         u32 local_hostintmask;
2221         u8 saveclk;
2222         int err;
2223         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2224         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2225         struct brcmf_sdio *bus = sdiodev->bus;
2226
2227         brcmf_dbg(TRACE, "Enter\n");
2228
2229         if (bus->watchdog_tsk) {
2230                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2231                 kthread_stop(bus->watchdog_tsk);
2232                 bus->watchdog_tsk = NULL;
2233         }
2234
2235         sdio_claim_host(bus->sdiodev->func[1]);
2236
2237         /* Enable clock for device interrupts */
2238         brcmf_sdio_bus_sleep(bus, false, false);
2239
2240         /* Disable and clear interrupts at the chip level also */
2241         w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2242         local_hostintmask = bus->hostintmask;
2243         bus->hostintmask = 0;
2244
2245         /* Change our idea of bus state */
2246         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2247
2248         /* Force clocks on backplane to be sure F2 interrupt propagates */
2249         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
2250                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
2251         if (!err) {
2252                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2253                                   (saveclk | SBSDIO_FORCE_HT), &err);
2254         }
2255         if (err)
2256                 brcmf_err("Failed to force clock for F2: err %d\n", err);
2257
2258         /* Turn off the bus (F2), free any pending packets */
2259         brcmf_dbg(INTR, "disable SDIO interrupts\n");
2260         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
2261
2262         /* Clear any pending interrupts now that F2 is disabled */
2263         w_sdreg32(bus, local_hostintmask,
2264                   offsetof(struct sdpcmd_regs, intstatus));
2265
2266         sdio_release_host(bus->sdiodev->func[1]);
2267
2268         /* Clear the data packet queues */
2269         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2270
2271         /* Clear any held glomming stuff */
2272         if (bus->glomd)
2273                 brcmu_pkt_buf_free_skb(bus->glomd);
2274         brcmf_sdio_free_glom(bus);
2275
2276         /* Clear rx control and wake any waiters */
2277         spin_lock_bh(&bus->rxctl_lock);
2278         bus->rxlen = 0;
2279         spin_unlock_bh(&bus->rxctl_lock);
2280         brcmf_sdio_dcmd_resp_wake(bus);
2281
2282         /* Reset some F2 state stuff */
2283         bus->rxskip = false;
2284         bus->tx_seq = bus->rx_seq = 0;
2285 }
2286
2287 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2288 {
2289         unsigned long flags;
2290
2291         if (bus->sdiodev->oob_irq_requested) {
2292                 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2293                 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2294                         enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2295                         bus->sdiodev->irq_en = true;
2296                 }
2297                 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2298         }
2299 }
2300
2301 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2302 {
2303         u8 idx;
2304         u32 addr;
2305         unsigned long val;
2306         int n, ret;
2307
2308         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2309         addr = bus->ci->c_inf[idx].base +
2310                offsetof(struct sdpcmd_regs, intstatus);
2311
2312         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2313         bus->sdcnt.f1regdata++;
2314         if (ret != 0)
2315                 val = 0;
2316
2317         val &= bus->hostintmask;
2318         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2319
2320         /* Clear interrupts */
2321         if (val) {
2322                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2323                 bus->sdcnt.f1regdata++;
2324         }
2325
2326         if (ret) {
2327                 atomic_set(&bus->intstatus, 0);
2328         } else if (val) {
2329                 for_each_set_bit(n, &val, 32)
2330                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2331         }
2332
2333         return ret;
2334 }
2335
2336 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2337 {
2338         u32 newstatus = 0;
2339         unsigned long intstatus;
2340         uint rxlimit = bus->rxbound;    /* Rx frames to read before resched */
2341         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2342         uint framecnt = 0;      /* Temporary counter of tx/rx frames */
2343         int err = 0, n;
2344
2345         brcmf_dbg(TRACE, "Enter\n");
2346
2347         sdio_claim_host(bus->sdiodev->func[1]);
2348
2349         /* If waiting for HTAVAIL, check status */
2350         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2351                 u8 clkctl, devctl = 0;
2352
2353 #ifdef DEBUG
2354                 /* Check for inconsistent device control */
2355                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2356                                            SBSDIO_DEVICE_CTL, &err);
2357                 if (err) {
2358                         brcmf_err("error reading DEVCTL: %d\n", err);
2359                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2360                 }
2361 #endif                          /* DEBUG */
2362
2363                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2364                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2365                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2366                 if (err) {
2367                         brcmf_err("error reading CSR: %d\n",
2368                                   err);
2369                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2370                 }
2371
2372                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2373                           devctl, clkctl);
2374
2375                 if (SBSDIO_HTAV(clkctl)) {
2376                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2377                                                    SBSDIO_DEVICE_CTL, &err);
2378                         if (err) {
2379                                 brcmf_err("error reading DEVCTL: %d\n",
2380                                           err);
2381                                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2382                         }
2383                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2384                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2385                                           devctl, &err);
2386                         if (err) {
2387                                 brcmf_err("error writing DEVCTL: %d\n",
2388                                           err);
2389                                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2390                         }
2391                         bus->clkstate = CLK_AVAIL;
2392                 }
2393         }
2394
2395         /* Make sure backplane clock is on */
2396         brcmf_sdio_bus_sleep(bus, false, true);
2397
2398         /* Pending interrupt indicates new device status */
2399         if (atomic_read(&bus->ipend) > 0) {
2400                 atomic_set(&bus->ipend, 0);
2401                 err = brcmf_sdio_intr_rstatus(bus);
2402         }
2403
2404         /* Start with leftover status bits */
2405         intstatus = atomic_xchg(&bus->intstatus, 0);
2406
2407         /* Handle flow-control change: read new state in case our ack
2408          * crossed another change interrupt.  If change still set, assume
2409          * FC ON for safety, let next loop through do the debounce.
2410          */
2411         if (intstatus & I_HMB_FC_CHANGE) {
2412                 intstatus &= ~I_HMB_FC_CHANGE;
2413                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2414                                 offsetof(struct sdpcmd_regs, intstatus));
2415
2416                 err = r_sdreg32(bus, &newstatus,
2417                                 offsetof(struct sdpcmd_regs, intstatus));
2418                 bus->sdcnt.f1regdata += 2;
2419                 atomic_set(&bus->fcstate,
2420                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2421                 intstatus |= (newstatus & bus->hostintmask);
2422         }
2423
2424         /* Handle host mailbox indication */
2425         if (intstatus & I_HMB_HOST_INT) {
2426                 intstatus &= ~I_HMB_HOST_INT;
2427                 intstatus |= brcmf_sdio_hostmail(bus);
2428         }
2429
2430         sdio_release_host(bus->sdiodev->func[1]);
2431
2432         /* Generally don't ask for these, can get CRC errors... */
2433         if (intstatus & I_WR_OOSYNC) {
2434                 brcmf_err("Dongle reports WR_OOSYNC\n");
2435                 intstatus &= ~I_WR_OOSYNC;
2436         }
2437
2438         if (intstatus & I_RD_OOSYNC) {
2439                 brcmf_err("Dongle reports RD_OOSYNC\n");
2440                 intstatus &= ~I_RD_OOSYNC;
2441         }
2442
2443         if (intstatus & I_SBINT) {
2444                 brcmf_err("Dongle reports SBINT\n");
2445                 intstatus &= ~I_SBINT;
2446         }
2447
2448         /* Would be active due to wake-wlan in gSPI */
2449         if (intstatus & I_CHIPACTIVE) {
2450                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2451                 intstatus &= ~I_CHIPACTIVE;
2452         }
2453
2454         /* Ignore frame indications if rxskip is set */
2455         if (bus->rxskip)
2456                 intstatus &= ~I_HMB_FRAME_IND;
2457
2458         /* On frame indication, read available frames */
2459         if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2460                 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2461                 if (!bus->rxpending)
2462                         intstatus &= ~I_HMB_FRAME_IND;
2463                 rxlimit -= min(framecnt, rxlimit);
2464         }
2465
2466         /* Keep still-pending events for next scheduling */
2467         if (intstatus) {
2468                 for_each_set_bit(n, &intstatus, 32)
2469                         set_bit(n, (unsigned long *)&bus->intstatus.counter);
2470         }
2471
2472         brcmf_sdio_clrintr(bus);
2473
2474         if (data_ok(bus) && bus->ctrl_frame_stat &&
2475                 (bus->clkstate == CLK_AVAIL)) {
2476                 int i;
2477
2478                 sdio_claim_host(bus->sdiodev->func[1]);
2479                 err = brcmf_sdiod_send_buf(bus->sdiodev, bus->ctrl_frame_buf,
2480                                            (u32)bus->ctrl_frame_len);
2481
2482                 if (err < 0) {
2483                         /* On failure, abort the command and
2484                                 terminate the frame */
2485                         brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2486                                   err);
2487                         bus->sdcnt.tx_sderrs++;
2488
2489                         brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2490
2491                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2492                                           SFC_WF_TERM, &err);
2493                         bus->sdcnt.f1regdata++;
2494
2495                         for (i = 0; i < 3; i++) {
2496                                 u8 hi, lo;
2497                                 hi = brcmf_sdiod_regrb(bus->sdiodev,
2498                                                        SBSDIO_FUNC1_WFRAMEBCHI,
2499                                                        &err);
2500                                 lo = brcmf_sdiod_regrb(bus->sdiodev,
2501                                                        SBSDIO_FUNC1_WFRAMEBCLO,
2502                                                        &err);
2503                                 bus->sdcnt.f1regdata += 2;
2504                                 if ((hi == 0) && (lo == 0))
2505                                         break;
2506                         }
2507
2508                 } else {
2509                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2510                 }
2511                 sdio_release_host(bus->sdiodev->func[1]);
2512                 bus->ctrl_frame_stat = false;
2513                 brcmf_sdio_wait_event_wakeup(bus);
2514         }
2515         /* Send queued frames (limit 1 if rx may still be pending) */
2516         else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2517                  brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2518                  && data_ok(bus)) {
2519                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2520                                             txlimit;
2521                 framecnt = brcmf_sdio_sendfromq(bus, framecnt);
2522                 txlimit -= framecnt;
2523         }
2524
2525         if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2526                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2527                 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2528                 atomic_set(&bus->intstatus, 0);
2529         } else if (atomic_read(&bus->intstatus) ||
2530                    atomic_read(&bus->ipend) > 0 ||
2531                    (!atomic_read(&bus->fcstate) &&
2532                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2533                     data_ok(bus)) || PKT_AVAILABLE()) {
2534                 atomic_inc(&bus->dpc_tskcnt);
2535         }
2536
2537         /* If we're done for now, turn off clock request. */
2538         if ((bus->clkstate != CLK_PENDING)
2539             && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2540                 bus->activity = false;
2541                 brcmf_dbg(SDIO, "idle state\n");
2542                 sdio_claim_host(bus->sdiodev->func[1]);
2543                 brcmf_sdio_bus_sleep(bus, true, false);
2544                 sdio_release_host(bus->sdiodev->func[1]);
2545         }
2546 }
2547
2548 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2549 {
2550         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2551         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2552         struct brcmf_sdio *bus = sdiodev->bus;
2553
2554         return &bus->txq;
2555 }
2556
2557 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2558 {
2559         int ret = -EBADE;
2560         uint datalen, prec;
2561         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2562         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2563         struct brcmf_sdio *bus = sdiodev->bus;
2564         ulong flags;
2565
2566         brcmf_dbg(TRACE, "Enter\n");
2567
2568         datalen = pkt->len;
2569
2570         /* Add space for the header */
2571         skb_push(pkt, bus->tx_hdrlen);
2572         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2573
2574         prec = prio2prec((pkt->priority & PRIOMASK));
2575
2576         /* Check for existing queue, current flow-control,
2577                          pending event, or pending clock */
2578         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2579         bus->sdcnt.fcqueued++;
2580
2581         /* Priority based enq */
2582         spin_lock_irqsave(&bus->txqlock, flags);
2583         if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2584                 skb_pull(pkt, bus->tx_hdrlen);
2585                 brcmf_err("out of bus->txq !!!\n");
2586                 ret = -ENOSR;
2587         } else {
2588                 ret = 0;
2589         }
2590
2591         if (pktq_len(&bus->txq) >= TXHI) {
2592                 bus->txoff = true;
2593                 brcmf_txflowblock(bus->sdiodev->dev, true);
2594         }
2595         spin_unlock_irqrestore(&bus->txqlock, flags);
2596
2597 #ifdef DEBUG
2598         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2599                 qcount[prec] = pktq_plen(&bus->txq, prec);
2600 #endif
2601
2602         if (atomic_read(&bus->dpc_tskcnt) == 0) {
2603                 atomic_inc(&bus->dpc_tskcnt);
2604                 queue_work(bus->brcmf_wq, &bus->datawork);
2605         }
2606
2607         return ret;
2608 }
2609
2610 #ifdef DEBUG
2611 #define CONSOLE_LINE_MAX        192
2612
2613 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2614 {
2615         struct brcmf_console *c = &bus->console;
2616         u8 line[CONSOLE_LINE_MAX], ch;
2617         u32 n, idx, addr;
2618         int rv;
2619
2620         /* Don't do anything until FWREADY updates console address */
2621         if (bus->console_addr == 0)
2622                 return 0;
2623
2624         /* Read console log struct */
2625         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2626         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2627                                sizeof(c->log_le));
2628         if (rv < 0)
2629                 return rv;
2630
2631         /* Allocate console buffer (one time only) */
2632         if (c->buf == NULL) {
2633                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2634                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2635                 if (c->buf == NULL)
2636                         return -ENOMEM;
2637         }
2638
2639         idx = le32_to_cpu(c->log_le.idx);
2640
2641         /* Protect against corrupt value */
2642         if (idx > c->bufsize)
2643                 return -EBADE;
2644
2645         /* Skip reading the console buffer if the index pointer
2646          has not moved */
2647         if (idx == c->last)
2648                 return 0;
2649
2650         /* Read the console buffer */
2651         addr = le32_to_cpu(c->log_le.buf);
2652         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2653         if (rv < 0)
2654                 return rv;
2655
2656         while (c->last != idx) {
2657                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2658                         if (c->last == idx) {
2659                                 /* This would output a partial line.
2660                                  * Instead, back up
2661                                  * the buffer pointer and output this
2662                                  * line next time around.
2663                                  */
2664                                 if (c->last >= n)
2665                                         c->last -= n;
2666                                 else
2667                                         c->last = c->bufsize - n;
2668                                 goto break2;
2669                         }
2670                         ch = c->buf[c->last];
2671                         c->last = (c->last + 1) % c->bufsize;
2672                         if (ch == '\n')
2673                                 break;
2674                         line[n] = ch;
2675                 }
2676
2677                 if (n > 0) {
2678                         if (line[n - 1] == '\r')
2679                                 n--;
2680                         line[n] = 0;
2681                         pr_debug("CONSOLE: %s\n", line);
2682                 }
2683         }
2684 break2:
2685
2686         return 0;
2687 }
2688 #endif                          /* DEBUG */
2689
2690 static int brcmf_sdio_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2691 {
2692         int i;
2693         int ret;
2694
2695         bus->ctrl_frame_stat = false;
2696         ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2697
2698         if (ret < 0) {
2699                 /* On failure, abort the command and terminate the frame */
2700                 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2701                           ret);
2702                 bus->sdcnt.tx_sderrs++;
2703
2704                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
2705
2706                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2707                                   SFC_WF_TERM, NULL);
2708                 bus->sdcnt.f1regdata++;
2709
2710                 for (i = 0; i < 3; i++) {
2711                         u8 hi, lo;
2712                         hi = brcmf_sdiod_regrb(bus->sdiodev,
2713                                                SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2714                         lo = brcmf_sdiod_regrb(bus->sdiodev,
2715                                                SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2716                         bus->sdcnt.f1regdata += 2;
2717                         if (hi == 0 && lo == 0)
2718                                 break;
2719                 }
2720                 return ret;
2721         }
2722
2723         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2724
2725         return ret;
2726 }
2727
2728 static int
2729 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2730 {
2731         u8 *frame;
2732         u16 len, pad;
2733         uint retries = 0;
2734         u8 doff = 0;
2735         int ret = -1;
2736         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2737         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2738         struct brcmf_sdio *bus = sdiodev->bus;
2739         struct brcmf_sdio_hdrinfo hd_info = {0};
2740
2741         brcmf_dbg(TRACE, "Enter\n");
2742
2743         /* Back the pointer to make a room for bus header */
2744         frame = msg - bus->tx_hdrlen;
2745         len = (msglen += bus->tx_hdrlen);
2746
2747         /* Add alignment padding (optional for ctl frames) */
2748         doff = ((unsigned long)frame % bus->head_align);
2749         if (doff) {
2750                 frame -= doff;
2751                 len += doff;
2752                 msglen += doff;
2753                 memset(frame, 0, doff + bus->tx_hdrlen);
2754         }
2755         /* precondition: doff < bus->head_align */
2756         doff += bus->tx_hdrlen;
2757
2758         /* Round send length to next SDIO block */
2759         pad = 0;
2760         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2761                 pad = bus->blocksize - (len % bus->blocksize);
2762                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2763                         pad = 0;
2764         } else if (len % bus->head_align) {
2765                 pad = bus->head_align - (len % bus->head_align);
2766         }
2767         len += pad;
2768
2769         /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2770
2771         /* Make sure backplane clock is on */
2772         sdio_claim_host(bus->sdiodev->func[1]);
2773         brcmf_sdio_bus_sleep(bus, false, false);
2774         sdio_release_host(bus->sdiodev->func[1]);
2775
2776         hd_info.len = (u16)msglen;
2777         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2778         hd_info.dat_offset = doff;
2779         hd_info.seq_num = bus->tx_seq;
2780         hd_info.lastfrm = true;
2781         hd_info.tail_pad = pad;
2782         brcmf_sdio_hdpack(bus, frame, &hd_info);
2783
2784         if (bus->txglom)
2785                 brcmf_sdio_update_hwhdr(frame, len);
2786
2787         if (!data_ok(bus)) {
2788                 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2789                           bus->tx_max, bus->tx_seq);
2790                 bus->ctrl_frame_stat = true;
2791                 /* Send from dpc */
2792                 bus->ctrl_frame_buf = frame;
2793                 bus->ctrl_frame_len = len;
2794
2795                 wait_event_interruptible_timeout(bus->ctrl_wait,
2796                                                  !bus->ctrl_frame_stat,
2797                                                  msecs_to_jiffies(2000));
2798
2799                 if (!bus->ctrl_frame_stat) {
2800                         brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2801                         ret = 0;
2802                 } else {
2803                         brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2804                         ret = -1;
2805                 }
2806         }
2807
2808         if (ret == -1) {
2809                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2810                                    frame, len, "Tx Frame:\n");
2811                 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2812                                    BRCMF_HDRS_ON(),
2813                                    frame, min_t(u16, len, 16), "TxHdr:\n");
2814
2815                 do {
2816                         sdio_claim_host(bus->sdiodev->func[1]);
2817                         ret = brcmf_sdio_tx_frame(bus, frame, len);
2818                         sdio_release_host(bus->sdiodev->func[1]);
2819                 } while (ret < 0 && retries++ < TXRETRIES);
2820         }
2821
2822         if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2823             atomic_read(&bus->dpc_tskcnt) == 0) {
2824                 bus->activity = false;
2825                 sdio_claim_host(bus->sdiodev->func[1]);
2826                 brcmf_dbg(INFO, "idle\n");
2827                 brcmf_sdio_clkctl(bus, CLK_NONE, true);
2828                 sdio_release_host(bus->sdiodev->func[1]);
2829         }
2830
2831         if (ret)
2832                 bus->sdcnt.tx_ctlerrs++;
2833         else
2834                 bus->sdcnt.tx_ctlpkts++;
2835
2836         return ret ? -EIO : 0;
2837 }
2838
2839 #ifdef DEBUG
2840 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2841 {
2842         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2843 }
2844
2845 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2846                                  struct sdpcm_shared *sh)
2847 {
2848         u32 addr;
2849         int rv;
2850         u32 shaddr = 0;
2851         struct sdpcm_shared_le sh_le;
2852         __le32 addr_le;
2853
2854         shaddr = bus->ci->rambase + bus->ramsize - 4;
2855
2856         /*
2857          * Read last word in socram to determine
2858          * address of sdpcm_shared structure
2859          */
2860         sdio_claim_host(bus->sdiodev->func[1]);
2861         brcmf_sdio_bus_sleep(bus, false, false);
2862         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2863         sdio_release_host(bus->sdiodev->func[1]);
2864         if (rv < 0)
2865                 return rv;
2866
2867         addr = le32_to_cpu(addr_le);
2868
2869         brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2870
2871         /*
2872          * Check if addr is valid.
2873          * NVRAM length at the end of memory should have been overwritten.
2874          */
2875         if (!brcmf_sdio_valid_shared_address(addr)) {
2876                         brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2877                                   addr);
2878                         return -EINVAL;
2879         }
2880
2881         /* Read hndrte_shared structure */
2882         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2883                                sizeof(struct sdpcm_shared_le));
2884         if (rv < 0)
2885                 return rv;
2886
2887         /* Endianness */
2888         sh->flags = le32_to_cpu(sh_le.flags);
2889         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2890         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2891         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2892         sh->assert_line = le32_to_cpu(sh_le.assert_line);
2893         sh->console_addr = le32_to_cpu(sh_le.console_addr);
2894         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2895
2896         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2897                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2898                           SDPCM_SHARED_VERSION,
2899                           sh->flags & SDPCM_SHARED_VERSION_MASK);
2900                 return -EPROTO;
2901         }
2902
2903         return 0;
2904 }
2905
2906 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2907                                    struct sdpcm_shared *sh, char __user *data,
2908                                    size_t count)
2909 {
2910         u32 addr, console_ptr, console_size, console_index;
2911         char *conbuf = NULL;
2912         __le32 sh_val;
2913         int rv;
2914         loff_t pos = 0;
2915         int nbytes = 0;
2916
2917         /* obtain console information from device memory */
2918         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2919         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2920                                (u8 *)&sh_val, sizeof(u32));
2921         if (rv < 0)
2922                 return rv;
2923         console_ptr = le32_to_cpu(sh_val);
2924
2925         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2926         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2927                                (u8 *)&sh_val, sizeof(u32));
2928         if (rv < 0)
2929                 return rv;
2930         console_size = le32_to_cpu(sh_val);
2931
2932         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2933         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2934                                (u8 *)&sh_val, sizeof(u32));
2935         if (rv < 0)
2936                 return rv;
2937         console_index = le32_to_cpu(sh_val);
2938
2939         /* allocate buffer for console data */
2940         if (console_size <= CONSOLE_BUFFER_MAX)
2941                 conbuf = vzalloc(console_size+1);
2942
2943         if (!conbuf)
2944                 return -ENOMEM;
2945
2946         /* obtain the console data from device */
2947         conbuf[console_size] = '\0';
2948         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2949                                console_size);
2950         if (rv < 0)
2951                 goto done;
2952
2953         rv = simple_read_from_buffer(data, count, &pos,
2954                                      conbuf + console_index,
2955                                      console_size - console_index);
2956         if (rv < 0)
2957                 goto done;
2958
2959         nbytes = rv;
2960         if (console_index > 0) {
2961                 pos = 0;
2962                 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2963                                              conbuf, console_index - 1);
2964                 if (rv < 0)
2965                         goto done;
2966                 rv += nbytes;
2967         }
2968 done:
2969         vfree(conbuf);
2970         return rv;
2971 }
2972
2973 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2974                                 char __user *data, size_t count)
2975 {
2976         int error, res;
2977         char buf[350];
2978         struct brcmf_trap_info tr;
2979         loff_t pos = 0;
2980
2981         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2982                 brcmf_dbg(INFO, "no trap in firmware\n");
2983                 return 0;
2984         }
2985
2986         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2987                                   sizeof(struct brcmf_trap_info));
2988         if (error < 0)
2989                 return error;
2990
2991         res = scnprintf(buf, sizeof(buf),
2992                         "dongle trap info: type 0x%x @ epc 0x%08x\n"
2993                         "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2994                         "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2995                         "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2996                         "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2997                         le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2998                         le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2999                         le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3000                         le32_to_cpu(tr.pc), sh->trap_addr,
3001                         le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3002                         le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3003                         le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3004                         le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3005
3006         return simple_read_from_buffer(data, count, &pos, buf, res);
3007 }
3008
3009 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3010                                   struct sdpcm_shared *sh, char __user *data,
3011                                   size_t count)
3012 {
3013         int error = 0;
3014         char buf[200];
3015         char file[80] = "?";
3016         char expr[80] = "<???>";
3017         int res;
3018         loff_t pos = 0;
3019
3020         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3021                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3022                 return 0;
3023         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3024                 brcmf_dbg(INFO, "no assert in dongle\n");
3025                 return 0;
3026         }
3027
3028         sdio_claim_host(bus->sdiodev->func[1]);
3029         if (sh->assert_file_addr != 0) {
3030                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3031                                           sh->assert_file_addr, (u8 *)file, 80);
3032                 if (error < 0)
3033                         return error;
3034         }
3035         if (sh->assert_exp_addr != 0) {
3036                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3037                                           sh->assert_exp_addr, (u8 *)expr, 80);
3038                 if (error < 0)
3039                         return error;
3040         }
3041         sdio_release_host(bus->sdiodev->func[1]);
3042
3043         res = scnprintf(buf, sizeof(buf),
3044                         "dongle assert: %s:%d: assert(%s)\n",
3045                         file, sh->assert_line, expr);
3046         return simple_read_from_buffer(data, count, &pos, buf, res);
3047 }
3048
3049 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3050 {
3051         int error;
3052         struct sdpcm_shared sh;
3053
3054         error = brcmf_sdio_readshared(bus, &sh);
3055
3056         if (error < 0)
3057                 return error;
3058
3059         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3060                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3061         else if (sh.flags & SDPCM_SHARED_ASSERT)
3062                 brcmf_err("assertion in dongle\n");
3063
3064         if (sh.flags & SDPCM_SHARED_TRAP)
3065                 brcmf_err("firmware trap in dongle\n");
3066
3067         return 0;
3068 }
3069
3070 static int brcmf_sdio_died_dump(struct brcmf_sdio *bus, char __user *data,
3071                                 size_t count, loff_t *ppos)
3072 {
3073         int error = 0;
3074         struct sdpcm_shared sh;
3075         int nbytes = 0;
3076         loff_t pos = *ppos;
3077
3078         if (pos != 0)
3079                 return 0;
3080
3081         error = brcmf_sdio_readshared(bus, &sh);
3082         if (error < 0)
3083                 goto done;
3084
3085         error = brcmf_sdio_assert_info(bus, &sh, data, count);
3086         if (error < 0)
3087                 goto done;
3088         nbytes = error;
3089
3090         error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3091         if (error < 0)
3092                 goto done;
3093         nbytes += error;
3094
3095         error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3096         if (error < 0)
3097                 goto done;
3098         nbytes += error;
3099
3100         error = nbytes;
3101         *ppos += nbytes;
3102 done:
3103         return error;
3104 }
3105
3106 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3107                                         size_t count, loff_t *ppos)
3108 {
3109         struct brcmf_sdio *bus = f->private_data;
3110         int res;
3111
3112         res = brcmf_sdio_died_dump(bus, data, count, ppos);
3113         if (res > 0)
3114                 *ppos += res;
3115         return (ssize_t)res;
3116 }
3117
3118 static const struct file_operations brcmf_sdio_forensic_ops = {
3119         .owner = THIS_MODULE,
3120         .open = simple_open,
3121         .read = brcmf_sdio_forensic_read
3122 };
3123
3124 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3125 {
3126         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3127         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3128
3129         if (IS_ERR_OR_NULL(dentry))
3130                 return;
3131
3132         debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3133                             &brcmf_sdio_forensic_ops);
3134         brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3135 }
3136 #else
3137 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3138 {
3139         return 0;
3140 }
3141
3142 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3143 {
3144 }
3145 #endif /* DEBUG */
3146
3147 static int
3148 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3149 {
3150         int timeleft;
3151         uint rxlen = 0;
3152         bool pending;
3153         u8 *buf;
3154         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3155         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3156         struct brcmf_sdio *bus = sdiodev->bus;
3157
3158         brcmf_dbg(TRACE, "Enter\n");
3159
3160         /* Wait until control frame is available */
3161         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3162
3163         spin_lock_bh(&bus->rxctl_lock);
3164         rxlen = bus->rxlen;
3165         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3166         bus->rxctl = NULL;
3167         buf = bus->rxctl_orig;
3168         bus->rxctl_orig = NULL;
3169         bus->rxlen = 0;
3170         spin_unlock_bh(&bus->rxctl_lock);
3171         vfree(buf);
3172
3173         if (rxlen) {
3174                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3175                           rxlen, msglen);
3176         } else if (timeleft == 0) {
3177                 brcmf_err("resumed on timeout\n");
3178                 brcmf_sdio_checkdied(bus);
3179         } else if (pending) {
3180                 brcmf_dbg(CTL, "cancelled\n");
3181                 return -ERESTARTSYS;
3182         } else {
3183                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3184                 brcmf_sdio_checkdied(bus);
3185         }
3186
3187         if (rxlen)
3188                 bus->sdcnt.rx_ctlpkts++;
3189         else
3190                 bus->sdcnt.rx_ctlerrs++;
3191
3192         return rxlen ? (int)rxlen : -ETIMEDOUT;
3193 }
3194
3195 static bool brcmf_sdio_download_state(struct brcmf_sdio *bus, bool enter)
3196 {
3197         struct chip_info *ci = bus->ci;
3198
3199         /* To enter download state, disable ARM and reset SOCRAM.
3200          * To exit download state, simply reset ARM (default is RAM boot).
3201          */
3202         if (enter) {
3203                 bus->alp_only = true;
3204
3205                 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
3206         } else {
3207                 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci))
3208                         return false;
3209
3210                 /* Allow HT Clock now that the ARM is running. */
3211                 bus->alp_only = false;
3212
3213                 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3214         }
3215
3216         return true;
3217 }
3218
3219 #ifdef DEBUG
3220 static bool
3221 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3222                         u8 *ram_data, uint ram_sz)
3223 {
3224         char *ram_cmp;
3225         int err;
3226         bool ret = true;
3227         int address;
3228         int offset;
3229         int len;
3230
3231         /* read back and verify */
3232         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3233                   ram_sz);
3234         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3235         /* do not proceed while no memory but  */
3236         if (!ram_cmp)
3237                 return true;
3238
3239         address = ram_addr;
3240         offset = 0;
3241         while (offset < ram_sz) {
3242                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3243                       ram_sz - offset;
3244                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3245                 if (err) {
3246                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3247                                   err, len, address);
3248                         ret = false;
3249                         break;
3250                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3251                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3252                                   offset, len);
3253                         ret = false;
3254                         break;
3255                 }
3256                 offset += len;
3257                 address += len;
3258         }
3259
3260         kfree(ram_cmp);
3261
3262         return ret;
3263 }
3264 #else   /* DEBUG */
3265 static bool
3266 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3267                         u8 *ram_data, uint ram_sz)
3268 {
3269         return true;
3270 }
3271 #endif  /* DEBUG */
3272
3273 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus)
3274 {
3275         const struct firmware *fw;
3276         int err;
3277         int offset;
3278         int address;
3279         int len;
3280
3281         brcmf_dbg(TRACE, "Enter\n");
3282
3283         fw = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_BIN);
3284         if (fw == NULL)
3285                 return -ENOENT;
3286
3287         if (brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4) !=
3288             BRCMF_MAX_CORENUM)
3289                 memcpy(&bus->ci->rst_vec, fw->data, sizeof(bus->ci->rst_vec));
3290
3291         err = 0;
3292         offset = 0;
3293         address = bus->ci->rambase;
3294         while (offset < fw->size) {
3295                 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3296                       fw->size - offset;
3297                 err = brcmf_sdiod_ramrw(bus->sdiodev, true, address,
3298                                         (u8 *)&fw->data[offset], len);
3299                 if (err) {
3300                         brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3301                                   err, len, address);
3302                         goto failure;
3303                 }
3304                 offset += len;
3305                 address += len;
3306         }
3307         if (!err)
3308                 if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3309                                              (u8 *)fw->data, fw->size))
3310                         err = -EIO;
3311
3312 failure:
3313         release_firmware(fw);
3314
3315         return err;
3316 }
3317
3318 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus)
3319 {
3320         const struct firmware *nv;
3321         void *vars;
3322         u32 varsz;
3323         int address;
3324         int err;
3325
3326         brcmf_dbg(TRACE, "Enter\n");
3327
3328         nv = brcmf_sdio_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3329         if (nv == NULL)
3330                 return -ENOENT;
3331
3332         vars = brcmf_nvram_strip(nv, &varsz);
3333         release_firmware(nv);
3334
3335         if (vars == NULL)
3336                 return -EINVAL;
3337
3338         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3339         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3340         if (err)
3341                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3342                           err, varsz, address);
3343         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3344                 err = -EIO;
3345
3346         brcmf_nvram_free(vars);
3347
3348         return err;
3349 }
3350
3351 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus)
3352 {
3353         int bcmerror = -EFAULT;
3354
3355
3356         sdio_claim_host(bus->sdiodev->func[1]);
3357         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3358
3359         /* Keep arm in reset */
3360         if (!brcmf_sdio_download_state(bus, true)) {
3361                 brcmf_err("error placing ARM core in reset\n");
3362                 goto err;
3363         }
3364
3365         if (brcmf_sdio_download_code_file(bus)) {
3366                 brcmf_err("dongle image file download failed\n");
3367                 goto err;
3368         }
3369
3370         if (brcmf_sdio_download_nvram(bus)) {
3371                 brcmf_err("dongle nvram file download failed\n");
3372                 goto err;
3373         }
3374
3375         /* Take arm out of reset */
3376         if (!brcmf_sdio_download_state(bus, false)) {
3377                 brcmf_err("error getting out of ARM core reset\n");
3378                 goto err;
3379         }
3380
3381         bcmerror = 0;
3382
3383 err:
3384         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3385         sdio_release_host(bus->sdiodev->func[1]);
3386         return bcmerror;
3387 }
3388
3389 static bool brcmf_sdio_sr_capable(struct brcmf_sdio *bus)
3390 {
3391         u32 addr, reg, pmu_cc3_mask = ~0;
3392         int err;
3393
3394         brcmf_dbg(TRACE, "Enter\n");
3395
3396         /* old chips with PMU version less than 17 don't support save restore */
3397         if (bus->ci->pmurev < 17)
3398                 return false;
3399
3400         switch (bus->ci->chip) {
3401         case BCM43241_CHIP_ID:
3402         case BCM4335_CHIP_ID:
3403         case BCM4339_CHIP_ID:
3404                 /* read PMU chipcontrol register 3 */
3405                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3406                 brcmf_sdiod_regwl(bus->sdiodev, addr, 3, NULL);
3407                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3408                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3409                 return (reg & pmu_cc3_mask) != 0;
3410         default:
3411                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, pmucapabilities_ext);
3412                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, &err);
3413                 if ((reg & PCAPEXT_SR_SUPPORTED_MASK) == 0)
3414                         return false;
3415
3416                 addr = CORE_CC_REG(bus->ci->c_inf[0].base, retention_ctl);
3417                 reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL);
3418                 return (reg & (PMU_RCTL_MACPHY_DISABLE_MASK |
3419                                PMU_RCTL_LOGIC_DISABLE_MASK)) == 0;
3420         }
3421 }
3422
3423 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3424 {
3425         int err = 0;
3426         u8 val;
3427
3428         brcmf_dbg(TRACE, "Enter\n");
3429
3430         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3431         if (err) {
3432                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3433                 return;
3434         }
3435
3436         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3437         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3438         if (err) {
3439                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3440                 return;
3441         }
3442
3443         /* Add CMD14 Support */
3444         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3445                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3446                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3447                           &err);
3448         if (err) {
3449                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3450                 return;
3451         }
3452
3453         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3454                           SBSDIO_FORCE_HT, &err);
3455         if (err) {
3456                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3457                 return;
3458         }
3459
3460         /* set flag */
3461         bus->sr_enabled = true;
3462         brcmf_dbg(INFO, "SR enabled\n");
3463 }
3464
3465 /* enable KSO bit */
3466 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3467 {
3468         u8 val;
3469         int err = 0;
3470
3471         brcmf_dbg(TRACE, "Enter\n");
3472
3473         /* KSO bit added in SDIO core rev 12 */
3474         if (bus->ci->c_inf[1].rev < 12)
3475                 return 0;
3476
3477         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3478         if (err) {
3479                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3480                 return err;
3481         }
3482
3483         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3484                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3485                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3486                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3487                                   val, &err);
3488                 if (err) {
3489                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3490                         return err;
3491                 }
3492         }
3493
3494         return 0;
3495 }
3496
3497
3498 static int brcmf_sdio_bus_preinit(struct device *dev)
3499 {
3500         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3501         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3502         struct brcmf_sdio *bus = sdiodev->bus;
3503         uint pad_size;
3504         u32 value;
3505         u8 idx;
3506         int err;
3507
3508         /* the commands below use the terms tx and rx from
3509          * a device perspective, ie. bus:txglom affects the
3510          * bus transfers from device to host.
3511          */
3512         idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3513         if (bus->ci->c_inf[idx].rev < 12) {
3514                 /* for sdio core rev < 12, disable txgloming */
3515                 value = 0;
3516                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3517                                            sizeof(u32));
3518         } else {
3519                 /* otherwise, set txglomalign */
3520                 value = 4;
3521                 if (sdiodev->pdata)
3522                         value = sdiodev->pdata->sd_sgentry_align;
3523                 /* SDIO ADMA requires at least 32 bit alignment */
3524                 value = max_t(u32, value, 4);
3525                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3526                                            sizeof(u32));
3527         }
3528
3529         if (err < 0)
3530                 goto done;
3531
3532         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3533         if (sdiodev->sg_support) {
3534                 bus->txglom = false;
3535                 value = 1;
3536                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3537                 bus->txglom_sgpad = brcmu_pkt_buf_get_skb(pad_size);
3538                 if (!bus->txglom_sgpad)
3539                         brcmf_err("allocating txglom padding skb failed, reduced performance\n");
3540
3541                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3542                                            &value, sizeof(u32));
3543                 if (err < 0) {
3544                         /* bus:rxglom is allowed to fail */
3545                         err = 0;
3546                 } else {
3547                         bus->txglom = true;
3548                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3549                 }
3550         }
3551         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3552
3553 done:
3554         return err;
3555 }
3556
3557 static int brcmf_sdio_bus_init(struct device *dev)
3558 {
3559         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3560         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3561         struct brcmf_sdio *bus = sdiodev->bus;
3562         int err, ret = 0;
3563         u8 saveclk;
3564
3565         brcmf_dbg(TRACE, "Enter\n");
3566
3567         /* try to download image and nvram to the dongle */
3568         if (bus_if->state == BRCMF_BUS_DOWN) {
3569                 err = brcmf_sdio_download_firmware(bus);
3570                 if (err)
3571                         return err;
3572         }
3573
3574         if (!bus->sdiodev->bus_if->drvr)
3575                 return 0;
3576
3577         /* Start the watchdog timer */
3578         bus->sdcnt.tickcnt = 0;
3579         brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3580
3581         sdio_claim_host(bus->sdiodev->func[1]);
3582
3583         /* Make sure backplane clock is on, needed to generate F2 interrupt */
3584         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3585         if (bus->clkstate != CLK_AVAIL)
3586                 goto exit;
3587
3588         /* Force clocks on backplane to be sure F2 interrupt propagates */
3589         saveclk = brcmf_sdiod_regrb(bus->sdiodev,
3590                                     SBSDIO_FUNC1_CHIPCLKCSR, &err);
3591         if (!err) {
3592                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3593                                   (saveclk | SBSDIO_FORCE_HT), &err);
3594         }
3595         if (err) {
3596                 brcmf_err("Failed to force clock for F2: err %d\n", err);
3597                 goto exit;
3598         }
3599
3600         /* Enable function 2 (frame transfers) */
3601         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3602                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
3603         err = sdio_enable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3604
3605
3606         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
3607
3608         /* If F2 successfully enabled, set core and enable interrupts */
3609         if (!err) {
3610                 /* Set up the interrupt mask and enable interrupts */
3611                 bus->hostintmask = HOSTINTMASK;
3612                 w_sdreg32(bus, bus->hostintmask,
3613                           offsetof(struct sdpcmd_regs, hostintmask));
3614
3615                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3616         } else {
3617                 /* Disable F2 again */
3618                 sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
3619                 ret = -ENODEV;
3620         }
3621
3622         if (brcmf_sdio_sr_capable(bus)) {
3623                 brcmf_sdio_sr_init(bus);
3624         } else {
3625                 /* Restore previous clock setting */
3626                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3627                                   saveclk, &err);
3628         }
3629
3630         if (ret == 0) {
3631                 ret = brcmf_sdiod_intr_register(bus->sdiodev);
3632                 if (ret != 0)
3633                         brcmf_err("intr register failed:%d\n", ret);
3634         }
3635
3636         /* If we didn't come up, turn off backplane clock */
3637         if (ret != 0)
3638                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
3639
3640 exit:
3641         sdio_release_host(bus->sdiodev->func[1]);
3642
3643         return ret;
3644 }
3645
3646 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3647 {
3648         brcmf_dbg(TRACE, "Enter\n");
3649
3650         if (!bus) {
3651                 brcmf_err("bus is null pointer, exiting\n");
3652                 return;
3653         }
3654
3655         if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3656                 brcmf_err("bus is down. we have nothing to do\n");
3657                 return;
3658         }
3659         /* Count the interrupt call */
3660         bus->sdcnt.intrcount++;
3661         if (in_interrupt())
3662                 atomic_set(&bus->ipend, 1);
3663         else
3664                 if (brcmf_sdio_intr_rstatus(bus)) {
3665                         brcmf_err("failed backplane access\n");
3666                         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3667                 }
3668
3669         /* Disable additional interrupts (is this needed now)? */
3670         if (!bus->intr)
3671                 brcmf_err("isr w/o interrupt configured!\n");
3672
3673         atomic_inc(&bus->dpc_tskcnt);
3674         queue_work(bus->brcmf_wq, &bus->datawork);
3675 }
3676
3677 static bool brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3678 {
3679 #ifdef DEBUG
3680         struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3681 #endif  /* DEBUG */
3682
3683         brcmf_dbg(TIMER, "Enter\n");
3684
3685         /* Poll period: check device if appropriate. */
3686         if (!bus->sr_enabled &&
3687             bus->poll && (++bus->polltick >= bus->pollrate)) {
3688                 u32 intstatus = 0;
3689
3690                 /* Reset poll tick */
3691                 bus->polltick = 0;
3692
3693                 /* Check device if no interrupts */
3694                 if (!bus->intr ||
3695                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3696
3697                         if (atomic_read(&bus->dpc_tskcnt) == 0) {
3698                                 u8 devpend;
3699
3700                                 sdio_claim_host(bus->sdiodev->func[1]);
3701                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3702                                                             SDIO_CCCR_INTx,
3703                                                             NULL);
3704                                 sdio_release_host(bus->sdiodev->func[1]);
3705                                 intstatus =
3706                                     devpend & (INTR_STATUS_FUNC1 |
3707                                                INTR_STATUS_FUNC2);
3708                         }
3709
3710                         /* If there is something, make like the ISR and
3711                                  schedule the DPC */
3712                         if (intstatus) {
3713                                 bus->sdcnt.pollcnt++;
3714                                 atomic_set(&bus->ipend, 1);
3715
3716                                 atomic_inc(&bus->dpc_tskcnt);
3717                                 queue_work(bus->brcmf_wq, &bus->datawork);
3718                         }
3719                 }
3720
3721                 /* Update interrupt tracking */
3722                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3723         }
3724 #ifdef DEBUG
3725         /* Poll for console output periodically */
3726         if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3727             bus->console_interval != 0) {
3728                 bus->console.count += BRCMF_WD_POLL_MS;
3729                 if (bus->console.count >= bus->console_interval) {
3730                         bus->console.count -= bus->console_interval;
3731                         sdio_claim_host(bus->sdiodev->func[1]);
3732                         /* Make sure backplane clock is on */
3733                         brcmf_sdio_bus_sleep(bus, false, false);
3734                         if (brcmf_sdio_readconsole(bus) < 0)
3735                                 /* stop on error */
3736                                 bus->console_interval = 0;
3737                         sdio_release_host(bus->sdiodev->func[1]);
3738                 }
3739         }
3740 #endif                          /* DEBUG */
3741
3742         /* On idle timeout clear activity flag and/or turn off clock */
3743         if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3744                 if (++bus->idlecount >= bus->idletime) {
3745                         bus->idlecount = 0;
3746                         if (bus->activity) {
3747                                 bus->activity = false;
3748                                 brcmf_sdio_wd_timer(bus, BRCMF_WD_POLL_MS);
3749                         } else {
3750                                 brcmf_dbg(SDIO, "idle\n");
3751                                 sdio_claim_host(bus->sdiodev->func[1]);
3752                                 brcmf_sdio_bus_sleep(bus, true, false);
3753                                 sdio_release_host(bus->sdiodev->func[1]);
3754                         }
3755                 }
3756         }
3757
3758         return (atomic_read(&bus->ipend) > 0);
3759 }
3760
3761 static void brcmf_sdio_dataworker(struct work_struct *work)
3762 {
3763         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3764                                               datawork);
3765
3766         while (atomic_read(&bus->dpc_tskcnt)) {
3767                 brcmf_sdio_dpc(bus);
3768                 atomic_dec(&bus->dpc_tskcnt);
3769         }
3770 }
3771
3772 static bool
3773 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3774 {
3775         u8 clkctl = 0;
3776         int err = 0;
3777         int reg_addr;
3778         u32 reg_val;
3779         u32 drivestrength;
3780
3781         bus->alp_only = true;
3782
3783         sdio_claim_host(bus->sdiodev->func[1]);
3784
3785         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3786                  brcmf_sdiod_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3787
3788         /*
3789          * Force PLL off until brcmf_sdio_chip_attach()
3790          * programs PLL control regs
3791          */
3792
3793         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3794                           BRCMF_INIT_CLKCTL1, &err);
3795         if (!err)
3796                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
3797                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3798
3799         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3800                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3801                           err, BRCMF_INIT_CLKCTL1, clkctl);
3802                 goto fail;
3803         }
3804
3805         if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci)) {
3806                 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3807                 goto fail;
3808         }
3809
3810         if (brcmf_sdio_kso_init(bus)) {
3811                 brcmf_err("error enabling KSO\n");
3812                 goto fail;
3813         }
3814
3815         if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3816                 drivestrength = bus->sdiodev->pdata->drive_strength;
3817         else
3818                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3819         brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3820
3821         /* Get info on the SOCRAM cores... */
3822         bus->ramsize = bus->ci->ramsize;
3823         if (!(bus->ramsize)) {
3824                 brcmf_err("failed to find SOCRAM memory!\n");
3825                 goto fail;
3826         }
3827
3828         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3829         reg_val = brcmf_sdiod_regrb(bus->sdiodev,
3830                                     SDIO_CCCR_BRCM_CARDCTRL, &err);
3831         if (err)
3832                 goto fail;
3833
3834         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3835
3836         brcmf_sdiod_regwb(bus->sdiodev,
3837                           SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3838         if (err)
3839                 goto fail;
3840
3841         /* set PMUControl so a backplane reset does PMU state reload */
3842         reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3843                                pmucontrol);
3844         reg_val = brcmf_sdiod_regrl(bus->sdiodev,
3845                                     reg_addr,
3846                                     &err);
3847         if (err)
3848                 goto fail;
3849
3850         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3851
3852         brcmf_sdiod_regwl(bus->sdiodev,
3853                           reg_addr,
3854                           reg_val,
3855                           &err);
3856         if (err)
3857                 goto fail;
3858
3859
3860         sdio_release_host(bus->sdiodev->func[1]);
3861
3862         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3863
3864         /* allocate header buffer */
3865         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3866         if (!bus->hdrbuf)
3867                 return false;
3868         /* Locate an appropriately-aligned portion of hdrbuf */
3869         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3870                                     bus->head_align);
3871
3872         /* Set the poll and/or interrupt flags */
3873         bus->intr = true;
3874         bus->poll = false;
3875         if (bus->poll)
3876                 bus->pollrate = 1;
3877
3878         return true;
3879
3880 fail:
3881         sdio_release_host(bus->sdiodev->func[1]);
3882         return false;
3883 }
3884
3885 static int
3886 brcmf_sdio_watchdog_thread(void *data)
3887 {
3888         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3889
3890         allow_signal(SIGTERM);
3891         /* Run until signal received */
3892         while (1) {
3893                 if (kthread_should_stop())
3894                         break;
3895                 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3896                         brcmf_sdio_bus_watchdog(bus);
3897                         /* Count the tick for reference */
3898                         bus->sdcnt.tickcnt++;
3899                 } else
3900                         break;
3901         }
3902         return 0;
3903 }
3904
3905 static void
3906 brcmf_sdio_watchdog(unsigned long data)
3907 {
3908         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3909
3910         if (bus->watchdog_tsk) {
3911                 complete(&bus->watchdog_wait);
3912                 /* Reschedule the watchdog */
3913                 if (bus->wd_timer_valid)
3914                         mod_timer(&bus->timer,
3915                                   jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3916         }
3917 }
3918
3919 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3920         .stop = brcmf_sdio_bus_stop,
3921         .preinit = brcmf_sdio_bus_preinit,
3922         .init = brcmf_sdio_bus_init,
3923         .txdata = brcmf_sdio_bus_txdata,
3924         .txctl = brcmf_sdio_bus_txctl,
3925         .rxctl = brcmf_sdio_bus_rxctl,
3926         .gettxq = brcmf_sdio_bus_gettxq,
3927 };
3928
3929 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
3930 {
3931         int ret;
3932         struct brcmf_sdio *bus;
3933
3934         brcmf_dbg(TRACE, "Enter\n");
3935
3936         /* Allocate private bus interface state */
3937         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3938         if (!bus)
3939                 goto fail;
3940
3941         bus->sdiodev = sdiodev;
3942         sdiodev->bus = bus;
3943         skb_queue_head_init(&bus->glom);
3944         bus->txbound = BRCMF_TXBOUND;
3945         bus->rxbound = BRCMF_RXBOUND;
3946         bus->txminmax = BRCMF_TXMINMAX;
3947         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
3948
3949         /* platform specific configuration:
3950          *   alignments must be at least 4 bytes for ADMA
3951          */
3952         bus->head_align = ALIGNMENT;
3953         bus->sgentry_align = ALIGNMENT;
3954         if (sdiodev->pdata) {
3955                 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
3956                         bus->head_align = sdiodev->pdata->sd_head_align;
3957                 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
3958                         bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
3959         }
3960
3961         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3962         bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3963         if (bus->brcmf_wq == NULL) {
3964                 brcmf_err("insufficient memory to create txworkqueue\n");
3965                 goto fail;
3966         }
3967
3968         /* attempt to attach to the dongle */
3969         if (!(brcmf_sdio_probe_attach(bus))) {
3970                 brcmf_err("brcmf_sdio_probe_attach failed\n");
3971                 goto fail;
3972         }
3973
3974         spin_lock_init(&bus->rxctl_lock);
3975         spin_lock_init(&bus->txqlock);
3976         init_waitqueue_head(&bus->ctrl_wait);
3977         init_waitqueue_head(&bus->dcmd_resp_wait);
3978
3979         /* Set up the watchdog timer */
3980         init_timer(&bus->timer);
3981         bus->timer.data = (unsigned long)bus;
3982         bus->timer.function = brcmf_sdio_watchdog;
3983
3984         /* Initialize watchdog thread */
3985         init_completion(&bus->watchdog_wait);
3986         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
3987                                         bus, "brcmf_watchdog");
3988         if (IS_ERR(bus->watchdog_tsk)) {
3989                 pr_warn("brcmf_watchdog thread failed to start\n");
3990                 bus->watchdog_tsk = NULL;
3991         }
3992         /* Initialize DPC thread */
3993         atomic_set(&bus->dpc_tskcnt, 0);
3994
3995         /* Assign bus interface call back */
3996         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
3997         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
3998         bus->sdiodev->bus_if->chip = bus->ci->chip;
3999         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4000
4001         /* default sdio bus header length for tx packet */
4002         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4003
4004         /* Attach to the common layer, reserve hdr space */
4005         ret = brcmf_attach(bus->sdiodev->dev);
4006         if (ret != 0) {
4007                 brcmf_err("brcmf_attach failed\n");
4008                 goto fail;
4009         }
4010
4011         /* Allocate buffers */
4012         if (bus->sdiodev->bus_if->maxctl) {
4013                 bus->rxblen =
4014                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4015                             ALIGNMENT) + bus->head_align;
4016                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4017                 if (!(bus->rxbuf)) {
4018                         brcmf_err("rxbuf allocation failed\n");
4019                         goto fail;
4020                 }
4021         }
4022
4023         sdio_claim_host(bus->sdiodev->func[1]);
4024
4025         /* Disable F2 to clear any intermediate frame state on the dongle */
4026         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4027
4028         bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
4029         bus->rxflow = false;
4030
4031         /* Done with backplane-dependent accesses, can drop clock... */
4032         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4033
4034         sdio_release_host(bus->sdiodev->func[1]);
4035
4036         /* ...and initialize clock/power states */
4037         bus->clkstate = CLK_SDONLY;
4038         bus->idletime = BRCMF_IDLE_INTERVAL;
4039         bus->idleclock = BRCMF_IDLE_ACTIVE;
4040
4041         /* Query the F2 block size, set roundup accordingly */
4042         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4043         bus->roundup = min(max_roundup, bus->blocksize);
4044
4045         /* SR state */
4046         bus->sleeping = false;
4047         bus->sr_enabled = false;
4048
4049         brcmf_sdio_debugfs_create(bus);
4050         brcmf_dbg(INFO, "completed!!\n");
4051
4052         /* if firmware path present try to download and bring up bus */
4053         ret = brcmf_bus_start(bus->sdiodev->dev);
4054         if (ret != 0) {
4055                 brcmf_err("dongle is not responding\n");
4056                 goto fail;
4057         }
4058
4059         return bus;
4060
4061 fail:
4062         brcmf_sdio_remove(bus);
4063         return NULL;
4064 }
4065
4066 /* Detach and free everything */
4067 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4068 {
4069         brcmf_dbg(TRACE, "Enter\n");
4070
4071         if (bus) {
4072                 /* De-register interrupt handler */
4073                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4074
4075                 cancel_work_sync(&bus->datawork);
4076                 if (bus->brcmf_wq)
4077                         destroy_workqueue(bus->brcmf_wq);
4078
4079                 if (bus->sdiodev->bus_if->drvr) {
4080                         brcmf_detach(bus->sdiodev->dev);
4081                 }
4082
4083                 if (bus->ci) {
4084                         sdio_claim_host(bus->sdiodev->func[1]);
4085                         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4086                         /* Leave the device in state where it is 'quiet'. This
4087                          * is done by putting it in download_state which
4088                          * essentially resets all necessary cores
4089                          */
4090                         msleep(20);
4091                         brcmf_sdio_download_state(bus, true);
4092                         brcmf_sdio_clkctl(bus, CLK_NONE, false);
4093                         sdio_release_host(bus->sdiodev->func[1]);
4094                         brcmf_sdio_chip_detach(&bus->ci);
4095                 }
4096
4097                 brcmu_pkt_buf_free_skb(bus->txglom_sgpad);
4098                 kfree(bus->rxbuf);
4099                 kfree(bus->hdrbuf);
4100                 kfree(bus);
4101         }
4102
4103         brcmf_dbg(TRACE, "Disconnected\n");
4104 }
4105
4106 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4107 {
4108         /* Totally stop the timer */
4109         if (!wdtick && bus->wd_timer_valid) {
4110                 del_timer_sync(&bus->timer);
4111                 bus->wd_timer_valid = false;
4112                 bus->save_ms = wdtick;
4113                 return;
4114         }
4115
4116         /* don't start the wd until fw is loaded */
4117         if (bus->sdiodev->bus_if->state != BRCMF_BUS_DATA)
4118                 return;
4119
4120         if (wdtick) {
4121                 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4122                         if (bus->wd_timer_valid)
4123                                 /* Stop timer and restart at new value */
4124                                 del_timer_sync(&bus->timer);
4125
4126                         /* Create timer again when watchdog period is
4127                            dynamically changed or in the first instance
4128                          */
4129                         bus->timer.expires =
4130                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4131                         add_timer(&bus->timer);
4132
4133                 } else {
4134                         /* Re arm the timer, at last watchdog period */
4135                         mod_timer(&bus->timer,
4136                                 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4137                 }
4138
4139                 bus->wd_timer_valid = true;
4140                 bus->save_ms = wdtick;
4141         }
4142 }