2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <linux/debugfs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/platform_data/brcmfmac-sdio.h>
35 #include <asm/unaligned.h>
37 #include <brcmu_wifi.h>
38 #include <brcmu_utils.h>
39 #include <brcm_hw_ids.h>
41 #include "sdio_host.h"
42 #include "sdio_chip.h"
44 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
48 #define BRCMF_TRAP_INFO_SIZE 80
50 #define CBUF_LEN (128)
52 /* Device console log buffer state */
53 #define CONSOLE_BUFFER_MAX 2024
56 __le32 buf; /* Can't be pointer on (64-bit) hosts */
59 char *_buf_compat; /* Redundant pointer for backward compat. */
64 * When there is no UART (e.g. Quickturn),
65 * the host should write a complete
66 * input line directly into cbuf and then write
67 * the length into vcons_in.
68 * This may also be used when there is a real UART
69 * (at risk of conflicting with
70 * the real UART). vcons_out is currently unused.
75 /* Output (logging) buffer
76 * Console output is written to a ring buffer log_buf at index log_idx.
77 * The host may read the output when it sees log_idx advance.
78 * Output will be lost if the output wraps around faster than the host
81 struct rte_log_le log_le;
83 /* Console input line buffer
84 * Characters are read one at a time into cbuf
85 * until <CR> is received, then
86 * the buffer is processed as a command line.
87 * Also used for virtual UART.
94 #include <chipcommon.h>
98 #include "tracepoint.h"
100 #define TXQLEN 2048 /* bulk tx queue length */
101 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
102 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
105 #define TXRETRIES 2 /* # of retries for tx frames */
107 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
110 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
113 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
115 #define MEMBLOCK 2048 /* Block size used for downloading
117 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
118 biggest possible glom */
120 #define BRCMF_FIRSTREAD (1 << 6)
123 /* SBSDIO_DEVICE_CTL */
125 /* 1: device will assert busy signal when receiving CMD53 */
126 #define SBSDIO_DEVCTL_SETBUSY 0x01
127 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
128 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
129 /* 1: mask all interrupts to host except the chipActive (rev 8) */
130 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
131 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
132 * sdio bus power cycle to clear (rev 9) */
133 #define SBSDIO_DEVCTL_PADS_ISO 0x08
134 /* Force SD->SB reset mapping (rev 11) */
135 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
136 /* Determined by CoreControl bit */
137 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
138 /* Force backplane reset */
139 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
140 /* Force no backplane reset */
141 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
143 /* direct(mapped) cis space */
145 /* MAPPED common CIS address */
146 #define SBSDIO_CIS_BASE_COMMON 0x1000
147 /* maximum bytes in one CIS */
148 #define SBSDIO_CIS_SIZE_LIMIT 0x200
149 /* cis offset addr is < 17 bits */
150 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
152 /* manfid tuple length, include tuple, link bytes */
153 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
156 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
157 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
158 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
159 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
160 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
161 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
162 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
163 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
164 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
165 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
166 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
167 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
168 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
169 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
170 #define I_PC (1 << 10) /* descriptor error */
171 #define I_PD (1 << 11) /* data error */
172 #define I_DE (1 << 12) /* Descriptor protocol Error */
173 #define I_RU (1 << 13) /* Receive descriptor Underflow */
174 #define I_RO (1 << 14) /* Receive fifo Overflow */
175 #define I_XU (1 << 15) /* Transmit fifo Underflow */
176 #define I_RI (1 << 16) /* Receive Interrupt */
177 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
178 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
179 #define I_XI (1 << 24) /* Transmit Interrupt */
180 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
181 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
182 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
183 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
184 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
185 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
186 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
187 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
188 #define I_DMA (I_RI | I_XI | I_ERRORS)
191 #define CC_CISRDY (1 << 0) /* CIS Ready */
192 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
193 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
194 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
195 #define CC_XMTDATAAVAIL_MODE (1 << 4)
196 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
199 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
200 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
201 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
202 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
205 * Software allocation of To SB Mailbox resources
208 /* tosbmailbox bits corresponding to intstatus bits */
209 #define SMB_NAK (1 << 0) /* Frame NAK */
210 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
211 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
212 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
214 /* tosbmailboxdata */
215 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
218 * Software allocation of To Host Mailbox resources
222 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
223 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
224 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
225 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
227 /* tohostmailboxdata */
228 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
229 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
230 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
231 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
233 #define HMB_DATA_FCDATA_MASK 0xff000000
234 #define HMB_DATA_FCDATA_SHIFT 24
236 #define HMB_DATA_VERSION_MASK 0x00ff0000
237 #define HMB_DATA_VERSION_SHIFT 16
240 * Software-defined protocol header
243 /* Current protocol version */
244 #define SDPCM_PROT_VERSION 4
247 * Shared structure between dongle and the host.
248 * The structure contains pointers to trap or assert information.
250 #define SDPCM_SHARED_VERSION 0x0003
251 #define SDPCM_SHARED_VERSION_MASK 0x00FF
252 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
253 #define SDPCM_SHARED_ASSERT 0x0200
254 #define SDPCM_SHARED_TRAP 0x0400
256 /* Space for header read, limit for data packets */
257 #define MAX_HDR_READ (1 << 6)
258 #define MAX_RX_DATASZ 2048
260 /* Maximum milliseconds to wait for F2 to come up */
261 #define BRCMF_WAIT_F2RDY 3000
263 /* Bump up limit on waiting for HT to account for first startup;
264 * if the image is doing a CRC calculation before programming the PMU
265 * for HT availability, it could take a couple hundred ms more, so
266 * max out at a 1 second (1000000us).
268 #undef PMU_MAX_TRANSITION_DLY
269 #define PMU_MAX_TRANSITION_DLY 1000000
271 /* Value for ChipClockCSR during initial setup */
272 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
273 SBSDIO_ALP_AVAIL_REQ)
275 /* Flags for SDH calls */
276 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
278 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
279 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
282 #define BRCMF_IDLE_INTERVAL 1
284 #define KSO_WAIT_US 50
285 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
288 * Conversion of 802.1D priority to precedence level
290 static uint prio2prec(u32 prio)
292 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
297 /* Device console log buffer state */
298 struct brcmf_console {
299 uint count; /* Poll interval msec counter */
300 uint log_addr; /* Log struct address (fixed) */
301 struct rte_log_le log_le; /* Log struct (host copy) */
302 uint bufsize; /* Size of log buffer */
303 u8 *buf; /* Log buffer (host copy) */
304 uint last; /* Last buffer read index */
307 struct brcmf_trap_info {
321 __le32 r9; /* sb/v6 */
322 __le32 r10; /* sl/v7 */
323 __le32 r11; /* fp/v8 */
331 struct sdpcm_shared {
335 u32 assert_file_addr;
337 u32 console_addr; /* Address of struct rte_console */
343 struct sdpcm_shared_le {
346 __le32 assert_exp_addr;
347 __le32 assert_file_addr;
349 __le32 console_addr; /* Address of struct rte_console */
350 __le32 msgtrace_addr;
355 /* dongle SDIO bus specific header info */
356 struct brcmf_sdio_hdrinfo {
365 /* misc chip info needed by some of the routines */
366 /* Private data for SDIO bus interaction */
368 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
369 struct chip_info *ci; /* Chip info struct */
370 char *vars; /* Variables (from CIS and/or other) */
371 uint varsz; /* Size of variables buffer */
373 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
375 u32 hostintmask; /* Copy of Host Interrupt Mask */
376 atomic_t intstatus; /* Intstatus bits (events) pending */
377 atomic_t fcstate; /* State of dongle flow-control */
379 uint blocksize; /* Block size of SDIO transfers */
380 uint roundup; /* Max roundup limit */
382 struct pktq txq; /* Queue length used for flow-control */
383 u8 flowcontrol; /* per prio flow control bitmask */
384 u8 tx_seq; /* Transmit sequence number (next) */
385 u8 tx_max; /* Maximum transmit sequence allowed */
387 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
388 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
389 u8 rx_seq; /* Receive sequence number (expected) */
390 struct brcmf_sdio_hdrinfo cur_read;
391 /* info of current read frame */
392 bool rxskip; /* Skip receive (awaiting NAK ACK) */
393 bool rxpending; /* Data frame pending in dongle */
395 uint rxbound; /* Rx frames to read before resched */
396 uint txbound; /* Tx frames to send before resched */
399 struct sk_buff *glomd; /* Packet containing glomming descriptor */
400 struct sk_buff_head glom; /* Packet list for glommed superframe */
401 uint glomerr; /* Glom packet read errors */
403 u8 *rxbuf; /* Buffer for receiving control packets */
404 uint rxblen; /* Allocated length of rxbuf */
405 u8 *rxctl; /* Aligned pointer into rxbuf */
406 u8 *rxctl_orig; /* pointer for freeing rxctl */
407 uint rxlen; /* Length of valid data in buffer */
408 spinlock_t rxctl_lock; /* protection lock for ctrl frame resources */
410 u8 sdpcm_ver; /* Bus protocol reported by dongle */
412 bool intr; /* Use interrupts */
413 bool poll; /* Use polling */
414 atomic_t ipend; /* Device interrupt is pending */
415 uint spurious; /* Count of spurious interrupts */
416 uint pollrate; /* Ticks between device polls */
417 uint polltick; /* Tick counter */
420 uint console_interval;
421 struct brcmf_console console; /* Console output polling support */
422 uint console_addr; /* Console address from shared struct */
425 uint clkstate; /* State of sd and backplane clock(s) */
426 bool activity; /* Activity flag for clock down */
427 s32 idletime; /* Control for activity timeout */
428 s32 idlecount; /* Activity timeout counter */
429 s32 idleclock; /* How to set bus driver when idle */
430 bool rxflow_mode; /* Rx flow control mode */
431 bool rxflow; /* Is rx flow control on */
432 bool alp_only; /* Don't use HT clock (ALP only) */
436 bool ctrl_frame_stat;
439 wait_queue_head_t ctrl_wait;
440 wait_queue_head_t dcmd_resp_wait;
442 struct timer_list timer;
443 struct completion watchdog_wait;
444 struct task_struct *watchdog_tsk;
448 struct workqueue_struct *brcmf_wq;
449 struct work_struct datawork;
452 bool txoff; /* Transmit flow-controlled */
453 struct brcmf_sdio_count sdcnt;
454 bool sr_enabled; /* SaveRestore enabled */
455 bool sleeping; /* SDIO bus sleeping */
457 u8 tx_hdrlen; /* sdio bus header length for tx packet */
463 #define CLK_PENDING 2
467 static int qcount[NUMPRIO];
470 #define DEFAULT_SDIO_DRIVE_STRENGTH 6 /* in milliamps */
472 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
474 /* Retry count for register access failures */
475 static const uint retry_limit = 2;
477 /* Limit on rounding up frames */
478 static const uint max_roundup = 512;
482 enum brcmf_sdio_frmtype {
483 BRCMF_SDIO_FT_NORMAL,
488 #define BCM43143_FIRMWARE_NAME "brcm/brcmfmac43143-sdio.bin"
489 #define BCM43143_NVRAM_NAME "brcm/brcmfmac43143-sdio.txt"
490 #define BCM43241B0_FIRMWARE_NAME "brcm/brcmfmac43241b0-sdio.bin"
491 #define BCM43241B0_NVRAM_NAME "brcm/brcmfmac43241b0-sdio.txt"
492 #define BCM43241B4_FIRMWARE_NAME "brcm/brcmfmac43241b4-sdio.bin"
493 #define BCM43241B4_NVRAM_NAME "brcm/brcmfmac43241b4-sdio.txt"
494 #define BCM4329_FIRMWARE_NAME "brcm/brcmfmac4329-sdio.bin"
495 #define BCM4329_NVRAM_NAME "brcm/brcmfmac4329-sdio.txt"
496 #define BCM4330_FIRMWARE_NAME "brcm/brcmfmac4330-sdio.bin"
497 #define BCM4330_NVRAM_NAME "brcm/brcmfmac4330-sdio.txt"
498 #define BCM4334_FIRMWARE_NAME "brcm/brcmfmac4334-sdio.bin"
499 #define BCM4334_NVRAM_NAME "brcm/brcmfmac4334-sdio.txt"
500 #define BCM4335_FIRMWARE_NAME "brcm/brcmfmac4335-sdio.bin"
501 #define BCM4335_NVRAM_NAME "brcm/brcmfmac4335-sdio.txt"
503 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
504 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
505 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
506 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
507 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
508 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
509 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
510 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
511 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
512 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
513 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
514 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
515 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
516 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
518 struct brcmf_firmware_names {
525 enum brcmf_firmware_type {
530 #define BRCMF_FIRMWARE_NVRAM(name) \
531 name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
533 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
534 { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
535 { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
536 { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
537 { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
538 { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
539 { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
540 { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) }
544 static const struct firmware *brcmf_sdbrcm_get_fw(struct brcmf_sdio *bus,
545 enum brcmf_firmware_type type)
547 const struct firmware *fw;
551 for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
552 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
553 brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
555 case BRCMF_FIRMWARE_BIN:
556 name = brcmf_fwname_data[i].bin;
558 case BRCMF_FIRMWARE_NVRAM:
559 name = brcmf_fwname_data[i].nv;
562 brcmf_err("invalid firmware type (%d)\n", type);
568 brcmf_err("Unknown chipid %d [%d]\n",
569 bus->ci->chip, bus->ci->chiprev);
573 err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
574 if ((err) || (!fw)) {
575 brcmf_err("fail to request firmware %s (%d)\n", name, err);
582 static void pkt_align(struct sk_buff *p, int len, int align)
585 datalign = (unsigned long)(p->data);
586 datalign = roundup(datalign, (align)) - datalign;
588 skb_pull(p, datalign);
592 /* To check if there's window offered */
593 static bool data_ok(struct brcmf_sdio *bus)
595 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
596 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
600 * Reads a register in the SDIO hardware block. This block occupies a series of
601 * adresses on the 32 bit backplane bus.
604 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
606 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
609 *regvar = brcmf_sdio_regrl(bus->sdiodev,
610 bus->ci->c_inf[idx].base + offset, &ret);
616 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
618 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
621 brcmf_sdio_regwl(bus->sdiodev,
622 bus->ci->c_inf[idx].base + reg_offset,
629 brcmf_sdbrcm_kso_control(struct brcmf_sdio *bus, bool on)
631 u8 wr_val = 0, rd_val, cmp_val, bmask;
635 brcmf_dbg(TRACE, "Enter\n");
637 wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
638 /* 1st KSO write goes to AOS wake up core if device is asleep */
639 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
642 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
647 /* device WAKEUP through KSO:
648 * write bit 0 & read back until
649 * both bits 0 (kso bit) & 1 (dev on status) are set
651 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
652 SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
654 usleep_range(2000, 3000);
656 /* Put device to sleep, turn off KSO */
658 /* only check for bit0, bit1(dev on status) may not
659 * get cleared right away
661 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
665 /* reliable KSO bit set/clr:
666 * the sdiod sleep write access is synced to PMU 32khz clk
667 * just one write attempt may fail,
668 * read it back until it matches written value
670 rd_val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
672 if (((rd_val & bmask) == cmp_val) && !err)
674 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
675 try_cnt, MAX_KSO_ATTEMPTS, err);
677 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
679 } while (try_cnt++ < MAX_KSO_ATTEMPTS);
684 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
686 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
688 /* Turn backplane clock on or off */
689 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
692 u8 clkctl, clkreq, devctl;
693 unsigned long timeout;
695 brcmf_dbg(SDIO, "Enter\n");
699 if (bus->sr_enabled) {
700 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
705 /* Request HT Avail */
707 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
709 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
712 brcmf_err("HT Avail request error: %d\n", err);
716 /* Check current status */
717 clkctl = brcmf_sdio_regrb(bus->sdiodev,
718 SBSDIO_FUNC1_CHIPCLKCSR, &err);
720 brcmf_err("HT Avail read error: %d\n", err);
724 /* Go to pending and await interrupt if appropriate */
725 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
726 /* Allow only clock-available interrupt */
727 devctl = brcmf_sdio_regrb(bus->sdiodev,
728 SBSDIO_DEVICE_CTL, &err);
730 brcmf_err("Devctl error setting CA: %d\n",
735 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
736 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
738 brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
739 bus->clkstate = CLK_PENDING;
742 } else if (bus->clkstate == CLK_PENDING) {
743 /* Cancel CA-only interrupt filter */
744 devctl = brcmf_sdio_regrb(bus->sdiodev,
745 SBSDIO_DEVICE_CTL, &err);
746 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
747 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
751 /* Otherwise, wait here (polling) for HT Avail */
753 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
754 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
755 clkctl = brcmf_sdio_regrb(bus->sdiodev,
756 SBSDIO_FUNC1_CHIPCLKCSR,
758 if (time_after(jiffies, timeout))
761 usleep_range(5000, 10000);
764 brcmf_err("HT Avail request error: %d\n", err);
767 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
768 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
769 PMU_MAX_TRANSITION_DLY, clkctl);
773 /* Mark clock available */
774 bus->clkstate = CLK_AVAIL;
775 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
778 if (!bus->alp_only) {
779 if (SBSDIO_ALPONLY(clkctl))
780 brcmf_err("HT Clock should be on\n");
782 #endif /* defined (DEBUG) */
784 bus->activity = true;
788 if (bus->clkstate == CLK_PENDING) {
789 /* Cancel CA-only interrupt filter */
790 devctl = brcmf_sdio_regrb(bus->sdiodev,
791 SBSDIO_DEVICE_CTL, &err);
792 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
793 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
797 bus->clkstate = CLK_SDONLY;
798 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
800 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
802 brcmf_err("Failed access turning clock off: %d\n",
810 /* Change idle/active SD state */
811 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
813 brcmf_dbg(SDIO, "Enter\n");
816 bus->clkstate = CLK_SDONLY;
818 bus->clkstate = CLK_NONE;
823 /* Transition SD and backplane clock readiness */
824 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
827 uint oldstate = bus->clkstate;
830 brcmf_dbg(SDIO, "Enter\n");
832 /* Early exit if we're already there */
833 if (bus->clkstate == target) {
834 if (target == CLK_AVAIL) {
835 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
836 bus->activity = true;
843 /* Make sure SD clock is available */
844 if (bus->clkstate == CLK_NONE)
845 brcmf_sdbrcm_sdclk(bus, true);
846 /* Now request HT Avail on the backplane */
847 brcmf_sdbrcm_htclk(bus, true, pendok);
848 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
849 bus->activity = true;
853 /* Remove HT request, or bring up SD clock */
854 if (bus->clkstate == CLK_NONE)
855 brcmf_sdbrcm_sdclk(bus, true);
856 else if (bus->clkstate == CLK_AVAIL)
857 brcmf_sdbrcm_htclk(bus, false, false);
859 brcmf_err("request for %d -> %d\n",
860 bus->clkstate, target);
861 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
865 /* Make sure to remove HT request */
866 if (bus->clkstate == CLK_AVAIL)
867 brcmf_sdbrcm_htclk(bus, false, false);
868 /* Now remove the SD clock */
869 brcmf_sdbrcm_sdclk(bus, false);
870 brcmf_sdbrcm_wd_timer(bus, 0);
874 brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
881 brcmf_sdbrcm_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
884 brcmf_dbg(TRACE, "Enter\n");
885 brcmf_dbg(SDIO, "request %s currently %s\n",
886 (sleep ? "SLEEP" : "WAKE"),
887 (bus->sleeping ? "SLEEP" : "WAKE"));
889 /* If SR is enabled control bus state with KSO */
890 if (bus->sr_enabled) {
891 /* Done if we're already in the requested state */
892 if (sleep == bus->sleeping)
897 /* Don't sleep if something is pending */
898 if (atomic_read(&bus->intstatus) ||
899 atomic_read(&bus->ipend) > 0 ||
900 (!atomic_read(&bus->fcstate) &&
901 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
904 err = brcmf_sdbrcm_kso_control(bus, false);
905 /* disable watchdog */
907 brcmf_sdbrcm_wd_timer(bus, 0);
910 err = brcmf_sdbrcm_kso_control(bus, true);
914 bus->sleeping = sleep;
915 brcmf_dbg(SDIO, "new state %s\n",
916 (sleep ? "SLEEP" : "WAKE"));
918 brcmf_err("error while changing bus sleep state %d\n",
927 if (!bus->sr_enabled)
928 brcmf_sdbrcm_clkctl(bus, CLK_NONE, pendok);
930 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, pendok);
937 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
944 brcmf_dbg(SDIO, "Enter\n");
946 /* Read mailbox data and ack that we did so */
947 ret = r_sdreg32(bus, &hmb_data,
948 offsetof(struct sdpcmd_regs, tohostmailboxdata));
951 w_sdreg32(bus, SMB_INT_ACK,
952 offsetof(struct sdpcmd_regs, tosbmailbox));
953 bus->sdcnt.f1regdata += 2;
955 /* Dongle recomposed rx frames, accept them again */
956 if (hmb_data & HMB_DATA_NAKHANDLED) {
957 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
960 brcmf_err("unexpected NAKHANDLED!\n");
963 intstatus |= I_HMB_FRAME_IND;
967 * DEVREADY does not occur with gSPI.
969 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
971 (hmb_data & HMB_DATA_VERSION_MASK) >>
972 HMB_DATA_VERSION_SHIFT;
973 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
974 brcmf_err("Version mismatch, dongle reports %d, "
976 bus->sdpcm_ver, SDPCM_PROT_VERSION);
978 brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
983 * Flow Control has been moved into the RX headers and this out of band
984 * method isn't used any more.
985 * remaining backward compatible with older dongles.
987 if (hmb_data & HMB_DATA_FC) {
988 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
989 HMB_DATA_FCDATA_SHIFT;
991 if (fcbits & ~bus->flowcontrol)
992 bus->sdcnt.fc_xoff++;
994 if (bus->flowcontrol & ~fcbits)
997 bus->sdcnt.fc_rcvd++;
998 bus->flowcontrol = fcbits;
1001 /* Shouldn't be any others */
1002 if (hmb_data & ~(HMB_DATA_DEVREADY |
1003 HMB_DATA_NAKHANDLED |
1006 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1007 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1013 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1020 brcmf_err("%sterminate frame%s\n",
1021 abort ? "abort command, " : "",
1022 rtx ? ", send NAK" : "");
1025 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1027 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1029 bus->sdcnt.f1regdata++;
1031 /* Wait until the packet has been flushed (device/FIFO stable) */
1032 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1033 hi = brcmf_sdio_regrb(bus->sdiodev,
1034 SBSDIO_FUNC1_RFRAMEBCHI, &err);
1035 lo = brcmf_sdio_regrb(bus->sdiodev,
1036 SBSDIO_FUNC1_RFRAMEBCLO, &err);
1037 bus->sdcnt.f1regdata += 2;
1039 if ((hi == 0) && (lo == 0))
1042 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1043 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1044 lastrbc, (hi << 8) + lo);
1046 lastrbc = (hi << 8) + lo;
1050 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1052 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1056 err = w_sdreg32(bus, SMB_NAK,
1057 offsetof(struct sdpcmd_regs, tosbmailbox));
1059 bus->sdcnt.f1regdata++;
1064 /* Clear partial in any case */
1065 bus->cur_read.len = 0;
1067 /* If we can't reach the device, signal failure */
1069 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1072 /* return total length of buffer chain */
1073 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1079 skb_queue_walk(&bus->glom, p)
1084 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1086 struct sk_buff *cur, *next;
1088 skb_queue_walk_safe(&bus->glom, cur, next) {
1089 skb_unlink(cur, &bus->glom);
1090 brcmu_pkt_buf_free_skb(cur);
1095 * brcmfmac sdio bus specific header
1096 * This is the lowest layer header wrapped on the packets transmitted between
1097 * host and WiFi dongle which contains information needed for SDIO core and
1100 * It consists of 2 parts: hw header and software header
1101 * hardware header (frame tag) - 4 bytes
1102 * Byte 0~1: Frame length
1103 * Byte 2~3: Checksum, bit-wise inverse of frame length
1104 * software header - 8 bytes
1105 * Byte 0: Rx/Tx sequence number
1106 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1107 * Byte 2: Length of next data frame, reserved for Tx
1108 * Byte 3: Data offset
1109 * Byte 4: Flow control bits, reserved for Tx
1110 * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1111 * Byte 6~7: Reserved
1113 #define SDPCM_HWHDR_LEN 4
1114 #define SDPCM_SWHDR_LEN 8
1115 #define SDPCM_HDRLEN (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1116 /* software header */
1117 #define SDPCM_SEQ_MASK 0x000000ff
1118 #define SDPCM_SEQ_WRAP 256
1119 #define SDPCM_CHANNEL_MASK 0x00000f00
1120 #define SDPCM_CHANNEL_SHIFT 8
1121 #define SDPCM_CONTROL_CHANNEL 0 /* Control */
1122 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication */
1123 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv */
1124 #define SDPCM_GLOM_CHANNEL 3 /* Coalesced packets */
1125 #define SDPCM_TEST_CHANNEL 15 /* Test/debug packets */
1126 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
1127 #define SDPCM_NEXTLEN_MASK 0x00ff0000
1128 #define SDPCM_NEXTLEN_SHIFT 16
1129 #define SDPCM_DOFFSET_MASK 0xff000000
1130 #define SDPCM_DOFFSET_SHIFT 24
1131 #define SDPCM_FCMASK_MASK 0x000000ff
1132 #define SDPCM_WINDOW_MASK 0x0000ff00
1133 #define SDPCM_WINDOW_SHIFT 8
1135 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1138 hdrvalue = *(u32 *)swheader;
1139 return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1142 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1143 struct brcmf_sdio_hdrinfo *rd,
1144 enum brcmf_sdio_frmtype type)
1147 u8 rx_seq, fc, tx_seq_max;
1150 trace_brcmf_sdpcm_hdr(false, header);
1153 len = get_unaligned_le16(header);
1154 checksum = get_unaligned_le16(header + sizeof(u16));
1155 /* All zero means no more to read */
1156 if (!(len | checksum)) {
1157 bus->rxpending = false;
1160 if ((u16)(~(len ^ checksum))) {
1161 brcmf_err("HW header checksum error\n");
1162 bus->sdcnt.rx_badhdr++;
1163 brcmf_sdbrcm_rxfail(bus, false, false);
1166 if (len < SDPCM_HDRLEN) {
1167 brcmf_err("HW header length error\n");
1170 if (type == BRCMF_SDIO_FT_SUPER &&
1171 (roundup(len, bus->blocksize) != rd->len)) {
1172 brcmf_err("HW superframe header length error\n");
1175 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1176 brcmf_err("HW subframe header length error\n");
1181 /* software header */
1182 header += SDPCM_HWHDR_LEN;
1183 swheader = le32_to_cpu(*(__le32 *)header);
1184 if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1185 brcmf_err("Glom descriptor found in superframe head\n");
1189 rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1190 rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1191 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1192 type != BRCMF_SDIO_FT_SUPER) {
1193 brcmf_err("HW header length too long\n");
1194 bus->sdcnt.rx_toolong++;
1195 brcmf_sdbrcm_rxfail(bus, false, false);
1199 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1200 brcmf_err("Wrong channel for superframe\n");
1204 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1205 rd->channel != SDPCM_EVENT_CHANNEL) {
1206 brcmf_err("Wrong channel for subframe\n");
1210 rd->dat_offset = brcmf_sdio_getdatoffset(header);
1211 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1212 brcmf_err("seq %d: bad data offset\n", rx_seq);
1213 bus->sdcnt.rx_badhdr++;
1214 brcmf_sdbrcm_rxfail(bus, false, false);
1218 if (rd->seq_num != rx_seq) {
1219 brcmf_err("seq %d: sequence number error, expect %d\n",
1220 rx_seq, rd->seq_num);
1221 bus->sdcnt.rx_badseq++;
1222 rd->seq_num = rx_seq;
1224 /* no need to check the reset for subframe */
1225 if (type == BRCMF_SDIO_FT_SUB)
1227 rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1228 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1229 /* only warm for NON glom packet */
1230 if (rd->channel != SDPCM_GLOM_CHANNEL)
1231 brcmf_err("seq %d: next length error\n", rx_seq);
1234 swheader = le32_to_cpu(*(__le32 *)(header + 4));
1235 fc = swheader & SDPCM_FCMASK_MASK;
1236 if (bus->flowcontrol != fc) {
1237 if (~bus->flowcontrol & fc)
1238 bus->sdcnt.fc_xoff++;
1239 if (bus->flowcontrol & ~fc)
1240 bus->sdcnt.fc_xon++;
1241 bus->sdcnt.fc_rcvd++;
1242 bus->flowcontrol = fc;
1244 tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1245 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1246 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1247 tx_seq_max = bus->tx_seq + 2;
1249 bus->tx_max = tx_seq_max;
1254 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1256 *(__le16 *)header = cpu_to_le16(frm_length);
1257 *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1260 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1261 struct brcmf_sdio_hdrinfo *hd_info)
1265 brcmf_sdio_update_hwhdr(header, hd_info->len);
1267 sw_header = bus->tx_seq;
1268 sw_header |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1270 sw_header |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1272 *(((__le32 *)header) + 1) = cpu_to_le32(sw_header);
1273 *(((__le32 *)header) + 2) = 0;
1274 trace_brcmf_sdpcm_hdr(true, header);
1277 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1283 struct sk_buff *pfirst, *pnext;
1288 struct brcmf_sdio_hdrinfo rd_new;
1290 /* If packets, issue read(s) and send up packet chain */
1291 /* Return sequence numbers consumed? */
1293 brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1294 bus->glomd, skb_peek(&bus->glom));
1296 if (bus->sdiodev->pdata)
1297 align = bus->sdiodev->pdata->sd_sgentry_align;
1301 /* If there's a descriptor, generate the packet chain */
1303 pfirst = pnext = NULL;
1304 dlen = (u16) (bus->glomd->len);
1305 dptr = bus->glomd->data;
1306 if (!dlen || (dlen & 1)) {
1307 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1312 for (totlen = num = 0; dlen; num++) {
1313 /* Get (and move past) next length */
1314 sublen = get_unaligned_le16(dptr);
1315 dlen -= sizeof(u16);
1316 dptr += sizeof(u16);
1317 if ((sublen < SDPCM_HDRLEN) ||
1318 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1319 brcmf_err("descriptor len %d bad: %d\n",
1324 if (sublen % align) {
1325 brcmf_err("sublen %d not multiple of %d\n",
1330 /* For last frame, adjust read len so total
1331 is a block multiple */
1334 (roundup(totlen, bus->blocksize) - totlen);
1335 totlen = roundup(totlen, bus->blocksize);
1338 /* Allocate/chain packet for next subframe */
1339 pnext = brcmu_pkt_buf_get_skb(sublen + align);
1340 if (pnext == NULL) {
1341 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1345 skb_queue_tail(&bus->glom, pnext);
1347 /* Adhere to start alignment requirements */
1348 pkt_align(pnext, sublen, align);
1351 /* If all allocations succeeded, save packet chain
1354 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1356 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1357 totlen != bus->cur_read.len) {
1358 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1359 bus->cur_read.len, totlen, rxseq);
1361 pfirst = pnext = NULL;
1363 brcmf_sdbrcm_free_glom(bus);
1367 /* Done with descriptor packet */
1368 brcmu_pkt_buf_free_skb(bus->glomd);
1370 bus->cur_read.len = 0;
1373 /* Ok -- either we just generated a packet chain,
1374 or had one from before */
1375 if (!skb_queue_empty(&bus->glom)) {
1376 if (BRCMF_GLOM_ON()) {
1377 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1378 skb_queue_walk(&bus->glom, pnext) {
1379 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1380 pnext, (u8 *) (pnext->data),
1381 pnext->len, pnext->len);
1385 pfirst = skb_peek(&bus->glom);
1386 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1388 /* Do an SDIO read for the superframe. Configurable iovar to
1389 * read directly into the chained packet, or allocate a large
1390 * packet and and copy into the chain.
1392 sdio_claim_host(bus->sdiodev->func[1]);
1393 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1394 bus->sdiodev->sbwad,
1395 SDIO_FUNC_2, F2SYNC, &bus->glom, dlen);
1396 sdio_release_host(bus->sdiodev->func[1]);
1397 bus->sdcnt.f2rxdata++;
1399 /* On failure, kill the superframe, allow a couple retries */
1401 brcmf_err("glom read of %d bytes failed: %d\n",
1404 sdio_claim_host(bus->sdiodev->func[1]);
1405 if (bus->glomerr++ < 3) {
1406 brcmf_sdbrcm_rxfail(bus, true, true);
1409 brcmf_sdbrcm_rxfail(bus, true, false);
1410 bus->sdcnt.rxglomfail++;
1411 brcmf_sdbrcm_free_glom(bus);
1413 sdio_release_host(bus->sdiodev->func[1]);
1417 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1418 pfirst->data, min_t(int, pfirst->len, 48),
1421 rd_new.seq_num = rxseq;
1423 sdio_claim_host(bus->sdiodev->func[1]);
1424 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1425 BRCMF_SDIO_FT_SUPER);
1426 sdio_release_host(bus->sdiodev->func[1]);
1427 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1429 /* Remove superframe header, remember offset */
1430 skb_pull(pfirst, rd_new.dat_offset);
1431 sfdoff = rd_new.dat_offset;
1434 /* Validate all the subframe headers */
1435 skb_queue_walk(&bus->glom, pnext) {
1436 /* leave when invalid subframe is found */
1440 rd_new.len = pnext->len;
1441 rd_new.seq_num = rxseq++;
1442 sdio_claim_host(bus->sdiodev->func[1]);
1443 errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1445 sdio_release_host(bus->sdiodev->func[1]);
1446 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1447 pnext->data, 32, "subframe:\n");
1453 /* Terminate frame on error, request
1455 sdio_claim_host(bus->sdiodev->func[1]);
1456 if (bus->glomerr++ < 3) {
1457 /* Restore superframe header space */
1458 skb_push(pfirst, sfdoff);
1459 brcmf_sdbrcm_rxfail(bus, true, true);
1462 brcmf_sdbrcm_rxfail(bus, true, false);
1463 bus->sdcnt.rxglomfail++;
1464 brcmf_sdbrcm_free_glom(bus);
1466 sdio_release_host(bus->sdiodev->func[1]);
1467 bus->cur_read.len = 0;
1471 /* Basic SD framing looks ok - process each packet (header) */
1473 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1474 dptr = (u8 *) (pfirst->data);
1475 sublen = get_unaligned_le16(dptr);
1476 doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1478 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1480 "Rx Subframe Data:\n");
1482 __skb_trim(pfirst, sublen);
1483 skb_pull(pfirst, doff);
1485 if (pfirst->len == 0) {
1486 skb_unlink(pfirst, &bus->glom);
1487 brcmu_pkt_buf_free_skb(pfirst);
1491 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1493 min_t(int, pfirst->len, 32),
1494 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1495 bus->glom.qlen, pfirst, pfirst->data,
1496 pfirst->len, pfirst->next,
1498 skb_unlink(pfirst, &bus->glom);
1499 brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1500 bus->sdcnt.rxglompkts++;
1503 bus->sdcnt.rxglomframes++;
1508 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1511 DECLARE_WAITQUEUE(wait, current);
1512 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1514 /* Wait until control frame is available */
1515 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1516 set_current_state(TASK_INTERRUPTIBLE);
1518 while (!(*condition) && (!signal_pending(current) && timeout))
1519 timeout = schedule_timeout(timeout);
1521 if (signal_pending(current))
1524 set_current_state(TASK_RUNNING);
1525 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1530 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1532 if (waitqueue_active(&bus->dcmd_resp_wait))
1533 wake_up_interruptible(&bus->dcmd_resp_wait);
1538 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1541 u8 *buf = NULL, *rbuf;
1544 brcmf_dbg(TRACE, "Enter\n");
1547 buf = vzalloc(bus->rxblen);
1552 pad = ((unsigned long)rbuf % BRCMF_SDALIGN);
1554 rbuf += (BRCMF_SDALIGN - pad);
1556 /* Copy the already-read portion over */
1557 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1558 if (len <= BRCMF_FIRSTREAD)
1561 /* Raise rdlen to next SDIO block to avoid tail command */
1562 rdlen = len - BRCMF_FIRSTREAD;
1563 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1564 pad = bus->blocksize - (rdlen % bus->blocksize);
1565 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1566 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1568 } else if (rdlen % BRCMF_SDALIGN) {
1569 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1572 /* Satisfy length-alignment requirements */
1573 if (rdlen & (ALIGNMENT - 1))
1574 rdlen = roundup(rdlen, ALIGNMENT);
1576 /* Drop if the read is too big or it exceeds our maximum */
1577 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1578 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1579 rdlen, bus->sdiodev->bus_if->maxctl);
1580 brcmf_sdbrcm_rxfail(bus, false, false);
1584 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1585 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1586 len, len - doff, bus->sdiodev->bus_if->maxctl);
1587 bus->sdcnt.rx_toolong++;
1588 brcmf_sdbrcm_rxfail(bus, false, false);
1592 /* Read remain of frame body */
1593 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1594 bus->sdiodev->sbwad,
1596 F2SYNC, rbuf, rdlen);
1597 bus->sdcnt.f2rxdata++;
1599 /* Control frame failures need retransmission */
1601 brcmf_err("read %d control bytes failed: %d\n",
1603 bus->sdcnt.rxc_errors++;
1604 brcmf_sdbrcm_rxfail(bus, true, true);
1607 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1611 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1612 buf, len, "RxCtrl:\n");
1614 /* Point to valid data and indicate its length */
1615 spin_lock_bh(&bus->rxctl_lock);
1617 brcmf_err("last control frame is being processed.\n");
1618 spin_unlock_bh(&bus->rxctl_lock);
1622 bus->rxctl = buf + doff;
1623 bus->rxctl_orig = buf;
1624 bus->rxlen = len - doff;
1625 spin_unlock_bh(&bus->rxctl_lock);
1628 /* Awake any waiters */
1629 brcmf_sdbrcm_dcmd_resp_wake(bus);
1632 /* Pad read to blocksize for efficiency */
1633 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1635 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1636 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1637 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1638 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1640 } else if (*rdlen % BRCMF_SDALIGN) {
1641 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1645 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1647 struct sk_buff *pkt; /* Packet for event or data frames */
1648 u16 pad; /* Number of pad bytes to read */
1649 uint rxleft = 0; /* Remaining number of frames allowed */
1650 int ret; /* Return code from calls */
1651 uint rxcount = 0; /* Total frames read */
1652 struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1655 brcmf_dbg(TRACE, "Enter\n");
1657 /* Not finished unless we encounter no more frames indication */
1658 bus->rxpending = true;
1660 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1661 !bus->rxskip && rxleft &&
1662 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1663 rd->seq_num++, rxleft--) {
1665 /* Handle glomming separately */
1666 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1668 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1669 bus->glomd, skb_peek(&bus->glom));
1670 cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1671 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1672 rd->seq_num += cnt - 1;
1673 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1677 rd->len_left = rd->len;
1678 /* read header first for unknow frame length */
1679 sdio_claim_host(bus->sdiodev->func[1]);
1681 ret = brcmf_sdcard_recv_buf(bus->sdiodev,
1682 bus->sdiodev->sbwad,
1683 SDIO_FUNC_2, F2SYNC,
1686 bus->sdcnt.f2rxhdrs++;
1688 brcmf_err("RXHEADER FAILED: %d\n",
1690 bus->sdcnt.rx_hdrfail++;
1691 brcmf_sdbrcm_rxfail(bus, true, true);
1692 sdio_release_host(bus->sdiodev->func[1]);
1696 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1697 bus->rxhdr, SDPCM_HDRLEN,
1700 if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1701 BRCMF_SDIO_FT_NORMAL)) {
1702 sdio_release_host(bus->sdiodev->func[1]);
1703 if (!bus->rxpending)
1709 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1710 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1713 /* prepare the descriptor for the next read */
1714 rd->len = rd->len_nxtfrm << 4;
1716 /* treat all packet as event if we don't know */
1717 rd->channel = SDPCM_EVENT_CHANNEL;
1718 sdio_release_host(bus->sdiodev->func[1]);
1721 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1722 rd->len - BRCMF_FIRSTREAD : 0;
1723 head_read = BRCMF_FIRSTREAD;
1726 brcmf_pad(bus, &pad, &rd->len_left);
1728 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1731 /* Give up on data, request rtx of events */
1732 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1733 brcmf_sdbrcm_rxfail(bus, false,
1734 RETRYCHAN(rd->channel));
1735 sdio_release_host(bus->sdiodev->func[1]);
1738 skb_pull(pkt, head_read);
1739 pkt_align(pkt, rd->len_left, BRCMF_SDALIGN);
1741 ret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1742 SDIO_FUNC_2, F2SYNC, pkt);
1743 bus->sdcnt.f2rxdata++;
1744 sdio_release_host(bus->sdiodev->func[1]);
1747 brcmf_err("read %d bytes from channel %d failed: %d\n",
1748 rd->len, rd->channel, ret);
1749 brcmu_pkt_buf_free_skb(pkt);
1750 sdio_claim_host(bus->sdiodev->func[1]);
1751 brcmf_sdbrcm_rxfail(bus, true,
1752 RETRYCHAN(rd->channel));
1753 sdio_release_host(bus->sdiodev->func[1]);
1758 skb_push(pkt, head_read);
1759 memcpy(pkt->data, bus->rxhdr, head_read);
1762 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1763 rd_new.seq_num = rd->seq_num;
1764 sdio_claim_host(bus->sdiodev->func[1]);
1765 if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1766 BRCMF_SDIO_FT_NORMAL)) {
1768 brcmu_pkt_buf_free_skb(pkt);
1770 bus->sdcnt.rx_readahead_cnt++;
1771 if (rd->len != roundup(rd_new.len, 16)) {
1772 brcmf_err("frame length mismatch:read %d, should be %d\n",
1774 roundup(rd_new.len, 16) >> 4);
1776 brcmf_sdbrcm_rxfail(bus, true, true);
1777 sdio_release_host(bus->sdiodev->func[1]);
1778 brcmu_pkt_buf_free_skb(pkt);
1781 sdio_release_host(bus->sdiodev->func[1]);
1782 rd->len_nxtfrm = rd_new.len_nxtfrm;
1783 rd->channel = rd_new.channel;
1784 rd->dat_offset = rd_new.dat_offset;
1786 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1789 bus->rxhdr, SDPCM_HDRLEN,
1792 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1793 brcmf_err("readahead on control packet %d?\n",
1795 /* Force retry w/normal header read */
1797 sdio_claim_host(bus->sdiodev->func[1]);
1798 brcmf_sdbrcm_rxfail(bus, false, true);
1799 sdio_release_host(bus->sdiodev->func[1]);
1800 brcmu_pkt_buf_free_skb(pkt);
1805 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1806 pkt->data, rd->len, "Rx Data:\n");
1808 /* Save superframe descriptor and allocate packet frame */
1809 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1810 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1811 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1813 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1816 __skb_trim(pkt, rd->len);
1817 skb_pull(pkt, SDPCM_HDRLEN);
1820 brcmf_err("%s: glom superframe w/o "
1821 "descriptor!\n", __func__);
1822 sdio_claim_host(bus->sdiodev->func[1]);
1823 brcmf_sdbrcm_rxfail(bus, false, false);
1824 sdio_release_host(bus->sdiodev->func[1]);
1826 /* prepare the descriptor for the next read */
1827 rd->len = rd->len_nxtfrm << 4;
1829 /* treat all packet as event if we don't know */
1830 rd->channel = SDPCM_EVENT_CHANNEL;
1834 /* Fill in packet len and prio, deliver upward */
1835 __skb_trim(pkt, rd->len);
1836 skb_pull(pkt, rd->dat_offset);
1838 /* prepare the descriptor for the next read */
1839 rd->len = rd->len_nxtfrm << 4;
1841 /* treat all packet as event if we don't know */
1842 rd->channel = SDPCM_EVENT_CHANNEL;
1844 if (pkt->len == 0) {
1845 brcmu_pkt_buf_free_skb(pkt);
1849 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1852 rxcount = maxframes - rxleft;
1853 /* Message if we hit the limit */
1855 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1857 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1858 /* Back off rxseq if awaiting rtx, update rx_seq */
1861 bus->rx_seq = rd->seq_num;
1867 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1869 if (waitqueue_active(&bus->ctrl_wait))
1870 wake_up_interruptible(&bus->ctrl_wait);
1875 * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1878 /* flag marking a dummy skb added for DMA alignment requirement */
1879 #define ALIGN_SKB_FLAG 0x8000
1880 /* bit mask of data length chopped from the previous packet */
1881 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1883 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio_dev *sdiodev,
1884 struct sk_buff_head *pktq,
1885 struct sk_buff *pkt, uint chan)
1887 struct sk_buff *pkt_pad;
1888 u16 tail_pad, tail_chop, sg_align;
1889 unsigned int blksize;
1893 blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1895 if (sdiodev->pdata && sdiodev->pdata->sd_sgentry_align > 4)
1896 sg_align = sdiodev->pdata->sd_sgentry_align;
1897 /* sg entry alignment should be a divisor of block size */
1898 WARN_ON(blksize % sg_align);
1900 /* Check tail padding */
1902 tail_chop = pkt->len % sg_align;
1903 tail_pad = sg_align - tail_chop;
1904 tail_pad += blksize - (pkt->len + tail_pad) % blksize;
1905 if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
1906 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop);
1907 if (pkt_pad == NULL)
1909 memcpy(pkt_pad->data,
1910 pkt->data + pkt->len - tail_chop,
1912 *(u32 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
1913 skb_trim(pkt, pkt->len - tail_chop);
1914 __skb_queue_after(pktq, pkt, pkt_pad);
1916 ntail = pkt->data_len + tail_pad -
1917 (pkt->end - pkt->tail);
1918 if (skb_cloned(pkt) || ntail > 0)
1919 if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
1921 if (skb_linearize(pkt))
1923 dat_buf = (u8 *)(pkt->data);
1924 __skb_put(pkt, tail_pad);
1928 return pkt->len + tail_chop;
1930 return pkt->len - tail_pad;
1934 * brcmf_sdio_txpkt_prep - packet preparation for transmit
1935 * @bus: brcmf_sdio structure pointer
1936 * @pktq: packet list pointer
1937 * @chan: virtual channel to transmit the packet
1939 * Processes to be applied to the packet
1940 * - Align data buffer pointer
1941 * - Align data buffer length
1943 * Return: negative value if there is error
1946 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
1949 u16 head_pad, head_align;
1950 struct sk_buff *pkt_next;
1953 struct brcmf_sdio_hdrinfo hd_info = {0};
1955 /* SDIO ADMA requires at least 32 bit alignment */
1957 if (bus->sdiodev->pdata && bus->sdiodev->pdata->sd_head_align > 4)
1958 head_align = bus->sdiodev->pdata->sd_head_align;
1960 pkt_next = pktq->next;
1961 dat_buf = (u8 *)(pkt_next->data);
1963 /* Check head padding */
1964 head_pad = ((unsigned long)dat_buf % head_align);
1966 if (skb_headroom(pkt_next) < head_pad) {
1967 bus->sdiodev->bus_if->tx_realloc++;
1969 if (skb_cow(pkt_next, head_pad))
1972 skb_push(pkt_next, head_pad);
1973 dat_buf = (u8 *)(pkt_next->data);
1974 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1977 if (bus->sdiodev->sg_support && pktq->qlen > 1) {
1978 err = brcmf_sdio_txpkt_prep_sg(bus->sdiodev, pktq,
1982 hd_info.len = (u16)err;
1984 hd_info.len = pkt_next->len;
1987 hd_info.channel = chan;
1988 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
1990 /* Now fill the header */
1991 brcmf_sdio_hdpack(bus, dat_buf, &hd_info);
1993 if (BRCMF_BYTES_ON() &&
1994 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
1995 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
1996 brcmf_dbg_hex_dump(true, pkt_next, hd_info.len, "Tx Frame:\n");
1997 else if (BRCMF_HDRS_ON())
1998 brcmf_dbg_hex_dump(true, pkt_next, head_pad + bus->tx_hdrlen,
2005 * brcmf_sdio_txpkt_postp - packet post processing for transmit
2006 * @bus: brcmf_sdio structure pointer
2007 * @pktq: packet list pointer
2009 * Processes to be applied to the packet
2010 * - Remove head padding
2011 * - Remove tail padding
2014 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2018 u32 dummy_flags, chop_len;
2019 struct sk_buff *pkt_next, *tmp, *pkt_prev;
2021 skb_queue_walk_safe(pktq, pkt_next, tmp) {
2022 dummy_flags = *(u32 *)(pkt_next->cb);
2023 if (dummy_flags & ALIGN_SKB_FLAG) {
2024 chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2026 pkt_prev = pkt_next->prev;
2027 memcpy(pkt_prev->data + pkt_prev->len,
2028 pkt_next->data, chop_len);
2029 skb_put(pkt_prev, chop_len);
2031 __skb_unlink(pkt_next, pktq);
2032 brcmu_pkt_buf_free_skb(pkt_next);
2034 hdr = pkt_next->data + SDPCM_HWHDR_LEN;
2035 dat_offset = le32_to_cpu(*(__le32 *)hdr);
2036 dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2037 SDPCM_DOFFSET_SHIFT;
2038 skb_pull(pkt_next, dat_offset);
2043 /* Writes a HW/SW header into the packet and sends it. */
2044 /* Assumes: (a) header space already there, (b) caller holds lock */
2045 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
2050 struct sk_buff_head localq;
2052 brcmf_dbg(TRACE, "Enter\n");
2054 __skb_queue_head_init(&localq);
2055 __skb_queue_tail(&localq, pkt);
2056 ret = brcmf_sdio_txpkt_prep(bus, &localq, chan);
2060 sdio_claim_host(bus->sdiodev->func[1]);
2061 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2062 SDIO_FUNC_2, F2SYNC, &localq);
2063 bus->sdcnt.f2txdata++;
2066 /* On failure, abort the command and terminate the frame */
2067 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2069 bus->sdcnt.tx_sderrs++;
2071 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2072 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2074 bus->sdcnt.f1regdata++;
2076 for (i = 0; i < 3; i++) {
2078 hi = brcmf_sdio_regrb(bus->sdiodev,
2079 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2080 lo = brcmf_sdio_regrb(bus->sdiodev,
2081 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2082 bus->sdcnt.f1regdata += 2;
2083 if ((hi == 0) && (lo == 0))
2088 sdio_release_host(bus->sdiodev->func[1]);
2090 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2093 brcmf_sdio_txpkt_postp(bus, &localq);
2094 __skb_dequeue_tail(&localq);
2095 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret == 0);
2099 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2101 struct sk_buff *pkt;
2103 int ret = 0, prec_out;
2107 brcmf_dbg(TRACE, "Enter\n");
2109 tx_prec_map = ~bus->flowcontrol;
2111 /* Send frames until the limit or some other event */
2112 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2113 spin_lock_bh(&bus->txqlock);
2114 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2116 spin_unlock_bh(&bus->txqlock);
2119 spin_unlock_bh(&bus->txqlock);
2121 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL);
2123 /* In poll mode, need to check for other events */
2124 if (!bus->intr && cnt) {
2125 /* Check device status, signal pending interrupt */
2126 sdio_claim_host(bus->sdiodev->func[1]);
2127 ret = r_sdreg32(bus, &intstatus,
2128 offsetof(struct sdpcmd_regs,
2130 sdio_release_host(bus->sdiodev->func[1]);
2131 bus->sdcnt.f2txdata++;
2134 if (intstatus & bus->hostintmask)
2135 atomic_set(&bus->ipend, 1);
2139 /* Deflow-control stack if needed */
2140 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2141 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2143 brcmf_txflowblock(bus->sdiodev->dev, false);
2149 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2151 u32 local_hostintmask;
2154 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2155 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2156 struct brcmf_sdio *bus = sdiodev->bus;
2158 brcmf_dbg(TRACE, "Enter\n");
2160 if (bus->watchdog_tsk) {
2161 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2162 kthread_stop(bus->watchdog_tsk);
2163 bus->watchdog_tsk = NULL;
2166 sdio_claim_host(bus->sdiodev->func[1]);
2168 /* Enable clock for device interrupts */
2169 brcmf_sdbrcm_bus_sleep(bus, false, false);
2171 /* Disable and clear interrupts at the chip level also */
2172 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2173 local_hostintmask = bus->hostintmask;
2174 bus->hostintmask = 0;
2176 /* Change our idea of bus state */
2177 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2179 /* Force clocks on backplane to be sure F2 interrupt propagates */
2180 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2181 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2183 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2184 (saveclk | SBSDIO_FORCE_HT), &err);
2187 brcmf_err("Failed to force clock for F2: err %d\n", err);
2189 /* Turn off the bus (F2), free any pending packets */
2190 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2191 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2194 /* Clear any pending interrupts now that F2 is disabled */
2195 w_sdreg32(bus, local_hostintmask,
2196 offsetof(struct sdpcmd_regs, intstatus));
2198 /* Turn off the backplane clock (only) */
2199 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2200 sdio_release_host(bus->sdiodev->func[1]);
2202 /* Clear the data packet queues */
2203 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2205 /* Clear any held glomming stuff */
2207 brcmu_pkt_buf_free_skb(bus->glomd);
2208 brcmf_sdbrcm_free_glom(bus);
2210 /* Clear rx control and wake any waiters */
2211 spin_lock_bh(&bus->rxctl_lock);
2213 spin_unlock_bh(&bus->rxctl_lock);
2214 brcmf_sdbrcm_dcmd_resp_wake(bus);
2216 /* Reset some F2 state stuff */
2217 bus->rxskip = false;
2218 bus->tx_seq = bus->rx_seq = 0;
2221 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2223 unsigned long flags;
2225 if (bus->sdiodev->oob_irq_requested) {
2226 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2227 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2228 enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2229 bus->sdiodev->irq_en = true;
2231 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2235 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2242 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2243 addr = bus->ci->c_inf[idx].base +
2244 offsetof(struct sdpcmd_regs, intstatus);
2246 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2247 bus->sdcnt.f1regdata++;
2251 val &= bus->hostintmask;
2252 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2254 /* Clear interrupts */
2256 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2257 bus->sdcnt.f1regdata++;
2261 atomic_set(&bus->intstatus, 0);
2263 for_each_set_bit(n, &val, 32)
2264 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2270 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2273 unsigned long intstatus;
2274 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2275 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2276 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2279 brcmf_dbg(TRACE, "Enter\n");
2281 sdio_claim_host(bus->sdiodev->func[1]);
2283 /* If waiting for HTAVAIL, check status */
2284 if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2285 u8 clkctl, devctl = 0;
2288 /* Check for inconsistent device control */
2289 devctl = brcmf_sdio_regrb(bus->sdiodev,
2290 SBSDIO_DEVICE_CTL, &err);
2292 brcmf_err("error reading DEVCTL: %d\n", err);
2293 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2297 /* Read CSR, if clock on switch to AVAIL, else ignore */
2298 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2299 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2301 brcmf_err("error reading CSR: %d\n",
2303 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2306 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2309 if (SBSDIO_HTAV(clkctl)) {
2310 devctl = brcmf_sdio_regrb(bus->sdiodev,
2311 SBSDIO_DEVICE_CTL, &err);
2313 brcmf_err("error reading DEVCTL: %d\n",
2315 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2317 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2318 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2321 brcmf_err("error writing DEVCTL: %d\n",
2323 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2325 bus->clkstate = CLK_AVAIL;
2329 /* Make sure backplane clock is on */
2330 brcmf_sdbrcm_bus_sleep(bus, false, true);
2332 /* Pending interrupt indicates new device status */
2333 if (atomic_read(&bus->ipend) > 0) {
2334 atomic_set(&bus->ipend, 0);
2335 err = brcmf_sdio_intr_rstatus(bus);
2338 /* Start with leftover status bits */
2339 intstatus = atomic_xchg(&bus->intstatus, 0);
2341 /* Handle flow-control change: read new state in case our ack
2342 * crossed another change interrupt. If change still set, assume
2343 * FC ON for safety, let next loop through do the debounce.
2345 if (intstatus & I_HMB_FC_CHANGE) {
2346 intstatus &= ~I_HMB_FC_CHANGE;
2347 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2348 offsetof(struct sdpcmd_regs, intstatus));
2350 err = r_sdreg32(bus, &newstatus,
2351 offsetof(struct sdpcmd_regs, intstatus));
2352 bus->sdcnt.f1regdata += 2;
2353 atomic_set(&bus->fcstate,
2354 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2355 intstatus |= (newstatus & bus->hostintmask);
2358 /* Handle host mailbox indication */
2359 if (intstatus & I_HMB_HOST_INT) {
2360 intstatus &= ~I_HMB_HOST_INT;
2361 intstatus |= brcmf_sdbrcm_hostmail(bus);
2364 sdio_release_host(bus->sdiodev->func[1]);
2366 /* Generally don't ask for these, can get CRC errors... */
2367 if (intstatus & I_WR_OOSYNC) {
2368 brcmf_err("Dongle reports WR_OOSYNC\n");
2369 intstatus &= ~I_WR_OOSYNC;
2372 if (intstatus & I_RD_OOSYNC) {
2373 brcmf_err("Dongle reports RD_OOSYNC\n");
2374 intstatus &= ~I_RD_OOSYNC;
2377 if (intstatus & I_SBINT) {
2378 brcmf_err("Dongle reports SBINT\n");
2379 intstatus &= ~I_SBINT;
2382 /* Would be active due to wake-wlan in gSPI */
2383 if (intstatus & I_CHIPACTIVE) {
2384 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2385 intstatus &= ~I_CHIPACTIVE;
2388 /* Ignore frame indications if rxskip is set */
2390 intstatus &= ~I_HMB_FRAME_IND;
2392 /* On frame indication, read available frames */
2393 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2394 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2395 if (!bus->rxpending)
2396 intstatus &= ~I_HMB_FRAME_IND;
2397 rxlimit -= min(framecnt, rxlimit);
2400 /* Keep still-pending events for next scheduling */
2402 for_each_set_bit(n, &intstatus, 32)
2403 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2406 brcmf_sdbrcm_clrintr(bus);
2408 if (data_ok(bus) && bus->ctrl_frame_stat &&
2409 (bus->clkstate == CLK_AVAIL)) {
2412 sdio_claim_host(bus->sdiodev->func[1]);
2413 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2414 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2415 (u32) bus->ctrl_frame_len);
2418 /* On failure, abort the command and
2419 terminate the frame */
2420 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2422 bus->sdcnt.tx_sderrs++;
2424 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2426 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2428 bus->sdcnt.f1regdata++;
2430 for (i = 0; i < 3; i++) {
2432 hi = brcmf_sdio_regrb(bus->sdiodev,
2433 SBSDIO_FUNC1_WFRAMEBCHI,
2435 lo = brcmf_sdio_regrb(bus->sdiodev,
2436 SBSDIO_FUNC1_WFRAMEBCLO,
2438 bus->sdcnt.f1regdata += 2;
2439 if ((hi == 0) && (lo == 0))
2444 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2446 sdio_release_host(bus->sdiodev->func[1]);
2447 bus->ctrl_frame_stat = false;
2448 brcmf_sdbrcm_wait_event_wakeup(bus);
2450 /* Send queued frames (limit 1 if rx may still be pending) */
2451 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2452 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2454 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2456 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2457 txlimit -= framecnt;
2460 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2461 brcmf_err("failed backplane access over SDIO, halting operation\n");
2462 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2463 atomic_set(&bus->intstatus, 0);
2464 } else if (atomic_read(&bus->intstatus) ||
2465 atomic_read(&bus->ipend) > 0 ||
2466 (!atomic_read(&bus->fcstate) &&
2467 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2468 data_ok(bus)) || PKT_AVAILABLE()) {
2469 atomic_inc(&bus->dpc_tskcnt);
2472 /* If we're done for now, turn off clock request. */
2473 if ((bus->clkstate != CLK_PENDING)
2474 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2475 bus->activity = false;
2476 brcmf_dbg(SDIO, "idle state\n");
2477 sdio_claim_host(bus->sdiodev->func[1]);
2478 brcmf_sdbrcm_bus_sleep(bus, true, false);
2479 sdio_release_host(bus->sdiodev->func[1]);
2483 static struct pktq *brcmf_sdbrcm_bus_gettxq(struct device *dev)
2485 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2486 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2487 struct brcmf_sdio *bus = sdiodev->bus;
2492 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2496 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2497 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2498 struct brcmf_sdio *bus = sdiodev->bus;
2501 brcmf_dbg(TRACE, "Enter\n");
2505 /* Add space for the header */
2506 skb_push(pkt, bus->tx_hdrlen);
2507 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2509 prec = prio2prec((pkt->priority & PRIOMASK));
2511 /* Check for existing queue, current flow-control,
2512 pending event, or pending clock */
2513 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2514 bus->sdcnt.fcqueued++;
2516 /* Priority based enq */
2517 spin_lock_irqsave(&bus->txqlock, flags);
2518 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2519 skb_pull(pkt, bus->tx_hdrlen);
2520 brcmf_err("out of bus->txq !!!\n");
2526 if (pktq_len(&bus->txq) >= TXHI) {
2528 brcmf_txflowblock(bus->sdiodev->dev, true);
2530 spin_unlock_irqrestore(&bus->txqlock, flags);
2533 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2534 qcount[prec] = pktq_plen(&bus->txq, prec);
2537 if (atomic_read(&bus->dpc_tskcnt) == 0) {
2538 atomic_inc(&bus->dpc_tskcnt);
2539 queue_work(bus->brcmf_wq, &bus->datawork);
2546 #define CONSOLE_LINE_MAX 192
2548 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2550 struct brcmf_console *c = &bus->console;
2551 u8 line[CONSOLE_LINE_MAX], ch;
2555 /* Don't do anything until FWREADY updates console address */
2556 if (bus->console_addr == 0)
2559 /* Read console log struct */
2560 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2561 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2566 /* Allocate console buffer (one time only) */
2567 if (c->buf == NULL) {
2568 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2569 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2574 idx = le32_to_cpu(c->log_le.idx);
2576 /* Protect against corrupt value */
2577 if (idx > c->bufsize)
2580 /* Skip reading the console buffer if the index pointer
2585 /* Read the console buffer */
2586 addr = le32_to_cpu(c->log_le.buf);
2587 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2591 while (c->last != idx) {
2592 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2593 if (c->last == idx) {
2594 /* This would output a partial line.
2596 * the buffer pointer and output this
2597 * line next time around.
2602 c->last = c->bufsize - n;
2605 ch = c->buf[c->last];
2606 c->last = (c->last + 1) % c->bufsize;
2613 if (line[n - 1] == '\r')
2616 pr_debug("CONSOLE: %s\n", line);
2625 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2630 bus->ctrl_frame_stat = false;
2631 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2632 SDIO_FUNC_2, F2SYNC, frame, len);
2635 /* On failure, abort the command and terminate the frame */
2636 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2638 bus->sdcnt.tx_sderrs++;
2640 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2642 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2644 bus->sdcnt.f1regdata++;
2646 for (i = 0; i < 3; i++) {
2648 hi = brcmf_sdio_regrb(bus->sdiodev,
2649 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2650 lo = brcmf_sdio_regrb(bus->sdiodev,
2651 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2652 bus->sdcnt.f1regdata += 2;
2653 if (hi == 0 && lo == 0)
2659 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2665 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2672 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2673 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2674 struct brcmf_sdio *bus = sdiodev->bus;
2675 struct brcmf_sdio_hdrinfo hd_info = {0};
2677 brcmf_dbg(TRACE, "Enter\n");
2679 /* Back the pointer to make a room for bus header */
2680 frame = msg - bus->tx_hdrlen;
2681 len = (msglen += bus->tx_hdrlen);
2683 /* Add alignment padding (optional for ctl frames) */
2684 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2689 memset(frame, 0, doff + bus->tx_hdrlen);
2691 /* precondition: doff < BRCMF_SDALIGN */
2692 doff += bus->tx_hdrlen;
2694 /* Round send length to next SDIO block */
2695 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2696 u16 pad = bus->blocksize - (len % bus->blocksize);
2697 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2699 } else if (len % BRCMF_SDALIGN) {
2700 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2703 /* Satisfy length-alignment requirements */
2704 if (len & (ALIGNMENT - 1))
2705 len = roundup(len, ALIGNMENT);
2707 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2709 /* Make sure backplane clock is on */
2710 sdio_claim_host(bus->sdiodev->func[1]);
2711 brcmf_sdbrcm_bus_sleep(bus, false, false);
2712 sdio_release_host(bus->sdiodev->func[1]);
2714 hd_info.len = (u16)msglen;
2715 hd_info.channel = SDPCM_CONTROL_CHANNEL;
2716 hd_info.dat_offset = doff;
2717 brcmf_sdio_hdpack(bus, frame, &hd_info);
2719 if (!data_ok(bus)) {
2720 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2721 bus->tx_max, bus->tx_seq);
2722 bus->ctrl_frame_stat = true;
2724 bus->ctrl_frame_buf = frame;
2725 bus->ctrl_frame_len = len;
2727 wait_event_interruptible_timeout(bus->ctrl_wait,
2728 !bus->ctrl_frame_stat,
2729 msecs_to_jiffies(2000));
2731 if (!bus->ctrl_frame_stat) {
2732 brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2735 brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2741 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2742 frame, len, "Tx Frame:\n");
2743 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2745 frame, min_t(u16, len, 16), "TxHdr:\n");
2748 sdio_claim_host(bus->sdiodev->func[1]);
2749 ret = brcmf_tx_frame(bus, frame, len);
2750 sdio_release_host(bus->sdiodev->func[1]);
2751 } while (ret < 0 && retries++ < TXRETRIES);
2754 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2755 atomic_read(&bus->dpc_tskcnt) == 0) {
2756 bus->activity = false;
2757 sdio_claim_host(bus->sdiodev->func[1]);
2758 brcmf_dbg(INFO, "idle\n");
2759 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2760 sdio_release_host(bus->sdiodev->func[1]);
2764 bus->sdcnt.tx_ctlerrs++;
2766 bus->sdcnt.tx_ctlpkts++;
2768 return ret ? -EIO : 0;
2772 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2774 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2777 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2778 struct sdpcm_shared *sh)
2783 struct sdpcm_shared_le sh_le;
2786 shaddr = bus->ci->rambase + bus->ramsize - 4;
2789 * Read last word in socram to determine
2790 * address of sdpcm_shared structure
2792 sdio_claim_host(bus->sdiodev->func[1]);
2793 brcmf_sdbrcm_bus_sleep(bus, false, false);
2794 rv = brcmf_sdio_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2795 sdio_release_host(bus->sdiodev->func[1]);
2799 addr = le32_to_cpu(addr_le);
2801 brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2804 * Check if addr is valid.
2805 * NVRAM length at the end of memory should have been overwritten.
2807 if (!brcmf_sdio_valid_shared_address(addr)) {
2808 brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2813 /* Read hndrte_shared structure */
2814 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2815 sizeof(struct sdpcm_shared_le));
2820 sh->flags = le32_to_cpu(sh_le.flags);
2821 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2822 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2823 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2824 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2825 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2826 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2828 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2829 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2830 SDPCM_SHARED_VERSION,
2831 sh->flags & SDPCM_SHARED_VERSION_MASK);
2838 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2839 struct sdpcm_shared *sh, char __user *data,
2842 u32 addr, console_ptr, console_size, console_index;
2843 char *conbuf = NULL;
2849 /* obtain console information from device memory */
2850 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2851 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2852 (u8 *)&sh_val, sizeof(u32));
2855 console_ptr = le32_to_cpu(sh_val);
2857 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2858 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2859 (u8 *)&sh_val, sizeof(u32));
2862 console_size = le32_to_cpu(sh_val);
2864 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2865 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2866 (u8 *)&sh_val, sizeof(u32));
2869 console_index = le32_to_cpu(sh_val);
2871 /* allocate buffer for console data */
2872 if (console_size <= CONSOLE_BUFFER_MAX)
2873 conbuf = vzalloc(console_size+1);
2878 /* obtain the console data from device */
2879 conbuf[console_size] = '\0';
2880 rv = brcmf_sdio_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2885 rv = simple_read_from_buffer(data, count, &pos,
2886 conbuf + console_index,
2887 console_size - console_index);
2892 if (console_index > 0) {
2894 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2895 conbuf, console_index - 1);
2905 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2906 char __user *data, size_t count)
2910 struct brcmf_trap_info tr;
2913 if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2914 brcmf_dbg(INFO, "no trap in firmware\n");
2918 error = brcmf_sdio_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2919 sizeof(struct brcmf_trap_info));
2923 res = scnprintf(buf, sizeof(buf),
2924 "dongle trap info: type 0x%x @ epc 0x%08x\n"
2925 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2926 " lr 0x%08x pc 0x%08x offset 0x%x\n"
2927 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
2928 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
2929 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2930 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2931 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2932 le32_to_cpu(tr.pc), sh->trap_addr,
2933 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2934 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2935 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2936 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2938 return simple_read_from_buffer(data, count, &pos, buf, res);
2941 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
2942 struct sdpcm_shared *sh, char __user *data,
2947 char file[80] = "?";
2948 char expr[80] = "<???>";
2952 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2953 brcmf_dbg(INFO, "firmware not built with -assert\n");
2955 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2956 brcmf_dbg(INFO, "no assert in dongle\n");
2960 sdio_claim_host(bus->sdiodev->func[1]);
2961 if (sh->assert_file_addr != 0) {
2962 error = brcmf_sdio_ramrw(bus->sdiodev, false,
2963 sh->assert_file_addr, (u8 *)file, 80);
2967 if (sh->assert_exp_addr != 0) {
2968 error = brcmf_sdio_ramrw(bus->sdiodev, false,
2969 sh->assert_exp_addr, (u8 *)expr, 80);
2973 sdio_release_host(bus->sdiodev->func[1]);
2975 res = scnprintf(buf, sizeof(buf),
2976 "dongle assert: %s:%d: assert(%s)\n",
2977 file, sh->assert_line, expr);
2978 return simple_read_from_buffer(data, count, &pos, buf, res);
2981 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
2984 struct sdpcm_shared sh;
2986 error = brcmf_sdio_readshared(bus, &sh);
2991 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
2992 brcmf_dbg(INFO, "firmware not built with -assert\n");
2993 else if (sh.flags & SDPCM_SHARED_ASSERT)
2994 brcmf_err("assertion in dongle\n");
2996 if (sh.flags & SDPCM_SHARED_TRAP)
2997 brcmf_err("firmware trap in dongle\n");
3002 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
3003 size_t count, loff_t *ppos)
3006 struct sdpcm_shared sh;
3013 error = brcmf_sdio_readshared(bus, &sh);
3017 error = brcmf_sdio_assert_info(bus, &sh, data, count);
3022 error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3027 error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3038 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3039 size_t count, loff_t *ppos)
3041 struct brcmf_sdio *bus = f->private_data;
3044 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
3047 return (ssize_t)res;
3050 static const struct file_operations brcmf_sdio_forensic_ops = {
3051 .owner = THIS_MODULE,
3052 .open = simple_open,
3053 .read = brcmf_sdio_forensic_read
3056 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3058 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3059 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3061 if (IS_ERR_OR_NULL(dentry))
3064 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3065 &brcmf_sdio_forensic_ops);
3066 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3069 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3074 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3080 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3086 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3087 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3088 struct brcmf_sdio *bus = sdiodev->bus;
3090 brcmf_dbg(TRACE, "Enter\n");
3092 /* Wait until control frame is available */
3093 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3095 spin_lock_bh(&bus->rxctl_lock);
3097 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3099 buf = bus->rxctl_orig;
3100 bus->rxctl_orig = NULL;
3102 spin_unlock_bh(&bus->rxctl_lock);
3106 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3108 } else if (timeleft == 0) {
3109 brcmf_err("resumed on timeout\n");
3110 brcmf_sdbrcm_checkdied(bus);
3111 } else if (pending) {
3112 brcmf_dbg(CTL, "cancelled\n");
3113 return -ERESTARTSYS;
3115 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3116 brcmf_sdbrcm_checkdied(bus);
3120 bus->sdcnt.rx_ctlpkts++;
3122 bus->sdcnt.rx_ctlerrs++;
3124 return rxlen ? (int)rxlen : -ETIMEDOUT;
3127 static bool brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3129 struct chip_info *ci = bus->ci;
3131 /* To enter download state, disable ARM and reset SOCRAM.
3132 * To exit download state, simply reset ARM (default is RAM boot).
3135 bus->alp_only = true;
3137 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
3139 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci, bus->vars,
3143 /* Allow HT Clock now that the ARM is running. */
3144 bus->alp_only = false;
3146 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3152 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3154 const struct firmware *fw;
3160 fw = brcmf_sdbrcm_get_fw(bus, BRCMF_FIRMWARE_BIN);
3164 if (brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4) !=
3166 memcpy(&bus->ci->rst_vec, fw->data, sizeof(bus->ci->rst_vec));
3170 address = bus->ci->rambase;
3171 while (offset < fw->size) {
3172 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3174 err = brcmf_sdio_ramrw(bus->sdiodev, true, address,
3175 (u8 *)&fw->data[offset], len);
3177 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3186 release_firmware(fw);
3192 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3193 * and ending in a NUL.
3194 * Removes carriage returns, empty lines, comment lines, and converts
3196 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3200 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus,
3201 const struct firmware *nv)
3208 uint buf_len, n, len;
3211 varbuf = vmalloc(len);
3215 memcpy(varbuf, nv->data, len);
3218 findNewline = false;
3221 for (n = 0; n < len; n++) {
3224 if (varbuf[n] == '\r')
3226 if (findNewline && varbuf[n] != '\n')
3228 findNewline = false;
3229 if (varbuf[n] == '#') {
3233 if (varbuf[n] == '\n') {
3243 buf_len = dp - varbuf;
3244 while (dp < varbuf + n)
3248 /* roundup needed for download to device */
3249 bus->varsz = roundup(buf_len + 1, 4);
3250 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3251 if (bus->vars == NULL) {
3257 /* copy the processed variables and add null termination */
3258 memcpy(bus->vars, varbuf, buf_len);
3259 bus->vars[buf_len] = 0;
3265 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3267 const struct firmware *nv;
3270 nv = brcmf_sdbrcm_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3274 ret = brcmf_process_nvram_vars(bus, nv);
3276 release_firmware(nv);
3281 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3285 /* Keep arm in reset */
3286 if (!brcmf_sdbrcm_download_state(bus, true)) {
3287 brcmf_err("error placing ARM core in reset\n");
3291 if (brcmf_sdbrcm_download_code_file(bus)) {
3292 brcmf_err("dongle image file download failed\n");
3296 if (brcmf_sdbrcm_download_nvram(bus)) {
3297 brcmf_err("dongle nvram file download failed\n");
3301 /* Take arm out of reset */
3302 if (!brcmf_sdbrcm_download_state(bus, false)) {
3303 brcmf_err("error getting out of ARM core reset\n");
3313 static bool brcmf_sdbrcm_sr_capable(struct brcmf_sdio *bus)
3317 brcmf_dbg(TRACE, "Enter\n");
3319 /* old chips with PMU version less than 17 don't support save restore */
3320 if (bus->ci->pmurev < 17)
3323 /* read PMU chipcontrol register 3*/
3324 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3325 brcmf_sdio_regwl(bus->sdiodev, addr, 3, NULL);
3326 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3327 reg = brcmf_sdio_regrl(bus->sdiodev, addr, NULL);
3332 static void brcmf_sdbrcm_sr_init(struct brcmf_sdio *bus)
3337 brcmf_dbg(TRACE, "Enter\n");
3339 val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3342 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3346 val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3347 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3350 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3354 /* Add CMD14 Support */
3355 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3356 (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3357 SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3360 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3364 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3365 SBSDIO_FORCE_HT, &err);
3367 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3372 bus->sr_enabled = true;
3373 brcmf_dbg(INFO, "SR enabled\n");
3376 /* enable KSO bit */
3377 static int brcmf_sdbrcm_kso_init(struct brcmf_sdio *bus)
3382 brcmf_dbg(TRACE, "Enter\n");
3384 /* KSO bit added in SDIO core rev 12 */
3385 if (bus->ci->c_inf[1].rev < 12)
3388 val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3391 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3395 if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3396 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3397 SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3398 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3401 brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3411 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3415 sdio_claim_host(bus->sdiodev->func[1]);
3417 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3419 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3421 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3423 sdio_release_host(bus->sdiodev->func[1]);
3428 static int brcmf_sdbrcm_bus_preinit(struct device *dev)
3430 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3431 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3432 struct brcmf_sdio *bus = sdiodev->bus;
3437 /* sdio bus core specific dcmd */
3438 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3439 if (bus->ci->c_inf[idx].rev < 12) {
3440 /* for sdio core rev < 12, disable txgloming */
3442 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3445 /* otherwise, set txglomalign */
3448 value = sdiodev->pdata->sd_sgentry_align;
3449 /* SDIO ADMA requires at least 32 bit alignment */
3450 value = max_t(u32, value, 4);
3451 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3457 static int brcmf_sdbrcm_bus_init(struct device *dev)
3459 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3460 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3461 struct brcmf_sdio *bus = sdiodev->bus;
3462 unsigned long timeout;
3467 brcmf_dbg(TRACE, "Enter\n");
3469 /* try to download image and nvram to the dongle */
3470 if (bus_if->state == BRCMF_BUS_DOWN) {
3471 if (!(brcmf_sdbrcm_download_firmware(bus)))
3475 if (!bus->sdiodev->bus_if->drvr)
3478 /* Start the watchdog timer */
3479 bus->sdcnt.tickcnt = 0;
3480 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3482 sdio_claim_host(bus->sdiodev->func[1]);
3484 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3485 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3486 if (bus->clkstate != CLK_AVAIL)
3489 /* Force clocks on backplane to be sure F2 interrupt propagates */
3490 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3491 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3493 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3494 (saveclk | SBSDIO_FORCE_HT), &err);
3497 brcmf_err("Failed to force clock for F2: err %d\n", err);
3501 /* Enable function 2 (frame transfers) */
3502 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3503 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3504 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3506 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3508 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3510 while (enable != ready) {
3511 ready = brcmf_sdio_regrb(bus->sdiodev,
3512 SDIO_CCCR_IORx, NULL);
3513 if (time_after(jiffies, timeout))
3515 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3516 /* prevent busy waiting if it takes too long */
3517 msleep_interruptible(20);
3520 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3522 /* If F2 successfully enabled, set core and enable interrupts */
3523 if (ready == enable) {
3524 /* Set up the interrupt mask and enable interrupts */
3525 bus->hostintmask = HOSTINTMASK;
3526 w_sdreg32(bus, bus->hostintmask,
3527 offsetof(struct sdpcmd_regs, hostintmask));
3529 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3531 /* Disable F2 again */
3532 enable = SDIO_FUNC_ENABLE_1;
3533 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3537 if (brcmf_sdbrcm_sr_capable(bus)) {
3538 brcmf_sdbrcm_sr_init(bus);
3540 /* Restore previous clock setting */
3541 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3546 ret = brcmf_sdio_intr_register(bus->sdiodev);
3548 brcmf_err("intr register failed:%d\n", ret);
3551 /* If we didn't come up, turn off backplane clock */
3552 if (bus_if->state != BRCMF_BUS_DATA)
3553 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3556 sdio_release_host(bus->sdiodev->func[1]);
3561 void brcmf_sdbrcm_isr(void *arg)
3563 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3565 brcmf_dbg(TRACE, "Enter\n");
3568 brcmf_err("bus is null pointer, exiting\n");
3572 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3573 brcmf_err("bus is down. we have nothing to do\n");
3576 /* Count the interrupt call */
3577 bus->sdcnt.intrcount++;
3579 atomic_set(&bus->ipend, 1);
3581 if (brcmf_sdio_intr_rstatus(bus)) {
3582 brcmf_err("failed backplane access\n");
3583 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3586 /* Disable additional interrupts (is this needed now)? */
3588 brcmf_err("isr w/o interrupt configured!\n");
3590 atomic_inc(&bus->dpc_tskcnt);
3591 queue_work(bus->brcmf_wq, &bus->datawork);
3594 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3597 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3600 brcmf_dbg(TIMER, "Enter\n");
3602 /* Poll period: check device if appropriate. */
3603 if (!bus->sr_enabled &&
3604 bus->poll && (++bus->polltick >= bus->pollrate)) {
3607 /* Reset poll tick */
3610 /* Check device if no interrupts */
3612 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3614 if (atomic_read(&bus->dpc_tskcnt) == 0) {
3617 sdio_claim_host(bus->sdiodev->func[1]);
3618 devpend = brcmf_sdio_regrb(bus->sdiodev,
3621 sdio_release_host(bus->sdiodev->func[1]);
3623 devpend & (INTR_STATUS_FUNC1 |
3627 /* If there is something, make like the ISR and
3630 bus->sdcnt.pollcnt++;
3631 atomic_set(&bus->ipend, 1);
3633 atomic_inc(&bus->dpc_tskcnt);
3634 queue_work(bus->brcmf_wq, &bus->datawork);
3638 /* Update interrupt tracking */
3639 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3642 /* Poll for console output periodically */
3643 if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3644 bus->console_interval != 0) {
3645 bus->console.count += BRCMF_WD_POLL_MS;
3646 if (bus->console.count >= bus->console_interval) {
3647 bus->console.count -= bus->console_interval;
3648 sdio_claim_host(bus->sdiodev->func[1]);
3649 /* Make sure backplane clock is on */
3650 brcmf_sdbrcm_bus_sleep(bus, false, false);
3651 if (brcmf_sdbrcm_readconsole(bus) < 0)
3653 bus->console_interval = 0;
3654 sdio_release_host(bus->sdiodev->func[1]);
3659 /* On idle timeout clear activity flag and/or turn off clock */
3660 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3661 if (++bus->idlecount >= bus->idletime) {
3663 if (bus->activity) {
3664 bus->activity = false;
3665 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3667 brcmf_dbg(SDIO, "idle\n");
3668 sdio_claim_host(bus->sdiodev->func[1]);
3669 brcmf_sdbrcm_bus_sleep(bus, true, false);
3670 sdio_release_host(bus->sdiodev->func[1]);
3675 return (atomic_read(&bus->ipend) > 0);
3678 static void brcmf_sdio_dataworker(struct work_struct *work)
3680 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3683 while (atomic_read(&bus->dpc_tskcnt)) {
3684 brcmf_sdbrcm_dpc(bus);
3685 atomic_dec(&bus->dpc_tskcnt);
3689 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3691 brcmf_dbg(TRACE, "Enter\n");
3694 bus->rxctl = bus->rxbuf = NULL;
3698 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3700 brcmf_dbg(TRACE, "Enter\n");
3702 if (bus->sdiodev->bus_if->maxctl) {
3704 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3705 ALIGNMENT) + BRCMF_SDALIGN;
3706 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3715 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3723 bus->alp_only = true;
3725 sdio_claim_host(bus->sdiodev->func[1]);
3727 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3728 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3731 * Force PLL off until brcmf_sdio_chip_attach()
3732 * programs PLL control regs
3735 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3736 BRCMF_INIT_CLKCTL1, &err);
3738 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3739 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3741 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3742 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3743 err, BRCMF_INIT_CLKCTL1, clkctl);
3747 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3748 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3752 if (brcmf_sdbrcm_kso_init(bus)) {
3753 brcmf_err("error enabling KSO\n");
3757 if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3758 drivestrength = bus->sdiodev->pdata->drive_strength;
3760 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3761 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3763 /* Get info on the SOCRAM cores... */
3764 bus->ramsize = bus->ci->ramsize;
3765 if (!(bus->ramsize)) {
3766 brcmf_err("failed to find SOCRAM memory!\n");
3770 /* Set card control so an SDIO card reset does a WLAN backplane reset */
3771 reg_val = brcmf_sdio_regrb(bus->sdiodev,
3772 SDIO_CCCR_BRCM_CARDCTRL, &err);
3776 reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3778 brcmf_sdio_regwb(bus->sdiodev,
3779 SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3783 /* set PMUControl so a backplane reset does PMU state reload */
3784 reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3786 reg_val = brcmf_sdio_regrl(bus->sdiodev,
3792 reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3794 brcmf_sdio_regwl(bus->sdiodev,
3802 sdio_release_host(bus->sdiodev->func[1]);
3804 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3806 /* Locate an appropriately-aligned portion of hdrbuf */
3807 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3810 /* Set the poll and/or interrupt flags */
3819 sdio_release_host(bus->sdiodev->func[1]);
3823 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3825 brcmf_dbg(TRACE, "Enter\n");
3827 sdio_claim_host(bus->sdiodev->func[1]);
3829 /* Disable F2 to clear any intermediate frame state on the dongle */
3830 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3831 SDIO_FUNC_ENABLE_1, NULL);
3833 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3834 bus->rxflow = false;
3836 /* Done with backplane-dependent accesses, can drop clock... */
3837 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3839 sdio_release_host(bus->sdiodev->func[1]);
3841 /* ...and initialize clock/power states */
3842 bus->clkstate = CLK_SDONLY;
3843 bus->idletime = BRCMF_IDLE_INTERVAL;
3844 bus->idleclock = BRCMF_IDLE_ACTIVE;
3846 /* Query the F2 block size, set roundup accordingly */
3847 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3848 bus->roundup = min(max_roundup, bus->blocksize);
3851 bus->sleeping = false;
3852 bus->sr_enabled = false;
3858 brcmf_sdbrcm_watchdog_thread(void *data)
3860 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3862 allow_signal(SIGTERM);
3863 /* Run until signal received */
3865 if (kthread_should_stop())
3867 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3868 brcmf_sdbrcm_bus_watchdog(bus);
3869 /* Count the tick for reference */
3870 bus->sdcnt.tickcnt++;
3878 brcmf_sdbrcm_watchdog(unsigned long data)
3880 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3882 if (bus->watchdog_tsk) {
3883 complete(&bus->watchdog_wait);
3884 /* Reschedule the watchdog */
3885 if (bus->wd_timer_valid)
3886 mod_timer(&bus->timer,
3887 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3891 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3893 brcmf_dbg(TRACE, "Enter\n");
3896 sdio_claim_host(bus->sdiodev->func[1]);
3897 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3898 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3899 sdio_release_host(bus->sdiodev->func[1]);
3900 brcmf_sdio_chip_detach(&bus->ci);
3901 if (bus->vars && bus->varsz)
3906 brcmf_dbg(TRACE, "Disconnected\n");
3909 /* Detach and free everything */
3910 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3912 brcmf_dbg(TRACE, "Enter\n");
3915 /* De-register interrupt handler */
3916 brcmf_sdio_intr_unregister(bus->sdiodev);
3918 cancel_work_sync(&bus->datawork);
3920 destroy_workqueue(bus->brcmf_wq);
3922 if (bus->sdiodev->bus_if->drvr) {
3923 brcmf_detach(bus->sdiodev->dev);
3924 brcmf_sdbrcm_release_dongle(bus);
3927 brcmf_sdbrcm_release_malloc(bus);
3932 brcmf_dbg(TRACE, "Disconnected\n");
3935 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3936 .stop = brcmf_sdbrcm_bus_stop,
3937 .preinit = brcmf_sdbrcm_bus_preinit,
3938 .init = brcmf_sdbrcm_bus_init,
3939 .txdata = brcmf_sdbrcm_bus_txdata,
3940 .txctl = brcmf_sdbrcm_bus_txctl,
3941 .rxctl = brcmf_sdbrcm_bus_rxctl,
3942 .gettxq = brcmf_sdbrcm_bus_gettxq,
3945 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3948 struct brcmf_sdio *bus;
3950 brcmf_dbg(TRACE, "Enter\n");
3952 /* We make an assumption about address window mappings:
3953 * regsva == SI_ENUM_BASE*/
3955 /* Allocate private bus interface state */
3956 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3960 bus->sdiodev = sdiodev;
3962 skb_queue_head_init(&bus->glom);
3963 bus->txbound = BRCMF_TXBOUND;
3964 bus->rxbound = BRCMF_RXBOUND;
3965 bus->txminmax = BRCMF_TXMINMAX;
3966 bus->tx_seq = SDPCM_SEQ_WRAP - 1;
3968 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
3969 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
3970 if (bus->brcmf_wq == NULL) {
3971 brcmf_err("insufficient memory to create txworkqueue\n");
3975 /* attempt to attach to the dongle */
3976 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3977 brcmf_err("brcmf_sdbrcm_probe_attach failed\n");
3981 spin_lock_init(&bus->rxctl_lock);
3982 spin_lock_init(&bus->txqlock);
3983 init_waitqueue_head(&bus->ctrl_wait);
3984 init_waitqueue_head(&bus->dcmd_resp_wait);
3986 /* Set up the watchdog timer */
3987 init_timer(&bus->timer);
3988 bus->timer.data = (unsigned long)bus;
3989 bus->timer.function = brcmf_sdbrcm_watchdog;
3991 /* Initialize watchdog thread */
3992 init_completion(&bus->watchdog_wait);
3993 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3994 bus, "brcmf_watchdog");
3995 if (IS_ERR(bus->watchdog_tsk)) {
3996 pr_warn("brcmf_watchdog thread failed to start\n");
3997 bus->watchdog_tsk = NULL;
3999 /* Initialize DPC thread */
4000 atomic_set(&bus->dpc_tskcnt, 0);
4002 /* Assign bus interface call back */
4003 bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4004 bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4005 bus->sdiodev->bus_if->chip = bus->ci->chip;
4006 bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4008 /* default sdio bus header length for tx packet */
4009 bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4011 /* Attach to the common layer, reserve hdr space */
4012 ret = brcmf_attach(bus->sdiodev->dev);
4014 brcmf_err("brcmf_attach failed\n");
4018 /* Allocate buffers */
4019 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
4020 brcmf_err("brcmf_sdbrcm_probe_malloc failed\n");
4024 if (!(brcmf_sdbrcm_probe_init(bus))) {
4025 brcmf_err("brcmf_sdbrcm_probe_init failed\n");
4029 brcmf_sdio_debugfs_create(bus);
4030 brcmf_dbg(INFO, "completed!!\n");
4032 brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
4034 /* if firmware path present try to download and bring up bus */
4035 ret = brcmf_bus_start(bus->sdiodev->dev);
4037 brcmf_err("dongle is not responding\n");
4044 brcmf_sdbrcm_release(bus);
4048 void brcmf_sdbrcm_disconnect(void *ptr)
4050 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4052 brcmf_dbg(TRACE, "Enter\n");
4055 brcmf_sdbrcm_release(bus);
4057 brcmf_dbg(TRACE, "Disconnected\n");
4061 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4063 /* Totally stop the timer */
4064 if (!wdtick && bus->wd_timer_valid) {
4065 del_timer_sync(&bus->timer);
4066 bus->wd_timer_valid = false;
4067 bus->save_ms = wdtick;
4071 /* don't start the wd until fw is loaded */
4072 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4076 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4077 if (bus->wd_timer_valid)
4078 /* Stop timer and restart at new value */
4079 del_timer_sync(&bus->timer);
4081 /* Create timer again when watchdog period is
4082 dynamically changed or in the first instance
4084 bus->timer.expires =
4085 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4086 add_timer(&bus->timer);
4089 /* Re arm the timer, at last watchdog period */
4090 mod_timer(&bus->timer,
4091 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4094 bus->wd_timer_valid = true;
4095 bus->save_ms = wdtick;