2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <linux/debugfs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/platform_data/brcmfmac-sdio.h>
35 #include <linux/moduleparam.h>
36 #include <asm/unaligned.h>
38 #include <brcmu_wifi.h>
39 #include <brcmu_utils.h>
40 #include <brcm_hw_ids.h>
42 #include "sdio_host.h"
43 #include "sdio_chip.h"
45 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
49 #define BRCMF_TRAP_INFO_SIZE 80
51 #define CBUF_LEN (128)
53 /* Device console log buffer state */
54 #define CONSOLE_BUFFER_MAX 2024
57 __le32 buf; /* Can't be pointer on (64-bit) hosts */
60 char *_buf_compat; /* Redundant pointer for backward compat. */
65 * When there is no UART (e.g. Quickturn),
66 * the host should write a complete
67 * input line directly into cbuf and then write
68 * the length into vcons_in.
69 * This may also be used when there is a real UART
70 * (at risk of conflicting with
71 * the real UART). vcons_out is currently unused.
76 /* Output (logging) buffer
77 * Console output is written to a ring buffer log_buf at index log_idx.
78 * The host may read the output when it sees log_idx advance.
79 * Output will be lost if the output wraps around faster than the host
82 struct rte_log_le log_le;
84 /* Console input line buffer
85 * Characters are read one at a time into cbuf
86 * until <CR> is received, then
87 * the buffer is processed as a command line.
88 * Also used for virtual UART.
95 #include <chipcommon.h>
99 #include "tracepoint.h"
101 #define TXQLEN 2048 /* bulk tx queue length */
102 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
103 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
106 #define TXRETRIES 2 /* # of retries for tx frames */
108 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
111 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
114 #define BRCMF_DEFAULT_TXGLOM_SIZE 32 /* max tx frames in glom chain */
116 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
118 #define MEMBLOCK 2048 /* Block size used for downloading
120 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
121 biggest possible glom */
123 #define BRCMF_FIRSTREAD (1 << 6)
126 /* SBSDIO_DEVICE_CTL */
128 /* 1: device will assert busy signal when receiving CMD53 */
129 #define SBSDIO_DEVCTL_SETBUSY 0x01
130 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
131 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
132 /* 1: mask all interrupts to host except the chipActive (rev 8) */
133 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
134 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
135 * sdio bus power cycle to clear (rev 9) */
136 #define SBSDIO_DEVCTL_PADS_ISO 0x08
137 /* Force SD->SB reset mapping (rev 11) */
138 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
139 /* Determined by CoreControl bit */
140 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
141 /* Force backplane reset */
142 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
143 /* Force no backplane reset */
144 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
146 /* direct(mapped) cis space */
148 /* MAPPED common CIS address */
149 #define SBSDIO_CIS_BASE_COMMON 0x1000
150 /* maximum bytes in one CIS */
151 #define SBSDIO_CIS_SIZE_LIMIT 0x200
152 /* cis offset addr is < 17 bits */
153 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
155 /* manfid tuple length, include tuple, link bytes */
156 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
159 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
160 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
161 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
162 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
163 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
164 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
165 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
166 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
167 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
168 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
169 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
170 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
171 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
172 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
173 #define I_PC (1 << 10) /* descriptor error */
174 #define I_PD (1 << 11) /* data error */
175 #define I_DE (1 << 12) /* Descriptor protocol Error */
176 #define I_RU (1 << 13) /* Receive descriptor Underflow */
177 #define I_RO (1 << 14) /* Receive fifo Overflow */
178 #define I_XU (1 << 15) /* Transmit fifo Underflow */
179 #define I_RI (1 << 16) /* Receive Interrupt */
180 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
181 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
182 #define I_XI (1 << 24) /* Transmit Interrupt */
183 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
184 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
185 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
186 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
187 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
188 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
189 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
190 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
191 #define I_DMA (I_RI | I_XI | I_ERRORS)
194 #define CC_CISRDY (1 << 0) /* CIS Ready */
195 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
196 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
197 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
198 #define CC_XMTDATAAVAIL_MODE (1 << 4)
199 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
202 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
203 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
204 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
205 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
208 * Software allocation of To SB Mailbox resources
211 /* tosbmailbox bits corresponding to intstatus bits */
212 #define SMB_NAK (1 << 0) /* Frame NAK */
213 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
214 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
215 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
217 /* tosbmailboxdata */
218 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
221 * Software allocation of To Host Mailbox resources
225 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
226 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
227 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
228 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
230 /* tohostmailboxdata */
231 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
232 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
233 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
234 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
236 #define HMB_DATA_FCDATA_MASK 0xff000000
237 #define HMB_DATA_FCDATA_SHIFT 24
239 #define HMB_DATA_VERSION_MASK 0x00ff0000
240 #define HMB_DATA_VERSION_SHIFT 16
243 * Software-defined protocol header
246 /* Current protocol version */
247 #define SDPCM_PROT_VERSION 4
250 * Shared structure between dongle and the host.
251 * The structure contains pointers to trap or assert information.
253 #define SDPCM_SHARED_VERSION 0x0003
254 #define SDPCM_SHARED_VERSION_MASK 0x00FF
255 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
256 #define SDPCM_SHARED_ASSERT 0x0200
257 #define SDPCM_SHARED_TRAP 0x0400
259 /* Space for header read, limit for data packets */
260 #define MAX_HDR_READ (1 << 6)
261 #define MAX_RX_DATASZ 2048
263 /* Maximum milliseconds to wait for F2 to come up */
264 #define BRCMF_WAIT_F2RDY 3000
266 /* Bump up limit on waiting for HT to account for first startup;
267 * if the image is doing a CRC calculation before programming the PMU
268 * for HT availability, it could take a couple hundred ms more, so
269 * max out at a 1 second (1000000us).
271 #undef PMU_MAX_TRANSITION_DLY
272 #define PMU_MAX_TRANSITION_DLY 1000000
274 /* Value for ChipClockCSR during initial setup */
275 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
276 SBSDIO_ALP_AVAIL_REQ)
278 /* Flags for SDH calls */
279 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
281 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
282 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
285 #define BRCMF_IDLE_INTERVAL 1
287 #define KSO_WAIT_US 50
288 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
291 * Conversion of 802.1D priority to precedence level
293 static uint prio2prec(u32 prio)
295 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
300 /* Device console log buffer state */
301 struct brcmf_console {
302 uint count; /* Poll interval msec counter */
303 uint log_addr; /* Log struct address (fixed) */
304 struct rte_log_le log_le; /* Log struct (host copy) */
305 uint bufsize; /* Size of log buffer */
306 u8 *buf; /* Log buffer (host copy) */
307 uint last; /* Last buffer read index */
310 struct brcmf_trap_info {
324 __le32 r9; /* sb/v6 */
325 __le32 r10; /* sl/v7 */
326 __le32 r11; /* fp/v8 */
334 struct sdpcm_shared {
338 u32 assert_file_addr;
340 u32 console_addr; /* Address of struct rte_console */
346 struct sdpcm_shared_le {
349 __le32 assert_exp_addr;
350 __le32 assert_file_addr;
352 __le32 console_addr; /* Address of struct rte_console */
353 __le32 msgtrace_addr;
358 /* dongle SDIO bus specific header info */
359 struct brcmf_sdio_hdrinfo {
370 /* misc chip info needed by some of the routines */
371 /* Private data for SDIO bus interaction */
373 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
374 struct chip_info *ci; /* Chip info struct */
375 char *vars; /* Variables (from CIS and/or other) */
376 uint varsz; /* Size of variables buffer */
378 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
380 u32 hostintmask; /* Copy of Host Interrupt Mask */
381 atomic_t intstatus; /* Intstatus bits (events) pending */
382 atomic_t fcstate; /* State of dongle flow-control */
384 uint blocksize; /* Block size of SDIO transfers */
385 uint roundup; /* Max roundup limit */
387 struct pktq txq; /* Queue length used for flow-control */
388 u8 flowcontrol; /* per prio flow control bitmask */
389 u8 tx_seq; /* Transmit sequence number (next) */
390 u8 tx_max; /* Maximum transmit sequence allowed */
392 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
393 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
394 u8 rx_seq; /* Receive sequence number (expected) */
395 struct brcmf_sdio_hdrinfo cur_read;
396 /* info of current read frame */
397 bool rxskip; /* Skip receive (awaiting NAK ACK) */
398 bool rxpending; /* Data frame pending in dongle */
400 uint rxbound; /* Rx frames to read before resched */
401 uint txbound; /* Tx frames to send before resched */
404 struct sk_buff *glomd; /* Packet containing glomming descriptor */
405 struct sk_buff_head glom; /* Packet list for glommed superframe */
406 uint glomerr; /* Glom packet read errors */
408 u8 *rxbuf; /* Buffer for receiving control packets */
409 uint rxblen; /* Allocated length of rxbuf */
410 u8 *rxctl; /* Aligned pointer into rxbuf */
411 u8 *rxctl_orig; /* pointer for freeing rxctl */
412 uint rxlen; /* Length of valid data in buffer */
413 spinlock_t rxctl_lock; /* protection lock for ctrl frame resources */
415 u8 sdpcm_ver; /* Bus protocol reported by dongle */
417 bool intr; /* Use interrupts */
418 bool poll; /* Use polling */
419 atomic_t ipend; /* Device interrupt is pending */
420 uint spurious; /* Count of spurious interrupts */
421 uint pollrate; /* Ticks between device polls */
422 uint polltick; /* Tick counter */
425 uint console_interval;
426 struct brcmf_console console; /* Console output polling support */
427 uint console_addr; /* Console address from shared struct */
430 uint clkstate; /* State of sd and backplane clock(s) */
431 bool activity; /* Activity flag for clock down */
432 s32 idletime; /* Control for activity timeout */
433 s32 idlecount; /* Activity timeout counter */
434 s32 idleclock; /* How to set bus driver when idle */
435 bool rxflow_mode; /* Rx flow control mode */
436 bool rxflow; /* Is rx flow control on */
437 bool alp_only; /* Don't use HT clock (ALP only) */
441 bool ctrl_frame_stat;
444 wait_queue_head_t ctrl_wait;
445 wait_queue_head_t dcmd_resp_wait;
447 struct timer_list timer;
448 struct completion watchdog_wait;
449 struct task_struct *watchdog_tsk;
453 struct workqueue_struct *brcmf_wq;
454 struct work_struct datawork;
457 bool txoff; /* Transmit flow-controlled */
458 struct brcmf_sdio_count sdcnt;
459 bool sr_enabled; /* SaveRestore enabled */
460 bool sleeping; /* SDIO bus sleeping */
462 u8 tx_hdrlen; /* sdio bus header length for tx packet */
463 bool txglom; /* host tx glomming enable flag */
464 struct sk_buff *txglom_sgpad; /* scatter-gather padding buffer */
465 u16 head_align; /* buffer pointer alignment */
466 u16 sgentry_align; /* scatter-gather buffer alignment */
472 #define CLK_PENDING 2
476 static int qcount[NUMPRIO];
479 #define DEFAULT_SDIO_DRIVE_STRENGTH 6 /* in milliamps */
481 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
483 /* Retry count for register access failures */
484 static const uint retry_limit = 2;
486 /* Limit on rounding up frames */
487 static const uint max_roundup = 512;
491 static int brcmf_sdio_txglomsz = BRCMF_DEFAULT_TXGLOM_SIZE;
492 module_param_named(txglomsz, brcmf_sdio_txglomsz, int, 0);
493 MODULE_PARM_DESC(txglomsz, "maximum tx packet chain size [SDIO]");
495 enum brcmf_sdio_frmtype {
496 BRCMF_SDIO_FT_NORMAL,
501 #define BCM43143_FIRMWARE_NAME "brcm/brcmfmac43143-sdio.bin"
502 #define BCM43143_NVRAM_NAME "brcm/brcmfmac43143-sdio.txt"
503 #define BCM43241B0_FIRMWARE_NAME "brcm/brcmfmac43241b0-sdio.bin"
504 #define BCM43241B0_NVRAM_NAME "brcm/brcmfmac43241b0-sdio.txt"
505 #define BCM43241B4_FIRMWARE_NAME "brcm/brcmfmac43241b4-sdio.bin"
506 #define BCM43241B4_NVRAM_NAME "brcm/brcmfmac43241b4-sdio.txt"
507 #define BCM4329_FIRMWARE_NAME "brcm/brcmfmac4329-sdio.bin"
508 #define BCM4329_NVRAM_NAME "brcm/brcmfmac4329-sdio.txt"
509 #define BCM4330_FIRMWARE_NAME "brcm/brcmfmac4330-sdio.bin"
510 #define BCM4330_NVRAM_NAME "brcm/brcmfmac4330-sdio.txt"
511 #define BCM4334_FIRMWARE_NAME "brcm/brcmfmac4334-sdio.bin"
512 #define BCM4334_NVRAM_NAME "brcm/brcmfmac4334-sdio.txt"
513 #define BCM4335_FIRMWARE_NAME "brcm/brcmfmac4335-sdio.bin"
514 #define BCM4335_NVRAM_NAME "brcm/brcmfmac4335-sdio.txt"
515 #define BCM4339_FIRMWARE_NAME "brcm/brcmfmac4339-sdio.bin"
516 #define BCM4339_NVRAM_NAME "brcm/brcmfmac4339-sdio.txt"
518 MODULE_FIRMWARE(BCM43143_FIRMWARE_NAME);
519 MODULE_FIRMWARE(BCM43143_NVRAM_NAME);
520 MODULE_FIRMWARE(BCM43241B0_FIRMWARE_NAME);
521 MODULE_FIRMWARE(BCM43241B0_NVRAM_NAME);
522 MODULE_FIRMWARE(BCM43241B4_FIRMWARE_NAME);
523 MODULE_FIRMWARE(BCM43241B4_NVRAM_NAME);
524 MODULE_FIRMWARE(BCM4329_FIRMWARE_NAME);
525 MODULE_FIRMWARE(BCM4329_NVRAM_NAME);
526 MODULE_FIRMWARE(BCM4330_FIRMWARE_NAME);
527 MODULE_FIRMWARE(BCM4330_NVRAM_NAME);
528 MODULE_FIRMWARE(BCM4334_FIRMWARE_NAME);
529 MODULE_FIRMWARE(BCM4334_NVRAM_NAME);
530 MODULE_FIRMWARE(BCM4335_FIRMWARE_NAME);
531 MODULE_FIRMWARE(BCM4335_NVRAM_NAME);
532 MODULE_FIRMWARE(BCM4339_FIRMWARE_NAME);
533 MODULE_FIRMWARE(BCM4339_NVRAM_NAME);
535 struct brcmf_firmware_names {
542 enum brcmf_firmware_type {
547 #define BRCMF_FIRMWARE_NVRAM(name) \
548 name ## _FIRMWARE_NAME, name ## _NVRAM_NAME
550 static const struct brcmf_firmware_names brcmf_fwname_data[] = {
551 { BCM43143_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM43143) },
552 { BCM43241_CHIP_ID, 0x0000001F, BRCMF_FIRMWARE_NVRAM(BCM43241B0) },
553 { BCM43241_CHIP_ID, 0xFFFFFFE0, BRCMF_FIRMWARE_NVRAM(BCM43241B4) },
554 { BCM4329_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4329) },
555 { BCM4330_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4330) },
556 { BCM4334_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4334) },
557 { BCM4335_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4335) },
558 { BCM4339_CHIP_ID, 0xFFFFFFFF, BRCMF_FIRMWARE_NVRAM(BCM4339) }
562 static const struct firmware *brcmf_sdbrcm_get_fw(struct brcmf_sdio *bus,
563 enum brcmf_firmware_type type)
565 const struct firmware *fw;
569 for (i = 0; i < ARRAY_SIZE(brcmf_fwname_data); i++) {
570 if (brcmf_fwname_data[i].chipid == bus->ci->chip &&
571 brcmf_fwname_data[i].revmsk & BIT(bus->ci->chiprev)) {
573 case BRCMF_FIRMWARE_BIN:
574 name = brcmf_fwname_data[i].bin;
576 case BRCMF_FIRMWARE_NVRAM:
577 name = brcmf_fwname_data[i].nv;
580 brcmf_err("invalid firmware type (%d)\n", type);
586 brcmf_err("Unknown chipid %d [%d]\n",
587 bus->ci->chip, bus->ci->chiprev);
591 err = request_firmware(&fw, name, &bus->sdiodev->func[2]->dev);
592 if ((err) || (!fw)) {
593 brcmf_err("fail to request firmware %s (%d)\n", name, err);
600 static void pkt_align(struct sk_buff *p, int len, int align)
603 datalign = (unsigned long)(p->data);
604 datalign = roundup(datalign, (align)) - datalign;
606 skb_pull(p, datalign);
610 /* To check if there's window offered */
611 static bool data_ok(struct brcmf_sdio *bus)
613 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
614 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
618 * Reads a register in the SDIO hardware block. This block occupies a series of
619 * adresses on the 32 bit backplane bus.
622 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
624 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
627 *regvar = brcmf_sdio_regrl(bus->sdiodev,
628 bus->ci->c_inf[idx].base + offset, &ret);
634 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
636 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
639 brcmf_sdio_regwl(bus->sdiodev,
640 bus->ci->c_inf[idx].base + reg_offset,
647 brcmf_sdbrcm_kso_control(struct brcmf_sdio *bus, bool on)
649 u8 wr_val = 0, rd_val, cmp_val, bmask;
653 brcmf_dbg(TRACE, "Enter\n");
655 wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
656 /* 1st KSO write goes to AOS wake up core if device is asleep */
657 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
660 brcmf_err("SDIO_AOS KSO write error: %d\n", err);
665 /* device WAKEUP through KSO:
666 * write bit 0 & read back until
667 * both bits 0 (kso bit) & 1 (dev on status) are set
669 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
670 SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
672 usleep_range(2000, 3000);
674 /* Put device to sleep, turn off KSO */
676 /* only check for bit0, bit1(dev on status) may not
677 * get cleared right away
679 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
683 /* reliable KSO bit set/clr:
684 * the sdiod sleep write access is synced to PMU 32khz clk
685 * just one write attempt may fail,
686 * read it back until it matches written value
688 rd_val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
690 if (((rd_val & bmask) == cmp_val) && !err)
692 brcmf_dbg(SDIO, "KSO wr/rd retry:%d (max: %d) ERR:%x\n",
693 try_cnt, MAX_KSO_ATTEMPTS, err);
695 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
697 } while (try_cnt++ < MAX_KSO_ATTEMPTS);
702 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
704 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
706 /* Turn backplane clock on or off */
707 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
710 u8 clkctl, clkreq, devctl;
711 unsigned long timeout;
713 brcmf_dbg(SDIO, "Enter\n");
717 if (bus->sr_enabled) {
718 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
723 /* Request HT Avail */
725 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
727 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
730 brcmf_err("HT Avail request error: %d\n", err);
734 /* Check current status */
735 clkctl = brcmf_sdio_regrb(bus->sdiodev,
736 SBSDIO_FUNC1_CHIPCLKCSR, &err);
738 brcmf_err("HT Avail read error: %d\n", err);
742 /* Go to pending and await interrupt if appropriate */
743 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
744 /* Allow only clock-available interrupt */
745 devctl = brcmf_sdio_regrb(bus->sdiodev,
746 SBSDIO_DEVICE_CTL, &err);
748 brcmf_err("Devctl error setting CA: %d\n",
753 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
754 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
756 brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
757 bus->clkstate = CLK_PENDING;
760 } else if (bus->clkstate == CLK_PENDING) {
761 /* Cancel CA-only interrupt filter */
762 devctl = brcmf_sdio_regrb(bus->sdiodev,
763 SBSDIO_DEVICE_CTL, &err);
764 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
765 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
769 /* Otherwise, wait here (polling) for HT Avail */
771 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
772 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
773 clkctl = brcmf_sdio_regrb(bus->sdiodev,
774 SBSDIO_FUNC1_CHIPCLKCSR,
776 if (time_after(jiffies, timeout))
779 usleep_range(5000, 10000);
782 brcmf_err("HT Avail request error: %d\n", err);
785 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
786 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
787 PMU_MAX_TRANSITION_DLY, clkctl);
791 /* Mark clock available */
792 bus->clkstate = CLK_AVAIL;
793 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
796 if (!bus->alp_only) {
797 if (SBSDIO_ALPONLY(clkctl))
798 brcmf_err("HT Clock should be on\n");
800 #endif /* defined (DEBUG) */
802 bus->activity = true;
806 if (bus->clkstate == CLK_PENDING) {
807 /* Cancel CA-only interrupt filter */
808 devctl = brcmf_sdio_regrb(bus->sdiodev,
809 SBSDIO_DEVICE_CTL, &err);
810 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
811 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
815 bus->clkstate = CLK_SDONLY;
816 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
818 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
820 brcmf_err("Failed access turning clock off: %d\n",
828 /* Change idle/active SD state */
829 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
831 brcmf_dbg(SDIO, "Enter\n");
834 bus->clkstate = CLK_SDONLY;
836 bus->clkstate = CLK_NONE;
841 /* Transition SD and backplane clock readiness */
842 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
845 uint oldstate = bus->clkstate;
848 brcmf_dbg(SDIO, "Enter\n");
850 /* Early exit if we're already there */
851 if (bus->clkstate == target) {
852 if (target == CLK_AVAIL) {
853 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
854 bus->activity = true;
861 /* Make sure SD clock is available */
862 if (bus->clkstate == CLK_NONE)
863 brcmf_sdbrcm_sdclk(bus, true);
864 /* Now request HT Avail on the backplane */
865 brcmf_sdbrcm_htclk(bus, true, pendok);
866 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
867 bus->activity = true;
871 /* Remove HT request, or bring up SD clock */
872 if (bus->clkstate == CLK_NONE)
873 brcmf_sdbrcm_sdclk(bus, true);
874 else if (bus->clkstate == CLK_AVAIL)
875 brcmf_sdbrcm_htclk(bus, false, false);
877 brcmf_err("request for %d -> %d\n",
878 bus->clkstate, target);
879 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
883 /* Make sure to remove HT request */
884 if (bus->clkstate == CLK_AVAIL)
885 brcmf_sdbrcm_htclk(bus, false, false);
886 /* Now remove the SD clock */
887 brcmf_sdbrcm_sdclk(bus, false);
888 brcmf_sdbrcm_wd_timer(bus, 0);
892 brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
899 brcmf_sdbrcm_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
902 brcmf_dbg(TRACE, "Enter\n");
903 brcmf_dbg(SDIO, "request %s currently %s\n",
904 (sleep ? "SLEEP" : "WAKE"),
905 (bus->sleeping ? "SLEEP" : "WAKE"));
907 /* If SR is enabled control bus state with KSO */
908 if (bus->sr_enabled) {
909 /* Done if we're already in the requested state */
910 if (sleep == bus->sleeping)
915 /* Don't sleep if something is pending */
916 if (atomic_read(&bus->intstatus) ||
917 atomic_read(&bus->ipend) > 0 ||
918 (!atomic_read(&bus->fcstate) &&
919 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
922 err = brcmf_sdbrcm_kso_control(bus, false);
923 /* disable watchdog */
925 brcmf_sdbrcm_wd_timer(bus, 0);
928 err = brcmf_sdbrcm_kso_control(bus, true);
932 bus->sleeping = sleep;
933 brcmf_dbg(SDIO, "new state %s\n",
934 (sleep ? "SLEEP" : "WAKE"));
936 brcmf_err("error while changing bus sleep state %d\n",
945 if (!bus->sr_enabled)
946 brcmf_sdbrcm_clkctl(bus, CLK_NONE, pendok);
948 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, pendok);
955 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
962 brcmf_dbg(SDIO, "Enter\n");
964 /* Read mailbox data and ack that we did so */
965 ret = r_sdreg32(bus, &hmb_data,
966 offsetof(struct sdpcmd_regs, tohostmailboxdata));
969 w_sdreg32(bus, SMB_INT_ACK,
970 offsetof(struct sdpcmd_regs, tosbmailbox));
971 bus->sdcnt.f1regdata += 2;
973 /* Dongle recomposed rx frames, accept them again */
974 if (hmb_data & HMB_DATA_NAKHANDLED) {
975 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
978 brcmf_err("unexpected NAKHANDLED!\n");
981 intstatus |= I_HMB_FRAME_IND;
985 * DEVREADY does not occur with gSPI.
987 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
989 (hmb_data & HMB_DATA_VERSION_MASK) >>
990 HMB_DATA_VERSION_SHIFT;
991 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
992 brcmf_err("Version mismatch, dongle reports %d, "
994 bus->sdpcm_ver, SDPCM_PROT_VERSION);
996 brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1001 * Flow Control has been moved into the RX headers and this out of band
1002 * method isn't used any more.
1003 * remaining backward compatible with older dongles.
1005 if (hmb_data & HMB_DATA_FC) {
1006 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1007 HMB_DATA_FCDATA_SHIFT;
1009 if (fcbits & ~bus->flowcontrol)
1010 bus->sdcnt.fc_xoff++;
1012 if (bus->flowcontrol & ~fcbits)
1013 bus->sdcnt.fc_xon++;
1015 bus->sdcnt.fc_rcvd++;
1016 bus->flowcontrol = fcbits;
1019 /* Shouldn't be any others */
1020 if (hmb_data & ~(HMB_DATA_DEVREADY |
1021 HMB_DATA_NAKHANDLED |
1024 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1025 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1031 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1038 brcmf_err("%sterminate frame%s\n",
1039 abort ? "abort command, " : "",
1040 rtx ? ", send NAK" : "");
1043 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1045 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1047 bus->sdcnt.f1regdata++;
1049 /* Wait until the packet has been flushed (device/FIFO stable) */
1050 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1051 hi = brcmf_sdio_regrb(bus->sdiodev,
1052 SBSDIO_FUNC1_RFRAMEBCHI, &err);
1053 lo = brcmf_sdio_regrb(bus->sdiodev,
1054 SBSDIO_FUNC1_RFRAMEBCLO, &err);
1055 bus->sdcnt.f1regdata += 2;
1057 if ((hi == 0) && (lo == 0))
1060 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1061 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1062 lastrbc, (hi << 8) + lo);
1064 lastrbc = (hi << 8) + lo;
1068 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1070 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1074 err = w_sdreg32(bus, SMB_NAK,
1075 offsetof(struct sdpcmd_regs, tosbmailbox));
1077 bus->sdcnt.f1regdata++;
1082 /* Clear partial in any case */
1083 bus->cur_read.len = 0;
1085 /* If we can't reach the device, signal failure */
1087 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1090 /* return total length of buffer chain */
1091 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1097 skb_queue_walk(&bus->glom, p)
1102 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1104 struct sk_buff *cur, *next;
1106 skb_queue_walk_safe(&bus->glom, cur, next) {
1107 skb_unlink(cur, &bus->glom);
1108 brcmu_pkt_buf_free_skb(cur);
1113 * brcmfmac sdio bus specific header
1114 * This is the lowest layer header wrapped on the packets transmitted between
1115 * host and WiFi dongle which contains information needed for SDIO core and
1118 * It consists of 3 parts: hardware header, hardware extension header and
1120 * hardware header (frame tag) - 4 bytes
1121 * Byte 0~1: Frame length
1122 * Byte 2~3: Checksum, bit-wise inverse of frame length
1123 * hardware extension header - 8 bytes
1124 * Tx glom mode only, N/A for Rx or normal Tx
1125 * Byte 0~1: Packet length excluding hw frame tag
1127 * Byte 3: Frame flags, bit 0: last frame indication
1128 * Byte 4~5: Reserved
1129 * Byte 6~7: Tail padding length
1130 * software header - 8 bytes
1131 * Byte 0: Rx/Tx sequence number
1132 * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1133 * Byte 2: Length of next data frame, reserved for Tx
1134 * Byte 3: Data offset
1135 * Byte 4: Flow control bits, reserved for Tx
1136 * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1137 * Byte 6~7: Reserved
1139 #define SDPCM_HWHDR_LEN 4
1140 #define SDPCM_HWEXT_LEN 8
1141 #define SDPCM_SWHDR_LEN 8
1142 #define SDPCM_HDRLEN (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1143 /* software header */
1144 #define SDPCM_SEQ_MASK 0x000000ff
1145 #define SDPCM_SEQ_WRAP 256
1146 #define SDPCM_CHANNEL_MASK 0x00000f00
1147 #define SDPCM_CHANNEL_SHIFT 8
1148 #define SDPCM_CONTROL_CHANNEL 0 /* Control */
1149 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication */
1150 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv */
1151 #define SDPCM_GLOM_CHANNEL 3 /* Coalesced packets */
1152 #define SDPCM_TEST_CHANNEL 15 /* Test/debug packets */
1153 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
1154 #define SDPCM_NEXTLEN_MASK 0x00ff0000
1155 #define SDPCM_NEXTLEN_SHIFT 16
1156 #define SDPCM_DOFFSET_MASK 0xff000000
1157 #define SDPCM_DOFFSET_SHIFT 24
1158 #define SDPCM_FCMASK_MASK 0x000000ff
1159 #define SDPCM_WINDOW_MASK 0x0000ff00
1160 #define SDPCM_WINDOW_SHIFT 8
1162 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1165 hdrvalue = *(u32 *)swheader;
1166 return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1169 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1170 struct brcmf_sdio_hdrinfo *rd,
1171 enum brcmf_sdio_frmtype type)
1174 u8 rx_seq, fc, tx_seq_max;
1177 trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1180 len = get_unaligned_le16(header);
1181 checksum = get_unaligned_le16(header + sizeof(u16));
1182 /* All zero means no more to read */
1183 if (!(len | checksum)) {
1184 bus->rxpending = false;
1187 if ((u16)(~(len ^ checksum))) {
1188 brcmf_err("HW header checksum error\n");
1189 bus->sdcnt.rx_badhdr++;
1190 brcmf_sdbrcm_rxfail(bus, false, false);
1193 if (len < SDPCM_HDRLEN) {
1194 brcmf_err("HW header length error\n");
1197 if (type == BRCMF_SDIO_FT_SUPER &&
1198 (roundup(len, bus->blocksize) != rd->len)) {
1199 brcmf_err("HW superframe header length error\n");
1202 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1203 brcmf_err("HW subframe header length error\n");
1208 /* software header */
1209 header += SDPCM_HWHDR_LEN;
1210 swheader = le32_to_cpu(*(__le32 *)header);
1211 if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1212 brcmf_err("Glom descriptor found in superframe head\n");
1216 rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1217 rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1218 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1219 type != BRCMF_SDIO_FT_SUPER) {
1220 brcmf_err("HW header length too long\n");
1221 bus->sdcnt.rx_toolong++;
1222 brcmf_sdbrcm_rxfail(bus, false, false);
1226 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1227 brcmf_err("Wrong channel for superframe\n");
1231 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1232 rd->channel != SDPCM_EVENT_CHANNEL) {
1233 brcmf_err("Wrong channel for subframe\n");
1237 rd->dat_offset = brcmf_sdio_getdatoffset(header);
1238 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1239 brcmf_err("seq %d: bad data offset\n", rx_seq);
1240 bus->sdcnt.rx_badhdr++;
1241 brcmf_sdbrcm_rxfail(bus, false, false);
1245 if (rd->seq_num != rx_seq) {
1246 brcmf_err("seq %d: sequence number error, expect %d\n",
1247 rx_seq, rd->seq_num);
1248 bus->sdcnt.rx_badseq++;
1249 rd->seq_num = rx_seq;
1251 /* no need to check the reset for subframe */
1252 if (type == BRCMF_SDIO_FT_SUB)
1254 rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1255 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1256 /* only warm for NON glom packet */
1257 if (rd->channel != SDPCM_GLOM_CHANNEL)
1258 brcmf_err("seq %d: next length error\n", rx_seq);
1261 swheader = le32_to_cpu(*(__le32 *)(header + 4));
1262 fc = swheader & SDPCM_FCMASK_MASK;
1263 if (bus->flowcontrol != fc) {
1264 if (~bus->flowcontrol & fc)
1265 bus->sdcnt.fc_xoff++;
1266 if (bus->flowcontrol & ~fc)
1267 bus->sdcnt.fc_xon++;
1268 bus->sdcnt.fc_rcvd++;
1269 bus->flowcontrol = fc;
1271 tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1272 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1273 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1274 tx_seq_max = bus->tx_seq + 2;
1276 bus->tx_max = tx_seq_max;
1281 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1283 *(__le16 *)header = cpu_to_le16(frm_length);
1284 *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1287 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1288 struct brcmf_sdio_hdrinfo *hd_info)
1293 brcmf_sdio_update_hwhdr(header, hd_info->len);
1294 hdr_offset = SDPCM_HWHDR_LEN;
1297 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1298 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1299 hdrval = (u16)hd_info->tail_pad << 16;
1300 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1301 hdr_offset += SDPCM_HWEXT_LEN;
1304 hdrval = hd_info->seq_num;
1305 hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1307 hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1309 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1310 *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1311 trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1314 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1319 struct sk_buff *pfirst, *pnext;
1324 struct brcmf_sdio_hdrinfo rd_new;
1326 /* If packets, issue read(s) and send up packet chain */
1327 /* Return sequence numbers consumed? */
1329 brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1330 bus->glomd, skb_peek(&bus->glom));
1332 /* If there's a descriptor, generate the packet chain */
1334 pfirst = pnext = NULL;
1335 dlen = (u16) (bus->glomd->len);
1336 dptr = bus->glomd->data;
1337 if (!dlen || (dlen & 1)) {
1338 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1343 for (totlen = num = 0; dlen; num++) {
1344 /* Get (and move past) next length */
1345 sublen = get_unaligned_le16(dptr);
1346 dlen -= sizeof(u16);
1347 dptr += sizeof(u16);
1348 if ((sublen < SDPCM_HDRLEN) ||
1349 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1350 brcmf_err("descriptor len %d bad: %d\n",
1355 if (sublen % bus->sgentry_align) {
1356 brcmf_err("sublen %d not multiple of %d\n",
1357 sublen, bus->sgentry_align);
1361 /* For last frame, adjust read len so total
1362 is a block multiple */
1365 (roundup(totlen, bus->blocksize) - totlen);
1366 totlen = roundup(totlen, bus->blocksize);
1369 /* Allocate/chain packet for next subframe */
1370 pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1371 if (pnext == NULL) {
1372 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1376 skb_queue_tail(&bus->glom, pnext);
1378 /* Adhere to start alignment requirements */
1379 pkt_align(pnext, sublen, bus->sgentry_align);
1382 /* If all allocations succeeded, save packet chain
1385 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1387 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1388 totlen != bus->cur_read.len) {
1389 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1390 bus->cur_read.len, totlen, rxseq);
1392 pfirst = pnext = NULL;
1394 brcmf_sdbrcm_free_glom(bus);
1398 /* Done with descriptor packet */
1399 brcmu_pkt_buf_free_skb(bus->glomd);
1401 bus->cur_read.len = 0;
1404 /* Ok -- either we just generated a packet chain,
1405 or had one from before */
1406 if (!skb_queue_empty(&bus->glom)) {
1407 if (BRCMF_GLOM_ON()) {
1408 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1409 skb_queue_walk(&bus->glom, pnext) {
1410 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1411 pnext, (u8 *) (pnext->data),
1412 pnext->len, pnext->len);
1416 pfirst = skb_peek(&bus->glom);
1417 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1419 /* Do an SDIO read for the superframe. Configurable iovar to
1420 * read directly into the chained packet, or allocate a large
1421 * packet and and copy into the chain.
1423 sdio_claim_host(bus->sdiodev->func[1]);
1424 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1425 bus->sdiodev->sbwad,
1426 SDIO_FUNC_2, F2SYNC, &bus->glom, dlen);
1427 sdio_release_host(bus->sdiodev->func[1]);
1428 bus->sdcnt.f2rxdata++;
1430 /* On failure, kill the superframe, allow a couple retries */
1432 brcmf_err("glom read of %d bytes failed: %d\n",
1435 sdio_claim_host(bus->sdiodev->func[1]);
1436 if (bus->glomerr++ < 3) {
1437 brcmf_sdbrcm_rxfail(bus, true, true);
1440 brcmf_sdbrcm_rxfail(bus, true, false);
1441 bus->sdcnt.rxglomfail++;
1442 brcmf_sdbrcm_free_glom(bus);
1444 sdio_release_host(bus->sdiodev->func[1]);
1448 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1449 pfirst->data, min_t(int, pfirst->len, 48),
1452 rd_new.seq_num = rxseq;
1454 sdio_claim_host(bus->sdiodev->func[1]);
1455 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1456 BRCMF_SDIO_FT_SUPER);
1457 sdio_release_host(bus->sdiodev->func[1]);
1458 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1460 /* Remove superframe header, remember offset */
1461 skb_pull(pfirst, rd_new.dat_offset);
1462 sfdoff = rd_new.dat_offset;
1465 /* Validate all the subframe headers */
1466 skb_queue_walk(&bus->glom, pnext) {
1467 /* leave when invalid subframe is found */
1471 rd_new.len = pnext->len;
1472 rd_new.seq_num = rxseq++;
1473 sdio_claim_host(bus->sdiodev->func[1]);
1474 errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1476 sdio_release_host(bus->sdiodev->func[1]);
1477 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1478 pnext->data, 32, "subframe:\n");
1484 /* Terminate frame on error, request
1486 sdio_claim_host(bus->sdiodev->func[1]);
1487 if (bus->glomerr++ < 3) {
1488 /* Restore superframe header space */
1489 skb_push(pfirst, sfdoff);
1490 brcmf_sdbrcm_rxfail(bus, true, true);
1493 brcmf_sdbrcm_rxfail(bus, true, false);
1494 bus->sdcnt.rxglomfail++;
1495 brcmf_sdbrcm_free_glom(bus);
1497 sdio_release_host(bus->sdiodev->func[1]);
1498 bus->cur_read.len = 0;
1502 /* Basic SD framing looks ok - process each packet (header) */
1504 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1505 dptr = (u8 *) (pfirst->data);
1506 sublen = get_unaligned_le16(dptr);
1507 doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1509 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1511 "Rx Subframe Data:\n");
1513 __skb_trim(pfirst, sublen);
1514 skb_pull(pfirst, doff);
1516 if (pfirst->len == 0) {
1517 skb_unlink(pfirst, &bus->glom);
1518 brcmu_pkt_buf_free_skb(pfirst);
1522 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1524 min_t(int, pfirst->len, 32),
1525 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1526 bus->glom.qlen, pfirst, pfirst->data,
1527 pfirst->len, pfirst->next,
1529 skb_unlink(pfirst, &bus->glom);
1530 brcmf_rx_frame(bus->sdiodev->dev, pfirst);
1531 bus->sdcnt.rxglompkts++;
1534 bus->sdcnt.rxglomframes++;
1539 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1542 DECLARE_WAITQUEUE(wait, current);
1543 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1545 /* Wait until control frame is available */
1546 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1547 set_current_state(TASK_INTERRUPTIBLE);
1549 while (!(*condition) && (!signal_pending(current) && timeout))
1550 timeout = schedule_timeout(timeout);
1552 if (signal_pending(current))
1555 set_current_state(TASK_RUNNING);
1556 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1561 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1563 if (waitqueue_active(&bus->dcmd_resp_wait))
1564 wake_up_interruptible(&bus->dcmd_resp_wait);
1569 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1572 u8 *buf = NULL, *rbuf;
1575 brcmf_dbg(TRACE, "Enter\n");
1578 buf = vzalloc(bus->rxblen);
1583 pad = ((unsigned long)rbuf % BRCMF_SDALIGN);
1585 rbuf += (BRCMF_SDALIGN - pad);
1587 /* Copy the already-read portion over */
1588 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1589 if (len <= BRCMF_FIRSTREAD)
1592 /* Raise rdlen to next SDIO block to avoid tail command */
1593 rdlen = len - BRCMF_FIRSTREAD;
1594 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1595 pad = bus->blocksize - (rdlen % bus->blocksize);
1596 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1597 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1599 } else if (rdlen % BRCMF_SDALIGN) {
1600 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1603 /* Satisfy length-alignment requirements */
1604 if (rdlen & (ALIGNMENT - 1))
1605 rdlen = roundup(rdlen, ALIGNMENT);
1607 /* Drop if the read is too big or it exceeds our maximum */
1608 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1609 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1610 rdlen, bus->sdiodev->bus_if->maxctl);
1611 brcmf_sdbrcm_rxfail(bus, false, false);
1615 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1616 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1617 len, len - doff, bus->sdiodev->bus_if->maxctl);
1618 bus->sdcnt.rx_toolong++;
1619 brcmf_sdbrcm_rxfail(bus, false, false);
1623 /* Read remain of frame body */
1624 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1625 bus->sdiodev->sbwad,
1627 F2SYNC, rbuf, rdlen);
1628 bus->sdcnt.f2rxdata++;
1630 /* Control frame failures need retransmission */
1632 brcmf_err("read %d control bytes failed: %d\n",
1634 bus->sdcnt.rxc_errors++;
1635 brcmf_sdbrcm_rxfail(bus, true, true);
1638 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1642 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1643 buf, len, "RxCtrl:\n");
1645 /* Point to valid data and indicate its length */
1646 spin_lock_bh(&bus->rxctl_lock);
1648 brcmf_err("last control frame is being processed.\n");
1649 spin_unlock_bh(&bus->rxctl_lock);
1653 bus->rxctl = buf + doff;
1654 bus->rxctl_orig = buf;
1655 bus->rxlen = len - doff;
1656 spin_unlock_bh(&bus->rxctl_lock);
1659 /* Awake any waiters */
1660 brcmf_sdbrcm_dcmd_resp_wake(bus);
1663 /* Pad read to blocksize for efficiency */
1664 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1666 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1667 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1668 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1669 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1671 } else if (*rdlen % BRCMF_SDALIGN) {
1672 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1676 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1678 struct sk_buff *pkt; /* Packet for event or data frames */
1679 u16 pad; /* Number of pad bytes to read */
1680 uint rxleft = 0; /* Remaining number of frames allowed */
1681 int ret; /* Return code from calls */
1682 uint rxcount = 0; /* Total frames read */
1683 struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1686 brcmf_dbg(TRACE, "Enter\n");
1688 /* Not finished unless we encounter no more frames indication */
1689 bus->rxpending = true;
1691 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1692 !bus->rxskip && rxleft &&
1693 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1694 rd->seq_num++, rxleft--) {
1696 /* Handle glomming separately */
1697 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1699 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1700 bus->glomd, skb_peek(&bus->glom));
1701 cnt = brcmf_sdbrcm_rxglom(bus, rd->seq_num);
1702 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1703 rd->seq_num += cnt - 1;
1704 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1708 rd->len_left = rd->len;
1709 /* read header first for unknow frame length */
1710 sdio_claim_host(bus->sdiodev->func[1]);
1712 ret = brcmf_sdcard_recv_buf(bus->sdiodev,
1713 bus->sdiodev->sbwad,
1714 SDIO_FUNC_2, F2SYNC,
1717 bus->sdcnt.f2rxhdrs++;
1719 brcmf_err("RXHEADER FAILED: %d\n",
1721 bus->sdcnt.rx_hdrfail++;
1722 brcmf_sdbrcm_rxfail(bus, true, true);
1723 sdio_release_host(bus->sdiodev->func[1]);
1727 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1728 bus->rxhdr, SDPCM_HDRLEN,
1731 if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1732 BRCMF_SDIO_FT_NORMAL)) {
1733 sdio_release_host(bus->sdiodev->func[1]);
1734 if (!bus->rxpending)
1740 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1741 brcmf_sdbrcm_read_control(bus, bus->rxhdr,
1744 /* prepare the descriptor for the next read */
1745 rd->len = rd->len_nxtfrm << 4;
1747 /* treat all packet as event if we don't know */
1748 rd->channel = SDPCM_EVENT_CHANNEL;
1749 sdio_release_host(bus->sdiodev->func[1]);
1752 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1753 rd->len - BRCMF_FIRSTREAD : 0;
1754 head_read = BRCMF_FIRSTREAD;
1757 brcmf_pad(bus, &pad, &rd->len_left);
1759 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1762 /* Give up on data, request rtx of events */
1763 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1764 brcmf_sdbrcm_rxfail(bus, false,
1765 RETRYCHAN(rd->channel));
1766 sdio_release_host(bus->sdiodev->func[1]);
1769 skb_pull(pkt, head_read);
1770 pkt_align(pkt, rd->len_left, BRCMF_SDALIGN);
1772 ret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1773 SDIO_FUNC_2, F2SYNC, pkt);
1774 bus->sdcnt.f2rxdata++;
1775 sdio_release_host(bus->sdiodev->func[1]);
1778 brcmf_err("read %d bytes from channel %d failed: %d\n",
1779 rd->len, rd->channel, ret);
1780 brcmu_pkt_buf_free_skb(pkt);
1781 sdio_claim_host(bus->sdiodev->func[1]);
1782 brcmf_sdbrcm_rxfail(bus, true,
1783 RETRYCHAN(rd->channel));
1784 sdio_release_host(bus->sdiodev->func[1]);
1789 skb_push(pkt, head_read);
1790 memcpy(pkt->data, bus->rxhdr, head_read);
1793 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1794 rd_new.seq_num = rd->seq_num;
1795 sdio_claim_host(bus->sdiodev->func[1]);
1796 if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1797 BRCMF_SDIO_FT_NORMAL)) {
1799 brcmu_pkt_buf_free_skb(pkt);
1801 bus->sdcnt.rx_readahead_cnt++;
1802 if (rd->len != roundup(rd_new.len, 16)) {
1803 brcmf_err("frame length mismatch:read %d, should be %d\n",
1805 roundup(rd_new.len, 16) >> 4);
1807 brcmf_sdbrcm_rxfail(bus, true, true);
1808 sdio_release_host(bus->sdiodev->func[1]);
1809 brcmu_pkt_buf_free_skb(pkt);
1812 sdio_release_host(bus->sdiodev->func[1]);
1813 rd->len_nxtfrm = rd_new.len_nxtfrm;
1814 rd->channel = rd_new.channel;
1815 rd->dat_offset = rd_new.dat_offset;
1817 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1820 bus->rxhdr, SDPCM_HDRLEN,
1823 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1824 brcmf_err("readahead on control packet %d?\n",
1826 /* Force retry w/normal header read */
1828 sdio_claim_host(bus->sdiodev->func[1]);
1829 brcmf_sdbrcm_rxfail(bus, false, true);
1830 sdio_release_host(bus->sdiodev->func[1]);
1831 brcmu_pkt_buf_free_skb(pkt);
1836 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1837 pkt->data, rd->len, "Rx Data:\n");
1839 /* Save superframe descriptor and allocate packet frame */
1840 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1841 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1842 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1844 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1847 __skb_trim(pkt, rd->len);
1848 skb_pull(pkt, SDPCM_HDRLEN);
1851 brcmf_err("%s: glom superframe w/o "
1852 "descriptor!\n", __func__);
1853 sdio_claim_host(bus->sdiodev->func[1]);
1854 brcmf_sdbrcm_rxfail(bus, false, false);
1855 sdio_release_host(bus->sdiodev->func[1]);
1857 /* prepare the descriptor for the next read */
1858 rd->len = rd->len_nxtfrm << 4;
1860 /* treat all packet as event if we don't know */
1861 rd->channel = SDPCM_EVENT_CHANNEL;
1865 /* Fill in packet len and prio, deliver upward */
1866 __skb_trim(pkt, rd->len);
1867 skb_pull(pkt, rd->dat_offset);
1869 /* prepare the descriptor for the next read */
1870 rd->len = rd->len_nxtfrm << 4;
1872 /* treat all packet as event if we don't know */
1873 rd->channel = SDPCM_EVENT_CHANNEL;
1875 if (pkt->len == 0) {
1876 brcmu_pkt_buf_free_skb(pkt);
1880 brcmf_rx_frame(bus->sdiodev->dev, pkt);
1883 rxcount = maxframes - rxleft;
1884 /* Message if we hit the limit */
1886 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
1888 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
1889 /* Back off rxseq if awaiting rtx, update rx_seq */
1892 bus->rx_seq = rd->seq_num;
1898 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
1900 if (waitqueue_active(&bus->ctrl_wait))
1901 wake_up_interruptible(&bus->ctrl_wait);
1905 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
1910 dat_buf = (u8 *)(pkt->data);
1912 /* Check head padding */
1913 head_pad = ((unsigned long)dat_buf % bus->head_align);
1915 if (skb_headroom(pkt) < head_pad) {
1916 bus->sdiodev->bus_if->tx_realloc++;
1918 if (skb_cow(pkt, head_pad))
1921 skb_push(pkt, head_pad);
1922 dat_buf = (u8 *)(pkt->data);
1923 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
1929 * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
1932 /* flag marking a dummy skb added for DMA alignment requirement */
1933 #define ALIGN_SKB_FLAG 0x8000
1934 /* bit mask of data length chopped from the previous packet */
1935 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
1937 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
1938 struct sk_buff_head *pktq,
1939 struct sk_buff *pkt, u16 total_len)
1941 struct brcmf_sdio_dev *sdiodev;
1942 struct sk_buff *pkt_pad;
1943 u16 tail_pad, tail_chop, chain_pad;
1944 unsigned int blksize;
1948 sdiodev = bus->sdiodev;
1949 blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
1950 /* sg entry alignment should be a divisor of block size */
1951 WARN_ON(blksize % bus->sgentry_align);
1953 /* Check tail padding */
1954 lastfrm = skb_queue_is_last(pktq, pkt);
1956 tail_chop = pkt->len % bus->sgentry_align;
1958 tail_pad = bus->sgentry_align - tail_chop;
1959 chain_pad = (total_len + tail_pad) % blksize;
1960 if (lastfrm && chain_pad)
1961 tail_pad += blksize - chain_pad;
1962 if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
1963 pkt_pad = bus->txglom_sgpad;
1964 if (pkt_pad == NULL)
1965 brcmu_pkt_buf_get_skb(tail_pad + tail_chop);
1966 if (pkt_pad == NULL)
1968 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
1969 if (unlikely(ret < 0))
1971 memcpy(pkt_pad->data,
1972 pkt->data + pkt->len - tail_chop,
1974 *(u32 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
1975 skb_trim(pkt, pkt->len - tail_chop);
1976 __skb_queue_after(pktq, pkt, pkt_pad);
1978 ntail = pkt->data_len + tail_pad -
1979 (pkt->end - pkt->tail);
1980 if (skb_cloned(pkt) || ntail > 0)
1981 if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
1983 if (skb_linearize(pkt))
1985 __skb_put(pkt, tail_pad);
1992 * brcmf_sdio_txpkt_prep - packet preparation for transmit
1993 * @bus: brcmf_sdio structure pointer
1994 * @pktq: packet list pointer
1995 * @chan: virtual channel to transmit the packet
1997 * Processes to be applied to the packet
1998 * - Align data buffer pointer
1999 * - Align data buffer length
2001 * Return: negative value if there is error
2004 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2007 u16 head_pad, total_len;
2008 struct sk_buff *pkt_next;
2011 struct brcmf_sdio_hdrinfo hd_info = {0};
2013 txseq = bus->tx_seq;
2015 skb_queue_walk(pktq, pkt_next) {
2016 /* alignment packet inserted in previous
2017 * loop cycle can be skipped as it is
2018 * already properly aligned and does not
2019 * need an sdpcm header.
2021 if (*(u32 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2024 /* align packet data pointer */
2025 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2028 head_pad = (u16)ret;
2030 memset(pkt_next->data, 0, head_pad + bus->tx_hdrlen);
2032 total_len += pkt_next->len;
2034 hd_info.len = pkt_next->len;
2035 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2036 if (bus->txglom && pktq->qlen > 1) {
2037 ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2038 pkt_next, total_len);
2041 hd_info.tail_pad = (u16)ret;
2042 total_len += (u16)ret;
2045 hd_info.channel = chan;
2046 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2047 hd_info.seq_num = txseq++;
2049 /* Now fill the header */
2050 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2052 if (BRCMF_BYTES_ON() &&
2053 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2054 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2055 brcmf_dbg_hex_dump(true, pkt_next, hd_info.len,
2057 else if (BRCMF_HDRS_ON())
2058 brcmf_dbg_hex_dump(true, pkt_next,
2059 head_pad + bus->tx_hdrlen,
2062 /* Hardware length tag of the first packet should be total
2063 * length of the chain (including padding)
2066 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2071 * brcmf_sdio_txpkt_postp - packet post processing for transmit
2072 * @bus: brcmf_sdio structure pointer
2073 * @pktq: packet list pointer
2075 * Processes to be applied to the packet
2076 * - Remove head padding
2077 * - Remove tail padding
2080 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2085 u32 dummy_flags, chop_len;
2086 struct sk_buff *pkt_next, *tmp, *pkt_prev;
2088 skb_queue_walk_safe(pktq, pkt_next, tmp) {
2089 dummy_flags = *(u32 *)(pkt_next->cb);
2090 if (dummy_flags & ALIGN_SKB_FLAG) {
2091 chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2093 pkt_prev = pkt_next->prev;
2094 skb_put(pkt_prev, chop_len);
2096 __skb_unlink(pkt_next, pktq);
2097 brcmu_pkt_buf_free_skb(pkt_next);
2099 hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2100 dat_offset = le32_to_cpu(*(__le32 *)hdr);
2101 dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2102 SDPCM_DOFFSET_SHIFT;
2103 skb_pull(pkt_next, dat_offset);
2105 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2106 skb_trim(pkt_next, pkt_next->len - tail_pad);
2112 /* Writes a HW/SW header into the packet and sends it. */
2113 /* Assumes: (a) header space already there, (b) caller holds lock */
2114 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2119 struct sk_buff *pkt_next, *tmp;
2121 brcmf_dbg(TRACE, "Enter\n");
2123 ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2127 sdio_claim_host(bus->sdiodev->func[1]);
2128 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2129 SDIO_FUNC_2, F2SYNC, pktq);
2130 bus->sdcnt.f2txdata++;
2133 /* On failure, abort the command and terminate the frame */
2134 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2136 bus->sdcnt.tx_sderrs++;
2138 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2139 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2141 bus->sdcnt.f1regdata++;
2143 for (i = 0; i < 3; i++) {
2145 hi = brcmf_sdio_regrb(bus->sdiodev,
2146 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2147 lo = brcmf_sdio_regrb(bus->sdiodev,
2148 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2149 bus->sdcnt.f1regdata += 2;
2150 if ((hi == 0) && (lo == 0))
2154 sdio_release_host(bus->sdiodev->func[1]);
2157 brcmf_sdio_txpkt_postp(bus, pktq);
2159 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2160 skb_queue_walk_safe(pktq, pkt_next, tmp) {
2161 __skb_unlink(pkt_next, pktq);
2162 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2167 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2169 struct sk_buff *pkt;
2170 struct sk_buff_head pktq;
2172 int ret = 0, prec_out, i;
2174 u8 tx_prec_map, pkt_num;
2176 brcmf_dbg(TRACE, "Enter\n");
2178 tx_prec_map = ~bus->flowcontrol;
2180 /* Send frames until the limit or some other event */
2181 for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2183 __skb_queue_head_init(&pktq);
2185 pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2186 brcmf_sdio_txglomsz);
2187 pkt_num = min_t(u32, pkt_num,
2188 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2189 spin_lock_bh(&bus->txqlock);
2190 for (i = 0; i < pkt_num; i++) {
2191 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2195 __skb_queue_tail(&pktq, pkt);
2197 spin_unlock_bh(&bus->txqlock);
2201 ret = brcmf_sdbrcm_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2204 /* In poll mode, need to check for other events */
2205 if (!bus->intr && cnt) {
2206 /* Check device status, signal pending interrupt */
2207 sdio_claim_host(bus->sdiodev->func[1]);
2208 ret = r_sdreg32(bus, &intstatus,
2209 offsetof(struct sdpcmd_regs,
2211 sdio_release_host(bus->sdiodev->func[1]);
2212 bus->sdcnt.f2txdata++;
2215 if (intstatus & bus->hostintmask)
2216 atomic_set(&bus->ipend, 1);
2220 /* Deflow-control stack if needed */
2221 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2222 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2224 brcmf_txflowblock(bus->sdiodev->dev, false);
2230 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2232 u32 local_hostintmask;
2235 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2236 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2237 struct brcmf_sdio *bus = sdiodev->bus;
2239 brcmf_dbg(TRACE, "Enter\n");
2241 if (bus->watchdog_tsk) {
2242 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2243 kthread_stop(bus->watchdog_tsk);
2244 bus->watchdog_tsk = NULL;
2247 sdio_claim_host(bus->sdiodev->func[1]);
2249 /* Enable clock for device interrupts */
2250 brcmf_sdbrcm_bus_sleep(bus, false, false);
2252 /* Disable and clear interrupts at the chip level also */
2253 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2254 local_hostintmask = bus->hostintmask;
2255 bus->hostintmask = 0;
2257 /* Change our idea of bus state */
2258 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2260 /* Force clocks on backplane to be sure F2 interrupt propagates */
2261 saveclk = brcmf_sdio_regrb(bus->sdiodev,
2262 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2264 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2265 (saveclk | SBSDIO_FORCE_HT), &err);
2268 brcmf_err("Failed to force clock for F2: err %d\n", err);
2270 /* Turn off the bus (F2), free any pending packets */
2271 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2272 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1,
2275 /* Clear any pending interrupts now that F2 is disabled */
2276 w_sdreg32(bus, local_hostintmask,
2277 offsetof(struct sdpcmd_regs, intstatus));
2279 /* Turn off the backplane clock (only) */
2280 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2281 sdio_release_host(bus->sdiodev->func[1]);
2283 /* Clear the data packet queues */
2284 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2286 /* Clear any held glomming stuff */
2288 brcmu_pkt_buf_free_skb(bus->glomd);
2289 brcmf_sdbrcm_free_glom(bus);
2291 /* Clear rx control and wake any waiters */
2292 spin_lock_bh(&bus->rxctl_lock);
2294 spin_unlock_bh(&bus->rxctl_lock);
2295 brcmf_sdbrcm_dcmd_resp_wake(bus);
2297 /* Reset some F2 state stuff */
2298 bus->rxskip = false;
2299 bus->tx_seq = bus->rx_seq = 0;
2302 static inline void brcmf_sdbrcm_clrintr(struct brcmf_sdio *bus)
2304 unsigned long flags;
2306 if (bus->sdiodev->oob_irq_requested) {
2307 spin_lock_irqsave(&bus->sdiodev->irq_en_lock, flags);
2308 if (!bus->sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2309 enable_irq(bus->sdiodev->pdata->oob_irq_nr);
2310 bus->sdiodev->irq_en = true;
2312 spin_unlock_irqrestore(&bus->sdiodev->irq_en_lock, flags);
2316 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2323 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
2324 addr = bus->ci->c_inf[idx].base +
2325 offsetof(struct sdpcmd_regs, intstatus);
2327 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, false);
2328 bus->sdcnt.f1regdata++;
2332 val &= bus->hostintmask;
2333 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2335 /* Clear interrupts */
2337 ret = brcmf_sdio_regrw_helper(bus->sdiodev, addr, &val, true);
2338 bus->sdcnt.f1regdata++;
2342 atomic_set(&bus->intstatus, 0);
2344 for_each_set_bit(n, &val, 32)
2345 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2351 static void brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2354 unsigned long intstatus;
2355 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2356 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2357 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2360 brcmf_dbg(TRACE, "Enter\n");
2362 sdio_claim_host(bus->sdiodev->func[1]);
2364 /* If waiting for HTAVAIL, check status */
2365 if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2366 u8 clkctl, devctl = 0;
2369 /* Check for inconsistent device control */
2370 devctl = brcmf_sdio_regrb(bus->sdiodev,
2371 SBSDIO_DEVICE_CTL, &err);
2373 brcmf_err("error reading DEVCTL: %d\n", err);
2374 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2378 /* Read CSR, if clock on switch to AVAIL, else ignore */
2379 clkctl = brcmf_sdio_regrb(bus->sdiodev,
2380 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2382 brcmf_err("error reading CSR: %d\n",
2384 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2387 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2390 if (SBSDIO_HTAV(clkctl)) {
2391 devctl = brcmf_sdio_regrb(bus->sdiodev,
2392 SBSDIO_DEVICE_CTL, &err);
2394 brcmf_err("error reading DEVCTL: %d\n",
2396 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2398 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2399 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2402 brcmf_err("error writing DEVCTL: %d\n",
2404 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2406 bus->clkstate = CLK_AVAIL;
2410 /* Make sure backplane clock is on */
2411 brcmf_sdbrcm_bus_sleep(bus, false, true);
2413 /* Pending interrupt indicates new device status */
2414 if (atomic_read(&bus->ipend) > 0) {
2415 atomic_set(&bus->ipend, 0);
2416 err = brcmf_sdio_intr_rstatus(bus);
2419 /* Start with leftover status bits */
2420 intstatus = atomic_xchg(&bus->intstatus, 0);
2422 /* Handle flow-control change: read new state in case our ack
2423 * crossed another change interrupt. If change still set, assume
2424 * FC ON for safety, let next loop through do the debounce.
2426 if (intstatus & I_HMB_FC_CHANGE) {
2427 intstatus &= ~I_HMB_FC_CHANGE;
2428 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2429 offsetof(struct sdpcmd_regs, intstatus));
2431 err = r_sdreg32(bus, &newstatus,
2432 offsetof(struct sdpcmd_regs, intstatus));
2433 bus->sdcnt.f1regdata += 2;
2434 atomic_set(&bus->fcstate,
2435 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2436 intstatus |= (newstatus & bus->hostintmask);
2439 /* Handle host mailbox indication */
2440 if (intstatus & I_HMB_HOST_INT) {
2441 intstatus &= ~I_HMB_HOST_INT;
2442 intstatus |= brcmf_sdbrcm_hostmail(bus);
2445 sdio_release_host(bus->sdiodev->func[1]);
2447 /* Generally don't ask for these, can get CRC errors... */
2448 if (intstatus & I_WR_OOSYNC) {
2449 brcmf_err("Dongle reports WR_OOSYNC\n");
2450 intstatus &= ~I_WR_OOSYNC;
2453 if (intstatus & I_RD_OOSYNC) {
2454 brcmf_err("Dongle reports RD_OOSYNC\n");
2455 intstatus &= ~I_RD_OOSYNC;
2458 if (intstatus & I_SBINT) {
2459 brcmf_err("Dongle reports SBINT\n");
2460 intstatus &= ~I_SBINT;
2463 /* Would be active due to wake-wlan in gSPI */
2464 if (intstatus & I_CHIPACTIVE) {
2465 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2466 intstatus &= ~I_CHIPACTIVE;
2469 /* Ignore frame indications if rxskip is set */
2471 intstatus &= ~I_HMB_FRAME_IND;
2473 /* On frame indication, read available frames */
2474 if (PKT_AVAILABLE() && bus->clkstate == CLK_AVAIL) {
2475 framecnt = brcmf_sdio_readframes(bus, rxlimit);
2476 if (!bus->rxpending)
2477 intstatus &= ~I_HMB_FRAME_IND;
2478 rxlimit -= min(framecnt, rxlimit);
2481 /* Keep still-pending events for next scheduling */
2483 for_each_set_bit(n, &intstatus, 32)
2484 set_bit(n, (unsigned long *)&bus->intstatus.counter);
2487 brcmf_sdbrcm_clrintr(bus);
2489 if (data_ok(bus) && bus->ctrl_frame_stat &&
2490 (bus->clkstate == CLK_AVAIL)) {
2493 sdio_claim_host(bus->sdiodev->func[1]);
2494 err = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2495 SDIO_FUNC_2, F2SYNC, bus->ctrl_frame_buf,
2496 (u32) bus->ctrl_frame_len);
2499 /* On failure, abort the command and
2500 terminate the frame */
2501 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2503 bus->sdcnt.tx_sderrs++;
2505 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2507 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2509 bus->sdcnt.f1regdata++;
2511 for (i = 0; i < 3; i++) {
2513 hi = brcmf_sdio_regrb(bus->sdiodev,
2514 SBSDIO_FUNC1_WFRAMEBCHI,
2516 lo = brcmf_sdio_regrb(bus->sdiodev,
2517 SBSDIO_FUNC1_WFRAMEBCLO,
2519 bus->sdcnt.f1regdata += 2;
2520 if ((hi == 0) && (lo == 0))
2525 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2527 sdio_release_host(bus->sdiodev->func[1]);
2528 bus->ctrl_frame_stat = false;
2529 brcmf_sdbrcm_wait_event_wakeup(bus);
2531 /* Send queued frames (limit 1 if rx may still be pending) */
2532 else if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2533 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2535 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2537 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2538 txlimit -= framecnt;
2541 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) || (err != 0)) {
2542 brcmf_err("failed backplane access over SDIO, halting operation\n");
2543 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2544 atomic_set(&bus->intstatus, 0);
2545 } else if (atomic_read(&bus->intstatus) ||
2546 atomic_read(&bus->ipend) > 0 ||
2547 (!atomic_read(&bus->fcstate) &&
2548 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2549 data_ok(bus)) || PKT_AVAILABLE()) {
2550 atomic_inc(&bus->dpc_tskcnt);
2553 /* If we're done for now, turn off clock request. */
2554 if ((bus->clkstate != CLK_PENDING)
2555 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2556 bus->activity = false;
2557 brcmf_dbg(SDIO, "idle state\n");
2558 sdio_claim_host(bus->sdiodev->func[1]);
2559 brcmf_sdbrcm_bus_sleep(bus, true, false);
2560 sdio_release_host(bus->sdiodev->func[1]);
2564 static struct pktq *brcmf_sdbrcm_bus_gettxq(struct device *dev)
2566 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2567 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2568 struct brcmf_sdio *bus = sdiodev->bus;
2573 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2577 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2578 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2579 struct brcmf_sdio *bus = sdiodev->bus;
2582 brcmf_dbg(TRACE, "Enter\n");
2586 /* Add space for the header */
2587 skb_push(pkt, bus->tx_hdrlen);
2588 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2590 prec = prio2prec((pkt->priority & PRIOMASK));
2592 /* Check for existing queue, current flow-control,
2593 pending event, or pending clock */
2594 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2595 bus->sdcnt.fcqueued++;
2597 /* Priority based enq */
2598 spin_lock_irqsave(&bus->txqlock, flags);
2599 if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
2600 skb_pull(pkt, bus->tx_hdrlen);
2601 brcmf_err("out of bus->txq !!!\n");
2607 if (pktq_len(&bus->txq) >= TXHI) {
2609 brcmf_txflowblock(bus->sdiodev->dev, true);
2611 spin_unlock_irqrestore(&bus->txqlock, flags);
2614 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2615 qcount[prec] = pktq_plen(&bus->txq, prec);
2618 if (atomic_read(&bus->dpc_tskcnt) == 0) {
2619 atomic_inc(&bus->dpc_tskcnt);
2620 queue_work(bus->brcmf_wq, &bus->datawork);
2627 #define CONSOLE_LINE_MAX 192
2629 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2631 struct brcmf_console *c = &bus->console;
2632 u8 line[CONSOLE_LINE_MAX], ch;
2636 /* Don't do anything until FWREADY updates console address */
2637 if (bus->console_addr == 0)
2640 /* Read console log struct */
2641 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2642 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2647 /* Allocate console buffer (one time only) */
2648 if (c->buf == NULL) {
2649 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2650 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2655 idx = le32_to_cpu(c->log_le.idx);
2657 /* Protect against corrupt value */
2658 if (idx > c->bufsize)
2661 /* Skip reading the console buffer if the index pointer
2666 /* Read the console buffer */
2667 addr = le32_to_cpu(c->log_le.buf);
2668 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2672 while (c->last != idx) {
2673 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2674 if (c->last == idx) {
2675 /* This would output a partial line.
2677 * the buffer pointer and output this
2678 * line next time around.
2683 c->last = c->bufsize - n;
2686 ch = c->buf[c->last];
2687 c->last = (c->last + 1) % c->bufsize;
2694 if (line[n - 1] == '\r')
2697 pr_debug("CONSOLE: %s\n", line);
2706 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2711 bus->ctrl_frame_stat = false;
2712 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2713 SDIO_FUNC_2, F2SYNC, frame, len);
2716 /* On failure, abort the command and terminate the frame */
2717 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2719 bus->sdcnt.tx_sderrs++;
2721 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2723 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
2725 bus->sdcnt.f1regdata++;
2727 for (i = 0; i < 3; i++) {
2729 hi = brcmf_sdio_regrb(bus->sdiodev,
2730 SBSDIO_FUNC1_WFRAMEBCHI, NULL);
2731 lo = brcmf_sdio_regrb(bus->sdiodev,
2732 SBSDIO_FUNC1_WFRAMEBCLO, NULL);
2733 bus->sdcnt.f1regdata += 2;
2734 if (hi == 0 && lo == 0)
2740 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2746 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2753 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2754 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2755 struct brcmf_sdio *bus = sdiodev->bus;
2756 struct brcmf_sdio_hdrinfo hd_info = {0};
2758 brcmf_dbg(TRACE, "Enter\n");
2760 /* Back the pointer to make a room for bus header */
2761 frame = msg - bus->tx_hdrlen;
2762 len = (msglen += bus->tx_hdrlen);
2764 /* Add alignment padding (optional for ctl frames) */
2765 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2770 memset(frame, 0, doff + bus->tx_hdrlen);
2772 /* precondition: doff < BRCMF_SDALIGN */
2773 doff += bus->tx_hdrlen;
2775 /* Round send length to next SDIO block */
2777 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2778 pad = bus->blocksize - (len % bus->blocksize);
2779 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2781 } else if (len % BRCMF_SDALIGN) {
2782 pad = BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2786 /* Satisfy length-alignment requirements */
2787 if (len & (ALIGNMENT - 1))
2788 len = roundup(len, ALIGNMENT);
2790 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2792 /* Make sure backplane clock is on */
2793 sdio_claim_host(bus->sdiodev->func[1]);
2794 brcmf_sdbrcm_bus_sleep(bus, false, false);
2795 sdio_release_host(bus->sdiodev->func[1]);
2797 hd_info.len = (u16)msglen;
2798 hd_info.channel = SDPCM_CONTROL_CHANNEL;
2799 hd_info.dat_offset = doff;
2800 hd_info.seq_num = bus->tx_seq;
2802 hd_info.lastfrm = true;
2803 hd_info.tail_pad = pad;
2805 brcmf_sdio_hdpack(bus, frame, &hd_info);
2808 brcmf_sdio_update_hwhdr(frame, len);
2810 if (!data_ok(bus)) {
2811 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2812 bus->tx_max, bus->tx_seq);
2813 bus->ctrl_frame_stat = true;
2815 bus->ctrl_frame_buf = frame;
2816 bus->ctrl_frame_len = len;
2818 wait_event_interruptible_timeout(bus->ctrl_wait,
2819 !bus->ctrl_frame_stat,
2820 msecs_to_jiffies(2000));
2822 if (!bus->ctrl_frame_stat) {
2823 brcmf_dbg(SDIO, "ctrl_frame_stat == false\n");
2826 brcmf_dbg(SDIO, "ctrl_frame_stat == true\n");
2832 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2833 frame, len, "Tx Frame:\n");
2834 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2836 frame, min_t(u16, len, 16), "TxHdr:\n");
2839 sdio_claim_host(bus->sdiodev->func[1]);
2840 ret = brcmf_tx_frame(bus, frame, len);
2841 sdio_release_host(bus->sdiodev->func[1]);
2842 } while (ret < 0 && retries++ < TXRETRIES);
2845 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) &&
2846 atomic_read(&bus->dpc_tskcnt) == 0) {
2847 bus->activity = false;
2848 sdio_claim_host(bus->sdiodev->func[1]);
2849 brcmf_dbg(INFO, "idle\n");
2850 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2851 sdio_release_host(bus->sdiodev->func[1]);
2855 bus->sdcnt.tx_ctlerrs++;
2857 bus->sdcnt.tx_ctlpkts++;
2859 return ret ? -EIO : 0;
2863 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
2865 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
2868 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
2869 struct sdpcm_shared *sh)
2874 struct sdpcm_shared_le sh_le;
2877 shaddr = bus->ci->rambase + bus->ramsize - 4;
2880 * Read last word in socram to determine
2881 * address of sdpcm_shared structure
2883 sdio_claim_host(bus->sdiodev->func[1]);
2884 brcmf_sdbrcm_bus_sleep(bus, false, false);
2885 rv = brcmf_sdio_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4);
2886 sdio_release_host(bus->sdiodev->func[1]);
2890 addr = le32_to_cpu(addr_le);
2892 brcmf_dbg(SDIO, "sdpcm_shared address 0x%08X\n", addr);
2895 * Check if addr is valid.
2896 * NVRAM length at the end of memory should have been overwritten.
2898 if (!brcmf_sdio_valid_shared_address(addr)) {
2899 brcmf_err("invalid sdpcm_shared address 0x%08X\n",
2904 /* Read hndrte_shared structure */
2905 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
2906 sizeof(struct sdpcm_shared_le));
2911 sh->flags = le32_to_cpu(sh_le.flags);
2912 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
2913 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
2914 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
2915 sh->assert_line = le32_to_cpu(sh_le.assert_line);
2916 sh->console_addr = le32_to_cpu(sh_le.console_addr);
2917 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
2919 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
2920 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
2921 SDPCM_SHARED_VERSION,
2922 sh->flags & SDPCM_SHARED_VERSION_MASK);
2929 static int brcmf_sdio_dump_console(struct brcmf_sdio *bus,
2930 struct sdpcm_shared *sh, char __user *data,
2933 u32 addr, console_ptr, console_size, console_index;
2934 char *conbuf = NULL;
2940 /* obtain console information from device memory */
2941 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2942 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2943 (u8 *)&sh_val, sizeof(u32));
2946 console_ptr = le32_to_cpu(sh_val);
2948 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2949 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2950 (u8 *)&sh_val, sizeof(u32));
2953 console_size = le32_to_cpu(sh_val);
2955 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2956 rv = brcmf_sdio_ramrw(bus->sdiodev, false, addr,
2957 (u8 *)&sh_val, sizeof(u32));
2960 console_index = le32_to_cpu(sh_val);
2962 /* allocate buffer for console data */
2963 if (console_size <= CONSOLE_BUFFER_MAX)
2964 conbuf = vzalloc(console_size+1);
2969 /* obtain the console data from device */
2970 conbuf[console_size] = '\0';
2971 rv = brcmf_sdio_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2976 rv = simple_read_from_buffer(data, count, &pos,
2977 conbuf + console_index,
2978 console_size - console_index);
2983 if (console_index > 0) {
2985 rv = simple_read_from_buffer(data+nbytes, count, &pos,
2986 conbuf, console_index - 1);
2996 static int brcmf_sdio_trap_info(struct brcmf_sdio *bus, struct sdpcm_shared *sh,
2997 char __user *data, size_t count)
3001 struct brcmf_trap_info tr;
3004 if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
3005 brcmf_dbg(INFO, "no trap in firmware\n");
3009 error = brcmf_sdio_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
3010 sizeof(struct brcmf_trap_info));
3014 res = scnprintf(buf, sizeof(buf),
3015 "dongle trap info: type 0x%x @ epc 0x%08x\n"
3016 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3017 " lr 0x%08x pc 0x%08x offset 0x%x\n"
3018 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
3019 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
3020 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3021 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3022 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3023 le32_to_cpu(tr.pc), sh->trap_addr,
3024 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3025 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3026 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3027 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3029 return simple_read_from_buffer(data, count, &pos, buf, res);
3032 static int brcmf_sdio_assert_info(struct brcmf_sdio *bus,
3033 struct sdpcm_shared *sh, char __user *data,
3038 char file[80] = "?";
3039 char expr[80] = "<???>";
3043 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3044 brcmf_dbg(INFO, "firmware not built with -assert\n");
3046 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3047 brcmf_dbg(INFO, "no assert in dongle\n");
3051 sdio_claim_host(bus->sdiodev->func[1]);
3052 if (sh->assert_file_addr != 0) {
3053 error = brcmf_sdio_ramrw(bus->sdiodev, false,
3054 sh->assert_file_addr, (u8 *)file, 80);
3058 if (sh->assert_exp_addr != 0) {
3059 error = brcmf_sdio_ramrw(bus->sdiodev, false,
3060 sh->assert_exp_addr, (u8 *)expr, 80);
3064 sdio_release_host(bus->sdiodev->func[1]);
3066 res = scnprintf(buf, sizeof(buf),
3067 "dongle assert: %s:%d: assert(%s)\n",
3068 file, sh->assert_line, expr);
3069 return simple_read_from_buffer(data, count, &pos, buf, res);
3072 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3075 struct sdpcm_shared sh;
3077 error = brcmf_sdio_readshared(bus, &sh);
3082 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3083 brcmf_dbg(INFO, "firmware not built with -assert\n");
3084 else if (sh.flags & SDPCM_SHARED_ASSERT)
3085 brcmf_err("assertion in dongle\n");
3087 if (sh.flags & SDPCM_SHARED_TRAP)
3088 brcmf_err("firmware trap in dongle\n");
3093 static int brcmf_sdbrcm_died_dump(struct brcmf_sdio *bus, char __user *data,
3094 size_t count, loff_t *ppos)
3097 struct sdpcm_shared sh;
3104 error = brcmf_sdio_readshared(bus, &sh);
3108 error = brcmf_sdio_assert_info(bus, &sh, data, count);
3113 error = brcmf_sdio_trap_info(bus, &sh, data+nbytes, count);
3118 error = brcmf_sdio_dump_console(bus, &sh, data+nbytes, count);
3129 static ssize_t brcmf_sdio_forensic_read(struct file *f, char __user *data,
3130 size_t count, loff_t *ppos)
3132 struct brcmf_sdio *bus = f->private_data;
3135 res = brcmf_sdbrcm_died_dump(bus, data, count, ppos);
3138 return (ssize_t)res;
3141 static const struct file_operations brcmf_sdio_forensic_ops = {
3142 .owner = THIS_MODULE,
3143 .open = simple_open,
3144 .read = brcmf_sdio_forensic_read
3147 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3149 struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3150 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3152 if (IS_ERR_OR_NULL(dentry))
3155 debugfs_create_file("forensics", S_IRUGO, dentry, bus,
3156 &brcmf_sdio_forensic_ops);
3157 brcmf_debugfs_create_sdio_count(drvr, &bus->sdcnt);
3160 static int brcmf_sdbrcm_checkdied(struct brcmf_sdio *bus)
3165 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3171 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3177 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3178 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3179 struct brcmf_sdio *bus = sdiodev->bus;
3181 brcmf_dbg(TRACE, "Enter\n");
3183 /* Wait until control frame is available */
3184 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3186 spin_lock_bh(&bus->rxctl_lock);
3188 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3190 buf = bus->rxctl_orig;
3191 bus->rxctl_orig = NULL;
3193 spin_unlock_bh(&bus->rxctl_lock);
3197 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3199 } else if (timeleft == 0) {
3200 brcmf_err("resumed on timeout\n");
3201 brcmf_sdbrcm_checkdied(bus);
3202 } else if (pending) {
3203 brcmf_dbg(CTL, "cancelled\n");
3204 return -ERESTARTSYS;
3206 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3207 brcmf_sdbrcm_checkdied(bus);
3211 bus->sdcnt.rx_ctlpkts++;
3213 bus->sdcnt.rx_ctlerrs++;
3215 return rxlen ? (int)rxlen : -ETIMEDOUT;
3218 static bool brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3220 struct chip_info *ci = bus->ci;
3222 /* To enter download state, disable ARM and reset SOCRAM.
3223 * To exit download state, simply reset ARM (default is RAM boot).
3226 bus->alp_only = true;
3228 brcmf_sdio_chip_enter_download(bus->sdiodev, ci);
3230 if (!brcmf_sdio_chip_exit_download(bus->sdiodev, ci, bus->vars,
3234 /* Allow HT Clock now that the ARM is running. */
3235 bus->alp_only = false;
3237 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3243 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3245 const struct firmware *fw;
3251 fw = brcmf_sdbrcm_get_fw(bus, BRCMF_FIRMWARE_BIN);
3255 if (brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_ARM_CR4) !=
3257 memcpy(&bus->ci->rst_vec, fw->data, sizeof(bus->ci->rst_vec));
3261 address = bus->ci->rambase;
3262 while (offset < fw->size) {
3263 len = ((offset + MEMBLOCK) < fw->size) ? MEMBLOCK :
3265 err = brcmf_sdio_ramrw(bus->sdiodev, true, address,
3266 (u8 *)&fw->data[offset], len);
3268 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3277 release_firmware(fw);
3283 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3284 * and ending in a NUL.
3285 * Removes carriage returns, empty lines, comment lines, and converts
3287 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3291 static int brcmf_process_nvram_vars(struct brcmf_sdio *bus,
3292 const struct firmware *nv)
3299 uint buf_len, n, len;
3302 varbuf = vmalloc(len);
3306 memcpy(varbuf, nv->data, len);
3309 findNewline = false;
3312 for (n = 0; n < len; n++) {
3315 if (varbuf[n] == '\r')
3317 if (findNewline && varbuf[n] != '\n')
3319 findNewline = false;
3320 if (varbuf[n] == '#') {
3324 if (varbuf[n] == '\n') {
3334 buf_len = dp - varbuf;
3335 while (dp < varbuf + n)
3339 /* roundup needed for download to device */
3340 bus->varsz = roundup(buf_len + 1, 4);
3341 bus->vars = kmalloc(bus->varsz, GFP_KERNEL);
3342 if (bus->vars == NULL) {
3348 /* copy the processed variables and add null termination */
3349 memcpy(bus->vars, varbuf, buf_len);
3350 bus->vars[buf_len] = 0;
3356 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3358 const struct firmware *nv;
3361 nv = brcmf_sdbrcm_get_fw(bus, BRCMF_FIRMWARE_NVRAM);
3365 ret = brcmf_process_nvram_vars(bus, nv);
3367 release_firmware(nv);
3372 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3376 /* Keep arm in reset */
3377 if (!brcmf_sdbrcm_download_state(bus, true)) {
3378 brcmf_err("error placing ARM core in reset\n");
3382 if (brcmf_sdbrcm_download_code_file(bus)) {
3383 brcmf_err("dongle image file download failed\n");
3387 if (brcmf_sdbrcm_download_nvram(bus)) {
3388 brcmf_err("dongle nvram file download failed\n");
3392 /* Take arm out of reset */
3393 if (!brcmf_sdbrcm_download_state(bus, false)) {
3394 brcmf_err("error getting out of ARM core reset\n");
3404 static bool brcmf_sdbrcm_sr_capable(struct brcmf_sdio *bus)
3408 brcmf_dbg(TRACE, "Enter\n");
3410 /* old chips with PMU version less than 17 don't support save restore */
3411 if (bus->ci->pmurev < 17)
3414 /* read PMU chipcontrol register 3*/
3415 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr);
3416 brcmf_sdio_regwl(bus->sdiodev, addr, 3, NULL);
3417 addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data);
3418 reg = brcmf_sdio_regrl(bus->sdiodev, addr, NULL);
3423 static void brcmf_sdbrcm_sr_init(struct brcmf_sdio *bus)
3428 brcmf_dbg(TRACE, "Enter\n");
3430 val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3433 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3437 val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3438 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL,
3441 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3445 /* Add CMD14 Support */
3446 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3447 (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3448 SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3451 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3455 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3456 SBSDIO_FORCE_HT, &err);
3458 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3463 bus->sr_enabled = true;
3464 brcmf_dbg(INFO, "SR enabled\n");
3467 /* enable KSO bit */
3468 static int brcmf_sdbrcm_kso_init(struct brcmf_sdio *bus)
3473 brcmf_dbg(TRACE, "Enter\n");
3475 /* KSO bit added in SDIO core rev 12 */
3476 if (bus->ci->c_inf[1].rev < 12)
3479 val = brcmf_sdio_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3482 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3486 if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3487 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3488 SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3489 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3492 brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3502 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3506 sdio_claim_host(bus->sdiodev->func[1]);
3508 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3510 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3512 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3514 sdio_release_host(bus->sdiodev->func[1]);
3519 static int brcmf_sdbrcm_bus_preinit(struct device *dev)
3521 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3522 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3523 struct brcmf_sdio *bus = sdiodev->bus;
3529 /* the commands below use the terms tx and rx from
3530 * a device perspective, ie. bus:txglom affects the
3531 * bus transfers from device to host.
3533 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3534 if (bus->ci->c_inf[idx].rev < 12) {
3535 /* for sdio core rev < 12, disable txgloming */
3537 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3540 /* otherwise, set txglomalign */
3543 value = sdiodev->pdata->sd_sgentry_align;
3544 /* SDIO ADMA requires at least 32 bit alignment */
3545 value = max_t(u32, value, 4);
3546 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3553 bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3554 if (sdiodev->sg_support) {
3555 bus->txglom = false;
3557 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3558 bus->txglom_sgpad = brcmu_pkt_buf_get_skb(pad_size);
3559 if (!bus->txglom_sgpad)
3560 brcmf_err("allocating txglom padding skb failed, reduced performance\n");
3562 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3563 &value, sizeof(u32));
3565 /* bus:rxglom is allowed to fail */
3569 bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3572 brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3578 static int brcmf_sdbrcm_bus_init(struct device *dev)
3580 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3581 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3582 struct brcmf_sdio *bus = sdiodev->bus;
3583 unsigned long timeout;
3588 brcmf_dbg(TRACE, "Enter\n");
3590 /* try to download image and nvram to the dongle */
3591 if (bus_if->state == BRCMF_BUS_DOWN) {
3592 if (!(brcmf_sdbrcm_download_firmware(bus)))
3596 if (!bus->sdiodev->bus_if->drvr)
3599 /* Start the watchdog timer */
3600 bus->sdcnt.tickcnt = 0;
3601 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3603 sdio_claim_host(bus->sdiodev->func[1]);
3605 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3606 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3607 if (bus->clkstate != CLK_AVAIL)
3610 /* Force clocks on backplane to be sure F2 interrupt propagates */
3611 saveclk = brcmf_sdio_regrb(bus->sdiodev,
3612 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3614 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3615 (saveclk | SBSDIO_FORCE_HT), &err);
3618 brcmf_err("Failed to force clock for F2: err %d\n", err);
3622 /* Enable function 2 (frame transfers) */
3623 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3624 offsetof(struct sdpcmd_regs, tosbmailboxdata));
3625 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3627 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3629 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3631 while (enable != ready) {
3632 ready = brcmf_sdio_regrb(bus->sdiodev,
3633 SDIO_CCCR_IORx, NULL);
3634 if (time_after(jiffies, timeout))
3636 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3637 /* prevent busy waiting if it takes too long */
3638 msleep_interruptible(20);
3641 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3643 /* If F2 successfully enabled, set core and enable interrupts */
3644 if (ready == enable) {
3645 /* Set up the interrupt mask and enable interrupts */
3646 bus->hostintmask = HOSTINTMASK;
3647 w_sdreg32(bus, bus->hostintmask,
3648 offsetof(struct sdpcmd_regs, hostintmask));
3650 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_WATERMARK, 8, &err);
3652 /* Disable F2 again */
3653 enable = SDIO_FUNC_ENABLE_1;
3654 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx, enable, NULL);
3658 if (brcmf_sdbrcm_sr_capable(bus)) {
3659 brcmf_sdbrcm_sr_init(bus);
3661 /* Restore previous clock setting */
3662 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3667 ret = brcmf_sdio_intr_register(bus->sdiodev);
3669 brcmf_err("intr register failed:%d\n", ret);
3672 /* If we didn't come up, turn off backplane clock */
3673 if (bus_if->state != BRCMF_BUS_DATA)
3674 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3677 sdio_release_host(bus->sdiodev->func[1]);
3682 void brcmf_sdbrcm_isr(void *arg)
3684 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3686 brcmf_dbg(TRACE, "Enter\n");
3689 brcmf_err("bus is null pointer, exiting\n");
3693 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3694 brcmf_err("bus is down. we have nothing to do\n");
3697 /* Count the interrupt call */
3698 bus->sdcnt.intrcount++;
3700 atomic_set(&bus->ipend, 1);
3702 if (brcmf_sdio_intr_rstatus(bus)) {
3703 brcmf_err("failed backplane access\n");
3704 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3707 /* Disable additional interrupts (is this needed now)? */
3709 brcmf_err("isr w/o interrupt configured!\n");
3711 atomic_inc(&bus->dpc_tskcnt);
3712 queue_work(bus->brcmf_wq, &bus->datawork);
3715 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3718 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3721 brcmf_dbg(TIMER, "Enter\n");
3723 /* Poll period: check device if appropriate. */
3724 if (!bus->sr_enabled &&
3725 bus->poll && (++bus->polltick >= bus->pollrate)) {
3728 /* Reset poll tick */
3731 /* Check device if no interrupts */
3733 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3735 if (atomic_read(&bus->dpc_tskcnt) == 0) {
3738 sdio_claim_host(bus->sdiodev->func[1]);
3739 devpend = brcmf_sdio_regrb(bus->sdiodev,
3742 sdio_release_host(bus->sdiodev->func[1]);
3744 devpend & (INTR_STATUS_FUNC1 |
3748 /* If there is something, make like the ISR and
3751 bus->sdcnt.pollcnt++;
3752 atomic_set(&bus->ipend, 1);
3754 atomic_inc(&bus->dpc_tskcnt);
3755 queue_work(bus->brcmf_wq, &bus->datawork);
3759 /* Update interrupt tracking */
3760 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3763 /* Poll for console output periodically */
3764 if (bus_if && bus_if->state == BRCMF_BUS_DATA &&
3765 bus->console_interval != 0) {
3766 bus->console.count += BRCMF_WD_POLL_MS;
3767 if (bus->console.count >= bus->console_interval) {
3768 bus->console.count -= bus->console_interval;
3769 sdio_claim_host(bus->sdiodev->func[1]);
3770 /* Make sure backplane clock is on */
3771 brcmf_sdbrcm_bus_sleep(bus, false, false);
3772 if (brcmf_sdbrcm_readconsole(bus) < 0)
3774 bus->console_interval = 0;
3775 sdio_release_host(bus->sdiodev->func[1]);
3780 /* On idle timeout clear activity flag and/or turn off clock */
3781 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3782 if (++bus->idlecount >= bus->idletime) {
3784 if (bus->activity) {
3785 bus->activity = false;
3786 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3788 brcmf_dbg(SDIO, "idle\n");
3789 sdio_claim_host(bus->sdiodev->func[1]);
3790 brcmf_sdbrcm_bus_sleep(bus, true, false);
3791 sdio_release_host(bus->sdiodev->func[1]);
3796 return (atomic_read(&bus->ipend) > 0);
3799 static void brcmf_sdio_dataworker(struct work_struct *work)
3801 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3804 while (atomic_read(&bus->dpc_tskcnt)) {
3805 brcmf_sdbrcm_dpc(bus);
3806 atomic_dec(&bus->dpc_tskcnt);
3810 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3812 brcmf_dbg(TRACE, "Enter\n");
3815 bus->rxctl = bus->rxbuf = NULL;
3819 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3821 brcmf_dbg(TRACE, "Enter\n");
3823 if (bus->sdiodev->bus_if->maxctl) {
3825 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3826 ALIGNMENT) + BRCMF_SDALIGN;
3827 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3836 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3844 bus->alp_only = true;
3846 sdio_claim_host(bus->sdiodev->func[1]);
3848 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3849 brcmf_sdio_regrl(bus->sdiodev, SI_ENUM_BASE, NULL));
3852 * Force PLL off until brcmf_sdio_chip_attach()
3853 * programs PLL control regs
3856 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3857 BRCMF_INIT_CLKCTL1, &err);
3859 clkctl = brcmf_sdio_regrb(bus->sdiodev,
3860 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3862 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3863 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3864 err, BRCMF_INIT_CLKCTL1, clkctl);
3868 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3869 brcmf_err("brcmf_sdio_chip_attach failed!\n");
3873 if (brcmf_sdbrcm_kso_init(bus)) {
3874 brcmf_err("error enabling KSO\n");
3878 if ((bus->sdiodev->pdata) && (bus->sdiodev->pdata->drive_strength))
3879 drivestrength = bus->sdiodev->pdata->drive_strength;
3881 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3882 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci, drivestrength);
3884 /* Get info on the SOCRAM cores... */
3885 bus->ramsize = bus->ci->ramsize;
3886 if (!(bus->ramsize)) {
3887 brcmf_err("failed to find SOCRAM memory!\n");
3891 /* Set card control so an SDIO card reset does a WLAN backplane reset */
3892 reg_val = brcmf_sdio_regrb(bus->sdiodev,
3893 SDIO_CCCR_BRCM_CARDCTRL, &err);
3897 reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3899 brcmf_sdio_regwb(bus->sdiodev,
3900 SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3904 /* set PMUControl so a backplane reset does PMU state reload */
3905 reg_addr = CORE_CC_REG(bus->ci->c_inf[0].base,
3907 reg_val = brcmf_sdio_regrl(bus->sdiodev,
3913 reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3915 brcmf_sdio_regwl(bus->sdiodev,
3923 sdio_release_host(bus->sdiodev->func[1]);
3925 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3927 /* Locate an appropriately-aligned portion of hdrbuf */
3928 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3931 /* Set the poll and/or interrupt flags */
3940 sdio_release_host(bus->sdiodev->func[1]);
3944 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3946 brcmf_dbg(TRACE, "Enter\n");
3948 sdio_claim_host(bus->sdiodev->func[1]);
3950 /* Disable F2 to clear any intermediate frame state on the dongle */
3951 brcmf_sdio_regwb(bus->sdiodev, SDIO_CCCR_IOEx,
3952 SDIO_FUNC_ENABLE_1, NULL);
3954 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3955 bus->rxflow = false;
3957 /* Done with backplane-dependent accesses, can drop clock... */
3958 brcmf_sdio_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3960 sdio_release_host(bus->sdiodev->func[1]);
3962 /* ...and initialize clock/power states */
3963 bus->clkstate = CLK_SDONLY;
3964 bus->idletime = BRCMF_IDLE_INTERVAL;
3965 bus->idleclock = BRCMF_IDLE_ACTIVE;
3967 /* Query the F2 block size, set roundup accordingly */
3968 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3969 bus->roundup = min(max_roundup, bus->blocksize);
3972 bus->sleeping = false;
3973 bus->sr_enabled = false;
3979 brcmf_sdbrcm_watchdog_thread(void *data)
3981 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3983 allow_signal(SIGTERM);
3984 /* Run until signal received */
3986 if (kthread_should_stop())
3988 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3989 brcmf_sdbrcm_bus_watchdog(bus);
3990 /* Count the tick for reference */
3991 bus->sdcnt.tickcnt++;
3999 brcmf_sdbrcm_watchdog(unsigned long data)
4001 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
4003 if (bus->watchdog_tsk) {
4004 complete(&bus->watchdog_wait);
4005 /* Reschedule the watchdog */
4006 if (bus->wd_timer_valid)
4007 mod_timer(&bus->timer,
4008 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4012 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
4014 brcmf_dbg(TRACE, "Enter\n");
4017 sdio_claim_host(bus->sdiodev->func[1]);
4018 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
4019 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
4020 sdio_release_host(bus->sdiodev->func[1]);
4021 brcmf_sdio_chip_detach(&bus->ci);
4022 if (bus->vars && bus->varsz)
4027 brcmf_dbg(TRACE, "Disconnected\n");
4030 /* Detach and free everything */
4031 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
4033 brcmf_dbg(TRACE, "Enter\n");
4036 /* De-register interrupt handler */
4037 brcmf_sdio_intr_unregister(bus->sdiodev);
4039 cancel_work_sync(&bus->datawork);
4041 destroy_workqueue(bus->brcmf_wq);
4043 if (bus->sdiodev->bus_if->drvr) {
4044 brcmf_detach(bus->sdiodev->dev);
4045 brcmf_sdbrcm_release_dongle(bus);
4048 brcmu_pkt_buf_free_skb(bus->txglom_sgpad);
4049 brcmf_sdbrcm_release_malloc(bus);
4054 brcmf_dbg(TRACE, "Disconnected\n");
4057 static struct brcmf_bus_ops brcmf_sdio_bus_ops = {
4058 .stop = brcmf_sdbrcm_bus_stop,
4059 .preinit = brcmf_sdbrcm_bus_preinit,
4060 .init = brcmf_sdbrcm_bus_init,
4061 .txdata = brcmf_sdbrcm_bus_txdata,
4062 .txctl = brcmf_sdbrcm_bus_txctl,
4063 .rxctl = brcmf_sdbrcm_bus_rxctl,
4064 .gettxq = brcmf_sdbrcm_bus_gettxq,
4067 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
4070 struct brcmf_sdio *bus;
4072 brcmf_dbg(TRACE, "Enter\n");
4074 /* We make an assumption about address window mappings:
4075 * regsva == SI_ENUM_BASE*/
4077 /* Allocate private bus interface state */
4078 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4082 bus->sdiodev = sdiodev;
4084 skb_queue_head_init(&bus->glom);
4085 bus->txbound = BRCMF_TXBOUND;
4086 bus->rxbound = BRCMF_RXBOUND;
4087 bus->txminmax = BRCMF_TXMINMAX;
4088 bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4090 /* platform specific configuration:
4091 * alignments must be at least 4 bytes for ADMA
4093 bus->head_align = ALIGNMENT;
4094 bus->sgentry_align = ALIGNMENT;
4095 if (sdiodev->pdata) {
4096 if (sdiodev->pdata->sd_head_align > ALIGNMENT)
4097 bus->head_align = sdiodev->pdata->sd_head_align;
4098 if (sdiodev->pdata->sd_sgentry_align > ALIGNMENT)
4099 bus->sgentry_align = sdiodev->pdata->sd_sgentry_align;
4102 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4103 bus->brcmf_wq = create_singlethread_workqueue("brcmf_wq");
4104 if (bus->brcmf_wq == NULL) {
4105 brcmf_err("insufficient memory to create txworkqueue\n");
4109 /* attempt to attach to the dongle */
4110 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
4111 brcmf_err("brcmf_sdbrcm_probe_attach failed\n");
4115 spin_lock_init(&bus->rxctl_lock);
4116 spin_lock_init(&bus->txqlock);
4117 init_waitqueue_head(&bus->ctrl_wait);
4118 init_waitqueue_head(&bus->dcmd_resp_wait);
4120 /* Set up the watchdog timer */
4121 init_timer(&bus->timer);
4122 bus->timer.data = (unsigned long)bus;
4123 bus->timer.function = brcmf_sdbrcm_watchdog;
4125 /* Initialize watchdog thread */
4126 init_completion(&bus->watchdog_wait);
4127 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
4128 bus, "brcmf_watchdog");
4129 if (IS_ERR(bus->watchdog_tsk)) {
4130 pr_warn("brcmf_watchdog thread failed to start\n");
4131 bus->watchdog_tsk = NULL;
4133 /* Initialize DPC thread */
4134 atomic_set(&bus->dpc_tskcnt, 0);
4136 /* Assign bus interface call back */
4137 bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4138 bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4139 bus->sdiodev->bus_if->chip = bus->ci->chip;
4140 bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4142 /* default sdio bus header length for tx packet */
4143 bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4145 /* Attach to the common layer, reserve hdr space */
4146 ret = brcmf_attach(bus->sdiodev->dev);
4148 brcmf_err("brcmf_attach failed\n");
4152 /* Allocate buffers */
4153 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
4154 brcmf_err("brcmf_sdbrcm_probe_malloc failed\n");
4158 if (!(brcmf_sdbrcm_probe_init(bus))) {
4159 brcmf_err("brcmf_sdbrcm_probe_init failed\n");
4163 brcmf_sdio_debugfs_create(bus);
4164 brcmf_dbg(INFO, "completed!!\n");
4166 /* if firmware path present try to download and bring up bus */
4167 ret = brcmf_bus_start(bus->sdiodev->dev);
4169 brcmf_err("dongle is not responding\n");
4176 brcmf_sdbrcm_release(bus);
4180 void brcmf_sdbrcm_disconnect(void *ptr)
4182 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
4184 brcmf_dbg(TRACE, "Enter\n");
4187 brcmf_sdbrcm_release(bus);
4189 brcmf_dbg(TRACE, "Disconnected\n");
4193 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
4195 /* Totally stop the timer */
4196 if (!wdtick && bus->wd_timer_valid) {
4197 del_timer_sync(&bus->timer);
4198 bus->wd_timer_valid = false;
4199 bus->save_ms = wdtick;
4203 /* don't start the wd until fw is loaded */
4204 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
4208 if (bus->save_ms != BRCMF_WD_POLL_MS) {
4209 if (bus->wd_timer_valid)
4210 /* Stop timer and restart at new value */
4211 del_timer_sync(&bus->timer);
4213 /* Create timer again when watchdog period is
4214 dynamically changed or in the first instance
4216 bus->timer.expires =
4217 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4218 add_timer(&bus->timer);
4221 /* Re arm the timer, at last watchdog period */
4222 mod_timer(&bus->timer,
4223 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4226 bus->wd_timer_valid = true;
4227 bus->save_ms = wdtick;
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