2 * Copyright (c) 2011 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 /* ***** SDIO interface chip backplane handle functions ***** */
18 #include <linux/types.h>
19 #include <linux/netdevice.h>
20 #include <linux/mmc/card.h>
21 #include <chipcommon.h>
22 #include <brcm_hw_ids.h>
23 #include <brcmu_wifi.h>
24 #include <brcmu_utils.h>
27 #include "sdio_host.h"
28 #include "sdio_chip.h"
30 /* chip core base & ramsize */
32 /* SDIO device core, ID 0x829 */
33 #define BCM4329_CORE_BUS_BASE 0x18011000
34 /* internal memory core, ID 0x80e */
35 #define BCM4329_CORE_SOCRAM_BASE 0x18003000
36 /* ARM Cortex M3 core, ID 0x82a */
37 #define BCM4329_CORE_ARM_BASE 0x18002000
38 #define BCM4329_RAMSIZE 0x48000
43 #define SBIDH_RC_MASK 0x000f /* revision code */
44 #define SBIDH_RCE_MASK 0x7000 /* revision code extension field */
45 #define SBIDH_RCE_SHIFT 8
46 #define SBCOREREV(sbidh) \
47 ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | \
48 ((sbidh) & SBIDH_RC_MASK))
49 #define SBIDH_CC_MASK 0x8ff0 /* core code */
50 #define SBIDH_CC_SHIFT 4
51 #define SBIDH_VC_MASK 0xffff0000 /* vendor code */
52 #define SBIDH_VC_SHIFT 16
54 static int brcmf_sdio_chip_recognition(struct brcmf_sdio_dev *sdiodev,
55 struct chip_info *ci, u32 regs)
61 * Chipid is assume to be at offset 0 from regs arg
62 * For different chiptypes or old sdio hosts w/o chipcommon,
63 * other ways of recognition should be added here.
65 ci->cccorebase = regs;
66 regdata = brcmf_sdcard_reg_read(sdiodev,
67 CORE_CC_REG(ci->cccorebase, chipid), 4);
68 ci->chip = regdata & CID_ID_MASK;
69 ci->chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT;
71 brcmf_dbg(INFO, "chipid=0x%x chiprev=%d\n", ci->chip, ci->chiprev);
73 /* Address of cores for new chips should be added here */
76 ci->buscorebase = BCM4329_CORE_BUS_BASE;
77 ci->ramcorebase = BCM4329_CORE_SOCRAM_BASE;
78 ci->armcorebase = BCM4329_CORE_ARM_BASE;
79 ci->ramsize = BCM4329_RAMSIZE;
82 brcmf_dbg(ERROR, "chipid 0x%x is not supported\n", ci->chip);
86 regdata = brcmf_sdcard_reg_read(sdiodev,
87 CORE_SB(ci->cccorebase, sbidhigh), 4);
88 ci->ccrev = SBCOREREV(regdata);
90 regdata = brcmf_sdcard_reg_read(sdiodev,
91 CORE_CC_REG(ci->cccorebase, pmucapabilities), 4);
92 ci->pmurev = regdata & PCAP_REV_MASK;
94 regdata = brcmf_sdcard_reg_read(sdiodev,
95 CORE_SB(ci->buscorebase, sbidhigh), 4);
96 ci->buscorerev = SBCOREREV(regdata);
97 ci->buscoretype = (regdata & SBIDH_CC_MASK) >> SBIDH_CC_SHIFT;
99 brcmf_dbg(INFO, "ccrev=%d, pmurev=%d, buscore rev/type=%d/0x%x\n",
100 ci->ccrev, ci->pmurev, ci->buscorerev, ci->buscoretype);
102 /* get chipcommon capabilites */
103 ci->cccaps = brcmf_sdcard_reg_read(sdiodev,
104 CORE_CC_REG(ci->cccorebase, capabilities), 4);
110 brcmf_sdio_chip_buscoreprep(struct brcmf_sdio_dev *sdiodev)
115 /* Try forcing SDIO core to do ALPAvail request only */
116 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
117 brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1,
118 SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
120 brcmf_dbg(ERROR, "error writing for HT off\n");
124 /* If register supported, wait for ALPAvail and then force ALP */
125 /* This may take up to 15 milliseconds */
126 clkval = brcmf_sdcard_cfg_read(sdiodev, SDIO_FUNC_1,
127 SBSDIO_FUNC1_CHIPCLKCSR, NULL);
129 if ((clkval & ~SBSDIO_AVBITS) != clkset) {
130 brcmf_dbg(ERROR, "ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
135 SPINWAIT(((clkval = brcmf_sdcard_cfg_read(sdiodev, SDIO_FUNC_1,
136 SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
137 !SBSDIO_ALPAV(clkval)),
138 PMU_MAX_TRANSITION_DLY);
139 if (!SBSDIO_ALPAV(clkval)) {
140 brcmf_dbg(ERROR, "timeout on ALPAV wait, clkval 0x%02x\n",
145 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
146 brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1,
147 SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
150 /* Also, disable the extra SDIO pull-ups */
151 brcmf_sdcard_cfg_write(sdiodev, SDIO_FUNC_1,
152 SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
157 int brcmf_sdio_chip_attach(struct brcmf_sdio_dev *sdiodev,
158 struct chip_info *ci, u32 regs)
162 ret = brcmf_sdio_chip_buscoreprep(sdiodev);
166 ret = brcmf_sdio_chip_recognition(sdiodev, ci, regs);