drivers/net/wireless/brcm80211/brcmsmac/main.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/pci_ids.h>
  18 #include <linux/if_ether.h>
  19 #include <net/mac80211.h>
  20 #include <brcm_hw_ids.h>
  21 #include <aiutils.h>
  22 #include <chipcommon.h>
  23 #include "rate.h"
  24 #include "scb.h"
  25 #include "phy/phy_hal.h"
  26 #include "channel.h"
  27 #include "antsel.h"
  28 #include "stf.h"
  29 #include "ampdu.h"
  30 #include "mac80211_if.h"
  31 #include "ucode_loader.h"
  32 #include "main.h"
  33 #include "soc.h"
  34
  35 /*
  36  * Indication for txflowcontrol that all priority bits in
  37  * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
  38  */
  39 #define ALLPRIO                         -1
  40
  41 /* watchdog timer, in unit of ms */
  42 #define TIMER_INTERVAL_WATCHDOG         1000
  43 /* radio monitor timer, in unit of ms */
  44 #define TIMER_INTERVAL_RADIOCHK         800
  45
  46 /* beacon interval, in unit of 1024TU */
  47 #define BEACON_INTERVAL_DEFAULT         100
  48
  49 /* n-mode support capability */
  50 /* 2x2 includes both 1x1 & 2x2 devices
  51  * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
  52  * control it independently
  53  */
  54 #define WL_11N_2x2                      1
  55 #define WL_11N_3x3                      3
  56 #define WL_11N_4x4                      4
  57
  58 #define EDCF_ACI_MASK                   0x60
  59 #define EDCF_ACI_SHIFT                  5
  60 #define EDCF_ECWMIN_MASK                0x0f
  61 #define EDCF_ECWMAX_SHIFT               4
  62 #define EDCF_AIFSN_MASK                 0x0f
  63 #define EDCF_AIFSN_MAX                  15
  64 #define EDCF_ECWMAX_MASK                0xf0
  65
  66 #define EDCF_AC_BE_TXOP_STA             0x0000
  67 #define EDCF_AC_BK_TXOP_STA             0x0000
  68 #define EDCF_AC_VO_ACI_STA              0x62
  69 #define EDCF_AC_VO_ECW_STA              0x32
  70 #define EDCF_AC_VI_ACI_STA              0x42
  71 #define EDCF_AC_VI_ECW_STA              0x43
  72 #define EDCF_AC_BK_ECW_STA              0xA4
  73 #define EDCF_AC_VI_TXOP_STA             0x005e
  74 #define EDCF_AC_VO_TXOP_STA             0x002f
  75 #define EDCF_AC_BE_ACI_STA              0x03
  76 #define EDCF_AC_BE_ECW_STA              0xA4
  77 #define EDCF_AC_BK_ACI_STA              0x27
  78 #define EDCF_AC_VO_TXOP_AP              0x002f
  79
  80 #define EDCF_TXOP2USEC(txop)            ((txop) << 5)
  81 #define EDCF_ECW2CW(exp)                ((1 << (exp)) - 1)
  82
  83 #define APHY_SYMBOL_TIME                4
  84 #define APHY_PREAMBLE_TIME              16
  85 #define APHY_SIGNAL_TIME                4
  86 #define APHY_SIFS_TIME                  16
  87 #define APHY_SERVICE_NBITS              16
  88 #define APHY_TAIL_NBITS                 6
  89 #define BPHY_SIFS_TIME                  10
  90 #define BPHY_PLCP_SHORT_TIME            96
  91
  92 #define PREN_PREAMBLE                   24
  93 #define PREN_MM_EXT                     12
  94 #define PREN_PREAMBLE_EXT               4
  95
  96 #define DOT11_MAC_HDR_LEN               24
  97 #define DOT11_ACK_LEN                   10
  98 #define DOT11_BA_LEN                    4
  99 #define DOT11_OFDM_SIGNAL_EXTENSION     6
 100 #define DOT11_MIN_FRAG_LEN              256
 101 #define DOT11_RTS_LEN                   16
 102 #define DOT11_CTS_LEN                   10
 103 #define DOT11_BA_BITMAP_LEN             128
 104 #define DOT11_MIN_BEACON_PERIOD         1
 105 #define DOT11_MAX_BEACON_PERIOD         0xFFFF
 106 #define DOT11_MAXNUMFRAGS               16
 107 #define DOT11_MAX_FRAG_LEN              2346
 108
 109 #define BPHY_PLCP_TIME                  192
 110 #define RIFS_11N_TIME                   2
 111
 112 #define AC_BE                           0
 113 #define AC_BK                           1
 114 #define AC_VI                           2
 115 #define AC_VO                           3
 116
 117 /* length of the BCN template area */
 118 #define BCN_TMPL_LEN                    512
 119
 120 /* brcms_bss_info flag bit values */
 121 #define BRCMS_BSS_HT                    0x0020  /* BSS is HT (MIMO) capable */
 122
 123 /* chip rx buffer offset */
 124 #define BRCMS_HWRXOFF                   38
 125
 126 /* rfdisable delay timer 500 ms, runs of ALP clock */
 127 #define RFDISABLE_DEFAULT               10000000
 128
 129 #define BRCMS_TEMPSENSE_PERIOD          10      /* 10 second timeout */
 130
 131 /* precedences numbers for wlc queues. These are twice as may levels as
 132  * 802.1D priorities.
 133  * Odd numbers are used for HI priority traffic at same precedence levels
 134  * These constants are used ONLY by wlc_prio2prec_map.  Do not use them
 135  * elsewhere.
 136  */
 137 #define _BRCMS_PREC_NONE                0       /* None = - */
 138 #define _BRCMS_PREC_BK                  2       /* BK - Background */
 139 #define _BRCMS_PREC_BE                  4       /* BE - Best-effort */
 140 #define _BRCMS_PREC_EE                  6       /* EE - Excellent-effort */
 141 #define _BRCMS_PREC_CL                  8       /* CL - Controlled Load */
 142 #define _BRCMS_PREC_VI                  10      /* Vi - Video */
 143 #define _BRCMS_PREC_VO                  12      /* Vo - Voice */
 144 #define _BRCMS_PREC_NC                  14      /* NC - Network Control */
 145
 146 /* synthpu_dly times in us */
 147 #define SYNTHPU_DLY_APHY_US             3700
 148 #define SYNTHPU_DLY_BPHY_US             1050
 149 #define SYNTHPU_DLY_NPHY_US             2048
 150 #define SYNTHPU_DLY_LPPHY_US            300
 151
 152 #define ANTCNT                          10      /* vanilla M_MAX_ANTCNT val */
 153
 154 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
 155 #define EDCF_SHORT_S                    0
 156 #define EDCF_SFB_S                      4
 157 #define EDCF_LONG_S                     8
 158 #define EDCF_LFB_S                      12
 159 #define EDCF_SHORT_M                    BITFIELD_MASK(4)
 160 #define EDCF_SFB_M                      BITFIELD_MASK(4)
 161 #define EDCF_LONG_M                     BITFIELD_MASK(4)
 162 #define EDCF_LFB_M                      BITFIELD_MASK(4)
 163
 164 #define RETRY_SHORT_DEF                 7       /* Default Short retry Limit */
 165 #define RETRY_SHORT_MAX                 255     /* Maximum Short retry Limit */
 166 #define RETRY_LONG_DEF                  4       /* Default Long retry count */
 167 #define RETRY_SHORT_FB                  3       /* Short count for fb rate */
 168 #define RETRY_LONG_FB                   2       /* Long count for fb rate */
 169
 170 #define APHY_CWMIN                      15
 171 #define PHY_CWMAX                       1023
 172
 173 #define EDCF_AIFSN_MIN                  1
 174
 175 #define FRAGNUM_MASK                    0xF
 176
 177 #define APHY_SLOT_TIME                  9
 178 #define BPHY_SLOT_TIME                  20
 179
 180 #define WL_SPURAVOID_OFF                0
 181 #define WL_SPURAVOID_ON1                1
 182 #define WL_SPURAVOID_ON2                2
 183
 184 /* invalid core flags, use the saved coreflags */
 185 #define BRCMS_USE_COREFLAGS             0xffffffff
 186
 187 /* values for PLCPHdr_override */
 188 #define BRCMS_PLCP_AUTO                 -1
 189 #define BRCMS_PLCP_SHORT                0
 190 #define BRCMS_PLCP_LONG                 1
 191
 192 /* values for g_protection_override and n_protection_override */
 193 #define BRCMS_PROTECTION_AUTO           -1
 194 #define BRCMS_PROTECTION_OFF            0
 195 #define BRCMS_PROTECTION_ON             1
 196 #define BRCMS_PROTECTION_MMHDR_ONLY     2
 197 #define BRCMS_PROTECTION_CTS_ONLY       3
 198
 199 /* values for g_protection_control and n_protection_control */
 200 #define BRCMS_PROTECTION_CTL_OFF        0
 201 #define BRCMS_PROTECTION_CTL_LOCAL      1
 202 #define BRCMS_PROTECTION_CTL_OVERLAP    2
 203
 204 /* values for n_protection */
 205 #define BRCMS_N_PROTECTION_OFF          0
 206 #define BRCMS_N_PROTECTION_OPTIONAL     1
 207 #define BRCMS_N_PROTECTION_20IN40       2
 208 #define BRCMS_N_PROTECTION_MIXEDMODE    3
 209
 210 /* values for band specific 40MHz capabilities */
 211 #define BRCMS_N_BW_20ALL                0
 212 #define BRCMS_N_BW_40ALL                1
 213 #define BRCMS_N_BW_20IN2G_40IN5G        2
 214
 215 /* bitflags for SGI support (sgi_rx iovar) */
 216 #define BRCMS_N_SGI_20                  0x01
 217 #define BRCMS_N_SGI_40                  0x02
 218
 219 /* defines used by the nrate iovar */
 220 /* MSC in use,indicates b0-6 holds an mcs */
 221 #define NRATE_MCS_INUSE                 0x00000080
 222 /* rate/mcs value */
 223 #define NRATE_RATE_MASK                 0x0000007f
 224 /* stf mode mask: siso, cdd, stbc, sdm */
 225 #define NRATE_STF_MASK                  0x0000ff00
 226 /* stf mode shift */
 227 #define NRATE_STF_SHIFT                 8
 228 /* bit indicate to override mcs only */
 229 #define NRATE_OVERRIDE_MCS_ONLY         0x40000000
 230 #define NRATE_SGI_MASK                  0x00800000      /* sgi mode */
 231 #define NRATE_SGI_SHIFT                 23              /* sgi mode */
 232 #define NRATE_LDPC_CODING               0x00400000      /* adv coding in use */
 233 #define NRATE_LDPC_SHIFT                22              /* ldpc shift */
 234
 235 #define NRATE_STF_SISO                  0               /* stf mode SISO */
 236 #define NRATE_STF_CDD                   1               /* stf mode CDD */
 237 #define NRATE_STF_STBC                  2               /* stf mode STBC */
 238 #define NRATE_STF_SDM                   3               /* stf mode SDM */
 239
 240 #define MAX_DMA_SEGS                    4
 241
 242 /* Max # of entries in Tx FIFO based on 4kb page size */
 243 #define NTXD                            256
 244 /* Max # of entries in Rx FIFO based on 4kb page size */
 245 #define NRXD                            256
 246
 247 /* try to keep this # rbufs posted to the chip */
 248 #define NRXBUFPOST                      32
 249
 250 /* data msg txq hiwat mark */
 251 #define BRCMS_DATAHIWAT                 50
 252
 253 /* max # frames to process in brcms_c_recv() */
 254 #define RXBND                           8
 255 /* max # tx status to process in wlc_txstatus() */
 256 #define TXSBND                          8
 257
 258 /* brcmu_format_flags() bit description structure */
 259 struct brcms_c_bit_desc {
 260         u32 bit;
 261         const char *name;
 262 };
 263
 264 /*
 265  * The following table lists the buffer memory allocated to xmt fifos in HW.
 266  * the size is in units of 256bytes(one block), total size is HW dependent
 267  * ucode has default fifo partition, sw can overwrite if necessary
 268  *
 269  * This is documented in twiki under the topic UcodeTxFifo. Please ensure
 270  * the twiki is updated before making changes.
 271  */
 272
 273 /* Starting corerev for the fifo size table */
 274 #define XMTFIFOTBL_STARTREV     20
 275
 276 struct d11init {
 277         __le16 addr;
 278         __le16 size;
 279         __le32 value;
 280 };
 281
 282 struct edcf_acparam {
 283         u8 ACI;
 284         u8 ECW;
 285         u16 TXOP;
 286 } __packed;
 287
 288 const u8 prio2fifo[NUMPRIO] = {
 289         TX_AC_BE_FIFO,          /* 0    BE      AC_BE   Best Effort */
 290         TX_AC_BK_FIFO,          /* 1    BK      AC_BK   Background */
 291         TX_AC_BK_FIFO,          /* 2    --      AC_BK   Background */
 292         TX_AC_BE_FIFO,          /* 3    EE      AC_BE   Best Effort */
 293         TX_AC_VI_FIFO,          /* 4    CL      AC_VI   Video */
 294         TX_AC_VI_FIFO,          /* 5    VI      AC_VI   Video */
 295         TX_AC_VO_FIFO,          /* 6    VO      AC_VO   Voice */
 296         TX_AC_VO_FIFO           /* 7    NC      AC_VO   Voice */
 297 };
 298
 299 /* debug/trace */
 300 uint brcm_msg_level =
 301 #if defined(BCMDBG)
 302         LOG_ERROR_VAL;
 303 #else
 304         0;
 305 #endif                          /* BCMDBG */
 306
 307 /* TX FIFO number to WME/802.1E Access Category */
 308 static const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE };
 309
 310 /* WME/802.1E Access Category to TX FIFO number */
 311 static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 };
 312
 313 /* 802.1D Priority to precedence queue mapping */
 314 const u8 wlc_prio2prec_map[] = {
 315         _BRCMS_PREC_BE,         /* 0 BE - Best-effort */
 316         _BRCMS_PREC_BK,         /* 1 BK - Background */
 317         _BRCMS_PREC_NONE,               /* 2 None = - */
 318         _BRCMS_PREC_EE,         /* 3 EE - Excellent-effort */
 319         _BRCMS_PREC_CL,         /* 4 CL - Controlled Load */
 320         _BRCMS_PREC_VI,         /* 5 Vi - Video */
 321         _BRCMS_PREC_VO,         /* 6 Vo - Voice */
 322         _BRCMS_PREC_NC,         /* 7 NC - Network Control */
 323 };
 324
 325 static const u16 xmtfifo_sz[][NFIFO] = {
 326         /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
 327         {20, 192, 192, 21, 17, 5},
 328         /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
 329         {9, 58, 22, 14, 14, 5},
 330         /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
 331         {20, 192, 192, 21, 17, 5},
 332         /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
 333         {20, 192, 192, 21, 17, 5},
 334         /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
 335         {9, 58, 22, 14, 14, 5},
 336 };
 337
 338 #ifdef BCMDBG
 339 static const char * const fifo_names[] = {
 340         "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
 341 #else
 342 static const char fifo_names[6][0];
 343 #endif
 344
 345 #ifdef BCMDBG
 346 /* pointer to most recently allocated wl/wlc */
 347 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
 348 #endif
 349
 350 /* Find basic rate for a given rate */
 351 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
 352 {
 353         if (is_mcs_rate(rspec))
 354                 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
 355                        .leg_ofdm];
 356         return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
 357 }
 358
 359 static u16 frametype(u32 rspec, u8 mimoframe)
 360 {
 361         if (is_mcs_rate(rspec))
 362                 return mimoframe;
 363         return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
 364 }
 365
 366 /* currently the best mechanism for determining SIFS is the band in use */
 367 static u16 get_sifs(struct brcms_band *band)
 368 {
 369         return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
 370                                  BPHY_SIFS_TIME;
 371 }
 372
 373 /*
 374  * Detect Card removed.
 375  * Even checking an sbconfig register read will not false trigger when the core
 376  * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
 377  * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
 378  * reg with fixed 0/1 pattern (some platforms return all 0).
 379  * If clocks are present, call the sb routine which will figure out if the
 380  * device is removed.
 381  */
 382 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
 383 {
 384         if (!wlc->hw->clk)
 385                 return ai_deviceremoved(wlc->hw->sih);
 386         return (R_REG(&wlc->hw->regs->maccontrol) &
 387                 (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
 388 }
 389
 390 /* sum the individual fifo tx pending packet counts */
 391 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
 392 {
 393         return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
 394                wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
 395 }
 396
 397 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
 398 {
 399         return wlc->pub->_nbands > 1 && !wlc->bandlocked;
 400 }
 401
 402 static int brcms_chspec_bw(u16 chanspec)
 403 {
 404         if (CHSPEC_IS40(chanspec))
 405                 return BRCMS_40_MHZ;
 406         if (CHSPEC_IS20(chanspec))
 407                 return BRCMS_20_MHZ;
 408
 409         return BRCMS_10_MHZ;
 410 }
 411
 412 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
 413 {
 414         if (cfg == NULL)
 415                 return;
 416
 417         kfree(cfg->current_bss);
 418         kfree(cfg);
 419 }
 420
 421 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
 422 {
 423         if (wlc == NULL)
 424                 return;
 425
 426         brcms_c_bsscfg_mfree(wlc->bsscfg);
 427         kfree(wlc->pub);
 428         kfree(wlc->modulecb);
 429         kfree(wlc->default_bss);
 430         kfree(wlc->protection);
 431         kfree(wlc->stf);
 432         kfree(wlc->bandstate[0]);
 433         kfree(wlc->corestate->macstat_snapshot);
 434         kfree(wlc->corestate);
 435         kfree(wlc->hw->bandstate[0]);
 436         kfree(wlc->hw);
 437
 438         /* free the wlc */
 439         kfree(wlc);
 440         wlc = NULL;
 441 }
 442
 443 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
 444 {
 445         struct brcms_bss_cfg *cfg;
 446
 447         cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
 448         if (cfg == NULL)
 449                 goto fail;
 450
 451         cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
 452         if (cfg->current_bss == NULL)
 453                 goto fail;
 454
 455         return cfg;
 456
 457  fail:
 458         brcms_c_bsscfg_mfree(cfg);
 459         return NULL;
 460 }
 461
 462 static struct brcms_c_info *
 463 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
 464 {
 465         struct brcms_c_info *wlc;
 466
 467         wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
 468         if (wlc == NULL) {
 469                 *err = 1002;
 470                 goto fail;
 471         }
 472
 473         /* allocate struct brcms_c_pub state structure */
 474         wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
 475         if (wlc->pub == NULL) {
 476                 *err = 1003;
 477                 goto fail;
 478         }
 479         wlc->pub->wlc = wlc;
 480
 481         /* allocate struct brcms_hardware state structure */
 482
 483         wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
 484         if (wlc->hw == NULL) {
 485                 *err = 1005;
 486                 goto fail;
 487         }
 488         wlc->hw->wlc = wlc;
 489
 490         wlc->hw->bandstate[0] =
 491                 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
 492         if (wlc->hw->bandstate[0] == NULL) {
 493                 *err = 1006;
 494                 goto fail;
 495         } else {
 496                 int i;
 497
 498                 for (i = 1; i < MAXBANDS; i++)
 499                         wlc->hw->bandstate[i] = (struct brcms_hw_band *)
 500                             ((unsigned long)wlc->hw->bandstate[0] +
 501                              (sizeof(struct brcms_hw_band) * i));
 502         }
 503
 504         wlc->modulecb =
 505                 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
 506         if (wlc->modulecb == NULL) {
 507                 *err = 1009;
 508                 goto fail;
 509         }
 510
 511         wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
 512         if (wlc->default_bss == NULL) {
 513                 *err = 1010;
 514                 goto fail;
 515         }
 516
 517         wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
 518         if (wlc->bsscfg == NULL) {
 519                 *err = 1011;
 520                 goto fail;
 521         }
 522
 523         wlc->protection = kzalloc(sizeof(struct brcms_protection),
 524                                   GFP_ATOMIC);
 525         if (wlc->protection == NULL) {
 526                 *err = 1016;
 527                 goto fail;
 528         }
 529
 530         wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
 531         if (wlc->stf == NULL) {
 532                 *err = 1017;
 533                 goto fail;
 534         }
 535
 536         wlc->bandstate[0] =
 537                 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
 538         if (wlc->bandstate[0] == NULL) {
 539                 *err = 1025;
 540                 goto fail;
 541         } else {
 542                 int i;
 543
 544                 for (i = 1; i < MAXBANDS; i++)
 545                         wlc->bandstate[i] = (struct brcms_band *)
 546                                 ((unsigned long)wlc->bandstate[0]
 547                                 + (sizeof(struct brcms_band)*i));
 548         }
 549
 550         wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
 551         if (wlc->corestate == NULL) {
 552                 *err = 1026;
 553                 goto fail;
 554         }
 555
 556         wlc->corestate->macstat_snapshot =
 557                 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
 558         if (wlc->corestate->macstat_snapshot == NULL) {
 559                 *err = 1027;
 560                 goto fail;
 561         }
 562
 563         return wlc;
 564
 565  fail:
 566         brcms_c_detach_mfree(wlc);
 567         return NULL;
 568 }
 569
 570 /*
 571  * Update the slot timing for standard 11b/g (20us slots)
 572  * or shortslot 11g (9us slots)
 573  * The PSM needs to be suspended for this call.
 574  */
 575 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
 576                                         bool shortslot)
 577 {
 578         struct d11regs __iomem *regs;
 579
 580         regs = wlc_hw->regs;
 581
 582         if (shortslot) {
 583                 /* 11g short slot: 11a timing */
 584                 W_REG(&regs->ifs_slot, 0x0207); /* APHY_SLOT_TIME */
 585                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
 586         } else {
 587                 /* 11g long slot: 11b timing */
 588                 W_REG(&regs->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */
 589                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
 590         }
 591 }
 592
 593 /*
 594  * calculate frame duration of a given rate and length, return
 595  * time in usec unit
 596  */
 597 static uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
 598                                     u8 preamble_type, uint mac_len)
 599 {
 600         uint nsyms, dur = 0, Ndps, kNdps;
 601         uint rate = rspec2rate(ratespec);
 602
 603         if (rate == 0) {
 604                 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
 605                           wlc->pub->unit);
 606                 rate = BRCM_RATE_1M;
 607         }
 608
 609         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
 610                  wlc->pub->unit, ratespec, preamble_type, mac_len);
 611
 612         if (is_mcs_rate(ratespec)) {
 613                 uint mcs = ratespec & RSPEC_RATE_MASK;
 614                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
 615
 616                 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
 617                 if (preamble_type == BRCMS_MM_PREAMBLE)
 618                         dur += PREN_MM_EXT;
 619                 /* 1000Ndbps = kbps * 4 */
 620                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
 621                                    rspec_issgi(ratespec)) * 4;
 622
 623                 if (rspec_stc(ratespec) == 0)
 624                         nsyms =
 625                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
 626                                   APHY_TAIL_NBITS) * 1000, kNdps);
 627                 else
 628                         /* STBC needs to have even number of symbols */
 629                         nsyms =
 630                             2 *
 631                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
 632                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
 633
 634                 dur += APHY_SYMBOL_TIME * nsyms;
 635                 if (wlc->band->bandtype == BRCM_BAND_2G)
 636                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
 637         } else if (is_ofdm_rate(rate)) {
 638                 dur = APHY_PREAMBLE_TIME;
 639                 dur += APHY_SIGNAL_TIME;
 640                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
 641                 Ndps = rate * 2;
 642                 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
 643                 nsyms =
 644                     CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
 645                          Ndps);
 646                 dur += APHY_SYMBOL_TIME * nsyms;
 647                 if (wlc->band->bandtype == BRCM_BAND_2G)
 648                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
 649         } else {
 650                 /*
 651                  * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
 652                  * will divide out
 653                  */
 654                 mac_len = mac_len * 8 * 2;
 655                 /* calc ceiling of bits/rate = microseconds of air time */
 656                 dur = (mac_len + rate - 1) / rate;
 657                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
 658                         dur += BPHY_PLCP_SHORT_TIME;
 659                 else
 660                         dur += BPHY_PLCP_TIME;
 661         }
 662         return dur;
 663 }
 664
 665 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
 666                                 const struct d11init *inits)
 667 {
 668         int i;
 669         u8 __iomem *base;
 670         u8 __iomem *addr;
 671         u16 size;
 672         u32 value;
 673
 674         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
 675
 676         base = (u8 __iomem *)wlc_hw->regs;
 677
 678         for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
 679                 size = le16_to_cpu(inits[i].size);
 680                 addr = base + le16_to_cpu(inits[i].addr);
 681                 value = le32_to_cpu(inits[i].value);
 682                 if (size == 2)
 683                         W_REG((u16 __iomem *)addr, value);
 684                 else if (size == 4)
 685                         W_REG((u32 __iomem *)addr, value);
 686                 else
 687                         break;
 688         }
 689 }
 690
 691 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
 692 {
 693         u8 idx;
 694         u16 addr[] = {
 695                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
 696                 M_HOST_FLAGS5
 697         };
 698
 699         for (idx = 0; idx < MHFMAX; idx++)
 700                 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
 701 }
 702
 703 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
 704 {
 705         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
 706         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
 707
 708         /* init microcode host flags */
 709         brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
 710
 711         /* do band-specific ucode IHR, SHM, and SCR inits */
 712         if (D11REV_IS(wlc_hw->corerev, 23)) {
 713                 if (BRCMS_ISNPHY(wlc_hw->band))
 714                         brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
 715                 else
 716                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
 717                                   " %d\n", __func__, wlc_hw->unit,
 718                                   wlc_hw->corerev);
 719         } else {
 720                 if (D11REV_IS(wlc_hw->corerev, 24)) {
 721                         if (BRCMS_ISLCNPHY(wlc_hw->band))
 722                                 brcms_c_write_inits(wlc_hw,
 723                                                     ucode->d11lcn0bsinitvals24);
 724                         else
 725                                 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
 726                                           " core rev %d\n", __func__,
 727                                           wlc_hw->unit, wlc_hw->corerev);
 728                 } else {
 729                         wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
 730                                 __func__, wlc_hw->unit, wlc_hw->corerev);
 731                 }
 732         }
 733 }
 734
 735 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
 736 {
 737         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
 738
 739         wlc_hw->phyclk = clk;
 740
 741         if (OFF == clk) {       /* clear gmode bit, put phy into reset */
 742
 743                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE),
 744                                (SICF_PRST | SICF_FGC));
 745                 udelay(1);
 746                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST);
 747                 udelay(1);
 748
 749         } else {                /* take phy out of reset */
 750
 751                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC);
 752                 udelay(1);
 753                 ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0);
 754                 udelay(1);
 755
 756         }
 757 }
 758
 759 /* low-level band switch utility routine */
 760 static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
 761 {
 762         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
 763                 bandunit);
 764
 765         wlc_hw->band = wlc_hw->bandstate[bandunit];
 766
 767         /*
 768          * BMAC_NOTE:
 769          *   until we eliminate need for wlc->band refs in low level code
 770          */
 771         wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
 772
 773         /* set gmode core flag */
 774         if (wlc_hw->sbclk && !wlc_hw->noreset)
 775                 ai_core_cflags(wlc_hw->sih, SICF_GMODE,
 776                                ((bandunit == 0) ? SICF_GMODE : 0));
 777 }
 778
 779 /* switch to new band but leave it inactive */
 780 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
 781 {
 782         struct brcms_hardware *wlc_hw = wlc->hw;
 783         u32 macintmask;
 784
 785         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
 786
 787         WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
 788
 789         /* disable interrupts */
 790         macintmask = brcms_intrsoff(wlc->wl);
 791
 792         /* radio off */
 793         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
 794
 795         brcms_b_core_phy_clk(wlc_hw, OFF);
 796
 797         brcms_c_setxband(wlc_hw, bandunit);
 798
 799         return macintmask;
 800 }
 801
 802 /* process an individual struct tx_status */
 803 static bool
 804 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
 805 {
 806         struct sk_buff *p;
 807         uint queue;
 808         struct d11txh *txh;
 809         struct scb *scb = NULL;
 810         bool free_pdu;
 811         int tx_rts, tx_frame_count, tx_rts_count;
 812         uint totlen, supr_status;
 813         bool lastframe;
 814         struct ieee80211_hdr *h;
 815         u16 mcl;
 816         struct ieee80211_tx_info *tx_info;
 817         struct ieee80211_tx_rate *txrate;
 818         int i;
 819
 820         /* discard intermediate indications for ucode with one legitimate case:
 821          *   e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
 822          *   but the subsequent tx of DATA failed. so it will start rts/cts
 823          *   from the beginning (resetting the rts transmission count)
 824          */
 825         if (!(txs->status & TX_STATUS_AMPDU)
 826             && (txs->status & TX_STATUS_INTERMEDIATE)) {
 827                 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
 828                           __func__);
 829                 return false;
 830         }
 831
 832         queue = txs->frameid & TXFID_QUEUE_MASK;
 833         if (queue >= NFIFO) {
 834                 p = NULL;
 835                 goto fatal;
 836         }
 837
 838         p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
 839         if (p == NULL)
 840                 goto fatal;
 841
 842         txh = (struct d11txh *) (p->data);
 843         mcl = le16_to_cpu(txh->MacTxControlLow);
 844
 845         if (txs->phyerr) {
 846                 if (brcm_msg_level & LOG_ERROR_VAL) {
 847                         wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
 848                                   txs->phyerr, txh->MainRates);
 849                         brcms_c_print_txdesc(txh);
 850                 }
 851                 brcms_c_print_txstatus(txs);
 852         }
 853
 854         if (txs->frameid != le16_to_cpu(txh->TxFrameID))
 855                 goto fatal;
 856         tx_info = IEEE80211_SKB_CB(p);
 857         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
 858
 859         if (tx_info->control.sta)
 860                 scb = &wlc->pri_scb;
 861
 862         if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
 863                 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
 864                 return false;
 865         }
 866
 867         supr_status = txs->status & TX_STATUS_SUPR_MASK;
 868         if (supr_status == TX_STATUS_SUPR_BADCH)
 869                 BCMMSG(wlc->wiphy,
 870                        "%s: Pkt tx suppressed, possibly channel %d\n",
 871                        __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
 872
 873         tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
 874         tx_frame_count =
 875             (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
 876         tx_rts_count =
 877             (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
 878
 879         lastframe = !ieee80211_has_morefrags(h->frame_control);
 880
 881         if (!lastframe) {
 882                 wiphy_err(wlc->wiphy, "Not last frame!\n");
 883         } else {
 884                 /*
 885                  * Set information to be consumed by Minstrel ht.
 886                  *
 887                  * The "fallback limit" is the number of tx attempts a given
 888                  * MPDU is sent at the "primary" rate. Tx attempts beyond that
 889                  * limit are sent at the "secondary" rate.
 890                  * A 'short frame' does not exceed RTS treshold.
 891                  */
 892                 u16 sfbl,       /* Short Frame Rate Fallback Limit */
 893                     lfbl,       /* Long Frame Rate Fallback Limit */
 894                     fbl;
 895
 896                 if (queue < AC_COUNT) {
 897                         sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
 898                                       EDCF_SFB);
 899                         lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
 900                                       EDCF_LFB);
 901                 } else {
 902                         sfbl = wlc->SFBL;
 903                         lfbl = wlc->LFBL;
 904                 }
 905
 906                 txrate = tx_info->status.rates;
 907                 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
 908                         fbl = lfbl;
 909                 else
 910                         fbl = sfbl;
 911
 912                 ieee80211_tx_info_clear_status(tx_info);
 913
 914                 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
 915                         /*
 916                          * rate selection requested a fallback rate
 917                          * and we used it
 918                          */
 919                         txrate[0].count = fbl;
 920                         txrate[1].count = tx_frame_count - fbl;
 921                 } else {
 922                         /*
 923                          * rate selection did not request fallback rate, or
 924                          * we didn't need it
 925                          */
 926                         txrate[0].count = tx_frame_count;
 927                         /*
 928                          * rc80211_minstrel.c:minstrel_tx_status() expects
 929                          * unused rates to be marked with idx = -1
 930                          */
 931                         txrate[1].idx = -1;
 932                         txrate[1].count = 0;
 933                 }
 934
 935                 /* clear the rest of the rates */
 936                 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
 937                         txrate[i].idx = -1;
 938                         txrate[i].count = 0;
 939                 }
 940
 941                 if (txs->status & TX_STATUS_ACK_RCV)
 942                         tx_info->flags |= IEEE80211_TX_STAT_ACK;
 943         }
 944
 945         totlen = brcmu_pkttotlen(p);
 946         free_pdu = true;
 947
 948         brcms_c_txfifo_complete(wlc, queue, 1);
 949
 950         if (lastframe) {
 951                 p->next = NULL;
 952                 p->prev = NULL;
 953                 /* remove PLCP & Broadcom tx descriptor header */
 954                 skb_pull(p, D11_PHY_HDR_LEN);
 955                 skb_pull(p, D11_TXH_LEN);
 956                 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
 957         } else {
 958                 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
 959                           "tx_status\n", __func__);
 960         }
 961
 962         return false;
 963
 964  fatal:
 965         if (p)
 966                 brcmu_pkt_buf_free_skb(p);
 967
 968         return true;
 969
 970 }
 971
 972 /* process tx completion events in BMAC
 973  * Return true if more tx status need to be processed. false otherwise.
 974  */
 975 static bool
 976 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
 977 {
 978         bool morepending = false;
 979         struct brcms_c_info *wlc = wlc_hw->wlc;
 980         struct d11regs __iomem *regs;
 981         struct tx_status txstatus, *txs;
 982         u32 s1, s2;
 983         uint n = 0;
 984         /*
 985          * Param 'max_tx_num' indicates max. # tx status to process before
 986          * break out.
 987          */
 988         uint max_tx_num = bound ? TXSBND : -1;
 989
 990         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
 991
 992         txs = &txstatus;
 993         regs = wlc_hw->regs;
 994         *fatal = false;
 995         while (!(*fatal)
 996                && (s1 = R_REG(&regs->frmtxstatus)) & TXS_V) {
 997
 998                 if (s1 == 0xffffffff) {
 999                         wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1000                                 wlc_hw->unit, __func__);
1001                         return morepending;
1002                 }
1003
1004                 s2 = R_REG(&regs->frmtxstatus2);
1005
1006                 txs->status = s1 & TXS_STATUS_MASK;
1007                 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1008                 txs->sequence = s2 & TXS_SEQ_MASK;
1009                 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1010                 txs->lasttxtime = 0;
1011
1012                 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1013
1014                 /* !give others some time to run! */
1015                 if (++n >= max_tx_num)
1016                         break;
1017         }
1018
1019         if (*fatal)
1020                 return 0;
1021
1022         if (n >= max_tx_num)
1023                 morepending = true;
1024
1025         if (!pktq_empty(&wlc->pkt_queue->q))
1026                 brcms_c_send_q(wlc);
1027
1028         return morepending;
1029 }
1030
1031 static void brcms_c_tbtt(struct brcms_c_info *wlc)
1032 {
1033         if (!wlc->bsscfg->BSS)
1034                 /*
1035                  * DirFrmQ is now valid...defer setting until end
1036                  * of ATIM window
1037                  */
1038                 wlc->qvalid |= MCMD_DIRFRMQVAL;
1039 }
1040
1041 /* set initial host flags value */
1042 static void
1043 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1044 {
1045         struct brcms_hardware *wlc_hw = wlc->hw;
1046
1047         memset(mhfs, 0, MHFMAX * sizeof(u16));
1048
1049         mhfs[MHF2] |= mhf2_init;
1050
1051         /* prohibit use of slowclock on multifunction boards */
1052         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1053                 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1054
1055         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1056                 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1057                 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1058         }
1059 }
1060
1061 static struct dma64regs __iomem *
1062 dmareg(struct brcms_hardware *hw, uint direction, uint fifonum)
1063 {
1064         if (direction == DMA_TX)
1065                 return &(hw->regs->fifo64regs[fifonum].dmaxmt);
1066         return &(hw->regs->fifo64regs[fifonum].dmarcv);
1067 }
1068
1069 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1070 {
1071         uint i;
1072         char name[8];
1073         /*
1074          * ucode host flag 2 needed for pio mode, independent of band and fifo
1075          */
1076         u16 pio_mhf2 = 0;
1077         struct brcms_hardware *wlc_hw = wlc->hw;
1078         uint unit = wlc_hw->unit;
1079         struct wiphy *wiphy = wlc->wiphy;
1080
1081         /* name and offsets for dma_attach */
1082         snprintf(name, sizeof(name), "wl%d", unit);
1083
1084         if (wlc_hw->di[0] == NULL) {    /* Init FIFOs */
1085                 int dma_attach_err = 0;
1086
1087                 /*
1088                  * FIFO 0
1089                  * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1090                  * RX: RX_FIFO (RX data packets)
1091                  */
1092                 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih,
1093                                            (wme ? dmareg(wlc_hw, DMA_TX, 0) :
1094                                             NULL), dmareg(wlc_hw, DMA_RX, 0),
1095                                            (wme ? NTXD : 0), NRXD,
1096                                            RXBUFSZ, -1, NRXBUFPOST,
1097                                            BRCMS_HWRXOFF, &brcm_msg_level);
1098                 dma_attach_err |= (NULL == wlc_hw->di[0]);
1099
1100                 /*
1101                  * FIFO 1
1102                  * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1103                  *   (legacy) TX_DATA_FIFO (TX data packets)
1104                  * RX: UNUSED
1105                  */
1106                 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih,
1107                                            dmareg(wlc_hw, DMA_TX, 1), NULL,
1108                                            NTXD, 0, 0, -1, 0, 0,
1109                                            &brcm_msg_level);
1110                 dma_attach_err |= (NULL == wlc_hw->di[1]);
1111
1112                 /*
1113                  * FIFO 2
1114                  * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1115                  * RX: UNUSED
1116                  */
1117                 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih,
1118                                            dmareg(wlc_hw, DMA_TX, 2), NULL,
1119                                            NTXD, 0, 0, -1, 0, 0,
1120                                            &brcm_msg_level);
1121                 dma_attach_err |= (NULL == wlc_hw->di[2]);
1122                 /*
1123                  * FIFO 3
1124                  * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1125                  *   (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1126                  */
1127                 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih,
1128                                            dmareg(wlc_hw, DMA_TX, 3),
1129                                            NULL, NTXD, 0, 0, -1,
1130                                            0, 0, &brcm_msg_level);
1131                 dma_attach_err |= (NULL == wlc_hw->di[3]);
1132 /* Cleaner to leave this as if with AP defined */
1133
1134                 if (dma_attach_err) {
1135                         wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1136                                   "\n", unit);
1137                         return false;
1138                 }
1139
1140                 /* get pointer to dma engine tx flow control variable */
1141                 for (i = 0; i < NFIFO; i++)
1142                         if (wlc_hw->di[i])
1143                                 wlc_hw->txavail[i] =
1144                                     (uint *) dma_getvar(wlc_hw->di[i],
1145                                                         "&txavail");
1146         }
1147
1148         /* initial ucode host flags */
1149         brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1150
1151         return true;
1152 }
1153
1154 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1155 {
1156         uint j;
1157
1158         for (j = 0; j < NFIFO; j++) {
1159                 if (wlc_hw->di[j]) {
1160                         dma_detach(wlc_hw->di[j]);
1161                         wlc_hw->di[j] = NULL;
1162                 }
1163         }
1164 }
1165
1166 /*
1167  * Initialize brcms_c_info default values ...
1168  * may get overrides later in this function
1169  *  BMAC_NOTES, move low out and resolve the dangling ones
1170  */
1171 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1172 {
1173         struct brcms_c_info *wlc = wlc_hw->wlc;
1174
1175         /* set default sw macintmask value */
1176         wlc->defmacintmask = DEF_MACINTMASK;
1177
1178         /* various 802.11g modes */
1179         wlc_hw->shortslot = false;
1180
1181         wlc_hw->SFBL = RETRY_SHORT_FB;
1182         wlc_hw->LFBL = RETRY_LONG_FB;
1183
1184         /* default mac retry limits */
1185         wlc_hw->SRL = RETRY_SHORT_DEF;
1186         wlc_hw->LRL = RETRY_LONG_DEF;
1187         wlc_hw->chanspec = ch20mhz_chspec(1);
1188 }
1189
1190 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1191 {
1192         /* delay before first read of ucode state */
1193         udelay(40);
1194
1195         /* wait until ucode is no longer asleep */
1196         SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1197                   DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1198 }
1199
1200 /* control chip clock to save power, enable dynamic clock or force fast clock */
1201 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1202 {
1203         if (wlc_hw->sih->cccaps & CC_CAP_PMU) {
1204                 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1205                  * on backplane, but mac core will still run on ALP(not HT) when
1206                  * it enters powersave mode, which means the FCA bit may not be
1207                  * set. Should wakeup mac if driver wants it to run on HT.
1208                  */
1209
1210                 if (wlc_hw->clk) {
1211                         if (mode == CLK_FAST) {
1212                                 OR_REG(&wlc_hw->regs->clk_ctl_st,
1213                                        CCS_FORCEHT);
1214
1215                                 udelay(64);
1216
1217                                 SPINWAIT(((R_REG
1218                                            (&wlc_hw->regs->
1219                                             clk_ctl_st) & CCS_HTAVAIL) == 0),
1220                                          PMU_MAX_TRANSITION_DLY);
1221                                 WARN_ON(!(R_REG
1222                                           (&wlc_hw->regs->
1223                                            clk_ctl_st) & CCS_HTAVAIL));
1224                         } else {
1225                                 if ((wlc_hw->sih->pmurev == 0) &&
1226                                     (R_REG
1227                                      (&wlc_hw->regs->
1228                                       clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ)))
1229                                         SPINWAIT(((R_REG
1230                                                    (&wlc_hw->regs->
1231                                                     clk_ctl_st) & CCS_HTAVAIL)
1232                                                   == 0),
1233                                                  PMU_MAX_TRANSITION_DLY);
1234                                 AND_REG(&wlc_hw->regs->clk_ctl_st,
1235                                         ~CCS_FORCEHT);
1236                         }
1237                 }
1238                 wlc_hw->forcefastclk = (mode == CLK_FAST);
1239         } else {
1240
1241                 /* old chips w/o PMU, force HT through cc,
1242                  * then use FCA to verify mac is running fast clock
1243                  */
1244
1245                 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1246
1247                 /* check fast clock is available (if core is not in reset) */
1248                 if (wlc_hw->forcefastclk && wlc_hw->clk)
1249                         WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) &
1250                                   SISF_FCLKA));
1251
1252                 /*
1253                  * keep the ucode wake bit on if forcefastclk is on since we
1254                  * do not want ucode to put us back to slow clock when it dozes
1255                  * for PM mode. Code below matches the wake override bit with
1256                  * current forcefastclk state. Only setting bit in wake_override
1257                  * instead of waking ucode immediately since old code had this
1258                  * behavior. Older code set wlc->forcefastclk but only had the
1259                  * wake happen if the wakup_ucode work (protected by an up
1260                  * check) was executed just below.
1261                  */
1262                 if (wlc_hw->forcefastclk)
1263                         mboolset(wlc_hw->wake_override,
1264                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1265                 else
1266                         mboolclr(wlc_hw->wake_override,
1267                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1268         }
1269 }
1270
1271 /* set or clear ucode host flag bits
1272  * it has an optimization for no-change write
1273  * it only writes through shared memory when the core has clock;
1274  * pre-CLK changes should use wlc_write_mhf to get around the optimization
1275  *
1276  *
1277  * bands values are: BRCM_BAND_AUTO <--- Current band only
1278  *                   BRCM_BAND_5G   <--- 5G band only
1279  *                   BRCM_BAND_2G   <--- 2G band only
1280  *                   BRCM_BAND_ALL  <--- All bands
1281  */
1282 void
1283 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1284              int bands)
1285 {
1286         u16 save;
1287         u16 addr[MHFMAX] = {
1288                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1289                 M_HOST_FLAGS5
1290         };
1291         struct brcms_hw_band *band;
1292
1293         if ((val & ~mask) || idx >= MHFMAX)
1294                 return; /* error condition */
1295
1296         switch (bands) {
1297                 /* Current band only or all bands,
1298                  * then set the band to current band
1299                  */
1300         case BRCM_BAND_AUTO:
1301         case BRCM_BAND_ALL:
1302                 band = wlc_hw->band;
1303                 break;
1304         case BRCM_BAND_5G:
1305                 band = wlc_hw->bandstate[BAND_5G_INDEX];
1306                 break;
1307         case BRCM_BAND_2G:
1308                 band = wlc_hw->bandstate[BAND_2G_INDEX];
1309                 break;
1310         default:
1311                 band = NULL;    /* error condition */
1312         }
1313
1314         if (band) {
1315                 save = band->mhfs[idx];
1316                 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1317
1318                 /* optimization: only write through if changed, and
1319                  * changed band is the current band
1320                  */
1321                 if (wlc_hw->clk && (band->mhfs[idx] != save)
1322                     && (band == wlc_hw->band))
1323                         brcms_b_write_shm(wlc_hw, addr[idx],
1324                                            (u16) band->mhfs[idx]);
1325         }
1326
1327         if (bands == BRCM_BAND_ALL) {
1328                 wlc_hw->bandstate[0]->mhfs[idx] =
1329                     (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1330                 wlc_hw->bandstate[1]->mhfs[idx] =
1331                     (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1332         }
1333 }
1334
1335 /* set the maccontrol register to desired reset state and
1336  * initialize the sw cache of the register
1337  */
1338 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1339 {
1340         /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1341         wlc_hw->maccontrol = 0;
1342         wlc_hw->suspended_fifos = 0;
1343         wlc_hw->wake_override = 0;
1344         wlc_hw->mute_override = 0;
1345         brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1346 }
1347
1348 /*
1349  * write the software state of maccontrol and
1350  * overrides to the maccontrol register
1351  */
1352 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1353 {
1354         u32 maccontrol = wlc_hw->maccontrol;
1355
1356         /* OR in the wake bit if overridden */
1357         if (wlc_hw->wake_override)
1358                 maccontrol |= MCTL_WAKE;
1359
1360         /* set AP and INFRA bits for mute if needed */
1361         if (wlc_hw->mute_override) {
1362                 maccontrol &= ~(MCTL_AP);
1363                 maccontrol |= MCTL_INFRA;
1364         }
1365
1366         W_REG(&wlc_hw->regs->maccontrol, maccontrol);
1367 }
1368
1369 /* set or clear maccontrol bits */
1370 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1371 {
1372         u32 maccontrol;
1373         u32 new_maccontrol;
1374
1375         if (val & ~mask)
1376                 return; /* error condition */
1377         maccontrol = wlc_hw->maccontrol;
1378         new_maccontrol = (maccontrol & ~mask) | val;
1379
1380         /* if the new maccontrol value is the same as the old, nothing to do */
1381         if (new_maccontrol == maccontrol)
1382                 return;
1383
1384         /* something changed, cache the new value */
1385         wlc_hw->maccontrol = new_maccontrol;
1386
1387         /* write the new values with overrides applied */
1388         brcms_c_mctrl_write(wlc_hw);
1389 }
1390
1391 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1392                                  u32 override_bit)
1393 {
1394         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1395                 mboolset(wlc_hw->wake_override, override_bit);
1396                 return;
1397         }
1398
1399         mboolset(wlc_hw->wake_override, override_bit);
1400
1401         brcms_c_mctrl_write(wlc_hw);
1402         brcms_b_wait_for_wake(wlc_hw);
1403 }
1404
1405 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1406                                    u32 override_bit)
1407 {
1408         mboolclr(wlc_hw->wake_override, override_bit);
1409
1410         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1411                 return;
1412
1413         brcms_c_mctrl_write(wlc_hw);
1414 }
1415
1416 /* When driver needs ucode to stop beaconing, it has to make sure that
1417  * MCTL_AP is clear and MCTL_INFRA is set
1418  * Mode           MCTL_AP        MCTL_INFRA
1419  * AP                1              1
1420  * STA               0              1 <--- This will ensure no beacons
1421  * IBSS              0              0
1422  */
1423 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1424 {
1425         wlc_hw->mute_override = 1;
1426
1427         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1428          * override, then there is no change to write
1429          */
1430         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1431                 return;
1432
1433         brcms_c_mctrl_write(wlc_hw);
1434 }
1435
1436 /* Clear the override on AP and INFRA bits */
1437 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1438 {
1439         if (wlc_hw->mute_override == 0)
1440                 return;
1441
1442         wlc_hw->mute_override = 0;
1443
1444         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1445          * override, then there is no change to write
1446          */
1447         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1448                 return;
1449
1450         brcms_c_mctrl_write(wlc_hw);
1451 }
1452
1453 /*
1454  * Write a MAC address to the given match reg offset in the RXE match engine.
1455  */
1456 static void
1457 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1458                        const u8 *addr)
1459 {
1460         struct d11regs __iomem *regs;
1461         u16 mac_l;
1462         u16 mac_m;
1463         u16 mac_h;
1464
1465         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1466                  wlc_hw->unit);
1467
1468         regs = wlc_hw->regs;
1469         mac_l = addr[0] | (addr[1] << 8);
1470         mac_m = addr[2] | (addr[3] << 8);
1471         mac_h = addr[4] | (addr[5] << 8);
1472
1473         /* enter the MAC addr into the RXE match registers */
1474         W_REG(&regs->rcm_ctl, RCM_INC_DATA | match_reg_offset);
1475         W_REG(&regs->rcm_mat_data, mac_l);
1476         W_REG(&regs->rcm_mat_data, mac_m);
1477         W_REG(&regs->rcm_mat_data, mac_h);
1478
1479 }
1480
1481 void
1482 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1483                             void *buf)
1484 {
1485         struct d11regs __iomem *regs;
1486         u32 word;
1487         __le32 word_le;
1488         __be32 word_be;
1489         bool be_bit;
1490         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1491
1492         regs = wlc_hw->regs;
1493         W_REG(&regs->tplatewrptr, offset);
1494
1495         /* if MCTL_BIGEND bit set in mac control register,
1496          * the chip swaps data in fifo, as well as data in
1497          * template ram
1498          */
1499         be_bit = (R_REG(&regs->maccontrol) & MCTL_BIGEND) != 0;
1500
1501         while (len > 0) {
1502                 memcpy(&word, buf, sizeof(u32));
1503
1504                 if (be_bit) {
1505                         word_be = cpu_to_be32(word);
1506                         word = *(u32 *)&word_be;
1507                 } else {
1508                         word_le = cpu_to_le32(word);
1509                         word = *(u32 *)&word_le;
1510                 }
1511
1512                 W_REG(&regs->tplatewrdata, word);
1513
1514                 buf = (u8 *) buf + sizeof(u32);
1515                 len -= sizeof(u32);
1516         }
1517 }
1518
1519 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1520 {
1521         wlc_hw->band->CWmin = newmin;
1522
1523         W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1524         (void)R_REG(&wlc_hw->regs->objaddr);
1525         W_REG(&wlc_hw->regs->objdata, newmin);
1526 }
1527
1528 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1529 {
1530         wlc_hw->band->CWmax = newmax;
1531
1532         W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1533         (void)R_REG(&wlc_hw->regs->objaddr);
1534         W_REG(&wlc_hw->regs->objdata, newmax);
1535 }
1536
1537 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1538 {
1539         bool fastclk;
1540
1541         /* request FAST clock if not on */
1542         fastclk = wlc_hw->forcefastclk;
1543         if (!fastclk)
1544                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1545
1546         wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1547
1548         brcms_b_phy_reset(wlc_hw);
1549         wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1550
1551         /* restore the clk */
1552         if (!fastclk)
1553                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1554 }
1555
1556 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1557 {
1558         u16 v;
1559         struct brcms_c_info *wlc = wlc_hw->wlc;
1560         /* update SYNTHPU_DLY */
1561
1562         if (BRCMS_ISLCNPHY(wlc->band))
1563                 v = SYNTHPU_DLY_LPPHY_US;
1564         else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1565                 v = SYNTHPU_DLY_NPHY_US;
1566         else
1567                 v = SYNTHPU_DLY_BPHY_US;
1568
1569         brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1570 }
1571
1572 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1573 {
1574         u16 phyctl;
1575         u16 phytxant = wlc_hw->bmac_phytxant;
1576         u16 mask = PHY_TXC_ANT_MASK;
1577
1578         /* set the Probe Response frame phy control word */
1579         phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1580         phyctl = (phyctl & ~mask) | phytxant;
1581         brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1582
1583         /* set the Response (ACK/CTS) frame phy control word */
1584         phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1585         phyctl = (phyctl & ~mask) | phytxant;
1586         brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1587 }
1588
1589 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1590                                          u8 rate)
1591 {
1592         uint i;
1593         u8 plcp_rate = 0;
1594         struct plcp_signal_rate_lookup {
1595                 u8 rate;
1596                 u8 signal_rate;
1597         };
1598         /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1599         const struct plcp_signal_rate_lookup rate_lookup[] = {
1600                 {BRCM_RATE_6M, 0xB},
1601                 {BRCM_RATE_9M, 0xF},
1602                 {BRCM_RATE_12M, 0xA},
1603                 {BRCM_RATE_18M, 0xE},
1604                 {BRCM_RATE_24M, 0x9},
1605                 {BRCM_RATE_36M, 0xD},
1606                 {BRCM_RATE_48M, 0x8},
1607                 {BRCM_RATE_54M, 0xC}
1608         };
1609
1610         for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1611                 if (rate == rate_lookup[i].rate) {
1612                         plcp_rate = rate_lookup[i].signal_rate;
1613                         break;
1614                 }
1615         }
1616
1617         /* Find the SHM pointer to the rate table entry by looking in the
1618          * Direct-map Table
1619          */
1620         return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1621 }
1622
1623 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1624 {
1625         u8 rate;
1626         u8 rates[8] = {
1627                 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1628                 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1629         };
1630         u16 entry_ptr;
1631         u16 pctl1;
1632         uint i;
1633
1634         if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1635                 return;
1636
1637         /* walk the phy rate table and update the entries */
1638         for (i = 0; i < ARRAY_SIZE(rates); i++) {
1639                 rate = rates[i];
1640
1641                 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1642
1643                 /* read the SHM Rate Table entry OFDM PCTL1 values */
1644                 pctl1 =
1645                     brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1646
1647                 /* modify the value */
1648                 pctl1 &= ~PHY_TXC1_MODE_MASK;
1649                 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1650
1651                 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1652                 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1653                                    pctl1);
1654         }
1655 }
1656
1657 /* band-specific init */
1658 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1659 {
1660         struct brcms_hardware *wlc_hw = wlc->hw;
1661
1662         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1663                 wlc_hw->band->bandunit);
1664
1665         brcms_c_ucode_bsinit(wlc_hw);
1666
1667         wlc_phy_init(wlc_hw->band->pi, chanspec);
1668
1669         brcms_c_ucode_txant_set(wlc_hw);
1670
1671         /*
1672          * cwmin is band-specific, update hardware
1673          * with value for current band
1674          */
1675         brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1676         brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1677
1678         brcms_b_update_slot_timing(wlc_hw,
1679                                    wlc_hw->band->bandtype == BRCM_BAND_5G ?
1680                                    true : wlc_hw->shortslot);
1681
1682         /* write phytype and phyvers */
1683         brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1684         brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1685
1686         /*
1687          * initialize the txphyctl1 rate table since
1688          * shmem is shared between bands
1689          */
1690         brcms_upd_ofdm_pctl1_table(wlc_hw);
1691
1692         brcms_b_upd_synthpu(wlc_hw);
1693 }
1694
1695 /* Perform a soft reset of the PHY PLL */
1696 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1697 {
1698         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1699
1700         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1701                    offsetof(struct chipcregs, chipcontrol_addr), ~0, 0);
1702         udelay(1);
1703         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1704                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1705         udelay(1);
1706         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1707                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 4);
1708         udelay(1);
1709         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1710                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1711         udelay(1);
1712 }
1713
1714 /* light way to turn on phy clock without reset for NPHY only
1715  *  refer to brcms_b_core_phy_clk for full version
1716  */
1717 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1718 {
1719         /* support(necessary for NPHY and HYPHY) only */
1720         if (!BRCMS_ISNPHY(wlc_hw->band))
1721                 return;
1722
1723         if (ON == clk)
1724                 ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC);
1725         else
1726                 ai_core_cflags(wlc_hw->sih, SICF_FGC, 0);
1727
1728 }
1729
1730 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1731 {
1732         if (ON == clk)
1733                 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE);
1734         else
1735                 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0);
1736 }
1737
1738 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1739 {
1740         struct brcms_phy_pub *pih = wlc_hw->band->pi;
1741         u32 phy_bw_clkbits;
1742         bool phy_in_reset = false;
1743
1744         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1745
1746         if (pih == NULL)
1747                 return;
1748
1749         phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1750
1751         /* Specific reset sequence required for NPHY rev 3 and 4 */
1752         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1753             NREV_LE(wlc_hw->band->phyrev, 4)) {
1754                 /* Set the PHY bandwidth */
1755                 ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits);
1756
1757                 udelay(1);
1758
1759                 /* Perform a soft reset of the PHY PLL */
1760                 brcms_b_core_phypll_reset(wlc_hw);
1761
1762                 /* reset the PHY */
1763                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE),
1764                                (SICF_PRST | SICF_PCLKE));
1765                 phy_in_reset = true;
1766         } else {
1767                 ai_core_cflags(wlc_hw->sih,
1768                                (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1769                                (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1770         }
1771
1772         udelay(2);
1773         brcms_b_core_phy_clk(wlc_hw, ON);
1774
1775         if (pih)
1776                 wlc_phy_anacore(pih, ON);
1777 }
1778
1779 /* switch to and initialize new band */
1780 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1781                             u16 chanspec) {
1782         struct brcms_c_info *wlc = wlc_hw->wlc;
1783         u32 macintmask;
1784
1785         /* Enable the d11 core before accessing it */
1786         if (!ai_iscoreup(wlc_hw->sih)) {
1787                 ai_core_reset(wlc_hw->sih, 0, 0);
1788                 brcms_c_mctrl_reset(wlc_hw);
1789         }
1790
1791         macintmask = brcms_c_setband_inact(wlc, bandunit);
1792
1793         if (!wlc_hw->up)
1794                 return;
1795
1796         brcms_b_core_phy_clk(wlc_hw, ON);
1797
1798         /* band-specific initializations */
1799         brcms_b_bsinit(wlc, chanspec);
1800
1801         /*
1802          * If there are any pending software interrupt bits,
1803          * then replace these with a harmless nonzero value
1804          * so brcms_c_dpc() will re-enable interrupts when done.
1805          */
1806         if (wlc->macintstatus)
1807                 wlc->macintstatus = MI_DMAINT;
1808
1809         /* restore macintmask */
1810         brcms_intrsrestore(wlc->wl, macintmask);
1811
1812         /* ucode should still be suspended.. */
1813         WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
1814 }
1815
1816 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1817 {
1818
1819         /* reject unsupported corerev */
1820         if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1821                 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1822                           wlc_hw->corerev);
1823                 return false;
1824         }
1825
1826         return true;
1827 }
1828
1829 /* Validate some board info parameters */
1830 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1831 {
1832         uint boardrev = wlc_hw->boardrev;
1833
1834         /* 4 bits each for board type, major, minor, and tiny version */
1835         uint brt = (boardrev & 0xf000) >> 12;
1836         uint b0 = (boardrev & 0xf00) >> 8;
1837         uint b1 = (boardrev & 0xf0) >> 4;
1838         uint b2 = boardrev & 0xf;
1839
1840         /* voards from other vendors are always considered valid */
1841         if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM)
1842                 return true;
1843
1844         /* do some boardrev sanity checks when boardvendor is Broadcom */
1845         if (boardrev == 0)
1846                 return false;
1847
1848         if (boardrev <= 0xff)
1849                 return true;
1850
1851         if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1852                 || (b2 > 9))
1853                 return false;
1854
1855         return true;
1856 }
1857
1858 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
1859 {
1860         enum brcms_srom_id var_id = BRCMS_SROM_MACADDR;
1861         char *macaddr;
1862
1863         /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1864         macaddr = getvar(wlc_hw->sih, var_id);
1865         if (macaddr != NULL)
1866                 return macaddr;
1867
1868         if (wlc_hw->_nbands > 1)
1869                 var_id = BRCMS_SROM_ET1MACADDR;
1870         else
1871                 var_id = BRCMS_SROM_IL0MACADDR;
1872
1873         macaddr = getvar(wlc_hw->sih, var_id);
1874         if (macaddr == NULL)
1875                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
1876                           "getvar(%d) not found\n", wlc_hw->unit, var_id);
1877
1878         return macaddr;
1879 }
1880
1881 /* power both the pll and external oscillator on/off */
1882 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
1883 {
1884         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
1885
1886         /*
1887          * dont power down if plldown is false or
1888          * we must poll hw radio disable
1889          */
1890         if (!want && wlc_hw->pllreq)
1891                 return;
1892
1893         if (wlc_hw->sih)
1894                 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
1895
1896         wlc_hw->sbclk = want;
1897         if (!wlc_hw->sbclk) {
1898                 wlc_hw->clk = false;
1899                 if (wlc_hw->band && wlc_hw->band->pi)
1900                         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1901         }
1902 }
1903
1904 /*
1905  * Return true if radio is disabled, otherwise false.
1906  * hw radio disable signal is an external pin, users activate it asynchronously
1907  * this function could be called when driver is down and w/o clock
1908  * it operates on different registers depending on corerev and boardflag.
1909  */
1910 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
1911 {
1912         bool v, clk, xtal;
1913         u32 resetbits = 0, flags = 0;
1914
1915         xtal = wlc_hw->sbclk;
1916         if (!xtal)
1917                 brcms_b_xtal(wlc_hw, ON);
1918
1919         /* may need to take core out of reset first */
1920         clk = wlc_hw->clk;
1921         if (!clk) {
1922                 /*
1923                  * mac no longer enables phyclk automatically when driver
1924                  * accesses phyreg throughput mac. This can be skipped since
1925                  * only mac reg is accessed below
1926                  */
1927                 flags |= SICF_PCLKE;
1928
1929                 /*
1930                  * AI chip doesn't restore bar0win2 on
1931                  * hibernation/resume, need sw fixup
1932                  */
1933                 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
1934                     (wlc_hw->sih->chip == BCM43225_CHIP_ID))
1935                         wlc_hw->regs = (struct d11regs __iomem *)
1936                                         ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
1937                 ai_core_reset(wlc_hw->sih, flags, resetbits);
1938                 brcms_c_mctrl_reset(wlc_hw);
1939         }
1940
1941         v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0);
1942
1943         /* put core back into reset */
1944         if (!clk)
1945                 ai_core_disable(wlc_hw->sih, 0);
1946
1947         if (!xtal)
1948                 brcms_b_xtal(wlc_hw, OFF);
1949
1950         return v;
1951 }
1952
1953 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
1954 {
1955         struct dma_pub *di = wlc_hw->di[fifo];
1956         return dma_rxreset(di);
1957 }
1958
1959 /* d11 core reset
1960  *   ensure fask clock during reset
1961  *   reset dma
1962  *   reset d11(out of reset)
1963  *   reset phy(out of reset)
1964  *   clear software macintstatus for fresh new start
1965  * one testing hack wlc_hw->noreset will bypass the d11/phy reset
1966  */
1967 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
1968 {
1969         struct d11regs __iomem *regs;
1970         uint i;
1971         bool fastclk;
1972         u32 resetbits = 0;
1973
1974         if (flags == BRCMS_USE_COREFLAGS)
1975                 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
1976
1977         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1978
1979         regs = wlc_hw->regs;
1980
1981         /* request FAST clock if not on  */
1982         fastclk = wlc_hw->forcefastclk;
1983         if (!fastclk)
1984                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1985
1986         /* reset the dma engines except first time thru */
1987         if (ai_iscoreup(wlc_hw->sih)) {
1988                 for (i = 0; i < NFIFO; i++)
1989                         if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
1990                                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
1991                                           "dma_txreset[%d]: cannot stop dma\n",
1992                                            wlc_hw->unit, __func__, i);
1993
1994                 if ((wlc_hw->di[RX_FIFO])
1995                     && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
1996                         wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
1997                                   "[%d]: cannot stop dma\n",
1998                                   wlc_hw->unit, __func__, RX_FIFO);
1999         }
2000         /* if noreset, just stop the psm and return */
2001         if (wlc_hw->noreset) {
2002                 wlc_hw->wlc->macintstatus = 0;  /* skip wl_dpc after down */
2003                 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2004                 return;
2005         }
2006
2007         /*
2008          * mac no longer enables phyclk automatically when driver accesses
2009          * phyreg throughput mac, AND phy_reset is skipped at early stage when
2010          * band->pi is invalid. need to enable PHY CLK
2011          */
2012         flags |= SICF_PCLKE;
2013
2014         /*
2015          * reset the core
2016          * In chips with PMU, the fastclk request goes through d11 core
2017          * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2018          *
2019          * This adds some delay and we can optimize it by also requesting
2020          * fastclk through chipcommon during this period if necessary. But
2021          * that has to work coordinate with other driver like mips/arm since
2022          * they may touch chipcommon as well.
2023          */
2024         wlc_hw->clk = false;
2025         ai_core_reset(wlc_hw->sih, flags, resetbits);
2026         wlc_hw->clk = true;
2027         if (wlc_hw->band && wlc_hw->band->pi)
2028                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2029
2030         brcms_c_mctrl_reset(wlc_hw);
2031
2032         if (wlc_hw->sih->cccaps & CC_CAP_PMU)
2033                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2034
2035         brcms_b_phy_reset(wlc_hw);
2036
2037         /* turn on PHY_PLL */
2038         brcms_b_core_phypll_ctl(wlc_hw, true);
2039
2040         /* clear sw intstatus */
2041         wlc_hw->wlc->macintstatus = 0;
2042
2043         /* restore the clk setting */
2044         if (!fastclk)
2045                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2046 }
2047
2048 /* txfifo sizes needs to be modified(increased) since the newer cores
2049  * have more memory.
2050  */
2051 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2052 {
2053         struct d11regs __iomem *regs = wlc_hw->regs;
2054         u16 fifo_nu;
2055         u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2056         u16 txfifo_def, txfifo_def1;
2057         u16 txfifo_cmd;
2058
2059         /* tx fifos start at TXFIFO_START_BLK from the Base address */
2060         txfifo_startblk = TXFIFO_START_BLK;
2061
2062         /* sequence of operations:  reset fifo, set fifo size, reset fifo */
2063         for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2064
2065                 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2066                 txfifo_def = (txfifo_startblk & 0xff) |
2067                     (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2068                 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2069                     ((((txfifo_endblk -
2070                         1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2071                 txfifo_cmd =
2072                     TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2073
2074                 W_REG(&regs->xmtfifocmd, txfifo_cmd);
2075                 W_REG(&regs->xmtfifodef, txfifo_def);
2076                 W_REG(&regs->xmtfifodef1, txfifo_def1);
2077
2078                 W_REG(&regs->xmtfifocmd, txfifo_cmd);
2079
2080                 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2081         }
2082         /*
2083          * need to propagate to shm location to be in sync since ucode/hw won't
2084          * do this
2085          */
2086         brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2087                            wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2088         brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2089                            wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2090         brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2091                            ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2092                             xmtfifo_sz[TX_AC_BK_FIFO]));
2093         brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2094                            ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2095                             xmtfifo_sz[TX_BCMC_FIFO]));
2096 }
2097
2098 /* This function is used for changing the tsf frac register
2099  * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2100  * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2101  * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2102  * HTPHY Formula is 2^26/freq(MHz) e.g.
2103  * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2104  *  - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2105  * For spuron: 123MHz -> 2^26/123    = 545600.5
2106  *  - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2107  * For spur off: 120MHz -> 2^26/120    = 559240.5
2108  *  - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2109  */
2110
2111 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2112 {
2113         struct d11regs __iomem *regs = wlc_hw->regs;
2114
2115         if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2116             (wlc_hw->sih->chip == BCM43225_CHIP_ID)) {
2117                 if (spurmode == WL_SPURAVOID_ON2) {     /* 126Mhz */
2118                         W_REG(&regs->tsf_clk_frac_l, 0x2082);
2119                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2120                 } else if (spurmode == WL_SPURAVOID_ON1) {      /* 123Mhz */
2121                         W_REG(&regs->tsf_clk_frac_l, 0x5341);
2122                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2123                 } else {        /* 120Mhz */
2124                         W_REG(&regs->tsf_clk_frac_l, 0x8889);
2125                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2126                 }
2127         } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2128                 if (spurmode == WL_SPURAVOID_ON1) {     /* 82Mhz */
2129                         W_REG(&regs->tsf_clk_frac_l, 0x7CE0);
2130                         W_REG(&regs->tsf_clk_frac_h, 0xC);
2131                 } else {        /* 80Mhz */
2132                         W_REG(&regs->tsf_clk_frac_l, 0xCCCD);
2133                         W_REG(&regs->tsf_clk_frac_h, 0xC);
2134                 }
2135         }
2136 }
2137
2138 /* Initialize GPIOs that are controlled by D11 core */
2139 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2140 {
2141         struct brcms_hardware *wlc_hw = wlc->hw;
2142         struct d11regs __iomem *regs;
2143         u32 gc, gm;
2144
2145         regs = wlc_hw->regs;
2146
2147         /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2148         brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2149
2150         /*
2151          * Common GPIO setup:
2152          *      G0 = LED 0 = WLAN Activity
2153          *      G1 = LED 1 = WLAN 2.4 GHz Radio State
2154          *      G2 = LED 2 = WLAN 5 GHz Radio State
2155          *      G4 = radio disable input (HI enabled, LO disabled)
2156          */
2157
2158         gc = gm = 0;
2159
2160         /* Allocate GPIOs for mimo antenna diversity feature */
2161         if (wlc_hw->antsel_type == ANTSEL_2x3) {
2162                 /* Enable antenna diversity, use 2x3 mode */
2163                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2164                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2165                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2166                              MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2167
2168                 /* init superswitch control */
2169                 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2170
2171         } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2172                 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2173                 /*
2174                  * The board itself is powered by these GPIOs
2175                  * (when not sending pattern) so set them high
2176                  */
2177                 OR_REG(&regs->psm_gpio_oe,
2178                        (BOARD_GPIO_12 | BOARD_GPIO_13));
2179                 OR_REG(&regs->psm_gpio_out,
2180                        (BOARD_GPIO_12 | BOARD_GPIO_13));
2181
2182                 /* Enable antenna diversity, use 2x4 mode */
2183                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2184                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2185                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2186                              BRCM_BAND_ALL);
2187
2188                 /* Configure the desired clock to be 4Mhz */
2189                 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2190                                    ANTSEL_CLKDIV_4MHZ);
2191         }
2192
2193         /*
2194          * gpio 9 controls the PA. ucode is responsible
2195          * for wiggling out and oe
2196          */
2197         if (wlc_hw->boardflags & BFL_PACTRL)
2198                 gm |= gc |= BOARD_GPIO_PACTRL;
2199
2200         /* apply to gpiocontrol register */
2201         ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2202 }
2203
2204 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2205                               const __le32 ucode[], const size_t nbytes)
2206 {
2207         struct d11regs __iomem *regs = wlc_hw->regs;
2208         uint i;
2209         uint count;
2210
2211         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2212
2213         count = (nbytes / sizeof(u32));
2214
2215         W_REG(&regs->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL));
2216         (void)R_REG(&regs->objaddr);
2217         for (i = 0; i < count; i++)
2218                 W_REG(&regs->objdata, le32_to_cpu(ucode[i]));
2219
2220 }
2221
2222 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2223 {
2224         struct brcms_c_info *wlc;
2225         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2226
2227         wlc = wlc_hw->wlc;
2228
2229         if (wlc_hw->ucode_loaded)
2230                 return;
2231
2232         if (D11REV_IS(wlc_hw->corerev, 23)) {
2233                 if (BRCMS_ISNPHY(wlc_hw->band)) {
2234                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2235                                           ucode->bcm43xx_16_mimosz);
2236                         wlc_hw->ucode_loaded = true;
2237                 } else
2238                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2239                                   "corerev %d\n",
2240                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2241         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2242                 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2243                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2244                                           ucode->bcm43xx_24_lcnsz);
2245                         wlc_hw->ucode_loaded = true;
2246                 } else {
2247                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2248                                   "corerev %d\n",
2249                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2250                 }
2251         }
2252 }
2253
2254 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2255 {
2256         /* update sw state */
2257         wlc_hw->bmac_phytxant = phytxant;
2258
2259         /* push to ucode if up */
2260         if (!wlc_hw->up)
2261                 return;
2262         brcms_c_ucode_txant_set(wlc_hw);
2263
2264 }
2265
2266 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2267 {
2268         return (u16) wlc_hw->wlc->stf->txant;
2269 }
2270
2271 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2272 {
2273         wlc_hw->antsel_type = antsel_type;
2274
2275         /* Update the antsel type for phy module to use */
2276         wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2277 }
2278
2279 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2280 {
2281         bool fatal = false;
2282         uint unit;
2283         uint intstatus, idx;
2284         struct d11regs __iomem *regs = wlc_hw->regs;
2285         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2286
2287         unit = wlc_hw->unit;
2288
2289         for (idx = 0; idx < NFIFO; idx++) {
2290                 /* read intstatus register and ignore any non-error bits */
2291                 intstatus =
2292                     R_REG(&regs->intctrlregs[idx].intstatus) & I_ERRORS;
2293                 if (!intstatus)
2294                         continue;
2295
2296                 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2297                         unit, idx, intstatus);
2298
2299                 if (intstatus & I_RO) {
2300                         wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2301                                   "overflow\n", unit, idx);
2302                         fatal = true;
2303                 }
2304
2305                 if (intstatus & I_PC) {
2306                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2307                                  unit, idx);
2308                         fatal = true;
2309                 }
2310
2311                 if (intstatus & I_PD) {
2312                         wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2313                                   idx);
2314                         fatal = true;
2315                 }
2316
2317                 if (intstatus & I_DE) {
2318                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2319                                   "error\n", unit, idx);
2320                         fatal = true;
2321                 }
2322
2323                 if (intstatus & I_RU)
2324                         wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2325                                   "underflow\n", idx, unit);
2326
2327                 if (intstatus & I_XU) {
2328                         wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2329                                   "underflow\n", idx, unit);
2330                         fatal = true;
2331                 }
2332
2333                 if (fatal) {
2334                         brcms_fatal_error(wlc_hw->wlc->wl); /* big hammer */
2335                         break;
2336                 } else
2337                         W_REG(&regs->intctrlregs[idx].intstatus,
2338                               intstatus);
2339         }
2340 }
2341
2342 void brcms_c_intrson(struct brcms_c_info *wlc)
2343 {
2344         struct brcms_hardware *wlc_hw = wlc->hw;
2345         wlc->macintmask = wlc->defmacintmask;
2346         W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2347 }
2348
2349 /*
2350  * callback for siutils.c, which has only wlc handler, no wl they both check
2351  * up, not only because there is no need to off/restore d11 interrupt but also
2352  * because per-port code may require sync with valid interrupt.
2353  */
2354 static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc)
2355 {
2356         if (!wlc->hw->up)
2357                 return 0;
2358
2359         return brcms_intrsoff(wlc->wl);
2360 }
2361
2362 static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2363 {
2364         if (!wlc->hw->up)
2365                 return;
2366
2367         brcms_intrsrestore(wlc->wl, macintmask);
2368 }
2369
2370 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2371 {
2372         struct brcms_hardware *wlc_hw = wlc->hw;
2373         u32 macintmask;
2374
2375         if (!wlc_hw->clk)
2376                 return 0;
2377
2378         macintmask = wlc->macintmask;   /* isr can still happen */
2379
2380         W_REG(&wlc_hw->regs->macintmask, 0);
2381         (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */
2382         udelay(1);              /* ensure int line is no longer driven */
2383         wlc->macintmask = 0;
2384
2385         /* return previous macintmask; resolve race between us and our isr */
2386         return wlc->macintstatus ? 0 : macintmask;
2387 }
2388
2389 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2390 {
2391         struct brcms_hardware *wlc_hw = wlc->hw;
2392         if (!wlc_hw->clk)
2393                 return;
2394
2395         wlc->macintmask = macintmask;
2396         W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2397 }
2398
2399 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2400                                     uint tx_fifo)
2401 {
2402         u8 fifo = 1 << tx_fifo;
2403
2404         /* Two clients of this code, 11h Quiet period and scanning. */
2405
2406         /* only suspend if not already suspended */
2407         if ((wlc_hw->suspended_fifos & fifo) == fifo)
2408                 return;
2409
2410         /* force the core awake only if not already */
2411         if (wlc_hw->suspended_fifos == 0)
2412                 brcms_c_ucode_wake_override_set(wlc_hw,
2413                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2414
2415         wlc_hw->suspended_fifos |= fifo;
2416
2417         if (wlc_hw->di[tx_fifo]) {
2418                 /*
2419                  * Suspending AMPDU transmissions in the middle can cause
2420                  * underflow which may result in mismatch between ucode and
2421                  * driver so suspend the mac before suspending the FIFO
2422                  */
2423                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2424                         brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2425
2426                 dma_txsuspend(wlc_hw->di[tx_fifo]);
2427
2428                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2429                         brcms_c_enable_mac(wlc_hw->wlc);
2430         }
2431 }
2432
2433 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2434                                    uint tx_fifo)
2435 {
2436         /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2437          * but need to be done here for PIO otherwise the watchdog will catch
2438          * the inconsistency and fire
2439          */
2440         /* Two clients of this code, 11h Quiet period and scanning. */
2441         if (wlc_hw->di[tx_fifo])
2442                 dma_txresume(wlc_hw->di[tx_fifo]);
2443
2444         /* allow core to sleep again */
2445         if (wlc_hw->suspended_fifos == 0)
2446                 return;
2447         else {
2448                 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2449                 if (wlc_hw->suspended_fifos == 0)
2450                         brcms_c_ucode_wake_override_clear(wlc_hw,
2451                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2452         }
2453 }
2454
2455 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, u32 flags)
2456 {
2457         static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2458
2459         if (on) {
2460                 /* suspend tx fifos */
2461                 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2462                 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2463                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2464                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2465
2466                 /* zero the address match register so we do not send ACKs */
2467                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2468                                        null_ether_addr);
2469         } else {
2470                 /* resume tx fifos */
2471                 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2472                 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2473                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2474                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2475
2476                 /* Restore address */
2477                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2478                                        wlc_hw->etheraddr);
2479         }
2480
2481         wlc_phy_mute_upd(wlc_hw->band->pi, on, flags);
2482
2483         if (on)
2484                 brcms_c_ucode_mute_override_set(wlc_hw);
2485         else
2486                 brcms_c_ucode_mute_override_clear(wlc_hw);
2487 }
2488
2489 /*
2490  * Read and clear macintmask and macintstatus and intstatus registers.
2491  * This routine should be called with interrupts off
2492  * Return:
2493  *   -1 if brcms_deviceremoved(wlc) evaluates to true;
2494  *   0 if the interrupt is not for us, or we are in some special cases;
2495  *   device interrupt status bits otherwise.
2496  */
2497 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2498 {
2499         struct brcms_hardware *wlc_hw = wlc->hw;
2500         struct d11regs __iomem *regs = wlc_hw->regs;
2501         u32 macintstatus;
2502
2503         /* macintstatus includes a DMA interrupt summary bit */
2504         macintstatus = R_REG(&regs->macintstatus);
2505
2506         BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2507                  macintstatus);
2508
2509         /* detect cardbus removed, in power down(suspend) and in reset */
2510         if (brcms_deviceremoved(wlc))
2511                 return -1;
2512
2513         /* brcms_deviceremoved() succeeds even when the core is still resetting,
2514          * handle that case here.
2515          */
2516         if (macintstatus == 0xffffffff)
2517                 return 0;
2518
2519         /* defer unsolicited interrupts */
2520         macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2521
2522         /* if not for us */
2523         if (macintstatus == 0)
2524                 return 0;
2525
2526         /* interrupts are already turned off for CFE build
2527          * Caution: For CFE Turning off the interrupts again has some undesired
2528          * consequences
2529          */
2530         /* turn off the interrupts */
2531         W_REG(&regs->macintmask, 0);
2532         (void)R_REG(&regs->macintmask); /* sync readback */
2533         wlc->macintmask = 0;
2534
2535         /* clear device interrupts */
2536         W_REG(&regs->macintstatus, macintstatus);
2537
2538         /* MI_DMAINT is indication of non-zero intstatus */
2539         if (macintstatus & MI_DMAINT)
2540                 /*
2541                  * only fifo interrupt enabled is I_RI in
2542                  * RX_FIFO. If MI_DMAINT is set, assume it
2543                  * is set and clear the interrupt.
2544                  */
2545                 W_REG(&regs->intctrlregs[RX_FIFO].intstatus,
2546                       DEF_RXINTMASK);
2547
2548         return macintstatus;
2549 }
2550
2551 /* Update wlc->macintstatus and wlc->intstatus[]. */
2552 /* Return true if they are updated successfully. false otherwise */
2553 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2554 {
2555         u32 macintstatus;
2556
2557         /* read and clear macintstatus and intstatus registers */
2558         macintstatus = wlc_intstatus(wlc, false);
2559
2560         /* device is removed */
2561         if (macintstatus == 0xffffffff)
2562                 return false;
2563
2564         /* update interrupt status in software */
2565         wlc->macintstatus |= macintstatus;
2566
2567         return true;
2568 }
2569
2570 /*
2571  * First-level interrupt processing.
2572  * Return true if this was our interrupt, false otherwise.
2573  * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2574  * false otherwise.
2575  */
2576 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2577 {
2578         struct brcms_hardware *wlc_hw = wlc->hw;
2579         u32 macintstatus;
2580
2581         *wantdpc = false;
2582
2583         if (!wlc_hw->up || !wlc->macintmask)
2584                 return false;
2585
2586         /* read and clear macintstatus and intstatus registers */
2587         macintstatus = wlc_intstatus(wlc, true);
2588
2589         if (macintstatus == 0xffffffff)
2590                 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2591                           " path\n");
2592
2593         /* it is not for us */
2594         if (macintstatus == 0)
2595                 return false;
2596
2597         *wantdpc = true;
2598
2599         /* save interrupt status bits */
2600         wlc->macintstatus = macintstatus;
2601
2602         return true;
2603
2604 }
2605
2606 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2607 {
2608         struct brcms_hardware *wlc_hw = wlc->hw;
2609         struct d11regs __iomem *regs = wlc_hw->regs;
2610         u32 mc, mi;
2611         struct wiphy *wiphy = wlc->wiphy;
2612
2613         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2614                 wlc_hw->band->bandunit);
2615
2616         /*
2617          * Track overlapping suspend requests
2618          */
2619         wlc_hw->mac_suspend_depth++;
2620         if (wlc_hw->mac_suspend_depth > 1)
2621                 return;
2622
2623         /* force the core awake */
2624         brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2625
2626         mc = R_REG(&regs->maccontrol);
2627
2628         if (mc == 0xffffffff) {
2629                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2630                           __func__);
2631                 brcms_down(wlc->wl);
2632                 return;
2633         }
2634         WARN_ON(mc & MCTL_PSM_JMP_0);
2635         WARN_ON(!(mc & MCTL_PSM_RUN));
2636         WARN_ON(!(mc & MCTL_EN_MAC));
2637
2638         mi = R_REG(&regs->macintstatus);
2639         if (mi == 0xffffffff) {
2640                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2641                           __func__);
2642                 brcms_down(wlc->wl);
2643                 return;
2644         }
2645         WARN_ON(mi & MI_MACSSPNDD);
2646
2647         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2648
2649         SPINWAIT(!(R_REG(&regs->macintstatus) & MI_MACSSPNDD),
2650                  BRCMS_MAX_MAC_SUSPEND);
2651
2652         if (!(R_REG(&regs->macintstatus) & MI_MACSSPNDD)) {
2653                 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2654                           " and MI_MACSSPNDD is still not on.\n",
2655                           wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2656                 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2657                           "psm_brc 0x%04x\n", wlc_hw->unit,
2658                           R_REG(&regs->psmdebug),
2659                           R_REG(&regs->phydebug),
2660                           R_REG(&regs->psm_brc));
2661         }
2662
2663         mc = R_REG(&regs->maccontrol);
2664         if (mc == 0xffffffff) {
2665                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2666                           __func__);
2667                 brcms_down(wlc->wl);
2668                 return;
2669         }
2670         WARN_ON(mc & MCTL_PSM_JMP_0);
2671         WARN_ON(!(mc & MCTL_PSM_RUN));
2672         WARN_ON(mc & MCTL_EN_MAC);
2673 }
2674
2675 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2676 {
2677         struct brcms_hardware *wlc_hw = wlc->hw;
2678         struct d11regs __iomem *regs = wlc_hw->regs;
2679         u32 mc, mi;
2680
2681         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2682                 wlc->band->bandunit);
2683
2684         /*
2685          * Track overlapping suspend requests
2686          */
2687         wlc_hw->mac_suspend_depth--;
2688         if (wlc_hw->mac_suspend_depth > 0)
2689                 return;
2690
2691         mc = R_REG(&regs->maccontrol);
2692         WARN_ON(mc & MCTL_PSM_JMP_0);
2693         WARN_ON(mc & MCTL_EN_MAC);
2694         WARN_ON(!(mc & MCTL_PSM_RUN));
2695
2696         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2697         W_REG(&regs->macintstatus, MI_MACSSPNDD);
2698
2699         mc = R_REG(&regs->maccontrol);
2700         WARN_ON(mc & MCTL_PSM_JMP_0);
2701         WARN_ON(!(mc & MCTL_EN_MAC));
2702         WARN_ON(!(mc & MCTL_PSM_RUN));
2703
2704         mi = R_REG(&regs->macintstatus);
2705         WARN_ON(mi & MI_MACSSPNDD);
2706
2707         brcms_c_ucode_wake_override_clear(wlc_hw,
2708                                           BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2709 }
2710
2711 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2712 {
2713         wlc_hw->hw_stf_ss_opmode = stf_mode;
2714
2715         if (wlc_hw->clk)
2716                 brcms_upd_ofdm_pctl1_table(wlc_hw);
2717 }
2718
2719 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2720 {
2721         struct d11regs __iomem *regs;
2722         u32 w, val;
2723         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2724
2725         BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2726
2727         regs = wlc_hw->regs;
2728
2729         /* Validate dchip register access */
2730
2731         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2732         (void)R_REG(&regs->objaddr);
2733         w = R_REG(&regs->objdata);
2734
2735         /* Can we write and read back a 32bit register? */
2736         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2737         (void)R_REG(&regs->objaddr);
2738         W_REG(&regs->objdata, (u32) 0xaa5555aa);
2739
2740         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2741         (void)R_REG(&regs->objaddr);
2742         val = R_REG(&regs->objdata);
2743         if (val != (u32) 0xaa5555aa) {
2744                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2745                           "expected 0xaa5555aa\n", wlc_hw->unit, val);
2746                 return false;
2747         }
2748
2749         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2750         (void)R_REG(&regs->objaddr);
2751         W_REG(&regs->objdata, (u32) 0x55aaaa55);
2752
2753         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2754         (void)R_REG(&regs->objaddr);
2755         val = R_REG(&regs->objdata);
2756         if (val != (u32) 0x55aaaa55) {
2757                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2758                           "expected 0x55aaaa55\n", wlc_hw->unit, val);
2759                 return false;
2760         }
2761
2762         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2763         (void)R_REG(&regs->objaddr);
2764         W_REG(&regs->objdata, w);
2765
2766         /* clear CFPStart */
2767         W_REG(&regs->tsf_cfpstart, 0);
2768
2769         w = R_REG(&regs->maccontrol);
2770         if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2771             (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2772                 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2773                           "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2774                           (MCTL_IHR_EN | MCTL_WAKE),
2775                           (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2776                 return false;
2777         }
2778
2779         return true;
2780 }
2781
2782 #define PHYPLL_WAIT_US  100000
2783
2784 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2785 {
2786         struct d11regs __iomem *regs;
2787         u32 tmp;
2788
2789         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2790
2791         tmp = 0;
2792         regs = wlc_hw->regs;
2793
2794         if (on) {
2795                 if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
2796                         OR_REG(&regs->clk_ctl_st,
2797                                (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL |
2798                                 CCS_ERSRC_REQ_PHYPLL));
2799                         SPINWAIT((R_REG(&regs->clk_ctl_st) &
2800                                   (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT),
2801                                  PHYPLL_WAIT_US);
2802
2803                         tmp = R_REG(&regs->clk_ctl_st);
2804                         if ((tmp & (CCS_ERSRC_AVAIL_HT)) !=
2805                             (CCS_ERSRC_AVAIL_HT))
2806                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2807                                           " PLL failed\n", __func__);
2808                 } else {
2809                         OR_REG(&regs->clk_ctl_st,
2810                                (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL));
2811                         SPINWAIT((R_REG(&regs->clk_ctl_st) &
2812                                   (CCS_ERSRC_AVAIL_D11PLL |
2813                                    CCS_ERSRC_AVAIL_PHYPLL)) !=
2814                                  (CCS_ERSRC_AVAIL_D11PLL |
2815                                   CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2816
2817                         tmp = R_REG(&regs->clk_ctl_st);
2818                         if ((tmp &
2819                              (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2820                             !=
2821                             (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2822                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2823                                           "PHY PLL failed\n", __func__);
2824                 }
2825         } else {
2826                 /*
2827                  * Since the PLL may be shared, other cores can still
2828                  * be requesting it; so we'll deassert the request but
2829                  * not wait for status to comply.
2830                  */
2831                 AND_REG(&regs->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL);
2832                 tmp = R_REG(&regs->clk_ctl_st);
2833         }
2834 }
2835
2836 static void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2837 {
2838         bool dev_gone;
2839
2840         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2841
2842         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2843
2844         if (dev_gone)
2845                 return;
2846
2847         if (wlc_hw->noreset)
2848                 return;
2849
2850         /* radio off */
2851         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2852
2853         /* turn off analog core */
2854         wlc_phy_anacore(wlc_hw->band->pi, OFF);
2855
2856         /* turn off PHYPLL to save power */
2857         brcms_b_core_phypll_ctl(wlc_hw, false);
2858
2859         wlc_hw->clk = false;
2860         ai_core_disable(wlc_hw->sih, 0);
2861         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2862 }
2863
2864 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2865 {
2866         struct brcms_hardware *wlc_hw = wlc->hw;
2867         uint i;
2868
2869         /* free any posted tx packets */
2870         for (i = 0; i < NFIFO; i++)
2871                 if (wlc_hw->di[i]) {
2872                         dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2873                         wlc->core->txpktpend[i] = 0;
2874                         BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
2875                 }
2876
2877         /* free any posted rx packets */
2878         dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2879 }
2880
2881 static u16
2882 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
2883 {
2884         struct d11regs __iomem *regs = wlc_hw->regs;
2885         u16 __iomem *objdata_lo = (u16 __iomem *)&regs->objdata;
2886         u16 __iomem *objdata_hi = objdata_lo + 1;
2887         u16 v;
2888
2889         W_REG(&regs->objaddr, sel | (offset >> 2));
2890         (void)R_REG(&regs->objaddr);
2891         if (offset & 2)
2892                 v = R_REG(objdata_hi);
2893         else
2894                 v = R_REG(objdata_lo);
2895
2896         return v;
2897 }
2898
2899 static void
2900 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
2901                      u32 sel)
2902 {
2903         struct d11regs __iomem *regs = wlc_hw->regs;
2904         u16 __iomem *objdata_lo = (u16 __iomem *)&regs->objdata;
2905         u16 __iomem *objdata_hi = objdata_lo + 1;
2906
2907         W_REG(&regs->objaddr, sel | (offset >> 2));
2908         (void)R_REG(&regs->objaddr);
2909         if (offset & 2)
2910                 W_REG(objdata_hi, v);
2911         else
2912                 W_REG(objdata_lo, v);
2913 }
2914
2915 /*
2916  * Read a single u16 from shared memory.
2917  * SHM 'offset' needs to be an even address
2918  */
2919 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
2920 {
2921         return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
2922 }
2923
2924 /*
2925  * Write a single u16 to shared memory.
2926  * SHM 'offset' needs to be an even address
2927  */
2928 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
2929 {
2930         brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
2931 }
2932
2933 /*
2934  * Copy a buffer to shared memory of specified type .
2935  * SHM 'offset' needs to be an even address and
2936  * Buffer length 'len' must be an even number of bytes
2937  * 'sel' selects the type of memory
2938  */
2939 void
2940 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
2941                       const void *buf, int len, u32 sel)
2942 {
2943         u16 v;
2944         const u8 *p = (const u8 *)buf;
2945         int i;
2946
2947         if (len <= 0 || (offset & 1) || (len & 1))
2948                 return;
2949
2950         for (i = 0; i < len; i += 2) {
2951                 v = p[i] | (p[i + 1] << 8);
2952                 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
2953         }
2954 }
2955
2956 /*
2957  * Copy a piece of shared memory of specified type to a buffer .
2958  * SHM 'offset' needs to be an even address and
2959  * Buffer length 'len' must be an even number of bytes
2960  * 'sel' selects the type of memory
2961  */
2962 void
2963 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
2964                          int len, u32 sel)
2965 {
2966         u16 v;
2967         u8 *p = (u8 *) buf;
2968         int i;
2969
2970         if (len <= 0 || (offset & 1) || (len & 1))
2971                 return;
2972
2973         for (i = 0; i < len; i += 2) {
2974                 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
2975                 p[i] = v & 0xFF;
2976                 p[i + 1] = (v >> 8) & 0xFF;
2977         }
2978 }
2979
2980 /* Copy a buffer to shared memory.
2981  * SHM 'offset' needs to be an even address and
2982  * Buffer length 'len' must be an even number of bytes
2983  */
2984 static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset,
2985                         const void *buf, int len)
2986 {
2987         brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
2988 }
2989
2990 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
2991                                    u16 SRL, u16 LRL)
2992 {
2993         wlc_hw->SRL = SRL;
2994         wlc_hw->LRL = LRL;
2995
2996         /* write retry limit to SCR, shouldn't need to suspend */
2997         if (wlc_hw->up) {
2998                 W_REG(&wlc_hw->regs->objaddr,
2999                       OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3000                 (void)R_REG(&wlc_hw->regs->objaddr);
3001                 W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL);
3002                 W_REG(&wlc_hw->regs->objaddr,
3003                       OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3004                 (void)R_REG(&wlc_hw->regs->objaddr);
3005                 W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL);
3006         }
3007 }
3008
3009 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3010 {
3011         if (set) {
3012                 if (mboolisset(wlc_hw->pllreq, req_bit))
3013                         return;
3014
3015                 mboolset(wlc_hw->pllreq, req_bit);
3016
3017                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3018                         if (!wlc_hw->sbclk)
3019                                 brcms_b_xtal(wlc_hw, ON);
3020                 }
3021         } else {
3022                 if (!mboolisset(wlc_hw->pllreq, req_bit))
3023                         return;
3024
3025                 mboolclr(wlc_hw->pllreq, req_bit);
3026
3027                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3028                         if (wlc_hw->sbclk)
3029                                 brcms_b_xtal(wlc_hw, OFF);
3030                 }
3031         }
3032 }
3033
3034 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3035 {
3036         wlc_hw->antsel_avail = antsel_avail;
3037 }
3038
3039 /*
3040  * conditions under which the PM bit should be set in outgoing frames
3041  * and STAY_AWAKE is meaningful
3042  */
3043 static bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3044 {
3045         struct brcms_bss_cfg *cfg = wlc->bsscfg;
3046
3047         /* disallow PS when one of the following global conditions meets */
3048         if (!wlc->pub->associated)
3049                 return false;
3050
3051         /* disallow PS when one of these meets when not scanning */
3052         if (wlc->monitor)
3053                 return false;
3054
3055         if (cfg->associated) {
3056                 /*
3057                  * disallow PS when one of the following
3058                  * bsscfg specific conditions meets
3059                  */
3060                 if (!cfg->BSS)
3061                         return false;
3062
3063                 return false;
3064         }
3065
3066         return true;
3067 }
3068
3069 static void brcms_c_statsupd(struct brcms_c_info *wlc)
3070 {
3071         int i;
3072         struct macstat macstats;
3073 #ifdef BCMDBG
3074         u16 delta;
3075         u16 rxf0ovfl;
3076         u16 txfunfl[NFIFO];
3077 #endif                          /* BCMDBG */
3078
3079         /* if driver down, make no sense to update stats */
3080         if (!wlc->pub->up)
3081                 return;
3082
3083 #ifdef BCMDBG
3084         /* save last rx fifo 0 overflow count */
3085         rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
3086
3087         /* save last tx fifo  underflow count */
3088         for (i = 0; i < NFIFO; i++)
3089                 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
3090 #endif                          /* BCMDBG */
3091
3092         /* Read mac stats from contiguous shared memory */
3093         brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
3094                                 sizeof(struct macstat), OBJADDR_SHM_SEL);
3095
3096 #ifdef BCMDBG
3097         /* check for rx fifo 0 overflow */
3098         delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
3099         if (delta)
3100                 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
3101                           wlc->pub->unit, delta);
3102
3103         /* check for tx fifo underflows */
3104         for (i = 0; i < NFIFO; i++) {
3105                 delta =
3106                     (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
3107                               txfunfl[i]);
3108                 if (delta)
3109                         wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
3110                                   "\n", wlc->pub->unit, delta, i);
3111         }
3112 #endif                          /* BCMDBG */
3113
3114         /* merge counters from dma module */
3115         for (i = 0; i < NFIFO; i++) {
3116                 if (wlc->hw->di[i])
3117                         dma_counterreset(wlc->hw->di[i]);
3118         }
3119 }
3120
3121 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3122 {
3123         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3124
3125         /* reset the core */
3126         if (!brcms_deviceremoved(wlc_hw->wlc))
3127                 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3128
3129         /* purge the dma rings */
3130         brcms_c_flushqueues(wlc_hw->wlc);
3131 }
3132
3133 void brcms_c_reset(struct brcms_c_info *wlc)
3134 {
3135         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3136
3137         /* slurp up hw mac counters before core reset */
3138         brcms_c_statsupd(wlc);
3139
3140         /* reset our snapshot of macstat counters */
3141         memset((char *)wlc->core->macstat_snapshot, 0,
3142                 sizeof(struct macstat));
3143
3144         brcms_b_reset(wlc->hw);
3145 }
3146
3147 /* Return the channel the driver should initialize during brcms_c_init.
3148  * the channel may have to be changed from the currently configured channel
3149  * if other configurations are in conflict (bandlocked, 11n mode disabled,
3150  * invalid channel for current country, etc.)
3151  */
3152 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3153 {
3154         u16 chanspec =
3155             1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3156             WL_CHANSPEC_BAND_2G;
3157
3158         return chanspec;
3159 }
3160
3161 void brcms_c_init_scb(struct scb *scb)
3162 {
3163         int i;
3164
3165         memset(scb, 0, sizeof(struct scb));
3166         scb->flags = SCB_WMECAP | SCB_HTCAP;
3167         for (i = 0; i < NUMPRIO; i++) {
3168                 scb->seqnum[i] = 0;
3169                 scb->seqctl[i] = 0xFFFF;
3170         }
3171
3172         scb->seqctl_nonqos = 0xFFFF;
3173         scb->magic = SCB_MAGIC;
3174 }
3175
3176 /* d11 core init
3177  *   reset PSM
3178  *   download ucode/PCM
3179  *   let ucode run to suspended
3180  *   download ucode inits
3181  *   config other core registers
3182  *   init dma
3183  */
3184 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3185 {
3186         struct brcms_hardware *wlc_hw = wlc->hw;
3187         struct d11regs __iomem *regs;
3188         u32 sflags;
3189         uint bcnint_us;
3190         uint i = 0;
3191         bool fifosz_fixup = false;
3192         int err = 0;
3193         u16 buf[NFIFO];
3194         struct wiphy *wiphy = wlc->wiphy;
3195         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3196
3197         regs = wlc_hw->regs;
3198
3199         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3200
3201         /* reset PSM */
3202         brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3203
3204         brcms_ucode_download(wlc_hw);
3205         /*
3206          * FIFOSZ fixup. driver wants to controls the fifo allocation.
3207          */
3208         fifosz_fixup = true;
3209
3210         /* let the PSM run to the suspended state, set mode to BSS STA */
3211         W_REG(&regs->macintstatus, -1);
3212         brcms_b_mctrl(wlc_hw, ~0,
3213                        (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3214
3215         /* wait for ucode to self-suspend after auto-init */
3216         SPINWAIT(((R_REG(&regs->macintstatus) & MI_MACSSPNDD) == 0),
3217                  1000 * 1000);
3218         if ((R_REG(&regs->macintstatus) & MI_MACSSPNDD) == 0)
3219                 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3220                           "suspend!\n", wlc_hw->unit);
3221
3222         brcms_c_gpio_init(wlc);
3223
3224         sflags = ai_core_sflags(wlc_hw->sih, 0, 0);
3225
3226         if (D11REV_IS(wlc_hw->corerev, 23)) {
3227                 if (BRCMS_ISNPHY(wlc_hw->band))
3228                         brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3229                 else
3230                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3231                                   " %d\n", __func__, wlc_hw->unit,
3232                                   wlc_hw->corerev);
3233         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3234                 if (BRCMS_ISLCNPHY(wlc_hw->band))
3235                         brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3236                 else
3237                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3238                                   " %d\n", __func__, wlc_hw->unit,
3239                                   wlc_hw->corerev);
3240         } else {
3241                 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3242                           __func__, wlc_hw->unit, wlc_hw->corerev);
3243         }
3244
3245         /* For old ucode, txfifo sizes needs to be modified(increased) */
3246         if (fifosz_fixup == true)
3247                 brcms_b_corerev_fifofixup(wlc_hw);
3248
3249         /* check txfifo allocations match between ucode and driver */
3250         buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3251         if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3252                 i = TX_AC_BE_FIFO;
3253                 err = -1;
3254         }
3255         buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3256         if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3257                 i = TX_AC_VI_FIFO;
3258                 err = -1;
3259         }
3260         buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3261         buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3262         buf[TX_AC_BK_FIFO] &= 0xff;
3263         if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3264                 i = TX_AC_BK_FIFO;
3265                 err = -1;
3266         }
3267         if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3268                 i = TX_AC_VO_FIFO;
3269                 err = -1;
3270         }
3271         buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3272         buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3273         buf[TX_BCMC_FIFO] &= 0xff;
3274         if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3275                 i = TX_BCMC_FIFO;
3276                 err = -1;
3277         }
3278         if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3279                 i = TX_ATIM_FIFO;
3280                 err = -1;
3281         }
3282         if (err != 0)
3283                 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3284                           " driver size %d index %d\n", buf[i],
3285                           wlc_hw->xmtfifo_sz[i], i);
3286
3287         /* make sure we can still talk to the mac */
3288         WARN_ON(R_REG(&regs->maccontrol) == 0xffffffff);
3289
3290         /* band-specific inits done by wlc_bsinit() */
3291
3292         /* Set up frame burst size and antenna swap threshold init values */
3293         brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3294         brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3295
3296         /* enable one rx interrupt per received frame */
3297         W_REG(&regs->intrcvlazy[0], (1 << IRL_FC_SHIFT));
3298
3299         /* set the station mode (BSS STA) */
3300         brcms_b_mctrl(wlc_hw,
3301                        (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3302                        (MCTL_INFRA | MCTL_DISCARD_PMQ));
3303
3304         /* set up Beacon interval */
3305         bcnint_us = 0x8000 << 10;
3306         W_REG(&regs->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT));
3307         W_REG(&regs->tsf_cfpstart, bcnint_us);
3308         W_REG(&regs->macintstatus, MI_GP1);
3309
3310         /* write interrupt mask */
3311         W_REG(&regs->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK);
3312
3313         /* allow the MAC to control the PHY clock (dynamic on/off) */
3314         brcms_b_macphyclk_set(wlc_hw, ON);
3315
3316         /* program dynamic clock control fast powerup delay register */
3317         wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3318         W_REG(&regs->scc_fastpwrup_dly, wlc->fastpwrup_dly);
3319
3320         /* tell the ucode the corerev */
3321         brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3322
3323         /* tell the ucode MAC capabilities */
3324         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3325                            (u16) (wlc_hw->machwcap & 0xffff));
3326         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3327                            (u16) ((wlc_hw->
3328                                       machwcap >> 16) & 0xffff));
3329
3330         /* write retry limits to SCR, this done after PSM init */
3331         W_REG(&regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3332         (void)R_REG(&regs->objaddr);
3333         W_REG(&regs->objdata, wlc_hw->SRL);
3334         W_REG(&regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3335         (void)R_REG(&regs->objaddr);
3336         W_REG(&regs->objdata, wlc_hw->LRL);
3337
3338         /* write rate fallback retry limits */
3339         brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3340         brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3341
3342         AND_REG(&regs->ifs_ctl, 0x0FFF);
3343         W_REG(&regs->ifs_aifsn, EDCF_AIFSN_MIN);
3344
3345         /* init the tx dma engines */
3346         for (i = 0; i < NFIFO; i++) {
3347                 if (wlc_hw->di[i])
3348                         dma_txinit(wlc_hw->di[i]);
3349         }
3350
3351         /* init the rx dma engine(s) and post receive buffers */
3352         dma_rxinit(wlc_hw->di[RX_FIFO]);
3353         dma_rxfill(wlc_hw->di[RX_FIFO]);
3354 }
3355
3356 void
3357 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec,
3358                           bool mute) {
3359         u32 macintmask;
3360         bool fastclk;
3361         struct brcms_c_info *wlc = wlc_hw->wlc;
3362
3363         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3364
3365         /* request FAST clock if not on */
3366         fastclk = wlc_hw->forcefastclk;
3367         if (!fastclk)
3368                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3369
3370         /* disable interrupts */
3371         macintmask = brcms_intrsoff(wlc->wl);
3372
3373         /* set up the specified band and chanspec */
3374         brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3375         wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3376
3377         /* do one-time phy inits and calibration */
3378         wlc_phy_cal_init(wlc_hw->band->pi);
3379
3380         /* core-specific initialization */
3381         brcms_b_coreinit(wlc);
3382
3383         /* suspend the tx fifos and mute the phy for preism cac time */
3384         if (mute)
3385                 brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM);
3386
3387         /* band-specific inits */
3388         brcms_b_bsinit(wlc, chanspec);
3389
3390         /* restore macintmask */
3391         brcms_intrsrestore(wlc->wl, macintmask);
3392
3393         /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3394          * is suspended and brcms_c_enable_mac() will clear this override bit.
3395          */
3396         mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3397
3398         /*
3399          * initialize mac_suspend_depth to 1 to match ucode
3400          * initial suspended state
3401          */
3402         wlc_hw->mac_suspend_depth = 1;
3403
3404         /* restore the clk */
3405         if (!fastclk)
3406                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3407 }
3408
3409 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3410                                      u16 chanspec)
3411 {
3412         /* Save our copy of the chanspec */
3413         wlc->chanspec = chanspec;
3414
3415         /* Set the chanspec and power limits for this locale */
3416         brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3417
3418         if (wlc->stf->ss_algosel_auto)
3419                 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3420                                             chanspec);
3421
3422         brcms_c_stf_ss_update(wlc, wlc->band);
3423 }
3424
3425 static void
3426 brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
3427 {
3428         brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3429                 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3430                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3431                 brcms_chspec_bw(wlc->default_bss->chanspec),
3432                 wlc->stf->txstreams);
3433 }
3434
3435 /* derive wlc->band->basic_rate[] table from 'rateset' */
3436 static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
3437                               struct brcms_c_rateset *rateset)
3438 {
3439         u8 rate;
3440         u8 mandatory;
3441         u8 cck_basic = 0;
3442         u8 ofdm_basic = 0;
3443         u8 *br = wlc->band->basic_rate;
3444         uint i;
3445
3446         /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3447         memset(br, 0, BRCM_MAXRATE + 1);
3448
3449         /* For each basic rate in the rates list, make an entry in the
3450          * best basic lookup.
3451          */
3452         for (i = 0; i < rateset->count; i++) {
3453                 /* only make an entry for a basic rate */
3454                 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3455                         continue;
3456
3457                 /* mask off basic bit */
3458                 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3459
3460                 if (rate > BRCM_MAXRATE) {
3461                         wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
3462                                   "invalid rate 0x%X in rate set\n",
3463                                   rateset->rates[i]);
3464                         continue;
3465                 }
3466
3467                 br[rate] = rate;
3468         }
3469
3470         /* The rate lookup table now has non-zero entries for each
3471          * basic rate, equal to the basic rate: br[basicN] = basicN
3472          *
3473          * To look up the best basic rate corresponding to any
3474          * particular rate, code can use the basic_rate table
3475          * like this
3476          *
3477          * basic_rate = wlc->band->basic_rate[tx_rate]
3478          *
3479          * Make sure there is a best basic rate entry for
3480          * every rate by walking up the table from low rates
3481          * to high, filling in holes in the lookup table
3482          */
3483
3484         for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3485                 rate = wlc->band->hw_rateset.rates[i];
3486
3487                 if (br[rate] != 0) {
3488                         /* This rate is a basic rate.
3489                          * Keep track of the best basic rate so far by
3490                          * modulation type.
3491                          */
3492                         if (is_ofdm_rate(rate))
3493                                 ofdm_basic = rate;
3494                         else
3495                                 cck_basic = rate;
3496
3497                         continue;
3498                 }
3499
3500                 /* This rate is not a basic rate so figure out the
3501                  * best basic rate less than this rate and fill in
3502                  * the hole in the table
3503                  */
3504
3505                 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
3506
3507                 if (br[rate] != 0)
3508                         continue;
3509
3510                 if (is_ofdm_rate(rate)) {
3511                         /*
3512                          * In 11g and 11a, the OFDM mandatory rates
3513                          * are 6, 12, and 24 Mbps
3514                          */
3515                         if (rate >= BRCM_RATE_24M)
3516                                 mandatory = BRCM_RATE_24M;
3517                         else if (rate >= BRCM_RATE_12M)
3518                                 mandatory = BRCM_RATE_12M;
3519                         else
3520                                 mandatory = BRCM_RATE_6M;
3521                 } else {
3522                         /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3523                         mandatory = rate;
3524                 }
3525
3526                 br[rate] = mandatory;
3527         }
3528 }
3529
3530 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3531                                      u16 chanspec)
3532 {
3533         struct brcms_c_rateset default_rateset;
3534         uint parkband;
3535         uint i, band_order[2];
3536
3537         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3538         /*
3539          * We might have been bandlocked during down and the chip
3540          * power-cycled (hibernate). Figure out the right band to park on
3541          */
3542         if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3543                 /* updated in brcms_c_bandlock() */
3544                 parkband = wlc->band->bandunit;
3545                 band_order[0] = band_order[1] = parkband;
3546         } else {
3547                 /* park on the band of the specified chanspec */
3548                 parkband = chspec_bandunit(chanspec);
3549
3550                 /* order so that parkband initialize last */
3551                 band_order[0] = parkband ^ 1;
3552                 band_order[1] = parkband;
3553         }
3554
3555         /* make each band operational, software state init */
3556         for (i = 0; i < wlc->pub->_nbands; i++) {
3557                 uint j = band_order[i];
3558
3559                 wlc->band = wlc->bandstate[j];
3560
3561                 brcms_default_rateset(wlc, &default_rateset);
3562
3563                 /* fill in hw_rate */
3564                 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3565                                    false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3566                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3567
3568                 /* init basic rate lookup */
3569                 brcms_c_rate_lookup_init(wlc, &default_rateset);
3570         }
3571
3572         /* sync up phy/radio chanspec */
3573         brcms_c_set_phy_chanspec(wlc, chanspec);
3574 }
3575
3576 static void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc)
3577 {
3578         if (wlc->bcnmisc_monitor)
3579                 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC);
3580         else
3581                 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, 0);
3582 }
3583
3584 void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc)
3585 {
3586         wlc->bcnmisc_monitor = promisc;
3587         brcms_c_mac_bcn_promisc(wlc);
3588 }
3589
3590 /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */
3591 static void brcms_c_mac_promisc(struct brcms_c_info *wlc)
3592 {
3593         u32 promisc_bits = 0;
3594
3595         /*
3596          * promiscuous mode just sets MCTL_PROMISC
3597          * Note: APs get all BSS traffic without the need to set
3598          * the MCTL_PROMISC bit since all BSS data traffic is
3599          * directed at the AP
3600          */
3601         if (wlc->pub->promisc)
3602                 promisc_bits |= MCTL_PROMISC;
3603
3604         /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
3605          * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is
3606          * handled in brcms_c_mac_bcn_promisc()
3607          */
3608         if (wlc->monitor)
3609                 promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL;
3610
3611         brcms_b_mctrl(wlc->hw, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits);
3612 }
3613
3614 /*
3615  * ucode, hwmac update
3616  *    Channel dependent updates for ucode and hw
3617  */
3618 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3619 {
3620         /* enable or disable any active IBSSs depending on whether or not
3621          * we are on the home channel
3622          */
3623         if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3624                 if (wlc->pub->associated) {
3625                         /*
3626                          * BMAC_NOTE: This is something that should be fixed
3627                          * in ucode inits. I think that the ucode inits set
3628                          * up the bcn templates and shm values with a bogus
3629                          * beacon. This should not be done in the inits. If
3630                          * ucode needs to set up a beacon for testing, the
3631                          * test routines should write it down, not expect the
3632                          * inits to populate a bogus beacon.
3633                          */
3634                         if (BRCMS_PHY_11N_CAP(wlc->band))
3635                                 brcms_b_write_shm(wlc->hw,
3636                                                 M_BCN_TXTSF_OFFSET, 0);
3637                 }
3638         } else {
3639                 /* disable an active IBSS if we are not on the home channel */
3640         }
3641
3642         /* update the various promisc bits */
3643         brcms_c_mac_bcn_promisc(wlc);
3644         brcms_c_mac_promisc(wlc);
3645 }
3646
3647 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
3648                                    u8 basic_rate)
3649 {
3650         u8 phy_rate, index;
3651         u8 basic_phy_rate, basic_index;
3652         u16 dir_table, basic_table;
3653         u16 basic_ptr;
3654
3655         /* Shared memory address for the table we are reading */
3656         dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
3657
3658         /* Shared memory address for the table we are writing */
3659         basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
3660
3661         /*
3662          * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3663          * the index into the rate table.
3664          */
3665         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
3666         basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
3667         index = phy_rate & 0xf;
3668         basic_index = basic_phy_rate & 0xf;
3669
3670         /* Find the SHM pointer to the ACK rate entry by looking in the
3671          * Direct-map Table
3672          */
3673         basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3674
3675         /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3676          * to the correct basic rate for the given incoming rate
3677          */
3678         brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3679 }
3680
3681 static const struct brcms_c_rateset *
3682 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
3683 {
3684         const struct brcms_c_rateset *rs_dflt;
3685
3686         if (BRCMS_PHY_11N_CAP(wlc->band)) {
3687                 if (wlc->band->bandtype == BRCM_BAND_5G)
3688                         rs_dflt = &ofdm_mimo_rates;
3689                 else
3690                         rs_dflt = &cck_ofdm_mimo_rates;
3691         } else if (wlc->band->gmode)
3692                 rs_dflt = &cck_ofdm_rates;
3693         else
3694                 rs_dflt = &cck_rates;
3695
3696         return rs_dflt;
3697 }
3698
3699 static void brcms_c_set_ratetable(struct brcms_c_info *wlc)
3700 {
3701         const struct brcms_c_rateset *rs_dflt;
3702         struct brcms_c_rateset rs;
3703         u8 rate, basic_rate;
3704         uint i;
3705
3706         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
3707
3708         brcms_c_rateset_copy(rs_dflt, &rs);
3709         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3710
3711         /* walk the phy rate table and update SHM basic rate lookup table */
3712         for (i = 0; i < rs.count; i++) {
3713                 rate = rs.rates[i] & BRCMS_RATE_MASK;
3714
3715                 /* for a given rate brcms_basic_rate returns the rate at
3716                  * which a response ACK/CTS should be sent.
3717                  */
3718                 basic_rate = brcms_basic_rate(wlc, rate);
3719                 if (basic_rate == 0)
3720                         /* This should only happen if we are using a
3721                          * restricted rateset.
3722                          */
3723                         basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
3724
3725                 brcms_c_write_rate_shm(wlc, rate, basic_rate);
3726         }
3727 }
3728
3729 /* band-specific init */
3730 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3731 {
3732         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3733                  wlc->pub->unit, wlc->band->bandunit);
3734
3735         /* write ucode ACK/CTS rate table */
3736         brcms_c_set_ratetable(wlc);
3737
3738         /* update some band specific mac configuration */
3739         brcms_c_ucode_mac_upd(wlc);
3740
3741         /* init antenna selection */
3742         brcms_c_antsel_init(wlc->asi);
3743
3744 }
3745
3746 /* formula:  IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3747 static int
3748 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3749                    bool writeToShm)
3750 {
3751         int idle_busy_ratio_x_16 = 0;
3752         uint offset =
3753             isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3754             M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3755         if (duty_cycle > 100 || duty_cycle < 0) {
3756                 wiphy_err(wlc->wiphy, "wl%d:  duty cycle value off limit\n",
3757                           wlc->pub->unit);
3758                 return -EINVAL;
3759         }
3760         if (duty_cycle)
3761                 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3762         /* Only write to shared memory  when wl is up */
3763         if (writeToShm)
3764                 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3765
3766         if (isOFDM)
3767                 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3768         else
3769                 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3770
3771         return 0;
3772 }
3773
3774 /*
3775  * Initialize the base precedence map for dequeueing
3776  * from txq based on WME settings
3777  */
3778 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3779 {
3780         wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3781         memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3782
3783         wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3784         wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3785         wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3786         wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3787 }
3788
3789 static void
3790 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3791                              struct brcms_txq_info *qi, bool on, int prio)
3792 {
3793         /* transmit flowcontrol is not yet implemented */
3794 }
3795
3796 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3797 {
3798         struct brcms_txq_info *qi;
3799
3800         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3801                 if (qi->stopped) {
3802                         brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3803                         qi->stopped = 0;
3804                 }
3805         }
3806 }
3807
3808 /* push sw hps and wake state through hardware */
3809 static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3810 {
3811         u32 v1, v2;
3812         bool hps;
3813         bool awake_before;
3814
3815         hps = brcms_c_ps_allowed(wlc);
3816
3817         BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3818
3819         v1 = R_REG(&wlc->regs->maccontrol);
3820         v2 = MCTL_WAKE;
3821         if (hps)
3822                 v2 |= MCTL_HPS;
3823
3824         brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3825
3826         awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3827
3828         if (!awake_before)
3829                 brcms_b_wait_for_wake(wlc->hw);
3830 }
3831
3832 /*
3833  * Write this BSS config's MAC address to core.
3834  * Updates RXE match engine.
3835  */
3836 static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3837 {
3838         int err = 0;
3839         struct brcms_c_info *wlc = bsscfg->wlc;
3840
3841         /* enter the MAC addr into the RXE match registers */
3842         brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3843
3844         brcms_c_ampdu_macaddr_upd(wlc);
3845
3846         return err;
3847 }
3848
3849 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3850  * Updates RXE match engine.
3851  */
3852 static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3853 {
3854         /* we need to update BSSID in RXE match registers */
3855         brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3856 }
3857
3858 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3859 {
3860         wlc_hw->shortslot = shortslot;
3861
3862         if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3863                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3864                 brcms_b_update_slot_timing(wlc_hw, shortslot);
3865                 brcms_c_enable_mac(wlc_hw->wlc);
3866         }
3867 }
3868
3869 /*
3870  * Suspend the the MAC and update the slot timing
3871  * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3872  */
3873 static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3874 {
3875         /* use the override if it is set */
3876         if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3877                 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3878
3879         if (wlc->shortslot == shortslot)
3880                 return;
3881
3882         wlc->shortslot = shortslot;
3883
3884         brcms_b_set_shortslot(wlc->hw, shortslot);
3885 }
3886
3887 static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3888 {
3889         if (wlc->home_chanspec != chanspec) {
3890                 wlc->home_chanspec = chanspec;
3891
3892                 if (wlc->bsscfg->associated)
3893                         wlc->bsscfg->current_bss->chanspec = chanspec;
3894         }
3895 }
3896
3897 void
3898 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3899                       bool mute, struct txpwr_limits *txpwr)
3900 {
3901         uint bandunit;
3902
3903         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3904
3905         wlc_hw->chanspec = chanspec;
3906
3907         /* Switch bands if necessary */
3908         if (wlc_hw->_nbands > 1) {
3909                 bandunit = chspec_bandunit(chanspec);
3910                 if (wlc_hw->band->bandunit != bandunit) {
3911                         /* brcms_b_setband disables other bandunit,
3912                          *  use light band switch if not up yet
3913                          */
3914                         if (wlc_hw->up) {
3915                                 wlc_phy_chanspec_radio_set(wlc_hw->
3916                                                            bandstate[bandunit]->
3917                                                            pi, chanspec);
3918                                 brcms_b_setband(wlc_hw, bandunit, chanspec);
3919                         } else {
3920                                 brcms_c_setxband(wlc_hw, bandunit);
3921                         }
3922                 }
3923         }
3924
3925         wlc_phy_initcal_enable(wlc_hw->band->pi, !mute);
3926
3927         if (!wlc_hw->up) {
3928                 if (wlc_hw->clk)
3929                         wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3930                                                   chanspec);
3931                 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3932         } else {
3933                 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3934                 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3935
3936                 /* Update muting of the channel */
3937                 brcms_b_mute(wlc_hw, mute, 0);
3938         }
3939 }
3940
3941 /* switch to and initialize new band */
3942 static void brcms_c_setband(struct brcms_c_info *wlc,
3943                                            uint bandunit)
3944 {
3945         wlc->band = wlc->bandstate[bandunit];
3946
3947         if (!wlc->pub->up)
3948                 return;
3949
3950         /* wait for at least one beacon before entering sleeping state */
3951         brcms_c_set_ps_ctrl(wlc);
3952
3953         /* band-specific initializations */
3954         brcms_c_bsinit(wlc);
3955 }
3956
3957 static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3958 {
3959         uint bandunit;
3960         bool switchband = false;
3961         u16 old_chanspec = wlc->chanspec;
3962
3963         if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3964                 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3965                           wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3966                 return;
3967         }
3968
3969         /* Switch bands if necessary */
3970         if (wlc->pub->_nbands > 1) {
3971                 bandunit = chspec_bandunit(chanspec);
3972                 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3973                         switchband = true;
3974                         if (wlc->bandlocked) {
3975                                 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3976                                           "band is locked!\n",
3977                                           wlc->pub->unit, __func__,
3978                                           CHSPEC_CHANNEL(chanspec));
3979                                 return;
3980                         }
3981                         /*
3982                          * should the setband call come after the
3983                          * brcms_b_chanspec() ? if the setband updates
3984                          * (brcms_c_bsinit) use low level calls to inspect and
3985                          * set state, the state inspected may be from the wrong
3986                          * band, or the following brcms_b_set_chanspec() may
3987                          * undo the work.
3988                          */
3989                         brcms_c_setband(wlc, bandunit);
3990                 }
3991         }
3992
3993         /* sync up phy/radio chanspec */
3994         brcms_c_set_phy_chanspec(wlc, chanspec);
3995
3996         /* init antenna selection */
3997         if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
3998                 brcms_c_antsel_init(wlc->asi);
3999
4000                 /* Fix the hardware rateset based on bw.
4001                  * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
4002                  */
4003                 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
4004                         wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
4005         }
4006
4007         /* update some mac configuration since chanspec changed */
4008         brcms_c_ucode_mac_upd(wlc);
4009 }
4010
4011 /*
4012  * This function changes the phytxctl for beacon based on current
4013  * beacon ratespec AND txant setting as per this table:
4014  *  ratespec     CCK            ant = wlc->stf->txant
4015  *              OFDM            ant = 3
4016  */
4017 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4018                                        u32 bcn_rspec)
4019 {
4020         u16 phyctl;
4021         u16 phytxant = wlc->stf->phytxant;
4022         u16 mask = PHY_TXC_ANT_MASK;
4023
4024         /* for non-siso rates or default setting, use the available chains */
4025         if (BRCMS_PHY_11N_CAP(wlc->band))
4026                 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4027
4028         phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4029         phyctl = (phyctl & ~mask) | phytxant;
4030         brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4031 }
4032
4033 /*
4034  * centralized protection config change function to simplify debugging, no
4035  * consistency checking this should be called only on changes to avoid overhead
4036  * in periodic function
4037  */
4038 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4039 {
4040         BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4041
4042         switch (idx) {
4043         case BRCMS_PROT_G_SPEC:
4044                 wlc->protection->_g = (bool) val;
4045                 break;
4046         case BRCMS_PROT_G_OVR:
4047                 wlc->protection->g_override = (s8) val;
4048                 break;
4049         case BRCMS_PROT_G_USER:
4050                 wlc->protection->gmode_user = (u8) val;
4051                 break;
4052         case BRCMS_PROT_OVERLAP:
4053                 wlc->protection->overlap = (s8) val;
4054                 break;
4055         case BRCMS_PROT_N_USER:
4056                 wlc->protection->nmode_user = (s8) val;
4057                 break;
4058         case BRCMS_PROT_N_CFG:
4059                 wlc->protection->n_cfg = (s8) val;
4060                 break;
4061         case BRCMS_PROT_N_CFG_OVR:
4062                 wlc->protection->n_cfg_override = (s8) val;
4063                 break;
4064         case BRCMS_PROT_N_NONGF:
4065                 wlc->protection->nongf = (bool) val;
4066                 break;
4067         case BRCMS_PROT_N_NONGF_OVR:
4068                 wlc->protection->nongf_override = (s8) val;
4069                 break;
4070         case BRCMS_PROT_N_PAM_OVR:
4071                 wlc->protection->n_pam_override = (s8) val;
4072                 break;
4073         case BRCMS_PROT_N_OBSS:
4074                 wlc->protection->n_obss = (bool) val;
4075                 break;
4076
4077         default:
4078                 break;
4079         }
4080
4081 }
4082
4083 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4084 {
4085         if (wlc->pub->up) {
4086                 brcms_c_update_beacon(wlc);
4087                 brcms_c_update_probe_resp(wlc, true);
4088         }
4089 }
4090
4091 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4092 {
4093         wlc->stf->ldpc = val;
4094
4095         if (wlc->pub->up) {
4096                 brcms_c_update_beacon(wlc);
4097                 brcms_c_update_probe_resp(wlc, true);
4098                 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4099         }
4100 }
4101
4102 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4103                        const struct ieee80211_tx_queue_params *params,
4104                        bool suspend)
4105 {
4106         int i;
4107         struct shm_acparams acp_shm;
4108         u16 *shm_entry;
4109
4110         /* Only apply params if the core is out of reset and has clocks */
4111         if (!wlc->clk) {
4112                 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4113                           __func__);
4114                 return;
4115         }
4116
4117         memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4118         /* fill in shm ac params struct */
4119         acp_shm.txop = params->txop;
4120         /* convert from units of 32us to us for ucode */
4121         wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4122             EDCF_TXOP2USEC(acp_shm.txop);
4123         acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4124
4125         if (aci == AC_VI && acp_shm.txop == 0
4126             && acp_shm.aifs < EDCF_AIFSN_MAX)
4127                 acp_shm.aifs++;
4128
4129         if (acp_shm.aifs < EDCF_AIFSN_MIN
4130             || acp_shm.aifs > EDCF_AIFSN_MAX) {
4131                 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4132                           "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4133         } else {
4134                 acp_shm.cwmin = params->cw_min;
4135                 acp_shm.cwmax = params->cw_max;
4136                 acp_shm.cwcur = acp_shm.cwmin;
4137                 acp_shm.bslots =
4138                     R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur;
4139                 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4140                 /* Indicate the new params to the ucode */
4141                 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4142                                                   wme_ac2fifo[aci] *
4143                                                   M_EDCF_QLEN +
4144                                                   M_EDCF_STATUS_OFF));
4145                 acp_shm.status |= WME_STATUS_NEWAC;
4146
4147                 /* Fill in shm acparam table */
4148                 shm_entry = (u16 *) &acp_shm;
4149                 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4150                         brcms_b_write_shm(wlc->hw,
4151                                           M_EDCF_QINFO +
4152                                           wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4153                                           *shm_entry++);
4154         }
4155
4156         if (suspend) {
4157                 brcms_c_suspend_mac_and_wait(wlc);
4158                 brcms_c_enable_mac(wlc);
4159         }
4160 }
4161
4162 static void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4163 {
4164         u16 aci;
4165         int i_ac;
4166         struct ieee80211_tx_queue_params txq_pars;
4167         static const struct edcf_acparam default_edcf_acparams[] = {
4168                  {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4169                  {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4170                  {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4171                  {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4172         }; /* ucode needs these parameters during its initialization */
4173         const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4174
4175         for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) {
4176                 /* find out which ac this set of params applies to */
4177                 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4178
4179                 /* fill in shm ac params struct */
4180                 txq_pars.txop = edcf_acp->TXOP;
4181                 txq_pars.aifs = edcf_acp->ACI;
4182
4183                 /* CWmin = 2^(ECWmin) - 1 */
4184                 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4185                 /* CWmax = 2^(ECWmax) - 1 */
4186                 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4187                                             >> EDCF_ECWMAX_SHIFT);
4188                 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4189         }
4190
4191         if (suspend) {
4192                 brcms_c_suspend_mac_and_wait(wlc);
4193                 brcms_c_enable_mac(wlc);
4194         }
4195 }
4196
4197 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4198 {
4199         /* Don't start the timer if HWRADIO feature is disabled */
4200         if (wlc->radio_monitor)
4201                 return;
4202
4203         wlc->radio_monitor = true;
4204         brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4205         brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4206 }
4207
4208 static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4209 {
4210         if (!wlc->radio_monitor)
4211                 return true;
4212
4213         wlc->radio_monitor = false;
4214         brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4215         return brcms_del_timer(wlc->radio_timer);
4216 }
4217
4218 /* read hwdisable state and propagate to wlc flag */
4219 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4220 {
4221         if (wlc->pub->hw_off)
4222                 return;
4223
4224         if (brcms_b_radio_read_hwdisabled(wlc->hw))
4225                 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4226         else
4227                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4228 }
4229
4230 /* update hwradio status and return it */
4231 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4232 {
4233         brcms_c_radio_hwdisable_upd(wlc);
4234
4235         return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4236                         true : false;
4237 }
4238
4239 /* periodical query hw radio button while driver is "down" */
4240 static void brcms_c_radio_timer(void *arg)
4241 {
4242         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4243
4244         if (brcms_deviceremoved(wlc)) {
4245                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4246                         __func__);
4247                 brcms_down(wlc->wl);
4248                 return;
4249         }
4250
4251         brcms_c_radio_hwdisable_upd(wlc);
4252 }
4253
4254 /* common low-level watchdog code */
4255 static void brcms_b_watchdog(void *arg)
4256 {
4257         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4258         struct brcms_hardware *wlc_hw = wlc->hw;
4259
4260         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4261
4262         if (!wlc_hw->up)
4263                 return;
4264
4265         /* increment second count */
4266         wlc_hw->now++;
4267
4268         /* Check for FIFO error interrupts */
4269         brcms_b_fifoerrors(wlc_hw);
4270
4271         /* make sure RX dma has buffers */
4272         dma_rxfill(wlc->hw->di[RX_FIFO]);
4273
4274         wlc_phy_watchdog(wlc_hw->band->pi);
4275 }
4276
4277 /* common watchdog code */
4278 static void brcms_c_watchdog(void *arg)
4279 {
4280         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4281
4282         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4283
4284         if (!wlc->pub->up)
4285                 return;
4286
4287         if (brcms_deviceremoved(wlc)) {
4288                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4289                           __func__);
4290                 brcms_down(wlc->wl);
4291                 return;
4292         }
4293
4294         /* increment second count */
4295         wlc->pub->now++;
4296
4297         brcms_c_radio_hwdisable_upd(wlc);
4298         /* if radio is disable, driver may be down, quit here */
4299         if (wlc->pub->radio_disabled)
4300                 return;
4301
4302         brcms_b_watchdog(wlc);
4303
4304         /*
4305          * occasionally sample mac stat counters to
4306          * detect 16-bit counter wrap
4307          */
4308         if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4309                 brcms_c_statsupd(wlc);
4310
4311         if (BRCMS_ISNPHY(wlc->band) &&
4312             ((wlc->pub->now - wlc->tempsense_lasttime) >=
4313              BRCMS_TEMPSENSE_PERIOD)) {
4314                 wlc->tempsense_lasttime = wlc->pub->now;
4315                 brcms_c_tempsense_upd(wlc);
4316         }
4317 }
4318
4319 static void brcms_c_watchdog_by_timer(void *arg)
4320 {
4321         brcms_c_watchdog(arg);
4322 }
4323
4324 static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4325 {
4326         wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4327                 wlc, "watchdog");
4328         if (!wlc->wdtimer) {
4329                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for wdtimer "
4330                           "failed\n", unit);
4331                 goto fail;
4332         }
4333
4334         wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4335                 wlc, "radio");
4336         if (!wlc->radio_timer) {
4337                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for radio_timer "
4338                           "failed\n", unit);
4339                 goto fail;
4340         }
4341
4342         return true;
4343
4344  fail:
4345         return false;
4346 }
4347
4348 /*
4349  * Initialize brcms_c_info default values ...
4350  * may get overrides later in this function
4351  */
4352 static void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4353 {
4354         int i;
4355
4356         /* Save our copy of the chanspec */
4357         wlc->chanspec = ch20mhz_chspec(1);
4358
4359         /* various 802.11g modes */
4360         wlc->shortslot = false;
4361         wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4362
4363         brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4364         brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4365
4366         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4367                                BRCMS_PROTECTION_AUTO);
4368         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4369         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4370                                BRCMS_PROTECTION_AUTO);
4371         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4372         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4373
4374         brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4375                                BRCMS_PROTECTION_CTL_OVERLAP);
4376
4377         /* 802.11g draft 4.0 NonERP elt advertisement */
4378         wlc->include_legacy_erp = true;
4379
4380         wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4381         wlc->stf->txant = ANT_TX_DEF;
4382
4383         wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4384
4385         wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4386         for (i = 0; i < NFIFO; i++)
4387                 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4388         wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4389
4390         /* default rate fallback retry limits */
4391         wlc->SFBL = RETRY_SHORT_FB;
4392         wlc->LFBL = RETRY_LONG_FB;
4393
4394         /* default mac retry limits */
4395         wlc->SRL = RETRY_SHORT_DEF;
4396         wlc->LRL = RETRY_LONG_DEF;
4397
4398         /* WME QoS mode is Auto by default */
4399         wlc->pub->_ampdu = AMPDU_AGG_HOST;
4400         wlc->pub->bcmerror = 0;
4401 }
4402
4403 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4404 {
4405         uint err = 0;
4406         uint unit;
4407         unit = wlc->pub->unit;
4408
4409         wlc->asi = brcms_c_antsel_attach(wlc);
4410         if (wlc->asi == NULL) {
4411                 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4412                           "failed\n", unit);
4413                 err = 44;
4414                 goto fail;
4415         }
4416
4417         wlc->ampdu = brcms_c_ampdu_attach(wlc);
4418         if (wlc->ampdu == NULL) {
4419                 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4420                           "failed\n", unit);
4421                 err = 50;
4422                 goto fail;
4423         }
4424
4425         if ((brcms_c_stf_attach(wlc) != 0)) {
4426                 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4427                           "failed\n", unit);
4428                 err = 68;
4429                 goto fail;
4430         }
4431  fail:
4432         return err;
4433 }
4434
4435 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4436 {
4437         return wlc->pub;
4438 }
4439
4440 /* low level attach
4441  *    run backplane attach, init nvram
4442  *    run phy attach
4443  *    initialize software state for each core and band
4444  *    put the whole chip in reset(driver down state), no clock
4445  */
4446 static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
4447                           uint unit, bool piomode, void __iomem *regsva,
4448                           struct pci_dev *btparam)
4449 {
4450         struct brcms_hardware *wlc_hw;
4451         struct d11regs __iomem *regs;
4452         char *macaddr = NULL;
4453         uint err = 0;
4454         uint j;
4455         bool wme = false;
4456         struct shared_phy_params sha_params;
4457         struct wiphy *wiphy = wlc->wiphy;
4458
4459         BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor,
4460                 device);
4461
4462         wme = true;
4463
4464         wlc_hw = wlc->hw;
4465         wlc_hw->wlc = wlc;
4466         wlc_hw->unit = unit;
4467         wlc_hw->band = wlc_hw->bandstate[0];
4468         wlc_hw->_piomode = piomode;
4469
4470         /* populate struct brcms_hardware with default values  */
4471         brcms_b_info_init(wlc_hw);
4472
4473         /*
4474          * Do the hardware portion of the attach. Also initialize software
4475          * state that depends on the particular hardware we are running.
4476          */
4477         wlc_hw->sih = ai_attach(regsva, btparam);
4478         if (wlc_hw->sih == NULL) {
4479                 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4480                           unit);
4481                 err = 11;
4482                 goto fail;
4483         }
4484
4485         /* verify again the device is supported */
4486         if (!brcms_c_chipmatch(vendor, device)) {
4487                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4488                         "vendor/device (0x%x/0x%x)\n",
4489                          unit, vendor, device);
4490                 err = 12;
4491                 goto fail;
4492         }
4493
4494         wlc_hw->vendorid = vendor;
4495         wlc_hw->deviceid = device;
4496
4497         /* set bar0 window to point at D11 core */
4498         wlc_hw->regs = (struct d11regs __iomem *)
4499                                 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
4500         wlc_hw->corerev = ai_corerev(wlc_hw->sih);
4501
4502         regs = wlc_hw->regs;
4503
4504         wlc->regs = wlc_hw->regs;
4505
4506         /* validate chip, chiprev and corerev */
4507         if (!brcms_c_isgoodchip(wlc_hw)) {
4508                 err = 13;
4509                 goto fail;
4510         }
4511
4512         /* initialize power control registers */
4513         ai_clkctl_init(wlc_hw->sih);
4514
4515         /* request fastclock and force fastclock for the rest of attach
4516          * bring the d11 core out of reset.
4517          *   For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4518          *   is still false; But it will be called again inside wlc_corereset,
4519          *   after d11 is out of reset.
4520          */
4521         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4522         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4523
4524         if (!brcms_b_validate_chip_access(wlc_hw)) {
4525                 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4526                         "failed\n", unit);
4527                 err = 14;
4528                 goto fail;
4529         }
4530
4531         /* get the board rev, used just below */
4532         j = getintvar(wlc_hw->sih, BRCMS_SROM_BOARDREV);
4533         /* promote srom boardrev of 0xFF to 1 */
4534         if (j == BOARDREV_PROMOTABLE)
4535                 j = BOARDREV_PROMOTED;
4536         wlc_hw->boardrev = (u16) j;
4537         if (!brcms_c_validboardtype(wlc_hw)) {
4538                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4539                         "board type (0x%x)" " or revision level (0x%x)\n",
4540                          unit, wlc_hw->sih->boardtype, wlc_hw->boardrev);
4541                 err = 15;
4542                 goto fail;
4543         }
4544         wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, BRCMS_SROM_REV);
4545         wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih,
4546                                              BRCMS_SROM_BOARDFLAGS);
4547         wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih,
4548                                               BRCMS_SROM_BOARDFLAGS2);
4549
4550         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4551                 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4552
4553         /* check device id(srom, nvram etc.) to set bands */
4554         if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4555             wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4556                 /* Dualband boards */
4557                 wlc_hw->_nbands = 2;
4558         else
4559                 wlc_hw->_nbands = 1;
4560
4561         if ((wlc_hw->sih->chip == BCM43225_CHIP_ID))
4562                 wlc_hw->_nbands = 1;
4563
4564         /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4565          * unconditionally does the init of these values
4566          */
4567         wlc->vendorid = wlc_hw->vendorid;
4568         wlc->deviceid = wlc_hw->deviceid;
4569         wlc->pub->sih = wlc_hw->sih;
4570         wlc->pub->corerev = wlc_hw->corerev;
4571         wlc->pub->sromrev = wlc_hw->sromrev;
4572         wlc->pub->boardrev = wlc_hw->boardrev;
4573         wlc->pub->boardflags = wlc_hw->boardflags;
4574         wlc->pub->boardflags2 = wlc_hw->boardflags2;
4575         wlc->pub->_nbands = wlc_hw->_nbands;
4576
4577         wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4578
4579         if (wlc_hw->physhim == NULL) {
4580                 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4581                         "failed\n", unit);
4582                 err = 25;
4583                 goto fail;
4584         }
4585
4586         /* pass all the parameters to wlc_phy_shared_attach in one struct */
4587         sha_params.sih = wlc_hw->sih;
4588         sha_params.physhim = wlc_hw->physhim;
4589         sha_params.unit = unit;
4590         sha_params.corerev = wlc_hw->corerev;
4591         sha_params.vid = wlc_hw->vendorid;
4592         sha_params.did = wlc_hw->deviceid;
4593         sha_params.chip = wlc_hw->sih->chip;
4594         sha_params.chiprev = wlc_hw->sih->chiprev;
4595         sha_params.chippkg = wlc_hw->sih->chippkg;
4596         sha_params.sromrev = wlc_hw->sromrev;
4597         sha_params.boardtype = wlc_hw->sih->boardtype;
4598         sha_params.boardrev = wlc_hw->boardrev;
4599         sha_params.boardvendor = wlc_hw->sih->boardvendor;
4600         sha_params.boardflags = wlc_hw->boardflags;
4601         sha_params.boardflags2 = wlc_hw->boardflags2;
4602         sha_params.buscorerev = wlc_hw->sih->buscorerev;
4603
4604         /* alloc and save pointer to shared phy state area */
4605         wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4606         if (!wlc_hw->phy_sh) {
4607                 err = 16;
4608                 goto fail;
4609         }
4610
4611         /* initialize software state for each core and band */
4612         for (j = 0; j < wlc_hw->_nbands; j++) {
4613                 /*
4614                  * band0 is always 2.4Ghz
4615                  * band1, if present, is 5Ghz
4616                  */
4617
4618                 brcms_c_setxband(wlc_hw, j);
4619
4620                 wlc_hw->band->bandunit = j;
4621                 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4622                 wlc->band->bandunit = j;
4623                 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4624                 wlc->core->coreidx = ai_coreidx(wlc_hw->sih);
4625
4626                 wlc_hw->machwcap = R_REG(&regs->machwcap);
4627                 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4628
4629                 /* init tx fifo size */
4630                 wlc_hw->xmtfifo_sz =
4631                     xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4632
4633                 /* Get a phy for this band */
4634                 wlc_hw->band->pi =
4635                         wlc_phy_attach(wlc_hw->phy_sh, regs,
4636                                        wlc_hw->band->bandtype,
4637                                        wlc->wiphy);
4638                 if (wlc_hw->band->pi == NULL) {
4639                         wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4640                                   "attach failed\n", unit);
4641                         err = 17;
4642                         goto fail;
4643                 }
4644
4645                 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4646
4647                 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4648                                        &wlc_hw->band->phyrev,
4649                                        &wlc_hw->band->radioid,
4650                                        &wlc_hw->band->radiorev);
4651                 wlc_hw->band->abgphy_encore =
4652                     wlc_phy_get_encore(wlc_hw->band->pi);
4653                 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4654                 wlc_hw->band->core_flags =
4655                     wlc_phy_get_coreflags(wlc_hw->band->pi);
4656
4657                 /* verify good phy_type & supported phy revision */
4658                 if (BRCMS_ISNPHY(wlc_hw->band)) {
4659                         if (NCONF_HAS(wlc_hw->band->phyrev))
4660                                 goto good_phy;
4661                         else
4662                                 goto bad_phy;
4663                 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4664                         if (LCNCONF_HAS(wlc_hw->band->phyrev))
4665                                 goto good_phy;
4666                         else
4667                                 goto bad_phy;
4668                 } else {
4669  bad_phy:
4670                         wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4671                                   "phy type/rev (%d/%d)\n", unit,
4672                                   wlc_hw->band->phytype, wlc_hw->band->phyrev);
4673                         err = 18;
4674                         goto fail;
4675                 }
4676
4677  good_phy:
4678                 /*
4679                  * BMAC_NOTE: wlc->band->pi should not be set below and should
4680                  * be done in the high level attach. However we can not make
4681                  * that change until all low level access is changed to
4682                  * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4683                  * keeping wlc_hw->band->pi as well for incremental update of
4684                  * low level fns, and cut over low only init when all fns
4685                  * updated.
4686                  */
4687                 wlc->band->pi = wlc_hw->band->pi;
4688                 wlc->band->phytype = wlc_hw->band->phytype;
4689                 wlc->band->phyrev = wlc_hw->band->phyrev;
4690                 wlc->band->radioid = wlc_hw->band->radioid;
4691                 wlc->band->radiorev = wlc_hw->band->radiorev;
4692
4693                 /* default contention windows size limits */
4694                 wlc_hw->band->CWmin = APHY_CWMIN;
4695                 wlc_hw->band->CWmax = PHY_CWMAX;
4696
4697                 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4698                         err = 19;
4699                         goto fail;
4700                 }
4701         }
4702
4703         /* disable core to match driver "down" state */
4704         brcms_c_coredisable(wlc_hw);
4705
4706         /* Match driver "down" state */
4707         ai_pci_down(wlc_hw->sih);
4708
4709         /* register sb interrupt callback functions */
4710         ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff,
4711                                   (void *)brcms_c_wlintrsrestore, NULL, wlc);
4712
4713         /* turn off pll and xtal to match driver "down" state */
4714         brcms_b_xtal(wlc_hw, OFF);
4715
4716         /* *******************************************************************
4717          * The hardware is in the DOWN state at this point. D11 core
4718          * or cores are in reset with clocks off, and the board PLLs
4719          * are off if possible.
4720          *
4721          * Beyond this point, wlc->sbclk == false and chip registers
4722          * should not be touched.
4723          *********************************************************************
4724          */
4725
4726         /* init etheraddr state variables */
4727         macaddr = brcms_c_get_macaddr(wlc_hw);
4728         if (macaddr == NULL) {
4729                 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4730                           unit);
4731                 err = 21;
4732                 goto fail;
4733         }
4734         if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4735             is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4736             is_zero_ether_addr(wlc_hw->etheraddr)) {
4737                 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4738                           unit, macaddr);
4739                 err = 22;
4740                 goto fail;
4741         }
4742
4743         BCMMSG(wlc->wiphy,
4744                  "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4745                  wlc_hw->deviceid, wlc_hw->_nbands,
4746                  wlc_hw->sih->boardtype, macaddr);
4747
4748         return err;
4749
4750  fail:
4751         wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4752                   err);
4753         return err;
4754 }
4755
4756 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4757 {
4758         uint unit;
4759         unit = wlc->pub->unit;
4760
4761         if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4762                 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4763                 wlc->band->antgain = 8;
4764         } else if (wlc->band->antgain == -1) {
4765                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4766                           " srom, using 2dB\n", unit, __func__);
4767                 wlc->band->antgain = 8;
4768         } else {
4769                 s8 gain, fract;
4770                 /* Older sroms specified gain in whole dbm only.  In order
4771                  * be able to specify qdbm granularity and remain backward
4772                  * compatible the whole dbms are now encoded in only
4773                  * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4774                  * 6 bit signed number ranges from -32 - 31.
4775                  *
4776                  * Examples:
4777                  * 0x1 = 1 db,
4778                  * 0xc1 = 1.75 db (1 + 3 quarters),
4779                  * 0x3f = -1 (-1 + 0 quarters),
4780                  * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4781                  * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4782                  */
4783                 gain = wlc->band->antgain & 0x3f;
4784                 gain <<= 2;     /* Sign extend */
4785                 gain >>= 2;
4786                 fract = (wlc->band->antgain & 0xc0) >> 6;
4787                 wlc->band->antgain = 4 * gain + fract;
4788         }
4789 }
4790
4791 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4792 {
4793         int aa;
4794         uint unit;
4795         int bandtype;
4796         struct si_pub *sih = wlc->hw->sih;
4797
4798         unit = wlc->pub->unit;
4799         bandtype = wlc->band->bandtype;
4800
4801         /* get antennas available */
4802         if (bandtype == BRCM_BAND_5G)
4803                 aa = (s8) getintvar(sih, BRCMS_SROM_AA5G);
4804         else
4805                 aa = (s8) getintvar(sih, BRCMS_SROM_AA2G);
4806
4807         if ((aa < 1) || (aa > 15)) {
4808                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4809                           " srom (0x%x), using 3\n", unit, __func__, aa);
4810                 aa = 3;
4811         }
4812
4813         /* reset the defaults if we have a single antenna */
4814         if (aa == 1) {
4815                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4816                 wlc->stf->txant = ANT_TX_FORCE_0;
4817         } else if (aa == 2) {
4818                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4819                 wlc->stf->txant = ANT_TX_FORCE_1;
4820         } else {
4821         }
4822
4823         /* Compute Antenna Gain */
4824         if (bandtype == BRCM_BAND_5G)
4825                 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG1);
4826         else
4827                 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG0);
4828
4829         brcms_c_attach_antgain_init(wlc);
4830
4831         return true;
4832 }
4833
4834 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4835 {
4836         u16 chanspec;
4837         struct brcms_band *band;
4838         struct brcms_bss_info *bi = wlc->default_bss;
4839
4840         /* init default and target BSS with some sane initial values */
4841         memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4842         bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4843
4844         /* fill the default channel as the first valid channel
4845          * starting from the 2G channels
4846          */
4847         chanspec = ch20mhz_chspec(1);
4848         wlc->home_chanspec = bi->chanspec = chanspec;
4849
4850         /* find the band of our default channel */
4851         band = wlc->band;
4852         if (wlc->pub->_nbands > 1 &&
4853             band->bandunit != chspec_bandunit(chanspec))
4854                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4855
4856         /* init bss rates to the band specific default rate set */
4857         brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4858                 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4859                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4860                 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4861
4862         if (wlc->pub->_n_enab & SUPPORT_11N)
4863                 bi->flags |= BRCMS_BSS_HT;
4864 }
4865
4866 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
4867 {
4868         struct brcms_txq_info *qi, *p;
4869
4870         qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
4871         if (qi != NULL) {
4872                 /*
4873                  * Have enough room for control packets along with HI watermark
4874                  * Also, add room to txq for total psq packets if all the SCBs
4875                  * leave PS mode. The watermark for flowcontrol to OS packets
4876                  * will remain the same
4877                  */
4878                 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
4879                           2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
4880
4881                 /* add this queue to the the global list */
4882                 p = wlc->tx_queues;
4883                 if (p == NULL) {
4884                         wlc->tx_queues = qi;
4885                 } else {
4886                         while (p->next != NULL)
4887                                 p = p->next;
4888                         p->next = qi;
4889                 }
4890         }
4891         return qi;
4892 }
4893
4894 static void brcms_c_txq_free(struct brcms_c_info *wlc,
4895                              struct brcms_txq_info *qi)
4896 {
4897         struct brcms_txq_info *p;
4898
4899         if (qi == NULL)
4900                 return;
4901
4902         /* remove the queue from the linked list */
4903         p = wlc->tx_queues;
4904         if (p == qi)
4905                 wlc->tx_queues = p->next;
4906         else {
4907                 while (p != NULL && p->next != qi)
4908                         p = p->next;
4909                 if (p != NULL)
4910                         p->next = p->next->next;
4911         }
4912
4913         kfree(qi);
4914 }
4915
4916 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
4917 {
4918         uint i;
4919         struct brcms_band *band;
4920
4921         for (i = 0; i < wlc->pub->_nbands; i++) {
4922                 band = wlc->bandstate[i];
4923                 if (band->bandtype == BRCM_BAND_5G) {
4924                         if ((bwcap == BRCMS_N_BW_40ALL)
4925                             || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
4926                                 band->mimo_cap_40 = true;
4927                         else
4928                                 band->mimo_cap_40 = false;
4929                 } else {
4930                         if (bwcap == BRCMS_N_BW_40ALL)
4931                                 band->mimo_cap_40 = true;
4932                         else
4933                                 band->mimo_cap_40 = false;
4934                 }
4935         }
4936 }
4937
4938 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
4939 {
4940         /* free timer state */
4941         if (wlc->wdtimer) {
4942                 brcms_free_timer(wlc->wdtimer);
4943                 wlc->wdtimer = NULL;
4944         }
4945         if (wlc->radio_timer) {
4946                 brcms_free_timer(wlc->radio_timer);
4947                 wlc->radio_timer = NULL;
4948         }
4949 }
4950
4951 static void brcms_c_detach_module(struct brcms_c_info *wlc)
4952 {
4953         if (wlc->asi) {
4954                 brcms_c_antsel_detach(wlc->asi);
4955                 wlc->asi = NULL;
4956         }
4957
4958         if (wlc->ampdu) {
4959                 brcms_c_ampdu_detach(wlc->ampdu);
4960                 wlc->ampdu = NULL;
4961         }
4962
4963         brcms_c_stf_detach(wlc);
4964 }
4965
4966 /*
4967  * low level detach
4968  */
4969 static int brcms_b_detach(struct brcms_c_info *wlc)
4970 {
4971         uint i;
4972         struct brcms_hw_band *band;
4973         struct brcms_hardware *wlc_hw = wlc->hw;
4974         int callbacks;
4975
4976         callbacks = 0;
4977
4978         if (wlc_hw->sih) {
4979                 /*
4980                  * detach interrupt sync mechanism since interrupt is disabled
4981                  * and per-port interrupt object may has been freed. this must
4982                  * be done before sb core switch
4983                  */
4984                 ai_deregister_intr_callback(wlc_hw->sih);
4985                 ai_pci_sleep(wlc_hw->sih);
4986         }
4987
4988         brcms_b_detach_dmapio(wlc_hw);
4989
4990         band = wlc_hw->band;
4991         for (i = 0; i < wlc_hw->_nbands; i++) {
4992                 if (band->pi) {
4993                         /* Detach this band's phy */
4994                         wlc_phy_detach(band->pi);
4995                         band->pi = NULL;
4996                 }
4997                 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
4998         }
4999
5000         /* Free shared phy state */
5001         kfree(wlc_hw->phy_sh);
5002
5003         wlc_phy_shim_detach(wlc_hw->physhim);
5004
5005         if (wlc_hw->sih) {
5006                 ai_detach(wlc_hw->sih);
5007                 wlc_hw->sih = NULL;
5008         }
5009
5010         return callbacks;
5011
5012 }
5013
5014 /*
5015  * Return a count of the number of driver callbacks still pending.
5016  *
5017  * General policy is that brcms_c_detach can only dealloc/free software states.
5018  * It can NOT touch hardware registers since the d11core may be in reset and
5019  * clock may not be available.
5020  * One exception is sb register access, which is possible if crystal is turned
5021  * on after "down" state, driver should avoid software timer with the exception
5022  * of radio_monitor.
5023  */
5024 uint brcms_c_detach(struct brcms_c_info *wlc)
5025 {
5026         uint callbacks = 0;
5027
5028         if (wlc == NULL)
5029                 return 0;
5030
5031         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5032
5033         callbacks += brcms_b_detach(wlc);
5034
5035         /* delete software timers */
5036         if (!brcms_c_radio_monitor_stop(wlc))
5037                 callbacks++;
5038
5039         brcms_c_channel_mgr_detach(wlc->cmi);
5040
5041         brcms_c_timers_deinit(wlc);
5042
5043         brcms_c_detach_module(wlc);
5044
5045
5046         while (wlc->tx_queues != NULL)
5047                 brcms_c_txq_free(wlc, wlc->tx_queues);
5048
5049         brcms_c_detach_mfree(wlc);
5050         return callbacks;
5051 }
5052
5053 /* update state that depends on the current value of "ap" */
5054 static void brcms_c_ap_upd(struct brcms_c_info *wlc)
5055 {
5056         /* STA-BSS; short capable */
5057         wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5058 }
5059
5060 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5061 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5062 {
5063         if (wlc_hw->wlc->pub->hw_up)
5064                 return;
5065
5066         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5067
5068         /*
5069          * Enable pll and xtal, initialize the power control registers,
5070          * and force fastclock for the remainder of brcms_c_up().
5071          */
5072         brcms_b_xtal(wlc_hw, ON);
5073         ai_clkctl_init(wlc_hw->sih);
5074         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5075
5076         ai_pci_fixcfg(wlc_hw->sih);
5077
5078         /*
5079          * AI chip doesn't restore bar0win2 on
5080          * hibernation/resume, need sw fixup
5081          */
5082         if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
5083             (wlc_hw->sih->chip == BCM43225_CHIP_ID))
5084                 wlc_hw->regs = (struct d11regs __iomem *)
5085                                 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
5086
5087         /*
5088          * Inform phy that a POR reset has occurred so
5089          * it does a complete phy init
5090          */
5091         wlc_phy_por_inform(wlc_hw->band->pi);
5092
5093         wlc_hw->ucode_loaded = false;
5094         wlc_hw->wlc->pub->hw_up = true;
5095
5096         if ((wlc_hw->boardflags & BFL_FEM)
5097             && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
5098                 if (!
5099                     (wlc_hw->boardrev >= 0x1250
5100                      && (wlc_hw->boardflags & BFL_FEM_BT)))
5101                         ai_epa_4313war(wlc_hw->sih);
5102         }
5103 }
5104
5105 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5106 {
5107         uint coremask;
5108
5109         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5110
5111         /*
5112          * Enable pll and xtal, initialize the power control registers,
5113          * and force fastclock for the remainder of brcms_c_up().
5114          */
5115         brcms_b_xtal(wlc_hw, ON);
5116         ai_clkctl_init(wlc_hw->sih);
5117         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5118
5119         /*
5120          * Configure pci/pcmcia here instead of in brcms_c_attach()
5121          * to allow mfg hotswap:  down, hotswap (chip power cycle), up.
5122          */
5123         coremask = (1 << wlc_hw->wlc->core->coreidx);
5124
5125         ai_pci_setup(wlc_hw->sih, coremask);
5126
5127         /*
5128          * Need to read the hwradio status here to cover the case where the
5129          * system is loaded with the hw radio disabled. We do not want to
5130          * bring the driver up in this case.
5131          */
5132         if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5133                 /* put SB PCI in down state again */
5134                 ai_pci_down(wlc_hw->sih);
5135                 brcms_b_xtal(wlc_hw, OFF);
5136                 return -ENOMEDIUM;
5137         }
5138
5139         ai_pci_up(wlc_hw->sih);
5140
5141         /* reset the d11 core */
5142         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5143
5144         return 0;
5145 }
5146
5147 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5148 {
5149         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5150
5151         wlc_hw->up = true;
5152         wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5153
5154         /* FULLY enable dynamic power control and d11 core interrupt */
5155         brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5156         brcms_intrson(wlc_hw->wlc->wl);
5157         return 0;
5158 }
5159
5160 /*
5161  * Write WME tunable parameters for retransmit/max rate
5162  * from wlc struct to ucode
5163  */
5164 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5165 {
5166         int ac;
5167
5168         /* Need clock to do this */
5169         if (!wlc->clk)
5170                 return;
5171
5172         for (ac = 0; ac < AC_COUNT; ac++)
5173                 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5174                                   wlc->wme_retries[ac]);
5175 }
5176
5177 /* make interface operational */
5178 int brcms_c_up(struct brcms_c_info *wlc)
5179 {
5180         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5181
5182         /* HW is turned off so don't try to access it */
5183         if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5184                 return -ENOMEDIUM;
5185
5186         if (!wlc->pub->hw_up) {
5187                 brcms_b_hw_up(wlc->hw);
5188                 wlc->pub->hw_up = true;
5189         }
5190
5191         if ((wlc->pub->boardflags & BFL_FEM)
5192             && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) {
5193                 if (wlc->pub->boardrev >= 0x1250
5194                     && (wlc->pub->boardflags & BFL_FEM_BT))
5195                         brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5196                                 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5197                 else
5198                         brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5199                                     MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5200         }
5201
5202         /*
5203          * Need to read the hwradio status here to cover the case where the
5204          * system is loaded with the hw radio disabled. We do not want to bring
5205          * the driver up in this case. If radio is disabled, abort up, lower
5206          * power, start radio timer and return 0(for NDIS) don't call
5207          * radio_update to avoid looping brcms_c_up.
5208          *
5209          * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5210          */
5211         if (!wlc->pub->radio_disabled) {
5212                 int status = brcms_b_up_prep(wlc->hw);
5213                 if (status == -ENOMEDIUM) {
5214                         if (!mboolisset
5215                             (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5216                                 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5217                                 mboolset(wlc->pub->radio_disabled,
5218                                          WL_RADIO_HW_DISABLE);
5219
5220                                 if (bsscfg->enable && bsscfg->BSS)
5221                                         wiphy_err(wlc->wiphy, "wl%d: up"
5222                                                   ": rfdisable -> "
5223                                                   "bsscfg_disable()\n",
5224                                                    wlc->pub->unit);
5225                         }
5226                 }
5227         }
5228
5229         if (wlc->pub->radio_disabled) {
5230                 brcms_c_radio_monitor_start(wlc);
5231                 return 0;
5232         }
5233
5234         /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5235         wlc->clk = true;
5236
5237         brcms_c_radio_monitor_stop(wlc);
5238
5239         /* Set EDCF hostflags */
5240         brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5241
5242         brcms_init(wlc->wl);
5243         wlc->pub->up = true;
5244
5245         if (wlc->bandinit_pending) {
5246                 brcms_c_suspend_mac_and_wait(wlc);
5247                 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5248                 wlc->bandinit_pending = false;
5249                 brcms_c_enable_mac(wlc);
5250         }
5251
5252         brcms_b_up_finish(wlc->hw);
5253
5254         /* Program the TX wme params with the current settings */
5255         brcms_c_wme_retries_write(wlc);
5256
5257         /* start one second watchdog timer */
5258         brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5259         wlc->WDarmed = true;
5260
5261         /* ensure antenna config is up to date */
5262         brcms_c_stf_phy_txant_upd(wlc);
5263         /* ensure LDPC config is in sync */
5264         brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5265
5266         return 0;
5267 }
5268
5269 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5270 {
5271         uint callbacks = 0;
5272
5273         return callbacks;
5274 }
5275
5276 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5277 {
5278         bool dev_gone;
5279         uint callbacks = 0;
5280
5281         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5282
5283         if (!wlc_hw->up)
5284                 return callbacks;
5285
5286         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5287
5288         /* disable interrupts */
5289         if (dev_gone)
5290                 wlc_hw->wlc->macintmask = 0;
5291         else {
5292                 /* now disable interrupts */
5293                 brcms_intrsoff(wlc_hw->wlc->wl);
5294
5295                 /* ensure we're running on the pll clock again */
5296                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5297         }
5298         /* down phy at the last of this stage */
5299         callbacks += wlc_phy_down(wlc_hw->band->pi);
5300
5301         return callbacks;
5302 }
5303
5304 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5305 {
5306         uint callbacks = 0;
5307         bool dev_gone;
5308
5309         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5310
5311         if (!wlc_hw->up)
5312                 return callbacks;
5313
5314         wlc_hw->up = false;
5315         wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5316
5317         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5318
5319         if (dev_gone) {
5320                 wlc_hw->sbclk = false;
5321                 wlc_hw->clk = false;
5322                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5323
5324                 /* reclaim any posted packets */
5325                 brcms_c_flushqueues(wlc_hw->wlc);
5326         } else {
5327
5328                 /* Reset and disable the core */
5329                 if (ai_iscoreup(wlc_hw->sih)) {
5330                         if (R_REG(&wlc_hw->regs->maccontrol) &
5331                             MCTL_EN_MAC)
5332                                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5333                         callbacks += brcms_reset(wlc_hw->wlc->wl);
5334                         brcms_c_coredisable(wlc_hw);
5335                 }
5336
5337                 /* turn off primary xtal and pll */
5338                 if (!wlc_hw->noreset) {
5339                         ai_pci_down(wlc_hw->sih);
5340                         brcms_b_xtal(wlc_hw, OFF);
5341                 }
5342         }
5343
5344         return callbacks;
5345 }
5346
5347 /*
5348  * Mark the interface nonoperational, stop the software mechanisms,
5349  * disable the hardware, free any transient buffer state.
5350  * Return a count of the number of driver callbacks still pending.
5351  */
5352 uint brcms_c_down(struct brcms_c_info *wlc)
5353 {
5354
5355         uint callbacks = 0;
5356         int i;
5357         bool dev_gone = false;
5358         struct brcms_txq_info *qi;
5359
5360         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5361
5362         /* check if we are already in the going down path */
5363         if (wlc->going_down) {
5364                 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5365                           "\n", wlc->pub->unit, __func__);
5366                 return 0;
5367         }
5368         if (!wlc->pub->up)
5369                 return callbacks;
5370
5371         wlc->going_down = true;
5372
5373         callbacks += brcms_b_bmac_down_prep(wlc->hw);
5374
5375         dev_gone = brcms_deviceremoved(wlc);
5376
5377         /* Call any registered down handlers */
5378         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5379                 if (wlc->modulecb[i].down_fn)
5380                         callbacks +=
5381                             wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5382         }
5383
5384         /* cancel the watchdog timer */
5385         if (wlc->WDarmed) {
5386                 if (!brcms_del_timer(wlc->wdtimer))
5387                         callbacks++;
5388                 wlc->WDarmed = false;
5389         }
5390         /* cancel all other timers */
5391         callbacks += brcms_c_down_del_timer(wlc);
5392
5393         wlc->pub->up = false;
5394
5395         wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5396
5397         /* clear txq flow control */
5398         brcms_c_txflowcontrol_reset(wlc);
5399
5400         /* flush tx queues */
5401         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5402                 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5403
5404         callbacks += brcms_b_down_finish(wlc->hw);
5405
5406         /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5407         wlc->clk = false;
5408
5409         wlc->going_down = false;
5410         return callbacks;
5411 }
5412
5413 /* Set the current gmode configuration */
5414 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5415 {
5416         int ret = 0;
5417         uint i;
5418         struct brcms_c_rateset rs;
5419         /* Default to 54g Auto */
5420         /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5421         s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5422         bool shortslot_restrict = false; /* Restrict association to stations
5423                                           * that support shortslot
5424                                           */
5425         bool ofdm_basic = false;        /* Make 6, 12, and 24 basic rates */
5426         /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5427         int preamble = BRCMS_PLCP_LONG;
5428         bool preamble_restrict = false; /* Restrict association to stations
5429                                          * that support short preambles
5430                                          */
5431         struct brcms_band *band;
5432
5433         /* if N-support is enabled, allow Gmode set as long as requested
5434          * Gmode is not GMODE_LEGACY_B
5435          */
5436         if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5437                 return -ENOTSUPP;
5438
5439         /* verify that we are dealing with 2G band and grab the band pointer */
5440         if (wlc->band->bandtype == BRCM_BAND_2G)
5441                 band = wlc->band;
5442         else if ((wlc->pub->_nbands > 1) &&
5443                  (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5444                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5445         else
5446                 return -EINVAL;
5447
5448         /* Legacy or bust when no OFDM is supported by regulatory */
5449         if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5450              BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5451                 return -EINVAL;
5452
5453         /* update configuration value */
5454         if (config == true)
5455                 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5456
5457         /* Clear rateset override */
5458         memset(&rs, 0, sizeof(struct brcms_c_rateset));
5459
5460         switch (gmode) {
5461         case GMODE_LEGACY_B:
5462                 shortslot = BRCMS_SHORTSLOT_OFF;
5463                 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5464
5465                 break;
5466
5467         case GMODE_LRS:
5468                 break;
5469
5470         case GMODE_AUTO:
5471                 /* Accept defaults */
5472                 break;
5473
5474         case GMODE_ONLY:
5475                 ofdm_basic = true;
5476                 preamble = BRCMS_PLCP_SHORT;
5477                 preamble_restrict = true;
5478                 break;
5479
5480         case GMODE_PERFORMANCE:
5481                 shortslot = BRCMS_SHORTSLOT_ON;
5482                 shortslot_restrict = true;
5483                 ofdm_basic = true;
5484                 preamble = BRCMS_PLCP_SHORT;
5485                 preamble_restrict = true;
5486                 break;
5487
5488         default:
5489                 /* Error */
5490                 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5491                           wlc->pub->unit, __func__, gmode);
5492                 return -ENOTSUPP;
5493         }
5494
5495         band->gmode = gmode;
5496
5497         wlc->shortslot_override = shortslot;
5498
5499         /* Use the default 11g rateset */
5500         if (!rs.count)
5501                 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5502
5503         if (ofdm_basic) {
5504                 for (i = 0; i < rs.count; i++) {
5505                         if (rs.rates[i] == BRCM_RATE_6M
5506                             || rs.rates[i] == BRCM_RATE_12M
5507                             || rs.rates[i] == BRCM_RATE_24M)
5508                                 rs.rates[i] |= BRCMS_RATE_FLAG;
5509                 }
5510         }
5511
5512         /* Set default bss rateset */
5513         wlc->default_bss->rateset.count = rs.count;
5514         memcpy(wlc->default_bss->rateset.rates, rs.rates,
5515                sizeof(wlc->default_bss->rateset.rates));
5516
5517         return ret;
5518 }
5519
5520 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5521 {
5522         uint i;
5523         s32 nmode = AUTO;
5524
5525         if (wlc->stf->txstreams == WL_11N_3x3)
5526                 nmode = WL_11N_3x3;
5527         else
5528                 nmode = WL_11N_2x2;
5529
5530         /* force GMODE_AUTO if NMODE is ON */
5531         brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5532         if (nmode == WL_11N_3x3)
5533                 wlc->pub->_n_enab = SUPPORT_HT;
5534         else
5535                 wlc->pub->_n_enab = SUPPORT_11N;
5536         wlc->default_bss->flags |= BRCMS_BSS_HT;
5537         /* add the mcs rates to the default and hw ratesets */
5538         brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5539                               wlc->stf->txstreams);
5540         for (i = 0; i < wlc->pub->_nbands; i++)
5541                 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5542                        wlc->default_bss->rateset.mcs, MCSSET_LEN);
5543
5544         return 0;
5545 }
5546
5547 static int
5548 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5549                              struct brcms_c_rateset *rs_arg)
5550 {
5551         struct brcms_c_rateset rs, new;
5552         uint bandunit;
5553
5554         memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5555
5556         /* check for bad count value */
5557         if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5558                 return -EINVAL;
5559
5560         /* try the current band */
5561         bandunit = wlc->band->bandunit;
5562         memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5563         if (brcms_c_rate_hwrs_filter_sort_validate
5564             (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5565              wlc->stf->txstreams))
5566                 goto good;
5567
5568         /* try the other band */
5569         if (brcms_is_mband_unlocked(wlc)) {
5570                 bandunit = OTHERBANDUNIT(wlc);
5571                 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5572                 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5573                                                        &wlc->
5574                                                        bandstate[bandunit]->
5575                                                        hw_rateset, true,
5576                                                        wlc->stf->txstreams))
5577                         goto good;
5578         }
5579
5580         return -EBADE;
5581
5582  good:
5583         /* apply new rateset */
5584         memcpy(&wlc->default_bss->rateset, &new,
5585                sizeof(struct brcms_c_rateset));
5586         memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5587                sizeof(struct brcms_c_rateset));
5588         return 0;
5589 }
5590
5591 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5592 {
5593         u8 r;
5594         bool war = false;
5595
5596         if (wlc->bsscfg->associated)
5597                 r = wlc->bsscfg->current_bss->rateset.rates[0];
5598         else
5599                 r = wlc->default_bss->rateset.rates[0];
5600
5601         wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5602 }
5603
5604 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5605 {
5606         u16 chspec = ch20mhz_chspec(channel);
5607
5608         if (channel < 0 || channel > MAXCHANNEL)
5609                 return -EINVAL;
5610
5611         if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5612                 return -EINVAL;
5613
5614
5615         if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5616                 if (wlc->band->bandunit != chspec_bandunit(chspec))
5617                         wlc->bandinit_pending = true;
5618                 else
5619                         wlc->bandinit_pending = false;
5620         }
5621
5622         wlc->default_bss->chanspec = chspec;
5623         /* brcms_c_BSSinit() will sanitize the rateset before
5624          * using it.. */
5625         if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5626                 brcms_c_set_home_chanspec(wlc, chspec);
5627                 brcms_c_suspend_mac_and_wait(wlc);
5628                 brcms_c_set_chanspec(wlc, chspec);
5629                 brcms_c_enable_mac(wlc);
5630         }
5631         return 0;
5632 }
5633
5634 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5635 {
5636         int ac;
5637
5638         if (srl < 1 || srl > RETRY_SHORT_MAX ||
5639             lrl < 1 || lrl > RETRY_SHORT_MAX)
5640                 return -EINVAL;
5641
5642         wlc->SRL = srl;
5643         wlc->LRL = lrl;
5644
5645         brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5646
5647         for (ac = 0; ac < AC_COUNT; ac++) {
5648                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5649                                                EDCF_SHORT,  wlc->SRL);
5650                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5651                                                EDCF_LONG, wlc->LRL);
5652         }
5653         brcms_c_wme_retries_write(wlc);
5654
5655         return 0;
5656 }
5657
5658 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
5659                                  struct brcm_rateset *currs)
5660 {
5661         struct brcms_c_rateset *rs;
5662
5663         if (wlc->pub->associated)
5664                 rs = &wlc->bsscfg->current_bss->rateset;
5665         else
5666                 rs = &wlc->default_bss->rateset;
5667
5668         /* Copy only legacy rateset section */
5669         currs->count = rs->count;
5670         memcpy(&currs->rates, &rs->rates, rs->count);
5671 }
5672
5673 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
5674 {
5675         struct brcms_c_rateset internal_rs;
5676         int bcmerror;
5677
5678         if (rs->count > BRCMS_NUMRATES)
5679                 return -ENOBUFS;
5680
5681         memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
5682
5683         /* Copy only legacy rateset section */
5684         internal_rs.count = rs->count;
5685         memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5686
5687         /* merge rateset coming in with the current mcsset */
5688         if (wlc->pub->_n_enab & SUPPORT_11N) {
5689                 struct brcms_bss_info *mcsset_bss;
5690                 if (wlc->bsscfg->associated)
5691                         mcsset_bss = wlc->bsscfg->current_bss;
5692                 else
5693                         mcsset_bss = wlc->default_bss;
5694                 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5695                        MCSSET_LEN);
5696         }
5697
5698         bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
5699         if (!bcmerror)
5700                 brcms_c_ofdm_rateset_war(wlc);
5701
5702         return bcmerror;
5703 }
5704
5705 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
5706 {
5707         if (period < DOT11_MIN_BEACON_PERIOD ||
5708             period > DOT11_MAX_BEACON_PERIOD)
5709                 return -EINVAL;
5710
5711         wlc->default_bss->beacon_period = period;
5712         return 0;
5713 }
5714
5715 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
5716 {
5717         return wlc->band->phytype;
5718 }
5719
5720 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
5721 {
5722         wlc->shortslot_override = sslot_override;
5723
5724         /*
5725          * shortslot is an 11g feature, so no more work if we are
5726          * currently on the 5G band
5727          */
5728         if (wlc->band->bandtype == BRCM_BAND_5G)
5729                 return;
5730
5731         if (wlc->pub->up && wlc->pub->associated) {
5732                 /* let watchdog or beacon processing update shortslot */
5733         } else if (wlc->pub->up) {
5734                 /* unassociated shortslot is off */
5735                 brcms_c_switch_shortslot(wlc, false);
5736         } else {
5737                 /* driver is down, so just update the brcms_c_info
5738                  * value */
5739                 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5740                         wlc->shortslot = false;
5741                 else
5742                         wlc->shortslot =
5743                             (wlc->shortslot_override ==
5744                              BRCMS_SHORTSLOT_ON);
5745         }
5746 }
5747
5748 /*
5749  * register watchdog and down handlers.
5750  */
5751 int brcms_c_module_register(struct brcms_pub *pub,
5752                             const char *name, struct brcms_info *hdl,
5753                             int (*d_fn)(void *handle))
5754 {
5755         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5756         int i;
5757
5758         /* find an empty entry and just add, no duplication check! */
5759         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5760                 if (wlc->modulecb[i].name[0] == '\0') {
5761                         strncpy(wlc->modulecb[i].name, name,
5762                                 sizeof(wlc->modulecb[i].name) - 1);
5763                         wlc->modulecb[i].hdl = hdl;
5764                         wlc->modulecb[i].down_fn = d_fn;
5765                         return 0;
5766                 }
5767         }
5768
5769         return -ENOSR;
5770 }
5771
5772 /* unregister module callbacks */
5773 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
5774                               struct brcms_info *hdl)
5775 {
5776         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5777         int i;
5778
5779         if (wlc == NULL)
5780                 return -ENODATA;
5781
5782         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5783                 if (!strcmp(wlc->modulecb[i].name, name) &&
5784                     (wlc->modulecb[i].hdl == hdl)) {
5785                         memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
5786                         return 0;
5787                 }
5788         }
5789
5790         /* table not found! */
5791         return -ENODATA;
5792 }
5793
5794 #ifdef BCMDBG
5795 static const char * const supr_reason[] = {
5796         "None", "PMQ Entry", "Flush request",
5797         "Previous frag failure", "Channel mismatch",
5798         "Lifetime Expiry", "Underflow"
5799 };
5800
5801 static void brcms_c_print_txs_status(u16 s)
5802 {
5803         printk(KERN_DEBUG "[15:12]  %d  frame attempts\n",
5804                (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT);
5805         printk(KERN_DEBUG " [11:8]  %d  rts attempts\n",
5806                (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT);
5807         printk(KERN_DEBUG "    [7]  %d  PM mode indicated\n",
5808                ((s & TX_STATUS_PMINDCTD) ? 1 : 0));
5809         printk(KERN_DEBUG "    [6]  %d  intermediate status\n",
5810                ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0));
5811         printk(KERN_DEBUG "    [5]  %d  AMPDU\n",
5812                (s & TX_STATUS_AMPDU) ? 1 : 0);
5813         printk(KERN_DEBUG "  [4:2]  %d  Frame Suppressed Reason (%s)\n",
5814                ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT),
5815                supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]);
5816         printk(KERN_DEBUG "    [1]  %d  acked\n",
5817                ((s & TX_STATUS_ACK_RCV) ? 1 : 0));
5818 }
5819 #endif                          /* BCMDBG */
5820
5821 void brcms_c_print_txstatus(struct tx_status *txs)
5822 {
5823 #if defined(BCMDBG)
5824         u16 s = txs->status;
5825         u16 ackphyrxsh = txs->ackphyrxsh;
5826
5827         printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n");
5828
5829         printk(KERN_DEBUG "FrameID: %04x   ", txs->frameid);
5830         printk(KERN_DEBUG "TxStatus: %04x", s);
5831         printk(KERN_DEBUG "\n");
5832
5833         brcms_c_print_txs_status(s);
5834
5835         printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime);
5836         printk(KERN_DEBUG "Seq: %04x ", txs->sequence);
5837         printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr);
5838         printk(KERN_DEBUG "RxAckRSSI: %04x ",
5839                (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT);
5840         printk(KERN_DEBUG "RxAckSQ: %04x",
5841                (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
5842         printk(KERN_DEBUG "\n");
5843 #endif                          /* defined(BCMDBG) */
5844 }
5845
5846 bool brcms_c_chipmatch(u16 vendor, u16 device)
5847 {
5848         if (vendor != PCI_VENDOR_ID_BROADCOM) {
5849                 pr_err("chipmatch: unknown vendor id %04x\n", vendor);
5850                 return false;
5851         }
5852
5853         if (device == BCM43224_D11N_ID_VEN1)
5854                 return true;
5855         if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
5856                 return true;
5857         if (device == BCM4313_D11N2G_ID)
5858                 return true;
5859         if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
5860                 return true;
5861
5862         pr_err("chipmatch: unknown device id %04x\n", device);
5863         return false;
5864 }
5865
5866 #if defined(BCMDBG)
5867 void brcms_c_print_txdesc(struct d11txh *txh)
5868 {
5869         u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
5870         u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
5871         u16 mfc = le16_to_cpu(txh->MacFrameControl);
5872         u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
5873         u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
5874         u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
5875         u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
5876         u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
5877         u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
5878         u16 mainrates = le16_to_cpu(txh->MainRates);
5879         u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
5880         u8 *iv = txh->IV;
5881         u8 *ra = txh->TxFrameRA;
5882         u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
5883         u8 *rtspfb = txh->RTSPLCPFallback;
5884         u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
5885         u8 *fragpfb = txh->FragPLCPFallback;
5886         u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
5887         u16 mmodelen = le16_to_cpu(txh->MModeLen);
5888         u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
5889         u16 tfid = le16_to_cpu(txh->TxFrameID);
5890         u16 txs = le16_to_cpu(txh->TxStatus);
5891         u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
5892         u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
5893         u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
5894         u16 mmbyte = le16_to_cpu(txh->MinMBytes);
5895
5896         u8 *rtsph = txh->RTSPhyHeader;
5897         struct ieee80211_rts rts = txh->rts_frame;
5898
5899         /* add plcp header along with txh descriptor */
5900         printk(KERN_DEBUG "Raw TxDesc + plcp header:\n");
5901         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
5902                              txh, sizeof(struct d11txh) + 48);
5903
5904         printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl);
5905         printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch);
5906         printk(KERN_DEBUG "FC: %04x ", mfc);
5907         printk(KERN_DEBUG "FES Time: %04x\n", tfest);
5908         printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw,
5909                (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
5910         printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1);
5911         printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
5912         printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
5913         printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
5914         printk(KERN_DEBUG "MainRates: %04x ", mainrates);
5915         printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
5916         printk(KERN_DEBUG "\n");
5917
5918         print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET, iv, sizeof(txh->IV));
5919         print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET,
5920                              ra, sizeof(txh->TxFrameRA));
5921
5922         printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
5923         print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET,
5924                              rtspfb, sizeof(txh->RTSPLCPFallback));
5925         printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
5926         print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET,
5927                              fragpfb, sizeof(txh->FragPLCPFallback));
5928         printk(KERN_DEBUG "DUR: %04x", fragdfb);
5929         printk(KERN_DEBUG "\n");
5930
5931         printk(KERN_DEBUG "MModeLen: %04x ", mmodelen);
5932         printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen);
5933
5934         printk(KERN_DEBUG "FrameID:     %04x\n", tfid);
5935         printk(KERN_DEBUG "TxStatus:    %04x\n", txs);
5936
5937         printk(KERN_DEBUG "MaxNumMpdu:  %04x\n", mnmpdu);
5938         printk(KERN_DEBUG "MaxAggbyte:  %04x\n", mabyte);
5939         printk(KERN_DEBUG "MaxAggbyte_fb:  %04x\n", mabyte_f);
5940         printk(KERN_DEBUG "MinByte:     %04x\n", mmbyte);
5941
5942         print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET,
5943                              rtsph, sizeof(txh->RTSPhyHeader));
5944         print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET,
5945                              (u8 *)&rts, sizeof(txh->rts_frame));
5946         printk(KERN_DEBUG "\n");
5947 }
5948 #endif                          /* defined(BCMDBG) */
5949
5950 #if defined(BCMDBG)
5951 static int
5952 brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf,
5953                      int len)
5954 {
5955         int i;
5956         char *p = buf;
5957         char hexstr[16];
5958         int slen = 0, nlen = 0;
5959         u32 bit;
5960         const char *name;
5961
5962         if (len < 2 || !buf)
5963                 return 0;
5964
5965         buf[0] = '\0';
5966
5967         for (i = 0; flags != 0; i++) {
5968                 bit = bd[i].bit;
5969                 name = bd[i].name;
5970                 if (bit == 0 && flags != 0) {
5971                         /* print any unnamed bits */
5972                         snprintf(hexstr, 16, "0x%X", flags);
5973                         name = hexstr;
5974                         flags = 0;      /* exit loop */
5975                 } else if ((flags & bit) == 0)
5976                         continue;
5977                 flags &= ~bit;
5978                 nlen = strlen(name);
5979                 slen += nlen;
5980                 /* count btwn flag space */
5981                 if (flags != 0)
5982                         slen += 1;
5983                 /* need NULL char as well */
5984                 if (len <= slen)
5985                         break;
5986                 /* copy NULL char but don't count it */
5987                 strncpy(p, name, nlen + 1);
5988                 p += nlen;
5989                 /* copy btwn flag space and NULL char */
5990                 if (flags != 0)
5991                         p += snprintf(p, 2, " ");
5992                 len -= slen;
5993         }
5994
5995         /* indicate the str was too short */
5996         if (flags != 0) {
5997                 if (len < 2)
5998                         p -= 2 - len;   /* overwrite last char */
5999                 p += snprintf(p, 2, ">");
6000         }
6001
6002         return (int)(p - buf);
6003 }
6004 #endif                          /* defined(BCMDBG) */
6005
6006 #if defined(BCMDBG)
6007 void brcms_c_print_rxh(struct d11rxhdr *rxh)
6008 {
6009         u16 len = rxh->RxFrameSize;
6010         u16 phystatus_0 = rxh->PhyRxStatus_0;
6011         u16 phystatus_1 = rxh->PhyRxStatus_1;
6012         u16 phystatus_2 = rxh->PhyRxStatus_2;
6013         u16 phystatus_3 = rxh->PhyRxStatus_3;
6014         u16 macstatus1 = rxh->RxStatus1;
6015         u16 macstatus2 = rxh->RxStatus2;
6016         char flagstr[64];
6017         char lenbuf[20];
6018         static const struct brcms_c_bit_desc macstat_flags[] = {
6019                 {RXS_FCSERR, "FCSErr"},
6020                 {RXS_RESPFRAMETX, "Reply"},
6021                 {RXS_PBPRES, "PADDING"},
6022                 {RXS_DECATMPT, "DeCr"},
6023                 {RXS_DECERR, "DeCrErr"},
6024                 {RXS_BCNSENT, "Bcn"},
6025                 {0, NULL}
6026         };
6027
6028         printk(KERN_DEBUG "Raw RxDesc:\n");
6029         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh,
6030                              sizeof(struct d11rxhdr));
6031
6032         brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64);
6033
6034         snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
6035
6036         printk(KERN_DEBUG "RxFrameSize:     %6s (%d)%s\n", lenbuf, len,
6037                (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
6038         printk(KERN_DEBUG "RxPHYStatus:     %04x %04x %04x %04x\n",
6039                phystatus_0, phystatus_1, phystatus_2, phystatus_3);
6040         printk(KERN_DEBUG "RxMACStatus:     %x %s\n", macstatus1, flagstr);
6041         printk(KERN_DEBUG "RXMACaggtype:    %x\n",
6042                (macstatus2 & RXS_AGGTYPE_MASK));
6043         printk(KERN_DEBUG "RxTSFTime:       %04x\n", rxh->RxTSFTime);
6044 }
6045 #endif                          /* defined(BCMDBG) */
6046
6047 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6048 {
6049         u16 table_ptr;
6050         u8 phy_rate, index;
6051
6052         /* get the phy specific rate encoding for the PLCP SIGNAL field */
6053         if (is_ofdm_rate(rate))
6054                 table_ptr = M_RT_DIRMAP_A;
6055         else
6056                 table_ptr = M_RT_DIRMAP_B;
6057
6058         /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6059          * the index into the rate table.
6060          */
6061         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6062         index = phy_rate & 0xf;
6063
6064         /* Find the SHM pointer to the rate table entry by looking in the
6065          * Direct-map Table
6066          */
6067         return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6068 }
6069
6070 static bool
6071 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6072                       struct sk_buff *pkt, int prec, bool head)
6073 {
6074         struct sk_buff *p;
6075         int eprec = -1;         /* precedence to evict from */
6076
6077         /* Determine precedence from which to evict packet, if any */
6078         if (pktq_pfull(q, prec))
6079                 eprec = prec;
6080         else if (pktq_full(q)) {
6081                 p = brcmu_pktq_peek_tail(q, &eprec);
6082                 if (eprec > prec) {
6083                         wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6084                                   "\n", __func__, eprec, prec);
6085                         return false;
6086                 }
6087         }
6088
6089         /* Evict if needed */
6090         if (eprec >= 0) {
6091                 bool discard_oldest;
6092
6093                 discard_oldest = ac_bitmap_tst(0, eprec);
6094
6095                 /* Refuse newer packet unless configured to discard oldest */
6096                 if (eprec == prec && !discard_oldest) {
6097                         wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6098                                   "\n", __func__, prec);
6099                         return false;
6100                 }
6101
6102                 /* Evict packet according to discard policy */
6103                 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6104                         brcmu_pktq_pdeq_tail(q, eprec);
6105                 brcmu_pkt_buf_free_skb(p);
6106         }
6107
6108         /* Enqueue */
6109         if (head)
6110                 p = brcmu_pktq_penq_head(q, prec, pkt);
6111         else
6112                 p = brcmu_pktq_penq(q, prec, pkt);
6113
6114         return true;
6115 }
6116
6117 /*
6118  * Attempts to queue a packet onto a multiple-precedence queue,
6119  * if necessary evicting a lower precedence packet from the queue.
6120  *
6121  * 'prec' is the precedence number that has already been mapped
6122  * from the packet priority.
6123  *
6124  * Returns true if packet consumed (queued), false if not.
6125  */
6126 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6127                       struct sk_buff *pkt, int prec)
6128 {
6129         return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6130 }
6131
6132 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6133                      struct sk_buff *sdu, uint prec)
6134 {
6135         struct brcms_txq_info *qi = wlc->pkt_queue;     /* Check me */
6136         struct pktq *q = &qi->q;
6137         int prio;
6138
6139         prio = sdu->priority;
6140
6141         if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6142                 /*
6143                  * we might hit this condtion in case
6144                  * packet flooding from mac80211 stack
6145                  */
6146                 brcmu_pkt_buf_free_skb(sdu);
6147         }
6148 }
6149
6150 /*
6151  * bcmc_fid_generate:
6152  * Generate frame ID for a BCMC packet.  The frag field is not used
6153  * for MC frames so is used as part of the sequence number.
6154  */
6155 static inline u16
6156 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6157                   struct d11txh *txh)
6158 {
6159         u16 frameid;
6160
6161         frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6162                                                   TXFID_QUEUE_MASK);
6163         frameid |=
6164             (((wlc->
6165                mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6166             TX_BCMC_FIFO;
6167
6168         return frameid;
6169 }
6170
6171 static uint
6172 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6173                       u8 preamble_type)
6174 {
6175         uint dur = 0;
6176
6177         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6178                 wlc->pub->unit, rspec, preamble_type);
6179         /*
6180          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6181          * is less than or equal to the rate of the immediately previous
6182          * frame in the FES
6183          */
6184         rspec = brcms_basic_rate(wlc, rspec);
6185         /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6186         dur =
6187             brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6188                                 (DOT11_ACK_LEN + FCS_LEN));
6189         return dur;
6190 }
6191
6192 static uint
6193 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6194                       u8 preamble_type)
6195 {
6196         BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6197                 wlc->pub->unit, rspec, preamble_type);
6198         return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6199 }
6200
6201 static uint
6202 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6203                      u8 preamble_type)
6204 {
6205         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6206                  "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6207         /*
6208          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6209          * is less than or equal to the rate of the immediately previous
6210          * frame in the FES
6211          */
6212         rspec = brcms_basic_rate(wlc, rspec);
6213         /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6214         return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6215                                    (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6216                                     FCS_LEN));
6217 }
6218
6219 /* brcms_c_compute_frame_dur()
6220  *
6221  * Calculate the 802.11 MAC header DUR field for MPDU
6222  * DUR for a single frame = 1 SIFS + 1 ACK
6223  * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6224  *
6225  * rate                 MPDU rate in unit of 500kbps
6226  * next_frag_len        next MPDU length in bytes
6227  * preamble_type        use short/GF or long/MM PLCP header
6228  */
6229 static u16
6230 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6231                       u8 preamble_type, uint next_frag_len)
6232 {
6233         u16 dur, sifs;
6234
6235         sifs = get_sifs(wlc->band);
6236
6237         dur = sifs;
6238         dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6239
6240         if (next_frag_len) {
6241                 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6242                 dur *= 2;
6243                 /* add another SIFS and the frag time */
6244                 dur += sifs;
6245                 dur +=
6246                     (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6247                                                  next_frag_len);
6248         }
6249         return dur;
6250 }
6251
6252 /* The opposite of brcms_c_calc_frame_time */
6253 static uint
6254 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6255                    u8 preamble_type, uint dur)
6256 {
6257         uint nsyms, mac_len, Ndps, kNdps;
6258         uint rate = rspec2rate(ratespec);
6259
6260         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6261                  wlc->pub->unit, ratespec, preamble_type, dur);
6262
6263         if (is_mcs_rate(ratespec)) {
6264                 uint mcs = ratespec & RSPEC_RATE_MASK;
6265                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6266                 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6267                 /* payload calculation matches that of regular ofdm */
6268                 if (wlc->band->bandtype == BRCM_BAND_2G)
6269                         dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6270                 /* kNdbps = kbps * 4 */
6271                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6272                                    rspec_issgi(ratespec)) * 4;
6273                 nsyms = dur / APHY_SYMBOL_TIME;
6274                 mac_len =
6275                     ((nsyms * kNdps) -
6276                      ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6277         } else if (is_ofdm_rate(ratespec)) {
6278                 dur -= APHY_PREAMBLE_TIME;
6279                 dur -= APHY_SIGNAL_TIME;
6280                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6281                 Ndps = rate * 2;
6282                 nsyms = dur / APHY_SYMBOL_TIME;
6283                 mac_len =
6284                     ((nsyms * Ndps) -
6285                      (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6286         } else {
6287                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6288                         dur -= BPHY_PLCP_SHORT_TIME;
6289                 else
6290                         dur -= BPHY_PLCP_TIME;
6291                 mac_len = dur * rate;
6292                 /* divide out factor of 2 in rate (1/2 mbps) */
6293                 mac_len = mac_len / 8 / 2;
6294         }
6295         return mac_len;
6296 }
6297
6298 /*
6299  * Return true if the specified rate is supported by the specified band.
6300  * BRCM_BAND_AUTO indicates the current band.
6301  */
6302 static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
6303                     bool verbose)
6304 {
6305         struct brcms_c_rateset *hw_rateset;
6306         uint i;
6307
6308         if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
6309                 hw_rateset = &wlc->band->hw_rateset;
6310         else if (wlc->pub->_nbands > 1)
6311                 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
6312         else
6313                 /* other band specified and we are a single band device */
6314                 return false;
6315
6316         /* check if this is a mimo rate */
6317         if (is_mcs_rate(rspec)) {
6318                 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
6319                         goto error;
6320
6321                 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
6322         }
6323
6324         for (i = 0; i < hw_rateset->count; i++)
6325                 if (hw_rateset->rates[i] == rspec2rate(rspec))
6326                         return true;
6327  error:
6328         if (verbose)
6329                 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
6330                           "not in hw_rateset\n", wlc->pub->unit, rspec);
6331
6332         return false;
6333 }
6334
6335 static u32
6336 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6337                        u32 int_val)
6338 {
6339         u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6340         u8 rate = int_val & NRATE_RATE_MASK;
6341         u32 rspec;
6342         bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6343         bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6344         bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6345                                   == NRATE_OVERRIDE_MCS_ONLY);
6346         int bcmerror = 0;
6347
6348         if (!ismcs)
6349                 return (u32) rate;
6350
6351         /* validate the combination of rate/mcs/stf is allowed */
6352         if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6353                 /* mcs only allowed when nmode */
6354                 if (stf > PHY_TXC1_MODE_SDM) {
6355                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6356                                   wlc->pub->unit, __func__);
6357                         bcmerror = -EINVAL;
6358                         goto done;
6359                 }
6360
6361                 /* mcs 32 is a special case, DUP mode 40 only */
6362                 if (rate == 32) {
6363                         if (!CHSPEC_IS40(wlc->home_chanspec) ||
6364                             ((stf != PHY_TXC1_MODE_SISO)
6365                              && (stf != PHY_TXC1_MODE_CDD))) {
6366                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6367                                           "32\n", wlc->pub->unit, __func__);
6368                                 bcmerror = -EINVAL;
6369                                 goto done;
6370                         }
6371                         /* mcs > 7 must use stf SDM */
6372                 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6373                         /* mcs > 7 must use stf SDM */
6374                         if (stf != PHY_TXC1_MODE_SDM) {
6375                                 BCMMSG(wlc->wiphy, "wl%d: enabling "
6376                                        "SDM mode for mcs %d\n",
6377                                        wlc->pub->unit, rate);
6378                                 stf = PHY_TXC1_MODE_SDM;
6379                         }
6380                 } else {
6381                         /*
6382                          * MCS 0-7 may use SISO, CDD, and for
6383                          * phy_rev >= 3 STBC
6384                          */
6385                         if ((stf > PHY_TXC1_MODE_STBC) ||
6386                             (!BRCMS_STBC_CAP_PHY(wlc)
6387                              && (stf == PHY_TXC1_MODE_STBC))) {
6388                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6389                                           "\n", wlc->pub->unit, __func__);
6390                                 bcmerror = -EINVAL;
6391                                 goto done;
6392                         }
6393                 }
6394         } else if (is_ofdm_rate(rate)) {
6395                 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6396                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6397                                   wlc->pub->unit, __func__);
6398                         bcmerror = -EINVAL;
6399                         goto done;
6400                 }
6401         } else if (is_cck_rate(rate)) {
6402                 if ((cur_band->bandtype != BRCM_BAND_2G)
6403                     || (stf != PHY_TXC1_MODE_SISO)) {
6404                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6405                                   wlc->pub->unit, __func__);
6406                         bcmerror = -EINVAL;
6407                         goto done;
6408                 }
6409         } else {
6410                 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6411                           wlc->pub->unit, __func__);
6412                 bcmerror = -EINVAL;
6413                 goto done;
6414         }
6415         /* make sure multiple antennae are available for non-siso rates */
6416         if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6417                 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6418                           "request\n", wlc->pub->unit, __func__);
6419                 bcmerror = -EINVAL;
6420                 goto done;
6421         }
6422
6423         rspec = rate;
6424         if (ismcs) {
6425                 rspec |= RSPEC_MIMORATE;
6426                 /* For STBC populate the STC field of the ratespec */
6427                 if (stf == PHY_TXC1_MODE_STBC) {
6428                         u8 stc;
6429                         stc = 1;        /* Nss for single stream is always 1 */
6430                         rspec |= (stc << RSPEC_STC_SHIFT);
6431                 }
6432         }
6433
6434         rspec |= (stf << RSPEC_STF_SHIFT);
6435
6436         if (override_mcs_only)
6437                 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6438
6439         if (issgi)
6440                 rspec |= RSPEC_SHORT_GI;
6441
6442         if ((rate != 0)
6443             && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6444                 return rate;
6445
6446         return rspec;
6447 done:
6448         return rate;
6449 }
6450
6451 /*
6452  * Compute PLCP, but only requires actual rate and length of pkt.
6453  * Rate is given in the driver standard multiple of 500 kbps.
6454  * le is set for 11 Mbps rate if necessary.
6455  * Broken out for PRQ.
6456  */
6457
6458 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
6459                              uint length, u8 *plcp)
6460 {
6461         u16 usec = 0;
6462         u8 le = 0;
6463
6464         switch (rate_500) {
6465         case BRCM_RATE_1M:
6466                 usec = length << 3;
6467                 break;
6468         case BRCM_RATE_2M:
6469                 usec = length << 2;
6470                 break;
6471         case BRCM_RATE_5M5:
6472                 usec = (length << 4) / 11;
6473                 if ((length << 4) - (usec * 11) > 0)
6474                         usec++;
6475                 break;
6476         case BRCM_RATE_11M:
6477                 usec = (length << 3) / 11;
6478                 if ((length << 3) - (usec * 11) > 0) {
6479                         usec++;
6480                         if ((usec * 11) - (length << 3) >= 8)
6481                                 le = D11B_PLCP_SIGNAL_LE;
6482                 }
6483                 break;
6484
6485         default:
6486                 wiphy_err(wlc->wiphy,
6487                           "brcms_c_cck_plcp_set: unsupported rate %d\n",
6488                           rate_500);
6489                 rate_500 = BRCM_RATE_1M;
6490                 usec = length << 3;
6491                 break;
6492         }
6493         /* PLCP signal byte */
6494         plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
6495         /* PLCP service byte */
6496         plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
6497         /* PLCP length u16, little endian */
6498         plcp[2] = usec & 0xff;
6499         plcp[3] = (usec >> 8) & 0xff;
6500         /* PLCP CRC16 */
6501         plcp[4] = 0;
6502         plcp[5] = 0;
6503 }
6504
6505 /* Rate: 802.11 rate code, length: PSDU length in octets */
6506 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
6507 {
6508         u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
6509         plcp[0] = mcs;
6510         if (rspec_is40mhz(rspec) || (mcs == 32))
6511                 plcp[0] |= MIMO_PLCP_40MHZ;
6512         BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
6513         plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
6514         plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6515         plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6516         plcp[5] = 0;
6517 }
6518
6519 /* Rate: 802.11 rate code, length: PSDU length in octets */
6520 static void
6521 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
6522 {
6523         u8 rate_signal;
6524         u32 tmp = 0;
6525         int rate = rspec2rate(rspec);
6526
6527         /*
6528          * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6529          * transmitted first
6530          */
6531         rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
6532         memset(plcp, 0, D11_PHY_HDR_LEN);
6533         D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
6534
6535         tmp = (length & 0xfff) << 5;
6536         plcp[2] |= (tmp >> 16) & 0xff;
6537         plcp[1] |= (tmp >> 8) & 0xff;
6538         plcp[0] |= tmp & 0xff;
6539 }
6540
6541 /* Rate: 802.11 rate code, length: PSDU length in octets */
6542 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
6543                                  uint length, u8 *plcp)
6544 {
6545         int rate = rspec2rate(rspec);
6546
6547         brcms_c_cck_plcp_set(wlc, rate, length, plcp);
6548 }
6549
6550 static void
6551 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
6552                      uint length, u8 *plcp)
6553 {
6554         if (is_mcs_rate(rspec))
6555                 brcms_c_compute_mimo_plcp(rspec, length, plcp);
6556         else if (is_ofdm_rate(rspec))
6557                 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
6558         else
6559                 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
6560 }
6561
6562 /* brcms_c_compute_rtscts_dur()
6563  *
6564  * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6565  * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6566  * DUR for CTS-TO-SELF w/ frame    = 2 SIFS         + next frame time + 1 ACK
6567  *
6568  * cts                  cts-to-self or rts/cts
6569  * rts_rate             rts or cts rate in unit of 500kbps
6570  * rate                 next MPDU rate in unit of 500kbps
6571  * frame_len            next MPDU frame length in bytes
6572  */
6573 u16
6574 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
6575                            u32 rts_rate,
6576                            u32 frame_rate, u8 rts_preamble_type,
6577                            u8 frame_preamble_type, uint frame_len, bool ba)
6578 {
6579         u16 dur, sifs;
6580
6581         sifs = get_sifs(wlc->band);
6582
6583         if (!cts_only) {
6584                 /* RTS/CTS */
6585                 dur = 3 * sifs;
6586                 dur +=
6587                     (u16) brcms_c_calc_cts_time(wlc, rts_rate,
6588                                                rts_preamble_type);
6589         } else {
6590                 /* CTS-TO-SELF */
6591                 dur = 2 * sifs;
6592         }
6593
6594         dur +=
6595             (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
6596                                          frame_len);
6597         if (ba)
6598                 dur +=
6599                     (u16) brcms_c_calc_ba_time(wlc, frame_rate,
6600                                               BRCMS_SHORT_PREAMBLE);
6601         else
6602                 dur +=
6603                     (u16) brcms_c_calc_ack_time(wlc, frame_rate,
6604                                                frame_preamble_type);
6605         return dur;
6606 }
6607
6608 static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
6609 {
6610         u16 phyctl1 = 0;
6611         u16 bw;
6612
6613         if (BRCMS_ISLCNPHY(wlc->band)) {
6614                 bw = PHY_TXC1_BW_20MHZ;
6615         } else {
6616                 bw = rspec_get_bw(rspec);
6617                 /* 10Mhz is not supported yet */
6618                 if (bw < PHY_TXC1_BW_20MHZ) {
6619                         wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
6620                                   "not supported yet, set to 20L\n", bw);
6621                         bw = PHY_TXC1_BW_20MHZ;
6622                 }
6623         }
6624
6625         if (is_mcs_rate(rspec)) {
6626                 uint mcs = rspec & RSPEC_RATE_MASK;
6627
6628                 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6629                 phyctl1 = rspec_phytxbyte2(rspec);
6630                 /* set the upper byte of phyctl1 */
6631                 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
6632         } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6633                    && !BRCMS_ISSSLPNPHY(wlc->band)) {
6634                 /*
6635                  * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6636                  * Data Rate. Eventually MIMOPHY would also be converted to
6637                  * this format
6638                  */
6639                 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6640                 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6641         } else {                /* legacy OFDM/CCK */
6642                 s16 phycfg;
6643                 /* get the phyctl byte from rate phycfg table */
6644                 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
6645                 if (phycfg == -1) {
6646                         wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
6647                                   "legacy OFDM/CCK rate\n");
6648                         phycfg = 0;
6649                 }
6650                 /* set the upper byte of phyctl1 */
6651                 phyctl1 =
6652                     (bw | (phycfg << 8) |
6653                      (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6654         }
6655         return phyctl1;
6656 }
6657
6658 /*
6659  * Add struct d11txh, struct cck_phy_hdr.
6660  *
6661  * 'p' data must start with 802.11 MAC header
6662  * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6663  *
6664  * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6665  *
6666  */
6667 static u16
6668 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6669                      struct sk_buff *p, struct scb *scb, uint frag,
6670                      uint nfrags, uint queue, uint next_frag_len)
6671 {
6672         struct ieee80211_hdr *h;
6673         struct d11txh *txh;
6674         u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6675         int len, phylen, rts_phylen;
6676         u16 mch, phyctl, xfts, mainrates;
6677         u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6678         u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6679         u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6680         bool use_rts = false;
6681         bool use_cts = false;
6682         bool use_rifs = false;
6683         bool short_preamble[2] = { false, false };
6684         u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6685         u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6686         u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6687         struct ieee80211_rts *rts = NULL;
6688         bool qos;
6689         uint ac;
6690         bool hwtkmic = false;
6691         u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6692 #define ANTCFG_NONE 0xFF
6693         u8 antcfg = ANTCFG_NONE;
6694         u8 fbantcfg = ANTCFG_NONE;
6695         uint phyctl1_stf = 0;
6696         u16 durid = 0;
6697         struct ieee80211_tx_rate *txrate[2];
6698         int k;
6699         struct ieee80211_tx_info *tx_info;
6700         bool is_mcs;
6701         u16 mimo_txbw;
6702         u8 mimo_preamble_type;
6703
6704         /* locate 802.11 MAC header */
6705         h = (struct ieee80211_hdr *)(p->data);
6706         qos = ieee80211_is_data_qos(h->frame_control);
6707
6708         /* compute length of frame in bytes for use in PLCP computations */
6709         len = brcmu_pkttotlen(p);
6710         phylen = len + FCS_LEN;
6711
6712         /* Get tx_info */
6713         tx_info = IEEE80211_SKB_CB(p);
6714
6715         /* add PLCP */
6716         plcp = skb_push(p, D11_PHY_HDR_LEN);
6717
6718         /* add Broadcom tx descriptor header */
6719         txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6720         memset(txh, 0, D11_TXH_LEN);
6721
6722         /* setup frameid */
6723         if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6724                 /* non-AP STA should never use BCMC queue */
6725                 if (queue == TX_BCMC_FIFO) {
6726                         wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6727                                   "TX_BCMC!\n", wlc->pub->unit, __func__);
6728                         frameid = bcmc_fid_generate(wlc, NULL, txh);
6729                 } else {
6730                         /* Increment the counter for first fragment */
6731                         if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6732                                 scb->seqnum[p->priority]++;
6733
6734                         /* extract fragment number from frame first */
6735                         seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6736                         seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6737                         h->seq_ctrl = cpu_to_le16(seq);
6738
6739                         frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6740                             (queue & TXFID_QUEUE_MASK);
6741                 }
6742         }
6743         frameid |= queue & TXFID_QUEUE_MASK;
6744
6745         /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6746         if (ieee80211_is_beacon(h->frame_control))
6747                 mcl |= TXC_IGNOREPMQ;
6748
6749         txrate[0] = tx_info->control.rates;
6750         txrate[1] = txrate[0] + 1;
6751
6752         /*
6753          * if rate control algorithm didn't give us a fallback
6754          * rate, use the primary rate
6755          */
6756         if (txrate[1]->idx < 0)
6757                 txrate[1] = txrate[0];
6758
6759         for (k = 0; k < hw->max_rates; k++) {
6760                 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6761                 if (!is_mcs) {
6762                         if ((txrate[k]->idx >= 0)
6763                             && (txrate[k]->idx <
6764                                 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6765                                 rspec[k] =
6766                                     hw->wiphy->bands[tx_info->band]->
6767                                     bitrates[txrate[k]->idx].hw_value;
6768                                 short_preamble[k] =
6769                                     txrate[k]->
6770                                     flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6771                                     true : false;
6772                         } else {
6773                                 rspec[k] = BRCM_RATE_1M;
6774                         }
6775                 } else {
6776                         rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6777                                         NRATE_MCS_INUSE | txrate[k]->idx);
6778                 }
6779
6780                 /*
6781                  * Currently only support same setting for primay and
6782                  * fallback rates. Unify flags for each rate into a
6783                  * single value for the frame
6784                  */
6785                 use_rts |=
6786                     txrate[k]->
6787                     flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6788                 use_cts |=
6789                     txrate[k]->
6790                     flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6791
6792
6793                 /*
6794                  * (1) RATE:
6795                  *   determine and validate primary rate
6796                  *   and fallback rates
6797                  */
6798                 if (!rspec_active(rspec[k])) {
6799                         rspec[k] = BRCM_RATE_1M;
6800                 } else {
6801                         if (!is_multicast_ether_addr(h->addr1)) {
6802                                 /* set tx antenna config */
6803                                 brcms_c_antsel_antcfg_get(wlc->asi, false,
6804                                         false, 0, 0, &antcfg, &fbantcfg);
6805                         }
6806                 }
6807         }
6808
6809         phyctl1_stf = wlc->stf->ss_opmode;
6810
6811         if (wlc->pub->_n_enab & SUPPORT_11N) {
6812                 for (k = 0; k < hw->max_rates; k++) {
6813                         /*
6814                          * apply siso/cdd to single stream mcs's or ofdm
6815                          * if rspec is auto selected
6816                          */
6817                         if (((is_mcs_rate(rspec[k]) &&
6818                               is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6819                              is_ofdm_rate(rspec[k]))
6820                             && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6821                                 || !(rspec[k] & RSPEC_OVERRIDE))) {
6822                                 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6823
6824                                 /* For SISO MCS use STBC if possible */
6825                                 if (is_mcs_rate(rspec[k])
6826                                     && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6827                                         u8 stc;
6828
6829                                         /* Nss for single stream is always 1 */
6830                                         stc = 1;
6831                                         rspec[k] |= (PHY_TXC1_MODE_STBC <<
6832                                                         RSPEC_STF_SHIFT) |
6833                                                     (stc << RSPEC_STC_SHIFT);
6834                                 } else
6835                                         rspec[k] |=
6836                                             (phyctl1_stf << RSPEC_STF_SHIFT);
6837                         }
6838
6839                         /*
6840                          * Is the phy configured to use 40MHZ frames? If
6841                          * so then pick the desired txbw
6842                          */
6843                         if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6844                                 /* default txbw is 20in40 SB */
6845                                 mimo_ctlchbw = mimo_txbw =
6846                                    CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6847                                                                  wlc->band->pi))
6848                                    ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
6849
6850                                 if (is_mcs_rate(rspec[k])) {
6851                                         /* mcs 32 must be 40b/w DUP */
6852                                         if ((rspec[k] & RSPEC_RATE_MASK)
6853                                             == 32) {
6854                                                 mimo_txbw =
6855                                                     PHY_TXC1_BW_40MHZ_DUP;
6856                                                 /* use override */
6857                                         } else if (wlc->mimo_40txbw != AUTO)
6858                                                 mimo_txbw = wlc->mimo_40txbw;
6859                                         /* else check if dst is using 40 Mhz */
6860                                         else if (scb->flags & SCB_IS40)
6861                                                 mimo_txbw = PHY_TXC1_BW_40MHZ;
6862                                 } else if (is_ofdm_rate(rspec[k])) {
6863                                         if (wlc->ofdm_40txbw != AUTO)
6864                                                 mimo_txbw = wlc->ofdm_40txbw;
6865                                 } else if (wlc->cck_40txbw != AUTO) {
6866                                         mimo_txbw = wlc->cck_40txbw;
6867                                 }
6868                         } else {
6869                                 /*
6870                                  * mcs32 is 40 b/w only.
6871                                  * This is possible for probe packets on
6872                                  * a STA during SCAN
6873                                  */
6874                                 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
6875                                         /* mcs 0 */
6876                                         rspec[k] = RSPEC_MIMORATE;
6877
6878                                 mimo_txbw = PHY_TXC1_BW_20MHZ;
6879                         }
6880
6881                         /* Set channel width */
6882                         rspec[k] &= ~RSPEC_BW_MASK;
6883                         if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
6884                                 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
6885                         else
6886                                 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
6887
6888                         /* Disable short GI, not supported yet */
6889                         rspec[k] &= ~RSPEC_SHORT_GI;
6890
6891                         mimo_preamble_type = BRCMS_MM_PREAMBLE;
6892                         if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
6893                                 mimo_preamble_type = BRCMS_GF_PREAMBLE;
6894
6895                         if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
6896                             && (!is_mcs_rate(rspec[k]))) {
6897                                 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
6898                                           "RC_MCS != is_mcs_rate(rspec)\n",
6899                                           wlc->pub->unit, __func__);
6900                         }
6901
6902                         if (is_mcs_rate(rspec[k])) {
6903                                 preamble_type[k] = mimo_preamble_type;
6904
6905                                 /*
6906                                  * if SGI is selected, then forced mm
6907                                  * for single stream
6908                                  */
6909                                 if ((rspec[k] & RSPEC_SHORT_GI)
6910                                     && is_single_stream(rspec[k] &
6911                                                         RSPEC_RATE_MASK))
6912                                         preamble_type[k] = BRCMS_MM_PREAMBLE;
6913                         }
6914
6915                         /* should be better conditionalized */
6916                         if (!is_mcs_rate(rspec[0])
6917                             && (tx_info->control.rates[0].
6918                                 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
6919                                 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
6920                 }
6921         } else {
6922                 for (k = 0; k < hw->max_rates; k++) {
6923                         /* Set ctrlchbw as 20Mhz */
6924                         rspec[k] &= ~RSPEC_BW_MASK;
6925                         rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
6926
6927                         /* for nphy, stf of ofdm frames must follow policies */
6928                         if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
6929                                 rspec[k] &= ~RSPEC_STF_MASK;
6930                                 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
6931                         }
6932                 }
6933         }
6934
6935         /* Reset these for use with AMPDU's */
6936         txrate[0]->count = 0;
6937         txrate[1]->count = 0;
6938
6939         /* (2) PROTECTION, may change rspec */
6940         if ((ieee80211_is_data(h->frame_control) ||
6941             ieee80211_is_mgmt(h->frame_control)) &&
6942             (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
6943                 use_rts = true;
6944
6945         /* (3) PLCP: determine PLCP header and MAC duration,
6946          * fill struct d11txh */
6947         brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
6948         brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
6949         memcpy(&txh->FragPLCPFallback,
6950                plcp_fallback, sizeof(txh->FragPLCPFallback));
6951
6952         /* Length field now put in CCK FBR CRC field */
6953         if (is_cck_rate(rspec[1])) {
6954                 txh->FragPLCPFallback[4] = phylen & 0xff;
6955                 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
6956         }
6957
6958         /* MIMO-RATE: need validation ?? */
6959         mainrates = is_ofdm_rate(rspec[0]) ?
6960                         D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
6961                         plcp[0];
6962
6963         /* DUR field for main rate */
6964         if (!ieee80211_is_pspoll(h->frame_control) &&
6965             !is_multicast_ether_addr(h->addr1) && !use_rifs) {
6966                 durid =
6967                     brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
6968                                           next_frag_len);
6969                 h->duration_id = cpu_to_le16(durid);
6970         } else if (use_rifs) {
6971                 /* NAV protect to end of next max packet size */
6972                 durid =
6973                     (u16) brcms_c_calc_frame_time(wlc, rspec[0],
6974                                                  preamble_type[0],
6975                                                  DOT11_MAX_FRAG_LEN);
6976                 durid += RIFS_11N_TIME;
6977                 h->duration_id = cpu_to_le16(durid);
6978         }
6979
6980         /* DUR field for fallback rate */
6981         if (ieee80211_is_pspoll(h->frame_control))
6982                 txh->FragDurFallback = h->duration_id;
6983         else if (is_multicast_ether_addr(h->addr1) || use_rifs)
6984                 txh->FragDurFallback = 0;
6985         else {
6986                 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
6987                                               preamble_type[1], next_frag_len);
6988                 txh->FragDurFallback = cpu_to_le16(durid);
6989         }
6990
6991         /* (4) MAC-HDR: MacTxControlLow */
6992         if (frag == 0)
6993                 mcl |= TXC_STARTMSDU;
6994
6995         if (!is_multicast_ether_addr(h->addr1))
6996                 mcl |= TXC_IMMEDACK;
6997
6998         if (wlc->band->bandtype == BRCM_BAND_5G)
6999                 mcl |= TXC_FREQBAND_5G;
7000
7001         if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
7002                 mcl |= TXC_BW_40;
7003
7004         /* set AMIC bit if using hardware TKIP MIC */
7005         if (hwtkmic)
7006                 mcl |= TXC_AMIC;
7007
7008         txh->MacTxControlLow = cpu_to_le16(mcl);
7009
7010         /* MacTxControlHigh */
7011         mch = 0;
7012
7013         /* Set fallback rate preamble type */
7014         if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
7015             (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
7016                 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
7017                         mch |= TXC_PREAMBLE_DATA_FB_SHORT;
7018         }
7019
7020         /* MacFrameControl */
7021         memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
7022         txh->TxFesTimeNormal = cpu_to_le16(0);
7023
7024         txh->TxFesTimeFallback = cpu_to_le16(0);
7025
7026         /* TxFrameRA */
7027         memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
7028
7029         /* TxFrameID */
7030         txh->TxFrameID = cpu_to_le16(frameid);
7031
7032         /*
7033          * TxStatus, Note the case of recreating the first frag of a suppressed
7034          * frame then we may need to reset the retry cnt's via the status reg
7035          */
7036         txh->TxStatus = cpu_to_le16(status);
7037
7038         /*
7039          * extra fields for ucode AMPDU aggregation, the new fields are added to
7040          * the END of previous structure so that it's compatible in driver.
7041          */
7042         txh->MaxNMpdus = cpu_to_le16(0);
7043         txh->MaxABytes_MRT = cpu_to_le16(0);
7044         txh->MaxABytes_FBR = cpu_to_le16(0);
7045         txh->MinMBytes = cpu_to_le16(0);
7046
7047         /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7048          * furnish struct d11txh */
7049         /* RTS PLCP header and RTS frame */
7050         if (use_rts || use_cts) {
7051                 if (use_rts && use_cts)
7052                         use_cts = false;
7053
7054                 for (k = 0; k < 2; k++) {
7055                         rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7056                                                               false,
7057                                                               mimo_ctlchbw);
7058                 }
7059
7060                 if (!is_ofdm_rate(rts_rspec[0]) &&
7061                     !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7062                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7063                         rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7064                         mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7065                 }
7066
7067                 if (!is_ofdm_rate(rts_rspec[1]) &&
7068                     !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7069                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7070                         rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7071                         mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7072                 }
7073
7074                 /* RTS/CTS additions to MacTxControlLow */
7075                 if (use_cts) {
7076                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7077                 } else {
7078                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7079                         txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7080                 }
7081
7082                 /* RTS PLCP header */
7083                 rts_plcp = txh->RTSPhyHeader;
7084                 if (use_cts)
7085                         rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7086                 else
7087                         rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7088
7089                 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7090
7091                 /* fallback rate version of RTS PLCP header */
7092                 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7093                                  rts_plcp_fallback);
7094                 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7095                        sizeof(txh->RTSPLCPFallback));
7096
7097                 /* RTS frame fields... */
7098                 rts = (struct ieee80211_rts *)&txh->rts_frame;
7099
7100                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7101                                                rspec[0], rts_preamble_type[0],
7102                                                preamble_type[0], phylen, false);
7103                 rts->duration = cpu_to_le16(durid);
7104                 /* fallback rate version of RTS DUR field */
7105                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7106                                                rts_rspec[1], rspec[1],
7107                                                rts_preamble_type[1],
7108                                                preamble_type[1], phylen, false);
7109                 txh->RTSDurFallback = cpu_to_le16(durid);
7110
7111                 if (use_cts) {
7112                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7113                                                          IEEE80211_STYPE_CTS);
7114
7115                         memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7116                 } else {
7117                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7118                                                          IEEE80211_STYPE_RTS);
7119
7120                         memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7121                 }
7122
7123                 /* mainrate
7124                  *    low 8 bits: main frag rate/mcs,
7125                  *    high 8 bits: rts/cts rate/mcs
7126                  */
7127                 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7128                                 D11A_PHY_HDR_GRATE(
7129                                         (struct ofdm_phy_hdr *) rts_plcp) :
7130                                 rts_plcp[0]) << 8;
7131         } else {
7132                 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7133                 memset((char *)&txh->rts_frame, 0,
7134                         sizeof(struct ieee80211_rts));
7135                 memset((char *)txh->RTSPLCPFallback, 0,
7136                       sizeof(txh->RTSPLCPFallback));
7137                 txh->RTSDurFallback = 0;
7138         }
7139
7140 #ifdef SUPPORT_40MHZ
7141         /* add null delimiter count */
7142         if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7143                 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7144                    brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7145
7146 #endif
7147
7148         /*
7149          * Now that RTS/RTS FB preamble types are updated, write
7150          * the final value
7151          */
7152         txh->MacTxControlHigh = cpu_to_le16(mch);
7153
7154         /*
7155          * MainRates (both the rts and frag plcp rates have
7156          * been calculated now)
7157          */
7158         txh->MainRates = cpu_to_le16(mainrates);
7159
7160         /* XtraFrameTypes */
7161         xfts = frametype(rspec[1], wlc->mimoft);
7162         xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7163         xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7164         xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7165                                                              XFTS_CHANNEL_SHIFT;
7166         txh->XtraFrameTypes = cpu_to_le16(xfts);
7167
7168         /* PhyTxControlWord */
7169         phyctl = frametype(rspec[0], wlc->mimoft);
7170         if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7171             (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7172                 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7173                         phyctl |= PHY_TXC_SHORT_HDR;
7174         }
7175
7176         /* phytxant is properly bit shifted */
7177         phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7178         txh->PhyTxControlWord = cpu_to_le16(phyctl);
7179
7180         /* PhyTxControlWord_1 */
7181         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7182                 u16 phyctl1 = 0;
7183
7184                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7185                 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7186                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7187                 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7188
7189                 if (use_rts || use_cts) {
7190                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7191                         txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7192                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7193                         txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7194                 }
7195
7196                 /*
7197                  * For mcs frames, if mixedmode(overloaded with long preamble)
7198                  * is going to be set, fill in non-zero MModeLen and/or
7199                  * MModeFbrLen it will be unnecessary if they are separated
7200                  */
7201                 if (is_mcs_rate(rspec[0]) &&
7202                     (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7203                         u16 mmodelen =
7204                             brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7205                         txh->MModeLen = cpu_to_le16(mmodelen);
7206                 }
7207
7208                 if (is_mcs_rate(rspec[1]) &&
7209                     (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7210                         u16 mmodefbrlen =
7211                             brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7212                         txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7213                 }
7214         }
7215
7216         ac = skb_get_queue_mapping(p);
7217         if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7218                 uint frag_dur, dur, dur_fallback;
7219
7220                 /* WME: Update TXOP threshold */
7221                 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7222                         frag_dur =
7223                             brcms_c_calc_frame_time(wlc, rspec[0],
7224                                         preamble_type[0], phylen);
7225
7226                         if (rts) {
7227                                 /* 1 RTS or CTS-to-self frame */
7228                                 dur =
7229                                     brcms_c_calc_cts_time(wlc, rts_rspec[0],
7230                                                       rts_preamble_type[0]);
7231                                 dur_fallback =
7232                                     brcms_c_calc_cts_time(wlc, rts_rspec[1],
7233                                                       rts_preamble_type[1]);
7234                                 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7235                                 dur += le16_to_cpu(rts->duration);
7236                                 dur_fallback +=
7237                                         le16_to_cpu(txh->RTSDurFallback);
7238                         } else if (use_rifs) {
7239                                 dur = frag_dur;
7240                                 dur_fallback = 0;
7241                         } else {
7242                                 /* frame + SIFS + ACK */
7243                                 dur = frag_dur;
7244                                 dur +=
7245                                     brcms_c_compute_frame_dur(wlc, rspec[0],
7246                                                           preamble_type[0], 0);
7247
7248                                 dur_fallback =
7249                                     brcms_c_calc_frame_time(wlc, rspec[1],
7250                                                         preamble_type[1],
7251                                                         phylen);
7252                                 dur_fallback +=
7253                                     brcms_c_compute_frame_dur(wlc, rspec[1],
7254                                                           preamble_type[1], 0);
7255                         }
7256                         /* NEED to set TxFesTimeNormal (hard) */
7257                         txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7258                         /*
7259                          * NEED to set fallback rate version of
7260                          * TxFesTimeNormal (hard)
7261                          */
7262                         txh->TxFesTimeFallback =
7263                                 cpu_to_le16((u16) dur_fallback);
7264
7265                         /*
7266                          * update txop byte threshold (txop minus intraframe
7267                          * overhead)
7268                          */
7269                         if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7270                                 uint newfragthresh;
7271
7272                                 newfragthresh =
7273                                     brcms_c_calc_frame_len(wlc,
7274                                         rspec[0], preamble_type[0],
7275                                         (wlc->edcf_txop[ac] -
7276                                                 (dur - frag_dur)));
7277                                 /* range bound the fragthreshold */
7278                                 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7279                                         newfragthresh =
7280                                             DOT11_MIN_FRAG_LEN;
7281                                 else if (newfragthresh >
7282                                          wlc->usr_fragthresh)
7283                                         newfragthresh =
7284                                             wlc->usr_fragthresh;
7285                                 /* update the fragthresh and do txc update */
7286                                 if (wlc->fragthresh[queue] !=
7287                                     (u16) newfragthresh)
7288                                         wlc->fragthresh[queue] =
7289                                             (u16) newfragthresh;
7290                         } else {
7291                                 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7292                                           "for rate %d\n",
7293                                           wlc->pub->unit, fifo_names[queue],
7294                                           rspec2rate(rspec[0]));
7295                         }
7296
7297                         if (dur > wlc->edcf_txop[ac])
7298                                 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7299                                           "exceeded phylen %d/%d dur %d/%d\n",
7300                                           wlc->pub->unit, __func__,
7301                                           fifo_names[queue],
7302                                           phylen, wlc->fragthresh[queue],
7303                                           dur, wlc->edcf_txop[ac]);
7304                 }
7305         }
7306
7307         return 0;
7308 }
7309
7310 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7311                               struct ieee80211_hw *hw)
7312 {
7313         u8 prio;
7314         uint fifo;
7315         struct scb *scb = &wlc->pri_scb;
7316         struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7317
7318         /*
7319          * 802.11 standard requires management traffic
7320          * to go at highest priority
7321          */
7322         prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7323                 MAXPRIO;
7324         fifo = prio2fifo[prio];
7325         if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7326                 return;
7327         brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7328         brcms_c_send_q(wlc);
7329 }
7330
7331 void brcms_c_send_q(struct brcms_c_info *wlc)
7332 {
7333         struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7334         int prec;
7335         u16 prec_map;
7336         int err = 0, i, count;
7337         uint fifo;
7338         struct brcms_txq_info *qi = wlc->pkt_queue;
7339         struct pktq *q = &qi->q;
7340         struct ieee80211_tx_info *tx_info;
7341
7342         prec_map = wlc->tx_prec_map;
7343
7344         /* Send all the enq'd pkts that we can.
7345          * Dequeue packets with precedence with empty HW fifo only
7346          */
7347         while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7348                 tx_info = IEEE80211_SKB_CB(pkt[0]);
7349                 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7350                         err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7351                 } else {
7352                         count = 1;
7353                         err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7354                         if (!err) {
7355                                 for (i = 0; i < count; i++)
7356                                         brcms_c_txfifo(wlc, fifo, pkt[i], true,
7357                                                        1);
7358                         }
7359                 }
7360
7361                 if (err == -EBUSY) {
7362                         brcmu_pktq_penq_head(q, prec, pkt[0]);
7363                         /*
7364                          * If send failed due to any other reason than a
7365                          * change in HW FIFO condition, quit. Otherwise,
7366                          * read the new prec_map!
7367                          */
7368                         if (prec_map == wlc->tx_prec_map)
7369                                 break;
7370                         prec_map = wlc->tx_prec_map;
7371                 }
7372         }
7373 }
7374
7375 void
7376 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7377                bool commit, s8 txpktpend)
7378 {
7379         u16 frameid = INVALIDFID;
7380         struct d11txh *txh;
7381
7382         txh = (struct d11txh *) (p->data);
7383
7384         /* When a BC/MC frame is being committed to the BCMC fifo
7385          * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7386          */
7387         if (fifo == TX_BCMC_FIFO)
7388                 frameid = le16_to_cpu(txh->TxFrameID);
7389
7390         /*
7391          * Bump up pending count for if not using rpc. If rpc is
7392          * used, this will be handled in brcms_b_txfifo()
7393          */
7394         if (commit) {
7395                 wlc->core->txpktpend[fifo] += txpktpend;
7396                 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7397                          txpktpend, wlc->core->txpktpend[fifo]);
7398         }
7399
7400         /* Commit BCMC sequence number in the SHM frame ID location */
7401         if (frameid != INVALIDFID) {
7402                 /*
7403                  * To inform the ucode of the last mcast frame posted
7404                  * so that it can clear moredata bit
7405                  */
7406                 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7407         }
7408
7409         if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7410                 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7411 }
7412
7413 u32
7414 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7415                            bool use_rspec, u16 mimo_ctlchbw)
7416 {
7417         u32 rts_rspec = 0;
7418
7419         if (use_rspec)
7420                 /* use frame rate as rts rate */
7421                 rts_rspec = rspec;
7422         else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7423                 /* Use 11Mbps as the g protection RTS target rate and fallback.
7424                  * Use the brcms_basic_rate() lookup to find the best basic rate
7425                  * under the target in case 11 Mbps is not Basic.
7426                  * 6 and 9 Mbps are not usually selected by rate selection, but
7427                  * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7428                  * is more robust.
7429                  */
7430                 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7431         else
7432                 /* calculate RTS rate and fallback rate based on the frame rate
7433                  * RTS must be sent at a basic rate since it is a
7434                  * control frame, sec 9.6 of 802.11 spec
7435                  */
7436                 rts_rspec = brcms_basic_rate(wlc, rspec);
7437
7438         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7439                 /* set rts txbw to correct side band */
7440                 rts_rspec &= ~RSPEC_BW_MASK;
7441
7442                 /*
7443                  * if rspec/rspec_fallback is 40MHz, then send RTS on both
7444                  * 20MHz channel (DUP), otherwise send RTS on control channel
7445                  */
7446                 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7447                         rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7448                 else
7449                         rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7450
7451                 /* pick siso/cdd as default for ofdm */
7452                 if (is_ofdm_rate(rts_rspec)) {
7453                         rts_rspec &= ~RSPEC_STF_MASK;
7454                         rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7455                 }
7456         }
7457         return rts_rspec;
7458 }
7459
7460 void
7461 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7462 {
7463         wlc->core->txpktpend[fifo] -= txpktpend;
7464         BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7465                wlc->core->txpktpend[fifo]);
7466
7467         /* There is more room; mark precedences related to this FIFO sendable */
7468         wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7469
7470         /* figure out which bsscfg is being worked on... */
7471 }
7472
7473 /* Update beacon listen interval in shared memory */
7474 static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7475 {
7476         /* wake up every DTIM is the default */
7477         if (wlc->bcn_li_dtim == 1)
7478                 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7479         else
7480                 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7481                               (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7482 }
7483
7484 static void
7485 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7486                   u32 *tsf_h_ptr)
7487 {
7488         struct d11regs __iomem *regs = wlc_hw->regs;
7489
7490         /* read the tsf timer low, then high to get an atomic read */
7491         *tsf_l_ptr = R_REG(&regs->tsf_timerlow);
7492         *tsf_h_ptr = R_REG(&regs->tsf_timerhigh);
7493 }
7494
7495 /*
7496  * recover 64bit TSF value from the 16bit TSF value in the rx header
7497  * given the assumption that the TSF passed in header is within 65ms
7498  * of the current tsf.
7499  *
7500  * 6       5       4       4       3       2       1
7501  * 3.......6.......8.......0.......2.......4.......6.......8......0
7502  * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7503  *
7504  * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7505  * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7506  * receive call sequence after rx interrupt. Only the higher 16 bits
7507  * are used. Finally, the tsf_h is read from the tsf register.
7508  */
7509 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7510                                  struct d11rxhdr *rxh)
7511 {
7512         u32 tsf_h, tsf_l;
7513         u16 rx_tsf_0_15, rx_tsf_16_31;
7514
7515         brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7516
7517         rx_tsf_16_31 = (u16)(tsf_l >> 16);
7518         rx_tsf_0_15 = rxh->RxTSFTime;
7519
7520         /*
7521          * a greater tsf time indicates the low 16 bits of
7522          * tsf_l wrapped, so decrement the high 16 bits.
7523          */
7524         if ((u16)tsf_l < rx_tsf_0_15) {
7525                 rx_tsf_16_31 -= 1;
7526                 if (rx_tsf_16_31 == 0xffff)
7527                         tsf_h -= 1;
7528         }
7529
7530         return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7531 }
7532
7533 static void
7534 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7535                      struct sk_buff *p,
7536                      struct ieee80211_rx_status *rx_status)
7537 {
7538         int preamble;
7539         int channel;
7540         u32 rspec;
7541         unsigned char *plcp;
7542
7543         /* fill in TSF and flag its presence */
7544         rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7545         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7546
7547         channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7548
7549         if (channel > 14) {
7550                 rx_status->band = IEEE80211_BAND_5GHZ;
7551                 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7552                                         WF_CHAN_FACTOR_5_G/2, channel);
7553
7554         } else {
7555                 rx_status->band = IEEE80211_BAND_2GHZ;
7556                 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7557         }
7558
7559         rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7560
7561         /* noise */
7562         /* qual */
7563         rx_status->antenna =
7564                 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7565
7566         plcp = p->data;
7567
7568         rspec = brcms_c_compute_rspec(rxh, plcp);
7569         if (is_mcs_rate(rspec)) {
7570                 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7571                 rx_status->flag |= RX_FLAG_HT;
7572                 if (rspec_is40mhz(rspec))
7573                         rx_status->flag |= RX_FLAG_40MHZ;
7574         } else {
7575                 switch (rspec2rate(rspec)) {
7576                 case BRCM_RATE_1M:
7577                         rx_status->rate_idx = 0;
7578                         break;
7579                 case BRCM_RATE_2M:
7580                         rx_status->rate_idx = 1;
7581                         break;
7582                 case BRCM_RATE_5M5:
7583                         rx_status->rate_idx = 2;
7584                         break;
7585                 case BRCM_RATE_11M:
7586                         rx_status->rate_idx = 3;
7587                         break;
7588                 case BRCM_RATE_6M:
7589                         rx_status->rate_idx = 4;
7590                         break;
7591                 case BRCM_RATE_9M:
7592                         rx_status->rate_idx = 5;
7593                         break;
7594                 case BRCM_RATE_12M:
7595                         rx_status->rate_idx = 6;
7596                         break;
7597                 case BRCM_RATE_18M:
7598                         rx_status->rate_idx = 7;
7599                         break;
7600                 case BRCM_RATE_24M:
7601                         rx_status->rate_idx = 8;
7602                         break;
7603                 case BRCM_RATE_36M:
7604                         rx_status->rate_idx = 9;
7605                         break;
7606                 case BRCM_RATE_48M:
7607                         rx_status->rate_idx = 10;
7608                         break;
7609                 case BRCM_RATE_54M:
7610                         rx_status->rate_idx = 11;
7611                         break;
7612                 default:
7613                         wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7614                 }
7615
7616                 /*
7617                  * For 5GHz, we should decrease the index as it is
7618                  * a subset of the 2.4G rates. See bitrates field
7619                  * of brcms_band_5GHz_nphy (in mac80211_if.c).
7620                  */
7621                 if (rx_status->band == IEEE80211_BAND_5GHZ)
7622                         rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7623
7624                 /* Determine short preamble and rate_idx */
7625                 preamble = 0;
7626                 if (is_cck_rate(rspec)) {
7627                         if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7628                                 rx_status->flag |= RX_FLAG_SHORTPRE;
7629                 } else if (is_ofdm_rate(rspec)) {
7630                         rx_status->flag |= RX_FLAG_SHORTPRE;
7631                 } else {
7632                         wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7633                                   __func__);
7634                 }
7635         }
7636
7637         if (plcp3_issgi(plcp[3]))
7638                 rx_status->flag |= RX_FLAG_SHORT_GI;
7639
7640         if (rxh->RxStatus1 & RXS_DECERR) {
7641                 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7642                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_PLCP_CRC\n",
7643                           __func__);
7644         }
7645         if (rxh->RxStatus1 & RXS_FCSERR) {
7646                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7647                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_FCS_CRC\n",
7648                           __func__);
7649         }
7650 }
7651
7652 static void
7653 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7654                 struct sk_buff *p)
7655 {
7656         int len_mpdu;
7657         struct ieee80211_rx_status rx_status;
7658
7659         memset(&rx_status, 0, sizeof(rx_status));
7660         prep_mac80211_status(wlc, rxh, p, &rx_status);
7661
7662         /* mac header+body length, exclude CRC and plcp header */
7663         len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7664         skb_pull(p, D11_PHY_HDR_LEN);
7665         __skb_trim(p, len_mpdu);
7666
7667         memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7668         ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7669 }
7670
7671 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7672  * number of bytes goes in the length field
7673  *
7674  * Formula given by HT PHY Spec v 1.13
7675  *   len = 3(nsyms + nstream + 3) - 3
7676  */
7677 u16
7678 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
7679                       uint mac_len)
7680 {
7681         uint nsyms, len = 0, kNdps;
7682
7683         BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
7684                  wlc->pub->unit, rspec2rate(ratespec), mac_len);
7685
7686         if (is_mcs_rate(ratespec)) {
7687                 uint mcs = ratespec & RSPEC_RATE_MASK;
7688                 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
7689                                   rspec_stc(ratespec);
7690
7691                 /*
7692                  * the payload duration calculation matches that
7693                  * of regular ofdm
7694                  */
7695                 /* 1000Ndbps = kbps * 4 */
7696                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
7697                                    rspec_issgi(ratespec)) * 4;
7698
7699                 if (rspec_stc(ratespec) == 0)
7700                         nsyms =
7701                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7702                                   APHY_TAIL_NBITS) * 1000, kNdps);
7703                 else
7704                         /* STBC needs to have even number of symbols */
7705                         nsyms =
7706                             2 *
7707                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7708                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
7709
7710                 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7711                 nsyms += (tot_streams + 3);
7712                 /*
7713                  * 3 bytes/symbol @ legacy 6Mbps rate
7714                  * (-3) excluding service bits and tail bits
7715                  */
7716                 len = (3 * nsyms) - 3;
7717         }
7718
7719         return (u16) len;
7720 }
7721
7722 static void
7723 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
7724 {
7725         const struct brcms_c_rateset *rs_dflt;
7726         struct brcms_c_rateset rs;
7727         u8 rate;
7728         u16 entry_ptr;
7729         u8 plcp[D11_PHY_HDR_LEN];
7730         u16 dur, sifs;
7731         uint i;
7732
7733         sifs = get_sifs(wlc->band);
7734
7735         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
7736
7737         brcms_c_rateset_copy(rs_dflt, &rs);
7738         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7739
7740         /*
7741          * walk the phy rate table and update MAC core SHM
7742          * basic rate table entries
7743          */
7744         for (i = 0; i < rs.count; i++) {
7745                 rate = rs.rates[i] & BRCMS_RATE_MASK;
7746
7747                 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7748
7749                 /* Calculate the Probe Response PLCP for the given rate */
7750                 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
7751
7752                 /*
7753                  * Calculate the duration of the Probe Response
7754                  * frame plus SIFS for the MAC
7755                  */
7756                 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
7757                                                 BRCMS_LONG_PREAMBLE, frame_len);
7758                 dur += sifs;
7759
7760                 /* Update the SHM Rate Table entry Probe Response values */
7761                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7762                               (u16) (plcp[0] + (plcp[1] << 8)));
7763                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7764                               (u16) (plcp[2] + (plcp[3] << 8)));
7765                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7766         }
7767 }
7768
7769 /*      Max buffering needed for beacon template/prb resp template is 142 bytes.
7770  *
7771  *      PLCP header is 6 bytes.
7772  *      802.11 A3 header is 24 bytes.
7773  *      Max beacon frame body template length is 112 bytes.
7774  *      Max probe resp frame body template length is 110 bytes.
7775  *
7776  *      *len on input contains the max length of the packet available.
7777  *
7778  *      The *len value is set to the number of bytes in buf used, and starts
7779  *      with the PLCP and included up to, but not including, the 4 byte FCS.
7780  */
7781 static void
7782 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
7783                          u32 bcn_rspec,
7784                          struct brcms_bss_cfg *cfg, u16 *buf, int *len)
7785 {
7786         static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
7787         struct cck_phy_hdr *plcp;
7788         struct ieee80211_mgmt *h;
7789         int hdr_len, body_len;
7790
7791         hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
7792
7793         /* calc buffer size provided for frame body */
7794         body_len = *len - hdr_len;
7795         /* return actual size */
7796         *len = hdr_len + body_len;
7797
7798         /* format PHY and MAC headers */
7799         memset((char *)buf, 0, hdr_len);
7800
7801         plcp = (struct cck_phy_hdr *) buf;
7802
7803         /*
7804          * PLCP for Probe Response frames are filled in from
7805          * core's rate table
7806          */
7807         if (type == IEEE80211_STYPE_BEACON)
7808                 /* fill in PLCP */
7809                 brcms_c_compute_plcp(wlc, bcn_rspec,
7810                                  (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
7811                                  (u8 *) plcp);
7812
7813         /* "Regular" and 16 MBSS but not for 4 MBSS */
7814         /* Update the phytxctl for the beacon based on the rspec */
7815         brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
7816
7817         h = (struct ieee80211_mgmt *)&plcp[1];
7818
7819         /* fill in 802.11 header */
7820         h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
7821
7822         /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
7823         /* A1 filled in by MAC for prb resp, broadcast for bcn */
7824         if (type == IEEE80211_STYPE_BEACON)
7825                 memcpy(&h->da, &ether_bcast, ETH_ALEN);
7826         memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
7827         memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
7828
7829         /* SEQ filled in by MAC */
7830 }
7831
7832 int brcms_c_get_header_len(void)
7833 {
7834         return TXOFF;
7835 }
7836
7837 /*
7838  * Update all beacons for the system.
7839  */
7840 void brcms_c_update_beacon(struct brcms_c_info *wlc)
7841 {
7842         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7843
7844         if (bsscfg->up && !bsscfg->BSS)
7845                 /* Clear the soft intmask */
7846                 wlc->defmacintmask &= ~MI_BCNTPL;
7847 }
7848
7849 /* Write ssid into shared memory */
7850 static void
7851 brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
7852 {
7853         u8 *ssidptr = cfg->SSID;
7854         u16 base = M_SSID;
7855         u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
7856
7857         /* padding the ssid with zero and copy it into shm */
7858         memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
7859         memcpy(ssidbuf, ssidptr, cfg->SSID_len);
7860
7861         brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
7862         brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
7863 }
7864
7865 static void
7866 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
7867                               struct brcms_bss_cfg *cfg,
7868                               bool suspend)
7869 {
7870         u16 prb_resp[BCN_TMPL_LEN / 2];
7871         int len = BCN_TMPL_LEN;
7872
7873         /*
7874          * write the probe response to hardware, or save in
7875          * the config structure
7876          */
7877
7878         /* create the probe response template */
7879         brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
7880                                  cfg, prb_resp, &len);
7881
7882         if (suspend)
7883                 brcms_c_suspend_mac_and_wait(wlc);
7884
7885         /* write the probe response into the template region */
7886         brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
7887                                     (len + 3) & ~3, prb_resp);
7888
7889         /* write the length of the probe response frame (+PLCP/-FCS) */
7890         brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
7891
7892         /* write the SSID and SSID length */
7893         brcms_c_shm_ssid_upd(wlc, cfg);
7894
7895         /*
7896          * Write PLCP headers and durations for probe response frames
7897          * at all rates. Use the actual frame length covered by the
7898          * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
7899          * by subtracting the PLCP len and adding the FCS.
7900          */
7901         len += (-D11_PHY_HDR_LEN + FCS_LEN);
7902         brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
7903
7904         if (suspend)
7905                 brcms_c_enable_mac(wlc);
7906 }
7907
7908 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
7909 {
7910         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7911
7912         /* update AP or IBSS probe responses */
7913         if (bsscfg->up && !bsscfg->BSS)
7914                 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
7915 }
7916
7917 /* prepares pdu for transmission. returns BCM error codes */
7918 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
7919 {
7920         uint fifo;
7921         struct d11txh *txh;
7922         struct ieee80211_hdr *h;
7923         struct scb *scb;
7924
7925         txh = (struct d11txh *) (pdu->data);
7926         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
7927
7928         /* get the pkt queue info. This was put at brcms_c_sendctl or
7929          * brcms_c_send for PDU */
7930         fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
7931
7932         scb = NULL;
7933
7934         *fifop = fifo;
7935
7936         /* return if insufficient dma resources */
7937         if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
7938                 /* Mark precedences related to this FIFO, unsendable */
7939                 /* A fifo is full. Clear precedences related to that FIFO */
7940                 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
7941                 return -EBUSY;
7942         }
7943         return 0;
7944 }
7945
7946 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
7947                            uint *blocks)
7948 {
7949         if (fifo >= NFIFO)
7950                 return -EINVAL;
7951
7952         *blocks = wlc_hw->xmtfifo_sz[fifo];
7953
7954         return 0;
7955 }
7956
7957 void
7958 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
7959                   const u8 *addr)
7960 {
7961         brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
7962         if (match_reg_offset == RCM_BSSID_OFFSET)
7963                 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
7964 }
7965
7966 /*
7967  * Flag 'scan in progress' to withhold dynamic phy calibration
7968  */
7969 void brcms_c_scan_start(struct brcms_c_info *wlc)
7970 {
7971         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
7972 }
7973
7974 void brcms_c_scan_stop(struct brcms_c_info *wlc)
7975 {
7976         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
7977 }
7978
7979 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
7980 {
7981         wlc->pub->associated = state;
7982         wlc->bsscfg->associated = state;
7983 }
7984
7985 /*
7986  * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
7987  * AMPDU traffic, packets pending in hardware have to be invalidated so that
7988  * when later on hardware releases them, they can be handled appropriately.
7989  */
7990 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
7991                                struct ieee80211_sta *sta,
7992                                void (*dma_callback_fn))
7993 {
7994         struct dma_pub *dmah;
7995         int i;
7996         for (i = 0; i < NFIFO; i++) {
7997                 dmah = hw->di[i];
7998                 if (dmah != NULL)
7999                         dma_walk_packets(dmah, dma_callback_fn, sta);
8000         }
8001 }
8002
8003 int brcms_c_get_curband(struct brcms_c_info *wlc)
8004 {
8005         return wlc->band->bandunit;
8006 }
8007
8008 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
8009 {
8010         /* flush packet queue when requested */
8011         if (drop)
8012                 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
8013
8014         /* wait for queue and DMA fifos to run dry */
8015         while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0)
8016                 brcms_msleep(wlc->wl, 1);
8017 }
8018
8019 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
8020 {
8021         wlc->bcn_li_bcn = interval;
8022         if (wlc->pub->up)
8023                 brcms_c_bcn_li_upd(wlc);
8024 }
8025
8026 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
8027 {
8028         uint qdbm;
8029
8030         /* Remove override bit and clip to max qdbm value */
8031         qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
8032         return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8033 }
8034
8035 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8036 {
8037         uint qdbm;
8038         bool override;
8039
8040         wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8041
8042         /* Return qdbm units */
8043         return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8044 }
8045
8046 /* Process received frames */
8047 /*
8048  * Return true if more frames need to be processed. false otherwise.
8049  * Param 'bound' indicates max. # frames to process before break out.
8050  */
8051 static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8052 {
8053         struct d11rxhdr *rxh;
8054         struct ieee80211_hdr *h;
8055         uint len;
8056         bool is_amsdu;
8057
8058         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8059
8060         /* frame starts with rxhdr */
8061         rxh = (struct d11rxhdr *) (p->data);
8062
8063         /* strip off rxhdr */
8064         skb_pull(p, BRCMS_HWRXOFF);
8065
8066         /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8067         if (rxh->RxStatus1 & RXS_PBPRES) {
8068                 if (p->len < 2) {
8069                         wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8070                                   "len %d\n", wlc->pub->unit, p->len);
8071                         goto toss;
8072                 }
8073                 skb_pull(p, 2);
8074         }
8075
8076         h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8077         len = p->len;
8078
8079         if (rxh->RxStatus1 & RXS_FCSERR) {
8080                 if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) {
8081                         wiphy_err(wlc->wiphy, "FCSERR while scanning******* -"
8082                                   " tossing\n");
8083                         goto toss;
8084                 } else {
8085                         wiphy_err(wlc->wiphy, "RCSERR!!!\n");
8086                         goto toss;
8087                 }
8088         }
8089
8090         /* check received pkt has at least frame control field */
8091         if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8092                 goto toss;
8093
8094         /* not supporting A-MSDU */
8095         is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8096         if (is_amsdu)
8097                 goto toss;
8098
8099         brcms_c_recvctl(wlc, rxh, p);
8100         return;
8101
8102  toss:
8103         brcmu_pkt_buf_free_skb(p);
8104 }
8105
8106 /* Process received frames */
8107 /*
8108  * Return true if more frames need to be processed. false otherwise.
8109  * Param 'bound' indicates max. # frames to process before break out.
8110  */
8111 static bool
8112 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
8113 {
8114         struct sk_buff *p;
8115         struct sk_buff *head = NULL;
8116         struct sk_buff *tail = NULL;
8117         uint n = 0;
8118         uint bound_limit = bound ? RXBND : -1;
8119
8120         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
8121         /* gather received frames */
8122         while ((p = dma_rx(wlc_hw->di[fifo]))) {
8123
8124                 if (!tail)
8125                         head = tail = p;
8126                 else {
8127                         tail->prev = p;
8128                         tail = p;
8129                 }
8130
8131                 /* !give others some time to run! */
8132                 if (++n >= bound_limit)
8133                         break;
8134         }
8135
8136         /* post more rbufs */
8137         dma_rxfill(wlc_hw->di[fifo]);
8138
8139         /* process each frame */
8140         while ((p = head) != NULL) {
8141                 struct d11rxhdr_le *rxh_le;
8142                 struct d11rxhdr *rxh;
8143                 head = head->prev;
8144                 p->prev = NULL;
8145
8146                 rxh_le = (struct d11rxhdr_le *)p->data;
8147                 rxh = (struct d11rxhdr *)p->data;
8148
8149                 /* fixup rx header endianness */
8150                 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
8151                 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
8152                 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
8153                 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
8154                 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
8155                 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
8156                 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
8157                 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
8158                 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
8159                 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
8160                 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
8161
8162                 brcms_c_recv(wlc_hw->wlc, p);
8163         }
8164
8165         return n >= bound_limit;
8166 }
8167
8168 /* second-level interrupt processing
8169  *   Return true if another dpc needs to be re-scheduled. false otherwise.
8170  *   Param 'bounded' indicates if applicable loops should be bounded.
8171  */
8172 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
8173 {
8174         u32 macintstatus;
8175         struct brcms_hardware *wlc_hw = wlc->hw;
8176         struct d11regs __iomem *regs = wlc_hw->regs;
8177         struct wiphy *wiphy = wlc->wiphy;
8178
8179         if (brcms_deviceremoved(wlc)) {
8180                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
8181                           __func__);
8182                 brcms_down(wlc->wl);
8183                 return false;
8184         }
8185
8186         /* grab and clear the saved software intstatus bits */
8187         macintstatus = wlc->macintstatus;
8188         wlc->macintstatus = 0;
8189
8190         BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
8191                wlc_hw->unit, macintstatus);
8192
8193         WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
8194
8195         /* tx status */
8196         if (macintstatus & MI_TFS) {
8197                 bool fatal;
8198                 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
8199                         wlc->macintstatus |= MI_TFS;
8200                 if (fatal) {
8201                         wiphy_err(wiphy, "MI_TFS: fatal\n");
8202                         goto fatal;
8203                 }
8204         }
8205
8206         if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
8207                 brcms_c_tbtt(wlc);
8208
8209         /* ATIM window end */
8210         if (macintstatus & MI_ATIMWINEND) {
8211                 BCMMSG(wlc->wiphy, "end of ATIM window\n");
8212                 OR_REG(&regs->maccommand, wlc->qvalid);
8213                 wlc->qvalid = 0;
8214         }
8215
8216         /*
8217          * received data or control frame, MI_DMAINT is
8218          * indication of RX_FIFO interrupt
8219          */
8220         if (macintstatus & MI_DMAINT)
8221                 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
8222                         wlc->macintstatus |= MI_DMAINT;
8223
8224         /* noise sample collected */
8225         if (macintstatus & MI_BG_NOISE)
8226                 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
8227
8228         if (macintstatus & MI_GP0) {
8229                 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
8230                         "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
8231
8232                 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8233                                         __func__, wlc_hw->sih->chip,
8234                                         wlc_hw->sih->chiprev);
8235                 brcms_fatal_error(wlc_hw->wlc->wl);
8236         }
8237
8238         /* gptimer timeout */
8239         if (macintstatus & MI_TO)
8240                 W_REG(&regs->gptimer, 0);
8241
8242         if (macintstatus & MI_RFDISABLE) {
8243                 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
8244                        " RF Disable Input\n", wlc_hw->unit);
8245                 brcms_rfkill_set_hw_state(wlc->wl);
8246         }
8247
8248         /* send any enq'd tx packets. Just makes sure to jump start tx */
8249         if (!pktq_empty(&wlc->pkt_queue->q))
8250                 brcms_c_send_q(wlc);
8251
8252         /* it isn't done and needs to be resched if macintstatus is non-zero */
8253         return wlc->macintstatus != 0;
8254
8255  fatal:
8256         brcms_fatal_error(wlc_hw->wlc->wl);
8257         return wlc->macintstatus != 0;
8258 }
8259
8260 void brcms_c_init(struct brcms_c_info *wlc)
8261 {
8262         struct d11regs __iomem *regs;
8263         u16 chanspec;
8264         bool mute = false;
8265
8266         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8267
8268         regs = wlc->regs;
8269
8270         /*
8271          * This will happen if a big-hammer was executed. In
8272          * that case, we want to go back to the channel that
8273          * we were on and not new channel
8274          */
8275         if (wlc->pub->associated)
8276                 chanspec = wlc->home_chanspec;
8277         else
8278                 chanspec = brcms_c_init_chanspec(wlc);
8279
8280         brcms_b_init(wlc->hw, chanspec, mute);
8281
8282         /* update beacon listen interval */
8283         brcms_c_bcn_li_upd(wlc);
8284
8285         /* write ethernet address to core */
8286         brcms_c_set_mac(wlc->bsscfg);
8287         brcms_c_set_bssid(wlc->bsscfg);
8288
8289         /* Update tsf_cfprep if associated and up */
8290         if (wlc->pub->associated && wlc->bsscfg->up) {
8291                 u32 bi;
8292
8293                 /* get beacon period and convert to uS */
8294                 bi = wlc->bsscfg->current_bss->beacon_period << 10;
8295                 /*
8296                  * update since init path would reset
8297                  * to default value
8298                  */
8299                 W_REG(&regs->tsf_cfprep,
8300                       (bi << CFPREP_CBI_SHIFT));
8301
8302                 /* Update maccontrol PM related bits */
8303                 brcms_c_set_ps_ctrl(wlc);
8304         }
8305
8306         brcms_c_bandinit_ordered(wlc, chanspec);
8307
8308         /* init probe response timeout */
8309         brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
8310
8311         /* init max burst txop (framebursting) */
8312         brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
8313                       (wlc->
8314                        _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
8315
8316         /* initialize maximum allowed duty cycle */
8317         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
8318         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
8319
8320         /*
8321          * Update some shared memory locations related to
8322          * max AMPDU size allowed to received
8323          */
8324         brcms_c_ampdu_shm_upd(wlc->ampdu);
8325
8326         /* band-specific inits */
8327         brcms_c_bsinit(wlc);
8328
8329         /* Enable EDCF mode (while the MAC is suspended) */
8330         OR_REG(&regs->ifs_ctl, IFS_USEEDCF);
8331         brcms_c_edcf_setparams(wlc, false);
8332
8333         /* Init precedence maps for empty FIFOs */
8334         brcms_c_tx_prec_map_init(wlc);
8335
8336         /* read the ucode version if we have not yet done so */
8337         if (wlc->ucode_rev == 0) {
8338                 wlc->ucode_rev =
8339                     brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
8340                 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
8341         }
8342
8343         /* ..now really unleash hell (allow the MAC out of suspend) */
8344         brcms_c_enable_mac(wlc);
8345
8346         /* clear tx flow control */
8347         brcms_c_txflowcontrol_reset(wlc);
8348
8349         /* enable the RF Disable Delay timer */
8350         W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT);
8351
8352         /*
8353          * Initialize WME parameters; if they haven't been set by some other
8354          * mechanism (IOVar, etc) then read them from the hardware.
8355          */
8356         if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
8357                 /* Uninitialized; read from HW */
8358                 int ac;
8359
8360                 for (ac = 0; ac < AC_COUNT; ac++)
8361                         wlc->wme_retries[ac] =
8362                             brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
8363         }
8364 }
8365
8366 /*
8367  * The common driver entry routine. Error codes should be unique
8368  */
8369 struct brcms_c_info *
8370 brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
8371                bool piomode, void __iomem *regsva, struct pci_dev *btparam,
8372                uint *perr)
8373 {
8374         struct brcms_c_info *wlc;
8375         uint err = 0;
8376         uint i, j;
8377         struct brcms_pub *pub;
8378
8379         /* allocate struct brcms_c_info state and its substructures */
8380         wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device);
8381         if (wlc == NULL)
8382                 goto fail;
8383         wlc->wiphy = wl->wiphy;
8384         pub = wlc->pub;
8385
8386 #if defined(BCMDBG)
8387         wlc_info_dbg = wlc;
8388 #endif
8389
8390         wlc->band = wlc->bandstate[0];
8391         wlc->core = wlc->corestate;
8392         wlc->wl = wl;
8393         pub->unit = unit;
8394         pub->_piomode = piomode;
8395         wlc->bandinit_pending = false;
8396
8397         /* populate struct brcms_c_info with default values  */
8398         brcms_c_info_init(wlc, unit);
8399
8400         /* update sta/ap related parameters */
8401         brcms_c_ap_upd(wlc);
8402
8403         /*
8404          * low level attach steps(all hw accesses go
8405          * inside, no more in rest of the attach)
8406          */
8407         err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva,
8408                              btparam);
8409         if (err)
8410                 goto fail;
8411
8412         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
8413
8414         pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
8415
8416         /* disable allowed duty cycle */
8417         wlc->tx_duty_cycle_ofdm = 0;
8418         wlc->tx_duty_cycle_cck = 0;
8419
8420         brcms_c_stf_phy_chain_calc(wlc);
8421
8422         /* txchain 1: txant 0, txchain 2: txant 1 */
8423         if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
8424                 wlc->stf->txant = wlc->stf->hw_txchain - 1;
8425
8426         /* push to BMAC driver */
8427         wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
8428                                wlc->stf->hw_rxchain);
8429
8430         /* pull up some info resulting from the low attach */
8431         for (i = 0; i < NFIFO; i++)
8432                 wlc->core->txavail[i] = wlc->hw->txavail[i];
8433
8434         memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8435         memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8436
8437         for (j = 0; j < wlc->pub->_nbands; j++) {
8438                 wlc->band = wlc->bandstate[j];
8439
8440                 if (!brcms_c_attach_stf_ant_init(wlc)) {
8441                         err = 24;
8442                         goto fail;
8443                 }
8444
8445                 /* default contention windows size limits */
8446                 wlc->band->CWmin = APHY_CWMIN;
8447                 wlc->band->CWmax = PHY_CWMAX;
8448
8449                 /* init gmode value */
8450                 if (wlc->band->bandtype == BRCM_BAND_2G) {
8451                         wlc->band->gmode = GMODE_AUTO;
8452                         brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
8453                                            wlc->band->gmode);
8454                 }
8455
8456                 /* init _n_enab supported mode */
8457                 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8458                         pub->_n_enab = SUPPORT_11N;
8459                         brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
8460                                                    ((pub->_n_enab ==
8461                                                      SUPPORT_11N) ? WL_11N_2x2 :
8462                                                     WL_11N_3x3));
8463                 }
8464
8465                 /* init per-band default rateset, depend on band->gmode */
8466                 brcms_default_rateset(wlc, &wlc->band->defrateset);
8467
8468                 /* fill in hw_rateset */
8469                 brcms_c_rateset_filter(&wlc->band->defrateset,
8470                                    &wlc->band->hw_rateset, false,
8471                                    BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
8472                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
8473         }
8474
8475         /*
8476          * update antenna config due to
8477          * wlc->stf->txant/txchain/ant_rx_ovr change
8478          */
8479         brcms_c_stf_phy_txant_upd(wlc);
8480
8481         /* attach each modules */
8482         err = brcms_c_attach_module(wlc);
8483         if (err != 0)
8484                 goto fail;
8485
8486         if (!brcms_c_timers_init(wlc, unit)) {
8487                 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8488                           __func__);
8489                 err = 32;
8490                 goto fail;
8491         }
8492
8493         /* depend on rateset, gmode */
8494         wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8495         if (!wlc->cmi) {
8496                 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8497                           "\n", unit, __func__);
8498                 err = 33;
8499                 goto fail;
8500         }
8501
8502         /* init default when all parameters are ready, i.e. ->rateset */
8503         brcms_c_bss_default_init(wlc);
8504
8505         /*
8506          * Complete the wlc default state initializations..
8507          */
8508
8509         /* allocate our initial queue */
8510         wlc->pkt_queue = brcms_c_txq_alloc(wlc);
8511         if (wlc->pkt_queue == NULL) {
8512                 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
8513                           unit, __func__);
8514                 err = 100;
8515                 goto fail;
8516         }
8517
8518         wlc->bsscfg->wlc = wlc;
8519
8520         wlc->mimoft = FT_HT;
8521         wlc->mimo_40txbw = AUTO;
8522         wlc->ofdm_40txbw = AUTO;
8523         wlc->cck_40txbw = AUTO;
8524         brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
8525
8526         /* Set default values of SGI */
8527         if (BRCMS_SGI_CAP_PHY(wlc)) {
8528                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8529                                                BRCMS_N_SGI_40));
8530         } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8531                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8532                                                BRCMS_N_SGI_40));
8533         } else {
8534                 brcms_c_ht_update_sgi_rx(wlc, 0);
8535         }
8536
8537         brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8538
8539         if (perr)
8540                 *perr = 0;
8541
8542         return wlc;
8543
8544  fail:
8545         wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
8546                   unit, __func__, err);
8547         if (wlc)
8548                 brcms_c_detach(wlc);
8549
8550         if (perr)
8551                 *perr = err;
8552         return NULL;
8553 }