2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/pci_ids.h>
18 #include <linux/if_ether.h>
19 #include <net/mac80211.h>
20 #include <brcm_hw_ids.h>
22 #include <chipcommon.h>
25 #include "phy/phy_hal.h"
30 #include "mac80211_if.h"
31 #include "ucode_loader.h"
35 * Indication for txflowcontrol that all priority bits in
36 * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
41 * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
43 #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
45 /* watchdog timer, in unit of ms */
46 #define TIMER_INTERVAL_WATCHDOG 1000
47 /* radio monitor timer, in unit of ms */
48 #define TIMER_INTERVAL_RADIOCHK 800
50 /* Max MPC timeout, in unit of watchdog */
51 #ifndef BRCMS_MPC_MAX_DELAYCNT
52 #define BRCMS_MPC_MAX_DELAYCNT 10
55 /* Min MPC timeout, in unit of watchdog */
56 #define BRCMS_MPC_MIN_DELAYCNT 1
57 #define BRCMS_MPC_THRESHOLD 3 /* MPC count threshold level */
59 /* beacon interval, in unit of 1024TU */
60 #define BEACON_INTERVAL_DEFAULT 100
61 /* DTIM interval, in unit of beacon interval */
62 #define DTIM_INTERVAL_DEFAULT 3
64 /* Scale down delays to accommodate QT slow speed */
65 /* beacon interval, in unit of 1024TU */
66 #define BEACON_INTERVAL_DEF_QT 20
67 /* DTIM interval, in unit of beacon interval */
68 #define DTIM_INTERVAL_DEF_QT 1
70 #define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */
72 /* n-mode support capability */
73 /* 2x2 includes both 1x1 & 2x2 devices
74 * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
75 * control it independently
81 /* define 11n feature disable flags */
82 #define WLFEATURE_DISABLE_11N 0x00000001
83 #define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002
84 #define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004
85 #define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008
86 #define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010
87 #define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020
88 #define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040
89 #define WLFEATURE_DISABLE_11N_GF 0x00000080
91 #define EDCF_ACI_MASK 0x60
92 #define EDCF_ACI_SHIFT 5
93 #define EDCF_ECWMIN_MASK 0x0f
94 #define EDCF_ECWMAX_SHIFT 4
95 #define EDCF_AIFSN_MASK 0x0f
96 #define EDCF_AIFSN_MAX 15
97 #define EDCF_ECWMAX_MASK 0xf0
99 #define EDCF_AC_BE_TXOP_STA 0x0000
100 #define EDCF_AC_BK_TXOP_STA 0x0000
101 #define EDCF_AC_VO_ACI_STA 0x62
102 #define EDCF_AC_VO_ECW_STA 0x32
103 #define EDCF_AC_VI_ACI_STA 0x42
104 #define EDCF_AC_VI_ECW_STA 0x43
105 #define EDCF_AC_BK_ECW_STA 0xA4
106 #define EDCF_AC_VI_TXOP_STA 0x005e
107 #define EDCF_AC_VO_TXOP_STA 0x002f
108 #define EDCF_AC_BE_ACI_STA 0x03
109 #define EDCF_AC_BE_ECW_STA 0xA4
110 #define EDCF_AC_BK_ACI_STA 0x27
111 #define EDCF_AC_VO_TXOP_AP 0x002f
113 #define EDCF_TXOP2USEC(txop) ((txop) << 5)
114 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
116 #define APHY_SYMBOL_TIME 4
117 #define APHY_PREAMBLE_TIME 16
118 #define APHY_SIGNAL_TIME 4
119 #define APHY_SIFS_TIME 16
120 #define APHY_SERVICE_NBITS 16
121 #define APHY_TAIL_NBITS 6
122 #define BPHY_SIFS_TIME 10
123 #define BPHY_PLCP_SHORT_TIME 96
125 #define PREN_PREAMBLE 24
126 #define PREN_MM_EXT 12
127 #define PREN_PREAMBLE_EXT 4
129 #define DOT11_MAC_HDR_LEN 24
130 #define DOT11_ACK_LEN 10
131 #define DOT11_BA_LEN 4
132 #define DOT11_OFDM_SIGNAL_EXTENSION 6
133 #define DOT11_MIN_FRAG_LEN 256
134 #define DOT11_RTS_LEN 16
135 #define DOT11_CTS_LEN 10
136 #define DOT11_BA_BITMAP_LEN 128
137 #define DOT11_MIN_BEACON_PERIOD 1
138 #define DOT11_MAX_BEACON_PERIOD 0xFFFF
139 #define DOT11_MAXNUMFRAGS 16
140 #define DOT11_MAX_FRAG_LEN 2346
142 #define BPHY_PLCP_TIME 192
143 #define RIFS_11N_TIME 2
146 #define WME_SUBTYPE_PARAM_IE 1
148 #define WME_OUI "\x00\x50\xf2"
155 #define BCN_TMPL_LEN 512 /* length of the BCN template area */
157 /* brcms_bss_info flag bit values */
158 #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */
160 /* Flags used in brcms_c_txq_info.stopped */
161 /* per prio flow control bits */
162 #define TXQ_STOP_FOR_PRIOFC_MASK 0x000000FF
163 /* stop txq enqueue for packet drain */
164 #define TXQ_STOP_FOR_PKT_DRAIN 0x00000100
165 /* stop txq enqueue for ampdu flow control */
166 #define TXQ_STOP_FOR_AMPDU_FLOW_CNTRL 0x00000200
168 #define BRCMS_HWRXOFF 38 /* chip rx buffer offset */
170 /* Find basic rate for a given rate */
171 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
173 if (is_mcs_rate(rspec))
174 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
176 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
179 static u16 frametype(u32 rspec, u8 mimoframe)
181 if (is_mcs_rate(rspec))
183 return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
186 /* rfdisable delay timer 500 ms, runs of ALP clock */
187 #define RFDISABLE_DEFAULT 10000000
189 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */
191 /* precedences numbers for wlc queues. These are twice as may levels as
193 * Odd numbers are used for HI priority traffic at same precedence levels
194 * These constants are used ONLY by wlc_prio2prec_map. Do not use them
197 #define _BRCMS_PREC_NONE 0 /* None = - */
198 #define _BRCMS_PREC_BK 2 /* BK - Background */
199 #define _BRCMS_PREC_BE 4 /* BE - Best-effort */
200 #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */
201 #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */
202 #define _BRCMS_PREC_VI 10 /* Vi - Video */
203 #define _BRCMS_PREC_VO 12 /* Vo - Voice */
204 #define _BRCMS_PREC_NC 14 /* NC - Network Control */
206 /* The BSS is generating beacons in HW */
207 #define BRCMS_BSSCFG_HW_BCN 0x20
209 #define SYNTHPU_DLY_APHY_US 3700 /* a phy synthpu_dly time in us */
210 #define SYNTHPU_DLY_BPHY_US 1050 /* b/g phy synthpu_dly time in us */
211 #define SYNTHPU_DLY_NPHY_US 2048 /* n phy REV3 synthpu_dly time in us */
212 #define SYNTHPU_DLY_LPPHY_US 300 /* lpphy synthpu_dly time in us */
214 #define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */
216 #define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */
218 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
219 #define EDCF_SHORT_S 0
221 #define EDCF_LONG_S 8
222 #define EDCF_LFB_S 12
223 #define EDCF_SHORT_M BITFIELD_MASK(4)
224 #define EDCF_SFB_M BITFIELD_MASK(4)
225 #define EDCF_LONG_M BITFIELD_MASK(4)
226 #define EDCF_LFB_M BITFIELD_MASK(4)
228 #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */
229 #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */
230 #define RETRY_LONG_DEF 4 /* Default Long retry count */
231 #define RETRY_SHORT_FB 3 /* Short count for fallback rate */
232 #define RETRY_LONG_FB 2 /* Long count for fallback rate */
234 #define APHY_CWMIN 15
235 #define PHY_CWMAX 1023
237 #define EDCF_AIFSN_MIN 1
239 #define FRAGNUM_MASK 0xF
241 #define APHY_SLOT_TIME 9
242 #define BPHY_SLOT_TIME 20
244 #define WL_SPURAVOID_OFF 0
245 #define WL_SPURAVOID_ON1 1
246 #define WL_SPURAVOID_ON2 2
248 /* invalid core flags, use the saved coreflags */
249 #define BRCMS_USE_COREFLAGS 0xffffffff
251 /* values for PLCPHdr_override */
252 #define BRCMS_PLCP_AUTO -1
253 #define BRCMS_PLCP_SHORT 0
254 #define BRCMS_PLCP_LONG 1
256 /* values for g_protection_override and n_protection_override */
257 #define BRCMS_PROTECTION_AUTO -1
258 #define BRCMS_PROTECTION_OFF 0
259 #define BRCMS_PROTECTION_ON 1
260 #define BRCMS_PROTECTION_MMHDR_ONLY 2
261 #define BRCMS_PROTECTION_CTS_ONLY 3
263 /* values for g_protection_control and n_protection_control */
264 #define BRCMS_PROTECTION_CTL_OFF 0
265 #define BRCMS_PROTECTION_CTL_LOCAL 1
266 #define BRCMS_PROTECTION_CTL_OVERLAP 2
268 /* values for n_protection */
269 #define BRCMS_N_PROTECTION_OFF 0
270 #define BRCMS_N_PROTECTION_OPTIONAL 1
271 #define BRCMS_N_PROTECTION_20IN40 2
272 #define BRCMS_N_PROTECTION_MIXEDMODE 3
274 /* values for band specific 40MHz capabilities */
275 #define BRCMS_N_BW_20ALL 0
276 #define BRCMS_N_BW_40ALL 1
277 #define BRCMS_N_BW_20IN2G_40IN5G 2
279 /* bitflags for SGI support (sgi_rx iovar) */
280 #define BRCMS_N_SGI_20 0x01
281 #define BRCMS_N_SGI_40 0x02
283 /* defines used by the nrate iovar */
284 /* MSC in use,indicates b0-6 holds an mcs */
285 #define NRATE_MCS_INUSE 0x00000080
287 #define NRATE_RATE_MASK 0x0000007f
288 /* stf mode mask: siso, cdd, stbc, sdm */
289 #define NRATE_STF_MASK 0x0000ff00
291 #define NRATE_STF_SHIFT 8
292 /* bit indicates override both rate & mode */
293 #define NRATE_OVERRIDE 0x80000000
294 /* bit indicate to override mcs only */
295 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
296 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
297 #define NRATE_SGI_SHIFT 23 /* sgi mode */
298 #define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */
299 #define NRATE_LDPC_SHIFT 22 /* ldpc shift */
301 #define NRATE_STF_SISO 0 /* stf mode SISO */
302 #define NRATE_STF_CDD 1 /* stf mode CDD */
303 #define NRATE_STF_STBC 2 /* stf mode STBC */
304 #define NRATE_STF_SDM 3 /* stf mode SDM */
306 #define MAX_DMA_SEGS 4
308 /* Max # of entries in Tx FIFO based on 4kb page size */
310 /* Max # of entries in Rx FIFO based on 4kb page size */
313 /* try to keep this # rbufs posted to the chip */
314 #define NRXBUFPOST 32
316 /* data msg txq hiwat mark */
317 #define BRCMS_DATAHIWAT 50
319 /* bounded rx loops */
320 #define RXBND 8 /* max # frames to process in brcms_c_recv() */
321 #define TXSBND 8 /* max # tx status to process in wlc_txstatus() */
324 * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
326 #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
329 * The following table lists the buffer memory allocated to xmt fifos in HW.
330 * the size is in units of 256bytes(one block), total size is HW dependent
331 * ucode has default fifo partition, sw can overwrite if necessary
333 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
334 * the twiki is updated before making changes.
337 /* Starting corerev for the fifo size table */
338 #define XMTFIFOTBL_STARTREV 20
346 /* currently the best mechanism for determining SIFS is the band in use */
347 static u16 get_sifs(struct brcms_band *band)
349 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
355 * Detect Card removed.
356 * Even checking an sbconfig register read will not false trigger when the core
357 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
358 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
359 * reg with fixed 0/1 pattern (some platforms return all 0).
360 * If clocks are present, call the sb routine which will figure out if the
363 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
366 return ai_deviceremoved(wlc->hw->sih);
367 return (R_REG(&wlc->hw->regs->maccontrol) &
368 (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
371 /* sum the individual fifo tx pending packet counts */
372 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
374 return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
375 wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
378 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
380 return wlc->pub->_nbands > 1 && !wlc->bandlocked;
383 static int brcms_chspec_bw(u16 chanspec)
385 if (CHSPEC_IS40(chanspec))
387 if (CHSPEC_IS20(chanspec))
393 struct edcf_acparam {
399 const u8 prio2fifo[NUMPRIO] = {
400 TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */
401 TX_AC_BK_FIFO, /* 1 BK AC_BK Background */
402 TX_AC_BK_FIFO, /* 2 -- AC_BK Background */
403 TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */
404 TX_AC_VI_FIFO, /* 4 CL AC_VI Video */
405 TX_AC_VI_FIFO, /* 5 VI AC_VI Video */
406 TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */
407 TX_AC_VO_FIFO /* 7 NC AC_VO Voice */
411 uint brcm_msg_level =
418 /* TX FIFO number to WME/802.1E Access Category */
419 static const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE };
421 /* WME/802.1E Access Category to TX FIFO number */
422 static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 };
424 /* 802.1D Priority to precedence queue mapping */
425 const u8 wlc_prio2prec_map[] = {
426 _BRCMS_PREC_BE, /* 0 BE - Best-effort */
427 _BRCMS_PREC_BK, /* 1 BK - Background */
428 _BRCMS_PREC_NONE, /* 2 None = - */
429 _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */
430 _BRCMS_PREC_CL, /* 4 CL - Controlled Load */
431 _BRCMS_PREC_VI, /* 5 Vi - Video */
432 _BRCMS_PREC_VO, /* 6 Vo - Voice */
433 _BRCMS_PREC_NC, /* 7 NC - Network Control */
436 static const u16 xmtfifo_sz[][NFIFO] = {
437 /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
438 {20, 192, 192, 21, 17, 5},
439 /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
440 {9, 58, 22, 14, 14, 5},
441 /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
442 {20, 192, 192, 21, 17, 5},
443 /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
444 {20, 192, 192, 21, 17, 5},
445 /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
446 {9, 58, 22, 14, 14, 5},
449 static const u8 acbitmap2maxprio[] = {
450 PRIO_8021D_BE, PRIO_8021D_BE, PRIO_8021D_BK, PRIO_8021D_BK,
451 PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI,
452 PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO,
453 PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO
457 static const char * const fifo_names[] = {
458 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
460 static const char fifo_names[6][0];
464 /* pointer to most recently allocated wl/wlc */
465 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
468 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
473 kfree(cfg->current_bss);
477 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
482 brcms_c_bsscfg_mfree(wlc->bsscfg);
484 kfree(wlc->modulecb);
485 kfree(wlc->default_bss);
486 kfree(wlc->protection);
488 kfree(wlc->bandstate[0]);
489 kfree(wlc->corestate->macstat_snapshot);
490 kfree(wlc->corestate);
491 kfree(wlc->hw->bandstate[0]);
499 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
501 struct brcms_bss_cfg *cfg;
503 cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
507 cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
508 if (cfg->current_bss == NULL)
514 brcms_c_bsscfg_mfree(cfg);
518 static struct brcms_c_info *
519 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
521 struct brcms_c_info *wlc;
523 wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
529 /* allocate struct brcms_c_pub state structure */
530 wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
531 if (wlc->pub == NULL) {
537 /* allocate struct brcms_hardware state structure */
539 wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
540 if (wlc->hw == NULL) {
546 wlc->hw->bandstate[0] =
547 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
548 if (wlc->hw->bandstate[0] == NULL) {
554 for (i = 1; i < MAXBANDS; i++)
555 wlc->hw->bandstate[i] = (struct brcms_hw_band *)
556 ((unsigned long)wlc->hw->bandstate[0] +
557 (sizeof(struct brcms_hw_band) * i));
561 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
562 if (wlc->modulecb == NULL) {
567 wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
568 if (wlc->default_bss == NULL) {
573 wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
574 if (wlc->bsscfg == NULL) {
579 wlc->protection = kzalloc(sizeof(struct brcms_protection),
581 if (wlc->protection == NULL) {
586 wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
587 if (wlc->stf == NULL) {
593 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
594 if (wlc->bandstate[0] == NULL) {
600 for (i = 1; i < MAXBANDS; i++)
601 wlc->bandstate[i] = (struct brcms_band *)
602 ((unsigned long)wlc->bandstate[0]
603 + (sizeof(struct brcms_band)*i));
606 wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
607 if (wlc->corestate == NULL) {
612 wlc->corestate->macstat_snapshot =
613 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
614 if (wlc->corestate->macstat_snapshot == NULL) {
622 brcms_c_detach_mfree(wlc);
627 * Update the slot timing for standard 11b/g (20us slots)
628 * or shortslot 11g (9us slots)
629 * The PSM needs to be suspended for this call.
631 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
634 struct d11regs __iomem *regs;
639 /* 11g short slot: 11a timing */
640 W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */
641 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
643 /* 11g long slot: 11b timing */
644 W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */
645 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
649 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
650 const struct d11init *inits)
658 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
660 base = (u8 __iomem *)wlc_hw->regs;
662 for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
663 size = le16_to_cpu(inits[i].size);
664 addr = base + le16_to_cpu(inits[i].addr);
665 value = le32_to_cpu(inits[i].value);
667 W_REG((u16 __iomem *)addr, value);
669 W_REG((u32 __iomem *)addr, value);
675 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
679 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
683 for (idx = 0; idx < MHFMAX; idx++)
684 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
687 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
689 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
690 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
692 /* init microcode host flags */
693 brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
695 /* do band-specific ucode IHR, SHM, and SCR inits */
696 if (D11REV_IS(wlc_hw->corerev, 23)) {
697 if (BRCMS_ISNPHY(wlc_hw->band))
698 brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
700 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
701 " %d\n", __func__, wlc_hw->unit,
704 if (D11REV_IS(wlc_hw->corerev, 24)) {
705 if (BRCMS_ISLCNPHY(wlc_hw->band))
706 brcms_c_write_inits(wlc_hw,
707 ucode->d11lcn0bsinitvals24);
709 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
710 " core rev %d\n", __func__,
711 wlc_hw->unit, wlc_hw->corerev);
713 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
714 __func__, wlc_hw->unit, wlc_hw->corerev);
719 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
721 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
723 wlc_hw->phyclk = clk;
725 if (OFF == clk) { /* clear gmode bit, put phy into reset */
727 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE),
728 (SICF_PRST | SICF_FGC));
730 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST);
733 } else { /* take phy out of reset */
735 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC);
737 ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0);
743 /* switch to new band but leave it inactive */
744 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
746 struct brcms_hardware *wlc_hw = wlc->hw;
749 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
751 WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
753 /* disable interrupts */
754 macintmask = brcms_intrsoff(wlc->wl);
757 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
759 brcms_b_core_phy_clk(wlc_hw, OFF);
761 brcms_c_setxband(wlc_hw, bandunit);
766 /* Process received frames */
768 * Return true if more frames need to be processed. false otherwise.
769 * Param 'bound' indicates max. # frames to process before break out.
772 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
775 struct sk_buff *head = NULL;
776 struct sk_buff *tail = NULL;
778 uint bound_limit = bound ? RXBND : -1;
780 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
781 /* gather received frames */
782 while ((p = dma_rx(wlc_hw->di[fifo]))) {
791 /* !give others some time to run! */
792 if (++n >= bound_limit)
796 /* post more rbufs */
797 dma_rxfill(wlc_hw->di[fifo]);
799 /* process each frame */
800 while ((p = head) != NULL) {
801 struct d11rxhdr_le *rxh_le;
802 struct d11rxhdr *rxh;
806 rxh_le = (struct d11rxhdr_le *)p->data;
807 rxh = (struct d11rxhdr *)p->data;
809 /* fixup rx header endianness */
810 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
811 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
812 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
813 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
814 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
815 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
816 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
817 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
818 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
819 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
820 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
822 brcms_c_recv(wlc_hw->wlc, p);
825 return n >= bound_limit;
828 /* process an individual struct tx_status */
830 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
835 struct scb *scb = NULL;
837 int tx_rts, tx_frame_count, tx_rts_count;
838 uint totlen, supr_status;
840 struct ieee80211_hdr *h;
842 struct ieee80211_tx_info *tx_info;
843 struct ieee80211_tx_rate *txrate;
846 /* discard intermediate indications for ucode with one legitimate case:
847 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
848 * but the subsequent tx of DATA failed. so it will start rts/cts
849 * from the beginning (resetting the rts transmission count)
851 if (!(txs->status & TX_STATUS_AMPDU)
852 && (txs->status & TX_STATUS_INTERMEDIATE)) {
853 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
858 queue = txs->frameid & TXFID_QUEUE_MASK;
859 if (queue >= NFIFO) {
864 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
868 txh = (struct d11txh *) (p->data);
869 mcl = le16_to_cpu(txh->MacTxControlLow);
872 if (brcm_msg_level & LOG_ERROR_VAL) {
873 wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
874 txs->phyerr, txh->MainRates);
875 brcms_c_print_txdesc(txh);
877 brcms_c_print_txstatus(txs);
880 if (txs->frameid != le16_to_cpu(txh->TxFrameID))
882 tx_info = IEEE80211_SKB_CB(p);
883 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
885 if (tx_info->control.sta)
888 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
889 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
893 supr_status = txs->status & TX_STATUS_SUPR_MASK;
894 if (supr_status == TX_STATUS_SUPR_BADCH)
896 "%s: Pkt tx suppressed, possibly channel %d\n",
897 __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
899 tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
901 (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
903 (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
905 lastframe = !ieee80211_has_morefrags(h->frame_control);
908 wiphy_err(wlc->wiphy, "Not last frame!\n");
911 * Set information to be consumed by Minstrel ht.
913 * The "fallback limit" is the number of tx attempts a given
914 * MPDU is sent at the "primary" rate. Tx attempts beyond that
915 * limit are sent at the "secondary" rate.
916 * A 'short frame' does not exceed RTS treshold.
918 u16 sfbl, /* Short Frame Rate Fallback Limit */
919 lfbl, /* Long Frame Rate Fallback Limit */
922 if (queue < AC_COUNT) {
923 sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
925 lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
932 txrate = tx_info->status.rates;
933 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
938 ieee80211_tx_info_clear_status(tx_info);
940 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
942 * rate selection requested a fallback rate
945 txrate[0].count = fbl;
946 txrate[1].count = tx_frame_count - fbl;
949 * rate selection did not request fallback rate, or
952 txrate[0].count = tx_frame_count;
954 * rc80211_minstrel.c:minstrel_tx_status() expects
955 * unused rates to be marked with idx = -1
961 /* clear the rest of the rates */
962 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
967 if (txs->status & TX_STATUS_ACK_RCV)
968 tx_info->flags |= IEEE80211_TX_STAT_ACK;
971 totlen = brcmu_pkttotlen(p);
974 brcms_c_txfifo_complete(wlc, queue, 1);
979 /* remove PLCP & Broadcom tx descriptor header */
980 skb_pull(p, D11_PHY_HDR_LEN);
981 skb_pull(p, D11_TXH_LEN);
982 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
984 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
985 "tx_status\n", __func__);
992 brcmu_pkt_buf_free_skb(p);
998 /* process tx completion events in BMAC
999 * Return true if more tx status need to be processed. false otherwise.
1002 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
1004 bool morepending = false;
1005 struct brcms_c_info *wlc = wlc_hw->wlc;
1006 struct d11regs __iomem *regs;
1007 struct tx_status txstatus, *txs;
1011 * Param 'max_tx_num' indicates max. # tx status to process before
1014 uint max_tx_num = bound ? TXSBND : -1;
1016 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1019 regs = wlc_hw->regs;
1022 && (s1 = R_REG(®s->frmtxstatus)) & TXS_V) {
1024 if (s1 == 0xffffffff) {
1025 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1026 wlc_hw->unit, __func__);
1030 s2 = R_REG(®s->frmtxstatus2);
1032 txs->status = s1 & TXS_STATUS_MASK;
1033 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1034 txs->sequence = s2 & TXS_SEQ_MASK;
1035 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1036 txs->lasttxtime = 0;
1038 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1040 /* !give others some time to run! */
1041 if (++n >= max_tx_num)
1048 if (n >= max_tx_num)
1051 if (!pktq_empty(&wlc->pkt_queue->q))
1052 brcms_c_send_q(wlc);
1057 /* second-level interrupt processing
1058 * Return true if another dpc needs to be re-scheduled. false otherwise.
1059 * Param 'bounded' indicates if applicable loops should be bounded.
1061 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
1064 struct brcms_hardware *wlc_hw = wlc->hw;
1065 struct d11regs __iomem *regs = wlc_hw->regs;
1066 struct wiphy *wiphy = wlc->wiphy;
1068 if (brcms_deviceremoved(wlc)) {
1069 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
1071 brcms_down(wlc->wl);
1075 /* grab and clear the saved software intstatus bits */
1076 macintstatus = wlc->macintstatus;
1077 wlc->macintstatus = 0;
1079 BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
1080 wlc_hw->unit, macintstatus);
1082 WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
1085 if (macintstatus & MI_TFS) {
1087 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
1088 wlc->macintstatus |= MI_TFS;
1090 wiphy_err(wiphy, "MI_TFS: fatal\n");
1095 if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
1098 /* ATIM window end */
1099 if (macintstatus & MI_ATIMWINEND) {
1100 BCMMSG(wlc->wiphy, "end of ATIM window\n");
1101 OR_REG(®s->maccommand, wlc->qvalid);
1106 * received data or control frame, MI_DMAINT is
1107 * indication of RX_FIFO interrupt
1109 if (macintstatus & MI_DMAINT)
1110 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
1111 wlc->macintstatus |= MI_DMAINT;
1113 /* noise sample collected */
1114 if (macintstatus & MI_BG_NOISE)
1115 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
1117 if (macintstatus & MI_GP0) {
1118 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
1119 "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
1121 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
1122 __func__, wlc_hw->sih->chip,
1123 wlc_hw->sih->chiprev);
1125 brcms_init(wlc->wl);
1128 /* gptimer timeout */
1129 if (macintstatus & MI_TO)
1130 W_REG(®s->gptimer, 0);
1132 if (macintstatus & MI_RFDISABLE) {
1133 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
1134 " RF Disable Input\n", wlc_hw->unit);
1135 brcms_rfkill_set_hw_state(wlc->wl);
1138 /* send any enq'd tx packets. Just makes sure to jump start tx */
1139 if (!pktq_empty(&wlc->pkt_queue->q))
1140 brcms_c_send_q(wlc);
1142 /* it isn't done and needs to be resched if macintstatus is non-zero */
1143 return wlc->macintstatus != 0;
1146 brcms_init(wlc->wl);
1147 return wlc->macintstatus != 0;
1150 /* set initial host flags value */
1152 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1154 struct brcms_hardware *wlc_hw = wlc->hw;
1156 memset(mhfs, 0, MHFMAX * sizeof(u16));
1158 mhfs[MHF2] |= mhf2_init;
1160 /* prohibit use of slowclock on multifunction boards */
1161 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1162 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1164 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1165 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1166 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1170 static struct dma64regs __iomem *
1171 dmareg(struct brcms_hardware *hw, uint direction, uint fifonum)
1173 if (direction == DMA_TX)
1174 return &(hw->regs->fifo64regs[fifonum].dmaxmt);
1175 return &(hw->regs->fifo64regs[fifonum].dmarcv);
1178 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1183 * ucode host flag 2 needed for pio mode, independent of band and fifo
1186 struct brcms_hardware *wlc_hw = wlc->hw;
1187 uint unit = wlc_hw->unit;
1188 struct wiphy *wiphy = wlc->wiphy;
1190 /* name and offsets for dma_attach */
1191 snprintf(name, sizeof(name), "wl%d", unit);
1193 if (wlc_hw->di[0] == NULL) { /* Init FIFOs */
1194 int dma_attach_err = 0;
1198 * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1199 * RX: RX_FIFO (RX data packets)
1201 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih,
1202 (wme ? dmareg(wlc_hw, DMA_TX, 0) :
1203 NULL), dmareg(wlc_hw, DMA_RX, 0),
1204 (wme ? NTXD : 0), NRXD,
1205 RXBUFSZ, -1, NRXBUFPOST,
1206 BRCMS_HWRXOFF, &brcm_msg_level);
1207 dma_attach_err |= (NULL == wlc_hw->di[0]);
1211 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1212 * (legacy) TX_DATA_FIFO (TX data packets)
1215 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih,
1216 dmareg(wlc_hw, DMA_TX, 1), NULL,
1217 NTXD, 0, 0, -1, 0, 0,
1219 dma_attach_err |= (NULL == wlc_hw->di[1]);
1223 * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1226 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih,
1227 dmareg(wlc_hw, DMA_TX, 2), NULL,
1228 NTXD, 0, 0, -1, 0, 0,
1230 dma_attach_err |= (NULL == wlc_hw->di[2]);
1233 * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1234 * (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1236 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih,
1237 dmareg(wlc_hw, DMA_TX, 3),
1238 NULL, NTXD, 0, 0, -1,
1239 0, 0, &brcm_msg_level);
1240 dma_attach_err |= (NULL == wlc_hw->di[3]);
1241 /* Cleaner to leave this as if with AP defined */
1243 if (dma_attach_err) {
1244 wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1249 /* get pointer to dma engine tx flow control variable */
1250 for (i = 0; i < NFIFO; i++)
1252 wlc_hw->txavail[i] =
1253 (uint *) dma_getvar(wlc_hw->di[i],
1257 /* initial ucode host flags */
1258 brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1263 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1267 for (j = 0; j < NFIFO; j++) {
1268 if (wlc_hw->di[j]) {
1269 dma_detach(wlc_hw->di[j]);
1270 wlc_hw->di[j] = NULL;
1276 * Initialize brcms_c_info default values ...
1277 * may get overrides later in this function
1278 * BMAC_NOTES, move low out and resolve the dangling ones
1280 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1282 struct brcms_c_info *wlc = wlc_hw->wlc;
1284 /* set default sw macintmask value */
1285 wlc->defmacintmask = DEF_MACINTMASK;
1287 /* various 802.11g modes */
1288 wlc_hw->shortslot = false;
1290 wlc_hw->SFBL = RETRY_SHORT_FB;
1291 wlc_hw->LFBL = RETRY_LONG_FB;
1293 /* default mac retry limits */
1294 wlc_hw->SRL = RETRY_SHORT_DEF;
1295 wlc_hw->LRL = RETRY_LONG_DEF;
1296 wlc_hw->chanspec = ch20mhz_chspec(1);
1299 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1301 /* delay before first read of ucode state */
1304 /* wait until ucode is no longer asleep */
1305 SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1306 DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1309 /* control chip clock to save power, enable dynamic clock or force fast clock */
1310 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1312 if (wlc_hw->sih->cccaps & CC_CAP_PMU) {
1313 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1314 * on backplane, but mac core will still run on ALP(not HT) when
1315 * it enters powersave mode, which means the FCA bit may not be
1316 * set. Should wakeup mac if driver wants it to run on HT.
1320 if (mode == CLK_FAST) {
1321 OR_REG(&wlc_hw->regs->clk_ctl_st,
1328 clk_ctl_st) & CCS_HTAVAIL) == 0),
1329 PMU_MAX_TRANSITION_DLY);
1332 clk_ctl_st) & CCS_HTAVAIL));
1334 if ((wlc_hw->sih->pmurev == 0) &&
1337 clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ)))
1340 clk_ctl_st) & CCS_HTAVAIL)
1342 PMU_MAX_TRANSITION_DLY);
1343 AND_REG(&wlc_hw->regs->clk_ctl_st,
1347 wlc_hw->forcefastclk = (mode == CLK_FAST);
1350 /* old chips w/o PMU, force HT through cc,
1351 * then use FCA to verify mac is running fast clock
1354 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1356 /* check fast clock is available (if core is not in reset) */
1357 if (wlc_hw->forcefastclk && wlc_hw->clk)
1358 WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) &
1362 * keep the ucode wake bit on if forcefastclk is on since we
1363 * do not want ucode to put us back to slow clock when it dozes
1364 * for PM mode. Code below matches the wake override bit with
1365 * current forcefastclk state. Only setting bit in wake_override
1366 * instead of waking ucode immediately since old code had this
1367 * behavior. Older code set wlc->forcefastclk but only had the
1368 * wake happen if the wakup_ucode work (protected by an up
1369 * check) was executed just below.
1371 if (wlc_hw->forcefastclk)
1372 mboolset(wlc_hw->wake_override,
1373 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1375 mboolclr(wlc_hw->wake_override,
1376 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1380 /* set or clear ucode host flag bits
1381 * it has an optimization for no-change write
1382 * it only writes through shared memory when the core has clock;
1383 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1386 * bands values are: BRCM_BAND_AUTO <--- Current band only
1387 * BRCM_BAND_5G <--- 5G band only
1388 * BRCM_BAND_2G <--- 2G band only
1389 * BRCM_BAND_ALL <--- All bands
1392 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1396 u16 addr[MHFMAX] = {
1397 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1400 struct brcms_hw_band *band;
1402 if ((val & ~mask) || idx >= MHFMAX)
1403 return; /* error condition */
1406 /* Current band only or all bands,
1407 * then set the band to current band
1409 case BRCM_BAND_AUTO:
1411 band = wlc_hw->band;
1414 band = wlc_hw->bandstate[BAND_5G_INDEX];
1417 band = wlc_hw->bandstate[BAND_2G_INDEX];
1420 band = NULL; /* error condition */
1424 save = band->mhfs[idx];
1425 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1427 /* optimization: only write through if changed, and
1428 * changed band is the current band
1430 if (wlc_hw->clk && (band->mhfs[idx] != save)
1431 && (band == wlc_hw->band))
1432 brcms_b_write_shm(wlc_hw, addr[idx],
1433 (u16) band->mhfs[idx]);
1436 if (bands == BRCM_BAND_ALL) {
1437 wlc_hw->bandstate[0]->mhfs[idx] =
1438 (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1439 wlc_hw->bandstate[1]->mhfs[idx] =
1440 (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1444 /* set the maccontrol register to desired reset state and
1445 * initialize the sw cache of the register
1447 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1449 /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1450 wlc_hw->maccontrol = 0;
1451 wlc_hw->suspended_fifos = 0;
1452 wlc_hw->wake_override = 0;
1453 wlc_hw->mute_override = 0;
1454 brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1458 * write the software state of maccontrol and
1459 * overrides to the maccontrol register
1461 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1463 u32 maccontrol = wlc_hw->maccontrol;
1465 /* OR in the wake bit if overridden */
1466 if (wlc_hw->wake_override)
1467 maccontrol |= MCTL_WAKE;
1469 /* set AP and INFRA bits for mute if needed */
1470 if (wlc_hw->mute_override) {
1471 maccontrol &= ~(MCTL_AP);
1472 maccontrol |= MCTL_INFRA;
1475 W_REG(&wlc_hw->regs->maccontrol, maccontrol);
1478 /* set or clear maccontrol bits */
1479 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1485 return; /* error condition */
1486 maccontrol = wlc_hw->maccontrol;
1487 new_maccontrol = (maccontrol & ~mask) | val;
1489 /* if the new maccontrol value is the same as the old, nothing to do */
1490 if (new_maccontrol == maccontrol)
1493 /* something changed, cache the new value */
1494 wlc_hw->maccontrol = new_maccontrol;
1496 /* write the new values with overrides applied */
1497 brcms_c_mctrl_write(wlc_hw);
1500 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1503 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1504 mboolset(wlc_hw->wake_override, override_bit);
1508 mboolset(wlc_hw->wake_override, override_bit);
1510 brcms_c_mctrl_write(wlc_hw);
1511 brcms_b_wait_for_wake(wlc_hw);
1514 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1517 mboolclr(wlc_hw->wake_override, override_bit);
1519 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1522 brcms_c_mctrl_write(wlc_hw);
1525 /* When driver needs ucode to stop beaconing, it has to make sure that
1526 * MCTL_AP is clear and MCTL_INFRA is set
1527 * Mode MCTL_AP MCTL_INFRA
1529 * STA 0 1 <--- This will ensure no beacons
1532 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1534 wlc_hw->mute_override = 1;
1536 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1537 * override, then there is no change to write
1539 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1542 brcms_c_mctrl_write(wlc_hw);
1545 /* Clear the override on AP and INFRA bits */
1546 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1548 if (wlc_hw->mute_override == 0)
1551 wlc_hw->mute_override = 0;
1553 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1554 * override, then there is no change to write
1556 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1559 brcms_c_mctrl_write(wlc_hw);
1563 * Write a MAC address to the given match reg offset in the RXE match engine.
1566 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1569 struct d11regs __iomem *regs;
1574 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1577 regs = wlc_hw->regs;
1578 mac_l = addr[0] | (addr[1] << 8);
1579 mac_m = addr[2] | (addr[3] << 8);
1580 mac_h = addr[4] | (addr[5] << 8);
1582 /* enter the MAC addr into the RXE match registers */
1583 W_REG(®s->rcm_ctl, RCM_INC_DATA | match_reg_offset);
1584 W_REG(®s->rcm_mat_data, mac_l);
1585 W_REG(®s->rcm_mat_data, mac_m);
1586 W_REG(®s->rcm_mat_data, mac_h);
1591 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1594 struct d11regs __iomem *regs;
1599 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1601 regs = wlc_hw->regs;
1602 W_REG(®s->tplatewrptr, offset);
1604 /* if MCTL_BIGEND bit set in mac control register,
1605 * the chip swaps data in fifo, as well as data in
1608 be_bit = (R_REG(®s->maccontrol) & MCTL_BIGEND) != 0;
1611 memcpy(&word, buf, sizeof(u32));
1614 word_be = cpu_to_be32(word);
1615 word = *(u32 *)&word_be;
1617 word_le = cpu_to_le32(word);
1618 word = *(u32 *)&word_le;
1621 W_REG(®s->tplatewrdata, word);
1623 buf = (u8 *) buf + sizeof(u32);
1628 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1630 wlc_hw->band->CWmin = newmin;
1632 W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1633 (void)R_REG(&wlc_hw->regs->objaddr);
1634 W_REG(&wlc_hw->regs->objdata, newmin);
1637 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1639 wlc_hw->band->CWmax = newmax;
1641 W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1642 (void)R_REG(&wlc_hw->regs->objaddr);
1643 W_REG(&wlc_hw->regs->objdata, newmax);
1646 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1650 /* request FAST clock if not on */
1651 fastclk = wlc_hw->forcefastclk;
1653 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1655 wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1657 brcms_b_phy_reset(wlc_hw);
1658 wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1660 /* restore the clk */
1662 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1665 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1668 struct brcms_c_info *wlc = wlc_hw->wlc;
1669 /* update SYNTHPU_DLY */
1671 if (BRCMS_ISLCNPHY(wlc->band))
1672 v = SYNTHPU_DLY_LPPHY_US;
1673 else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1674 v = SYNTHPU_DLY_NPHY_US;
1676 v = SYNTHPU_DLY_BPHY_US;
1678 brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1681 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1684 u16 phytxant = wlc_hw->bmac_phytxant;
1685 u16 mask = PHY_TXC_ANT_MASK;
1687 /* set the Probe Response frame phy control word */
1688 phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1689 phyctl = (phyctl & ~mask) | phytxant;
1690 brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1692 /* set the Response (ACK/CTS) frame phy control word */
1693 phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1694 phyctl = (phyctl & ~mask) | phytxant;
1695 brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1698 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1703 struct plcp_signal_rate_lookup {
1707 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1708 const struct plcp_signal_rate_lookup rate_lookup[] = {
1709 {BRCM_RATE_6M, 0xB},
1710 {BRCM_RATE_9M, 0xF},
1711 {BRCM_RATE_12M, 0xA},
1712 {BRCM_RATE_18M, 0xE},
1713 {BRCM_RATE_24M, 0x9},
1714 {BRCM_RATE_36M, 0xD},
1715 {BRCM_RATE_48M, 0x8},
1716 {BRCM_RATE_54M, 0xC}
1719 for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1720 if (rate == rate_lookup[i].rate) {
1721 plcp_rate = rate_lookup[i].signal_rate;
1726 /* Find the SHM pointer to the rate table entry by looking in the
1729 return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1732 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1736 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1737 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1743 if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1746 /* walk the phy rate table and update the entries */
1747 for (i = 0; i < ARRAY_SIZE(rates); i++) {
1750 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1752 /* read the SHM Rate Table entry OFDM PCTL1 values */
1754 brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1756 /* modify the value */
1757 pctl1 &= ~PHY_TXC1_MODE_MASK;
1758 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1760 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1761 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1766 /* band-specific init */
1767 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1769 struct brcms_hardware *wlc_hw = wlc->hw;
1771 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1772 wlc_hw->band->bandunit);
1774 brcms_c_ucode_bsinit(wlc_hw);
1776 wlc_phy_init(wlc_hw->band->pi, chanspec);
1778 brcms_c_ucode_txant_set(wlc_hw);
1781 * cwmin is band-specific, update hardware
1782 * with value for current band
1784 brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1785 brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1787 brcms_b_update_slot_timing(wlc_hw,
1788 wlc_hw->band->bandtype == BRCM_BAND_5G ?
1789 true : wlc_hw->shortslot);
1791 /* write phytype and phyvers */
1792 brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1793 brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1796 * initialize the txphyctl1 rate table since
1797 * shmem is shared between bands
1799 brcms_upd_ofdm_pctl1_table(wlc_hw);
1801 brcms_b_upd_synthpu(wlc_hw);
1804 /* Perform a soft reset of the PHY PLL */
1805 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1807 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1809 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1810 offsetof(struct chipcregs, chipcontrol_addr), ~0, 0);
1812 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1813 offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1815 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1816 offsetof(struct chipcregs, chipcontrol_data), 0x4, 4);
1818 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1819 offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1823 /* light way to turn on phy clock without reset for NPHY only
1824 * refer to brcms_b_core_phy_clk for full version
1826 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1828 /* support(necessary for NPHY and HYPHY) only */
1829 if (!BRCMS_ISNPHY(wlc_hw->band))
1833 ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC);
1835 ai_core_cflags(wlc_hw->sih, SICF_FGC, 0);
1839 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1842 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE);
1844 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0);
1847 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1849 struct brcms_phy_pub *pih = wlc_hw->band->pi;
1851 bool phy_in_reset = false;
1853 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1858 phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1860 /* Specific reset sequence required for NPHY rev 3 and 4 */
1861 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1862 NREV_LE(wlc_hw->band->phyrev, 4)) {
1863 /* Set the PHY bandwidth */
1864 ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits);
1868 /* Perform a soft reset of the PHY PLL */
1869 brcms_b_core_phypll_reset(wlc_hw);
1872 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE),
1873 (SICF_PRST | SICF_PCLKE));
1874 phy_in_reset = true;
1876 ai_core_cflags(wlc_hw->sih,
1877 (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1878 (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1882 brcms_b_core_phy_clk(wlc_hw, ON);
1885 wlc_phy_anacore(pih, ON);
1888 /* switch to and initialize new band */
1889 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1891 struct brcms_c_info *wlc = wlc_hw->wlc;
1894 /* Enable the d11 core before accessing it */
1895 if (!ai_iscoreup(wlc_hw->sih)) {
1896 ai_core_reset(wlc_hw->sih, 0, 0);
1897 brcms_c_mctrl_reset(wlc_hw);
1900 macintmask = brcms_c_setband_inact(wlc, bandunit);
1905 brcms_b_core_phy_clk(wlc_hw, ON);
1907 /* band-specific initializations */
1908 brcms_b_bsinit(wlc, chanspec);
1911 * If there are any pending software interrupt bits,
1912 * then replace these with a harmless nonzero value
1913 * so brcms_c_dpc() will re-enable interrupts when done.
1915 if (wlc->macintstatus)
1916 wlc->macintstatus = MI_DMAINT;
1918 /* restore macintmask */
1919 brcms_intrsrestore(wlc->wl, macintmask);
1921 /* ucode should still be suspended.. */
1922 WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
1925 /* low-level band switch utility routine */
1926 void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
1928 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1931 wlc_hw->band = wlc_hw->bandstate[bandunit];
1935 * until we eliminate need for wlc->band refs in low level code
1937 wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
1939 /* set gmode core flag */
1940 if (wlc_hw->sbclk && !wlc_hw->noreset)
1941 ai_core_cflags(wlc_hw->sih, SICF_GMODE,
1942 ((bandunit == 0) ? SICF_GMODE : 0));
1945 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1948 /* reject unsupported corerev */
1949 if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1950 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1958 /* Validate some board info parameters */
1959 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1961 uint boardrev = wlc_hw->boardrev;
1963 /* 4 bits each for board type, major, minor, and tiny version */
1964 uint brt = (boardrev & 0xf000) >> 12;
1965 uint b0 = (boardrev & 0xf00) >> 8;
1966 uint b1 = (boardrev & 0xf0) >> 4;
1967 uint b2 = boardrev & 0xf;
1969 /* voards from other vendors are always considered valid */
1970 if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM)
1973 /* do some boardrev sanity checks when boardvendor is Broadcom */
1977 if (boardrev <= 0xff)
1980 if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1987 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
1989 enum brcms_srom_id var_id = BRCMS_SROM_MACADDR;
1992 /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1993 macaddr = getvar(wlc_hw->sih, var_id);
1994 if (macaddr != NULL)
1997 if (wlc_hw->_nbands > 1)
1998 var_id = BRCMS_SROM_ET1MACADDR;
2000 var_id = BRCMS_SROM_IL0MACADDR;
2002 macaddr = getvar(wlc_hw->sih, var_id);
2003 if (macaddr == NULL)
2004 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
2005 "getvar(%d) not found\n", wlc_hw->unit, var_id);
2010 /* power both the pll and external oscillator on/off */
2011 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
2013 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
2016 * dont power down if plldown is false or
2017 * we must poll hw radio disable
2019 if (!want && wlc_hw->pllreq)
2023 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
2025 wlc_hw->sbclk = want;
2026 if (!wlc_hw->sbclk) {
2027 wlc_hw->clk = false;
2028 if (wlc_hw->band && wlc_hw->band->pi)
2029 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2034 * Return true if radio is disabled, otherwise false.
2035 * hw radio disable signal is an external pin, users activate it asynchronously
2036 * this function could be called when driver is down and w/o clock
2037 * it operates on different registers depending on corerev and boardflag.
2039 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
2042 u32 resetbits = 0, flags = 0;
2044 xtal = wlc_hw->sbclk;
2046 brcms_b_xtal(wlc_hw, ON);
2048 /* may need to take core out of reset first */
2052 * mac no longer enables phyclk automatically when driver
2053 * accesses phyreg throughput mac. This can be skipped since
2054 * only mac reg is accessed below
2056 flags |= SICF_PCLKE;
2059 * AI chip doesn't restore bar0win2 on
2060 * hibernation/resume, need sw fixup
2062 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2063 (wlc_hw->sih->chip == BCM43225_CHIP_ID))
2064 wlc_hw->regs = (struct d11regs __iomem *)
2065 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
2066 ai_core_reset(wlc_hw->sih, flags, resetbits);
2067 brcms_c_mctrl_reset(wlc_hw);
2070 v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0);
2072 /* put core back into reset */
2074 ai_core_disable(wlc_hw->sih, 0);
2077 brcms_b_xtal(wlc_hw, OFF);
2082 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
2084 struct dma_pub *di = wlc_hw->di[fifo];
2085 return dma_rxreset(di);
2089 * ensure fask clock during reset
2091 * reset d11(out of reset)
2092 * reset phy(out of reset)
2093 * clear software macintstatus for fresh new start
2094 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
2096 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
2098 struct d11regs __iomem *regs;
2103 if (flags == BRCMS_USE_COREFLAGS)
2104 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2106 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2108 regs = wlc_hw->regs;
2110 /* request FAST clock if not on */
2111 fastclk = wlc_hw->forcefastclk;
2113 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2115 /* reset the dma engines except first time thru */
2116 if (ai_iscoreup(wlc_hw->sih)) {
2117 for (i = 0; i < NFIFO; i++)
2118 if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2119 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2120 "dma_txreset[%d]: cannot stop dma\n",
2121 wlc_hw->unit, __func__, i);
2123 if ((wlc_hw->di[RX_FIFO])
2124 && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2125 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2126 "[%d]: cannot stop dma\n",
2127 wlc_hw->unit, __func__, RX_FIFO);
2129 /* if noreset, just stop the psm and return */
2130 if (wlc_hw->noreset) {
2131 wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */
2132 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2137 * mac no longer enables phyclk automatically when driver accesses
2138 * phyreg throughput mac, AND phy_reset is skipped at early stage when
2139 * band->pi is invalid. need to enable PHY CLK
2141 flags |= SICF_PCLKE;
2145 * In chips with PMU, the fastclk request goes through d11 core
2146 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2148 * This adds some delay and we can optimize it by also requesting
2149 * fastclk through chipcommon during this period if necessary. But
2150 * that has to work coordinate with other driver like mips/arm since
2151 * they may touch chipcommon as well.
2153 wlc_hw->clk = false;
2154 ai_core_reset(wlc_hw->sih, flags, resetbits);
2156 if (wlc_hw->band && wlc_hw->band->pi)
2157 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2159 brcms_c_mctrl_reset(wlc_hw);
2161 if (wlc_hw->sih->cccaps & CC_CAP_PMU)
2162 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2164 brcms_b_phy_reset(wlc_hw);
2166 /* turn on PHY_PLL */
2167 brcms_b_core_phypll_ctl(wlc_hw, true);
2169 /* clear sw intstatus */
2170 wlc_hw->wlc->macintstatus = 0;
2172 /* restore the clk setting */
2174 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2177 /* txfifo sizes needs to be modified(increased) since the newer cores
2180 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2182 struct d11regs __iomem *regs = wlc_hw->regs;
2184 u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2185 u16 txfifo_def, txfifo_def1;
2188 /* tx fifos start at TXFIFO_START_BLK from the Base address */
2189 txfifo_startblk = TXFIFO_START_BLK;
2191 /* sequence of operations: reset fifo, set fifo size, reset fifo */
2192 for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2194 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2195 txfifo_def = (txfifo_startblk & 0xff) |
2196 (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2197 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2199 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2201 TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2203 W_REG(®s->xmtfifocmd, txfifo_cmd);
2204 W_REG(®s->xmtfifodef, txfifo_def);
2205 W_REG(®s->xmtfifodef1, txfifo_def1);
2207 W_REG(®s->xmtfifocmd, txfifo_cmd);
2209 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2212 * need to propagate to shm location to be in sync since ucode/hw won't
2215 brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2216 wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2217 brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2218 wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2219 brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2220 ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2221 xmtfifo_sz[TX_AC_BK_FIFO]));
2222 brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2223 ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2224 xmtfifo_sz[TX_BCMC_FIFO]));
2227 /* This function is used for changing the tsf frac register
2228 * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2229 * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2230 * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2231 * HTPHY Formula is 2^26/freq(MHz) e.g.
2232 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2233 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2234 * For spuron: 123MHz -> 2^26/123 = 545600.5
2235 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2236 * For spur off: 120MHz -> 2^26/120 = 559240.5
2237 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2240 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2242 struct d11regs __iomem *regs = wlc_hw->regs;
2244 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2245 (wlc_hw->sih->chip == BCM43225_CHIP_ID)) {
2246 if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */
2247 W_REG(®s->tsf_clk_frac_l, 0x2082);
2248 W_REG(®s->tsf_clk_frac_h, 0x8);
2249 } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */
2250 W_REG(®s->tsf_clk_frac_l, 0x5341);
2251 W_REG(®s->tsf_clk_frac_h, 0x8);
2252 } else { /* 120Mhz */
2253 W_REG(®s->tsf_clk_frac_l, 0x8889);
2254 W_REG(®s->tsf_clk_frac_h, 0x8);
2256 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2257 if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */
2258 W_REG(®s->tsf_clk_frac_l, 0x7CE0);
2259 W_REG(®s->tsf_clk_frac_h, 0xC);
2260 } else { /* 80Mhz */
2261 W_REG(®s->tsf_clk_frac_l, 0xCCCD);
2262 W_REG(®s->tsf_clk_frac_h, 0xC);
2267 /* Initialize GPIOs that are controlled by D11 core */
2268 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2270 struct brcms_hardware *wlc_hw = wlc->hw;
2271 struct d11regs __iomem *regs;
2274 regs = wlc_hw->regs;
2276 /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2277 brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2280 * Common GPIO setup:
2281 * G0 = LED 0 = WLAN Activity
2282 * G1 = LED 1 = WLAN 2.4 GHz Radio State
2283 * G2 = LED 2 = WLAN 5 GHz Radio State
2284 * G4 = radio disable input (HI enabled, LO disabled)
2289 /* Allocate GPIOs for mimo antenna diversity feature */
2290 if (wlc_hw->antsel_type == ANTSEL_2x3) {
2291 /* Enable antenna diversity, use 2x3 mode */
2292 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2293 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2294 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2295 MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2297 /* init superswitch control */
2298 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2300 } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2301 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2303 * The board itself is powered by these GPIOs
2304 * (when not sending pattern) so set them high
2306 OR_REG(®s->psm_gpio_oe,
2307 (BOARD_GPIO_12 | BOARD_GPIO_13));
2308 OR_REG(®s->psm_gpio_out,
2309 (BOARD_GPIO_12 | BOARD_GPIO_13));
2311 /* Enable antenna diversity, use 2x4 mode */
2312 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2313 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2314 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2317 /* Configure the desired clock to be 4Mhz */
2318 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2319 ANTSEL_CLKDIV_4MHZ);
2323 * gpio 9 controls the PA. ucode is responsible
2324 * for wiggling out and oe
2326 if (wlc_hw->boardflags & BFL_PACTRL)
2327 gm |= gc |= BOARD_GPIO_PACTRL;
2329 /* apply to gpiocontrol register */
2330 ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2333 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2334 const __le32 ucode[], const size_t nbytes)
2336 struct d11regs __iomem *regs = wlc_hw->regs;
2340 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2342 count = (nbytes / sizeof(u32));
2344 W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL));
2345 (void)R_REG(®s->objaddr);
2346 for (i = 0; i < count; i++)
2347 W_REG(®s->objdata, le32_to_cpu(ucode[i]));
2351 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2353 struct brcms_c_info *wlc;
2354 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2358 if (wlc_hw->ucode_loaded)
2361 if (D11REV_IS(wlc_hw->corerev, 23)) {
2362 if (BRCMS_ISNPHY(wlc_hw->band)) {
2363 brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2364 ucode->bcm43xx_16_mimosz);
2365 wlc_hw->ucode_loaded = true;
2367 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2369 __func__, wlc_hw->unit, wlc_hw->corerev);
2370 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2371 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2372 brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2373 ucode->bcm43xx_24_lcnsz);
2374 wlc_hw->ucode_loaded = true;
2376 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2378 __func__, wlc_hw->unit, wlc_hw->corerev);
2383 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2385 /* update sw state */
2386 wlc_hw->bmac_phytxant = phytxant;
2388 /* push to ucode if up */
2391 brcms_c_ucode_txant_set(wlc_hw);
2395 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2397 return (u16) wlc_hw->wlc->stf->txant;
2400 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2402 wlc_hw->antsel_type = antsel_type;
2404 /* Update the antsel type for phy module to use */
2405 wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2408 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2412 uint intstatus, idx;
2413 struct d11regs __iomem *regs = wlc_hw->regs;
2414 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2416 unit = wlc_hw->unit;
2418 for (idx = 0; idx < NFIFO; idx++) {
2419 /* read intstatus register and ignore any non-error bits */
2421 R_REG(®s->intctrlregs[idx].intstatus) & I_ERRORS;
2425 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2426 unit, idx, intstatus);
2428 if (intstatus & I_RO) {
2429 wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2430 "overflow\n", unit, idx);
2434 if (intstatus & I_PC) {
2435 wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2440 if (intstatus & I_PD) {
2441 wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2446 if (intstatus & I_DE) {
2447 wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2448 "error\n", unit, idx);
2452 if (intstatus & I_RU)
2453 wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2454 "underflow\n", idx, unit);
2456 if (intstatus & I_XU) {
2457 wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2458 "underflow\n", idx, unit);
2463 brcms_c_fatal_error(wlc_hw->wlc); /* big hammer */
2466 W_REG(®s->intctrlregs[idx].intstatus,
2471 void brcms_c_intrson(struct brcms_c_info *wlc)
2473 struct brcms_hardware *wlc_hw = wlc->hw;
2474 wlc->macintmask = wlc->defmacintmask;
2475 W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2479 * callback for siutils.c, which has only wlc handler, no wl they both check
2480 * up, not only because there is no need to off/restore d11 interrupt but also
2481 * because per-port code may require sync with valid interrupt.
2483 static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc)
2488 return brcms_intrsoff(wlc->wl);
2491 static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2496 brcms_intrsrestore(wlc->wl, macintmask);
2499 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2501 struct brcms_hardware *wlc_hw = wlc->hw;
2507 macintmask = wlc->macintmask; /* isr can still happen */
2509 W_REG(&wlc_hw->regs->macintmask, 0);
2510 (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */
2511 udelay(1); /* ensure int line is no longer driven */
2512 wlc->macintmask = 0;
2514 /* return previous macintmask; resolve race between us and our isr */
2515 return wlc->macintstatus ? 0 : macintmask;
2518 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2520 struct brcms_hardware *wlc_hw = wlc->hw;
2524 wlc->macintmask = macintmask;
2525 W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2528 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2531 u8 fifo = 1 << tx_fifo;
2533 /* Two clients of this code, 11h Quiet period and scanning. */
2535 /* only suspend if not already suspended */
2536 if ((wlc_hw->suspended_fifos & fifo) == fifo)
2539 /* force the core awake only if not already */
2540 if (wlc_hw->suspended_fifos == 0)
2541 brcms_c_ucode_wake_override_set(wlc_hw,
2542 BRCMS_WAKE_OVERRIDE_TXFIFO);
2544 wlc_hw->suspended_fifos |= fifo;
2546 if (wlc_hw->di[tx_fifo]) {
2548 * Suspending AMPDU transmissions in the middle can cause
2549 * underflow which may result in mismatch between ucode and
2550 * driver so suspend the mac before suspending the FIFO
2552 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2553 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2555 dma_txsuspend(wlc_hw->di[tx_fifo]);
2557 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2558 brcms_c_enable_mac(wlc_hw->wlc);
2562 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2565 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2566 * but need to be done here for PIO otherwise the watchdog will catch
2567 * the inconsistency and fire
2569 /* Two clients of this code, 11h Quiet period and scanning. */
2570 if (wlc_hw->di[tx_fifo])
2571 dma_txresume(wlc_hw->di[tx_fifo]);
2573 /* allow core to sleep again */
2574 if (wlc_hw->suspended_fifos == 0)
2577 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2578 if (wlc_hw->suspended_fifos == 0)
2579 brcms_c_ucode_wake_override_clear(wlc_hw,
2580 BRCMS_WAKE_OVERRIDE_TXFIFO);
2584 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, u32 flags)
2586 static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2589 /* suspend tx fifos */
2590 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2591 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2592 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2593 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2595 /* zero the address match register so we do not send ACKs */
2596 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2599 /* resume tx fifos */
2600 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2601 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2602 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2603 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2605 /* Restore address */
2606 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2610 wlc_phy_mute_upd(wlc_hw->band->pi, on, flags);
2613 brcms_c_ucode_mute_override_set(wlc_hw);
2615 brcms_c_ucode_mute_override_clear(wlc_hw);
2619 * Read and clear macintmask and macintstatus and intstatus registers.
2620 * This routine should be called with interrupts off
2622 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2623 * 0 if the interrupt is not for us, or we are in some special cases;
2624 * device interrupt status bits otherwise.
2626 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2628 struct brcms_hardware *wlc_hw = wlc->hw;
2629 struct d11regs __iomem *regs = wlc_hw->regs;
2632 /* macintstatus includes a DMA interrupt summary bit */
2633 macintstatus = R_REG(®s->macintstatus);
2635 BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2638 /* detect cardbus removed, in power down(suspend) and in reset */
2639 if (brcms_deviceremoved(wlc))
2642 /* brcms_deviceremoved() succeeds even when the core is still resetting,
2643 * handle that case here.
2645 if (macintstatus == 0xffffffff)
2648 /* defer unsolicited interrupts */
2649 macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2652 if (macintstatus == 0)
2655 /* interrupts are already turned off for CFE build
2656 * Caution: For CFE Turning off the interrupts again has some undesired
2659 /* turn off the interrupts */
2660 W_REG(®s->macintmask, 0);
2661 (void)R_REG(®s->macintmask); /* sync readback */
2662 wlc->macintmask = 0;
2664 /* clear device interrupts */
2665 W_REG(®s->macintstatus, macintstatus);
2667 /* MI_DMAINT is indication of non-zero intstatus */
2668 if (macintstatus & MI_DMAINT)
2670 * only fifo interrupt enabled is I_RI in
2671 * RX_FIFO. If MI_DMAINT is set, assume it
2672 * is set and clear the interrupt.
2674 W_REG(®s->intctrlregs[RX_FIFO].intstatus,
2677 return macintstatus;
2680 /* Update wlc->macintstatus and wlc->intstatus[]. */
2681 /* Return true if they are updated successfully. false otherwise */
2682 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2686 /* read and clear macintstatus and intstatus registers */
2687 macintstatus = wlc_intstatus(wlc, false);
2689 /* device is removed */
2690 if (macintstatus == 0xffffffff)
2693 /* update interrupt status in software */
2694 wlc->macintstatus |= macintstatus;
2700 * First-level interrupt processing.
2701 * Return true if this was our interrupt, false otherwise.
2702 * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2705 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2707 struct brcms_hardware *wlc_hw = wlc->hw;
2712 if (!wlc_hw->up || !wlc->macintmask)
2715 /* read and clear macintstatus and intstatus registers */
2716 macintstatus = wlc_intstatus(wlc, true);
2718 if (macintstatus == 0xffffffff)
2719 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2722 /* it is not for us */
2723 if (macintstatus == 0)
2728 /* save interrupt status bits */
2729 wlc->macintstatus = macintstatus;
2735 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2737 struct brcms_hardware *wlc_hw = wlc->hw;
2738 struct d11regs __iomem *regs = wlc_hw->regs;
2740 struct wiphy *wiphy = wlc->wiphy;
2742 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2743 wlc_hw->band->bandunit);
2746 * Track overlapping suspend requests
2748 wlc_hw->mac_suspend_depth++;
2749 if (wlc_hw->mac_suspend_depth > 1)
2752 /* force the core awake */
2753 brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2755 mc = R_REG(®s->maccontrol);
2757 if (mc == 0xffffffff) {
2758 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2760 brcms_down(wlc->wl);
2763 WARN_ON(mc & MCTL_PSM_JMP_0);
2764 WARN_ON(!(mc & MCTL_PSM_RUN));
2765 WARN_ON(!(mc & MCTL_EN_MAC));
2767 mi = R_REG(®s->macintstatus);
2768 if (mi == 0xffffffff) {
2769 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2771 brcms_down(wlc->wl);
2774 WARN_ON(mi & MI_MACSSPNDD);
2776 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2778 SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD),
2779 BRCMS_MAX_MAC_SUSPEND);
2781 if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) {
2782 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2783 " and MI_MACSSPNDD is still not on.\n",
2784 wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2785 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2786 "psm_brc 0x%04x\n", wlc_hw->unit,
2787 R_REG(®s->psmdebug),
2788 R_REG(®s->phydebug),
2789 R_REG(®s->psm_brc));
2792 mc = R_REG(®s->maccontrol);
2793 if (mc == 0xffffffff) {
2794 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2796 brcms_down(wlc->wl);
2799 WARN_ON(mc & MCTL_PSM_JMP_0);
2800 WARN_ON(!(mc & MCTL_PSM_RUN));
2801 WARN_ON(mc & MCTL_EN_MAC);
2804 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2806 struct brcms_hardware *wlc_hw = wlc->hw;
2807 struct d11regs __iomem *regs = wlc_hw->regs;
2810 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2811 wlc->band->bandunit);
2814 * Track overlapping suspend requests
2816 wlc_hw->mac_suspend_depth--;
2817 if (wlc_hw->mac_suspend_depth > 0)
2820 mc = R_REG(®s->maccontrol);
2821 WARN_ON(mc & MCTL_PSM_JMP_0);
2822 WARN_ON(mc & MCTL_EN_MAC);
2823 WARN_ON(!(mc & MCTL_PSM_RUN));
2825 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2826 W_REG(®s->macintstatus, MI_MACSSPNDD);
2828 mc = R_REG(®s->maccontrol);
2829 WARN_ON(mc & MCTL_PSM_JMP_0);
2830 WARN_ON(!(mc & MCTL_EN_MAC));
2831 WARN_ON(!(mc & MCTL_PSM_RUN));
2833 mi = R_REG(®s->macintstatus);
2834 WARN_ON(mi & MI_MACSSPNDD);
2836 brcms_c_ucode_wake_override_clear(wlc_hw,
2837 BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2840 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2842 wlc_hw->hw_stf_ss_opmode = stf_mode;
2845 brcms_upd_ofdm_pctl1_table(wlc_hw);
2848 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2850 struct d11regs __iomem *regs;
2852 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2854 BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2856 regs = wlc_hw->regs;
2858 /* Validate dchip register access */
2860 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2861 (void)R_REG(®s->objaddr);
2862 w = R_REG(®s->objdata);
2864 /* Can we write and read back a 32bit register? */
2865 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2866 (void)R_REG(®s->objaddr);
2867 W_REG(®s->objdata, (u32) 0xaa5555aa);
2869 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2870 (void)R_REG(®s->objaddr);
2871 val = R_REG(®s->objdata);
2872 if (val != (u32) 0xaa5555aa) {
2873 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2874 "expected 0xaa5555aa\n", wlc_hw->unit, val);
2878 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2879 (void)R_REG(®s->objaddr);
2880 W_REG(®s->objdata, (u32) 0x55aaaa55);
2882 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2883 (void)R_REG(®s->objaddr);
2884 val = R_REG(®s->objdata);
2885 if (val != (u32) 0x55aaaa55) {
2886 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2887 "expected 0x55aaaa55\n", wlc_hw->unit, val);
2891 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2892 (void)R_REG(®s->objaddr);
2893 W_REG(®s->objdata, w);
2895 /* clear CFPStart */
2896 W_REG(®s->tsf_cfpstart, 0);
2898 w = R_REG(®s->maccontrol);
2899 if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2900 (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2901 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2902 "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2903 (MCTL_IHR_EN | MCTL_WAKE),
2904 (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2911 #define PHYPLL_WAIT_US 100000
2913 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2915 struct d11regs __iomem *regs;
2918 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2921 regs = wlc_hw->regs;
2924 if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
2925 OR_REG(®s->clk_ctl_st,
2926 (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL |
2927 CCS_ERSRC_REQ_PHYPLL));
2928 SPINWAIT((R_REG(®s->clk_ctl_st) &
2929 (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT),
2932 tmp = R_REG(®s->clk_ctl_st);
2933 if ((tmp & (CCS_ERSRC_AVAIL_HT)) !=
2934 (CCS_ERSRC_AVAIL_HT))
2935 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2936 " PLL failed\n", __func__);
2938 OR_REG(®s->clk_ctl_st,
2939 (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL));
2940 SPINWAIT((R_REG(®s->clk_ctl_st) &
2941 (CCS_ERSRC_AVAIL_D11PLL |
2942 CCS_ERSRC_AVAIL_PHYPLL)) !=
2943 (CCS_ERSRC_AVAIL_D11PLL |
2944 CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2946 tmp = R_REG(®s->clk_ctl_st);
2948 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2950 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2951 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2952 "PHY PLL failed\n", __func__);
2956 * Since the PLL may be shared, other cores can still
2957 * be requesting it; so we'll deassert the request but
2958 * not wait for status to comply.
2960 AND_REG(®s->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL);
2961 tmp = R_REG(®s->clk_ctl_st);
2965 void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2969 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2971 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2976 if (wlc_hw->noreset)
2980 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2982 /* turn off analog core */
2983 wlc_phy_anacore(wlc_hw->band->pi, OFF);
2985 /* turn off PHYPLL to save power */
2986 brcms_b_core_phypll_ctl(wlc_hw, false);
2988 wlc_hw->clk = false;
2989 ai_core_disable(wlc_hw->sih, 0);
2990 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2993 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2995 struct brcms_hardware *wlc_hw = wlc->hw;
2998 /* free any posted tx packets */
2999 for (i = 0; i < NFIFO; i++)
3000 if (wlc_hw->di[i]) {
3001 dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
3002 wlc->core->txpktpend[i] = 0;
3003 BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
3006 /* free any posted rx packets */
3007 dma_rxreclaim(wlc_hw->di[RX_FIFO]);
3011 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
3013 struct d11regs __iomem *regs = wlc_hw->regs;
3014 u16 __iomem *objdata_lo = (u16 __iomem *)®s->objdata;
3015 u16 __iomem *objdata_hi = objdata_lo + 1;
3018 W_REG(®s->objaddr, sel | (offset >> 2));
3019 (void)R_REG(®s->objaddr);
3021 v = R_REG(objdata_hi);
3023 v = R_REG(objdata_lo);
3029 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
3032 struct d11regs __iomem *regs = wlc_hw->regs;
3033 u16 __iomem *objdata_lo = (u16 __iomem *)®s->objdata;
3034 u16 __iomem *objdata_hi = objdata_lo + 1;
3036 W_REG(®s->objaddr, sel | (offset >> 2));
3037 (void)R_REG(®s->objaddr);
3039 W_REG(objdata_hi, v);
3041 W_REG(objdata_lo, v);
3045 * Read a single u16 from shared memory.
3046 * SHM 'offset' needs to be an even address
3048 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
3050 return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
3054 * Write a single u16 to shared memory.
3055 * SHM 'offset' needs to be an even address
3057 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
3059 brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
3063 * Copy a buffer to shared memory of specified type .
3064 * SHM 'offset' needs to be an even address and
3065 * Buffer length 'len' must be an even number of bytes
3066 * 'sel' selects the type of memory
3069 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
3070 const void *buf, int len, u32 sel)
3073 const u8 *p = (const u8 *)buf;
3076 if (len <= 0 || (offset & 1) || (len & 1))
3079 for (i = 0; i < len; i += 2) {
3080 v = p[i] | (p[i + 1] << 8);
3081 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
3086 * Copy a piece of shared memory of specified type to a buffer .
3087 * SHM 'offset' needs to be an even address and
3088 * Buffer length 'len' must be an even number of bytes
3089 * 'sel' selects the type of memory
3092 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
3099 if (len <= 0 || (offset & 1) || (len & 1))
3102 for (i = 0; i < len; i += 2) {
3103 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
3105 p[i + 1] = (v >> 8) & 0xFF;
3109 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
3115 /* write retry limit to SCR, shouldn't need to suspend */
3117 W_REG(&wlc_hw->regs->objaddr,
3118 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3119 (void)R_REG(&wlc_hw->regs->objaddr);
3120 W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL);
3121 W_REG(&wlc_hw->regs->objaddr,
3122 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3123 (void)R_REG(&wlc_hw->regs->objaddr);
3124 W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL);
3128 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3131 if (mboolisset(wlc_hw->pllreq, req_bit))
3134 mboolset(wlc_hw->pllreq, req_bit);
3136 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3138 brcms_b_xtal(wlc_hw, ON);
3141 if (!mboolisset(wlc_hw->pllreq, req_bit))
3144 mboolclr(wlc_hw->pllreq, req_bit);
3146 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3148 brcms_b_xtal(wlc_hw, OFF);
3153 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3155 wlc_hw->antsel_avail = antsel_avail;
3159 * conditions under which the PM bit should be set in outgoing frames
3160 * and STAY_AWAKE is meaningful
3162 bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3164 struct brcms_bss_cfg *cfg = wlc->bsscfg;
3166 /* disallow PS when one of the following global conditions meets */
3167 if (!wlc->pub->associated)
3170 /* disallow PS when one of these meets when not scanning */
3174 if (cfg->associated) {
3176 * disallow PS when one of the following
3177 * bsscfg specific conditions meets
3188 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3190 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3192 /* reset the core */
3193 if (!brcms_deviceremoved(wlc_hw->wlc))
3194 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3196 /* purge the dma rings */
3197 brcms_c_flushqueues(wlc_hw->wlc);
3200 void brcms_c_reset(struct brcms_c_info *wlc)
3202 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3204 /* slurp up hw mac counters before core reset */
3205 brcms_c_statsupd(wlc);
3207 /* reset our snapshot of macstat counters */
3208 memset((char *)wlc->core->macstat_snapshot, 0,
3209 sizeof(struct macstat));
3211 brcms_b_reset(wlc->hw);
3214 void brcms_c_fatal_error(struct brcms_c_info *wlc)
3216 wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n",
3218 brcms_init(wlc->wl);
3221 /* Return the channel the driver should initialize during brcms_c_init.
3222 * the channel may have to be changed from the currently configured channel
3223 * if other configurations are in conflict (bandlocked, 11n mode disabled,
3224 * invalid channel for current country, etc.)
3226 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3229 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3230 WL_CHANSPEC_BAND_2G;
3235 void brcms_c_init_scb(struct scb *scb)
3239 memset(scb, 0, sizeof(struct scb));
3240 scb->flags = SCB_WMECAP | SCB_HTCAP;
3241 for (i = 0; i < NUMPRIO; i++) {
3243 scb->seqctl[i] = 0xFFFF;
3246 scb->seqctl_nonqos = 0xFFFF;
3247 scb->magic = SCB_MAGIC;
3252 * download ucode/PCM
3253 * let ucode run to suspended
3254 * download ucode inits
3255 * config other core registers
3258 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3260 struct brcms_hardware *wlc_hw = wlc->hw;
3261 struct d11regs __iomem *regs;
3265 bool fifosz_fixup = false;
3268 struct wiphy *wiphy = wlc->wiphy;
3269 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3271 regs = wlc_hw->regs;
3273 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3276 brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3278 brcms_ucode_download(wlc_hw);
3280 * FIFOSZ fixup. driver wants to controls the fifo allocation.
3282 fifosz_fixup = true;
3284 /* let the PSM run to the suspended state, set mode to BSS STA */
3285 W_REG(®s->macintstatus, -1);
3286 brcms_b_mctrl(wlc_hw, ~0,
3287 (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3289 /* wait for ucode to self-suspend after auto-init */
3290 SPINWAIT(((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0),
3292 if ((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0)
3293 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3294 "suspend!\n", wlc_hw->unit);
3296 brcms_c_gpio_init(wlc);
3298 sflags = ai_core_sflags(wlc_hw->sih, 0, 0);
3300 if (D11REV_IS(wlc_hw->corerev, 23)) {
3301 if (BRCMS_ISNPHY(wlc_hw->band))
3302 brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3304 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3305 " %d\n", __func__, wlc_hw->unit,
3307 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3308 if (BRCMS_ISLCNPHY(wlc_hw->band))
3309 brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3311 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3312 " %d\n", __func__, wlc_hw->unit,
3315 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3316 __func__, wlc_hw->unit, wlc_hw->corerev);
3319 /* For old ucode, txfifo sizes needs to be modified(increased) */
3320 if (fifosz_fixup == true)
3321 brcms_b_corerev_fifofixup(wlc_hw);
3323 /* check txfifo allocations match between ucode and driver */
3324 buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3325 if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3329 buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3330 if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3334 buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3335 buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3336 buf[TX_AC_BK_FIFO] &= 0xff;
3337 if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3341 if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3345 buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3346 buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3347 buf[TX_BCMC_FIFO] &= 0xff;
3348 if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3352 if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3357 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3358 " driver size %d index %d\n", buf[i],
3359 wlc_hw->xmtfifo_sz[i], i);
3361 /* make sure we can still talk to the mac */
3362 WARN_ON(R_REG(®s->maccontrol) == 0xffffffff);
3364 /* band-specific inits done by wlc_bsinit() */
3366 /* Set up frame burst size and antenna swap threshold init values */
3367 brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3368 brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3370 /* enable one rx interrupt per received frame */
3371 W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT));
3373 /* set the station mode (BSS STA) */
3374 brcms_b_mctrl(wlc_hw,
3375 (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3376 (MCTL_INFRA | MCTL_DISCARD_PMQ));
3378 /* set up Beacon interval */
3379 bcnint_us = 0x8000 << 10;
3380 W_REG(®s->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT));
3381 W_REG(®s->tsf_cfpstart, bcnint_us);
3382 W_REG(®s->macintstatus, MI_GP1);
3384 /* write interrupt mask */
3385 W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK);
3387 /* allow the MAC to control the PHY clock (dynamic on/off) */
3388 brcms_b_macphyclk_set(wlc_hw, ON);
3390 /* program dynamic clock control fast powerup delay register */
3391 wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3392 W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly);
3394 /* tell the ucode the corerev */
3395 brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3397 /* tell the ucode MAC capabilities */
3398 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3399 (u16) (wlc_hw->machwcap & 0xffff));
3400 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3402 machwcap >> 16) & 0xffff));
3404 /* write retry limits to SCR, this done after PSM init */
3405 W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3406 (void)R_REG(®s->objaddr);
3407 W_REG(®s->objdata, wlc_hw->SRL);
3408 W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3409 (void)R_REG(®s->objaddr);
3410 W_REG(®s->objdata, wlc_hw->LRL);
3412 /* write rate fallback retry limits */
3413 brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3414 brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3416 AND_REG(®s->ifs_ctl, 0x0FFF);
3417 W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN);
3419 /* init the tx dma engines */
3420 for (i = 0; i < NFIFO; i++) {
3422 dma_txinit(wlc_hw->di[i]);
3425 /* init the rx dma engine(s) and post receive buffers */
3426 dma_rxinit(wlc_hw->di[RX_FIFO]);
3427 dma_rxfill(wlc_hw->di[RX_FIFO]);
3431 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec,
3435 struct brcms_c_info *wlc = wlc_hw->wlc;
3437 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3439 /* request FAST clock if not on */
3440 fastclk = wlc_hw->forcefastclk;
3442 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3444 /* disable interrupts */
3445 macintmask = brcms_intrsoff(wlc->wl);
3447 /* set up the specified band and chanspec */
3448 brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3449 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3451 /* do one-time phy inits and calibration */
3452 wlc_phy_cal_init(wlc_hw->band->pi);
3454 /* core-specific initialization */
3455 brcms_b_coreinit(wlc);
3457 /* suspend the tx fifos and mute the phy for preism cac time */
3459 brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM);
3461 /* band-specific inits */
3462 brcms_b_bsinit(wlc, chanspec);
3464 /* restore macintmask */
3465 brcms_intrsrestore(wlc->wl, macintmask);
3467 /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3468 * is suspended and brcms_c_enable_mac() will clear this override bit.
3470 mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3473 * initialize mac_suspend_depth to 1 to match ucode
3474 * initial suspended state
3476 wlc_hw->mac_suspend_depth = 1;
3478 /* restore the clk */
3480 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3483 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3486 /* Save our copy of the chanspec */
3487 wlc->chanspec = chanspec;
3489 /* Set the chanspec and power limits for this locale */
3490 brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3492 if (wlc->stf->ss_algosel_auto)
3493 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3496 brcms_c_stf_ss_update(wlc, wlc->band);
3500 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3503 struct brcms_c_rateset default_rateset;
3505 uint i, band_order[2];
3507 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3509 * We might have been bandlocked during down and the chip
3510 * power-cycled (hibernate). Figure out the right band to park on
3512 if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3513 /* updated in brcms_c_bandlock() */
3514 parkband = wlc->band->bandunit;
3515 band_order[0] = band_order[1] = parkband;
3517 /* park on the band of the specified chanspec */
3518 parkband = chspec_bandunit(chanspec);
3520 /* order so that parkband initialize last */
3521 band_order[0] = parkband ^ 1;
3522 band_order[1] = parkband;
3525 /* make each band operational, software state init */
3526 for (i = 0; i < wlc->pub->_nbands; i++) {
3527 uint j = band_order[i];
3529 wlc->band = wlc->bandstate[j];
3531 brcms_default_rateset(wlc, &default_rateset);
3533 /* fill in hw_rate */
3534 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3535 false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3536 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3538 /* init basic rate lookup */
3539 brcms_c_rate_lookup_init(wlc, &default_rateset);
3542 /* sync up phy/radio chanspec */
3543 brcms_c_set_phy_chanspec(wlc, chanspec);
3547 * ucode, hwmac update
3548 * Channel dependent updates for ucode and hw
3550 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3552 /* enable or disable any active IBSSs depending on whether or not
3553 * we are on the home channel
3555 if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3556 if (wlc->pub->associated) {
3558 * BMAC_NOTE: This is something that should be fixed
3559 * in ucode inits. I think that the ucode inits set
3560 * up the bcn templates and shm values with a bogus
3561 * beacon. This should not be done in the inits. If
3562 * ucode needs to set up a beacon for testing, the
3563 * test routines should write it down, not expect the
3564 * inits to populate a bogus beacon.
3566 if (BRCMS_PHY_11N_CAP(wlc->band))
3567 brcms_b_write_shm(wlc->hw,
3568 M_BCN_TXTSF_OFFSET, 0);
3571 /* disable an active IBSS if we are not on the home channel */
3574 /* update the various promisc bits */
3575 brcms_c_mac_bcn_promisc(wlc);
3576 brcms_c_mac_promisc(wlc);
3579 /* band-specific init */
3580 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3582 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3583 wlc->pub->unit, wlc->band->bandunit);
3585 /* write ucode ACK/CTS rate table */
3586 brcms_c_set_ratetable(wlc);
3588 /* update some band specific mac configuration */
3589 brcms_c_ucode_mac_upd(wlc);
3591 /* init antenna selection */
3592 brcms_c_antsel_init(wlc->asi);
3596 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3598 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3601 int idle_busy_ratio_x_16 = 0;
3603 isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3604 M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3605 if (duty_cycle > 100 || duty_cycle < 0) {
3606 wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n",
3611 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3612 /* Only write to shared memory when wl is up */
3614 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3617 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3619 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3625 * Initialize the base precedence map for dequeueing
3626 * from txq based on WME settings
3628 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3630 wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3631 memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3633 wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3634 wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3635 wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3636 wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3640 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3641 struct brcms_txq_info *qi, bool on, int prio)
3643 /* transmit flowcontrol is not yet implemented */
3646 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3648 struct brcms_txq_info *qi;
3650 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3652 brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3658 void brcms_c_init(struct brcms_c_info *wlc)
3660 struct d11regs __iomem *regs;
3664 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3669 * This will happen if a big-hammer was executed. In
3670 * that case, we want to go back to the channel that
3671 * we were on and not new channel
3673 if (wlc->pub->associated)
3674 chanspec = wlc->home_chanspec;
3676 chanspec = brcms_c_init_chanspec(wlc);
3678 brcms_b_init(wlc->hw, chanspec, mute);
3680 /* update beacon listen interval */
3681 brcms_c_bcn_li_upd(wlc);
3683 /* write ethernet address to core */
3684 brcms_c_set_mac(wlc->bsscfg);
3685 brcms_c_set_bssid(wlc->bsscfg);
3687 /* Update tsf_cfprep if associated and up */
3688 if (wlc->pub->associated && wlc->bsscfg->up) {
3691 /* get beacon period and convert to uS */
3692 bi = wlc->bsscfg->current_bss->beacon_period << 10;
3694 * update since init path would reset
3697 W_REG(®s->tsf_cfprep,
3698 (bi << CFPREP_CBI_SHIFT));
3700 /* Update maccontrol PM related bits */
3701 brcms_c_set_ps_ctrl(wlc);
3704 brcms_c_bandinit_ordered(wlc, chanspec);
3706 /* init probe response timeout */
3707 brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
3709 /* init max burst txop (framebursting) */
3710 brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
3712 _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
3714 /* initialize maximum allowed duty cycle */
3715 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
3716 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
3719 * Update some shared memory locations related to
3720 * max AMPDU size allowed to received
3722 brcms_c_ampdu_shm_upd(wlc->ampdu);
3724 /* band-specific inits */
3725 brcms_c_bsinit(wlc);
3727 /* Enable EDCF mode (while the MAC is suspended) */
3728 OR_REG(®s->ifs_ctl, IFS_USEEDCF);
3729 brcms_c_edcf_setparams(wlc, false);
3731 /* Init precedence maps for empty FIFOs */
3732 brcms_c_tx_prec_map_init(wlc);
3734 /* read the ucode version if we have not yet done so */
3735 if (wlc->ucode_rev == 0) {
3737 brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
3738 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
3741 /* ..now really unleash hell (allow the MAC out of suspend) */
3742 brcms_c_enable_mac(wlc);
3744 /* clear tx flow control */
3745 brcms_c_txflowcontrol_reset(wlc);
3747 /* enable the RF Disable Delay timer */
3748 W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT);
3750 /* initialize mpc delay */
3751 wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
3754 * Initialize WME parameters; if they haven't been set by some other
3755 * mechanism (IOVar, etc) then read them from the hardware.
3757 if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
3758 /* Uninitialized; read from HW */
3761 for (ac = 0; ac < AC_COUNT; ac++)
3762 wlc->wme_retries[ac] =
3763 brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
3767 void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc)
3769 wlc->bcnmisc_monitor = promisc;
3770 brcms_c_mac_bcn_promisc(wlc);
3773 void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc)
3775 if (wlc->bcnmisc_monitor)
3776 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC);
3778 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, 0);
3781 /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */
3782 void brcms_c_mac_promisc(struct brcms_c_info *wlc)
3784 u32 promisc_bits = 0;
3787 * promiscuous mode just sets MCTL_PROMISC
3788 * Note: APs get all BSS traffic without the need to set
3789 * the MCTL_PROMISC bit since all BSS data traffic is
3790 * directed at the AP
3792 if (wlc->pub->promisc)
3793 promisc_bits |= MCTL_PROMISC;
3795 /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
3796 * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is
3797 * handled in brcms_c_mac_bcn_promisc()
3800 promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL;
3802 brcms_b_mctrl(wlc->hw, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits);
3805 /* push sw hps and wake state through hardware */
3806 void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3812 hps = brcms_c_ps_allowed(wlc);
3814 BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3816 v1 = R_REG(&wlc->regs->maccontrol);
3821 brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3823 awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3826 brcms_b_wait_for_wake(wlc->hw);
3831 * Write this BSS config's MAC address to core.
3832 * Updates RXE match engine.
3834 int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3837 struct brcms_c_info *wlc = bsscfg->wlc;
3839 /* enter the MAC addr into the RXE match registers */
3840 brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3842 brcms_c_ampdu_macaddr_upd(wlc);
3847 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3848 * Updates RXE match engine.
3850 void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3852 /* we need to update BSSID in RXE match registers */
3853 brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3856 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3858 wlc_hw->shortslot = shortslot;
3860 if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3861 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3862 brcms_b_update_slot_timing(wlc_hw, shortslot);
3863 brcms_c_enable_mac(wlc_hw->wlc);
3868 * Suspend the the MAC and update the slot timing
3869 * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3871 void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3873 /* use the override if it is set */
3874 if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3875 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3877 if (wlc->shortslot == shortslot)
3880 wlc->shortslot = shortslot;
3882 brcms_b_set_shortslot(wlc->hw, shortslot);
3885 void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3887 if (wlc->home_chanspec != chanspec) {
3888 wlc->home_chanspec = chanspec;
3890 if (wlc->bsscfg->associated)
3891 wlc->bsscfg->current_bss->chanspec = chanspec;
3896 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3897 bool mute, struct txpwr_limits *txpwr)
3901 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3903 wlc_hw->chanspec = chanspec;
3905 /* Switch bands if necessary */
3906 if (wlc_hw->_nbands > 1) {
3907 bandunit = chspec_bandunit(chanspec);
3908 if (wlc_hw->band->bandunit != bandunit) {
3909 /* brcms_b_setband disables other bandunit,
3910 * use light band switch if not up yet
3913 wlc_phy_chanspec_radio_set(wlc_hw->
3914 bandstate[bandunit]->
3916 brcms_b_setband(wlc_hw, bandunit, chanspec);
3918 brcms_c_setxband(wlc_hw, bandunit);
3923 wlc_phy_initcal_enable(wlc_hw->band->pi, !mute);
3927 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3929 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3931 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3932 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3934 /* Update muting of the channel */
3935 brcms_b_mute(wlc_hw, mute, 0);
3939 /* switch to and initialize new band */
3940 static void brcms_c_setband(struct brcms_c_info *wlc,
3943 wlc->band = wlc->bandstate[bandunit];
3948 /* wait for at least one beacon before entering sleeping state */
3949 brcms_c_set_ps_ctrl(wlc);
3951 /* band-specific initializations */
3952 brcms_c_bsinit(wlc);
3955 void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3958 bool switchband = false;
3959 u16 old_chanspec = wlc->chanspec;
3961 if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3962 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3963 wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3967 /* Switch bands if necessary */
3968 if (wlc->pub->_nbands > 1) {
3969 bandunit = chspec_bandunit(chanspec);
3970 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3972 if (wlc->bandlocked) {
3973 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3974 "band is locked!\n",
3975 wlc->pub->unit, __func__,
3976 CHSPEC_CHANNEL(chanspec));
3980 * should the setband call come after the
3981 * brcms_b_chanspec() ? if the setband updates
3982 * (brcms_c_bsinit) use low level calls to inspect and
3983 * set state, the state inspected may be from the wrong
3984 * band, or the following brcms_b_set_chanspec() may
3987 brcms_c_setband(wlc, bandunit);
3991 /* sync up phy/radio chanspec */
3992 brcms_c_set_phy_chanspec(wlc, chanspec);
3994 /* init antenna selection */
3995 if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
3996 brcms_c_antsel_init(wlc->asi);
3998 /* Fix the hardware rateset based on bw.
3999 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
4001 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
4002 wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
4005 /* update some mac configuration since chanspec changed */
4006 brcms_c_ucode_mac_upd(wlc);
4009 u32 brcms_c_lowest_basic_rspec(struct brcms_c_info *wlc,
4010 struct brcms_c_rateset *rs)
4012 u32 lowest_basic_rspec;
4015 /* Use the lowest basic rate */
4016 lowest_basic_rspec = rs->rates[0] & BRCMS_RATE_MASK;
4017 for (i = 0; i < rs->count; i++) {
4018 if (rs->rates[i] & BRCMS_RATE_FLAG) {
4019 lowest_basic_rspec = rs->rates[i] & BRCMS_RATE_MASK;
4025 * pick siso/cdd as default for OFDM (note no basic
4026 * rate MCSs are supported yet)
4028 if (is_ofdm_rate(lowest_basic_rspec))
4029 lowest_basic_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
4031 return lowest_basic_rspec;
4035 * This function changes the phytxctl for beacon based on current
4036 * beacon ratespec AND txant setting as per this table:
4037 * ratespec CCK ant = wlc->stf->txant
4040 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4044 u16 phytxant = wlc->stf->phytxant;
4045 u16 mask = PHY_TXC_ANT_MASK;
4047 /* for non-siso rates or default setting, use the available chains */
4048 if (BRCMS_PHY_11N_CAP(wlc->band))
4049 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4051 phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4052 phyctl = (phyctl & ~mask) | phytxant;
4053 brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4057 * centralized protection config change function to simplify debugging, no
4058 * consistency checking this should be called only on changes to avoid overhead
4059 * in periodic function
4061 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4063 BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4066 case BRCMS_PROT_G_SPEC:
4067 wlc->protection->_g = (bool) val;
4069 case BRCMS_PROT_G_OVR:
4070 wlc->protection->g_override = (s8) val;
4072 case BRCMS_PROT_G_USER:
4073 wlc->protection->gmode_user = (u8) val;
4075 case BRCMS_PROT_OVERLAP:
4076 wlc->protection->overlap = (s8) val;
4078 case BRCMS_PROT_N_USER:
4079 wlc->protection->nmode_user = (s8) val;
4081 case BRCMS_PROT_N_CFG:
4082 wlc->protection->n_cfg = (s8) val;
4084 case BRCMS_PROT_N_CFG_OVR:
4085 wlc->protection->n_cfg_override = (s8) val;
4087 case BRCMS_PROT_N_NONGF:
4088 wlc->protection->nongf = (bool) val;
4090 case BRCMS_PROT_N_NONGF_OVR:
4091 wlc->protection->nongf_override = (s8) val;
4093 case BRCMS_PROT_N_PAM_OVR:
4094 wlc->protection->n_pam_override = (s8) val;
4096 case BRCMS_PROT_N_OBSS:
4097 wlc->protection->n_obss = (bool) val;
4106 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4109 brcms_c_update_beacon(wlc);
4110 brcms_c_update_probe_resp(wlc, true);
4114 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4116 wlc->stf->ldpc = val;
4119 brcms_c_update_beacon(wlc);
4120 brcms_c_update_probe_resp(wlc, true);
4121 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4125 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4126 const struct ieee80211_tx_queue_params *params,
4130 struct shm_acparams acp_shm;
4133 /* Only apply params if the core is out of reset and has clocks */
4135 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4140 memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4141 /* fill in shm ac params struct */
4142 acp_shm.txop = params->txop;
4143 /* convert from units of 32us to us for ucode */
4144 wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4145 EDCF_TXOP2USEC(acp_shm.txop);
4146 acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4148 if (aci == AC_VI && acp_shm.txop == 0
4149 && acp_shm.aifs < EDCF_AIFSN_MAX)
4152 if (acp_shm.aifs < EDCF_AIFSN_MIN
4153 || acp_shm.aifs > EDCF_AIFSN_MAX) {
4154 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4155 "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4157 acp_shm.cwmin = params->cw_min;
4158 acp_shm.cwmax = params->cw_max;
4159 acp_shm.cwcur = acp_shm.cwmin;
4161 R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur;
4162 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4163 /* Indicate the new params to the ucode */
4164 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4167 M_EDCF_STATUS_OFF));
4168 acp_shm.status |= WME_STATUS_NEWAC;
4170 /* Fill in shm acparam table */
4171 shm_entry = (u16 *) &acp_shm;
4172 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4173 brcms_b_write_shm(wlc->hw,
4175 wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4180 brcms_c_suspend_mac_and_wait(wlc);
4181 brcms_c_enable_mac(wlc);
4185 void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4189 struct ieee80211_tx_queue_params txq_pars;
4190 static const struct edcf_acparam default_edcf_acparams[] = {
4191 {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4192 {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4193 {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4194 {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4195 }; /* ucode needs these parameters during its initialization */
4196 const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4198 for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) {
4199 /* find out which ac this set of params applies to */
4200 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4202 /* fill in shm ac params struct */
4203 txq_pars.txop = edcf_acp->TXOP;
4204 txq_pars.aifs = edcf_acp->ACI;
4206 /* CWmin = 2^(ECWmin) - 1 */
4207 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4208 /* CWmax = 2^(ECWmax) - 1 */
4209 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4210 >> EDCF_ECWMAX_SHIFT);
4211 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4215 brcms_c_suspend_mac_and_wait(wlc);
4216 brcms_c_enable_mac(wlc);
4220 /* maintain LED behavior in down state */
4221 static void brcms_c_down_led_upd(struct brcms_c_info *wlc)
4224 * maintain LEDs while in down state, turn on sbclk if
4225 * not available yet. Turn on sbclk if necessary
4227 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_FLIP);
4228 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_FLIP);
4231 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4233 /* Don't start the timer if HWRADIO feature is disabled */
4234 if (wlc->radio_monitor)
4237 wlc->radio_monitor = true;
4238 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4239 brcms_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK,
4243 void brcms_c_radio_disable(struct brcms_c_info *wlc)
4245 if (!wlc->pub->up) {
4246 brcms_c_down_led_upd(wlc);
4250 brcms_c_radio_monitor_start(wlc);
4251 brcms_down(wlc->wl);
4254 static void brcms_c_radio_enable(struct brcms_c_info *wlc)
4259 if (brcms_deviceremoved(wlc))
4265 bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4267 if (!wlc->radio_monitor)
4270 wlc->radio_monitor = false;
4271 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4272 return brcms_del_timer(wlc->wl, wlc->radio_timer);
4275 /* read hwdisable state and propagate to wlc flag */
4276 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4278 if (wlc->pub->hw_off)
4281 if (brcms_b_radio_read_hwdisabled(wlc->hw))
4282 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4284 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4288 * centralized radio disable/enable function,
4289 * invoke radio enable/disable after updating hwradio status
4291 static void brcms_c_radio_upd(struct brcms_c_info *wlc)
4293 if (wlc->pub->radio_disabled)
4294 brcms_c_radio_disable(wlc);
4296 brcms_c_radio_enable(wlc);
4299 /* update hwradio status and return it */
4300 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4302 brcms_c_radio_hwdisable_upd(wlc);
4304 return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4308 /* periodical query hw radio button while driver is "down" */
4309 static void brcms_c_radio_timer(void *arg)
4311 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4313 if (brcms_deviceremoved(wlc)) {
4314 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4316 brcms_down(wlc->wl);
4320 /* cap mpc off count */
4321 if (wlc->mpc_offcnt < BRCMS_MPC_MAX_DELAYCNT)
4324 brcms_c_radio_hwdisable_upd(wlc);
4325 brcms_c_radio_upd(wlc);
4328 /* common low-level watchdog code */
4329 static void brcms_b_watchdog(void *arg)
4331 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4332 struct brcms_hardware *wlc_hw = wlc->hw;
4334 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4339 /* increment second count */
4342 /* Check for FIFO error interrupts */
4343 brcms_b_fifoerrors(wlc_hw);
4345 /* make sure RX dma has buffers */
4346 dma_rxfill(wlc->hw->di[RX_FIFO]);
4348 wlc_phy_watchdog(wlc_hw->band->pi);
4351 /* common watchdog code */
4352 static void brcms_c_watchdog(void *arg)
4354 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4356 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4361 if (brcms_deviceremoved(wlc)) {
4362 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4364 brcms_down(wlc->wl);
4368 /* increment second count */
4371 /* delay radio disable */
4372 if (wlc->mpc_delay_off) {
4373 if (--wlc->mpc_delay_off == 0) {
4374 mboolset(wlc->pub->radio_disabled,
4375 WL_RADIO_MPC_DISABLE);
4376 if (wlc->mpc && brcms_c_ismpc(wlc))
4377 wlc->mpc_offcnt = 0;
4382 brcms_c_radio_mpc_upd(wlc);
4383 /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */
4384 brcms_c_radio_hwdisable_upd(wlc);
4385 brcms_c_radio_upd(wlc);
4386 /* if radio is disable, driver may be down, quit here */
4387 if (wlc->pub->radio_disabled)
4390 brcms_b_watchdog(wlc);
4393 * occasionally sample mac stat counters to
4394 * detect 16-bit counter wrap
4396 if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4397 brcms_c_statsupd(wlc);
4399 if (BRCMS_ISNPHY(wlc->band) &&
4400 ((wlc->pub->now - wlc->tempsense_lasttime) >=
4401 BRCMS_TEMPSENSE_PERIOD)) {
4402 wlc->tempsense_lasttime = wlc->pub->now;
4403 brcms_c_tempsense_upd(wlc);
4407 static void brcms_c_watchdog_by_timer(void *arg)
4409 brcms_c_watchdog(arg);
4412 bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4414 wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4416 if (!wlc->wdtimer) {
4417 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer "
4422 wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4424 if (!wlc->radio_timer) {
4425 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer "
4437 * Initialize brcms_c_info default values ...
4438 * may get overrides later in this function
4440 void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4444 /* Save our copy of the chanspec */
4445 wlc->chanspec = ch20mhz_chspec(1);
4447 /* various 802.11g modes */
4448 wlc->shortslot = false;
4449 wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4451 brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4452 brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4454 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4455 BRCMS_PROTECTION_AUTO);
4456 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4457 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4458 BRCMS_PROTECTION_AUTO);
4459 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4460 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4462 brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4463 BRCMS_PROTECTION_CTL_OVERLAP);
4465 /* 802.11g draft 4.0 NonERP elt advertisement */
4466 wlc->include_legacy_erp = true;
4468 wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4469 wlc->stf->txant = ANT_TX_DEF;
4471 wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4473 wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4474 for (i = 0; i < NFIFO; i++)
4475 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4476 wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4478 /* default rate fallback retry limits */
4479 wlc->SFBL = RETRY_SHORT_FB;
4480 wlc->LFBL = RETRY_LONG_FB;
4482 /* default mac retry limits */
4483 wlc->SRL = RETRY_SHORT_DEF;
4484 wlc->LRL = RETRY_LONG_DEF;
4486 /* WME QoS mode is Auto by default */
4487 wlc->pub->_ampdu = AMPDU_AGG_HOST;
4488 wlc->pub->bcmerror = 0;
4490 /* initialize mpc delay */
4491 wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
4494 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4498 unit = wlc->pub->unit;
4500 wlc->asi = brcms_c_antsel_attach(wlc);
4501 if (wlc->asi == NULL) {
4502 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4508 wlc->ampdu = brcms_c_ampdu_attach(wlc);
4509 if (wlc->ampdu == NULL) {
4510 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4516 if ((brcms_c_stf_attach(wlc) != 0)) {
4517 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4526 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4532 * run backplane attach, init nvram
4534 * initialize software state for each core and band
4535 * put the whole chip in reset(driver down state), no clock
4537 static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
4538 uint unit, bool piomode, void __iomem *regsva,
4539 struct pci_dev *btparam)
4541 struct brcms_hardware *wlc_hw;
4542 struct d11regs __iomem *regs;
4543 char *macaddr = NULL;
4547 struct shared_phy_params sha_params;
4548 struct wiphy *wiphy = wlc->wiphy;
4550 BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor,
4557 wlc_hw->unit = unit;
4558 wlc_hw->band = wlc_hw->bandstate[0];
4559 wlc_hw->_piomode = piomode;
4561 /* populate struct brcms_hardware with default values */
4562 brcms_b_info_init(wlc_hw);
4565 * Do the hardware portion of the attach. Also initialize software
4566 * state that depends on the particular hardware we are running.
4568 wlc_hw->sih = ai_attach(regsva, btparam);
4569 if (wlc_hw->sih == NULL) {
4570 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4576 /* verify again the device is supported */
4577 if (!brcms_c_chipmatch(vendor, device)) {
4578 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4579 "vendor/device (0x%x/0x%x)\n",
4580 unit, vendor, device);
4585 wlc_hw->vendorid = vendor;
4586 wlc_hw->deviceid = device;
4588 /* set bar0 window to point at D11 core */
4589 wlc_hw->regs = (struct d11regs __iomem *)
4590 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
4591 wlc_hw->corerev = ai_corerev(wlc_hw->sih);
4593 regs = wlc_hw->regs;
4595 wlc->regs = wlc_hw->regs;
4597 /* validate chip, chiprev and corerev */
4598 if (!brcms_c_isgoodchip(wlc_hw)) {
4603 /* initialize power control registers */
4604 ai_clkctl_init(wlc_hw->sih);
4606 /* request fastclock and force fastclock for the rest of attach
4607 * bring the d11 core out of reset.
4608 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4609 * is still false; But it will be called again inside wlc_corereset,
4610 * after d11 is out of reset.
4612 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4613 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4615 if (!brcms_b_validate_chip_access(wlc_hw)) {
4616 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4622 /* get the board rev, used just below */
4623 j = getintvar(wlc_hw->sih, BRCMS_SROM_BOARDREV);
4624 /* promote srom boardrev of 0xFF to 1 */
4625 if (j == BOARDREV_PROMOTABLE)
4626 j = BOARDREV_PROMOTED;
4627 wlc_hw->boardrev = (u16) j;
4628 if (!brcms_c_validboardtype(wlc_hw)) {
4629 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4630 "board type (0x%x)" " or revision level (0x%x)\n",
4631 unit, wlc_hw->sih->boardtype, wlc_hw->boardrev);
4635 wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, BRCMS_SROM_REV);
4636 wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih,
4637 BRCMS_SROM_BOARDFLAGS);
4638 wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih,
4639 BRCMS_SROM_BOARDFLAGS2);
4641 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4642 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4644 /* check device id(srom, nvram etc.) to set bands */
4645 if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4646 wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4647 /* Dualband boards */
4648 wlc_hw->_nbands = 2;
4650 wlc_hw->_nbands = 1;
4652 if ((wlc_hw->sih->chip == BCM43225_CHIP_ID))
4653 wlc_hw->_nbands = 1;
4655 /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4656 * unconditionally does the init of these values
4658 wlc->vendorid = wlc_hw->vendorid;
4659 wlc->deviceid = wlc_hw->deviceid;
4660 wlc->pub->sih = wlc_hw->sih;
4661 wlc->pub->corerev = wlc_hw->corerev;
4662 wlc->pub->sromrev = wlc_hw->sromrev;
4663 wlc->pub->boardrev = wlc_hw->boardrev;
4664 wlc->pub->boardflags = wlc_hw->boardflags;
4665 wlc->pub->boardflags2 = wlc_hw->boardflags2;
4666 wlc->pub->_nbands = wlc_hw->_nbands;
4668 wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4670 if (wlc_hw->physhim == NULL) {
4671 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4677 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4678 sha_params.sih = wlc_hw->sih;
4679 sha_params.physhim = wlc_hw->physhim;
4680 sha_params.unit = unit;
4681 sha_params.corerev = wlc_hw->corerev;
4682 sha_params.vid = wlc_hw->vendorid;
4683 sha_params.did = wlc_hw->deviceid;
4684 sha_params.chip = wlc_hw->sih->chip;
4685 sha_params.chiprev = wlc_hw->sih->chiprev;
4686 sha_params.chippkg = wlc_hw->sih->chippkg;
4687 sha_params.sromrev = wlc_hw->sromrev;
4688 sha_params.boardtype = wlc_hw->sih->boardtype;
4689 sha_params.boardrev = wlc_hw->boardrev;
4690 sha_params.boardvendor = wlc_hw->sih->boardvendor;
4691 sha_params.boardflags = wlc_hw->boardflags;
4692 sha_params.boardflags2 = wlc_hw->boardflags2;
4693 sha_params.buscorerev = wlc_hw->sih->buscorerev;
4695 /* alloc and save pointer to shared phy state area */
4696 wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4697 if (!wlc_hw->phy_sh) {
4702 /* initialize software state for each core and band */
4703 for (j = 0; j < wlc_hw->_nbands; j++) {
4705 * band0 is always 2.4Ghz
4706 * band1, if present, is 5Ghz
4709 brcms_c_setxband(wlc_hw, j);
4711 wlc_hw->band->bandunit = j;
4712 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4713 wlc->band->bandunit = j;
4714 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4715 wlc->core->coreidx = ai_coreidx(wlc_hw->sih);
4717 wlc_hw->machwcap = R_REG(®s->machwcap);
4718 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4720 /* init tx fifo size */
4721 wlc_hw->xmtfifo_sz =
4722 xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4724 /* Get a phy for this band */
4726 wlc_phy_attach(wlc_hw->phy_sh, regs,
4727 wlc_hw->band->bandtype,
4729 if (wlc_hw->band->pi == NULL) {
4730 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4731 "attach failed\n", unit);
4736 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4738 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4739 &wlc_hw->band->phyrev,
4740 &wlc_hw->band->radioid,
4741 &wlc_hw->band->radiorev);
4742 wlc_hw->band->abgphy_encore =
4743 wlc_phy_get_encore(wlc_hw->band->pi);
4744 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4745 wlc_hw->band->core_flags =
4746 wlc_phy_get_coreflags(wlc_hw->band->pi);
4748 /* verify good phy_type & supported phy revision */
4749 if (BRCMS_ISNPHY(wlc_hw->band)) {
4750 if (NCONF_HAS(wlc_hw->band->phyrev))
4754 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4755 if (LCNCONF_HAS(wlc_hw->band->phyrev))
4761 wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4762 "phy type/rev (%d/%d)\n", unit,
4763 wlc_hw->band->phytype, wlc_hw->band->phyrev);
4770 * BMAC_NOTE: wlc->band->pi should not be set below and should
4771 * be done in the high level attach. However we can not make
4772 * that change until all low level access is changed to
4773 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4774 * keeping wlc_hw->band->pi as well for incremental update of
4775 * low level fns, and cut over low only init when all fns
4778 wlc->band->pi = wlc_hw->band->pi;
4779 wlc->band->phytype = wlc_hw->band->phytype;
4780 wlc->band->phyrev = wlc_hw->band->phyrev;
4781 wlc->band->radioid = wlc_hw->band->radioid;
4782 wlc->band->radiorev = wlc_hw->band->radiorev;
4784 /* default contention windows size limits */
4785 wlc_hw->band->CWmin = APHY_CWMIN;
4786 wlc_hw->band->CWmax = PHY_CWMAX;
4788 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4794 /* disable core to match driver "down" state */
4795 brcms_c_coredisable(wlc_hw);
4797 /* Match driver "down" state */
4798 ai_pci_down(wlc_hw->sih);
4800 /* register sb interrupt callback functions */
4801 ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff,
4802 (void *)brcms_c_wlintrsrestore, NULL, wlc);
4804 /* turn off pll and xtal to match driver "down" state */
4805 brcms_b_xtal(wlc_hw, OFF);
4807 /* *******************************************************************
4808 * The hardware is in the DOWN state at this point. D11 core
4809 * or cores are in reset with clocks off, and the board PLLs
4810 * are off if possible.
4812 * Beyond this point, wlc->sbclk == false and chip registers
4813 * should not be touched.
4814 *********************************************************************
4817 /* init etheraddr state variables */
4818 macaddr = brcms_c_get_macaddr(wlc_hw);
4819 if (macaddr == NULL) {
4820 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4825 if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4826 is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4827 is_zero_ether_addr(wlc_hw->etheraddr)) {
4828 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4835 "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4836 wlc_hw->deviceid, wlc_hw->_nbands,
4837 wlc_hw->sih->boardtype, macaddr);
4842 wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4847 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4850 unit = wlc->pub->unit;
4852 if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4853 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4854 wlc->band->antgain = 8;
4855 } else if (wlc->band->antgain == -1) {
4856 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4857 " srom, using 2dB\n", unit, __func__);
4858 wlc->band->antgain = 8;
4861 /* Older sroms specified gain in whole dbm only. In order
4862 * be able to specify qdbm granularity and remain backward
4863 * compatible the whole dbms are now encoded in only
4864 * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4865 * 6 bit signed number ranges from -32 - 31.
4869 * 0xc1 = 1.75 db (1 + 3 quarters),
4870 * 0x3f = -1 (-1 + 0 quarters),
4871 * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4872 * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4874 gain = wlc->band->antgain & 0x3f;
4875 gain <<= 2; /* Sign extend */
4877 fract = (wlc->band->antgain & 0xc0) >> 6;
4878 wlc->band->antgain = 4 * gain + fract;
4882 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4887 struct si_pub *sih = wlc->hw->sih;
4889 unit = wlc->pub->unit;
4890 bandtype = wlc->band->bandtype;
4892 /* get antennas available */
4893 if (bandtype == BRCM_BAND_5G)
4894 aa = (s8) getintvar(sih, BRCMS_SROM_AA5G);
4896 aa = (s8) getintvar(sih, BRCMS_SROM_AA2G);
4898 if ((aa < 1) || (aa > 15)) {
4899 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4900 " srom (0x%x), using 3\n", unit, __func__, aa);
4904 /* reset the defaults if we have a single antenna */
4906 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4907 wlc->stf->txant = ANT_TX_FORCE_0;
4908 } else if (aa == 2) {
4909 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4910 wlc->stf->txant = ANT_TX_FORCE_1;
4914 /* Compute Antenna Gain */
4915 if (bandtype == BRCM_BAND_5G)
4916 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG1);
4918 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG0);
4920 brcms_c_attach_antgain_init(wlc);
4925 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4928 struct brcms_band *band;
4929 struct brcms_bss_info *bi = wlc->default_bss;
4931 /* init default and target BSS with some sane initial values */
4932 memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4933 bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4935 /* fill the default channel as the first valid channel
4936 * starting from the 2G channels
4938 chanspec = ch20mhz_chspec(1);
4939 wlc->home_chanspec = bi->chanspec = chanspec;
4941 /* find the band of our default channel */
4943 if (wlc->pub->_nbands > 1 &&
4944 band->bandunit != chspec_bandunit(chanspec))
4945 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4947 /* init bss rates to the band specific default rate set */
4948 brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4949 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4950 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4951 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4953 if (wlc->pub->_n_enab & SUPPORT_11N)
4954 bi->flags |= BRCMS_BSS_HT;
4957 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
4959 struct brcms_txq_info *qi, *p;
4961 qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
4964 * Have enough room for control packets along with HI watermark
4965 * Also, add room to txq for total psq packets if all the SCBs
4966 * leave PS mode. The watermark for flowcontrol to OS packets
4967 * will remain the same
4969 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
4970 2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
4972 /* add this queue to the the global list */
4975 wlc->tx_queues = qi;
4977 while (p->next != NULL)
4985 static void brcms_c_txq_free(struct brcms_c_info *wlc,
4986 struct brcms_txq_info *qi)
4988 struct brcms_txq_info *p;
4993 /* remove the queue from the linked list */
4996 wlc->tx_queues = p->next;
4998 while (p != NULL && p->next != qi)
5001 p->next = p->next->next;
5007 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
5010 struct brcms_band *band;
5012 for (i = 0; i < wlc->pub->_nbands; i++) {
5013 band = wlc->bandstate[i];
5014 if (band->bandtype == BRCM_BAND_5G) {
5015 if ((bwcap == BRCMS_N_BW_40ALL)
5016 || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
5017 band->mimo_cap_40 = true;
5019 band->mimo_cap_40 = false;
5021 if (bwcap == BRCMS_N_BW_40ALL)
5022 band->mimo_cap_40 = true;
5024 band->mimo_cap_40 = false;
5030 * The common driver entry routine. Error codes should be unique
5032 struct brcms_c_info *
5033 brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
5034 bool piomode, void __iomem *regsva, struct pci_dev *btparam,
5037 struct brcms_c_info *wlc;
5040 struct brcms_pub *pub;
5042 /* allocate struct brcms_c_info state and its substructures */
5043 wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device);
5046 wlc->wiphy = wl->wiphy;
5053 wlc->band = wlc->bandstate[0];
5054 wlc->core = wlc->corestate;
5057 pub->_piomode = piomode;
5058 wlc->bandinit_pending = false;
5060 /* populate struct brcms_c_info with default values */
5061 brcms_c_info_init(wlc, unit);
5063 /* update sta/ap related parameters */
5064 brcms_c_ap_upd(wlc);
5067 * low level attach steps(all hw accesses go
5068 * inside, no more in rest of the attach)
5070 err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva,
5075 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
5077 pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
5079 /* disable allowed duty cycle */
5080 wlc->tx_duty_cycle_ofdm = 0;
5081 wlc->tx_duty_cycle_cck = 0;
5083 brcms_c_stf_phy_chain_calc(wlc);
5085 /* txchain 1: txant 0, txchain 2: txant 1 */
5086 if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
5087 wlc->stf->txant = wlc->stf->hw_txchain - 1;
5089 /* push to BMAC driver */
5090 wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
5091 wlc->stf->hw_rxchain);
5093 /* pull up some info resulting from the low attach */
5094 for (i = 0; i < NFIFO; i++)
5095 wlc->core->txavail[i] = wlc->hw->txavail[i];
5097 memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
5098 memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
5100 for (j = 0; j < wlc->pub->_nbands; j++) {
5101 wlc->band = wlc->bandstate[j];
5103 if (!brcms_c_attach_stf_ant_init(wlc)) {
5108 /* default contention windows size limits */
5109 wlc->band->CWmin = APHY_CWMIN;
5110 wlc->band->CWmax = PHY_CWMAX;
5112 /* init gmode value */
5113 if (wlc->band->bandtype == BRCM_BAND_2G) {
5114 wlc->band->gmode = GMODE_AUTO;
5115 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
5119 /* init _n_enab supported mode */
5120 if (BRCMS_PHY_11N_CAP(wlc->band)) {
5121 pub->_n_enab = SUPPORT_11N;
5122 brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
5124 SUPPORT_11N) ? WL_11N_2x2 :
5128 /* init per-band default rateset, depend on band->gmode */
5129 brcms_default_rateset(wlc, &wlc->band->defrateset);
5131 /* fill in hw_rateset */
5132 brcms_c_rateset_filter(&wlc->band->defrateset,
5133 &wlc->band->hw_rateset, false,
5134 BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
5135 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
5139 * update antenna config due to
5140 * wlc->stf->txant/txchain/ant_rx_ovr change
5142 brcms_c_stf_phy_txant_upd(wlc);
5144 /* attach each modules */
5145 err = brcms_c_attach_module(wlc);
5149 if (!brcms_c_timers_init(wlc, unit)) {
5150 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
5156 /* depend on rateset, gmode */
5157 wlc->cmi = brcms_c_channel_mgr_attach(wlc);
5159 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
5160 "\n", unit, __func__);
5165 /* init default when all parameters are ready, i.e. ->rateset */
5166 brcms_c_bss_default_init(wlc);
5169 * Complete the wlc default state initializations..
5172 /* allocate our initial queue */
5173 wlc->pkt_queue = brcms_c_txq_alloc(wlc);
5174 if (wlc->pkt_queue == NULL) {
5175 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
5181 wlc->bsscfg->wlc = wlc;
5183 wlc->mimoft = FT_HT;
5184 wlc->mimo_40txbw = AUTO;
5185 wlc->ofdm_40txbw = AUTO;
5186 wlc->cck_40txbw = AUTO;
5187 brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
5189 /* Set default values of SGI */
5190 if (BRCMS_SGI_CAP_PHY(wlc)) {
5191 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
5193 } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
5194 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
5197 brcms_c_ht_update_sgi_rx(wlc, 0);
5200 /* initialize radio_mpc_disable according to wlc->mpc */
5201 brcms_c_radio_mpc_upd(wlc);
5202 brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
5210 wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
5211 unit, __func__, err);
5213 brcms_c_detach(wlc);
5220 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
5222 /* free timer state */
5224 brcms_free_timer(wlc->wl, wlc->wdtimer);
5225 wlc->wdtimer = NULL;
5227 if (wlc->radio_timer) {
5228 brcms_free_timer(wlc->wl, wlc->radio_timer);
5229 wlc->radio_timer = NULL;
5233 static void brcms_c_detach_module(struct brcms_c_info *wlc)
5236 brcms_c_antsel_detach(wlc->asi);
5241 brcms_c_ampdu_detach(wlc->ampdu);
5245 brcms_c_stf_detach(wlc);
5251 static int brcms_b_detach(struct brcms_c_info *wlc)
5254 struct brcms_hw_band *band;
5255 struct brcms_hardware *wlc_hw = wlc->hw;
5262 * detach interrupt sync mechanism since interrupt is disabled
5263 * and per-port interrupt object may has been freed. this must
5264 * be done before sb core switch
5266 ai_deregister_intr_callback(wlc_hw->sih);
5267 ai_pci_sleep(wlc_hw->sih);
5270 brcms_b_detach_dmapio(wlc_hw);
5272 band = wlc_hw->band;
5273 for (i = 0; i < wlc_hw->_nbands; i++) {
5275 /* Detach this band's phy */
5276 wlc_phy_detach(band->pi);
5279 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
5282 /* Free shared phy state */
5283 kfree(wlc_hw->phy_sh);
5285 wlc_phy_shim_detach(wlc_hw->physhim);
5288 ai_detach(wlc_hw->sih);
5297 * Return a count of the number of driver callbacks still pending.
5299 * General policy is that brcms_c_detach can only dealloc/free software states.
5300 * It can NOT touch hardware registers since the d11core may be in reset and
5301 * clock may not be available.
5302 * One exception is sb register access, which is possible if crystal is turned
5303 * on after "down" state, driver should avoid software timer with the exception
5306 uint brcms_c_detach(struct brcms_c_info *wlc)
5313 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5315 callbacks += brcms_b_detach(wlc);
5317 /* delete software timers */
5318 if (!brcms_c_radio_monitor_stop(wlc))
5321 brcms_c_channel_mgr_detach(wlc->cmi);
5323 brcms_c_timers_deinit(wlc);
5325 brcms_c_detach_module(wlc);
5328 while (wlc->tx_queues != NULL)
5329 brcms_c_txq_free(wlc, wlc->tx_queues);
5331 brcms_c_detach_mfree(wlc);
5335 /* update state that depends on the current value of "ap" */
5336 void brcms_c_ap_upd(struct brcms_c_info *wlc)
5338 /* STA-BSS; short capable */
5339 wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5346 * return true if Minimum Power Consumption should
5347 * be entered, false otherwise
5349 bool brcms_c_is_non_delay_mpc(struct brcms_c_info *wlc)
5354 bool brcms_c_ismpc(struct brcms_c_info *wlc)
5356 return (wlc->mpc_delay_off == 0) && (brcms_c_is_non_delay_mpc(wlc));
5359 void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc)
5361 bool mpc_radio, radio_state;
5364 * Clear the WL_RADIO_MPC_DISABLE bit when mpc feature is disabled
5365 * in case the WL_RADIO_MPC_DISABLE bit was set. Stop the radio
5366 * monitor also when WL_RADIO_MPC_DISABLE is the only reason that
5367 * the radio is going down.
5370 if (!wlc->pub->radio_disabled)
5372 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
5373 brcms_c_radio_upd(wlc);
5374 if (!wlc->pub->radio_disabled)
5375 brcms_c_radio_monitor_stop(wlc);
5380 * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in
5381 * wlc->pub->radio_disabled to go ON, always call radio_upd
5382 * synchronously to go OFF, postpone radio_upd to later when
5383 * context is safe(e.g. watchdog)
5386 (mboolisset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE) ? OFF :
5388 mpc_radio = (brcms_c_ismpc(wlc) == true) ? OFF : ON;
5390 if (radio_state == ON && mpc_radio == OFF)
5391 wlc->mpc_delay_off = wlc->mpc_dlycnt;
5392 else if (radio_state == OFF && mpc_radio == ON) {
5393 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
5394 brcms_c_radio_upd(wlc);
5395 if (wlc->mpc_offcnt < BRCMS_MPC_THRESHOLD)
5396 wlc->mpc_dlycnt = BRCMS_MPC_MAX_DELAYCNT;
5398 wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
5401 * Below logic is meant to capture the transition from mpc off
5402 * to mpc on for reasons other than wlc->mpc_delay_off keeping
5403 * the mpc off. In that case reset wlc->mpc_delay_off to
5404 * wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off
5406 if ((wlc->prev_non_delay_mpc == false) &&
5407 (brcms_c_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off)
5408 wlc->mpc_delay_off = wlc->mpc_dlycnt;
5410 wlc->prev_non_delay_mpc = brcms_c_is_non_delay_mpc(wlc);
5412 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5413 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5415 if (wlc_hw->wlc->pub->hw_up)
5418 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5421 * Enable pll and xtal, initialize the power control registers,
5422 * and force fastclock for the remainder of brcms_c_up().
5424 brcms_b_xtal(wlc_hw, ON);
5425 ai_clkctl_init(wlc_hw->sih);
5426 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5428 ai_pci_fixcfg(wlc_hw->sih);
5431 * AI chip doesn't restore bar0win2 on
5432 * hibernation/resume, need sw fixup
5434 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
5435 (wlc_hw->sih->chip == BCM43225_CHIP_ID))
5436 wlc_hw->regs = (struct d11regs __iomem *)
5437 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
5440 * Inform phy that a POR reset has occurred so
5441 * it does a complete phy init
5443 wlc_phy_por_inform(wlc_hw->band->pi);
5445 wlc_hw->ucode_loaded = false;
5446 wlc_hw->wlc->pub->hw_up = true;
5448 if ((wlc_hw->boardflags & BFL_FEM)
5449 && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
5451 (wlc_hw->boardrev >= 0x1250
5452 && (wlc_hw->boardflags & BFL_FEM_BT)))
5453 ai_epa_4313war(wlc_hw->sih);
5457 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5461 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5464 * Enable pll and xtal, initialize the power control registers,
5465 * and force fastclock for the remainder of brcms_c_up().
5467 brcms_b_xtal(wlc_hw, ON);
5468 ai_clkctl_init(wlc_hw->sih);
5469 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5472 * Configure pci/pcmcia here instead of in brcms_c_attach()
5473 * to allow mfg hotswap: down, hotswap (chip power cycle), up.
5475 coremask = (1 << wlc_hw->wlc->core->coreidx);
5477 ai_pci_setup(wlc_hw->sih, coremask);
5480 * Need to read the hwradio status here to cover the case where the
5481 * system is loaded with the hw radio disabled. We do not want to
5482 * bring the driver up in this case.
5484 if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5485 /* put SB PCI in down state again */
5486 ai_pci_down(wlc_hw->sih);
5487 brcms_b_xtal(wlc_hw, OFF);
5491 ai_pci_up(wlc_hw->sih);
5493 /* reset the d11 core */
5494 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5499 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5501 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5504 wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5506 /* FULLY enable dynamic power control and d11 core interrupt */
5507 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5508 brcms_intrson(wlc_hw->wlc->wl);
5513 * Write WME tunable parameters for retransmit/max rate
5514 * from wlc struct to ucode
5516 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5520 /* Need clock to do this */
5524 for (ac = 0; ac < AC_COUNT; ac++)
5525 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5526 wlc->wme_retries[ac]);
5529 /* make interface operational */
5530 int brcms_c_up(struct brcms_c_info *wlc)
5532 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5534 /* HW is turned off so don't try to access it */
5535 if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5538 if (!wlc->pub->hw_up) {
5539 brcms_b_hw_up(wlc->hw);
5540 wlc->pub->hw_up = true;
5543 if ((wlc->pub->boardflags & BFL_FEM)
5544 && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) {
5545 if (wlc->pub->boardrev >= 0x1250
5546 && (wlc->pub->boardflags & BFL_FEM_BT))
5547 brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5548 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5550 brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5551 MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5555 * Need to read the hwradio status here to cover the case where the
5556 * system is loaded with the hw radio disabled. We do not want to bring
5557 * the driver up in this case. If radio is disabled, abort up, lower
5558 * power, start radio timer and return 0(for NDIS) don't call
5559 * radio_update to avoid looping brcms_c_up.
5561 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5563 if (!wlc->pub->radio_disabled) {
5564 int status = brcms_b_up_prep(wlc->hw);
5565 if (status == -ENOMEDIUM) {
5567 (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5568 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5569 mboolset(wlc->pub->radio_disabled,
5570 WL_RADIO_HW_DISABLE);
5572 if (bsscfg->enable && bsscfg->BSS)
5573 wiphy_err(wlc->wiphy, "wl%d: up"
5575 "bsscfg_disable()\n",
5581 if (wlc->pub->radio_disabled) {
5582 brcms_c_radio_monitor_start(wlc);
5586 /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5589 brcms_c_radio_monitor_stop(wlc);
5591 /* Set EDCF hostflags */
5592 brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5594 brcms_init(wlc->wl);
5595 wlc->pub->up = true;
5597 if (wlc->bandinit_pending) {
5598 brcms_c_suspend_mac_and_wait(wlc);
5599 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5600 wlc->bandinit_pending = false;
5601 brcms_c_enable_mac(wlc);
5604 brcms_b_up_finish(wlc->hw);
5606 /* Program the TX wme params with the current settings */
5607 brcms_c_wme_retries_write(wlc);
5609 /* start one second watchdog timer */
5610 brcms_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5611 wlc->WDarmed = true;
5613 /* ensure antenna config is up to date */
5614 brcms_c_stf_phy_txant_upd(wlc);
5615 /* ensure LDPC config is in sync */
5616 brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5621 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5628 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5633 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5638 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5640 /* disable interrupts */
5642 wlc_hw->wlc->macintmask = 0;
5644 /* now disable interrupts */
5645 brcms_intrsoff(wlc_hw->wlc->wl);
5647 /* ensure we're running on the pll clock again */
5648 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5650 /* down phy at the last of this stage */
5651 callbacks += wlc_phy_down(wlc_hw->band->pi);
5656 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5661 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5667 wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5669 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5672 wlc_hw->sbclk = false;
5673 wlc_hw->clk = false;
5674 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5676 /* reclaim any posted packets */
5677 brcms_c_flushqueues(wlc_hw->wlc);
5680 /* Reset and disable the core */
5681 if (ai_iscoreup(wlc_hw->sih)) {
5682 if (R_REG(&wlc_hw->regs->maccontrol) &
5684 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5685 callbacks += brcms_reset(wlc_hw->wlc->wl);
5686 brcms_c_coredisable(wlc_hw);
5689 /* turn off primary xtal and pll */
5690 if (!wlc_hw->noreset) {
5691 ai_pci_down(wlc_hw->sih);
5692 brcms_b_xtal(wlc_hw, OFF);
5700 * Mark the interface nonoperational, stop the software mechanisms,
5701 * disable the hardware, free any transient buffer state.
5702 * Return a count of the number of driver callbacks still pending.
5704 uint brcms_c_down(struct brcms_c_info *wlc)
5709 bool dev_gone = false;
5710 struct brcms_txq_info *qi;
5712 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5714 /* check if we are already in the going down path */
5715 if (wlc->going_down) {
5716 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5717 "\n", wlc->pub->unit, __func__);
5723 /* in between, mpc could try to bring down again.. */
5724 wlc->going_down = true;
5726 callbacks += brcms_b_bmac_down_prep(wlc->hw);
5728 dev_gone = brcms_deviceremoved(wlc);
5730 /* Call any registered down handlers */
5731 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5732 if (wlc->modulecb[i].down_fn)
5734 wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5737 /* cancel the watchdog timer */
5739 if (!brcms_del_timer(wlc->wl, wlc->wdtimer))
5741 wlc->WDarmed = false;
5743 /* cancel all other timers */
5744 callbacks += brcms_c_down_del_timer(wlc);
5746 wlc->pub->up = false;
5748 wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5750 /* clear txq flow control */
5751 brcms_c_txflowcontrol_reset(wlc);
5753 /* flush tx queues */
5754 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5755 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5757 callbacks += brcms_b_down_finish(wlc->hw);
5759 /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5762 wlc->going_down = false;
5766 /* Set the current gmode configuration */
5767 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5771 struct brcms_c_rateset rs;
5772 /* Default to 54g Auto */
5773 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5774 s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5775 bool shortslot_restrict = false; /* Restrict association to stations
5776 * that support shortslot
5778 bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */
5779 /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5780 int preamble = BRCMS_PLCP_LONG;
5781 bool preamble_restrict = false; /* Restrict association to stations
5782 * that support short preambles
5784 struct brcms_band *band;
5786 /* if N-support is enabled, allow Gmode set as long as requested
5787 * Gmode is not GMODE_LEGACY_B
5789 if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5792 /* verify that we are dealing with 2G band and grab the band pointer */
5793 if (wlc->band->bandtype == BRCM_BAND_2G)
5795 else if ((wlc->pub->_nbands > 1) &&
5796 (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5797 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5801 /* Legacy or bust when no OFDM is supported by regulatory */
5802 if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5803 BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5806 /* update configuration value */
5808 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5810 /* Clear rateset override */
5811 memset(&rs, 0, sizeof(struct brcms_c_rateset));
5814 case GMODE_LEGACY_B:
5815 shortslot = BRCMS_SHORTSLOT_OFF;
5816 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5824 /* Accept defaults */
5829 preamble = BRCMS_PLCP_SHORT;
5830 preamble_restrict = true;
5833 case GMODE_PERFORMANCE:
5834 shortslot = BRCMS_SHORTSLOT_ON;
5835 shortslot_restrict = true;
5837 preamble = BRCMS_PLCP_SHORT;
5838 preamble_restrict = true;
5843 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5844 wlc->pub->unit, __func__, gmode);
5848 band->gmode = gmode;
5850 wlc->shortslot_override = shortslot;
5852 /* Use the default 11g rateset */
5854 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5857 for (i = 0; i < rs.count; i++) {
5858 if (rs.rates[i] == BRCM_RATE_6M
5859 || rs.rates[i] == BRCM_RATE_12M
5860 || rs.rates[i] == BRCM_RATE_24M)
5861 rs.rates[i] |= BRCMS_RATE_FLAG;
5865 /* Set default bss rateset */
5866 wlc->default_bss->rateset.count = rs.count;
5867 memcpy(wlc->default_bss->rateset.rates, rs.rates,
5868 sizeof(wlc->default_bss->rateset.rates));
5873 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5878 if (wlc->stf->txstreams == WL_11N_3x3)
5883 /* force GMODE_AUTO if NMODE is ON */
5884 brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5885 if (nmode == WL_11N_3x3)
5886 wlc->pub->_n_enab = SUPPORT_HT;
5888 wlc->pub->_n_enab = SUPPORT_11N;
5889 wlc->default_bss->flags |= BRCMS_BSS_HT;
5890 /* add the mcs rates to the default and hw ratesets */
5891 brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5892 wlc->stf->txstreams);
5893 for (i = 0; i < wlc->pub->_nbands; i++)
5894 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5895 wlc->default_bss->rateset.mcs, MCSSET_LEN);
5901 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5902 struct brcms_c_rateset *rs_arg)
5904 struct brcms_c_rateset rs, new;
5907 memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5909 /* check for bad count value */
5910 if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5913 /* try the current band */
5914 bandunit = wlc->band->bandunit;
5915 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5916 if (brcms_c_rate_hwrs_filter_sort_validate
5917 (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5918 wlc->stf->txstreams))
5921 /* try the other band */
5922 if (brcms_is_mband_unlocked(wlc)) {
5923 bandunit = OTHERBANDUNIT(wlc);
5924 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5925 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5927 bandstate[bandunit]->
5929 wlc->stf->txstreams))
5936 /* apply new rateset */
5937 memcpy(&wlc->default_bss->rateset, &new,
5938 sizeof(struct brcms_c_rateset));
5939 memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5940 sizeof(struct brcms_c_rateset));
5944 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5949 if (wlc->bsscfg->associated)
5950 r = wlc->bsscfg->current_bss->rateset.rates[0];
5952 r = wlc->default_bss->rateset.rates[0];
5954 wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5957 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5959 u16 chspec = ch20mhz_chspec(channel);
5961 if (channel < 0 || channel > MAXCHANNEL)
5964 if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5968 if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5969 if (wlc->band->bandunit != chspec_bandunit(chspec))
5970 wlc->bandinit_pending = true;
5972 wlc->bandinit_pending = false;
5975 wlc->default_bss->chanspec = chspec;
5976 /* brcms_c_BSSinit() will sanitize the rateset before
5978 if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5979 brcms_c_set_home_chanspec(wlc, chspec);
5980 brcms_c_suspend_mac_and_wait(wlc);
5981 brcms_c_set_chanspec(wlc, chspec);
5982 brcms_c_enable_mac(wlc);
5987 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5991 if (srl < 1 || srl > RETRY_SHORT_MAX ||
5992 lrl < 1 || lrl > RETRY_SHORT_MAX)
5998 brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
6000 for (ac = 0; ac < AC_COUNT; ac++) {
6001 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
6002 EDCF_SHORT, wlc->SRL);
6003 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
6004 EDCF_LONG, wlc->LRL);
6006 brcms_c_wme_retries_write(wlc);
6011 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
6012 struct brcm_rateset *currs)
6014 struct brcms_c_rateset *rs;
6016 if (wlc->pub->associated)
6017 rs = &wlc->bsscfg->current_bss->rateset;
6019 rs = &wlc->default_bss->rateset;
6021 /* Copy only legacy rateset section */
6022 currs->count = rs->count;
6023 memcpy(&currs->rates, &rs->rates, rs->count);
6026 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
6028 struct brcms_c_rateset internal_rs;
6031 if (rs->count > BRCMS_NUMRATES)
6034 memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
6036 /* Copy only legacy rateset section */
6037 internal_rs.count = rs->count;
6038 memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
6040 /* merge rateset coming in with the current mcsset */
6041 if (wlc->pub->_n_enab & SUPPORT_11N) {
6042 struct brcms_bss_info *mcsset_bss;
6043 if (wlc->bsscfg->associated)
6044 mcsset_bss = wlc->bsscfg->current_bss;
6046 mcsset_bss = wlc->default_bss;
6047 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
6051 bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
6053 brcms_c_ofdm_rateset_war(wlc);
6058 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
6060 if (period < DOT11_MIN_BEACON_PERIOD ||
6061 period > DOT11_MAX_BEACON_PERIOD)
6064 wlc->default_bss->beacon_period = period;
6068 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
6070 return wlc->band->phytype;
6073 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
6075 wlc->shortslot_override = sslot_override;
6078 * shortslot is an 11g feature, so no more work if we are
6079 * currently on the 5G band
6081 if (wlc->band->bandtype == BRCM_BAND_5G)
6084 if (wlc->pub->up && wlc->pub->associated) {
6085 /* let watchdog or beacon processing update shortslot */
6086 } else if (wlc->pub->up) {
6087 /* unassociated shortslot is off */
6088 brcms_c_switch_shortslot(wlc, false);
6090 /* driver is down, so just update the brcms_c_info
6092 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
6093 wlc->shortslot = false;
6096 (wlc->shortslot_override ==
6097 BRCMS_SHORTSLOT_ON);
6102 * register watchdog and down handlers.
6104 int brcms_c_module_register(struct brcms_pub *pub,
6105 const char *name, struct brcms_info *hdl,
6106 int (*d_fn)(void *handle))
6108 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
6111 /* find an empty entry and just add, no duplication check! */
6112 for (i = 0; i < BRCMS_MAXMODULES; i++) {
6113 if (wlc->modulecb[i].name[0] == '\0') {
6114 strncpy(wlc->modulecb[i].name, name,
6115 sizeof(wlc->modulecb[i].name) - 1);
6116 wlc->modulecb[i].hdl = hdl;
6117 wlc->modulecb[i].down_fn = d_fn;
6125 /* unregister module callbacks */
6126 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
6127 struct brcms_info *hdl)
6129 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
6135 for (i = 0; i < BRCMS_MAXMODULES; i++) {
6136 if (!strcmp(wlc->modulecb[i].name, name) &&
6137 (wlc->modulecb[i].hdl == hdl)) {
6138 memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
6143 /* table not found! */
6148 static const char * const supr_reason[] = {
6149 "None", "PMQ Entry", "Flush request",
6150 "Previous frag failure", "Channel mismatch",
6151 "Lifetime Expiry", "Underflow"
6154 static void brcms_c_print_txs_status(u16 s)
6156 printk(KERN_DEBUG "[15:12] %d frame attempts\n",
6157 (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT);
6158 printk(KERN_DEBUG " [11:8] %d rts attempts\n",
6159 (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT);
6160 printk(KERN_DEBUG " [7] %d PM mode indicated\n",
6161 ((s & TX_STATUS_PMINDCTD) ? 1 : 0));
6162 printk(KERN_DEBUG " [6] %d intermediate status\n",
6163 ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0));
6164 printk(KERN_DEBUG " [5] %d AMPDU\n",
6165 (s & TX_STATUS_AMPDU) ? 1 : 0);
6166 printk(KERN_DEBUG " [4:2] %d Frame Suppressed Reason (%s)\n",
6167 ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT),
6168 supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]);
6169 printk(KERN_DEBUG " [1] %d acked\n",
6170 ((s & TX_STATUS_ACK_RCV) ? 1 : 0));
6174 void brcms_c_print_txstatus(struct tx_status *txs)
6177 u16 s = txs->status;
6178 u16 ackphyrxsh = txs->ackphyrxsh;
6180 printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n");
6182 printk(KERN_DEBUG "FrameID: %04x ", txs->frameid);
6183 printk(KERN_DEBUG "TxStatus: %04x", s);
6184 printk(KERN_DEBUG "\n");
6186 brcms_c_print_txs_status(s);
6188 printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime);
6189 printk(KERN_DEBUG "Seq: %04x ", txs->sequence);
6190 printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr);
6191 printk(KERN_DEBUG "RxAckRSSI: %04x ",
6192 (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT);
6193 printk(KERN_DEBUG "RxAckSQ: %04x",
6194 (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
6195 printk(KERN_DEBUG "\n");
6196 #endif /* defined(BCMDBG) */
6199 void brcms_c_statsupd(struct brcms_c_info *wlc)
6202 struct macstat macstats;
6209 /* if driver down, make no sense to update stats */
6214 /* save last rx fifo 0 overflow count */
6215 rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
6217 /* save last tx fifo underflow count */
6218 for (i = 0; i < NFIFO; i++)
6219 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
6222 /* Read mac stats from contiguous shared memory */
6223 brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
6224 sizeof(struct macstat), OBJADDR_SHM_SEL);
6227 /* check for rx fifo 0 overflow */
6228 delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
6230 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
6231 wlc->pub->unit, delta);
6233 /* check for tx fifo underflows */
6234 for (i = 0; i < NFIFO; i++) {
6236 (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
6239 wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
6240 "\n", wlc->pub->unit, delta, i);
6244 /* merge counters from dma module */
6245 for (i = 0; i < NFIFO; i++) {
6247 dma_counterreset(wlc->hw->di[i]);
6251 bool brcms_c_chipmatch(u16 vendor, u16 device)
6253 if (vendor != PCI_VENDOR_ID_BROADCOM) {
6254 pr_err("chipmatch: unknown vendor id %04x\n", vendor);
6258 if (device == BCM43224_D11N_ID_VEN1)
6260 if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
6262 if (device == BCM4313_D11N2G_ID)
6264 if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
6267 pr_err("chipmatch: unknown device id %04x\n", device);
6272 void brcms_c_print_txdesc(struct d11txh *txh)
6274 u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
6275 u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
6276 u16 mfc = le16_to_cpu(txh->MacFrameControl);
6277 u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
6278 u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
6279 u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
6280 u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
6281 u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
6282 u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
6283 u16 mainrates = le16_to_cpu(txh->MainRates);
6284 u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
6286 u8 *ra = txh->TxFrameRA;
6287 u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
6288 u8 *rtspfb = txh->RTSPLCPFallback;
6289 u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
6290 u8 *fragpfb = txh->FragPLCPFallback;
6291 u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
6292 u16 mmodelen = le16_to_cpu(txh->MModeLen);
6293 u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
6294 u16 tfid = le16_to_cpu(txh->TxFrameID);
6295 u16 txs = le16_to_cpu(txh->TxStatus);
6296 u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
6297 u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
6298 u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
6299 u16 mmbyte = le16_to_cpu(txh->MinMBytes);
6301 u8 *rtsph = txh->RTSPhyHeader;
6302 struct ieee80211_rts rts = txh->rts_frame;
6305 /* add plcp header along with txh descriptor */
6306 printk(KERN_DEBUG "Raw TxDesc + plcp header:\n");
6307 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
6308 txh, sizeof(struct d11txh) + 48);
6310 printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl);
6311 printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch);
6312 printk(KERN_DEBUG "FC: %04x ", mfc);
6313 printk(KERN_DEBUG "FES Time: %04x\n", tfest);
6314 printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw,
6315 (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
6316 printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1);
6317 printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
6318 printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
6319 printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
6320 printk(KERN_DEBUG "MainRates: %04x ", mainrates);
6321 printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
6322 printk(KERN_DEBUG "\n");
6324 brcmu_format_hex(hexbuf, iv, sizeof(txh->IV));
6325 printk(KERN_DEBUG "SecIV: %s\n", hexbuf);
6326 brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA));
6327 printk(KERN_DEBUG "RA: %s\n", hexbuf);
6329 printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
6330 brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback));
6331 printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6332 printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
6333 brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback));
6334 printk(KERN_DEBUG "PLCP: %s ", hexbuf);
6335 printk(KERN_DEBUG "DUR: %04x", fragdfb);
6336 printk(KERN_DEBUG "\n");
6338 printk(KERN_DEBUG "MModeLen: %04x ", mmodelen);
6339 printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen);
6341 printk(KERN_DEBUG "FrameID: %04x\n", tfid);
6342 printk(KERN_DEBUG "TxStatus: %04x\n", txs);
6344 printk(KERN_DEBUG "MaxNumMpdu: %04x\n", mnmpdu);
6345 printk(KERN_DEBUG "MaxAggbyte: %04x\n", mabyte);
6346 printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f);
6347 printk(KERN_DEBUG "MinByte: %04x\n", mmbyte);
6349 brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader));
6350 printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6351 brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame));
6352 printk(KERN_DEBUG "RTS Frame: %s", hexbuf);
6353 printk(KERN_DEBUG "\n");
6355 #endif /* defined(BCMDBG) */
6358 void brcms_c_print_rxh(struct d11rxhdr *rxh)
6360 u16 len = rxh->RxFrameSize;
6361 u16 phystatus_0 = rxh->PhyRxStatus_0;
6362 u16 phystatus_1 = rxh->PhyRxStatus_1;
6363 u16 phystatus_2 = rxh->PhyRxStatus_2;
6364 u16 phystatus_3 = rxh->PhyRxStatus_3;
6365 u16 macstatus1 = rxh->RxStatus1;
6366 u16 macstatus2 = rxh->RxStatus2;
6369 static const struct brcmu_bit_desc macstat_flags[] = {
6370 {RXS_FCSERR, "FCSErr"},
6371 {RXS_RESPFRAMETX, "Reply"},
6372 {RXS_PBPRES, "PADDING"},
6373 {RXS_DECATMPT, "DeCr"},
6374 {RXS_DECERR, "DeCrErr"},
6375 {RXS_BCNSENT, "Bcn"},
6379 printk(KERN_DEBUG "Raw RxDesc:\n");
6380 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh,
6381 sizeof(struct d11rxhdr));
6383 brcmu_format_flags(macstat_flags, macstatus1, flagstr, 64);
6385 snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
6387 printk(KERN_DEBUG "RxFrameSize: %6s (%d)%s\n", lenbuf, len,
6388 (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
6389 printk(KERN_DEBUG "RxPHYStatus: %04x %04x %04x %04x\n",
6390 phystatus_0, phystatus_1, phystatus_2, phystatus_3);
6391 printk(KERN_DEBUG "RxMACStatus: %x %s\n", macstatus1, flagstr);
6392 printk(KERN_DEBUG "RXMACaggtype: %x\n",
6393 (macstatus2 & RXS_AGGTYPE_MASK));
6394 printk(KERN_DEBUG "RxTSFTime: %04x\n", rxh->RxTSFTime);
6396 #endif /* defined(BCMDBG) */
6398 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6403 /* get the phy specific rate encoding for the PLCP SIGNAL field */
6404 if (is_ofdm_rate(rate))
6405 table_ptr = M_RT_DIRMAP_A;
6407 table_ptr = M_RT_DIRMAP_B;
6409 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6410 * the index into the rate table.
6412 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6413 index = phy_rate & 0xf;
6415 /* Find the SHM pointer to the rate table entry by looking in the
6418 return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6421 /* Callback for device removed */
6424 * Attempts to queue a packet onto a multiple-precedence queue,
6425 * if necessary evicting a lower precedence packet from the queue.
6427 * 'prec' is the precedence number that has already been mapped
6428 * from the packet priority.
6430 * Returns true if packet consumed (queued), false if not.
6432 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6433 struct sk_buff *pkt, int prec)
6435 return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6439 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6440 struct sk_buff *pkt, int prec, bool head)
6443 int eprec = -1; /* precedence to evict from */
6445 /* Determine precedence from which to evict packet, if any */
6446 if (pktq_pfull(q, prec))
6448 else if (pktq_full(q)) {
6449 p = brcmu_pktq_peek_tail(q, &eprec);
6451 wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6452 "\n", __func__, eprec, prec);
6457 /* Evict if needed */
6459 bool discard_oldest;
6461 discard_oldest = ac_bitmap_tst(0, eprec);
6463 /* Refuse newer packet unless configured to discard oldest */
6464 if (eprec == prec && !discard_oldest) {
6465 wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6466 "\n", __func__, prec);
6470 /* Evict packet according to discard policy */
6471 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6472 brcmu_pktq_pdeq_tail(q, eprec);
6473 brcmu_pkt_buf_free_skb(p);
6478 p = brcmu_pktq_penq_head(q, prec, pkt);
6480 p = brcmu_pktq_penq(q, prec, pkt);
6485 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6486 struct sk_buff *sdu, uint prec)
6488 struct brcms_txq_info *qi = wlc->pkt_queue; /* Check me */
6489 struct pktq *q = &qi->q;
6492 prio = sdu->priority;
6494 if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6496 * we might hit this condtion in case
6497 * packet flooding from mac80211 stack
6499 brcmu_pkt_buf_free_skb(sdu);
6504 * bcmc_fid_generate:
6505 * Generate frame ID for a BCMC packet. The frag field is not used
6506 * for MC frames so is used as part of the sequence number.
6509 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6514 frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6518 mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6525 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6530 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6531 wlc->pub->unit, rspec, preamble_type);
6533 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6534 * is less than or equal to the rate of the immediately previous
6537 rspec = brcms_basic_rate(wlc, rspec);
6538 /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6540 brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6541 (DOT11_ACK_LEN + FCS_LEN));
6546 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6549 BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6550 wlc->pub->unit, rspec, preamble_type);
6551 return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6555 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6558 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6559 "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6561 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6562 * is less than or equal to the rate of the immediately previous
6565 rspec = brcms_basic_rate(wlc, rspec);
6566 /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6567 return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6568 (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6572 /* brcms_c_compute_frame_dur()
6574 * Calculate the 802.11 MAC header DUR field for MPDU
6575 * DUR for a single frame = 1 SIFS + 1 ACK
6576 * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6578 * rate MPDU rate in unit of 500kbps
6579 * next_frag_len next MPDU length in bytes
6580 * preamble_type use short/GF or long/MM PLCP header
6583 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6584 u8 preamble_type, uint next_frag_len)
6588 sifs = get_sifs(wlc->band);
6591 dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6593 if (next_frag_len) {
6594 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6596 /* add another SIFS and the frag time */
6599 (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6605 /* The opposite of brcms_c_calc_frame_time */
6607 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6608 u8 preamble_type, uint dur)
6610 uint nsyms, mac_len, Ndps, kNdps;
6611 uint rate = rspec2rate(ratespec);
6613 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6614 wlc->pub->unit, ratespec, preamble_type, dur);
6616 if (is_mcs_rate(ratespec)) {
6617 uint mcs = ratespec & RSPEC_RATE_MASK;
6618 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6619 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6620 /* payload calculation matches that of regular ofdm */
6621 if (wlc->band->bandtype == BRCM_BAND_2G)
6622 dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6623 /* kNdbps = kbps * 4 */
6624 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6625 rspec_issgi(ratespec)) * 4;
6626 nsyms = dur / APHY_SYMBOL_TIME;
6629 ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6630 } else if (is_ofdm_rate(ratespec)) {
6631 dur -= APHY_PREAMBLE_TIME;
6632 dur -= APHY_SIGNAL_TIME;
6633 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6635 nsyms = dur / APHY_SYMBOL_TIME;
6638 (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6640 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6641 dur -= BPHY_PLCP_SHORT_TIME;
6643 dur -= BPHY_PLCP_TIME;
6644 mac_len = dur * rate;
6645 /* divide out factor of 2 in rate (1/2 mbps) */
6646 mac_len = mac_len / 8 / 2;
6652 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6655 u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6656 u8 rate = int_val & NRATE_RATE_MASK;
6658 bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6659 bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6660 bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6661 == NRATE_OVERRIDE_MCS_ONLY);
6667 /* validate the combination of rate/mcs/stf is allowed */
6668 if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6669 /* mcs only allowed when nmode */
6670 if (stf > PHY_TXC1_MODE_SDM) {
6671 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6672 wlc->pub->unit, __func__);
6677 /* mcs 32 is a special case, DUP mode 40 only */
6679 if (!CHSPEC_IS40(wlc->home_chanspec) ||
6680 ((stf != PHY_TXC1_MODE_SISO)
6681 && (stf != PHY_TXC1_MODE_CDD))) {
6682 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6683 "32\n", wlc->pub->unit, __func__);
6687 /* mcs > 7 must use stf SDM */
6688 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6689 /* mcs > 7 must use stf SDM */
6690 if (stf != PHY_TXC1_MODE_SDM) {
6691 BCMMSG(wlc->wiphy, "wl%d: enabling "
6692 "SDM mode for mcs %d\n",
6693 wlc->pub->unit, rate);
6694 stf = PHY_TXC1_MODE_SDM;
6698 * MCS 0-7 may use SISO, CDD, and for
6701 if ((stf > PHY_TXC1_MODE_STBC) ||
6702 (!BRCMS_STBC_CAP_PHY(wlc)
6703 && (stf == PHY_TXC1_MODE_STBC))) {
6704 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6705 "\n", wlc->pub->unit, __func__);
6710 } else if (is_ofdm_rate(rate)) {
6711 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6712 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6713 wlc->pub->unit, __func__);
6717 } else if (is_cck_rate(rate)) {
6718 if ((cur_band->bandtype != BRCM_BAND_2G)
6719 || (stf != PHY_TXC1_MODE_SISO)) {
6720 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6721 wlc->pub->unit, __func__);
6726 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6727 wlc->pub->unit, __func__);
6731 /* make sure multiple antennae are available for non-siso rates */
6732 if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6733 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6734 "request\n", wlc->pub->unit, __func__);
6741 rspec |= RSPEC_MIMORATE;
6742 /* For STBC populate the STC field of the ratespec */
6743 if (stf == PHY_TXC1_MODE_STBC) {
6745 stc = 1; /* Nss for single stream is always 1 */
6746 rspec |= (stc << RSPEC_STC_SHIFT);
6750 rspec |= (stf << RSPEC_STF_SHIFT);
6752 if (override_mcs_only)
6753 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6756 rspec |= RSPEC_SHORT_GI;
6759 && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6768 * Add struct d11txh, struct cck_phy_hdr.
6770 * 'p' data must start with 802.11 MAC header
6771 * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6773 * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6777 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6778 struct sk_buff *p, struct scb *scb, uint frag,
6779 uint nfrags, uint queue, uint next_frag_len)
6781 struct ieee80211_hdr *h;
6783 u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6784 int len, phylen, rts_phylen;
6785 u16 mch, phyctl, xfts, mainrates;
6786 u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6787 u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6788 u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6789 bool use_rts = false;
6790 bool use_cts = false;
6791 bool use_rifs = false;
6792 bool short_preamble[2] = { false, false };
6793 u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6794 u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6795 u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6796 struct ieee80211_rts *rts = NULL;
6799 bool hwtkmic = false;
6800 u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6801 #define ANTCFG_NONE 0xFF
6802 u8 antcfg = ANTCFG_NONE;
6803 u8 fbantcfg = ANTCFG_NONE;
6804 uint phyctl1_stf = 0;
6806 struct ieee80211_tx_rate *txrate[2];
6808 struct ieee80211_tx_info *tx_info;
6811 u8 mimo_preamble_type;
6813 /* locate 802.11 MAC header */
6814 h = (struct ieee80211_hdr *)(p->data);
6815 qos = ieee80211_is_data_qos(h->frame_control);
6817 /* compute length of frame in bytes for use in PLCP computations */
6818 len = brcmu_pkttotlen(p);
6819 phylen = len + FCS_LEN;
6822 tx_info = IEEE80211_SKB_CB(p);
6825 plcp = skb_push(p, D11_PHY_HDR_LEN);
6827 /* add Broadcom tx descriptor header */
6828 txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6829 memset(txh, 0, D11_TXH_LEN);
6832 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6833 /* non-AP STA should never use BCMC queue */
6834 if (queue == TX_BCMC_FIFO) {
6835 wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6836 "TX_BCMC!\n", wlc->pub->unit, __func__);
6837 frameid = bcmc_fid_generate(wlc, NULL, txh);
6839 /* Increment the counter for first fragment */
6840 if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6841 scb->seqnum[p->priority]++;
6843 /* extract fragment number from frame first */
6844 seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6845 seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6846 h->seq_ctrl = cpu_to_le16(seq);
6848 frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6849 (queue & TXFID_QUEUE_MASK);
6852 frameid |= queue & TXFID_QUEUE_MASK;
6854 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6855 if (ieee80211_is_beacon(h->frame_control))
6856 mcl |= TXC_IGNOREPMQ;
6858 txrate[0] = tx_info->control.rates;
6859 txrate[1] = txrate[0] + 1;
6862 * if rate control algorithm didn't give us a fallback
6863 * rate, use the primary rate
6865 if (txrate[1]->idx < 0)
6866 txrate[1] = txrate[0];
6868 for (k = 0; k < hw->max_rates; k++) {
6869 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6871 if ((txrate[k]->idx >= 0)
6872 && (txrate[k]->idx <
6873 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6875 hw->wiphy->bands[tx_info->band]->
6876 bitrates[txrate[k]->idx].hw_value;
6879 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6882 rspec[k] = BRCM_RATE_1M;
6885 rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6886 NRATE_MCS_INUSE | txrate[k]->idx);
6890 * Currently only support same setting for primay and
6891 * fallback rates. Unify flags for each rate into a
6892 * single value for the frame
6896 flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6899 flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6904 * determine and validate primary rate
6905 * and fallback rates
6907 if (!rspec_active(rspec[k])) {
6908 rspec[k] = BRCM_RATE_1M;
6910 if (!is_multicast_ether_addr(h->addr1)) {
6911 /* set tx antenna config */
6912 brcms_c_antsel_antcfg_get(wlc->asi, false,
6913 false, 0, 0, &antcfg, &fbantcfg);
6918 phyctl1_stf = wlc->stf->ss_opmode;
6920 if (wlc->pub->_n_enab & SUPPORT_11N) {
6921 for (k = 0; k < hw->max_rates; k++) {
6923 * apply siso/cdd to single stream mcs's or ofdm
6924 * if rspec is auto selected
6926 if (((is_mcs_rate(rspec[k]) &&
6927 is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6928 is_ofdm_rate(rspec[k]))
6929 && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6930 || !(rspec[k] & RSPEC_OVERRIDE))) {
6931 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6933 /* For SISO MCS use STBC if possible */
6934 if (is_mcs_rate(rspec[k])
6935 && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6938 /* Nss for single stream is always 1 */
6940 rspec[k] |= (PHY_TXC1_MODE_STBC <<
6942 (stc << RSPEC_STC_SHIFT);
6945 (phyctl1_stf << RSPEC_STF_SHIFT);
6949 * Is the phy configured to use 40MHZ frames? If
6950 * so then pick the desired txbw
6952 if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6953 /* default txbw is 20in40 SB */
6954 mimo_ctlchbw = mimo_txbw =
6955 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6957 ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
6959 if (is_mcs_rate(rspec[k])) {
6960 /* mcs 32 must be 40b/w DUP */
6961 if ((rspec[k] & RSPEC_RATE_MASK)
6964 PHY_TXC1_BW_40MHZ_DUP;
6966 } else if (wlc->mimo_40txbw != AUTO)
6967 mimo_txbw = wlc->mimo_40txbw;
6968 /* else check if dst is using 40 Mhz */
6969 else if (scb->flags & SCB_IS40)
6970 mimo_txbw = PHY_TXC1_BW_40MHZ;
6971 } else if (is_ofdm_rate(rspec[k])) {
6972 if (wlc->ofdm_40txbw != AUTO)
6973 mimo_txbw = wlc->ofdm_40txbw;
6974 } else if (wlc->cck_40txbw != AUTO) {
6975 mimo_txbw = wlc->cck_40txbw;
6979 * mcs32 is 40 b/w only.
6980 * This is possible for probe packets on
6983 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
6985 rspec[k] = RSPEC_MIMORATE;
6987 mimo_txbw = PHY_TXC1_BW_20MHZ;
6990 /* Set channel width */
6991 rspec[k] &= ~RSPEC_BW_MASK;
6992 if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
6993 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
6995 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
6997 /* Disable short GI, not supported yet */
6998 rspec[k] &= ~RSPEC_SHORT_GI;
7000 mimo_preamble_type = BRCMS_MM_PREAMBLE;
7001 if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
7002 mimo_preamble_type = BRCMS_GF_PREAMBLE;
7004 if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
7005 && (!is_mcs_rate(rspec[k]))) {
7006 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
7007 "RC_MCS != is_mcs_rate(rspec)\n",
7008 wlc->pub->unit, __func__);
7011 if (is_mcs_rate(rspec[k])) {
7012 preamble_type[k] = mimo_preamble_type;
7015 * if SGI is selected, then forced mm
7018 if ((rspec[k] & RSPEC_SHORT_GI)
7019 && is_single_stream(rspec[k] &
7021 preamble_type[k] = BRCMS_MM_PREAMBLE;
7024 /* should be better conditionalized */
7025 if (!is_mcs_rate(rspec[0])
7026 && (tx_info->control.rates[0].
7027 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
7028 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
7031 for (k = 0; k < hw->max_rates; k++) {
7032 /* Set ctrlchbw as 20Mhz */
7033 rspec[k] &= ~RSPEC_BW_MASK;
7034 rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
7036 /* for nphy, stf of ofdm frames must follow policies */
7037 if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
7038 rspec[k] &= ~RSPEC_STF_MASK;
7039 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
7044 /* Reset these for use with AMPDU's */
7045 txrate[0]->count = 0;
7046 txrate[1]->count = 0;
7048 /* (2) PROTECTION, may change rspec */
7049 if ((ieee80211_is_data(h->frame_control) ||
7050 ieee80211_is_mgmt(h->frame_control)) &&
7051 (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
7054 /* (3) PLCP: determine PLCP header and MAC duration,
7055 * fill struct d11txh */
7056 brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
7057 brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
7058 memcpy(&txh->FragPLCPFallback,
7059 plcp_fallback, sizeof(txh->FragPLCPFallback));
7061 /* Length field now put in CCK FBR CRC field */
7062 if (is_cck_rate(rspec[1])) {
7063 txh->FragPLCPFallback[4] = phylen & 0xff;
7064 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
7067 /* MIMO-RATE: need validation ?? */
7068 mainrates = is_ofdm_rate(rspec[0]) ?
7069 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
7072 /* DUR field for main rate */
7073 if (!ieee80211_is_pspoll(h->frame_control) &&
7074 !is_multicast_ether_addr(h->addr1) && !use_rifs) {
7076 brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
7078 h->duration_id = cpu_to_le16(durid);
7079 } else if (use_rifs) {
7080 /* NAV protect to end of next max packet size */
7082 (u16) brcms_c_calc_frame_time(wlc, rspec[0],
7084 DOT11_MAX_FRAG_LEN);
7085 durid += RIFS_11N_TIME;
7086 h->duration_id = cpu_to_le16(durid);
7089 /* DUR field for fallback rate */
7090 if (ieee80211_is_pspoll(h->frame_control))
7091 txh->FragDurFallback = h->duration_id;
7092 else if (is_multicast_ether_addr(h->addr1) || use_rifs)
7093 txh->FragDurFallback = 0;
7095 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
7096 preamble_type[1], next_frag_len);
7097 txh->FragDurFallback = cpu_to_le16(durid);
7100 /* (4) MAC-HDR: MacTxControlLow */
7102 mcl |= TXC_STARTMSDU;
7104 if (!is_multicast_ether_addr(h->addr1))
7105 mcl |= TXC_IMMEDACK;
7107 if (wlc->band->bandtype == BRCM_BAND_5G)
7108 mcl |= TXC_FREQBAND_5G;
7110 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
7113 /* set AMIC bit if using hardware TKIP MIC */
7117 txh->MacTxControlLow = cpu_to_le16(mcl);
7119 /* MacTxControlHigh */
7122 /* Set fallback rate preamble type */
7123 if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
7124 (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
7125 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
7126 mch |= TXC_PREAMBLE_DATA_FB_SHORT;
7129 /* MacFrameControl */
7130 memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
7131 txh->TxFesTimeNormal = cpu_to_le16(0);
7133 txh->TxFesTimeFallback = cpu_to_le16(0);
7136 memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
7139 txh->TxFrameID = cpu_to_le16(frameid);
7142 * TxStatus, Note the case of recreating the first frag of a suppressed
7143 * frame then we may need to reset the retry cnt's via the status reg
7145 txh->TxStatus = cpu_to_le16(status);
7148 * extra fields for ucode AMPDU aggregation, the new fields are added to
7149 * the END of previous structure so that it's compatible in driver.
7151 txh->MaxNMpdus = cpu_to_le16(0);
7152 txh->MaxABytes_MRT = cpu_to_le16(0);
7153 txh->MaxABytes_FBR = cpu_to_le16(0);
7154 txh->MinMBytes = cpu_to_le16(0);
7156 /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7157 * furnish struct d11txh */
7158 /* RTS PLCP header and RTS frame */
7159 if (use_rts || use_cts) {
7160 if (use_rts && use_cts)
7163 for (k = 0; k < 2; k++) {
7164 rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7169 if (!is_ofdm_rate(rts_rspec[0]) &&
7170 !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7171 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7172 rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7173 mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7176 if (!is_ofdm_rate(rts_rspec[1]) &&
7177 !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7178 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7179 rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7180 mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7183 /* RTS/CTS additions to MacTxControlLow */
7185 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7187 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7188 txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7191 /* RTS PLCP header */
7192 rts_plcp = txh->RTSPhyHeader;
7194 rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7196 rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7198 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7200 /* fallback rate version of RTS PLCP header */
7201 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7203 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7204 sizeof(txh->RTSPLCPFallback));
7206 /* RTS frame fields... */
7207 rts = (struct ieee80211_rts *)&txh->rts_frame;
7209 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7210 rspec[0], rts_preamble_type[0],
7211 preamble_type[0], phylen, false);
7212 rts->duration = cpu_to_le16(durid);
7213 /* fallback rate version of RTS DUR field */
7214 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7215 rts_rspec[1], rspec[1],
7216 rts_preamble_type[1],
7217 preamble_type[1], phylen, false);
7218 txh->RTSDurFallback = cpu_to_le16(durid);
7221 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7222 IEEE80211_STYPE_CTS);
7224 memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7226 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7227 IEEE80211_STYPE_RTS);
7229 memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7233 * low 8 bits: main frag rate/mcs,
7234 * high 8 bits: rts/cts rate/mcs
7236 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7238 (struct ofdm_phy_hdr *) rts_plcp) :
7241 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7242 memset((char *)&txh->rts_frame, 0,
7243 sizeof(struct ieee80211_rts));
7244 memset((char *)txh->RTSPLCPFallback, 0,
7245 sizeof(txh->RTSPLCPFallback));
7246 txh->RTSDurFallback = 0;
7249 #ifdef SUPPORT_40MHZ
7250 /* add null delimiter count */
7251 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7252 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7253 brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7258 * Now that RTS/RTS FB preamble types are updated, write
7261 txh->MacTxControlHigh = cpu_to_le16(mch);
7264 * MainRates (both the rts and frag plcp rates have
7265 * been calculated now)
7267 txh->MainRates = cpu_to_le16(mainrates);
7269 /* XtraFrameTypes */
7270 xfts = frametype(rspec[1], wlc->mimoft);
7271 xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7272 xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7273 xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7275 txh->XtraFrameTypes = cpu_to_le16(xfts);
7277 /* PhyTxControlWord */
7278 phyctl = frametype(rspec[0], wlc->mimoft);
7279 if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7280 (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7281 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7282 phyctl |= PHY_TXC_SHORT_HDR;
7285 /* phytxant is properly bit shifted */
7286 phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7287 txh->PhyTxControlWord = cpu_to_le16(phyctl);
7289 /* PhyTxControlWord_1 */
7290 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7293 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7294 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7295 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7296 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7298 if (use_rts || use_cts) {
7299 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7300 txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7301 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7302 txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7306 * For mcs frames, if mixedmode(overloaded with long preamble)
7307 * is going to be set, fill in non-zero MModeLen and/or
7308 * MModeFbrLen it will be unnecessary if they are separated
7310 if (is_mcs_rate(rspec[0]) &&
7311 (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7313 brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7314 txh->MModeLen = cpu_to_le16(mmodelen);
7317 if (is_mcs_rate(rspec[1]) &&
7318 (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7320 brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7321 txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7325 ac = skb_get_queue_mapping(p);
7326 if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7327 uint frag_dur, dur, dur_fallback;
7329 /* WME: Update TXOP threshold */
7330 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7332 brcms_c_calc_frame_time(wlc, rspec[0],
7333 preamble_type[0], phylen);
7336 /* 1 RTS or CTS-to-self frame */
7338 brcms_c_calc_cts_time(wlc, rts_rspec[0],
7339 rts_preamble_type[0]);
7341 brcms_c_calc_cts_time(wlc, rts_rspec[1],
7342 rts_preamble_type[1]);
7343 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7344 dur += le16_to_cpu(rts->duration);
7346 le16_to_cpu(txh->RTSDurFallback);
7347 } else if (use_rifs) {
7351 /* frame + SIFS + ACK */
7354 brcms_c_compute_frame_dur(wlc, rspec[0],
7355 preamble_type[0], 0);
7358 brcms_c_calc_frame_time(wlc, rspec[1],
7362 brcms_c_compute_frame_dur(wlc, rspec[1],
7363 preamble_type[1], 0);
7365 /* NEED to set TxFesTimeNormal (hard) */
7366 txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7368 * NEED to set fallback rate version of
7369 * TxFesTimeNormal (hard)
7371 txh->TxFesTimeFallback =
7372 cpu_to_le16((u16) dur_fallback);
7375 * update txop byte threshold (txop minus intraframe
7378 if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7382 brcms_c_calc_frame_len(wlc,
7383 rspec[0], preamble_type[0],
7384 (wlc->edcf_txop[ac] -
7386 /* range bound the fragthreshold */
7387 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7390 else if (newfragthresh >
7391 wlc->usr_fragthresh)
7393 wlc->usr_fragthresh;
7394 /* update the fragthresh and do txc update */
7395 if (wlc->fragthresh[queue] !=
7396 (u16) newfragthresh)
7397 wlc->fragthresh[queue] =
7398 (u16) newfragthresh;
7400 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7402 wlc->pub->unit, fifo_names[queue],
7403 rspec2rate(rspec[0]));
7406 if (dur > wlc->edcf_txop[ac])
7407 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7408 "exceeded phylen %d/%d dur %d/%d\n",
7409 wlc->pub->unit, __func__,
7411 phylen, wlc->fragthresh[queue],
7412 dur, wlc->edcf_txop[ac]);
7419 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7420 struct ieee80211_hw *hw)
7424 struct scb *scb = &wlc->pri_scb;
7425 struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7428 * 802.11 standard requires management traffic
7429 * to go at highest priority
7431 prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7433 fifo = prio2fifo[prio];
7434 if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7436 brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7437 brcms_c_send_q(wlc);
7440 void brcms_c_send_q(struct brcms_c_info *wlc)
7442 struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7445 int err = 0, i, count;
7447 struct brcms_txq_info *qi = wlc->pkt_queue;
7448 struct pktq *q = &qi->q;
7449 struct ieee80211_tx_info *tx_info;
7451 prec_map = wlc->tx_prec_map;
7453 /* Send all the enq'd pkts that we can.
7454 * Dequeue packets with precedence with empty HW fifo only
7456 while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7457 tx_info = IEEE80211_SKB_CB(pkt[0]);
7458 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7459 err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7462 err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7464 for (i = 0; i < count; i++)
7465 brcms_c_txfifo(wlc, fifo, pkt[i], true,
7470 if (err == -EBUSY) {
7471 brcmu_pktq_penq_head(q, prec, pkt[0]);
7473 * If send failed due to any other reason than a
7474 * change in HW FIFO condition, quit. Otherwise,
7475 * read the new prec_map!
7477 if (prec_map == wlc->tx_prec_map)
7479 prec_map = wlc->tx_prec_map;
7485 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7486 bool commit, s8 txpktpend)
7488 u16 frameid = INVALIDFID;
7491 txh = (struct d11txh *) (p->data);
7493 /* When a BC/MC frame is being committed to the BCMC fifo
7494 * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7496 if (fifo == TX_BCMC_FIFO)
7497 frameid = le16_to_cpu(txh->TxFrameID);
7500 * Bump up pending count for if not using rpc. If rpc is
7501 * used, this will be handled in brcms_b_txfifo()
7504 wlc->core->txpktpend[fifo] += txpktpend;
7505 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7506 txpktpend, wlc->core->txpktpend[fifo]);
7509 /* Commit BCMC sequence number in the SHM frame ID location */
7510 if (frameid != INVALIDFID) {
7512 * To inform the ucode of the last mcast frame posted
7513 * so that it can clear moredata bit
7515 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7518 if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7519 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7523 * Compute PLCP, but only requires actual rate and length of pkt.
7524 * Rate is given in the driver standard multiple of 500 kbps.
7525 * le is set for 11 Mbps rate if necessary.
7526 * Broken out for PRQ.
7529 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
7530 uint length, u8 *plcp)
7543 usec = (length << 4) / 11;
7544 if ((length << 4) - (usec * 11) > 0)
7548 usec = (length << 3) / 11;
7549 if ((length << 3) - (usec * 11) > 0) {
7551 if ((usec * 11) - (length << 3) >= 8)
7552 le = D11B_PLCP_SIGNAL_LE;
7557 wiphy_err(wlc->wiphy,
7558 "brcms_c_cck_plcp_set: unsupported rate %d\n",
7560 rate_500 = BRCM_RATE_1M;
7564 /* PLCP signal byte */
7565 plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
7566 /* PLCP service byte */
7567 plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
7568 /* PLCP length u16, little endian */
7569 plcp[2] = usec & 0xff;
7570 plcp[3] = (usec >> 8) & 0xff;
7576 /* Rate: 802.11 rate code, length: PSDU length in octets */
7577 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
7579 u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
7581 if (rspec_is40mhz(rspec) || (mcs == 32))
7582 plcp[0] |= MIMO_PLCP_40MHZ;
7583 BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
7584 plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
7585 plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
7586 plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
7590 /* Rate: 802.11 rate code, length: PSDU length in octets */
7592 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
7596 int rate = rspec2rate(rspec);
7599 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
7602 rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
7603 memset(plcp, 0, D11_PHY_HDR_LEN);
7604 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
7606 tmp = (length & 0xfff) << 5;
7607 plcp[2] |= (tmp >> 16) & 0xff;
7608 plcp[1] |= (tmp >> 8) & 0xff;
7609 plcp[0] |= tmp & 0xff;
7612 /* Rate: 802.11 rate code, length: PSDU length in octets */
7613 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
7614 uint length, u8 *plcp)
7616 int rate = rspec2rate(rspec);
7618 brcms_c_cck_plcp_set(wlc, rate, length, plcp);
7622 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
7623 uint length, u8 *plcp)
7625 if (is_mcs_rate(rspec))
7626 brcms_c_compute_mimo_plcp(rspec, length, plcp);
7627 else if (is_ofdm_rate(rspec))
7628 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
7630 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
7633 /* brcms_c_compute_rtscts_dur()
7635 * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
7636 * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
7637 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
7639 * cts cts-to-self or rts/cts
7640 * rts_rate rts or cts rate in unit of 500kbps
7641 * rate next MPDU rate in unit of 500kbps
7642 * frame_len next MPDU frame length in bytes
7645 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
7647 u32 frame_rate, u8 rts_preamble_type,
7648 u8 frame_preamble_type, uint frame_len, bool ba)
7652 sifs = get_sifs(wlc->band);
7658 (u16) brcms_c_calc_cts_time(wlc, rts_rate,
7666 (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
7670 (u16) brcms_c_calc_ba_time(wlc, frame_rate,
7671 BRCMS_SHORT_PREAMBLE);
7674 (u16) brcms_c_calc_ack_time(wlc, frame_rate,
7675 frame_preamble_type);
7679 u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
7684 if (BRCMS_ISLCNPHY(wlc->band)) {
7685 bw = PHY_TXC1_BW_20MHZ;
7687 bw = rspec_get_bw(rspec);
7688 /* 10Mhz is not supported yet */
7689 if (bw < PHY_TXC1_BW_20MHZ) {
7690 wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
7691 "not supported yet, set to 20L\n", bw);
7692 bw = PHY_TXC1_BW_20MHZ;
7696 if (is_mcs_rate(rspec)) {
7697 uint mcs = rspec & RSPEC_RATE_MASK;
7699 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
7700 phyctl1 = rspec_phytxbyte2(rspec);
7701 /* set the upper byte of phyctl1 */
7702 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
7703 } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
7704 && !BRCMS_ISSSLPNPHY(wlc->band)) {
7706 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
7707 * Data Rate. Eventually MIMOPHY would also be converted to
7710 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
7711 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
7712 } else { /* legacy OFDM/CCK */
7714 /* get the phyctl byte from rate phycfg table */
7715 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
7717 wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
7718 "legacy OFDM/CCK rate\n");
7721 /* set the upper byte of phyctl1 */
7723 (bw | (phycfg << 8) |
7724 (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
7730 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7731 bool use_rspec, u16 mimo_ctlchbw)
7736 /* use frame rate as rts rate */
7738 else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7739 /* Use 11Mbps as the g protection RTS target rate and fallback.
7740 * Use the brcms_basic_rate() lookup to find the best basic rate
7741 * under the target in case 11 Mbps is not Basic.
7742 * 6 and 9 Mbps are not usually selected by rate selection, but
7743 * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7746 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7748 /* calculate RTS rate and fallback rate based on the frame rate
7749 * RTS must be sent at a basic rate since it is a
7750 * control frame, sec 9.6 of 802.11 spec
7752 rts_rspec = brcms_basic_rate(wlc, rspec);
7754 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7755 /* set rts txbw to correct side band */
7756 rts_rspec &= ~RSPEC_BW_MASK;
7759 * if rspec/rspec_fallback is 40MHz, then send RTS on both
7760 * 20MHz channel (DUP), otherwise send RTS on control channel
7762 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7763 rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7765 rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7767 /* pick siso/cdd as default for ofdm */
7768 if (is_ofdm_rate(rts_rspec)) {
7769 rts_rspec &= ~RSPEC_STF_MASK;
7770 rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7776 void brcms_c_tbtt(struct brcms_c_info *wlc)
7778 if (!wlc->bsscfg->BSS)
7780 * DirFrmQ is now valid...defer setting until end
7783 wlc->qvalid |= MCMD_DIRFRMQVAL;
7787 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7789 wlc->core->txpktpend[fifo] -= txpktpend;
7790 BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7791 wlc->core->txpktpend[fifo]);
7793 /* There is more room; mark precedences related to this FIFO sendable */
7794 wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7796 /* figure out which bsscfg is being worked on... */
7799 /* Update beacon listen interval in shared memory */
7800 void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7802 /* wake up every DTIM is the default */
7803 if (wlc->bcn_li_dtim == 1)
7804 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7806 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7807 (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7811 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7814 struct d11regs __iomem *regs = wlc_hw->regs;
7816 /* read the tsf timer low, then high to get an atomic read */
7817 *tsf_l_ptr = R_REG(®s->tsf_timerlow);
7818 *tsf_h_ptr = R_REG(®s->tsf_timerhigh);
7822 * recover 64bit TSF value from the 16bit TSF value in the rx header
7823 * given the assumption that the TSF passed in header is within 65ms
7824 * of the current tsf.
7827 * 3.......6.......8.......0.......2.......4.......6.......8......0
7828 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7830 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7831 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7832 * receive call sequence after rx interrupt. Only the higher 16 bits
7833 * are used. Finally, the tsf_h is read from the tsf register.
7835 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7836 struct d11rxhdr *rxh)
7839 u16 rx_tsf_0_15, rx_tsf_16_31;
7841 brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7843 rx_tsf_16_31 = (u16)(tsf_l >> 16);
7844 rx_tsf_0_15 = rxh->RxTSFTime;
7847 * a greater tsf time indicates the low 16 bits of
7848 * tsf_l wrapped, so decrement the high 16 bits.
7850 if ((u16)tsf_l < rx_tsf_0_15) {
7852 if (rx_tsf_16_31 == 0xffff)
7856 return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7860 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7862 struct ieee80211_rx_status *rx_status)
7867 unsigned char *plcp;
7869 /* fill in TSF and flag its presence */
7870 rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7871 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7873 channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7876 rx_status->band = IEEE80211_BAND_5GHZ;
7877 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7878 WF_CHAN_FACTOR_5_G/2, channel);
7881 rx_status->band = IEEE80211_BAND_2GHZ;
7882 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7885 rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7889 rx_status->antenna =
7890 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7894 rspec = brcms_c_compute_rspec(rxh, plcp);
7895 if (is_mcs_rate(rspec)) {
7896 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7897 rx_status->flag |= RX_FLAG_HT;
7898 if (rspec_is40mhz(rspec))
7899 rx_status->flag |= RX_FLAG_40MHZ;
7901 switch (rspec2rate(rspec)) {
7903 rx_status->rate_idx = 0;
7906 rx_status->rate_idx = 1;
7909 rx_status->rate_idx = 2;
7912 rx_status->rate_idx = 3;
7915 rx_status->rate_idx = 4;
7918 rx_status->rate_idx = 5;
7921 rx_status->rate_idx = 6;
7924 rx_status->rate_idx = 7;
7927 rx_status->rate_idx = 8;
7930 rx_status->rate_idx = 9;
7933 rx_status->rate_idx = 10;
7936 rx_status->rate_idx = 11;
7939 wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7943 * For 5GHz, we should decrease the index as it is
7944 * a subset of the 2.4G rates. See bitrates field
7945 * of brcms_band_5GHz_nphy (in mac80211_if.c).
7947 if (rx_status->band == IEEE80211_BAND_5GHZ)
7948 rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7950 /* Determine short preamble and rate_idx */
7952 if (is_cck_rate(rspec)) {
7953 if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7954 rx_status->flag |= RX_FLAG_SHORTPRE;
7955 } else if (is_ofdm_rate(rspec)) {
7956 rx_status->flag |= RX_FLAG_SHORTPRE;
7958 wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7963 if (plcp3_issgi(plcp[3]))
7964 rx_status->flag |= RX_FLAG_SHORT_GI;
7966 if (rxh->RxStatus1 & RXS_DECERR) {
7967 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7968 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
7971 if (rxh->RxStatus1 & RXS_FCSERR) {
7972 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7973 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n",
7979 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7983 struct ieee80211_rx_status rx_status;
7985 memset(&rx_status, 0, sizeof(rx_status));
7986 prep_mac80211_status(wlc, rxh, p, &rx_status);
7988 /* mac header+body length, exclude CRC and plcp header */
7989 len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7990 skb_pull(p, D11_PHY_HDR_LEN);
7991 __skb_trim(p, len_mpdu);
7993 memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7994 ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7997 /* Process received frames */
7999 * Return true if more frames need to be processed. false otherwise.
8000 * Param 'bound' indicates max. # frames to process before break out.
8002 void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8004 struct d11rxhdr *rxh;
8005 struct ieee80211_hdr *h;
8009 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8011 /* frame starts with rxhdr */
8012 rxh = (struct d11rxhdr *) (p->data);
8014 /* strip off rxhdr */
8015 skb_pull(p, BRCMS_HWRXOFF);
8017 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8018 if (rxh->RxStatus1 & RXS_PBPRES) {
8020 wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8021 "len %d\n", wlc->pub->unit, p->len);
8027 h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8030 if (rxh->RxStatus1 & RXS_FCSERR) {
8031 if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) {
8032 wiphy_err(wlc->wiphy, "FCSERR while scanning******* -"
8036 wiphy_err(wlc->wiphy, "RCSERR!!!\n");
8041 /* check received pkt has at least frame control field */
8042 if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8045 /* not supporting A-MSDU */
8046 is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8050 brcms_c_recvctl(wlc, rxh, p);
8054 brcmu_pkt_buf_free_skb(p);
8057 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
8058 * number of bytes goes in the length field
8060 * Formula given by HT PHY Spec v 1.13
8061 * len = 3(nsyms + nstream + 3) - 3
8064 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
8067 uint nsyms, len = 0, kNdps;
8069 BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
8070 wlc->pub->unit, rspec2rate(ratespec), mac_len);
8072 if (is_mcs_rate(ratespec)) {
8073 uint mcs = ratespec & RSPEC_RATE_MASK;
8074 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
8075 rspec_stc(ratespec);
8078 * the payload duration calculation matches that
8081 /* 1000Ndbps = kbps * 4 */
8082 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
8083 rspec_issgi(ratespec)) * 4;
8085 if (rspec_stc(ratespec) == 0)
8087 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8088 APHY_TAIL_NBITS) * 1000, kNdps);
8090 /* STBC needs to have even number of symbols */
8093 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8094 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
8096 /* (+3) account for HT-SIG(2) and HT-STF(1) */
8097 nsyms += (tot_streams + 3);
8099 * 3 bytes/symbol @ legacy 6Mbps rate
8100 * (-3) excluding service bits and tail bits
8102 len = (3 * nsyms) - 3;
8109 * calculate frame duration of a given rate and length, return
8113 brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
8114 u8 preamble_type, uint mac_len)
8116 uint nsyms, dur = 0, Ndps, kNdps;
8117 uint rate = rspec2rate(ratespec);
8120 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
8122 rate = BRCM_RATE_1M;
8125 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
8126 wlc->pub->unit, ratespec, preamble_type, mac_len);
8128 if (is_mcs_rate(ratespec)) {
8129 uint mcs = ratespec & RSPEC_RATE_MASK;
8130 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
8132 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
8133 if (preamble_type == BRCMS_MM_PREAMBLE)
8135 /* 1000Ndbps = kbps * 4 */
8136 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
8137 rspec_issgi(ratespec)) * 4;
8139 if (rspec_stc(ratespec) == 0)
8141 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8142 APHY_TAIL_NBITS) * 1000, kNdps);
8144 /* STBC needs to have even number of symbols */
8147 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8148 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
8150 dur += APHY_SYMBOL_TIME * nsyms;
8151 if (wlc->band->bandtype == BRCM_BAND_2G)
8152 dur += DOT11_OFDM_SIGNAL_EXTENSION;
8153 } else if (is_ofdm_rate(rate)) {
8154 dur = APHY_PREAMBLE_TIME;
8155 dur += APHY_SIGNAL_TIME;
8156 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
8158 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
8160 CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
8162 dur += APHY_SYMBOL_TIME * nsyms;
8163 if (wlc->band->bandtype == BRCM_BAND_2G)
8164 dur += DOT11_OFDM_SIGNAL_EXTENSION;
8167 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
8170 mac_len = mac_len * 8 * 2;
8171 /* calc ceiling of bits/rate = microseconds of air time */
8172 dur = (mac_len + rate - 1) / rate;
8173 if (preamble_type & BRCMS_SHORT_PREAMBLE)
8174 dur += BPHY_PLCP_SHORT_TIME;
8176 dur += BPHY_PLCP_TIME;
8181 /* derive wlc->band->basic_rate[] table from 'rateset' */
8182 void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
8183 struct brcms_c_rateset *rateset)
8189 u8 *br = wlc->band->basic_rate;
8192 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
8193 memset(br, 0, BRCM_MAXRATE + 1);
8195 /* For each basic rate in the rates list, make an entry in the
8196 * best basic lookup.
8198 for (i = 0; i < rateset->count; i++) {
8199 /* only make an entry for a basic rate */
8200 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
8203 /* mask off basic bit */
8204 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
8206 if (rate > BRCM_MAXRATE) {
8207 wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
8208 "invalid rate 0x%X in rate set\n",
8216 /* The rate lookup table now has non-zero entries for each
8217 * basic rate, equal to the basic rate: br[basicN] = basicN
8219 * To look up the best basic rate corresponding to any
8220 * particular rate, code can use the basic_rate table
8223 * basic_rate = wlc->band->basic_rate[tx_rate]
8225 * Make sure there is a best basic rate entry for
8226 * every rate by walking up the table from low rates
8227 * to high, filling in holes in the lookup table
8230 for (i = 0; i < wlc->band->hw_rateset.count; i++) {
8231 rate = wlc->band->hw_rateset.rates[i];
8233 if (br[rate] != 0) {
8234 /* This rate is a basic rate.
8235 * Keep track of the best basic rate so far by
8238 if (is_ofdm_rate(rate))
8246 /* This rate is not a basic rate so figure out the
8247 * best basic rate less than this rate and fill in
8248 * the hole in the table
8251 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
8256 if (is_ofdm_rate(rate)) {
8258 * In 11g and 11a, the OFDM mandatory rates
8259 * are 6, 12, and 24 Mbps
8261 if (rate >= BRCM_RATE_24M)
8262 mandatory = BRCM_RATE_24M;
8263 else if (rate >= BRCM_RATE_12M)
8264 mandatory = BRCM_RATE_12M;
8266 mandatory = BRCM_RATE_6M;
8268 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
8272 br[rate] = mandatory;
8276 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
8280 u8 basic_phy_rate, basic_index;
8281 u16 dir_table, basic_table;
8284 /* Shared memory address for the table we are reading */
8285 dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
8287 /* Shared memory address for the table we are writing */
8288 basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
8291 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
8292 * the index into the rate table.
8294 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
8295 basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
8296 index = phy_rate & 0xf;
8297 basic_index = basic_phy_rate & 0xf;
8299 /* Find the SHM pointer to the ACK rate entry by looking in the
8302 basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
8304 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
8305 * to the correct basic rate for the given incoming rate
8307 brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
8310 static const struct brcms_c_rateset *
8311 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
8313 const struct brcms_c_rateset *rs_dflt;
8315 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8316 if (wlc->band->bandtype == BRCM_BAND_5G)
8317 rs_dflt = &ofdm_mimo_rates;
8319 rs_dflt = &cck_ofdm_mimo_rates;
8320 } else if (wlc->band->gmode)
8321 rs_dflt = &cck_ofdm_rates;
8323 rs_dflt = &cck_rates;
8328 void brcms_c_set_ratetable(struct brcms_c_info *wlc)
8330 const struct brcms_c_rateset *rs_dflt;
8331 struct brcms_c_rateset rs;
8332 u8 rate, basic_rate;
8335 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
8337 brcms_c_rateset_copy(rs_dflt, &rs);
8338 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
8340 /* walk the phy rate table and update SHM basic rate lookup table */
8341 for (i = 0; i < rs.count; i++) {
8342 rate = rs.rates[i] & BRCMS_RATE_MASK;
8344 /* for a given rate brcms_basic_rate returns the rate at
8345 * which a response ACK/CTS should be sent.
8347 basic_rate = brcms_basic_rate(wlc, rate);
8348 if (basic_rate == 0)
8349 /* This should only happen if we are using a
8350 * restricted rateset.
8352 basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
8354 brcms_c_write_rate_shm(wlc, rate, basic_rate);
8359 * Return true if the specified rate is supported by the specified band.
8360 * BRCM_BAND_AUTO indicates the current band.
8362 bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
8365 struct brcms_c_rateset *hw_rateset;
8368 if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
8369 hw_rateset = &wlc->band->hw_rateset;
8370 else if (wlc->pub->_nbands > 1)
8371 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
8373 /* other band specified and we are a single band device */
8376 /* check if this is a mimo rate */
8377 if (is_mcs_rate(rspec)) {
8378 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
8381 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
8384 for (i = 0; i < hw_rateset->count; i++)
8385 if (hw_rateset->rates[i] == rspec2rate(rspec))
8389 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
8390 "not in hw_rateset\n", wlc->pub->unit, rspec);
8395 void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
8397 const struct brcms_c_rateset *rs_dflt;
8398 struct brcms_c_rateset rs;
8401 u8 plcp[D11_PHY_HDR_LEN];
8405 sifs = get_sifs(wlc->band);
8407 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
8409 brcms_c_rateset_copy(rs_dflt, &rs);
8410 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
8413 * walk the phy rate table and update MAC core SHM
8414 * basic rate table entries
8416 for (i = 0; i < rs.count; i++) {
8417 rate = rs.rates[i] & BRCMS_RATE_MASK;
8419 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
8421 /* Calculate the Probe Response PLCP for the given rate */
8422 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
8425 * Calculate the duration of the Probe Response
8426 * frame plus SIFS for the MAC
8428 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
8429 BRCMS_LONG_PREAMBLE, frame_len);
8432 /* Update the SHM Rate Table entry Probe Response values */
8433 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
8434 (u16) (plcp[0] + (plcp[1] << 8)));
8435 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
8436 (u16) (plcp[2] + (plcp[3] << 8)));
8437 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
8441 /* Max buffering needed for beacon template/prb resp template is 142 bytes.
8443 * PLCP header is 6 bytes.
8444 * 802.11 A3 header is 24 bytes.
8445 * Max beacon frame body template length is 112 bytes.
8446 * Max probe resp frame body template length is 110 bytes.
8448 * *len on input contains the max length of the packet available.
8450 * The *len value is set to the number of bytes in buf used, and starts
8451 * with the PLCP and included up to, but not including, the 4 byte FCS.
8454 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
8456 struct brcms_bss_cfg *cfg, u16 *buf, int *len)
8458 static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
8459 struct cck_phy_hdr *plcp;
8460 struct ieee80211_mgmt *h;
8461 int hdr_len, body_len;
8463 hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
8465 /* calc buffer size provided for frame body */
8466 body_len = *len - hdr_len;
8467 /* return actual size */
8468 *len = hdr_len + body_len;
8470 /* format PHY and MAC headers */
8471 memset((char *)buf, 0, hdr_len);
8473 plcp = (struct cck_phy_hdr *) buf;
8476 * PLCP for Probe Response frames are filled in from
8479 if (type == IEEE80211_STYPE_BEACON)
8481 brcms_c_compute_plcp(wlc, bcn_rspec,
8482 (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
8485 /* "Regular" and 16 MBSS but not for 4 MBSS */
8486 /* Update the phytxctl for the beacon based on the rspec */
8487 brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
8489 h = (struct ieee80211_mgmt *)&plcp[1];
8491 /* fill in 802.11 header */
8492 h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
8494 /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
8495 /* A1 filled in by MAC for prb resp, broadcast for bcn */
8496 if (type == IEEE80211_STYPE_BEACON)
8497 memcpy(&h->da, ðer_bcast, ETH_ALEN);
8498 memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
8499 memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
8501 /* SEQ filled in by MAC */
8504 int brcms_c_get_header_len(void)
8510 * Update all beacons for the system.
8512 void brcms_c_update_beacon(struct brcms_c_info *wlc)
8514 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8516 if (bsscfg->up && !bsscfg->BSS)
8517 /* Clear the soft intmask */
8518 wlc->defmacintmask &= ~MI_BCNTPL;
8521 /* Write ssid into shared memory */
8522 void brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
8524 u8 *ssidptr = cfg->SSID;
8526 u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
8528 /* padding the ssid with zero and copy it into shm */
8529 memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
8530 memcpy(ssidbuf, ssidptr, cfg->SSID_len);
8532 brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
8533 brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
8536 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
8538 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8540 /* update AP or IBSS probe responses */
8541 if (bsscfg->up && !bsscfg->BSS)
8542 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
8546 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
8547 struct brcms_bss_cfg *cfg,
8550 u16 prb_resp[BCN_TMPL_LEN / 2];
8551 int len = BCN_TMPL_LEN;
8554 * write the probe response to hardware, or save in
8555 * the config structure
8558 /* create the probe response template */
8559 brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
8560 cfg, prb_resp, &len);
8563 brcms_c_suspend_mac_and_wait(wlc);
8565 /* write the probe response into the template region */
8566 brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
8567 (len + 3) & ~3, prb_resp);
8569 /* write the length of the probe response frame (+PLCP/-FCS) */
8570 brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
8572 /* write the SSID and SSID length */
8573 brcms_c_shm_ssid_upd(wlc, cfg);
8576 * Write PLCP headers and durations for probe response frames
8577 * at all rates. Use the actual frame length covered by the
8578 * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
8579 * by subtracting the PLCP len and adding the FCS.
8581 len += (-D11_PHY_HDR_LEN + FCS_LEN);
8582 brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
8585 brcms_c_enable_mac(wlc);
8588 /* prepares pdu for transmission. returns BCM error codes */
8589 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
8593 struct ieee80211_hdr *h;
8596 txh = (struct d11txh *) (pdu->data);
8597 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
8599 /* get the pkt queue info. This was put at brcms_c_sendctl or
8600 * brcms_c_send for PDU */
8601 fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
8607 /* return if insufficient dma resources */
8608 if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
8609 /* Mark precedences related to this FIFO, unsendable */
8610 /* A fifo is full. Clear precedences related to that FIFO */
8611 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
8617 void brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
8619 brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
8620 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
8621 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
8622 brcms_chspec_bw(wlc->default_bss->chanspec),
8623 wlc->stf->txstreams);
8626 /* Copy a buffer to shared memory.
8627 * SHM 'offset' needs to be an even address and
8628 * Buffer length 'len' must be an even number of bytes
8630 void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset, const void *buf,
8633 brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
8636 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
8642 *blocks = wlc_hw->xmtfifo_sz[fifo];
8648 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
8651 brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
8652 if (match_reg_offset == RCM_BSSID_OFFSET)
8653 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
8656 /* check for the particular priority flow control bit being set */
8658 brcms_c_txflowcontrol_prio_isset(struct brcms_c_info *wlc,
8659 struct brcms_txq_info *q,
8664 if (prio == ALLPRIO)
8665 prio_mask = TXQ_STOP_FOR_PRIOFC_MASK;
8667 prio_mask = NBITVAL(prio);
8669 return (q->stopped & prio_mask) == prio_mask;
8672 /* propagate the flow control to all interfaces using the given tx queue */
8673 void brcms_c_txflowcontrol(struct brcms_c_info *wlc,
8674 struct brcms_txq_info *qi,
8680 BCMMSG(wlc->wiphy, "flow control kicks in\n");
8682 if (prio == ALLPRIO)
8683 prio_bits = TXQ_STOP_FOR_PRIOFC_MASK;
8685 prio_bits = NBITVAL(prio);
8687 cur_bits = qi->stopped & prio_bits;
8689 /* Check for the case of no change and return early
8690 * Otherwise update the bit and continue
8693 if (cur_bits == prio_bits)
8696 mboolset(qi->stopped, prio_bits);
8701 mboolclr(qi->stopped, prio_bits);
8704 /* If there is a flow control override we will not change the external
8705 * flow control state.
8707 if (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK)
8710 brcms_c_txflowcontrol_signal(wlc, qi, on, prio);
8714 brcms_c_txflowcontrol_override(struct brcms_c_info *wlc,
8715 struct brcms_txq_info *qi,
8716 bool on, uint override)
8720 prev_override = (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK);
8722 /* Update the flow control bits and do an early return if there is
8723 * no change in the external flow control state.
8726 mboolset(qi->stopped, override);
8727 /* if there was a previous override bit on, then setting this
8728 * makes no difference.
8733 brcms_c_txflowcontrol_signal(wlc, qi, ON, ALLPRIO);
8735 mboolclr(qi->stopped, override);
8736 /* clearing an override bit will only make a difference for
8737 * flow control if it was the only bit set. For any other
8738 * override setting, just return
8740 if (prev_override != override)
8743 if (qi->stopped == 0) {
8744 brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
8748 for (prio = MAXPRIO; prio >= 0; prio--) {
8749 if (!mboolisset(qi->stopped, NBITVAL(prio)))
8750 brcms_c_txflowcontrol_signal(
8751 wlc, qi, OFF, prio);
8758 * Flag 'scan in progress' to withhold dynamic phy calibration
8760 void brcms_c_scan_start(struct brcms_c_info *wlc)
8762 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
8765 void brcms_c_scan_stop(struct brcms_c_info *wlc)
8767 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
8770 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
8772 wlc->pub->associated = state;
8773 wlc->bsscfg->associated = state;
8777 * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
8778 * AMPDU traffic, packets pending in hardware have to be invalidated so that
8779 * when later on hardware releases them, they can be handled appropriately.
8781 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
8782 struct ieee80211_sta *sta,
8783 void (*dma_callback_fn))
8785 struct dma_pub *dmah;
8787 for (i = 0; i < NFIFO; i++) {
8790 dma_walk_packets(dmah, dma_callback_fn, sta);
8794 int brcms_c_get_curband(struct brcms_c_info *wlc)
8796 return wlc->band->bandunit;
8799 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
8801 /* flush packet queue when requested */
8803 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
8805 /* wait for queue and DMA fifos to run dry */
8806 while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0)
8807 brcms_msleep(wlc->wl, 1);
8810 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
8812 wlc->bcn_li_bcn = interval;
8814 brcms_c_bcn_li_upd(wlc);
8817 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
8821 /* Remove override bit and clip to max qdbm value */
8822 qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
8823 return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8826 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8831 wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8833 /* Return qdbm units */
8834 return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8837 void brcms_c_set_radio_mpc(struct brcms_c_info *wlc, bool mpc)
8840 brcms_c_radio_mpc_upd(wlc);