2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/pci_ids.h>
18 #include <linux/if_ether.h>
19 #include <net/mac80211.h>
20 #include <brcm_hw_ids.h>
22 #include <chipcommon.h>
25 #include "phy/phy_hal.h"
30 #include "mac80211_if.h"
31 #include "ucode_loader.h"
36 * Indication for txflowcontrol that all priority bits in
37 * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
41 /* watchdog timer, in unit of ms */
42 #define TIMER_INTERVAL_WATCHDOG 1000
43 /* radio monitor timer, in unit of ms */
44 #define TIMER_INTERVAL_RADIOCHK 800
46 /* beacon interval, in unit of 1024TU */
47 #define BEACON_INTERVAL_DEFAULT 100
49 /* n-mode support capability */
50 /* 2x2 includes both 1x1 & 2x2 devices
51 * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
52 * control it independently
58 #define EDCF_ACI_MASK 0x60
59 #define EDCF_ACI_SHIFT 5
60 #define EDCF_ECWMIN_MASK 0x0f
61 #define EDCF_ECWMAX_SHIFT 4
62 #define EDCF_AIFSN_MASK 0x0f
63 #define EDCF_AIFSN_MAX 15
64 #define EDCF_ECWMAX_MASK 0xf0
66 #define EDCF_AC_BE_TXOP_STA 0x0000
67 #define EDCF_AC_BK_TXOP_STA 0x0000
68 #define EDCF_AC_VO_ACI_STA 0x62
69 #define EDCF_AC_VO_ECW_STA 0x32
70 #define EDCF_AC_VI_ACI_STA 0x42
71 #define EDCF_AC_VI_ECW_STA 0x43
72 #define EDCF_AC_BK_ECW_STA 0xA4
73 #define EDCF_AC_VI_TXOP_STA 0x005e
74 #define EDCF_AC_VO_TXOP_STA 0x002f
75 #define EDCF_AC_BE_ACI_STA 0x03
76 #define EDCF_AC_BE_ECW_STA 0xA4
77 #define EDCF_AC_BK_ACI_STA 0x27
78 #define EDCF_AC_VO_TXOP_AP 0x002f
80 #define EDCF_TXOP2USEC(txop) ((txop) << 5)
81 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
83 #define APHY_SYMBOL_TIME 4
84 #define APHY_PREAMBLE_TIME 16
85 #define APHY_SIGNAL_TIME 4
86 #define APHY_SIFS_TIME 16
87 #define APHY_SERVICE_NBITS 16
88 #define APHY_TAIL_NBITS 6
89 #define BPHY_SIFS_TIME 10
90 #define BPHY_PLCP_SHORT_TIME 96
92 #define PREN_PREAMBLE 24
93 #define PREN_MM_EXT 12
94 #define PREN_PREAMBLE_EXT 4
96 #define DOT11_MAC_HDR_LEN 24
97 #define DOT11_ACK_LEN 10
98 #define DOT11_BA_LEN 4
99 #define DOT11_OFDM_SIGNAL_EXTENSION 6
100 #define DOT11_MIN_FRAG_LEN 256
101 #define DOT11_RTS_LEN 16
102 #define DOT11_CTS_LEN 10
103 #define DOT11_BA_BITMAP_LEN 128
104 #define DOT11_MIN_BEACON_PERIOD 1
105 #define DOT11_MAX_BEACON_PERIOD 0xFFFF
106 #define DOT11_MAXNUMFRAGS 16
107 #define DOT11_MAX_FRAG_LEN 2346
109 #define BPHY_PLCP_TIME 192
110 #define RIFS_11N_TIME 2
117 /* length of the BCN template area */
118 #define BCN_TMPL_LEN 512
120 /* brcms_bss_info flag bit values */
121 #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */
123 /* chip rx buffer offset */
124 #define BRCMS_HWRXOFF 38
126 /* rfdisable delay timer 500 ms, runs of ALP clock */
127 #define RFDISABLE_DEFAULT 10000000
129 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */
131 /* precedences numbers for wlc queues. These are twice as may levels as
133 * Odd numbers are used for HI priority traffic at same precedence levels
134 * These constants are used ONLY by wlc_prio2prec_map. Do not use them
137 #define _BRCMS_PREC_NONE 0 /* None = - */
138 #define _BRCMS_PREC_BK 2 /* BK - Background */
139 #define _BRCMS_PREC_BE 4 /* BE - Best-effort */
140 #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */
141 #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */
142 #define _BRCMS_PREC_VI 10 /* Vi - Video */
143 #define _BRCMS_PREC_VO 12 /* Vo - Voice */
144 #define _BRCMS_PREC_NC 14 /* NC - Network Control */
146 /* synthpu_dly times in us */
147 #define SYNTHPU_DLY_APHY_US 3700
148 #define SYNTHPU_DLY_BPHY_US 1050
149 #define SYNTHPU_DLY_NPHY_US 2048
150 #define SYNTHPU_DLY_LPPHY_US 300
152 #define ANTCNT 10 /* vanilla M_MAX_ANTCNT val */
154 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
155 #define EDCF_SHORT_S 0
157 #define EDCF_LONG_S 8
158 #define EDCF_LFB_S 12
159 #define EDCF_SHORT_M BITFIELD_MASK(4)
160 #define EDCF_SFB_M BITFIELD_MASK(4)
161 #define EDCF_LONG_M BITFIELD_MASK(4)
162 #define EDCF_LFB_M BITFIELD_MASK(4)
164 #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */
165 #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */
166 #define RETRY_LONG_DEF 4 /* Default Long retry count */
167 #define RETRY_SHORT_FB 3 /* Short count for fb rate */
168 #define RETRY_LONG_FB 2 /* Long count for fb rate */
170 #define APHY_CWMIN 15
171 #define PHY_CWMAX 1023
173 #define EDCF_AIFSN_MIN 1
175 #define FRAGNUM_MASK 0xF
177 #define APHY_SLOT_TIME 9
178 #define BPHY_SLOT_TIME 20
180 #define WL_SPURAVOID_OFF 0
181 #define WL_SPURAVOID_ON1 1
182 #define WL_SPURAVOID_ON2 2
184 /* invalid core flags, use the saved coreflags */
185 #define BRCMS_USE_COREFLAGS 0xffffffff
187 /* values for PLCPHdr_override */
188 #define BRCMS_PLCP_AUTO -1
189 #define BRCMS_PLCP_SHORT 0
190 #define BRCMS_PLCP_LONG 1
192 /* values for g_protection_override and n_protection_override */
193 #define BRCMS_PROTECTION_AUTO -1
194 #define BRCMS_PROTECTION_OFF 0
195 #define BRCMS_PROTECTION_ON 1
196 #define BRCMS_PROTECTION_MMHDR_ONLY 2
197 #define BRCMS_PROTECTION_CTS_ONLY 3
199 /* values for g_protection_control and n_protection_control */
200 #define BRCMS_PROTECTION_CTL_OFF 0
201 #define BRCMS_PROTECTION_CTL_LOCAL 1
202 #define BRCMS_PROTECTION_CTL_OVERLAP 2
204 /* values for n_protection */
205 #define BRCMS_N_PROTECTION_OFF 0
206 #define BRCMS_N_PROTECTION_OPTIONAL 1
207 #define BRCMS_N_PROTECTION_20IN40 2
208 #define BRCMS_N_PROTECTION_MIXEDMODE 3
210 /* values for band specific 40MHz capabilities */
211 #define BRCMS_N_BW_20ALL 0
212 #define BRCMS_N_BW_40ALL 1
213 #define BRCMS_N_BW_20IN2G_40IN5G 2
215 /* bitflags for SGI support (sgi_rx iovar) */
216 #define BRCMS_N_SGI_20 0x01
217 #define BRCMS_N_SGI_40 0x02
219 /* defines used by the nrate iovar */
220 /* MSC in use,indicates b0-6 holds an mcs */
221 #define NRATE_MCS_INUSE 0x00000080
223 #define NRATE_RATE_MASK 0x0000007f
224 /* stf mode mask: siso, cdd, stbc, sdm */
225 #define NRATE_STF_MASK 0x0000ff00
227 #define NRATE_STF_SHIFT 8
228 /* bit indicate to override mcs only */
229 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
230 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
231 #define NRATE_SGI_SHIFT 23 /* sgi mode */
232 #define NRATE_LDPC_CODING 0x00400000 /* adv coding in use */
233 #define NRATE_LDPC_SHIFT 22 /* ldpc shift */
235 #define NRATE_STF_SISO 0 /* stf mode SISO */
236 #define NRATE_STF_CDD 1 /* stf mode CDD */
237 #define NRATE_STF_STBC 2 /* stf mode STBC */
238 #define NRATE_STF_SDM 3 /* stf mode SDM */
240 #define MAX_DMA_SEGS 4
242 /* Max # of entries in Tx FIFO based on 4kb page size */
244 /* Max # of entries in Rx FIFO based on 4kb page size */
247 /* try to keep this # rbufs posted to the chip */
248 #define NRXBUFPOST 32
250 /* data msg txq hiwat mark */
251 #define BRCMS_DATAHIWAT 50
253 /* max # frames to process in brcms_c_recv() */
255 /* max # tx status to process in wlc_txstatus() */
258 /* brcmu_format_flags() bit description structure */
259 struct brcms_c_bit_desc {
265 * The following table lists the buffer memory allocated to xmt fifos in HW.
266 * the size is in units of 256bytes(one block), total size is HW dependent
267 * ucode has default fifo partition, sw can overwrite if necessary
269 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
270 * the twiki is updated before making changes.
273 /* Starting corerev for the fifo size table */
274 #define XMTFIFOTBL_STARTREV 20
282 struct edcf_acparam {
288 const u8 prio2fifo[NUMPRIO] = {
289 TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */
290 TX_AC_BK_FIFO, /* 1 BK AC_BK Background */
291 TX_AC_BK_FIFO, /* 2 -- AC_BK Background */
292 TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */
293 TX_AC_VI_FIFO, /* 4 CL AC_VI Video */
294 TX_AC_VI_FIFO, /* 5 VI AC_VI Video */
295 TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */
296 TX_AC_VO_FIFO /* 7 NC AC_VO Voice */
300 uint brcm_msg_level =
307 /* TX FIFO number to WME/802.1E Access Category */
308 static const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE };
310 /* WME/802.1E Access Category to TX FIFO number */
311 static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 };
313 /* 802.1D Priority to precedence queue mapping */
314 const u8 wlc_prio2prec_map[] = {
315 _BRCMS_PREC_BE, /* 0 BE - Best-effort */
316 _BRCMS_PREC_BK, /* 1 BK - Background */
317 _BRCMS_PREC_NONE, /* 2 None = - */
318 _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */
319 _BRCMS_PREC_CL, /* 4 CL - Controlled Load */
320 _BRCMS_PREC_VI, /* 5 Vi - Video */
321 _BRCMS_PREC_VO, /* 6 Vo - Voice */
322 _BRCMS_PREC_NC, /* 7 NC - Network Control */
325 static const u16 xmtfifo_sz[][NFIFO] = {
326 /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
327 {20, 192, 192, 21, 17, 5},
328 /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
329 {9, 58, 22, 14, 14, 5},
330 /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
331 {20, 192, 192, 21, 17, 5},
332 /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
333 {20, 192, 192, 21, 17, 5},
334 /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
335 {9, 58, 22, 14, 14, 5},
339 static const char * const fifo_names[] = {
340 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
342 static const char fifo_names[6][0];
346 /* pointer to most recently allocated wl/wlc */
347 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
350 /* Find basic rate for a given rate */
351 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
353 if (is_mcs_rate(rspec))
354 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
356 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
359 static u16 frametype(u32 rspec, u8 mimoframe)
361 if (is_mcs_rate(rspec))
363 return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
366 /* currently the best mechanism for determining SIFS is the band in use */
367 static u16 get_sifs(struct brcms_band *band)
369 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
374 * Detect Card removed.
375 * Even checking an sbconfig register read will not false trigger when the core
376 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
377 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
378 * reg with fixed 0/1 pattern (some platforms return all 0).
379 * If clocks are present, call the sb routine which will figure out if the
382 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
385 return ai_deviceremoved(wlc->hw->sih);
386 return (R_REG(&wlc->hw->regs->maccontrol) &
387 (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
390 /* sum the individual fifo tx pending packet counts */
391 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
393 return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
394 wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
397 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
399 return wlc->pub->_nbands > 1 && !wlc->bandlocked;
402 static int brcms_chspec_bw(u16 chanspec)
404 if (CHSPEC_IS40(chanspec))
406 if (CHSPEC_IS20(chanspec))
412 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
417 kfree(cfg->current_bss);
421 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
426 brcms_c_bsscfg_mfree(wlc->bsscfg);
428 kfree(wlc->modulecb);
429 kfree(wlc->default_bss);
430 kfree(wlc->protection);
432 kfree(wlc->bandstate[0]);
433 kfree(wlc->corestate->macstat_snapshot);
434 kfree(wlc->corestate);
435 kfree(wlc->hw->bandstate[0]);
443 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
445 struct brcms_bss_cfg *cfg;
447 cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
451 cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
452 if (cfg->current_bss == NULL)
458 brcms_c_bsscfg_mfree(cfg);
462 static struct brcms_c_info *
463 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
465 struct brcms_c_info *wlc;
467 wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
473 /* allocate struct brcms_c_pub state structure */
474 wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
475 if (wlc->pub == NULL) {
481 /* allocate struct brcms_hardware state structure */
483 wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
484 if (wlc->hw == NULL) {
490 wlc->hw->bandstate[0] =
491 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
492 if (wlc->hw->bandstate[0] == NULL) {
498 for (i = 1; i < MAXBANDS; i++)
499 wlc->hw->bandstate[i] = (struct brcms_hw_band *)
500 ((unsigned long)wlc->hw->bandstate[0] +
501 (sizeof(struct brcms_hw_band) * i));
505 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
506 if (wlc->modulecb == NULL) {
511 wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
512 if (wlc->default_bss == NULL) {
517 wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
518 if (wlc->bsscfg == NULL) {
523 wlc->protection = kzalloc(sizeof(struct brcms_protection),
525 if (wlc->protection == NULL) {
530 wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
531 if (wlc->stf == NULL) {
537 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
538 if (wlc->bandstate[0] == NULL) {
544 for (i = 1; i < MAXBANDS; i++)
545 wlc->bandstate[i] = (struct brcms_band *)
546 ((unsigned long)wlc->bandstate[0]
547 + (sizeof(struct brcms_band)*i));
550 wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
551 if (wlc->corestate == NULL) {
556 wlc->corestate->macstat_snapshot =
557 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
558 if (wlc->corestate->macstat_snapshot == NULL) {
566 brcms_c_detach_mfree(wlc);
571 * Update the slot timing for standard 11b/g (20us slots)
572 * or shortslot 11g (9us slots)
573 * The PSM needs to be suspended for this call.
575 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
578 struct d11regs __iomem *regs;
583 /* 11g short slot: 11a timing */
584 W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */
585 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
587 /* 11g long slot: 11b timing */
588 W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */
589 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
594 * calculate frame duration of a given rate and length, return
597 static uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
598 u8 preamble_type, uint mac_len)
600 uint nsyms, dur = 0, Ndps, kNdps;
601 uint rate = rspec2rate(ratespec);
604 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
609 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
610 wlc->pub->unit, ratespec, preamble_type, mac_len);
612 if (is_mcs_rate(ratespec)) {
613 uint mcs = ratespec & RSPEC_RATE_MASK;
614 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
616 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
617 if (preamble_type == BRCMS_MM_PREAMBLE)
619 /* 1000Ndbps = kbps * 4 */
620 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
621 rspec_issgi(ratespec)) * 4;
623 if (rspec_stc(ratespec) == 0)
625 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
626 APHY_TAIL_NBITS) * 1000, kNdps);
628 /* STBC needs to have even number of symbols */
631 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
632 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
634 dur += APHY_SYMBOL_TIME * nsyms;
635 if (wlc->band->bandtype == BRCM_BAND_2G)
636 dur += DOT11_OFDM_SIGNAL_EXTENSION;
637 } else if (is_ofdm_rate(rate)) {
638 dur = APHY_PREAMBLE_TIME;
639 dur += APHY_SIGNAL_TIME;
640 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
642 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
644 CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
646 dur += APHY_SYMBOL_TIME * nsyms;
647 if (wlc->band->bandtype == BRCM_BAND_2G)
648 dur += DOT11_OFDM_SIGNAL_EXTENSION;
651 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
654 mac_len = mac_len * 8 * 2;
655 /* calc ceiling of bits/rate = microseconds of air time */
656 dur = (mac_len + rate - 1) / rate;
657 if (preamble_type & BRCMS_SHORT_PREAMBLE)
658 dur += BPHY_PLCP_SHORT_TIME;
660 dur += BPHY_PLCP_TIME;
665 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
666 const struct d11init *inits)
674 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
676 base = (u8 __iomem *)wlc_hw->regs;
678 for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
679 size = le16_to_cpu(inits[i].size);
680 addr = base + le16_to_cpu(inits[i].addr);
681 value = le32_to_cpu(inits[i].value);
683 W_REG((u16 __iomem *)addr, value);
685 W_REG((u32 __iomem *)addr, value);
691 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
695 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
699 for (idx = 0; idx < MHFMAX; idx++)
700 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
703 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
705 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
706 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
708 /* init microcode host flags */
709 brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
711 /* do band-specific ucode IHR, SHM, and SCR inits */
712 if (D11REV_IS(wlc_hw->corerev, 23)) {
713 if (BRCMS_ISNPHY(wlc_hw->band))
714 brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
716 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
717 " %d\n", __func__, wlc_hw->unit,
720 if (D11REV_IS(wlc_hw->corerev, 24)) {
721 if (BRCMS_ISLCNPHY(wlc_hw->band))
722 brcms_c_write_inits(wlc_hw,
723 ucode->d11lcn0bsinitvals24);
725 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
726 " core rev %d\n", __func__,
727 wlc_hw->unit, wlc_hw->corerev);
729 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
730 __func__, wlc_hw->unit, wlc_hw->corerev);
735 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
737 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
739 wlc_hw->phyclk = clk;
741 if (OFF == clk) { /* clear gmode bit, put phy into reset */
743 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE),
744 (SICF_PRST | SICF_FGC));
746 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST);
749 } else { /* take phy out of reset */
751 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC);
753 ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0);
759 /* low-level band switch utility routine */
760 static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
762 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
765 wlc_hw->band = wlc_hw->bandstate[bandunit];
769 * until we eliminate need for wlc->band refs in low level code
771 wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
773 /* set gmode core flag */
774 if (wlc_hw->sbclk && !wlc_hw->noreset)
775 ai_core_cflags(wlc_hw->sih, SICF_GMODE,
776 ((bandunit == 0) ? SICF_GMODE : 0));
779 /* switch to new band but leave it inactive */
780 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
782 struct brcms_hardware *wlc_hw = wlc->hw;
785 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
787 WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
789 /* disable interrupts */
790 macintmask = brcms_intrsoff(wlc->wl);
793 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
795 brcms_b_core_phy_clk(wlc_hw, OFF);
797 brcms_c_setxband(wlc_hw, bandunit);
802 /* process an individual struct tx_status */
804 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
809 struct scb *scb = NULL;
811 int tx_rts, tx_frame_count, tx_rts_count;
812 uint totlen, supr_status;
814 struct ieee80211_hdr *h;
816 struct ieee80211_tx_info *tx_info;
817 struct ieee80211_tx_rate *txrate;
820 /* discard intermediate indications for ucode with one legitimate case:
821 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
822 * but the subsequent tx of DATA failed. so it will start rts/cts
823 * from the beginning (resetting the rts transmission count)
825 if (!(txs->status & TX_STATUS_AMPDU)
826 && (txs->status & TX_STATUS_INTERMEDIATE)) {
827 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
832 queue = txs->frameid & TXFID_QUEUE_MASK;
833 if (queue >= NFIFO) {
838 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
842 txh = (struct d11txh *) (p->data);
843 mcl = le16_to_cpu(txh->MacTxControlLow);
846 if (brcm_msg_level & LOG_ERROR_VAL) {
847 wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
848 txs->phyerr, txh->MainRates);
849 brcms_c_print_txdesc(txh);
851 brcms_c_print_txstatus(txs);
854 if (txs->frameid != le16_to_cpu(txh->TxFrameID))
856 tx_info = IEEE80211_SKB_CB(p);
857 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
859 if (tx_info->control.sta)
862 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
863 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
867 supr_status = txs->status & TX_STATUS_SUPR_MASK;
868 if (supr_status == TX_STATUS_SUPR_BADCH)
870 "%s: Pkt tx suppressed, possibly channel %d\n",
871 __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
873 tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
875 (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
877 (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
879 lastframe = !ieee80211_has_morefrags(h->frame_control);
882 wiphy_err(wlc->wiphy, "Not last frame!\n");
885 * Set information to be consumed by Minstrel ht.
887 * The "fallback limit" is the number of tx attempts a given
888 * MPDU is sent at the "primary" rate. Tx attempts beyond that
889 * limit are sent at the "secondary" rate.
890 * A 'short frame' does not exceed RTS treshold.
892 u16 sfbl, /* Short Frame Rate Fallback Limit */
893 lfbl, /* Long Frame Rate Fallback Limit */
896 if (queue < AC_COUNT) {
897 sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
899 lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
906 txrate = tx_info->status.rates;
907 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
912 ieee80211_tx_info_clear_status(tx_info);
914 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
916 * rate selection requested a fallback rate
919 txrate[0].count = fbl;
920 txrate[1].count = tx_frame_count - fbl;
923 * rate selection did not request fallback rate, or
926 txrate[0].count = tx_frame_count;
928 * rc80211_minstrel.c:minstrel_tx_status() expects
929 * unused rates to be marked with idx = -1
935 /* clear the rest of the rates */
936 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
941 if (txs->status & TX_STATUS_ACK_RCV)
942 tx_info->flags |= IEEE80211_TX_STAT_ACK;
945 totlen = brcmu_pkttotlen(p);
948 brcms_c_txfifo_complete(wlc, queue, 1);
953 /* remove PLCP & Broadcom tx descriptor header */
954 skb_pull(p, D11_PHY_HDR_LEN);
955 skb_pull(p, D11_TXH_LEN);
956 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
958 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
959 "tx_status\n", __func__);
966 brcmu_pkt_buf_free_skb(p);
972 /* process tx completion events in BMAC
973 * Return true if more tx status need to be processed. false otherwise.
976 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
978 bool morepending = false;
979 struct brcms_c_info *wlc = wlc_hw->wlc;
980 struct d11regs __iomem *regs;
981 struct tx_status txstatus, *txs;
985 * Param 'max_tx_num' indicates max. # tx status to process before
988 uint max_tx_num = bound ? TXSBND : -1;
990 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
996 && (s1 = R_REG(®s->frmtxstatus)) & TXS_V) {
998 if (s1 == 0xffffffff) {
999 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1000 wlc_hw->unit, __func__);
1004 s2 = R_REG(®s->frmtxstatus2);
1006 txs->status = s1 & TXS_STATUS_MASK;
1007 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1008 txs->sequence = s2 & TXS_SEQ_MASK;
1009 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1010 txs->lasttxtime = 0;
1012 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1014 /* !give others some time to run! */
1015 if (++n >= max_tx_num)
1022 if (n >= max_tx_num)
1025 if (!pktq_empty(&wlc->pkt_queue->q))
1026 brcms_c_send_q(wlc);
1031 static void brcms_c_tbtt(struct brcms_c_info *wlc)
1033 if (!wlc->bsscfg->BSS)
1035 * DirFrmQ is now valid...defer setting until end
1038 wlc->qvalid |= MCMD_DIRFRMQVAL;
1041 /* set initial host flags value */
1043 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1045 struct brcms_hardware *wlc_hw = wlc->hw;
1047 memset(mhfs, 0, MHFMAX * sizeof(u16));
1049 mhfs[MHF2] |= mhf2_init;
1051 /* prohibit use of slowclock on multifunction boards */
1052 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1053 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1055 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1056 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1057 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1061 static struct dma64regs __iomem *
1062 dmareg(struct brcms_hardware *hw, uint direction, uint fifonum)
1064 if (direction == DMA_TX)
1065 return &(hw->regs->fifo64regs[fifonum].dmaxmt);
1066 return &(hw->regs->fifo64regs[fifonum].dmarcv);
1069 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1074 * ucode host flag 2 needed for pio mode, independent of band and fifo
1077 struct brcms_hardware *wlc_hw = wlc->hw;
1078 uint unit = wlc_hw->unit;
1079 struct wiphy *wiphy = wlc->wiphy;
1081 /* name and offsets for dma_attach */
1082 snprintf(name, sizeof(name), "wl%d", unit);
1084 if (wlc_hw->di[0] == NULL) { /* Init FIFOs */
1085 int dma_attach_err = 0;
1089 * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1090 * RX: RX_FIFO (RX data packets)
1092 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih,
1093 (wme ? dmareg(wlc_hw, DMA_TX, 0) :
1094 NULL), dmareg(wlc_hw, DMA_RX, 0),
1095 (wme ? NTXD : 0), NRXD,
1096 RXBUFSZ, -1, NRXBUFPOST,
1097 BRCMS_HWRXOFF, &brcm_msg_level);
1098 dma_attach_err |= (NULL == wlc_hw->di[0]);
1102 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1103 * (legacy) TX_DATA_FIFO (TX data packets)
1106 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih,
1107 dmareg(wlc_hw, DMA_TX, 1), NULL,
1108 NTXD, 0, 0, -1, 0, 0,
1110 dma_attach_err |= (NULL == wlc_hw->di[1]);
1114 * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1117 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih,
1118 dmareg(wlc_hw, DMA_TX, 2), NULL,
1119 NTXD, 0, 0, -1, 0, 0,
1121 dma_attach_err |= (NULL == wlc_hw->di[2]);
1124 * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1125 * (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1127 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih,
1128 dmareg(wlc_hw, DMA_TX, 3),
1129 NULL, NTXD, 0, 0, -1,
1130 0, 0, &brcm_msg_level);
1131 dma_attach_err |= (NULL == wlc_hw->di[3]);
1132 /* Cleaner to leave this as if with AP defined */
1134 if (dma_attach_err) {
1135 wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1140 /* get pointer to dma engine tx flow control variable */
1141 for (i = 0; i < NFIFO; i++)
1143 wlc_hw->txavail[i] =
1144 (uint *) dma_getvar(wlc_hw->di[i],
1148 /* initial ucode host flags */
1149 brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1154 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1158 for (j = 0; j < NFIFO; j++) {
1159 if (wlc_hw->di[j]) {
1160 dma_detach(wlc_hw->di[j]);
1161 wlc_hw->di[j] = NULL;
1167 * Initialize brcms_c_info default values ...
1168 * may get overrides later in this function
1169 * BMAC_NOTES, move low out and resolve the dangling ones
1171 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1173 struct brcms_c_info *wlc = wlc_hw->wlc;
1175 /* set default sw macintmask value */
1176 wlc->defmacintmask = DEF_MACINTMASK;
1178 /* various 802.11g modes */
1179 wlc_hw->shortslot = false;
1181 wlc_hw->SFBL = RETRY_SHORT_FB;
1182 wlc_hw->LFBL = RETRY_LONG_FB;
1184 /* default mac retry limits */
1185 wlc_hw->SRL = RETRY_SHORT_DEF;
1186 wlc_hw->LRL = RETRY_LONG_DEF;
1187 wlc_hw->chanspec = ch20mhz_chspec(1);
1190 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1192 /* delay before first read of ucode state */
1195 /* wait until ucode is no longer asleep */
1196 SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1197 DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1200 /* control chip clock to save power, enable dynamic clock or force fast clock */
1201 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1203 if (wlc_hw->sih->cccaps & CC_CAP_PMU) {
1204 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1205 * on backplane, but mac core will still run on ALP(not HT) when
1206 * it enters powersave mode, which means the FCA bit may not be
1207 * set. Should wakeup mac if driver wants it to run on HT.
1211 if (mode == CLK_FAST) {
1212 OR_REG(&wlc_hw->regs->clk_ctl_st,
1219 clk_ctl_st) & CCS_HTAVAIL) == 0),
1220 PMU_MAX_TRANSITION_DLY);
1223 clk_ctl_st) & CCS_HTAVAIL));
1225 if ((wlc_hw->sih->pmurev == 0) &&
1228 clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ)))
1231 clk_ctl_st) & CCS_HTAVAIL)
1233 PMU_MAX_TRANSITION_DLY);
1234 AND_REG(&wlc_hw->regs->clk_ctl_st,
1238 wlc_hw->forcefastclk = (mode == CLK_FAST);
1241 /* old chips w/o PMU, force HT through cc,
1242 * then use FCA to verify mac is running fast clock
1245 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1247 /* check fast clock is available (if core is not in reset) */
1248 if (wlc_hw->forcefastclk && wlc_hw->clk)
1249 WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) &
1253 * keep the ucode wake bit on if forcefastclk is on since we
1254 * do not want ucode to put us back to slow clock when it dozes
1255 * for PM mode. Code below matches the wake override bit with
1256 * current forcefastclk state. Only setting bit in wake_override
1257 * instead of waking ucode immediately since old code had this
1258 * behavior. Older code set wlc->forcefastclk but only had the
1259 * wake happen if the wakup_ucode work (protected by an up
1260 * check) was executed just below.
1262 if (wlc_hw->forcefastclk)
1263 mboolset(wlc_hw->wake_override,
1264 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1266 mboolclr(wlc_hw->wake_override,
1267 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1271 /* set or clear ucode host flag bits
1272 * it has an optimization for no-change write
1273 * it only writes through shared memory when the core has clock;
1274 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1277 * bands values are: BRCM_BAND_AUTO <--- Current band only
1278 * BRCM_BAND_5G <--- 5G band only
1279 * BRCM_BAND_2G <--- 2G band only
1280 * BRCM_BAND_ALL <--- All bands
1283 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1287 u16 addr[MHFMAX] = {
1288 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1291 struct brcms_hw_band *band;
1293 if ((val & ~mask) || idx >= MHFMAX)
1294 return; /* error condition */
1297 /* Current band only or all bands,
1298 * then set the band to current band
1300 case BRCM_BAND_AUTO:
1302 band = wlc_hw->band;
1305 band = wlc_hw->bandstate[BAND_5G_INDEX];
1308 band = wlc_hw->bandstate[BAND_2G_INDEX];
1311 band = NULL; /* error condition */
1315 save = band->mhfs[idx];
1316 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1318 /* optimization: only write through if changed, and
1319 * changed band is the current band
1321 if (wlc_hw->clk && (band->mhfs[idx] != save)
1322 && (band == wlc_hw->band))
1323 brcms_b_write_shm(wlc_hw, addr[idx],
1324 (u16) band->mhfs[idx]);
1327 if (bands == BRCM_BAND_ALL) {
1328 wlc_hw->bandstate[0]->mhfs[idx] =
1329 (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1330 wlc_hw->bandstate[1]->mhfs[idx] =
1331 (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1335 /* set the maccontrol register to desired reset state and
1336 * initialize the sw cache of the register
1338 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1340 /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1341 wlc_hw->maccontrol = 0;
1342 wlc_hw->suspended_fifos = 0;
1343 wlc_hw->wake_override = 0;
1344 wlc_hw->mute_override = 0;
1345 brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1349 * write the software state of maccontrol and
1350 * overrides to the maccontrol register
1352 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1354 u32 maccontrol = wlc_hw->maccontrol;
1356 /* OR in the wake bit if overridden */
1357 if (wlc_hw->wake_override)
1358 maccontrol |= MCTL_WAKE;
1360 /* set AP and INFRA bits for mute if needed */
1361 if (wlc_hw->mute_override) {
1362 maccontrol &= ~(MCTL_AP);
1363 maccontrol |= MCTL_INFRA;
1366 W_REG(&wlc_hw->regs->maccontrol, maccontrol);
1369 /* set or clear maccontrol bits */
1370 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1376 return; /* error condition */
1377 maccontrol = wlc_hw->maccontrol;
1378 new_maccontrol = (maccontrol & ~mask) | val;
1380 /* if the new maccontrol value is the same as the old, nothing to do */
1381 if (new_maccontrol == maccontrol)
1384 /* something changed, cache the new value */
1385 wlc_hw->maccontrol = new_maccontrol;
1387 /* write the new values with overrides applied */
1388 brcms_c_mctrl_write(wlc_hw);
1391 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1394 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1395 mboolset(wlc_hw->wake_override, override_bit);
1399 mboolset(wlc_hw->wake_override, override_bit);
1401 brcms_c_mctrl_write(wlc_hw);
1402 brcms_b_wait_for_wake(wlc_hw);
1405 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1408 mboolclr(wlc_hw->wake_override, override_bit);
1410 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1413 brcms_c_mctrl_write(wlc_hw);
1416 /* When driver needs ucode to stop beaconing, it has to make sure that
1417 * MCTL_AP is clear and MCTL_INFRA is set
1418 * Mode MCTL_AP MCTL_INFRA
1420 * STA 0 1 <--- This will ensure no beacons
1423 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1425 wlc_hw->mute_override = 1;
1427 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1428 * override, then there is no change to write
1430 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1433 brcms_c_mctrl_write(wlc_hw);
1436 /* Clear the override on AP and INFRA bits */
1437 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1439 if (wlc_hw->mute_override == 0)
1442 wlc_hw->mute_override = 0;
1444 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1445 * override, then there is no change to write
1447 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1450 brcms_c_mctrl_write(wlc_hw);
1454 * Write a MAC address to the given match reg offset in the RXE match engine.
1457 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1460 struct d11regs __iomem *regs;
1465 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1468 regs = wlc_hw->regs;
1469 mac_l = addr[0] | (addr[1] << 8);
1470 mac_m = addr[2] | (addr[3] << 8);
1471 mac_h = addr[4] | (addr[5] << 8);
1473 /* enter the MAC addr into the RXE match registers */
1474 W_REG(®s->rcm_ctl, RCM_INC_DATA | match_reg_offset);
1475 W_REG(®s->rcm_mat_data, mac_l);
1476 W_REG(®s->rcm_mat_data, mac_m);
1477 W_REG(®s->rcm_mat_data, mac_h);
1482 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1485 struct d11regs __iomem *regs;
1490 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1492 regs = wlc_hw->regs;
1493 W_REG(®s->tplatewrptr, offset);
1495 /* if MCTL_BIGEND bit set in mac control register,
1496 * the chip swaps data in fifo, as well as data in
1499 be_bit = (R_REG(®s->maccontrol) & MCTL_BIGEND) != 0;
1502 memcpy(&word, buf, sizeof(u32));
1505 word_be = cpu_to_be32(word);
1506 word = *(u32 *)&word_be;
1508 word_le = cpu_to_le32(word);
1509 word = *(u32 *)&word_le;
1512 W_REG(®s->tplatewrdata, word);
1514 buf = (u8 *) buf + sizeof(u32);
1519 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1521 wlc_hw->band->CWmin = newmin;
1523 W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1524 (void)R_REG(&wlc_hw->regs->objaddr);
1525 W_REG(&wlc_hw->regs->objdata, newmin);
1528 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1530 wlc_hw->band->CWmax = newmax;
1532 W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1533 (void)R_REG(&wlc_hw->regs->objaddr);
1534 W_REG(&wlc_hw->regs->objdata, newmax);
1537 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1541 /* request FAST clock if not on */
1542 fastclk = wlc_hw->forcefastclk;
1544 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1546 wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1548 brcms_b_phy_reset(wlc_hw);
1549 wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1551 /* restore the clk */
1553 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1556 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1559 struct brcms_c_info *wlc = wlc_hw->wlc;
1560 /* update SYNTHPU_DLY */
1562 if (BRCMS_ISLCNPHY(wlc->band))
1563 v = SYNTHPU_DLY_LPPHY_US;
1564 else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1565 v = SYNTHPU_DLY_NPHY_US;
1567 v = SYNTHPU_DLY_BPHY_US;
1569 brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1572 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1575 u16 phytxant = wlc_hw->bmac_phytxant;
1576 u16 mask = PHY_TXC_ANT_MASK;
1578 /* set the Probe Response frame phy control word */
1579 phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1580 phyctl = (phyctl & ~mask) | phytxant;
1581 brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1583 /* set the Response (ACK/CTS) frame phy control word */
1584 phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1585 phyctl = (phyctl & ~mask) | phytxant;
1586 brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1589 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1594 struct plcp_signal_rate_lookup {
1598 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1599 const struct plcp_signal_rate_lookup rate_lookup[] = {
1600 {BRCM_RATE_6M, 0xB},
1601 {BRCM_RATE_9M, 0xF},
1602 {BRCM_RATE_12M, 0xA},
1603 {BRCM_RATE_18M, 0xE},
1604 {BRCM_RATE_24M, 0x9},
1605 {BRCM_RATE_36M, 0xD},
1606 {BRCM_RATE_48M, 0x8},
1607 {BRCM_RATE_54M, 0xC}
1610 for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1611 if (rate == rate_lookup[i].rate) {
1612 plcp_rate = rate_lookup[i].signal_rate;
1617 /* Find the SHM pointer to the rate table entry by looking in the
1620 return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1623 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1627 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1628 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1634 if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1637 /* walk the phy rate table and update the entries */
1638 for (i = 0; i < ARRAY_SIZE(rates); i++) {
1641 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1643 /* read the SHM Rate Table entry OFDM PCTL1 values */
1645 brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1647 /* modify the value */
1648 pctl1 &= ~PHY_TXC1_MODE_MASK;
1649 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1651 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1652 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1657 /* band-specific init */
1658 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1660 struct brcms_hardware *wlc_hw = wlc->hw;
1662 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1663 wlc_hw->band->bandunit);
1665 brcms_c_ucode_bsinit(wlc_hw);
1667 wlc_phy_init(wlc_hw->band->pi, chanspec);
1669 brcms_c_ucode_txant_set(wlc_hw);
1672 * cwmin is band-specific, update hardware
1673 * with value for current band
1675 brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1676 brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1678 brcms_b_update_slot_timing(wlc_hw,
1679 wlc_hw->band->bandtype == BRCM_BAND_5G ?
1680 true : wlc_hw->shortslot);
1682 /* write phytype and phyvers */
1683 brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1684 brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1687 * initialize the txphyctl1 rate table since
1688 * shmem is shared between bands
1690 brcms_upd_ofdm_pctl1_table(wlc_hw);
1692 brcms_b_upd_synthpu(wlc_hw);
1695 /* Perform a soft reset of the PHY PLL */
1696 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1698 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1700 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1701 offsetof(struct chipcregs, chipcontrol_addr), ~0, 0);
1703 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1704 offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1706 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1707 offsetof(struct chipcregs, chipcontrol_data), 0x4, 4);
1709 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1710 offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1714 /* light way to turn on phy clock without reset for NPHY only
1715 * refer to brcms_b_core_phy_clk for full version
1717 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1719 /* support(necessary for NPHY and HYPHY) only */
1720 if (!BRCMS_ISNPHY(wlc_hw->band))
1724 ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC);
1726 ai_core_cflags(wlc_hw->sih, SICF_FGC, 0);
1730 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1733 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE);
1735 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0);
1738 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1740 struct brcms_phy_pub *pih = wlc_hw->band->pi;
1742 bool phy_in_reset = false;
1744 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1749 phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1751 /* Specific reset sequence required for NPHY rev 3 and 4 */
1752 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1753 NREV_LE(wlc_hw->band->phyrev, 4)) {
1754 /* Set the PHY bandwidth */
1755 ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits);
1759 /* Perform a soft reset of the PHY PLL */
1760 brcms_b_core_phypll_reset(wlc_hw);
1763 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE),
1764 (SICF_PRST | SICF_PCLKE));
1765 phy_in_reset = true;
1767 ai_core_cflags(wlc_hw->sih,
1768 (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1769 (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1773 brcms_b_core_phy_clk(wlc_hw, ON);
1776 wlc_phy_anacore(pih, ON);
1779 /* switch to and initialize new band */
1780 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1782 struct brcms_c_info *wlc = wlc_hw->wlc;
1785 /* Enable the d11 core before accessing it */
1786 if (!ai_iscoreup(wlc_hw->sih)) {
1787 ai_core_reset(wlc_hw->sih, 0, 0);
1788 brcms_c_mctrl_reset(wlc_hw);
1791 macintmask = brcms_c_setband_inact(wlc, bandunit);
1796 brcms_b_core_phy_clk(wlc_hw, ON);
1798 /* band-specific initializations */
1799 brcms_b_bsinit(wlc, chanspec);
1802 * If there are any pending software interrupt bits,
1803 * then replace these with a harmless nonzero value
1804 * so brcms_c_dpc() will re-enable interrupts when done.
1806 if (wlc->macintstatus)
1807 wlc->macintstatus = MI_DMAINT;
1809 /* restore macintmask */
1810 brcms_intrsrestore(wlc->wl, macintmask);
1812 /* ucode should still be suspended.. */
1813 WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
1816 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1819 /* reject unsupported corerev */
1820 if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1821 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1829 /* Validate some board info parameters */
1830 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1832 uint boardrev = wlc_hw->boardrev;
1834 /* 4 bits each for board type, major, minor, and tiny version */
1835 uint brt = (boardrev & 0xf000) >> 12;
1836 uint b0 = (boardrev & 0xf00) >> 8;
1837 uint b1 = (boardrev & 0xf0) >> 4;
1838 uint b2 = boardrev & 0xf;
1840 /* voards from other vendors are always considered valid */
1841 if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM)
1844 /* do some boardrev sanity checks when boardvendor is Broadcom */
1848 if (boardrev <= 0xff)
1851 if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1858 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
1860 enum brcms_srom_id var_id = BRCMS_SROM_MACADDR;
1863 /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1864 macaddr = getvar(wlc_hw->sih, var_id);
1865 if (macaddr != NULL)
1868 if (wlc_hw->_nbands > 1)
1869 var_id = BRCMS_SROM_ET1MACADDR;
1871 var_id = BRCMS_SROM_IL0MACADDR;
1873 macaddr = getvar(wlc_hw->sih, var_id);
1874 if (macaddr == NULL)
1875 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
1876 "getvar(%d) not found\n", wlc_hw->unit, var_id);
1881 /* power both the pll and external oscillator on/off */
1882 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
1884 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
1887 * dont power down if plldown is false or
1888 * we must poll hw radio disable
1890 if (!want && wlc_hw->pllreq)
1894 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
1896 wlc_hw->sbclk = want;
1897 if (!wlc_hw->sbclk) {
1898 wlc_hw->clk = false;
1899 if (wlc_hw->band && wlc_hw->band->pi)
1900 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1905 * Return true if radio is disabled, otherwise false.
1906 * hw radio disable signal is an external pin, users activate it asynchronously
1907 * this function could be called when driver is down and w/o clock
1908 * it operates on different registers depending on corerev and boardflag.
1910 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
1913 u32 resetbits = 0, flags = 0;
1915 xtal = wlc_hw->sbclk;
1917 brcms_b_xtal(wlc_hw, ON);
1919 /* may need to take core out of reset first */
1923 * mac no longer enables phyclk automatically when driver
1924 * accesses phyreg throughput mac. This can be skipped since
1925 * only mac reg is accessed below
1927 flags |= SICF_PCLKE;
1930 * AI chip doesn't restore bar0win2 on
1931 * hibernation/resume, need sw fixup
1933 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
1934 (wlc_hw->sih->chip == BCM43225_CHIP_ID))
1935 wlc_hw->regs = (struct d11regs __iomem *)
1936 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
1937 ai_core_reset(wlc_hw->sih, flags, resetbits);
1938 brcms_c_mctrl_reset(wlc_hw);
1941 v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0);
1943 /* put core back into reset */
1945 ai_core_disable(wlc_hw->sih, 0);
1948 brcms_b_xtal(wlc_hw, OFF);
1953 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
1955 struct dma_pub *di = wlc_hw->di[fifo];
1956 return dma_rxreset(di);
1960 * ensure fask clock during reset
1962 * reset d11(out of reset)
1963 * reset phy(out of reset)
1964 * clear software macintstatus for fresh new start
1965 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
1967 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
1969 struct d11regs __iomem *regs;
1974 if (flags == BRCMS_USE_COREFLAGS)
1975 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
1977 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1979 regs = wlc_hw->regs;
1981 /* request FAST clock if not on */
1982 fastclk = wlc_hw->forcefastclk;
1984 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1986 /* reset the dma engines except first time thru */
1987 if (ai_iscoreup(wlc_hw->sih)) {
1988 for (i = 0; i < NFIFO; i++)
1989 if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
1990 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
1991 "dma_txreset[%d]: cannot stop dma\n",
1992 wlc_hw->unit, __func__, i);
1994 if ((wlc_hw->di[RX_FIFO])
1995 && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
1996 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
1997 "[%d]: cannot stop dma\n",
1998 wlc_hw->unit, __func__, RX_FIFO);
2000 /* if noreset, just stop the psm and return */
2001 if (wlc_hw->noreset) {
2002 wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */
2003 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2008 * mac no longer enables phyclk automatically when driver accesses
2009 * phyreg throughput mac, AND phy_reset is skipped at early stage when
2010 * band->pi is invalid. need to enable PHY CLK
2012 flags |= SICF_PCLKE;
2016 * In chips with PMU, the fastclk request goes through d11 core
2017 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2019 * This adds some delay and we can optimize it by also requesting
2020 * fastclk through chipcommon during this period if necessary. But
2021 * that has to work coordinate with other driver like mips/arm since
2022 * they may touch chipcommon as well.
2024 wlc_hw->clk = false;
2025 ai_core_reset(wlc_hw->sih, flags, resetbits);
2027 if (wlc_hw->band && wlc_hw->band->pi)
2028 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2030 brcms_c_mctrl_reset(wlc_hw);
2032 if (wlc_hw->sih->cccaps & CC_CAP_PMU)
2033 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2035 brcms_b_phy_reset(wlc_hw);
2037 /* turn on PHY_PLL */
2038 brcms_b_core_phypll_ctl(wlc_hw, true);
2040 /* clear sw intstatus */
2041 wlc_hw->wlc->macintstatus = 0;
2043 /* restore the clk setting */
2045 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2048 /* txfifo sizes needs to be modified(increased) since the newer cores
2051 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2053 struct d11regs __iomem *regs = wlc_hw->regs;
2055 u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2056 u16 txfifo_def, txfifo_def1;
2059 /* tx fifos start at TXFIFO_START_BLK from the Base address */
2060 txfifo_startblk = TXFIFO_START_BLK;
2062 /* sequence of operations: reset fifo, set fifo size, reset fifo */
2063 for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2065 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2066 txfifo_def = (txfifo_startblk & 0xff) |
2067 (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2068 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2070 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2072 TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2074 W_REG(®s->xmtfifocmd, txfifo_cmd);
2075 W_REG(®s->xmtfifodef, txfifo_def);
2076 W_REG(®s->xmtfifodef1, txfifo_def1);
2078 W_REG(®s->xmtfifocmd, txfifo_cmd);
2080 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2083 * need to propagate to shm location to be in sync since ucode/hw won't
2086 brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2087 wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2088 brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2089 wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2090 brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2091 ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2092 xmtfifo_sz[TX_AC_BK_FIFO]));
2093 brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2094 ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2095 xmtfifo_sz[TX_BCMC_FIFO]));
2098 /* This function is used for changing the tsf frac register
2099 * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2100 * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2101 * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2102 * HTPHY Formula is 2^26/freq(MHz) e.g.
2103 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2104 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2105 * For spuron: 123MHz -> 2^26/123 = 545600.5
2106 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2107 * For spur off: 120MHz -> 2^26/120 = 559240.5
2108 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2111 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2113 struct d11regs __iomem *regs = wlc_hw->regs;
2115 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2116 (wlc_hw->sih->chip == BCM43225_CHIP_ID)) {
2117 if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */
2118 W_REG(®s->tsf_clk_frac_l, 0x2082);
2119 W_REG(®s->tsf_clk_frac_h, 0x8);
2120 } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */
2121 W_REG(®s->tsf_clk_frac_l, 0x5341);
2122 W_REG(®s->tsf_clk_frac_h, 0x8);
2123 } else { /* 120Mhz */
2124 W_REG(®s->tsf_clk_frac_l, 0x8889);
2125 W_REG(®s->tsf_clk_frac_h, 0x8);
2127 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2128 if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */
2129 W_REG(®s->tsf_clk_frac_l, 0x7CE0);
2130 W_REG(®s->tsf_clk_frac_h, 0xC);
2131 } else { /* 80Mhz */
2132 W_REG(®s->tsf_clk_frac_l, 0xCCCD);
2133 W_REG(®s->tsf_clk_frac_h, 0xC);
2138 /* Initialize GPIOs that are controlled by D11 core */
2139 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2141 struct brcms_hardware *wlc_hw = wlc->hw;
2142 struct d11regs __iomem *regs;
2145 regs = wlc_hw->regs;
2147 /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2148 brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2151 * Common GPIO setup:
2152 * G0 = LED 0 = WLAN Activity
2153 * G1 = LED 1 = WLAN 2.4 GHz Radio State
2154 * G2 = LED 2 = WLAN 5 GHz Radio State
2155 * G4 = radio disable input (HI enabled, LO disabled)
2160 /* Allocate GPIOs for mimo antenna diversity feature */
2161 if (wlc_hw->antsel_type == ANTSEL_2x3) {
2162 /* Enable antenna diversity, use 2x3 mode */
2163 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2164 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2165 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2166 MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2168 /* init superswitch control */
2169 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2171 } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2172 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2174 * The board itself is powered by these GPIOs
2175 * (when not sending pattern) so set them high
2177 OR_REG(®s->psm_gpio_oe,
2178 (BOARD_GPIO_12 | BOARD_GPIO_13));
2179 OR_REG(®s->psm_gpio_out,
2180 (BOARD_GPIO_12 | BOARD_GPIO_13));
2182 /* Enable antenna diversity, use 2x4 mode */
2183 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2184 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2185 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2188 /* Configure the desired clock to be 4Mhz */
2189 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2190 ANTSEL_CLKDIV_4MHZ);
2194 * gpio 9 controls the PA. ucode is responsible
2195 * for wiggling out and oe
2197 if (wlc_hw->boardflags & BFL_PACTRL)
2198 gm |= gc |= BOARD_GPIO_PACTRL;
2200 /* apply to gpiocontrol register */
2201 ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2204 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2205 const __le32 ucode[], const size_t nbytes)
2207 struct d11regs __iomem *regs = wlc_hw->regs;
2211 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2213 count = (nbytes / sizeof(u32));
2215 W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL));
2216 (void)R_REG(®s->objaddr);
2217 for (i = 0; i < count; i++)
2218 W_REG(®s->objdata, le32_to_cpu(ucode[i]));
2222 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2224 struct brcms_c_info *wlc;
2225 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2229 if (wlc_hw->ucode_loaded)
2232 if (D11REV_IS(wlc_hw->corerev, 23)) {
2233 if (BRCMS_ISNPHY(wlc_hw->band)) {
2234 brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2235 ucode->bcm43xx_16_mimosz);
2236 wlc_hw->ucode_loaded = true;
2238 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2240 __func__, wlc_hw->unit, wlc_hw->corerev);
2241 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2242 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2243 brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2244 ucode->bcm43xx_24_lcnsz);
2245 wlc_hw->ucode_loaded = true;
2247 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2249 __func__, wlc_hw->unit, wlc_hw->corerev);
2254 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2256 /* update sw state */
2257 wlc_hw->bmac_phytxant = phytxant;
2259 /* push to ucode if up */
2262 brcms_c_ucode_txant_set(wlc_hw);
2266 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2268 return (u16) wlc_hw->wlc->stf->txant;
2271 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2273 wlc_hw->antsel_type = antsel_type;
2275 /* Update the antsel type for phy module to use */
2276 wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2279 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2283 uint intstatus, idx;
2284 struct d11regs __iomem *regs = wlc_hw->regs;
2285 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2287 unit = wlc_hw->unit;
2289 for (idx = 0; idx < NFIFO; idx++) {
2290 /* read intstatus register and ignore any non-error bits */
2292 R_REG(®s->intctrlregs[idx].intstatus) & I_ERRORS;
2296 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2297 unit, idx, intstatus);
2299 if (intstatus & I_RO) {
2300 wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2301 "overflow\n", unit, idx);
2305 if (intstatus & I_PC) {
2306 wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2311 if (intstatus & I_PD) {
2312 wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2317 if (intstatus & I_DE) {
2318 wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2319 "error\n", unit, idx);
2323 if (intstatus & I_RU)
2324 wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2325 "underflow\n", idx, unit);
2327 if (intstatus & I_XU) {
2328 wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2329 "underflow\n", idx, unit);
2334 brcms_fatal_error(wlc_hw->wlc->wl); /* big hammer */
2337 W_REG(®s->intctrlregs[idx].intstatus,
2342 void brcms_c_intrson(struct brcms_c_info *wlc)
2344 struct brcms_hardware *wlc_hw = wlc->hw;
2345 wlc->macintmask = wlc->defmacintmask;
2346 W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2350 * callback for siutils.c, which has only wlc handler, no wl they both check
2351 * up, not only because there is no need to off/restore d11 interrupt but also
2352 * because per-port code may require sync with valid interrupt.
2354 static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc)
2359 return brcms_intrsoff(wlc->wl);
2362 static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2367 brcms_intrsrestore(wlc->wl, macintmask);
2370 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2372 struct brcms_hardware *wlc_hw = wlc->hw;
2378 macintmask = wlc->macintmask; /* isr can still happen */
2380 W_REG(&wlc_hw->regs->macintmask, 0);
2381 (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */
2382 udelay(1); /* ensure int line is no longer driven */
2383 wlc->macintmask = 0;
2385 /* return previous macintmask; resolve race between us and our isr */
2386 return wlc->macintstatus ? 0 : macintmask;
2389 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2391 struct brcms_hardware *wlc_hw = wlc->hw;
2395 wlc->macintmask = macintmask;
2396 W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2399 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2402 u8 fifo = 1 << tx_fifo;
2404 /* Two clients of this code, 11h Quiet period and scanning. */
2406 /* only suspend if not already suspended */
2407 if ((wlc_hw->suspended_fifos & fifo) == fifo)
2410 /* force the core awake only if not already */
2411 if (wlc_hw->suspended_fifos == 0)
2412 brcms_c_ucode_wake_override_set(wlc_hw,
2413 BRCMS_WAKE_OVERRIDE_TXFIFO);
2415 wlc_hw->suspended_fifos |= fifo;
2417 if (wlc_hw->di[tx_fifo]) {
2419 * Suspending AMPDU transmissions in the middle can cause
2420 * underflow which may result in mismatch between ucode and
2421 * driver so suspend the mac before suspending the FIFO
2423 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2424 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2426 dma_txsuspend(wlc_hw->di[tx_fifo]);
2428 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2429 brcms_c_enable_mac(wlc_hw->wlc);
2433 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2436 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2437 * but need to be done here for PIO otherwise the watchdog will catch
2438 * the inconsistency and fire
2440 /* Two clients of this code, 11h Quiet period and scanning. */
2441 if (wlc_hw->di[tx_fifo])
2442 dma_txresume(wlc_hw->di[tx_fifo]);
2444 /* allow core to sleep again */
2445 if (wlc_hw->suspended_fifos == 0)
2448 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2449 if (wlc_hw->suspended_fifos == 0)
2450 brcms_c_ucode_wake_override_clear(wlc_hw,
2451 BRCMS_WAKE_OVERRIDE_TXFIFO);
2455 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, u32 flags)
2457 static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2460 /* suspend tx fifos */
2461 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2462 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2463 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2464 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2466 /* zero the address match register so we do not send ACKs */
2467 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2470 /* resume tx fifos */
2471 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2472 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2473 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2474 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2476 /* Restore address */
2477 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2481 wlc_phy_mute_upd(wlc_hw->band->pi, on, flags);
2484 brcms_c_ucode_mute_override_set(wlc_hw);
2486 brcms_c_ucode_mute_override_clear(wlc_hw);
2490 * Read and clear macintmask and macintstatus and intstatus registers.
2491 * This routine should be called with interrupts off
2493 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2494 * 0 if the interrupt is not for us, or we are in some special cases;
2495 * device interrupt status bits otherwise.
2497 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2499 struct brcms_hardware *wlc_hw = wlc->hw;
2500 struct d11regs __iomem *regs = wlc_hw->regs;
2503 /* macintstatus includes a DMA interrupt summary bit */
2504 macintstatus = R_REG(®s->macintstatus);
2506 BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2509 /* detect cardbus removed, in power down(suspend) and in reset */
2510 if (brcms_deviceremoved(wlc))
2513 /* brcms_deviceremoved() succeeds even when the core is still resetting,
2514 * handle that case here.
2516 if (macintstatus == 0xffffffff)
2519 /* defer unsolicited interrupts */
2520 macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2523 if (macintstatus == 0)
2526 /* interrupts are already turned off for CFE build
2527 * Caution: For CFE Turning off the interrupts again has some undesired
2530 /* turn off the interrupts */
2531 W_REG(®s->macintmask, 0);
2532 (void)R_REG(®s->macintmask); /* sync readback */
2533 wlc->macintmask = 0;
2535 /* clear device interrupts */
2536 W_REG(®s->macintstatus, macintstatus);
2538 /* MI_DMAINT is indication of non-zero intstatus */
2539 if (macintstatus & MI_DMAINT)
2541 * only fifo interrupt enabled is I_RI in
2542 * RX_FIFO. If MI_DMAINT is set, assume it
2543 * is set and clear the interrupt.
2545 W_REG(®s->intctrlregs[RX_FIFO].intstatus,
2548 return macintstatus;
2551 /* Update wlc->macintstatus and wlc->intstatus[]. */
2552 /* Return true if they are updated successfully. false otherwise */
2553 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2557 /* read and clear macintstatus and intstatus registers */
2558 macintstatus = wlc_intstatus(wlc, false);
2560 /* device is removed */
2561 if (macintstatus == 0xffffffff)
2564 /* update interrupt status in software */
2565 wlc->macintstatus |= macintstatus;
2571 * First-level interrupt processing.
2572 * Return true if this was our interrupt, false otherwise.
2573 * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2576 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2578 struct brcms_hardware *wlc_hw = wlc->hw;
2583 if (!wlc_hw->up || !wlc->macintmask)
2586 /* read and clear macintstatus and intstatus registers */
2587 macintstatus = wlc_intstatus(wlc, true);
2589 if (macintstatus == 0xffffffff)
2590 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2593 /* it is not for us */
2594 if (macintstatus == 0)
2599 /* save interrupt status bits */
2600 wlc->macintstatus = macintstatus;
2606 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2608 struct brcms_hardware *wlc_hw = wlc->hw;
2609 struct d11regs __iomem *regs = wlc_hw->regs;
2611 struct wiphy *wiphy = wlc->wiphy;
2613 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2614 wlc_hw->band->bandunit);
2617 * Track overlapping suspend requests
2619 wlc_hw->mac_suspend_depth++;
2620 if (wlc_hw->mac_suspend_depth > 1)
2623 /* force the core awake */
2624 brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2626 mc = R_REG(®s->maccontrol);
2628 if (mc == 0xffffffff) {
2629 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2631 brcms_down(wlc->wl);
2634 WARN_ON(mc & MCTL_PSM_JMP_0);
2635 WARN_ON(!(mc & MCTL_PSM_RUN));
2636 WARN_ON(!(mc & MCTL_EN_MAC));
2638 mi = R_REG(®s->macintstatus);
2639 if (mi == 0xffffffff) {
2640 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2642 brcms_down(wlc->wl);
2645 WARN_ON(mi & MI_MACSSPNDD);
2647 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2649 SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD),
2650 BRCMS_MAX_MAC_SUSPEND);
2652 if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) {
2653 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2654 " and MI_MACSSPNDD is still not on.\n",
2655 wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2656 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2657 "psm_brc 0x%04x\n", wlc_hw->unit,
2658 R_REG(®s->psmdebug),
2659 R_REG(®s->phydebug),
2660 R_REG(®s->psm_brc));
2663 mc = R_REG(®s->maccontrol);
2664 if (mc == 0xffffffff) {
2665 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2667 brcms_down(wlc->wl);
2670 WARN_ON(mc & MCTL_PSM_JMP_0);
2671 WARN_ON(!(mc & MCTL_PSM_RUN));
2672 WARN_ON(mc & MCTL_EN_MAC);
2675 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2677 struct brcms_hardware *wlc_hw = wlc->hw;
2678 struct d11regs __iomem *regs = wlc_hw->regs;
2681 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2682 wlc->band->bandunit);
2685 * Track overlapping suspend requests
2687 wlc_hw->mac_suspend_depth--;
2688 if (wlc_hw->mac_suspend_depth > 0)
2691 mc = R_REG(®s->maccontrol);
2692 WARN_ON(mc & MCTL_PSM_JMP_0);
2693 WARN_ON(mc & MCTL_EN_MAC);
2694 WARN_ON(!(mc & MCTL_PSM_RUN));
2696 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2697 W_REG(®s->macintstatus, MI_MACSSPNDD);
2699 mc = R_REG(®s->maccontrol);
2700 WARN_ON(mc & MCTL_PSM_JMP_0);
2701 WARN_ON(!(mc & MCTL_EN_MAC));
2702 WARN_ON(!(mc & MCTL_PSM_RUN));
2704 mi = R_REG(®s->macintstatus);
2705 WARN_ON(mi & MI_MACSSPNDD);
2707 brcms_c_ucode_wake_override_clear(wlc_hw,
2708 BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2711 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2713 wlc_hw->hw_stf_ss_opmode = stf_mode;
2716 brcms_upd_ofdm_pctl1_table(wlc_hw);
2719 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2721 struct d11regs __iomem *regs;
2723 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2725 BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2727 regs = wlc_hw->regs;
2729 /* Validate dchip register access */
2731 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2732 (void)R_REG(®s->objaddr);
2733 w = R_REG(®s->objdata);
2735 /* Can we write and read back a 32bit register? */
2736 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2737 (void)R_REG(®s->objaddr);
2738 W_REG(®s->objdata, (u32) 0xaa5555aa);
2740 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2741 (void)R_REG(®s->objaddr);
2742 val = R_REG(®s->objdata);
2743 if (val != (u32) 0xaa5555aa) {
2744 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2745 "expected 0xaa5555aa\n", wlc_hw->unit, val);
2749 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2750 (void)R_REG(®s->objaddr);
2751 W_REG(®s->objdata, (u32) 0x55aaaa55);
2753 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2754 (void)R_REG(®s->objaddr);
2755 val = R_REG(®s->objdata);
2756 if (val != (u32) 0x55aaaa55) {
2757 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2758 "expected 0x55aaaa55\n", wlc_hw->unit, val);
2762 W_REG(®s->objaddr, OBJADDR_SHM_SEL | 0);
2763 (void)R_REG(®s->objaddr);
2764 W_REG(®s->objdata, w);
2766 /* clear CFPStart */
2767 W_REG(®s->tsf_cfpstart, 0);
2769 w = R_REG(®s->maccontrol);
2770 if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2771 (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2772 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2773 "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2774 (MCTL_IHR_EN | MCTL_WAKE),
2775 (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2782 #define PHYPLL_WAIT_US 100000
2784 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2786 struct d11regs __iomem *regs;
2789 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2792 regs = wlc_hw->regs;
2795 if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
2796 OR_REG(®s->clk_ctl_st,
2797 (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL |
2798 CCS_ERSRC_REQ_PHYPLL));
2799 SPINWAIT((R_REG(®s->clk_ctl_st) &
2800 (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT),
2803 tmp = R_REG(®s->clk_ctl_st);
2804 if ((tmp & (CCS_ERSRC_AVAIL_HT)) !=
2805 (CCS_ERSRC_AVAIL_HT))
2806 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2807 " PLL failed\n", __func__);
2809 OR_REG(®s->clk_ctl_st,
2810 (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL));
2811 SPINWAIT((R_REG(®s->clk_ctl_st) &
2812 (CCS_ERSRC_AVAIL_D11PLL |
2813 CCS_ERSRC_AVAIL_PHYPLL)) !=
2814 (CCS_ERSRC_AVAIL_D11PLL |
2815 CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2817 tmp = R_REG(®s->clk_ctl_st);
2819 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2821 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2822 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2823 "PHY PLL failed\n", __func__);
2827 * Since the PLL may be shared, other cores can still
2828 * be requesting it; so we'll deassert the request but
2829 * not wait for status to comply.
2831 AND_REG(®s->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL);
2832 tmp = R_REG(®s->clk_ctl_st);
2836 static void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2840 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2842 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2847 if (wlc_hw->noreset)
2851 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2853 /* turn off analog core */
2854 wlc_phy_anacore(wlc_hw->band->pi, OFF);
2856 /* turn off PHYPLL to save power */
2857 brcms_b_core_phypll_ctl(wlc_hw, false);
2859 wlc_hw->clk = false;
2860 ai_core_disable(wlc_hw->sih, 0);
2861 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2864 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2866 struct brcms_hardware *wlc_hw = wlc->hw;
2869 /* free any posted tx packets */
2870 for (i = 0; i < NFIFO; i++)
2871 if (wlc_hw->di[i]) {
2872 dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2873 wlc->core->txpktpend[i] = 0;
2874 BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
2877 /* free any posted rx packets */
2878 dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2882 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
2884 struct d11regs __iomem *regs = wlc_hw->regs;
2885 u16 __iomem *objdata_lo = (u16 __iomem *)®s->objdata;
2886 u16 __iomem *objdata_hi = objdata_lo + 1;
2889 W_REG(®s->objaddr, sel | (offset >> 2));
2890 (void)R_REG(®s->objaddr);
2892 v = R_REG(objdata_hi);
2894 v = R_REG(objdata_lo);
2900 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
2903 struct d11regs __iomem *regs = wlc_hw->regs;
2904 u16 __iomem *objdata_lo = (u16 __iomem *)®s->objdata;
2905 u16 __iomem *objdata_hi = objdata_lo + 1;
2907 W_REG(®s->objaddr, sel | (offset >> 2));
2908 (void)R_REG(®s->objaddr);
2910 W_REG(objdata_hi, v);
2912 W_REG(objdata_lo, v);
2916 * Read a single u16 from shared memory.
2917 * SHM 'offset' needs to be an even address
2919 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
2921 return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
2925 * Write a single u16 to shared memory.
2926 * SHM 'offset' needs to be an even address
2928 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
2930 brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
2934 * Copy a buffer to shared memory of specified type .
2935 * SHM 'offset' needs to be an even address and
2936 * Buffer length 'len' must be an even number of bytes
2937 * 'sel' selects the type of memory
2940 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
2941 const void *buf, int len, u32 sel)
2944 const u8 *p = (const u8 *)buf;
2947 if (len <= 0 || (offset & 1) || (len & 1))
2950 for (i = 0; i < len; i += 2) {
2951 v = p[i] | (p[i + 1] << 8);
2952 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
2957 * Copy a piece of shared memory of specified type to a buffer .
2958 * SHM 'offset' needs to be an even address and
2959 * Buffer length 'len' must be an even number of bytes
2960 * 'sel' selects the type of memory
2963 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
2970 if (len <= 0 || (offset & 1) || (len & 1))
2973 for (i = 0; i < len; i += 2) {
2974 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
2976 p[i + 1] = (v >> 8) & 0xFF;
2980 /* Copy a buffer to shared memory.
2981 * SHM 'offset' needs to be an even address and
2982 * Buffer length 'len' must be an even number of bytes
2984 static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset,
2985 const void *buf, int len)
2987 brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
2990 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
2996 /* write retry limit to SCR, shouldn't need to suspend */
2998 W_REG(&wlc_hw->regs->objaddr,
2999 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3000 (void)R_REG(&wlc_hw->regs->objaddr);
3001 W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL);
3002 W_REG(&wlc_hw->regs->objaddr,
3003 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3004 (void)R_REG(&wlc_hw->regs->objaddr);
3005 W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL);
3009 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3012 if (mboolisset(wlc_hw->pllreq, req_bit))
3015 mboolset(wlc_hw->pllreq, req_bit);
3017 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3019 brcms_b_xtal(wlc_hw, ON);
3022 if (!mboolisset(wlc_hw->pllreq, req_bit))
3025 mboolclr(wlc_hw->pllreq, req_bit);
3027 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3029 brcms_b_xtal(wlc_hw, OFF);
3034 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3036 wlc_hw->antsel_avail = antsel_avail;
3040 * conditions under which the PM bit should be set in outgoing frames
3041 * and STAY_AWAKE is meaningful
3043 static bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3045 struct brcms_bss_cfg *cfg = wlc->bsscfg;
3047 /* disallow PS when one of the following global conditions meets */
3048 if (!wlc->pub->associated)
3051 /* disallow PS when one of these meets when not scanning */
3055 if (cfg->associated) {
3057 * disallow PS when one of the following
3058 * bsscfg specific conditions meets
3069 static void brcms_c_statsupd(struct brcms_c_info *wlc)
3072 struct macstat macstats;
3079 /* if driver down, make no sense to update stats */
3084 /* save last rx fifo 0 overflow count */
3085 rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
3087 /* save last tx fifo underflow count */
3088 for (i = 0; i < NFIFO; i++)
3089 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
3092 /* Read mac stats from contiguous shared memory */
3093 brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
3094 sizeof(struct macstat), OBJADDR_SHM_SEL);
3097 /* check for rx fifo 0 overflow */
3098 delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
3100 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
3101 wlc->pub->unit, delta);
3103 /* check for tx fifo underflows */
3104 for (i = 0; i < NFIFO; i++) {
3106 (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
3109 wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
3110 "\n", wlc->pub->unit, delta, i);
3114 /* merge counters from dma module */
3115 for (i = 0; i < NFIFO; i++) {
3117 dma_counterreset(wlc->hw->di[i]);
3121 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3123 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3125 /* reset the core */
3126 if (!brcms_deviceremoved(wlc_hw->wlc))
3127 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3129 /* purge the dma rings */
3130 brcms_c_flushqueues(wlc_hw->wlc);
3133 void brcms_c_reset(struct brcms_c_info *wlc)
3135 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3137 /* slurp up hw mac counters before core reset */
3138 brcms_c_statsupd(wlc);
3140 /* reset our snapshot of macstat counters */
3141 memset((char *)wlc->core->macstat_snapshot, 0,
3142 sizeof(struct macstat));
3144 brcms_b_reset(wlc->hw);
3147 /* Return the channel the driver should initialize during brcms_c_init.
3148 * the channel may have to be changed from the currently configured channel
3149 * if other configurations are in conflict (bandlocked, 11n mode disabled,
3150 * invalid channel for current country, etc.)
3152 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3155 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3156 WL_CHANSPEC_BAND_2G;
3161 void brcms_c_init_scb(struct scb *scb)
3165 memset(scb, 0, sizeof(struct scb));
3166 scb->flags = SCB_WMECAP | SCB_HTCAP;
3167 for (i = 0; i < NUMPRIO; i++) {
3169 scb->seqctl[i] = 0xFFFF;
3172 scb->seqctl_nonqos = 0xFFFF;
3173 scb->magic = SCB_MAGIC;
3178 * download ucode/PCM
3179 * let ucode run to suspended
3180 * download ucode inits
3181 * config other core registers
3184 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3186 struct brcms_hardware *wlc_hw = wlc->hw;
3187 struct d11regs __iomem *regs;
3191 bool fifosz_fixup = false;
3194 struct wiphy *wiphy = wlc->wiphy;
3195 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3197 regs = wlc_hw->regs;
3199 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3202 brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3204 brcms_ucode_download(wlc_hw);
3206 * FIFOSZ fixup. driver wants to controls the fifo allocation.
3208 fifosz_fixup = true;
3210 /* let the PSM run to the suspended state, set mode to BSS STA */
3211 W_REG(®s->macintstatus, -1);
3212 brcms_b_mctrl(wlc_hw, ~0,
3213 (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3215 /* wait for ucode to self-suspend after auto-init */
3216 SPINWAIT(((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0),
3218 if ((R_REG(®s->macintstatus) & MI_MACSSPNDD) == 0)
3219 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3220 "suspend!\n", wlc_hw->unit);
3222 brcms_c_gpio_init(wlc);
3224 sflags = ai_core_sflags(wlc_hw->sih, 0, 0);
3226 if (D11REV_IS(wlc_hw->corerev, 23)) {
3227 if (BRCMS_ISNPHY(wlc_hw->band))
3228 brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3230 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3231 " %d\n", __func__, wlc_hw->unit,
3233 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3234 if (BRCMS_ISLCNPHY(wlc_hw->band))
3235 brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3237 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3238 " %d\n", __func__, wlc_hw->unit,
3241 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3242 __func__, wlc_hw->unit, wlc_hw->corerev);
3245 /* For old ucode, txfifo sizes needs to be modified(increased) */
3246 if (fifosz_fixup == true)
3247 brcms_b_corerev_fifofixup(wlc_hw);
3249 /* check txfifo allocations match between ucode and driver */
3250 buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3251 if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3255 buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3256 if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3260 buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3261 buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3262 buf[TX_AC_BK_FIFO] &= 0xff;
3263 if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3267 if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3271 buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3272 buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3273 buf[TX_BCMC_FIFO] &= 0xff;
3274 if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3278 if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3283 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3284 " driver size %d index %d\n", buf[i],
3285 wlc_hw->xmtfifo_sz[i], i);
3287 /* make sure we can still talk to the mac */
3288 WARN_ON(R_REG(®s->maccontrol) == 0xffffffff);
3290 /* band-specific inits done by wlc_bsinit() */
3292 /* Set up frame burst size and antenna swap threshold init values */
3293 brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3294 brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3296 /* enable one rx interrupt per received frame */
3297 W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT));
3299 /* set the station mode (BSS STA) */
3300 brcms_b_mctrl(wlc_hw,
3301 (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3302 (MCTL_INFRA | MCTL_DISCARD_PMQ));
3304 /* set up Beacon interval */
3305 bcnint_us = 0x8000 << 10;
3306 W_REG(®s->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT));
3307 W_REG(®s->tsf_cfpstart, bcnint_us);
3308 W_REG(®s->macintstatus, MI_GP1);
3310 /* write interrupt mask */
3311 W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK);
3313 /* allow the MAC to control the PHY clock (dynamic on/off) */
3314 brcms_b_macphyclk_set(wlc_hw, ON);
3316 /* program dynamic clock control fast powerup delay register */
3317 wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3318 W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly);
3320 /* tell the ucode the corerev */
3321 brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3323 /* tell the ucode MAC capabilities */
3324 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3325 (u16) (wlc_hw->machwcap & 0xffff));
3326 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3328 machwcap >> 16) & 0xffff));
3330 /* write retry limits to SCR, this done after PSM init */
3331 W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3332 (void)R_REG(®s->objaddr);
3333 W_REG(®s->objdata, wlc_hw->SRL);
3334 W_REG(®s->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3335 (void)R_REG(®s->objaddr);
3336 W_REG(®s->objdata, wlc_hw->LRL);
3338 /* write rate fallback retry limits */
3339 brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3340 brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3342 AND_REG(®s->ifs_ctl, 0x0FFF);
3343 W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN);
3345 /* init the tx dma engines */
3346 for (i = 0; i < NFIFO; i++) {
3348 dma_txinit(wlc_hw->di[i]);
3351 /* init the rx dma engine(s) and post receive buffers */
3352 dma_rxinit(wlc_hw->di[RX_FIFO]);
3353 dma_rxfill(wlc_hw->di[RX_FIFO]);
3357 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec,
3361 struct brcms_c_info *wlc = wlc_hw->wlc;
3363 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3365 /* request FAST clock if not on */
3366 fastclk = wlc_hw->forcefastclk;
3368 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3370 /* disable interrupts */
3371 macintmask = brcms_intrsoff(wlc->wl);
3373 /* set up the specified band and chanspec */
3374 brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3375 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3377 /* do one-time phy inits and calibration */
3378 wlc_phy_cal_init(wlc_hw->band->pi);
3380 /* core-specific initialization */
3381 brcms_b_coreinit(wlc);
3383 /* suspend the tx fifos and mute the phy for preism cac time */
3385 brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM);
3387 /* band-specific inits */
3388 brcms_b_bsinit(wlc, chanspec);
3390 /* restore macintmask */
3391 brcms_intrsrestore(wlc->wl, macintmask);
3393 /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3394 * is suspended and brcms_c_enable_mac() will clear this override bit.
3396 mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3399 * initialize mac_suspend_depth to 1 to match ucode
3400 * initial suspended state
3402 wlc_hw->mac_suspend_depth = 1;
3404 /* restore the clk */
3406 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3409 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3412 /* Save our copy of the chanspec */
3413 wlc->chanspec = chanspec;
3415 /* Set the chanspec and power limits for this locale */
3416 brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3418 if (wlc->stf->ss_algosel_auto)
3419 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3422 brcms_c_stf_ss_update(wlc, wlc->band);
3426 brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
3428 brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3429 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3430 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3431 brcms_chspec_bw(wlc->default_bss->chanspec),
3432 wlc->stf->txstreams);
3435 /* derive wlc->band->basic_rate[] table from 'rateset' */
3436 static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
3437 struct brcms_c_rateset *rateset)
3443 u8 *br = wlc->band->basic_rate;
3446 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3447 memset(br, 0, BRCM_MAXRATE + 1);
3449 /* For each basic rate in the rates list, make an entry in the
3450 * best basic lookup.
3452 for (i = 0; i < rateset->count; i++) {
3453 /* only make an entry for a basic rate */
3454 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3457 /* mask off basic bit */
3458 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3460 if (rate > BRCM_MAXRATE) {
3461 wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
3462 "invalid rate 0x%X in rate set\n",
3470 /* The rate lookup table now has non-zero entries for each
3471 * basic rate, equal to the basic rate: br[basicN] = basicN
3473 * To look up the best basic rate corresponding to any
3474 * particular rate, code can use the basic_rate table
3477 * basic_rate = wlc->band->basic_rate[tx_rate]
3479 * Make sure there is a best basic rate entry for
3480 * every rate by walking up the table from low rates
3481 * to high, filling in holes in the lookup table
3484 for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3485 rate = wlc->band->hw_rateset.rates[i];
3487 if (br[rate] != 0) {
3488 /* This rate is a basic rate.
3489 * Keep track of the best basic rate so far by
3492 if (is_ofdm_rate(rate))
3500 /* This rate is not a basic rate so figure out the
3501 * best basic rate less than this rate and fill in
3502 * the hole in the table
3505 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
3510 if (is_ofdm_rate(rate)) {
3512 * In 11g and 11a, the OFDM mandatory rates
3513 * are 6, 12, and 24 Mbps
3515 if (rate >= BRCM_RATE_24M)
3516 mandatory = BRCM_RATE_24M;
3517 else if (rate >= BRCM_RATE_12M)
3518 mandatory = BRCM_RATE_12M;
3520 mandatory = BRCM_RATE_6M;
3522 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3526 br[rate] = mandatory;
3530 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3533 struct brcms_c_rateset default_rateset;
3535 uint i, band_order[2];
3537 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3539 * We might have been bandlocked during down and the chip
3540 * power-cycled (hibernate). Figure out the right band to park on
3542 if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3543 /* updated in brcms_c_bandlock() */
3544 parkband = wlc->band->bandunit;
3545 band_order[0] = band_order[1] = parkband;
3547 /* park on the band of the specified chanspec */
3548 parkband = chspec_bandunit(chanspec);
3550 /* order so that parkband initialize last */
3551 band_order[0] = parkband ^ 1;
3552 band_order[1] = parkband;
3555 /* make each band operational, software state init */
3556 for (i = 0; i < wlc->pub->_nbands; i++) {
3557 uint j = band_order[i];
3559 wlc->band = wlc->bandstate[j];
3561 brcms_default_rateset(wlc, &default_rateset);
3563 /* fill in hw_rate */
3564 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3565 false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3566 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3568 /* init basic rate lookup */
3569 brcms_c_rate_lookup_init(wlc, &default_rateset);
3572 /* sync up phy/radio chanspec */
3573 brcms_c_set_phy_chanspec(wlc, chanspec);
3576 static void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc)
3578 if (wlc->bcnmisc_monitor)
3579 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC);
3581 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, 0);
3584 void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc)
3586 wlc->bcnmisc_monitor = promisc;
3587 brcms_c_mac_bcn_promisc(wlc);
3590 /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */
3591 static void brcms_c_mac_promisc(struct brcms_c_info *wlc)
3593 u32 promisc_bits = 0;
3596 * promiscuous mode just sets MCTL_PROMISC
3597 * Note: APs get all BSS traffic without the need to set
3598 * the MCTL_PROMISC bit since all BSS data traffic is
3599 * directed at the AP
3601 if (wlc->pub->promisc)
3602 promisc_bits |= MCTL_PROMISC;
3604 /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
3605 * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is
3606 * handled in brcms_c_mac_bcn_promisc()
3609 promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL;
3611 brcms_b_mctrl(wlc->hw, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits);
3615 * ucode, hwmac update
3616 * Channel dependent updates for ucode and hw
3618 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3620 /* enable or disable any active IBSSs depending on whether or not
3621 * we are on the home channel
3623 if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3624 if (wlc->pub->associated) {
3626 * BMAC_NOTE: This is something that should be fixed
3627 * in ucode inits. I think that the ucode inits set
3628 * up the bcn templates and shm values with a bogus
3629 * beacon. This should not be done in the inits. If
3630 * ucode needs to set up a beacon for testing, the
3631 * test routines should write it down, not expect the
3632 * inits to populate a bogus beacon.
3634 if (BRCMS_PHY_11N_CAP(wlc->band))
3635 brcms_b_write_shm(wlc->hw,
3636 M_BCN_TXTSF_OFFSET, 0);
3639 /* disable an active IBSS if we are not on the home channel */
3642 /* update the various promisc bits */
3643 brcms_c_mac_bcn_promisc(wlc);
3644 brcms_c_mac_promisc(wlc);
3647 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
3651 u8 basic_phy_rate, basic_index;
3652 u16 dir_table, basic_table;
3655 /* Shared memory address for the table we are reading */
3656 dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
3658 /* Shared memory address for the table we are writing */
3659 basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
3662 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3663 * the index into the rate table.
3665 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
3666 basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
3667 index = phy_rate & 0xf;
3668 basic_index = basic_phy_rate & 0xf;
3670 /* Find the SHM pointer to the ACK rate entry by looking in the
3673 basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3675 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3676 * to the correct basic rate for the given incoming rate
3678 brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3681 static const struct brcms_c_rateset *
3682 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
3684 const struct brcms_c_rateset *rs_dflt;
3686 if (BRCMS_PHY_11N_CAP(wlc->band)) {
3687 if (wlc->band->bandtype == BRCM_BAND_5G)
3688 rs_dflt = &ofdm_mimo_rates;
3690 rs_dflt = &cck_ofdm_mimo_rates;
3691 } else if (wlc->band->gmode)
3692 rs_dflt = &cck_ofdm_rates;
3694 rs_dflt = &cck_rates;
3699 static void brcms_c_set_ratetable(struct brcms_c_info *wlc)
3701 const struct brcms_c_rateset *rs_dflt;
3702 struct brcms_c_rateset rs;
3703 u8 rate, basic_rate;
3706 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
3708 brcms_c_rateset_copy(rs_dflt, &rs);
3709 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3711 /* walk the phy rate table and update SHM basic rate lookup table */
3712 for (i = 0; i < rs.count; i++) {
3713 rate = rs.rates[i] & BRCMS_RATE_MASK;
3715 /* for a given rate brcms_basic_rate returns the rate at
3716 * which a response ACK/CTS should be sent.
3718 basic_rate = brcms_basic_rate(wlc, rate);
3719 if (basic_rate == 0)
3720 /* This should only happen if we are using a
3721 * restricted rateset.
3723 basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
3725 brcms_c_write_rate_shm(wlc, rate, basic_rate);
3729 /* band-specific init */
3730 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3732 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3733 wlc->pub->unit, wlc->band->bandunit);
3735 /* write ucode ACK/CTS rate table */
3736 brcms_c_set_ratetable(wlc);
3738 /* update some band specific mac configuration */
3739 brcms_c_ucode_mac_upd(wlc);
3741 /* init antenna selection */
3742 brcms_c_antsel_init(wlc->asi);
3746 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3748 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3751 int idle_busy_ratio_x_16 = 0;
3753 isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3754 M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3755 if (duty_cycle > 100 || duty_cycle < 0) {
3756 wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n",
3761 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3762 /* Only write to shared memory when wl is up */
3764 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3767 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3769 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3775 * Initialize the base precedence map for dequeueing
3776 * from txq based on WME settings
3778 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3780 wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3781 memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3783 wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3784 wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3785 wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3786 wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3790 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3791 struct brcms_txq_info *qi, bool on, int prio)
3793 /* transmit flowcontrol is not yet implemented */
3796 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3798 struct brcms_txq_info *qi;
3800 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3802 brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3808 /* push sw hps and wake state through hardware */
3809 static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3815 hps = brcms_c_ps_allowed(wlc);
3817 BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3819 v1 = R_REG(&wlc->regs->maccontrol);
3824 brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3826 awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3829 brcms_b_wait_for_wake(wlc->hw);
3833 * Write this BSS config's MAC address to core.
3834 * Updates RXE match engine.
3836 static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3839 struct brcms_c_info *wlc = bsscfg->wlc;
3841 /* enter the MAC addr into the RXE match registers */
3842 brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3844 brcms_c_ampdu_macaddr_upd(wlc);
3849 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3850 * Updates RXE match engine.
3852 static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3854 /* we need to update BSSID in RXE match registers */
3855 brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3858 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3860 wlc_hw->shortslot = shortslot;
3862 if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3863 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3864 brcms_b_update_slot_timing(wlc_hw, shortslot);
3865 brcms_c_enable_mac(wlc_hw->wlc);
3870 * Suspend the the MAC and update the slot timing
3871 * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3873 static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3875 /* use the override if it is set */
3876 if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3877 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3879 if (wlc->shortslot == shortslot)
3882 wlc->shortslot = shortslot;
3884 brcms_b_set_shortslot(wlc->hw, shortslot);
3887 static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3889 if (wlc->home_chanspec != chanspec) {
3890 wlc->home_chanspec = chanspec;
3892 if (wlc->bsscfg->associated)
3893 wlc->bsscfg->current_bss->chanspec = chanspec;
3898 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3899 bool mute, struct txpwr_limits *txpwr)
3903 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3905 wlc_hw->chanspec = chanspec;
3907 /* Switch bands if necessary */
3908 if (wlc_hw->_nbands > 1) {
3909 bandunit = chspec_bandunit(chanspec);
3910 if (wlc_hw->band->bandunit != bandunit) {
3911 /* brcms_b_setband disables other bandunit,
3912 * use light band switch if not up yet
3915 wlc_phy_chanspec_radio_set(wlc_hw->
3916 bandstate[bandunit]->
3918 brcms_b_setband(wlc_hw, bandunit, chanspec);
3920 brcms_c_setxband(wlc_hw, bandunit);
3925 wlc_phy_initcal_enable(wlc_hw->band->pi, !mute);
3929 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3931 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3933 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3934 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3936 /* Update muting of the channel */
3937 brcms_b_mute(wlc_hw, mute, 0);
3941 /* switch to and initialize new band */
3942 static void brcms_c_setband(struct brcms_c_info *wlc,
3945 wlc->band = wlc->bandstate[bandunit];
3950 /* wait for at least one beacon before entering sleeping state */
3951 brcms_c_set_ps_ctrl(wlc);
3953 /* band-specific initializations */
3954 brcms_c_bsinit(wlc);
3957 static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3960 bool switchband = false;
3961 u16 old_chanspec = wlc->chanspec;
3963 if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3964 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3965 wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3969 /* Switch bands if necessary */
3970 if (wlc->pub->_nbands > 1) {
3971 bandunit = chspec_bandunit(chanspec);
3972 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3974 if (wlc->bandlocked) {
3975 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3976 "band is locked!\n",
3977 wlc->pub->unit, __func__,
3978 CHSPEC_CHANNEL(chanspec));
3982 * should the setband call come after the
3983 * brcms_b_chanspec() ? if the setband updates
3984 * (brcms_c_bsinit) use low level calls to inspect and
3985 * set state, the state inspected may be from the wrong
3986 * band, or the following brcms_b_set_chanspec() may
3989 brcms_c_setband(wlc, bandunit);
3993 /* sync up phy/radio chanspec */
3994 brcms_c_set_phy_chanspec(wlc, chanspec);
3996 /* init antenna selection */
3997 if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
3998 brcms_c_antsel_init(wlc->asi);
4000 /* Fix the hardware rateset based on bw.
4001 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
4003 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
4004 wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
4007 /* update some mac configuration since chanspec changed */
4008 brcms_c_ucode_mac_upd(wlc);
4012 * This function changes the phytxctl for beacon based on current
4013 * beacon ratespec AND txant setting as per this table:
4014 * ratespec CCK ant = wlc->stf->txant
4017 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4021 u16 phytxant = wlc->stf->phytxant;
4022 u16 mask = PHY_TXC_ANT_MASK;
4024 /* for non-siso rates or default setting, use the available chains */
4025 if (BRCMS_PHY_11N_CAP(wlc->band))
4026 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4028 phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4029 phyctl = (phyctl & ~mask) | phytxant;
4030 brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4034 * centralized protection config change function to simplify debugging, no
4035 * consistency checking this should be called only on changes to avoid overhead
4036 * in periodic function
4038 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4040 BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4043 case BRCMS_PROT_G_SPEC:
4044 wlc->protection->_g = (bool) val;
4046 case BRCMS_PROT_G_OVR:
4047 wlc->protection->g_override = (s8) val;
4049 case BRCMS_PROT_G_USER:
4050 wlc->protection->gmode_user = (u8) val;
4052 case BRCMS_PROT_OVERLAP:
4053 wlc->protection->overlap = (s8) val;
4055 case BRCMS_PROT_N_USER:
4056 wlc->protection->nmode_user = (s8) val;
4058 case BRCMS_PROT_N_CFG:
4059 wlc->protection->n_cfg = (s8) val;
4061 case BRCMS_PROT_N_CFG_OVR:
4062 wlc->protection->n_cfg_override = (s8) val;
4064 case BRCMS_PROT_N_NONGF:
4065 wlc->protection->nongf = (bool) val;
4067 case BRCMS_PROT_N_NONGF_OVR:
4068 wlc->protection->nongf_override = (s8) val;
4070 case BRCMS_PROT_N_PAM_OVR:
4071 wlc->protection->n_pam_override = (s8) val;
4073 case BRCMS_PROT_N_OBSS:
4074 wlc->protection->n_obss = (bool) val;
4083 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4086 brcms_c_update_beacon(wlc);
4087 brcms_c_update_probe_resp(wlc, true);
4091 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4093 wlc->stf->ldpc = val;
4096 brcms_c_update_beacon(wlc);
4097 brcms_c_update_probe_resp(wlc, true);
4098 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4102 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4103 const struct ieee80211_tx_queue_params *params,
4107 struct shm_acparams acp_shm;
4110 /* Only apply params if the core is out of reset and has clocks */
4112 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4117 memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4118 /* fill in shm ac params struct */
4119 acp_shm.txop = params->txop;
4120 /* convert from units of 32us to us for ucode */
4121 wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4122 EDCF_TXOP2USEC(acp_shm.txop);
4123 acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4125 if (aci == AC_VI && acp_shm.txop == 0
4126 && acp_shm.aifs < EDCF_AIFSN_MAX)
4129 if (acp_shm.aifs < EDCF_AIFSN_MIN
4130 || acp_shm.aifs > EDCF_AIFSN_MAX) {
4131 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4132 "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4134 acp_shm.cwmin = params->cw_min;
4135 acp_shm.cwmax = params->cw_max;
4136 acp_shm.cwcur = acp_shm.cwmin;
4138 R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur;
4139 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4140 /* Indicate the new params to the ucode */
4141 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4144 M_EDCF_STATUS_OFF));
4145 acp_shm.status |= WME_STATUS_NEWAC;
4147 /* Fill in shm acparam table */
4148 shm_entry = (u16 *) &acp_shm;
4149 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4150 brcms_b_write_shm(wlc->hw,
4152 wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4157 brcms_c_suspend_mac_and_wait(wlc);
4158 brcms_c_enable_mac(wlc);
4162 static void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4166 struct ieee80211_tx_queue_params txq_pars;
4167 static const struct edcf_acparam default_edcf_acparams[] = {
4168 {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4169 {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4170 {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4171 {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4172 }; /* ucode needs these parameters during its initialization */
4173 const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4175 for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) {
4176 /* find out which ac this set of params applies to */
4177 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4179 /* fill in shm ac params struct */
4180 txq_pars.txop = edcf_acp->TXOP;
4181 txq_pars.aifs = edcf_acp->ACI;
4183 /* CWmin = 2^(ECWmin) - 1 */
4184 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4185 /* CWmax = 2^(ECWmax) - 1 */
4186 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4187 >> EDCF_ECWMAX_SHIFT);
4188 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4192 brcms_c_suspend_mac_and_wait(wlc);
4193 brcms_c_enable_mac(wlc);
4197 /* maintain LED behavior in down state */
4198 static void brcms_c_down_led_upd(struct brcms_c_info *wlc)
4201 * maintain LEDs while in down state, turn on sbclk if
4202 * not available yet. Turn on sbclk if necessary
4204 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_FLIP);
4205 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_FLIP);
4208 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4210 /* Don't start the timer if HWRADIO feature is disabled */
4211 if (wlc->radio_monitor)
4214 wlc->radio_monitor = true;
4215 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4216 brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4219 static void brcms_c_radio_disable(struct brcms_c_info *wlc)
4221 if (!wlc->pub->up) {
4222 brcms_c_down_led_upd(wlc);
4226 brcms_c_radio_monitor_start(wlc);
4227 brcms_down(wlc->wl);
4230 static void brcms_c_radio_enable(struct brcms_c_info *wlc)
4235 if (brcms_deviceremoved(wlc))
4241 static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4243 if (!wlc->radio_monitor)
4246 wlc->radio_monitor = false;
4247 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4248 return brcms_del_timer(wlc->radio_timer);
4251 /* read hwdisable state and propagate to wlc flag */
4252 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4254 if (wlc->pub->hw_off)
4257 if (brcms_b_radio_read_hwdisabled(wlc->hw))
4258 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4260 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4264 * centralized radio disable/enable function,
4265 * invoke radio enable/disable after updating hwradio status
4267 static void brcms_c_radio_upd(struct brcms_c_info *wlc)
4269 if (wlc->pub->radio_disabled)
4270 brcms_c_radio_disable(wlc);
4272 brcms_c_radio_enable(wlc);
4275 /* update hwradio status and return it */
4276 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4278 brcms_c_radio_hwdisable_upd(wlc);
4280 return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4284 /* periodical query hw radio button while driver is "down" */
4285 static void brcms_c_radio_timer(void *arg)
4287 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4289 if (brcms_deviceremoved(wlc)) {
4290 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4292 brcms_down(wlc->wl);
4296 brcms_c_radio_hwdisable_upd(wlc);
4297 brcms_c_radio_upd(wlc);
4300 /* common low-level watchdog code */
4301 static void brcms_b_watchdog(void *arg)
4303 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4304 struct brcms_hardware *wlc_hw = wlc->hw;
4306 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4311 /* increment second count */
4314 /* Check for FIFO error interrupts */
4315 brcms_b_fifoerrors(wlc_hw);
4317 /* make sure RX dma has buffers */
4318 dma_rxfill(wlc->hw->di[RX_FIFO]);
4320 wlc_phy_watchdog(wlc_hw->band->pi);
4323 static void brcms_c_radio_mon_upd(struct brcms_c_info *wlc)
4326 * Stop the radio monitor when the radio is going down.
4328 if (!wlc->pub->radio_disabled)
4330 brcms_c_radio_upd(wlc);
4331 if (!wlc->pub->radio_disabled)
4332 brcms_c_radio_monitor_stop(wlc);
4335 /* common watchdog code */
4336 static void brcms_c_watchdog(void *arg)
4338 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4340 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4345 if (brcms_deviceremoved(wlc)) {
4346 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4348 brcms_down(wlc->wl);
4352 /* increment second count */
4355 brcms_c_radio_mon_upd(wlc);
4356 /* radio sync: sw/hw --> radio_disable/radio_enable */
4357 brcms_c_radio_hwdisable_upd(wlc);
4358 brcms_c_radio_upd(wlc);
4359 /* if radio is disable, driver may be down, quit here */
4360 if (wlc->pub->radio_disabled)
4363 brcms_b_watchdog(wlc);
4366 * occasionally sample mac stat counters to
4367 * detect 16-bit counter wrap
4369 if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4370 brcms_c_statsupd(wlc);
4372 if (BRCMS_ISNPHY(wlc->band) &&
4373 ((wlc->pub->now - wlc->tempsense_lasttime) >=
4374 BRCMS_TEMPSENSE_PERIOD)) {
4375 wlc->tempsense_lasttime = wlc->pub->now;
4376 brcms_c_tempsense_upd(wlc);
4380 static void brcms_c_watchdog_by_timer(void *arg)
4382 brcms_c_watchdog(arg);
4385 static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4387 wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4389 if (!wlc->wdtimer) {
4390 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer "
4395 wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4397 if (!wlc->radio_timer) {
4398 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer "
4410 * Initialize brcms_c_info default values ...
4411 * may get overrides later in this function
4413 static void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4417 /* Save our copy of the chanspec */
4418 wlc->chanspec = ch20mhz_chspec(1);
4420 /* various 802.11g modes */
4421 wlc->shortslot = false;
4422 wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4424 brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4425 brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4427 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4428 BRCMS_PROTECTION_AUTO);
4429 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4430 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4431 BRCMS_PROTECTION_AUTO);
4432 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4433 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4435 brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4436 BRCMS_PROTECTION_CTL_OVERLAP);
4438 /* 802.11g draft 4.0 NonERP elt advertisement */
4439 wlc->include_legacy_erp = true;
4441 wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4442 wlc->stf->txant = ANT_TX_DEF;
4444 wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4446 wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4447 for (i = 0; i < NFIFO; i++)
4448 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4449 wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4451 /* default rate fallback retry limits */
4452 wlc->SFBL = RETRY_SHORT_FB;
4453 wlc->LFBL = RETRY_LONG_FB;
4455 /* default mac retry limits */
4456 wlc->SRL = RETRY_SHORT_DEF;
4457 wlc->LRL = RETRY_LONG_DEF;
4459 /* WME QoS mode is Auto by default */
4460 wlc->pub->_ampdu = AMPDU_AGG_HOST;
4461 wlc->pub->bcmerror = 0;
4464 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4468 unit = wlc->pub->unit;
4470 wlc->asi = brcms_c_antsel_attach(wlc);
4471 if (wlc->asi == NULL) {
4472 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4478 wlc->ampdu = brcms_c_ampdu_attach(wlc);
4479 if (wlc->ampdu == NULL) {
4480 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4486 if ((brcms_c_stf_attach(wlc) != 0)) {
4487 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4496 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4502 * run backplane attach, init nvram
4504 * initialize software state for each core and band
4505 * put the whole chip in reset(driver down state), no clock
4507 static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
4508 uint unit, bool piomode, void __iomem *regsva,
4509 struct pci_dev *btparam)
4511 struct brcms_hardware *wlc_hw;
4512 struct d11regs __iomem *regs;
4513 char *macaddr = NULL;
4517 struct shared_phy_params sha_params;
4518 struct wiphy *wiphy = wlc->wiphy;
4520 BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor,
4527 wlc_hw->unit = unit;
4528 wlc_hw->band = wlc_hw->bandstate[0];
4529 wlc_hw->_piomode = piomode;
4531 /* populate struct brcms_hardware with default values */
4532 brcms_b_info_init(wlc_hw);
4535 * Do the hardware portion of the attach. Also initialize software
4536 * state that depends on the particular hardware we are running.
4538 wlc_hw->sih = ai_attach(regsva, btparam);
4539 if (wlc_hw->sih == NULL) {
4540 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4546 /* verify again the device is supported */
4547 if (!brcms_c_chipmatch(vendor, device)) {
4548 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4549 "vendor/device (0x%x/0x%x)\n",
4550 unit, vendor, device);
4555 wlc_hw->vendorid = vendor;
4556 wlc_hw->deviceid = device;
4558 /* set bar0 window to point at D11 core */
4559 wlc_hw->regs = (struct d11regs __iomem *)
4560 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
4561 wlc_hw->corerev = ai_corerev(wlc_hw->sih);
4563 regs = wlc_hw->regs;
4565 wlc->regs = wlc_hw->regs;
4567 /* validate chip, chiprev and corerev */
4568 if (!brcms_c_isgoodchip(wlc_hw)) {
4573 /* initialize power control registers */
4574 ai_clkctl_init(wlc_hw->sih);
4576 /* request fastclock and force fastclock for the rest of attach
4577 * bring the d11 core out of reset.
4578 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4579 * is still false; But it will be called again inside wlc_corereset,
4580 * after d11 is out of reset.
4582 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4583 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4585 if (!brcms_b_validate_chip_access(wlc_hw)) {
4586 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4592 /* get the board rev, used just below */
4593 j = getintvar(wlc_hw->sih, BRCMS_SROM_BOARDREV);
4594 /* promote srom boardrev of 0xFF to 1 */
4595 if (j == BOARDREV_PROMOTABLE)
4596 j = BOARDREV_PROMOTED;
4597 wlc_hw->boardrev = (u16) j;
4598 if (!brcms_c_validboardtype(wlc_hw)) {
4599 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4600 "board type (0x%x)" " or revision level (0x%x)\n",
4601 unit, wlc_hw->sih->boardtype, wlc_hw->boardrev);
4605 wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, BRCMS_SROM_REV);
4606 wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih,
4607 BRCMS_SROM_BOARDFLAGS);
4608 wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih,
4609 BRCMS_SROM_BOARDFLAGS2);
4611 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4612 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4614 /* check device id(srom, nvram etc.) to set bands */
4615 if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4616 wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4617 /* Dualband boards */
4618 wlc_hw->_nbands = 2;
4620 wlc_hw->_nbands = 1;
4622 if ((wlc_hw->sih->chip == BCM43225_CHIP_ID))
4623 wlc_hw->_nbands = 1;
4625 /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4626 * unconditionally does the init of these values
4628 wlc->vendorid = wlc_hw->vendorid;
4629 wlc->deviceid = wlc_hw->deviceid;
4630 wlc->pub->sih = wlc_hw->sih;
4631 wlc->pub->corerev = wlc_hw->corerev;
4632 wlc->pub->sromrev = wlc_hw->sromrev;
4633 wlc->pub->boardrev = wlc_hw->boardrev;
4634 wlc->pub->boardflags = wlc_hw->boardflags;
4635 wlc->pub->boardflags2 = wlc_hw->boardflags2;
4636 wlc->pub->_nbands = wlc_hw->_nbands;
4638 wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4640 if (wlc_hw->physhim == NULL) {
4641 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4647 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4648 sha_params.sih = wlc_hw->sih;
4649 sha_params.physhim = wlc_hw->physhim;
4650 sha_params.unit = unit;
4651 sha_params.corerev = wlc_hw->corerev;
4652 sha_params.vid = wlc_hw->vendorid;
4653 sha_params.did = wlc_hw->deviceid;
4654 sha_params.chip = wlc_hw->sih->chip;
4655 sha_params.chiprev = wlc_hw->sih->chiprev;
4656 sha_params.chippkg = wlc_hw->sih->chippkg;
4657 sha_params.sromrev = wlc_hw->sromrev;
4658 sha_params.boardtype = wlc_hw->sih->boardtype;
4659 sha_params.boardrev = wlc_hw->boardrev;
4660 sha_params.boardvendor = wlc_hw->sih->boardvendor;
4661 sha_params.boardflags = wlc_hw->boardflags;
4662 sha_params.boardflags2 = wlc_hw->boardflags2;
4663 sha_params.buscorerev = wlc_hw->sih->buscorerev;
4665 /* alloc and save pointer to shared phy state area */
4666 wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4667 if (!wlc_hw->phy_sh) {
4672 /* initialize software state for each core and band */
4673 for (j = 0; j < wlc_hw->_nbands; j++) {
4675 * band0 is always 2.4Ghz
4676 * band1, if present, is 5Ghz
4679 brcms_c_setxband(wlc_hw, j);
4681 wlc_hw->band->bandunit = j;
4682 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4683 wlc->band->bandunit = j;
4684 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4685 wlc->core->coreidx = ai_coreidx(wlc_hw->sih);
4687 wlc_hw->machwcap = R_REG(®s->machwcap);
4688 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4690 /* init tx fifo size */
4691 wlc_hw->xmtfifo_sz =
4692 xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4694 /* Get a phy for this band */
4696 wlc_phy_attach(wlc_hw->phy_sh, regs,
4697 wlc_hw->band->bandtype,
4699 if (wlc_hw->band->pi == NULL) {
4700 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4701 "attach failed\n", unit);
4706 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4708 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4709 &wlc_hw->band->phyrev,
4710 &wlc_hw->band->radioid,
4711 &wlc_hw->band->radiorev);
4712 wlc_hw->band->abgphy_encore =
4713 wlc_phy_get_encore(wlc_hw->band->pi);
4714 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4715 wlc_hw->band->core_flags =
4716 wlc_phy_get_coreflags(wlc_hw->band->pi);
4718 /* verify good phy_type & supported phy revision */
4719 if (BRCMS_ISNPHY(wlc_hw->band)) {
4720 if (NCONF_HAS(wlc_hw->band->phyrev))
4724 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4725 if (LCNCONF_HAS(wlc_hw->band->phyrev))
4731 wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4732 "phy type/rev (%d/%d)\n", unit,
4733 wlc_hw->band->phytype, wlc_hw->band->phyrev);
4740 * BMAC_NOTE: wlc->band->pi should not be set below and should
4741 * be done in the high level attach. However we can not make
4742 * that change until all low level access is changed to
4743 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4744 * keeping wlc_hw->band->pi as well for incremental update of
4745 * low level fns, and cut over low only init when all fns
4748 wlc->band->pi = wlc_hw->band->pi;
4749 wlc->band->phytype = wlc_hw->band->phytype;
4750 wlc->band->phyrev = wlc_hw->band->phyrev;
4751 wlc->band->radioid = wlc_hw->band->radioid;
4752 wlc->band->radiorev = wlc_hw->band->radiorev;
4754 /* default contention windows size limits */
4755 wlc_hw->band->CWmin = APHY_CWMIN;
4756 wlc_hw->band->CWmax = PHY_CWMAX;
4758 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4764 /* disable core to match driver "down" state */
4765 brcms_c_coredisable(wlc_hw);
4767 /* Match driver "down" state */
4768 ai_pci_down(wlc_hw->sih);
4770 /* register sb interrupt callback functions */
4771 ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff,
4772 (void *)brcms_c_wlintrsrestore, NULL, wlc);
4774 /* turn off pll and xtal to match driver "down" state */
4775 brcms_b_xtal(wlc_hw, OFF);
4777 /* *******************************************************************
4778 * The hardware is in the DOWN state at this point. D11 core
4779 * or cores are in reset with clocks off, and the board PLLs
4780 * are off if possible.
4782 * Beyond this point, wlc->sbclk == false and chip registers
4783 * should not be touched.
4784 *********************************************************************
4787 /* init etheraddr state variables */
4788 macaddr = brcms_c_get_macaddr(wlc_hw);
4789 if (macaddr == NULL) {
4790 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4795 if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4796 is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4797 is_zero_ether_addr(wlc_hw->etheraddr)) {
4798 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4805 "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4806 wlc_hw->deviceid, wlc_hw->_nbands,
4807 wlc_hw->sih->boardtype, macaddr);
4812 wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4817 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4820 unit = wlc->pub->unit;
4822 if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4823 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4824 wlc->band->antgain = 8;
4825 } else if (wlc->band->antgain == -1) {
4826 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4827 " srom, using 2dB\n", unit, __func__);
4828 wlc->band->antgain = 8;
4831 /* Older sroms specified gain in whole dbm only. In order
4832 * be able to specify qdbm granularity and remain backward
4833 * compatible the whole dbms are now encoded in only
4834 * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4835 * 6 bit signed number ranges from -32 - 31.
4839 * 0xc1 = 1.75 db (1 + 3 quarters),
4840 * 0x3f = -1 (-1 + 0 quarters),
4841 * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4842 * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4844 gain = wlc->band->antgain & 0x3f;
4845 gain <<= 2; /* Sign extend */
4847 fract = (wlc->band->antgain & 0xc0) >> 6;
4848 wlc->band->antgain = 4 * gain + fract;
4852 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4857 struct si_pub *sih = wlc->hw->sih;
4859 unit = wlc->pub->unit;
4860 bandtype = wlc->band->bandtype;
4862 /* get antennas available */
4863 if (bandtype == BRCM_BAND_5G)
4864 aa = (s8) getintvar(sih, BRCMS_SROM_AA5G);
4866 aa = (s8) getintvar(sih, BRCMS_SROM_AA2G);
4868 if ((aa < 1) || (aa > 15)) {
4869 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4870 " srom (0x%x), using 3\n", unit, __func__, aa);
4874 /* reset the defaults if we have a single antenna */
4876 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4877 wlc->stf->txant = ANT_TX_FORCE_0;
4878 } else if (aa == 2) {
4879 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4880 wlc->stf->txant = ANT_TX_FORCE_1;
4884 /* Compute Antenna Gain */
4885 if (bandtype == BRCM_BAND_5G)
4886 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG1);
4888 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG0);
4890 brcms_c_attach_antgain_init(wlc);
4895 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4898 struct brcms_band *band;
4899 struct brcms_bss_info *bi = wlc->default_bss;
4901 /* init default and target BSS with some sane initial values */
4902 memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4903 bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4905 /* fill the default channel as the first valid channel
4906 * starting from the 2G channels
4908 chanspec = ch20mhz_chspec(1);
4909 wlc->home_chanspec = bi->chanspec = chanspec;
4911 /* find the band of our default channel */
4913 if (wlc->pub->_nbands > 1 &&
4914 band->bandunit != chspec_bandunit(chanspec))
4915 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4917 /* init bss rates to the band specific default rate set */
4918 brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4919 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4920 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4921 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4923 if (wlc->pub->_n_enab & SUPPORT_11N)
4924 bi->flags |= BRCMS_BSS_HT;
4927 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
4929 struct brcms_txq_info *qi, *p;
4931 qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
4934 * Have enough room for control packets along with HI watermark
4935 * Also, add room to txq for total psq packets if all the SCBs
4936 * leave PS mode. The watermark for flowcontrol to OS packets
4937 * will remain the same
4939 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
4940 2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
4942 /* add this queue to the the global list */
4945 wlc->tx_queues = qi;
4947 while (p->next != NULL)
4955 static void brcms_c_txq_free(struct brcms_c_info *wlc,
4956 struct brcms_txq_info *qi)
4958 struct brcms_txq_info *p;
4963 /* remove the queue from the linked list */
4966 wlc->tx_queues = p->next;
4968 while (p != NULL && p->next != qi)
4971 p->next = p->next->next;
4977 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
4980 struct brcms_band *band;
4982 for (i = 0; i < wlc->pub->_nbands; i++) {
4983 band = wlc->bandstate[i];
4984 if (band->bandtype == BRCM_BAND_5G) {
4985 if ((bwcap == BRCMS_N_BW_40ALL)
4986 || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
4987 band->mimo_cap_40 = true;
4989 band->mimo_cap_40 = false;
4991 if (bwcap == BRCMS_N_BW_40ALL)
4992 band->mimo_cap_40 = true;
4994 band->mimo_cap_40 = false;
4999 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
5001 /* free timer state */
5003 brcms_free_timer(wlc->wdtimer);
5004 wlc->wdtimer = NULL;
5006 if (wlc->radio_timer) {
5007 brcms_free_timer(wlc->radio_timer);
5008 wlc->radio_timer = NULL;
5012 static void brcms_c_detach_module(struct brcms_c_info *wlc)
5015 brcms_c_antsel_detach(wlc->asi);
5020 brcms_c_ampdu_detach(wlc->ampdu);
5024 brcms_c_stf_detach(wlc);
5030 static int brcms_b_detach(struct brcms_c_info *wlc)
5033 struct brcms_hw_band *band;
5034 struct brcms_hardware *wlc_hw = wlc->hw;
5041 * detach interrupt sync mechanism since interrupt is disabled
5042 * and per-port interrupt object may has been freed. this must
5043 * be done before sb core switch
5045 ai_deregister_intr_callback(wlc_hw->sih);
5046 ai_pci_sleep(wlc_hw->sih);
5049 brcms_b_detach_dmapio(wlc_hw);
5051 band = wlc_hw->band;
5052 for (i = 0; i < wlc_hw->_nbands; i++) {
5054 /* Detach this band's phy */
5055 wlc_phy_detach(band->pi);
5058 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
5061 /* Free shared phy state */
5062 kfree(wlc_hw->phy_sh);
5064 wlc_phy_shim_detach(wlc_hw->physhim);
5067 ai_detach(wlc_hw->sih);
5076 * Return a count of the number of driver callbacks still pending.
5078 * General policy is that brcms_c_detach can only dealloc/free software states.
5079 * It can NOT touch hardware registers since the d11core may be in reset and
5080 * clock may not be available.
5081 * One exception is sb register access, which is possible if crystal is turned
5082 * on after "down" state, driver should avoid software timer with the exception
5085 uint brcms_c_detach(struct brcms_c_info *wlc)
5092 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5094 callbacks += brcms_b_detach(wlc);
5096 /* delete software timers */
5097 if (!brcms_c_radio_monitor_stop(wlc))
5100 brcms_c_channel_mgr_detach(wlc->cmi);
5102 brcms_c_timers_deinit(wlc);
5104 brcms_c_detach_module(wlc);
5107 while (wlc->tx_queues != NULL)
5108 brcms_c_txq_free(wlc, wlc->tx_queues);
5110 brcms_c_detach_mfree(wlc);
5114 /* update state that depends on the current value of "ap" */
5115 static void brcms_c_ap_upd(struct brcms_c_info *wlc)
5117 /* STA-BSS; short capable */
5118 wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5121 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5122 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5124 if (wlc_hw->wlc->pub->hw_up)
5127 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5130 * Enable pll and xtal, initialize the power control registers,
5131 * and force fastclock for the remainder of brcms_c_up().
5133 brcms_b_xtal(wlc_hw, ON);
5134 ai_clkctl_init(wlc_hw->sih);
5135 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5137 ai_pci_fixcfg(wlc_hw->sih);
5140 * AI chip doesn't restore bar0win2 on
5141 * hibernation/resume, need sw fixup
5143 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
5144 (wlc_hw->sih->chip == BCM43225_CHIP_ID))
5145 wlc_hw->regs = (struct d11regs __iomem *)
5146 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
5149 * Inform phy that a POR reset has occurred so
5150 * it does a complete phy init
5152 wlc_phy_por_inform(wlc_hw->band->pi);
5154 wlc_hw->ucode_loaded = false;
5155 wlc_hw->wlc->pub->hw_up = true;
5157 if ((wlc_hw->boardflags & BFL_FEM)
5158 && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
5160 (wlc_hw->boardrev >= 0x1250
5161 && (wlc_hw->boardflags & BFL_FEM_BT)))
5162 ai_epa_4313war(wlc_hw->sih);
5166 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5170 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5173 * Enable pll and xtal, initialize the power control registers,
5174 * and force fastclock for the remainder of brcms_c_up().
5176 brcms_b_xtal(wlc_hw, ON);
5177 ai_clkctl_init(wlc_hw->sih);
5178 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5181 * Configure pci/pcmcia here instead of in brcms_c_attach()
5182 * to allow mfg hotswap: down, hotswap (chip power cycle), up.
5184 coremask = (1 << wlc_hw->wlc->core->coreidx);
5186 ai_pci_setup(wlc_hw->sih, coremask);
5189 * Need to read the hwradio status here to cover the case where the
5190 * system is loaded with the hw radio disabled. We do not want to
5191 * bring the driver up in this case.
5193 if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5194 /* put SB PCI in down state again */
5195 ai_pci_down(wlc_hw->sih);
5196 brcms_b_xtal(wlc_hw, OFF);
5200 ai_pci_up(wlc_hw->sih);
5202 /* reset the d11 core */
5203 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5208 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5210 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5213 wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5215 /* FULLY enable dynamic power control and d11 core interrupt */
5216 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5217 brcms_intrson(wlc_hw->wlc->wl);
5222 * Write WME tunable parameters for retransmit/max rate
5223 * from wlc struct to ucode
5225 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5229 /* Need clock to do this */
5233 for (ac = 0; ac < AC_COUNT; ac++)
5234 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5235 wlc->wme_retries[ac]);
5238 /* make interface operational */
5239 int brcms_c_up(struct brcms_c_info *wlc)
5241 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5243 /* HW is turned off so don't try to access it */
5244 if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5247 if (!wlc->pub->hw_up) {
5248 brcms_b_hw_up(wlc->hw);
5249 wlc->pub->hw_up = true;
5252 if ((wlc->pub->boardflags & BFL_FEM)
5253 && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) {
5254 if (wlc->pub->boardrev >= 0x1250
5255 && (wlc->pub->boardflags & BFL_FEM_BT))
5256 brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5257 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5259 brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5260 MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5264 * Need to read the hwradio status here to cover the case where the
5265 * system is loaded with the hw radio disabled. We do not want to bring
5266 * the driver up in this case. If radio is disabled, abort up, lower
5267 * power, start radio timer and return 0(for NDIS) don't call
5268 * radio_update to avoid looping brcms_c_up.
5270 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5272 if (!wlc->pub->radio_disabled) {
5273 int status = brcms_b_up_prep(wlc->hw);
5274 if (status == -ENOMEDIUM) {
5276 (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5277 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5278 mboolset(wlc->pub->radio_disabled,
5279 WL_RADIO_HW_DISABLE);
5281 if (bsscfg->enable && bsscfg->BSS)
5282 wiphy_err(wlc->wiphy, "wl%d: up"
5284 "bsscfg_disable()\n",
5290 if (wlc->pub->radio_disabled) {
5291 brcms_c_radio_monitor_start(wlc);
5295 /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5298 brcms_c_radio_monitor_stop(wlc);
5300 /* Set EDCF hostflags */
5301 brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5303 brcms_init(wlc->wl);
5304 wlc->pub->up = true;
5306 if (wlc->bandinit_pending) {
5307 brcms_c_suspend_mac_and_wait(wlc);
5308 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5309 wlc->bandinit_pending = false;
5310 brcms_c_enable_mac(wlc);
5313 brcms_b_up_finish(wlc->hw);
5315 /* Program the TX wme params with the current settings */
5316 brcms_c_wme_retries_write(wlc);
5318 /* start one second watchdog timer */
5319 brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5320 wlc->WDarmed = true;
5322 /* ensure antenna config is up to date */
5323 brcms_c_stf_phy_txant_upd(wlc);
5324 /* ensure LDPC config is in sync */
5325 brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5330 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5337 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5342 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5347 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5349 /* disable interrupts */
5351 wlc_hw->wlc->macintmask = 0;
5353 /* now disable interrupts */
5354 brcms_intrsoff(wlc_hw->wlc->wl);
5356 /* ensure we're running on the pll clock again */
5357 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5359 /* down phy at the last of this stage */
5360 callbacks += wlc_phy_down(wlc_hw->band->pi);
5365 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5370 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5376 wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5378 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5381 wlc_hw->sbclk = false;
5382 wlc_hw->clk = false;
5383 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5385 /* reclaim any posted packets */
5386 brcms_c_flushqueues(wlc_hw->wlc);
5389 /* Reset and disable the core */
5390 if (ai_iscoreup(wlc_hw->sih)) {
5391 if (R_REG(&wlc_hw->regs->maccontrol) &
5393 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5394 callbacks += brcms_reset(wlc_hw->wlc->wl);
5395 brcms_c_coredisable(wlc_hw);
5398 /* turn off primary xtal and pll */
5399 if (!wlc_hw->noreset) {
5400 ai_pci_down(wlc_hw->sih);
5401 brcms_b_xtal(wlc_hw, OFF);
5409 * Mark the interface nonoperational, stop the software mechanisms,
5410 * disable the hardware, free any transient buffer state.
5411 * Return a count of the number of driver callbacks still pending.
5413 uint brcms_c_down(struct brcms_c_info *wlc)
5418 bool dev_gone = false;
5419 struct brcms_txq_info *qi;
5421 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5423 /* check if we are already in the going down path */
5424 if (wlc->going_down) {
5425 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5426 "\n", wlc->pub->unit, __func__);
5432 wlc->going_down = true;
5434 callbacks += brcms_b_bmac_down_prep(wlc->hw);
5436 dev_gone = brcms_deviceremoved(wlc);
5438 /* Call any registered down handlers */
5439 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5440 if (wlc->modulecb[i].down_fn)
5442 wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5445 /* cancel the watchdog timer */
5447 if (!brcms_del_timer(wlc->wdtimer))
5449 wlc->WDarmed = false;
5451 /* cancel all other timers */
5452 callbacks += brcms_c_down_del_timer(wlc);
5454 wlc->pub->up = false;
5456 wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5458 /* clear txq flow control */
5459 brcms_c_txflowcontrol_reset(wlc);
5461 /* flush tx queues */
5462 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5463 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5465 callbacks += brcms_b_down_finish(wlc->hw);
5467 /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5470 wlc->going_down = false;
5474 /* Set the current gmode configuration */
5475 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5479 struct brcms_c_rateset rs;
5480 /* Default to 54g Auto */
5481 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5482 s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5483 bool shortslot_restrict = false; /* Restrict association to stations
5484 * that support shortslot
5486 bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */
5487 /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5488 int preamble = BRCMS_PLCP_LONG;
5489 bool preamble_restrict = false; /* Restrict association to stations
5490 * that support short preambles
5492 struct brcms_band *band;
5494 /* if N-support is enabled, allow Gmode set as long as requested
5495 * Gmode is not GMODE_LEGACY_B
5497 if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5500 /* verify that we are dealing with 2G band and grab the band pointer */
5501 if (wlc->band->bandtype == BRCM_BAND_2G)
5503 else if ((wlc->pub->_nbands > 1) &&
5504 (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5505 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5509 /* Legacy or bust when no OFDM is supported by regulatory */
5510 if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5511 BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5514 /* update configuration value */
5516 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5518 /* Clear rateset override */
5519 memset(&rs, 0, sizeof(struct brcms_c_rateset));
5522 case GMODE_LEGACY_B:
5523 shortslot = BRCMS_SHORTSLOT_OFF;
5524 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5532 /* Accept defaults */
5537 preamble = BRCMS_PLCP_SHORT;
5538 preamble_restrict = true;
5541 case GMODE_PERFORMANCE:
5542 shortslot = BRCMS_SHORTSLOT_ON;
5543 shortslot_restrict = true;
5545 preamble = BRCMS_PLCP_SHORT;
5546 preamble_restrict = true;
5551 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5552 wlc->pub->unit, __func__, gmode);
5556 band->gmode = gmode;
5558 wlc->shortslot_override = shortslot;
5560 /* Use the default 11g rateset */
5562 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5565 for (i = 0; i < rs.count; i++) {
5566 if (rs.rates[i] == BRCM_RATE_6M
5567 || rs.rates[i] == BRCM_RATE_12M
5568 || rs.rates[i] == BRCM_RATE_24M)
5569 rs.rates[i] |= BRCMS_RATE_FLAG;
5573 /* Set default bss rateset */
5574 wlc->default_bss->rateset.count = rs.count;
5575 memcpy(wlc->default_bss->rateset.rates, rs.rates,
5576 sizeof(wlc->default_bss->rateset.rates));
5581 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5586 if (wlc->stf->txstreams == WL_11N_3x3)
5591 /* force GMODE_AUTO if NMODE is ON */
5592 brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5593 if (nmode == WL_11N_3x3)
5594 wlc->pub->_n_enab = SUPPORT_HT;
5596 wlc->pub->_n_enab = SUPPORT_11N;
5597 wlc->default_bss->flags |= BRCMS_BSS_HT;
5598 /* add the mcs rates to the default and hw ratesets */
5599 brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5600 wlc->stf->txstreams);
5601 for (i = 0; i < wlc->pub->_nbands; i++)
5602 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5603 wlc->default_bss->rateset.mcs, MCSSET_LEN);
5609 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5610 struct brcms_c_rateset *rs_arg)
5612 struct brcms_c_rateset rs, new;
5615 memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5617 /* check for bad count value */
5618 if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5621 /* try the current band */
5622 bandunit = wlc->band->bandunit;
5623 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5624 if (brcms_c_rate_hwrs_filter_sort_validate
5625 (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5626 wlc->stf->txstreams))
5629 /* try the other band */
5630 if (brcms_is_mband_unlocked(wlc)) {
5631 bandunit = OTHERBANDUNIT(wlc);
5632 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5633 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5635 bandstate[bandunit]->
5637 wlc->stf->txstreams))
5644 /* apply new rateset */
5645 memcpy(&wlc->default_bss->rateset, &new,
5646 sizeof(struct brcms_c_rateset));
5647 memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5648 sizeof(struct brcms_c_rateset));
5652 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5657 if (wlc->bsscfg->associated)
5658 r = wlc->bsscfg->current_bss->rateset.rates[0];
5660 r = wlc->default_bss->rateset.rates[0];
5662 wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5665 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5667 u16 chspec = ch20mhz_chspec(channel);
5669 if (channel < 0 || channel > MAXCHANNEL)
5672 if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5676 if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5677 if (wlc->band->bandunit != chspec_bandunit(chspec))
5678 wlc->bandinit_pending = true;
5680 wlc->bandinit_pending = false;
5683 wlc->default_bss->chanspec = chspec;
5684 /* brcms_c_BSSinit() will sanitize the rateset before
5686 if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5687 brcms_c_set_home_chanspec(wlc, chspec);
5688 brcms_c_suspend_mac_and_wait(wlc);
5689 brcms_c_set_chanspec(wlc, chspec);
5690 brcms_c_enable_mac(wlc);
5695 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5699 if (srl < 1 || srl > RETRY_SHORT_MAX ||
5700 lrl < 1 || lrl > RETRY_SHORT_MAX)
5706 brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5708 for (ac = 0; ac < AC_COUNT; ac++) {
5709 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
5710 EDCF_SHORT, wlc->SRL);
5711 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
5712 EDCF_LONG, wlc->LRL);
5714 brcms_c_wme_retries_write(wlc);
5719 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
5720 struct brcm_rateset *currs)
5722 struct brcms_c_rateset *rs;
5724 if (wlc->pub->associated)
5725 rs = &wlc->bsscfg->current_bss->rateset;
5727 rs = &wlc->default_bss->rateset;
5729 /* Copy only legacy rateset section */
5730 currs->count = rs->count;
5731 memcpy(&currs->rates, &rs->rates, rs->count);
5734 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
5736 struct brcms_c_rateset internal_rs;
5739 if (rs->count > BRCMS_NUMRATES)
5742 memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
5744 /* Copy only legacy rateset section */
5745 internal_rs.count = rs->count;
5746 memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5748 /* merge rateset coming in with the current mcsset */
5749 if (wlc->pub->_n_enab & SUPPORT_11N) {
5750 struct brcms_bss_info *mcsset_bss;
5751 if (wlc->bsscfg->associated)
5752 mcsset_bss = wlc->bsscfg->current_bss;
5754 mcsset_bss = wlc->default_bss;
5755 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5759 bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
5761 brcms_c_ofdm_rateset_war(wlc);
5766 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
5768 if (period < DOT11_MIN_BEACON_PERIOD ||
5769 period > DOT11_MAX_BEACON_PERIOD)
5772 wlc->default_bss->beacon_period = period;
5776 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
5778 return wlc->band->phytype;
5781 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
5783 wlc->shortslot_override = sslot_override;
5786 * shortslot is an 11g feature, so no more work if we are
5787 * currently on the 5G band
5789 if (wlc->band->bandtype == BRCM_BAND_5G)
5792 if (wlc->pub->up && wlc->pub->associated) {
5793 /* let watchdog or beacon processing update shortslot */
5794 } else if (wlc->pub->up) {
5795 /* unassociated shortslot is off */
5796 brcms_c_switch_shortslot(wlc, false);
5798 /* driver is down, so just update the brcms_c_info
5800 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5801 wlc->shortslot = false;
5804 (wlc->shortslot_override ==
5805 BRCMS_SHORTSLOT_ON);
5810 * register watchdog and down handlers.
5812 int brcms_c_module_register(struct brcms_pub *pub,
5813 const char *name, struct brcms_info *hdl,
5814 int (*d_fn)(void *handle))
5816 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5819 /* find an empty entry and just add, no duplication check! */
5820 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5821 if (wlc->modulecb[i].name[0] == '\0') {
5822 strncpy(wlc->modulecb[i].name, name,
5823 sizeof(wlc->modulecb[i].name) - 1);
5824 wlc->modulecb[i].hdl = hdl;
5825 wlc->modulecb[i].down_fn = d_fn;
5833 /* unregister module callbacks */
5834 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
5835 struct brcms_info *hdl)
5837 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5843 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5844 if (!strcmp(wlc->modulecb[i].name, name) &&
5845 (wlc->modulecb[i].hdl == hdl)) {
5846 memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
5851 /* table not found! */
5856 static const char * const supr_reason[] = {
5857 "None", "PMQ Entry", "Flush request",
5858 "Previous frag failure", "Channel mismatch",
5859 "Lifetime Expiry", "Underflow"
5862 static void brcms_c_print_txs_status(u16 s)
5864 printk(KERN_DEBUG "[15:12] %d frame attempts\n",
5865 (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT);
5866 printk(KERN_DEBUG " [11:8] %d rts attempts\n",
5867 (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT);
5868 printk(KERN_DEBUG " [7] %d PM mode indicated\n",
5869 ((s & TX_STATUS_PMINDCTD) ? 1 : 0));
5870 printk(KERN_DEBUG " [6] %d intermediate status\n",
5871 ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0));
5872 printk(KERN_DEBUG " [5] %d AMPDU\n",
5873 (s & TX_STATUS_AMPDU) ? 1 : 0);
5874 printk(KERN_DEBUG " [4:2] %d Frame Suppressed Reason (%s)\n",
5875 ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT),
5876 supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]);
5877 printk(KERN_DEBUG " [1] %d acked\n",
5878 ((s & TX_STATUS_ACK_RCV) ? 1 : 0));
5882 void brcms_c_print_txstatus(struct tx_status *txs)
5885 u16 s = txs->status;
5886 u16 ackphyrxsh = txs->ackphyrxsh;
5888 printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n");
5890 printk(KERN_DEBUG "FrameID: %04x ", txs->frameid);
5891 printk(KERN_DEBUG "TxStatus: %04x", s);
5892 printk(KERN_DEBUG "\n");
5894 brcms_c_print_txs_status(s);
5896 printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime);
5897 printk(KERN_DEBUG "Seq: %04x ", txs->sequence);
5898 printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr);
5899 printk(KERN_DEBUG "RxAckRSSI: %04x ",
5900 (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT);
5901 printk(KERN_DEBUG "RxAckSQ: %04x",
5902 (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
5903 printk(KERN_DEBUG "\n");
5904 #endif /* defined(BCMDBG) */
5907 bool brcms_c_chipmatch(u16 vendor, u16 device)
5909 if (vendor != PCI_VENDOR_ID_BROADCOM) {
5910 pr_err("chipmatch: unknown vendor id %04x\n", vendor);
5914 if (device == BCM43224_D11N_ID_VEN1)
5916 if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
5918 if (device == BCM4313_D11N2G_ID)
5920 if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
5923 pr_err("chipmatch: unknown device id %04x\n", device);
5928 void brcms_c_print_txdesc(struct d11txh *txh)
5930 u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
5931 u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
5932 u16 mfc = le16_to_cpu(txh->MacFrameControl);
5933 u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
5934 u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
5935 u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
5936 u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
5937 u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
5938 u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
5939 u16 mainrates = le16_to_cpu(txh->MainRates);
5940 u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
5942 u8 *ra = txh->TxFrameRA;
5943 u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
5944 u8 *rtspfb = txh->RTSPLCPFallback;
5945 u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
5946 u8 *fragpfb = txh->FragPLCPFallback;
5947 u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
5948 u16 mmodelen = le16_to_cpu(txh->MModeLen);
5949 u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
5950 u16 tfid = le16_to_cpu(txh->TxFrameID);
5951 u16 txs = le16_to_cpu(txh->TxStatus);
5952 u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
5953 u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
5954 u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
5955 u16 mmbyte = le16_to_cpu(txh->MinMBytes);
5957 u8 *rtsph = txh->RTSPhyHeader;
5958 struct ieee80211_rts rts = txh->rts_frame;
5960 /* add plcp header along with txh descriptor */
5961 printk(KERN_DEBUG "Raw TxDesc + plcp header:\n");
5962 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
5963 txh, sizeof(struct d11txh) + 48);
5965 printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl);
5966 printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch);
5967 printk(KERN_DEBUG "FC: %04x ", mfc);
5968 printk(KERN_DEBUG "FES Time: %04x\n", tfest);
5969 printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw,
5970 (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
5971 printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1);
5972 printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
5973 printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
5974 printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
5975 printk(KERN_DEBUG "MainRates: %04x ", mainrates);
5976 printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
5977 printk(KERN_DEBUG "\n");
5979 print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET, iv, sizeof(txh->IV));
5980 print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET,
5981 ra, sizeof(txh->TxFrameRA));
5983 printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
5984 print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET,
5985 rtspfb, sizeof(txh->RTSPLCPFallback));
5986 printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
5987 print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET,
5988 fragpfb, sizeof(txh->FragPLCPFallback));
5989 printk(KERN_DEBUG "DUR: %04x", fragdfb);
5990 printk(KERN_DEBUG "\n");
5992 printk(KERN_DEBUG "MModeLen: %04x ", mmodelen);
5993 printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen);
5995 printk(KERN_DEBUG "FrameID: %04x\n", tfid);
5996 printk(KERN_DEBUG "TxStatus: %04x\n", txs);
5998 printk(KERN_DEBUG "MaxNumMpdu: %04x\n", mnmpdu);
5999 printk(KERN_DEBUG "MaxAggbyte: %04x\n", mabyte);
6000 printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f);
6001 printk(KERN_DEBUG "MinByte: %04x\n", mmbyte);
6003 print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET,
6004 rtsph, sizeof(txh->RTSPhyHeader));
6005 print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET,
6006 (u8 *)&rts, sizeof(txh->rts_frame));
6007 printk(KERN_DEBUG "\n");
6009 #endif /* defined(BCMDBG) */
6013 brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf,
6019 int slen = 0, nlen = 0;
6023 if (len < 2 || !buf)
6028 for (i = 0; flags != 0; i++) {
6031 if (bit == 0 && flags != 0) {
6032 /* print any unnamed bits */
6033 snprintf(hexstr, 16, "0x%X", flags);
6035 flags = 0; /* exit loop */
6036 } else if ((flags & bit) == 0)
6039 nlen = strlen(name);
6041 /* count btwn flag space */
6044 /* need NULL char as well */
6047 /* copy NULL char but don't count it */
6048 strncpy(p, name, nlen + 1);
6050 /* copy btwn flag space and NULL char */
6052 p += snprintf(p, 2, " ");
6056 /* indicate the str was too short */
6059 p -= 2 - len; /* overwrite last char */
6060 p += snprintf(p, 2, ">");
6063 return (int)(p - buf);
6065 #endif /* defined(BCMDBG) */
6068 void brcms_c_print_rxh(struct d11rxhdr *rxh)
6070 u16 len = rxh->RxFrameSize;
6071 u16 phystatus_0 = rxh->PhyRxStatus_0;
6072 u16 phystatus_1 = rxh->PhyRxStatus_1;
6073 u16 phystatus_2 = rxh->PhyRxStatus_2;
6074 u16 phystatus_3 = rxh->PhyRxStatus_3;
6075 u16 macstatus1 = rxh->RxStatus1;
6076 u16 macstatus2 = rxh->RxStatus2;
6079 static const struct brcms_c_bit_desc macstat_flags[] = {
6080 {RXS_FCSERR, "FCSErr"},
6081 {RXS_RESPFRAMETX, "Reply"},
6082 {RXS_PBPRES, "PADDING"},
6083 {RXS_DECATMPT, "DeCr"},
6084 {RXS_DECERR, "DeCrErr"},
6085 {RXS_BCNSENT, "Bcn"},
6089 printk(KERN_DEBUG "Raw RxDesc:\n");
6090 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh,
6091 sizeof(struct d11rxhdr));
6093 brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64);
6095 snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
6097 printk(KERN_DEBUG "RxFrameSize: %6s (%d)%s\n", lenbuf, len,
6098 (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
6099 printk(KERN_DEBUG "RxPHYStatus: %04x %04x %04x %04x\n",
6100 phystatus_0, phystatus_1, phystatus_2, phystatus_3);
6101 printk(KERN_DEBUG "RxMACStatus: %x %s\n", macstatus1, flagstr);
6102 printk(KERN_DEBUG "RXMACaggtype: %x\n",
6103 (macstatus2 & RXS_AGGTYPE_MASK));
6104 printk(KERN_DEBUG "RxTSFTime: %04x\n", rxh->RxTSFTime);
6106 #endif /* defined(BCMDBG) */
6108 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6113 /* get the phy specific rate encoding for the PLCP SIGNAL field */
6114 if (is_ofdm_rate(rate))
6115 table_ptr = M_RT_DIRMAP_A;
6117 table_ptr = M_RT_DIRMAP_B;
6119 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6120 * the index into the rate table.
6122 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6123 index = phy_rate & 0xf;
6125 /* Find the SHM pointer to the rate table entry by looking in the
6128 return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6132 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6133 struct sk_buff *pkt, int prec, bool head)
6136 int eprec = -1; /* precedence to evict from */
6138 /* Determine precedence from which to evict packet, if any */
6139 if (pktq_pfull(q, prec))
6141 else if (pktq_full(q)) {
6142 p = brcmu_pktq_peek_tail(q, &eprec);
6144 wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6145 "\n", __func__, eprec, prec);
6150 /* Evict if needed */
6152 bool discard_oldest;
6154 discard_oldest = ac_bitmap_tst(0, eprec);
6156 /* Refuse newer packet unless configured to discard oldest */
6157 if (eprec == prec && !discard_oldest) {
6158 wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6159 "\n", __func__, prec);
6163 /* Evict packet according to discard policy */
6164 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6165 brcmu_pktq_pdeq_tail(q, eprec);
6166 brcmu_pkt_buf_free_skb(p);
6171 p = brcmu_pktq_penq_head(q, prec, pkt);
6173 p = brcmu_pktq_penq(q, prec, pkt);
6179 * Attempts to queue a packet onto a multiple-precedence queue,
6180 * if necessary evicting a lower precedence packet from the queue.
6182 * 'prec' is the precedence number that has already been mapped
6183 * from the packet priority.
6185 * Returns true if packet consumed (queued), false if not.
6187 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6188 struct sk_buff *pkt, int prec)
6190 return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6193 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6194 struct sk_buff *sdu, uint prec)
6196 struct brcms_txq_info *qi = wlc->pkt_queue; /* Check me */
6197 struct pktq *q = &qi->q;
6200 prio = sdu->priority;
6202 if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6204 * we might hit this condtion in case
6205 * packet flooding from mac80211 stack
6207 brcmu_pkt_buf_free_skb(sdu);
6212 * bcmc_fid_generate:
6213 * Generate frame ID for a BCMC packet. The frag field is not used
6214 * for MC frames so is used as part of the sequence number.
6217 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6222 frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6226 mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6233 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6238 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6239 wlc->pub->unit, rspec, preamble_type);
6241 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6242 * is less than or equal to the rate of the immediately previous
6245 rspec = brcms_basic_rate(wlc, rspec);
6246 /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6248 brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6249 (DOT11_ACK_LEN + FCS_LEN));
6254 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6257 BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6258 wlc->pub->unit, rspec, preamble_type);
6259 return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6263 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6266 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6267 "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6269 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6270 * is less than or equal to the rate of the immediately previous
6273 rspec = brcms_basic_rate(wlc, rspec);
6274 /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6275 return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6276 (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6280 /* brcms_c_compute_frame_dur()
6282 * Calculate the 802.11 MAC header DUR field for MPDU
6283 * DUR for a single frame = 1 SIFS + 1 ACK
6284 * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6286 * rate MPDU rate in unit of 500kbps
6287 * next_frag_len next MPDU length in bytes
6288 * preamble_type use short/GF or long/MM PLCP header
6291 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6292 u8 preamble_type, uint next_frag_len)
6296 sifs = get_sifs(wlc->band);
6299 dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6301 if (next_frag_len) {
6302 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6304 /* add another SIFS and the frag time */
6307 (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6313 /* The opposite of brcms_c_calc_frame_time */
6315 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6316 u8 preamble_type, uint dur)
6318 uint nsyms, mac_len, Ndps, kNdps;
6319 uint rate = rspec2rate(ratespec);
6321 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6322 wlc->pub->unit, ratespec, preamble_type, dur);
6324 if (is_mcs_rate(ratespec)) {
6325 uint mcs = ratespec & RSPEC_RATE_MASK;
6326 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6327 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6328 /* payload calculation matches that of regular ofdm */
6329 if (wlc->band->bandtype == BRCM_BAND_2G)
6330 dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6331 /* kNdbps = kbps * 4 */
6332 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6333 rspec_issgi(ratespec)) * 4;
6334 nsyms = dur / APHY_SYMBOL_TIME;
6337 ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6338 } else if (is_ofdm_rate(ratespec)) {
6339 dur -= APHY_PREAMBLE_TIME;
6340 dur -= APHY_SIGNAL_TIME;
6341 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6343 nsyms = dur / APHY_SYMBOL_TIME;
6346 (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6348 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6349 dur -= BPHY_PLCP_SHORT_TIME;
6351 dur -= BPHY_PLCP_TIME;
6352 mac_len = dur * rate;
6353 /* divide out factor of 2 in rate (1/2 mbps) */
6354 mac_len = mac_len / 8 / 2;
6360 * Return true if the specified rate is supported by the specified band.
6361 * BRCM_BAND_AUTO indicates the current band.
6363 static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
6366 struct brcms_c_rateset *hw_rateset;
6369 if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
6370 hw_rateset = &wlc->band->hw_rateset;
6371 else if (wlc->pub->_nbands > 1)
6372 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
6374 /* other band specified and we are a single band device */
6377 /* check if this is a mimo rate */
6378 if (is_mcs_rate(rspec)) {
6379 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
6382 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
6385 for (i = 0; i < hw_rateset->count; i++)
6386 if (hw_rateset->rates[i] == rspec2rate(rspec))
6390 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
6391 "not in hw_rateset\n", wlc->pub->unit, rspec);
6397 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6400 u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6401 u8 rate = int_val & NRATE_RATE_MASK;
6403 bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6404 bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6405 bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6406 == NRATE_OVERRIDE_MCS_ONLY);
6412 /* validate the combination of rate/mcs/stf is allowed */
6413 if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6414 /* mcs only allowed when nmode */
6415 if (stf > PHY_TXC1_MODE_SDM) {
6416 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6417 wlc->pub->unit, __func__);
6422 /* mcs 32 is a special case, DUP mode 40 only */
6424 if (!CHSPEC_IS40(wlc->home_chanspec) ||
6425 ((stf != PHY_TXC1_MODE_SISO)
6426 && (stf != PHY_TXC1_MODE_CDD))) {
6427 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6428 "32\n", wlc->pub->unit, __func__);
6432 /* mcs > 7 must use stf SDM */
6433 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6434 /* mcs > 7 must use stf SDM */
6435 if (stf != PHY_TXC1_MODE_SDM) {
6436 BCMMSG(wlc->wiphy, "wl%d: enabling "
6437 "SDM mode for mcs %d\n",
6438 wlc->pub->unit, rate);
6439 stf = PHY_TXC1_MODE_SDM;
6443 * MCS 0-7 may use SISO, CDD, and for
6446 if ((stf > PHY_TXC1_MODE_STBC) ||
6447 (!BRCMS_STBC_CAP_PHY(wlc)
6448 && (stf == PHY_TXC1_MODE_STBC))) {
6449 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6450 "\n", wlc->pub->unit, __func__);
6455 } else if (is_ofdm_rate(rate)) {
6456 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6457 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6458 wlc->pub->unit, __func__);
6462 } else if (is_cck_rate(rate)) {
6463 if ((cur_band->bandtype != BRCM_BAND_2G)
6464 || (stf != PHY_TXC1_MODE_SISO)) {
6465 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6466 wlc->pub->unit, __func__);
6471 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6472 wlc->pub->unit, __func__);
6476 /* make sure multiple antennae are available for non-siso rates */
6477 if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6478 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6479 "request\n", wlc->pub->unit, __func__);
6486 rspec |= RSPEC_MIMORATE;
6487 /* For STBC populate the STC field of the ratespec */
6488 if (stf == PHY_TXC1_MODE_STBC) {
6490 stc = 1; /* Nss for single stream is always 1 */
6491 rspec |= (stc << RSPEC_STC_SHIFT);
6495 rspec |= (stf << RSPEC_STF_SHIFT);
6497 if (override_mcs_only)
6498 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6501 rspec |= RSPEC_SHORT_GI;
6504 && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6513 * Compute PLCP, but only requires actual rate and length of pkt.
6514 * Rate is given in the driver standard multiple of 500 kbps.
6515 * le is set for 11 Mbps rate if necessary.
6516 * Broken out for PRQ.
6519 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
6520 uint length, u8 *plcp)
6533 usec = (length << 4) / 11;
6534 if ((length << 4) - (usec * 11) > 0)
6538 usec = (length << 3) / 11;
6539 if ((length << 3) - (usec * 11) > 0) {
6541 if ((usec * 11) - (length << 3) >= 8)
6542 le = D11B_PLCP_SIGNAL_LE;
6547 wiphy_err(wlc->wiphy,
6548 "brcms_c_cck_plcp_set: unsupported rate %d\n",
6550 rate_500 = BRCM_RATE_1M;
6554 /* PLCP signal byte */
6555 plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
6556 /* PLCP service byte */
6557 plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
6558 /* PLCP length u16, little endian */
6559 plcp[2] = usec & 0xff;
6560 plcp[3] = (usec >> 8) & 0xff;
6566 /* Rate: 802.11 rate code, length: PSDU length in octets */
6567 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
6569 u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
6571 if (rspec_is40mhz(rspec) || (mcs == 32))
6572 plcp[0] |= MIMO_PLCP_40MHZ;
6573 BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
6574 plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
6575 plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6576 plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6580 /* Rate: 802.11 rate code, length: PSDU length in octets */
6582 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
6586 int rate = rspec2rate(rspec);
6589 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6592 rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
6593 memset(plcp, 0, D11_PHY_HDR_LEN);
6594 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
6596 tmp = (length & 0xfff) << 5;
6597 plcp[2] |= (tmp >> 16) & 0xff;
6598 plcp[1] |= (tmp >> 8) & 0xff;
6599 plcp[0] |= tmp & 0xff;
6602 /* Rate: 802.11 rate code, length: PSDU length in octets */
6603 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
6604 uint length, u8 *plcp)
6606 int rate = rspec2rate(rspec);
6608 brcms_c_cck_plcp_set(wlc, rate, length, plcp);
6612 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
6613 uint length, u8 *plcp)
6615 if (is_mcs_rate(rspec))
6616 brcms_c_compute_mimo_plcp(rspec, length, plcp);
6617 else if (is_ofdm_rate(rspec))
6618 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
6620 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
6623 /* brcms_c_compute_rtscts_dur()
6625 * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6626 * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6627 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
6629 * cts cts-to-self or rts/cts
6630 * rts_rate rts or cts rate in unit of 500kbps
6631 * rate next MPDU rate in unit of 500kbps
6632 * frame_len next MPDU frame length in bytes
6635 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
6637 u32 frame_rate, u8 rts_preamble_type,
6638 u8 frame_preamble_type, uint frame_len, bool ba)
6642 sifs = get_sifs(wlc->band);
6648 (u16) brcms_c_calc_cts_time(wlc, rts_rate,
6656 (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
6660 (u16) brcms_c_calc_ba_time(wlc, frame_rate,
6661 BRCMS_SHORT_PREAMBLE);
6664 (u16) brcms_c_calc_ack_time(wlc, frame_rate,
6665 frame_preamble_type);
6669 static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
6674 if (BRCMS_ISLCNPHY(wlc->band)) {
6675 bw = PHY_TXC1_BW_20MHZ;
6677 bw = rspec_get_bw(rspec);
6678 /* 10Mhz is not supported yet */
6679 if (bw < PHY_TXC1_BW_20MHZ) {
6680 wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
6681 "not supported yet, set to 20L\n", bw);
6682 bw = PHY_TXC1_BW_20MHZ;
6686 if (is_mcs_rate(rspec)) {
6687 uint mcs = rspec & RSPEC_RATE_MASK;
6689 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6690 phyctl1 = rspec_phytxbyte2(rspec);
6691 /* set the upper byte of phyctl1 */
6692 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
6693 } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6694 && !BRCMS_ISSSLPNPHY(wlc->band)) {
6696 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6697 * Data Rate. Eventually MIMOPHY would also be converted to
6700 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6701 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6702 } else { /* legacy OFDM/CCK */
6704 /* get the phyctl byte from rate phycfg table */
6705 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
6707 wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
6708 "legacy OFDM/CCK rate\n");
6711 /* set the upper byte of phyctl1 */
6713 (bw | (phycfg << 8) |
6714 (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6720 * Add struct d11txh, struct cck_phy_hdr.
6722 * 'p' data must start with 802.11 MAC header
6723 * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6725 * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6729 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6730 struct sk_buff *p, struct scb *scb, uint frag,
6731 uint nfrags, uint queue, uint next_frag_len)
6733 struct ieee80211_hdr *h;
6735 u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6736 int len, phylen, rts_phylen;
6737 u16 mch, phyctl, xfts, mainrates;
6738 u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6739 u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6740 u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6741 bool use_rts = false;
6742 bool use_cts = false;
6743 bool use_rifs = false;
6744 bool short_preamble[2] = { false, false };
6745 u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6746 u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6747 u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6748 struct ieee80211_rts *rts = NULL;
6751 bool hwtkmic = false;
6752 u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6753 #define ANTCFG_NONE 0xFF
6754 u8 antcfg = ANTCFG_NONE;
6755 u8 fbantcfg = ANTCFG_NONE;
6756 uint phyctl1_stf = 0;
6758 struct ieee80211_tx_rate *txrate[2];
6760 struct ieee80211_tx_info *tx_info;
6763 u8 mimo_preamble_type;
6765 /* locate 802.11 MAC header */
6766 h = (struct ieee80211_hdr *)(p->data);
6767 qos = ieee80211_is_data_qos(h->frame_control);
6769 /* compute length of frame in bytes for use in PLCP computations */
6770 len = brcmu_pkttotlen(p);
6771 phylen = len + FCS_LEN;
6774 tx_info = IEEE80211_SKB_CB(p);
6777 plcp = skb_push(p, D11_PHY_HDR_LEN);
6779 /* add Broadcom tx descriptor header */
6780 txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6781 memset(txh, 0, D11_TXH_LEN);
6784 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6785 /* non-AP STA should never use BCMC queue */
6786 if (queue == TX_BCMC_FIFO) {
6787 wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6788 "TX_BCMC!\n", wlc->pub->unit, __func__);
6789 frameid = bcmc_fid_generate(wlc, NULL, txh);
6791 /* Increment the counter for first fragment */
6792 if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6793 scb->seqnum[p->priority]++;
6795 /* extract fragment number from frame first */
6796 seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6797 seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6798 h->seq_ctrl = cpu_to_le16(seq);
6800 frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6801 (queue & TXFID_QUEUE_MASK);
6804 frameid |= queue & TXFID_QUEUE_MASK;
6806 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6807 if (ieee80211_is_beacon(h->frame_control))
6808 mcl |= TXC_IGNOREPMQ;
6810 txrate[0] = tx_info->control.rates;
6811 txrate[1] = txrate[0] + 1;
6814 * if rate control algorithm didn't give us a fallback
6815 * rate, use the primary rate
6817 if (txrate[1]->idx < 0)
6818 txrate[1] = txrate[0];
6820 for (k = 0; k < hw->max_rates; k++) {
6821 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6823 if ((txrate[k]->idx >= 0)
6824 && (txrate[k]->idx <
6825 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6827 hw->wiphy->bands[tx_info->band]->
6828 bitrates[txrate[k]->idx].hw_value;
6831 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6834 rspec[k] = BRCM_RATE_1M;
6837 rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6838 NRATE_MCS_INUSE | txrate[k]->idx);
6842 * Currently only support same setting for primay and
6843 * fallback rates. Unify flags for each rate into a
6844 * single value for the frame
6848 flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6851 flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6856 * determine and validate primary rate
6857 * and fallback rates
6859 if (!rspec_active(rspec[k])) {
6860 rspec[k] = BRCM_RATE_1M;
6862 if (!is_multicast_ether_addr(h->addr1)) {
6863 /* set tx antenna config */
6864 brcms_c_antsel_antcfg_get(wlc->asi, false,
6865 false, 0, 0, &antcfg, &fbantcfg);
6870 phyctl1_stf = wlc->stf->ss_opmode;
6872 if (wlc->pub->_n_enab & SUPPORT_11N) {
6873 for (k = 0; k < hw->max_rates; k++) {
6875 * apply siso/cdd to single stream mcs's or ofdm
6876 * if rspec is auto selected
6878 if (((is_mcs_rate(rspec[k]) &&
6879 is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6880 is_ofdm_rate(rspec[k]))
6881 && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6882 || !(rspec[k] & RSPEC_OVERRIDE))) {
6883 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6885 /* For SISO MCS use STBC if possible */
6886 if (is_mcs_rate(rspec[k])
6887 && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6890 /* Nss for single stream is always 1 */
6892 rspec[k] |= (PHY_TXC1_MODE_STBC <<
6894 (stc << RSPEC_STC_SHIFT);
6897 (phyctl1_stf << RSPEC_STF_SHIFT);
6901 * Is the phy configured to use 40MHZ frames? If
6902 * so then pick the desired txbw
6904 if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6905 /* default txbw is 20in40 SB */
6906 mimo_ctlchbw = mimo_txbw =
6907 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6909 ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
6911 if (is_mcs_rate(rspec[k])) {
6912 /* mcs 32 must be 40b/w DUP */
6913 if ((rspec[k] & RSPEC_RATE_MASK)
6916 PHY_TXC1_BW_40MHZ_DUP;
6918 } else if (wlc->mimo_40txbw != AUTO)
6919 mimo_txbw = wlc->mimo_40txbw;
6920 /* else check if dst is using 40 Mhz */
6921 else if (scb->flags & SCB_IS40)
6922 mimo_txbw = PHY_TXC1_BW_40MHZ;
6923 } else if (is_ofdm_rate(rspec[k])) {
6924 if (wlc->ofdm_40txbw != AUTO)
6925 mimo_txbw = wlc->ofdm_40txbw;
6926 } else if (wlc->cck_40txbw != AUTO) {
6927 mimo_txbw = wlc->cck_40txbw;
6931 * mcs32 is 40 b/w only.
6932 * This is possible for probe packets on
6935 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
6937 rspec[k] = RSPEC_MIMORATE;
6939 mimo_txbw = PHY_TXC1_BW_20MHZ;
6942 /* Set channel width */
6943 rspec[k] &= ~RSPEC_BW_MASK;
6944 if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
6945 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
6947 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
6949 /* Disable short GI, not supported yet */
6950 rspec[k] &= ~RSPEC_SHORT_GI;
6952 mimo_preamble_type = BRCMS_MM_PREAMBLE;
6953 if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
6954 mimo_preamble_type = BRCMS_GF_PREAMBLE;
6956 if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
6957 && (!is_mcs_rate(rspec[k]))) {
6958 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
6959 "RC_MCS != is_mcs_rate(rspec)\n",
6960 wlc->pub->unit, __func__);
6963 if (is_mcs_rate(rspec[k])) {
6964 preamble_type[k] = mimo_preamble_type;
6967 * if SGI is selected, then forced mm
6970 if ((rspec[k] & RSPEC_SHORT_GI)
6971 && is_single_stream(rspec[k] &
6973 preamble_type[k] = BRCMS_MM_PREAMBLE;
6976 /* should be better conditionalized */
6977 if (!is_mcs_rate(rspec[0])
6978 && (tx_info->control.rates[0].
6979 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
6980 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
6983 for (k = 0; k < hw->max_rates; k++) {
6984 /* Set ctrlchbw as 20Mhz */
6985 rspec[k] &= ~RSPEC_BW_MASK;
6986 rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
6988 /* for nphy, stf of ofdm frames must follow policies */
6989 if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
6990 rspec[k] &= ~RSPEC_STF_MASK;
6991 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
6996 /* Reset these for use with AMPDU's */
6997 txrate[0]->count = 0;
6998 txrate[1]->count = 0;
7000 /* (2) PROTECTION, may change rspec */
7001 if ((ieee80211_is_data(h->frame_control) ||
7002 ieee80211_is_mgmt(h->frame_control)) &&
7003 (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
7006 /* (3) PLCP: determine PLCP header and MAC duration,
7007 * fill struct d11txh */
7008 brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
7009 brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
7010 memcpy(&txh->FragPLCPFallback,
7011 plcp_fallback, sizeof(txh->FragPLCPFallback));
7013 /* Length field now put in CCK FBR CRC field */
7014 if (is_cck_rate(rspec[1])) {
7015 txh->FragPLCPFallback[4] = phylen & 0xff;
7016 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
7019 /* MIMO-RATE: need validation ?? */
7020 mainrates = is_ofdm_rate(rspec[0]) ?
7021 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
7024 /* DUR field for main rate */
7025 if (!ieee80211_is_pspoll(h->frame_control) &&
7026 !is_multicast_ether_addr(h->addr1) && !use_rifs) {
7028 brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
7030 h->duration_id = cpu_to_le16(durid);
7031 } else if (use_rifs) {
7032 /* NAV protect to end of next max packet size */
7034 (u16) brcms_c_calc_frame_time(wlc, rspec[0],
7036 DOT11_MAX_FRAG_LEN);
7037 durid += RIFS_11N_TIME;
7038 h->duration_id = cpu_to_le16(durid);
7041 /* DUR field for fallback rate */
7042 if (ieee80211_is_pspoll(h->frame_control))
7043 txh->FragDurFallback = h->duration_id;
7044 else if (is_multicast_ether_addr(h->addr1) || use_rifs)
7045 txh->FragDurFallback = 0;
7047 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
7048 preamble_type[1], next_frag_len);
7049 txh->FragDurFallback = cpu_to_le16(durid);
7052 /* (4) MAC-HDR: MacTxControlLow */
7054 mcl |= TXC_STARTMSDU;
7056 if (!is_multicast_ether_addr(h->addr1))
7057 mcl |= TXC_IMMEDACK;
7059 if (wlc->band->bandtype == BRCM_BAND_5G)
7060 mcl |= TXC_FREQBAND_5G;
7062 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
7065 /* set AMIC bit if using hardware TKIP MIC */
7069 txh->MacTxControlLow = cpu_to_le16(mcl);
7071 /* MacTxControlHigh */
7074 /* Set fallback rate preamble type */
7075 if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
7076 (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
7077 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
7078 mch |= TXC_PREAMBLE_DATA_FB_SHORT;
7081 /* MacFrameControl */
7082 memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
7083 txh->TxFesTimeNormal = cpu_to_le16(0);
7085 txh->TxFesTimeFallback = cpu_to_le16(0);
7088 memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
7091 txh->TxFrameID = cpu_to_le16(frameid);
7094 * TxStatus, Note the case of recreating the first frag of a suppressed
7095 * frame then we may need to reset the retry cnt's via the status reg
7097 txh->TxStatus = cpu_to_le16(status);
7100 * extra fields for ucode AMPDU aggregation, the new fields are added to
7101 * the END of previous structure so that it's compatible in driver.
7103 txh->MaxNMpdus = cpu_to_le16(0);
7104 txh->MaxABytes_MRT = cpu_to_le16(0);
7105 txh->MaxABytes_FBR = cpu_to_le16(0);
7106 txh->MinMBytes = cpu_to_le16(0);
7108 /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7109 * furnish struct d11txh */
7110 /* RTS PLCP header and RTS frame */
7111 if (use_rts || use_cts) {
7112 if (use_rts && use_cts)
7115 for (k = 0; k < 2; k++) {
7116 rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7121 if (!is_ofdm_rate(rts_rspec[0]) &&
7122 !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7123 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7124 rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7125 mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7128 if (!is_ofdm_rate(rts_rspec[1]) &&
7129 !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7130 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7131 rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7132 mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7135 /* RTS/CTS additions to MacTxControlLow */
7137 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7139 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7140 txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7143 /* RTS PLCP header */
7144 rts_plcp = txh->RTSPhyHeader;
7146 rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7148 rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7150 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7152 /* fallback rate version of RTS PLCP header */
7153 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7155 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7156 sizeof(txh->RTSPLCPFallback));
7158 /* RTS frame fields... */
7159 rts = (struct ieee80211_rts *)&txh->rts_frame;
7161 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7162 rspec[0], rts_preamble_type[0],
7163 preamble_type[0], phylen, false);
7164 rts->duration = cpu_to_le16(durid);
7165 /* fallback rate version of RTS DUR field */
7166 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7167 rts_rspec[1], rspec[1],
7168 rts_preamble_type[1],
7169 preamble_type[1], phylen, false);
7170 txh->RTSDurFallback = cpu_to_le16(durid);
7173 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7174 IEEE80211_STYPE_CTS);
7176 memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7178 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7179 IEEE80211_STYPE_RTS);
7181 memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7185 * low 8 bits: main frag rate/mcs,
7186 * high 8 bits: rts/cts rate/mcs
7188 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7190 (struct ofdm_phy_hdr *) rts_plcp) :
7193 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7194 memset((char *)&txh->rts_frame, 0,
7195 sizeof(struct ieee80211_rts));
7196 memset((char *)txh->RTSPLCPFallback, 0,
7197 sizeof(txh->RTSPLCPFallback));
7198 txh->RTSDurFallback = 0;
7201 #ifdef SUPPORT_40MHZ
7202 /* add null delimiter count */
7203 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7204 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7205 brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7210 * Now that RTS/RTS FB preamble types are updated, write
7213 txh->MacTxControlHigh = cpu_to_le16(mch);
7216 * MainRates (both the rts and frag plcp rates have
7217 * been calculated now)
7219 txh->MainRates = cpu_to_le16(mainrates);
7221 /* XtraFrameTypes */
7222 xfts = frametype(rspec[1], wlc->mimoft);
7223 xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7224 xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7225 xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7227 txh->XtraFrameTypes = cpu_to_le16(xfts);
7229 /* PhyTxControlWord */
7230 phyctl = frametype(rspec[0], wlc->mimoft);
7231 if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7232 (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7233 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7234 phyctl |= PHY_TXC_SHORT_HDR;
7237 /* phytxant is properly bit shifted */
7238 phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7239 txh->PhyTxControlWord = cpu_to_le16(phyctl);
7241 /* PhyTxControlWord_1 */
7242 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7245 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7246 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7247 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7248 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7250 if (use_rts || use_cts) {
7251 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7252 txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7253 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7254 txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7258 * For mcs frames, if mixedmode(overloaded with long preamble)
7259 * is going to be set, fill in non-zero MModeLen and/or
7260 * MModeFbrLen it will be unnecessary if they are separated
7262 if (is_mcs_rate(rspec[0]) &&
7263 (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7265 brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7266 txh->MModeLen = cpu_to_le16(mmodelen);
7269 if (is_mcs_rate(rspec[1]) &&
7270 (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7272 brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7273 txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7277 ac = skb_get_queue_mapping(p);
7278 if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7279 uint frag_dur, dur, dur_fallback;
7281 /* WME: Update TXOP threshold */
7282 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7284 brcms_c_calc_frame_time(wlc, rspec[0],
7285 preamble_type[0], phylen);
7288 /* 1 RTS or CTS-to-self frame */
7290 brcms_c_calc_cts_time(wlc, rts_rspec[0],
7291 rts_preamble_type[0]);
7293 brcms_c_calc_cts_time(wlc, rts_rspec[1],
7294 rts_preamble_type[1]);
7295 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7296 dur += le16_to_cpu(rts->duration);
7298 le16_to_cpu(txh->RTSDurFallback);
7299 } else if (use_rifs) {
7303 /* frame + SIFS + ACK */
7306 brcms_c_compute_frame_dur(wlc, rspec[0],
7307 preamble_type[0], 0);
7310 brcms_c_calc_frame_time(wlc, rspec[1],
7314 brcms_c_compute_frame_dur(wlc, rspec[1],
7315 preamble_type[1], 0);
7317 /* NEED to set TxFesTimeNormal (hard) */
7318 txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7320 * NEED to set fallback rate version of
7321 * TxFesTimeNormal (hard)
7323 txh->TxFesTimeFallback =
7324 cpu_to_le16((u16) dur_fallback);
7327 * update txop byte threshold (txop minus intraframe
7330 if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7334 brcms_c_calc_frame_len(wlc,
7335 rspec[0], preamble_type[0],
7336 (wlc->edcf_txop[ac] -
7338 /* range bound the fragthreshold */
7339 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7342 else if (newfragthresh >
7343 wlc->usr_fragthresh)
7345 wlc->usr_fragthresh;
7346 /* update the fragthresh and do txc update */
7347 if (wlc->fragthresh[queue] !=
7348 (u16) newfragthresh)
7349 wlc->fragthresh[queue] =
7350 (u16) newfragthresh;
7352 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7354 wlc->pub->unit, fifo_names[queue],
7355 rspec2rate(rspec[0]));
7358 if (dur > wlc->edcf_txop[ac])
7359 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7360 "exceeded phylen %d/%d dur %d/%d\n",
7361 wlc->pub->unit, __func__,
7363 phylen, wlc->fragthresh[queue],
7364 dur, wlc->edcf_txop[ac]);
7371 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7372 struct ieee80211_hw *hw)
7376 struct scb *scb = &wlc->pri_scb;
7377 struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7380 * 802.11 standard requires management traffic
7381 * to go at highest priority
7383 prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7385 fifo = prio2fifo[prio];
7386 if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7388 brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7389 brcms_c_send_q(wlc);
7392 void brcms_c_send_q(struct brcms_c_info *wlc)
7394 struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7397 int err = 0, i, count;
7399 struct brcms_txq_info *qi = wlc->pkt_queue;
7400 struct pktq *q = &qi->q;
7401 struct ieee80211_tx_info *tx_info;
7403 prec_map = wlc->tx_prec_map;
7405 /* Send all the enq'd pkts that we can.
7406 * Dequeue packets with precedence with empty HW fifo only
7408 while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7409 tx_info = IEEE80211_SKB_CB(pkt[0]);
7410 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7411 err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7414 err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7416 for (i = 0; i < count; i++)
7417 brcms_c_txfifo(wlc, fifo, pkt[i], true,
7422 if (err == -EBUSY) {
7423 brcmu_pktq_penq_head(q, prec, pkt[0]);
7425 * If send failed due to any other reason than a
7426 * change in HW FIFO condition, quit. Otherwise,
7427 * read the new prec_map!
7429 if (prec_map == wlc->tx_prec_map)
7431 prec_map = wlc->tx_prec_map;
7437 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7438 bool commit, s8 txpktpend)
7440 u16 frameid = INVALIDFID;
7443 txh = (struct d11txh *) (p->data);
7445 /* When a BC/MC frame is being committed to the BCMC fifo
7446 * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7448 if (fifo == TX_BCMC_FIFO)
7449 frameid = le16_to_cpu(txh->TxFrameID);
7452 * Bump up pending count for if not using rpc. If rpc is
7453 * used, this will be handled in brcms_b_txfifo()
7456 wlc->core->txpktpend[fifo] += txpktpend;
7457 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7458 txpktpend, wlc->core->txpktpend[fifo]);
7461 /* Commit BCMC sequence number in the SHM frame ID location */
7462 if (frameid != INVALIDFID) {
7464 * To inform the ucode of the last mcast frame posted
7465 * so that it can clear moredata bit
7467 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7470 if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7471 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7475 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7476 bool use_rspec, u16 mimo_ctlchbw)
7481 /* use frame rate as rts rate */
7483 else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7484 /* Use 11Mbps as the g protection RTS target rate and fallback.
7485 * Use the brcms_basic_rate() lookup to find the best basic rate
7486 * under the target in case 11 Mbps is not Basic.
7487 * 6 and 9 Mbps are not usually selected by rate selection, but
7488 * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7491 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7493 /* calculate RTS rate and fallback rate based on the frame rate
7494 * RTS must be sent at a basic rate since it is a
7495 * control frame, sec 9.6 of 802.11 spec
7497 rts_rspec = brcms_basic_rate(wlc, rspec);
7499 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7500 /* set rts txbw to correct side band */
7501 rts_rspec &= ~RSPEC_BW_MASK;
7504 * if rspec/rspec_fallback is 40MHz, then send RTS on both
7505 * 20MHz channel (DUP), otherwise send RTS on control channel
7507 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7508 rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7510 rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7512 /* pick siso/cdd as default for ofdm */
7513 if (is_ofdm_rate(rts_rspec)) {
7514 rts_rspec &= ~RSPEC_STF_MASK;
7515 rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7522 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7524 wlc->core->txpktpend[fifo] -= txpktpend;
7525 BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7526 wlc->core->txpktpend[fifo]);
7528 /* There is more room; mark precedences related to this FIFO sendable */
7529 wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7531 /* figure out which bsscfg is being worked on... */
7534 /* Update beacon listen interval in shared memory */
7535 static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7537 /* wake up every DTIM is the default */
7538 if (wlc->bcn_li_dtim == 1)
7539 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7541 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7542 (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7546 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7549 struct d11regs __iomem *regs = wlc_hw->regs;
7551 /* read the tsf timer low, then high to get an atomic read */
7552 *tsf_l_ptr = R_REG(®s->tsf_timerlow);
7553 *tsf_h_ptr = R_REG(®s->tsf_timerhigh);
7557 * recover 64bit TSF value from the 16bit TSF value in the rx header
7558 * given the assumption that the TSF passed in header is within 65ms
7559 * of the current tsf.
7562 * 3.......6.......8.......0.......2.......4.......6.......8......0
7563 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7565 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7566 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7567 * receive call sequence after rx interrupt. Only the higher 16 bits
7568 * are used. Finally, the tsf_h is read from the tsf register.
7570 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7571 struct d11rxhdr *rxh)
7574 u16 rx_tsf_0_15, rx_tsf_16_31;
7576 brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7578 rx_tsf_16_31 = (u16)(tsf_l >> 16);
7579 rx_tsf_0_15 = rxh->RxTSFTime;
7582 * a greater tsf time indicates the low 16 bits of
7583 * tsf_l wrapped, so decrement the high 16 bits.
7585 if ((u16)tsf_l < rx_tsf_0_15) {
7587 if (rx_tsf_16_31 == 0xffff)
7591 return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7595 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7597 struct ieee80211_rx_status *rx_status)
7602 unsigned char *plcp;
7604 /* fill in TSF and flag its presence */
7605 rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7606 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7608 channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7611 rx_status->band = IEEE80211_BAND_5GHZ;
7612 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7613 WF_CHAN_FACTOR_5_G/2, channel);
7616 rx_status->band = IEEE80211_BAND_2GHZ;
7617 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7620 rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7624 rx_status->antenna =
7625 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7629 rspec = brcms_c_compute_rspec(rxh, plcp);
7630 if (is_mcs_rate(rspec)) {
7631 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7632 rx_status->flag |= RX_FLAG_HT;
7633 if (rspec_is40mhz(rspec))
7634 rx_status->flag |= RX_FLAG_40MHZ;
7636 switch (rspec2rate(rspec)) {
7638 rx_status->rate_idx = 0;
7641 rx_status->rate_idx = 1;
7644 rx_status->rate_idx = 2;
7647 rx_status->rate_idx = 3;
7650 rx_status->rate_idx = 4;
7653 rx_status->rate_idx = 5;
7656 rx_status->rate_idx = 6;
7659 rx_status->rate_idx = 7;
7662 rx_status->rate_idx = 8;
7665 rx_status->rate_idx = 9;
7668 rx_status->rate_idx = 10;
7671 rx_status->rate_idx = 11;
7674 wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7678 * For 5GHz, we should decrease the index as it is
7679 * a subset of the 2.4G rates. See bitrates field
7680 * of brcms_band_5GHz_nphy (in mac80211_if.c).
7682 if (rx_status->band == IEEE80211_BAND_5GHZ)
7683 rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7685 /* Determine short preamble and rate_idx */
7687 if (is_cck_rate(rspec)) {
7688 if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7689 rx_status->flag |= RX_FLAG_SHORTPRE;
7690 } else if (is_ofdm_rate(rspec)) {
7691 rx_status->flag |= RX_FLAG_SHORTPRE;
7693 wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7698 if (plcp3_issgi(plcp[3]))
7699 rx_status->flag |= RX_FLAG_SHORT_GI;
7701 if (rxh->RxStatus1 & RXS_DECERR) {
7702 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7703 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
7706 if (rxh->RxStatus1 & RXS_FCSERR) {
7707 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7708 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n",
7714 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7718 struct ieee80211_rx_status rx_status;
7720 memset(&rx_status, 0, sizeof(rx_status));
7721 prep_mac80211_status(wlc, rxh, p, &rx_status);
7723 /* mac header+body length, exclude CRC and plcp header */
7724 len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7725 skb_pull(p, D11_PHY_HDR_LEN);
7726 __skb_trim(p, len_mpdu);
7728 memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7729 ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7732 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7733 * number of bytes goes in the length field
7735 * Formula given by HT PHY Spec v 1.13
7736 * len = 3(nsyms + nstream + 3) - 3
7739 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
7742 uint nsyms, len = 0, kNdps;
7744 BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
7745 wlc->pub->unit, rspec2rate(ratespec), mac_len);
7747 if (is_mcs_rate(ratespec)) {
7748 uint mcs = ratespec & RSPEC_RATE_MASK;
7749 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
7750 rspec_stc(ratespec);
7753 * the payload duration calculation matches that
7756 /* 1000Ndbps = kbps * 4 */
7757 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
7758 rspec_issgi(ratespec)) * 4;
7760 if (rspec_stc(ratespec) == 0)
7762 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7763 APHY_TAIL_NBITS) * 1000, kNdps);
7765 /* STBC needs to have even number of symbols */
7768 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7769 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
7771 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7772 nsyms += (tot_streams + 3);
7774 * 3 bytes/symbol @ legacy 6Mbps rate
7775 * (-3) excluding service bits and tail bits
7777 len = (3 * nsyms) - 3;
7784 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
7786 const struct brcms_c_rateset *rs_dflt;
7787 struct brcms_c_rateset rs;
7790 u8 plcp[D11_PHY_HDR_LEN];
7794 sifs = get_sifs(wlc->band);
7796 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
7798 brcms_c_rateset_copy(rs_dflt, &rs);
7799 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7802 * walk the phy rate table and update MAC core SHM
7803 * basic rate table entries
7805 for (i = 0; i < rs.count; i++) {
7806 rate = rs.rates[i] & BRCMS_RATE_MASK;
7808 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7810 /* Calculate the Probe Response PLCP for the given rate */
7811 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
7814 * Calculate the duration of the Probe Response
7815 * frame plus SIFS for the MAC
7817 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
7818 BRCMS_LONG_PREAMBLE, frame_len);
7821 /* Update the SHM Rate Table entry Probe Response values */
7822 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7823 (u16) (plcp[0] + (plcp[1] << 8)));
7824 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7825 (u16) (plcp[2] + (plcp[3] << 8)));
7826 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7830 /* Max buffering needed for beacon template/prb resp template is 142 bytes.
7832 * PLCP header is 6 bytes.
7833 * 802.11 A3 header is 24 bytes.
7834 * Max beacon frame body template length is 112 bytes.
7835 * Max probe resp frame body template length is 110 bytes.
7837 * *len on input contains the max length of the packet available.
7839 * The *len value is set to the number of bytes in buf used, and starts
7840 * with the PLCP and included up to, but not including, the 4 byte FCS.
7843 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
7845 struct brcms_bss_cfg *cfg, u16 *buf, int *len)
7847 static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
7848 struct cck_phy_hdr *plcp;
7849 struct ieee80211_mgmt *h;
7850 int hdr_len, body_len;
7852 hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
7854 /* calc buffer size provided for frame body */
7855 body_len = *len - hdr_len;
7856 /* return actual size */
7857 *len = hdr_len + body_len;
7859 /* format PHY and MAC headers */
7860 memset((char *)buf, 0, hdr_len);
7862 plcp = (struct cck_phy_hdr *) buf;
7865 * PLCP for Probe Response frames are filled in from
7868 if (type == IEEE80211_STYPE_BEACON)
7870 brcms_c_compute_plcp(wlc, bcn_rspec,
7871 (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
7874 /* "Regular" and 16 MBSS but not for 4 MBSS */
7875 /* Update the phytxctl for the beacon based on the rspec */
7876 brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
7878 h = (struct ieee80211_mgmt *)&plcp[1];
7880 /* fill in 802.11 header */
7881 h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
7883 /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
7884 /* A1 filled in by MAC for prb resp, broadcast for bcn */
7885 if (type == IEEE80211_STYPE_BEACON)
7886 memcpy(&h->da, ðer_bcast, ETH_ALEN);
7887 memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
7888 memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
7890 /* SEQ filled in by MAC */
7893 int brcms_c_get_header_len(void)
7899 * Update all beacons for the system.
7901 void brcms_c_update_beacon(struct brcms_c_info *wlc)
7903 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7905 if (bsscfg->up && !bsscfg->BSS)
7906 /* Clear the soft intmask */
7907 wlc->defmacintmask &= ~MI_BCNTPL;
7910 /* Write ssid into shared memory */
7912 brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
7914 u8 *ssidptr = cfg->SSID;
7916 u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
7918 /* padding the ssid with zero and copy it into shm */
7919 memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
7920 memcpy(ssidbuf, ssidptr, cfg->SSID_len);
7922 brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
7923 brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
7927 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
7928 struct brcms_bss_cfg *cfg,
7931 u16 prb_resp[BCN_TMPL_LEN / 2];
7932 int len = BCN_TMPL_LEN;
7935 * write the probe response to hardware, or save in
7936 * the config structure
7939 /* create the probe response template */
7940 brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
7941 cfg, prb_resp, &len);
7944 brcms_c_suspend_mac_and_wait(wlc);
7946 /* write the probe response into the template region */
7947 brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
7948 (len + 3) & ~3, prb_resp);
7950 /* write the length of the probe response frame (+PLCP/-FCS) */
7951 brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
7953 /* write the SSID and SSID length */
7954 brcms_c_shm_ssid_upd(wlc, cfg);
7957 * Write PLCP headers and durations for probe response frames
7958 * at all rates. Use the actual frame length covered by the
7959 * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
7960 * by subtracting the PLCP len and adding the FCS.
7962 len += (-D11_PHY_HDR_LEN + FCS_LEN);
7963 brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
7966 brcms_c_enable_mac(wlc);
7969 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
7971 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7973 /* update AP or IBSS probe responses */
7974 if (bsscfg->up && !bsscfg->BSS)
7975 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
7978 /* prepares pdu for transmission. returns BCM error codes */
7979 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
7983 struct ieee80211_hdr *h;
7986 txh = (struct d11txh *) (pdu->data);
7987 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
7989 /* get the pkt queue info. This was put at brcms_c_sendctl or
7990 * brcms_c_send for PDU */
7991 fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
7997 /* return if insufficient dma resources */
7998 if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
7999 /* Mark precedences related to this FIFO, unsendable */
8000 /* A fifo is full. Clear precedences related to that FIFO */
8001 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
8007 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
8013 *blocks = wlc_hw->xmtfifo_sz[fifo];
8019 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
8022 brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
8023 if (match_reg_offset == RCM_BSSID_OFFSET)
8024 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
8028 * Flag 'scan in progress' to withhold dynamic phy calibration
8030 void brcms_c_scan_start(struct brcms_c_info *wlc)
8032 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
8035 void brcms_c_scan_stop(struct brcms_c_info *wlc)
8037 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
8040 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
8042 wlc->pub->associated = state;
8043 wlc->bsscfg->associated = state;
8047 * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
8048 * AMPDU traffic, packets pending in hardware have to be invalidated so that
8049 * when later on hardware releases them, they can be handled appropriately.
8051 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
8052 struct ieee80211_sta *sta,
8053 void (*dma_callback_fn))
8055 struct dma_pub *dmah;
8057 for (i = 0; i < NFIFO; i++) {
8060 dma_walk_packets(dmah, dma_callback_fn, sta);
8064 int brcms_c_get_curband(struct brcms_c_info *wlc)
8066 return wlc->band->bandunit;
8069 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
8071 /* flush packet queue when requested */
8073 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
8075 /* wait for queue and DMA fifos to run dry */
8076 while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0)
8077 brcms_msleep(wlc->wl, 1);
8080 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
8082 wlc->bcn_li_bcn = interval;
8084 brcms_c_bcn_li_upd(wlc);
8087 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
8091 /* Remove override bit and clip to max qdbm value */
8092 qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
8093 return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8096 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8101 wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8103 /* Return qdbm units */
8104 return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8107 void brcms_c_set_radio_mon(struct brcms_c_info *wlc)
8109 brcms_c_radio_mon_upd(wlc);
8112 /* Process received frames */
8114 * Return true if more frames need to be processed. false otherwise.
8115 * Param 'bound' indicates max. # frames to process before break out.
8117 static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8119 struct d11rxhdr *rxh;
8120 struct ieee80211_hdr *h;
8124 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8126 /* frame starts with rxhdr */
8127 rxh = (struct d11rxhdr *) (p->data);
8129 /* strip off rxhdr */
8130 skb_pull(p, BRCMS_HWRXOFF);
8132 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8133 if (rxh->RxStatus1 & RXS_PBPRES) {
8135 wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8136 "len %d\n", wlc->pub->unit, p->len);
8142 h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8145 if (rxh->RxStatus1 & RXS_FCSERR) {
8146 if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) {
8147 wiphy_err(wlc->wiphy, "FCSERR while scanning******* -"
8151 wiphy_err(wlc->wiphy, "RCSERR!!!\n");
8156 /* check received pkt has at least frame control field */
8157 if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8160 /* not supporting A-MSDU */
8161 is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8165 brcms_c_recvctl(wlc, rxh, p);
8169 brcmu_pkt_buf_free_skb(p);
8172 /* Process received frames */
8174 * Return true if more frames need to be processed. false otherwise.
8175 * Param 'bound' indicates max. # frames to process before break out.
8178 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
8181 struct sk_buff *head = NULL;
8182 struct sk_buff *tail = NULL;
8184 uint bound_limit = bound ? RXBND : -1;
8186 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
8187 /* gather received frames */
8188 while ((p = dma_rx(wlc_hw->di[fifo]))) {
8197 /* !give others some time to run! */
8198 if (++n >= bound_limit)
8202 /* post more rbufs */
8203 dma_rxfill(wlc_hw->di[fifo]);
8205 /* process each frame */
8206 while ((p = head) != NULL) {
8207 struct d11rxhdr_le *rxh_le;
8208 struct d11rxhdr *rxh;
8212 rxh_le = (struct d11rxhdr_le *)p->data;
8213 rxh = (struct d11rxhdr *)p->data;
8215 /* fixup rx header endianness */
8216 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
8217 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
8218 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
8219 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
8220 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
8221 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
8222 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
8223 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
8224 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
8225 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
8226 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
8228 brcms_c_recv(wlc_hw->wlc, p);
8231 return n >= bound_limit;
8234 /* second-level interrupt processing
8235 * Return true if another dpc needs to be re-scheduled. false otherwise.
8236 * Param 'bounded' indicates if applicable loops should be bounded.
8238 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
8241 struct brcms_hardware *wlc_hw = wlc->hw;
8242 struct d11regs __iomem *regs = wlc_hw->regs;
8243 struct wiphy *wiphy = wlc->wiphy;
8245 if (brcms_deviceremoved(wlc)) {
8246 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
8248 brcms_down(wlc->wl);
8252 /* grab and clear the saved software intstatus bits */
8253 macintstatus = wlc->macintstatus;
8254 wlc->macintstatus = 0;
8256 BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
8257 wlc_hw->unit, macintstatus);
8259 WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
8262 if (macintstatus & MI_TFS) {
8264 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
8265 wlc->macintstatus |= MI_TFS;
8267 wiphy_err(wiphy, "MI_TFS: fatal\n");
8272 if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
8275 /* ATIM window end */
8276 if (macintstatus & MI_ATIMWINEND) {
8277 BCMMSG(wlc->wiphy, "end of ATIM window\n");
8278 OR_REG(®s->maccommand, wlc->qvalid);
8283 * received data or control frame, MI_DMAINT is
8284 * indication of RX_FIFO interrupt
8286 if (macintstatus & MI_DMAINT)
8287 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
8288 wlc->macintstatus |= MI_DMAINT;
8290 /* noise sample collected */
8291 if (macintstatus & MI_BG_NOISE)
8292 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
8294 if (macintstatus & MI_GP0) {
8295 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
8296 "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
8298 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8299 __func__, wlc_hw->sih->chip,
8300 wlc_hw->sih->chiprev);
8301 brcms_fatal_error(wlc_hw->wlc->wl);
8304 /* gptimer timeout */
8305 if (macintstatus & MI_TO)
8306 W_REG(®s->gptimer, 0);
8308 if (macintstatus & MI_RFDISABLE) {
8309 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
8310 " RF Disable Input\n", wlc_hw->unit);
8311 brcms_rfkill_set_hw_state(wlc->wl);
8314 /* send any enq'd tx packets. Just makes sure to jump start tx */
8315 if (!pktq_empty(&wlc->pkt_queue->q))
8316 brcms_c_send_q(wlc);
8318 /* it isn't done and needs to be resched if macintstatus is non-zero */
8319 return wlc->macintstatus != 0;
8322 brcms_fatal_error(wlc_hw->wlc->wl);
8323 return wlc->macintstatus != 0;
8326 void brcms_c_init(struct brcms_c_info *wlc)
8328 struct d11regs __iomem *regs;
8332 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8337 * This will happen if a big-hammer was executed. In
8338 * that case, we want to go back to the channel that
8339 * we were on and not new channel
8341 if (wlc->pub->associated)
8342 chanspec = wlc->home_chanspec;
8344 chanspec = brcms_c_init_chanspec(wlc);
8346 brcms_b_init(wlc->hw, chanspec, mute);
8348 /* update beacon listen interval */
8349 brcms_c_bcn_li_upd(wlc);
8351 /* write ethernet address to core */
8352 brcms_c_set_mac(wlc->bsscfg);
8353 brcms_c_set_bssid(wlc->bsscfg);
8355 /* Update tsf_cfprep if associated and up */
8356 if (wlc->pub->associated && wlc->bsscfg->up) {
8359 /* get beacon period and convert to uS */
8360 bi = wlc->bsscfg->current_bss->beacon_period << 10;
8362 * update since init path would reset
8365 W_REG(®s->tsf_cfprep,
8366 (bi << CFPREP_CBI_SHIFT));
8368 /* Update maccontrol PM related bits */
8369 brcms_c_set_ps_ctrl(wlc);
8372 brcms_c_bandinit_ordered(wlc, chanspec);
8374 /* init probe response timeout */
8375 brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
8377 /* init max burst txop (framebursting) */
8378 brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
8380 _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
8382 /* initialize maximum allowed duty cycle */
8383 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
8384 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
8387 * Update some shared memory locations related to
8388 * max AMPDU size allowed to received
8390 brcms_c_ampdu_shm_upd(wlc->ampdu);
8392 /* band-specific inits */
8393 brcms_c_bsinit(wlc);
8395 /* Enable EDCF mode (while the MAC is suspended) */
8396 OR_REG(®s->ifs_ctl, IFS_USEEDCF);
8397 brcms_c_edcf_setparams(wlc, false);
8399 /* Init precedence maps for empty FIFOs */
8400 brcms_c_tx_prec_map_init(wlc);
8402 /* read the ucode version if we have not yet done so */
8403 if (wlc->ucode_rev == 0) {
8405 brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
8406 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
8409 /* ..now really unleash hell (allow the MAC out of suspend) */
8410 brcms_c_enable_mac(wlc);
8412 /* clear tx flow control */
8413 brcms_c_txflowcontrol_reset(wlc);
8415 /* enable the RF Disable Delay timer */
8416 W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT);
8419 * Initialize WME parameters; if they haven't been set by some other
8420 * mechanism (IOVar, etc) then read them from the hardware.
8422 if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
8423 /* Uninitialized; read from HW */
8426 for (ac = 0; ac < AC_COUNT; ac++)
8427 wlc->wme_retries[ac] =
8428 brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
8433 * The common driver entry routine. Error codes should be unique
8435 struct brcms_c_info *
8436 brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
8437 bool piomode, void __iomem *regsva, struct pci_dev *btparam,
8440 struct brcms_c_info *wlc;
8443 struct brcms_pub *pub;
8445 /* allocate struct brcms_c_info state and its substructures */
8446 wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device);
8449 wlc->wiphy = wl->wiphy;
8456 wlc->band = wlc->bandstate[0];
8457 wlc->core = wlc->corestate;
8460 pub->_piomode = piomode;
8461 wlc->bandinit_pending = false;
8463 /* populate struct brcms_c_info with default values */
8464 brcms_c_info_init(wlc, unit);
8466 /* update sta/ap related parameters */
8467 brcms_c_ap_upd(wlc);
8470 * low level attach steps(all hw accesses go
8471 * inside, no more in rest of the attach)
8473 err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva,
8478 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
8480 pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
8482 /* disable allowed duty cycle */
8483 wlc->tx_duty_cycle_ofdm = 0;
8484 wlc->tx_duty_cycle_cck = 0;
8486 brcms_c_stf_phy_chain_calc(wlc);
8488 /* txchain 1: txant 0, txchain 2: txant 1 */
8489 if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
8490 wlc->stf->txant = wlc->stf->hw_txchain - 1;
8492 /* push to BMAC driver */
8493 wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
8494 wlc->stf->hw_rxchain);
8496 /* pull up some info resulting from the low attach */
8497 for (i = 0; i < NFIFO; i++)
8498 wlc->core->txavail[i] = wlc->hw->txavail[i];
8500 memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8501 memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8503 for (j = 0; j < wlc->pub->_nbands; j++) {
8504 wlc->band = wlc->bandstate[j];
8506 if (!brcms_c_attach_stf_ant_init(wlc)) {
8511 /* default contention windows size limits */
8512 wlc->band->CWmin = APHY_CWMIN;
8513 wlc->band->CWmax = PHY_CWMAX;
8515 /* init gmode value */
8516 if (wlc->band->bandtype == BRCM_BAND_2G) {
8517 wlc->band->gmode = GMODE_AUTO;
8518 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
8522 /* init _n_enab supported mode */
8523 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8524 pub->_n_enab = SUPPORT_11N;
8525 brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
8527 SUPPORT_11N) ? WL_11N_2x2 :
8531 /* init per-band default rateset, depend on band->gmode */
8532 brcms_default_rateset(wlc, &wlc->band->defrateset);
8534 /* fill in hw_rateset */
8535 brcms_c_rateset_filter(&wlc->band->defrateset,
8536 &wlc->band->hw_rateset, false,
8537 BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
8538 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
8542 * update antenna config due to
8543 * wlc->stf->txant/txchain/ant_rx_ovr change
8545 brcms_c_stf_phy_txant_upd(wlc);
8547 /* attach each modules */
8548 err = brcms_c_attach_module(wlc);
8552 if (!brcms_c_timers_init(wlc, unit)) {
8553 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8559 /* depend on rateset, gmode */
8560 wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8562 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8563 "\n", unit, __func__);
8568 /* init default when all parameters are ready, i.e. ->rateset */
8569 brcms_c_bss_default_init(wlc);
8572 * Complete the wlc default state initializations..
8575 /* allocate our initial queue */
8576 wlc->pkt_queue = brcms_c_txq_alloc(wlc);
8577 if (wlc->pkt_queue == NULL) {
8578 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
8584 wlc->bsscfg->wlc = wlc;
8586 wlc->mimoft = FT_HT;
8587 wlc->mimo_40txbw = AUTO;
8588 wlc->ofdm_40txbw = AUTO;
8589 wlc->cck_40txbw = AUTO;
8590 brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
8592 /* Set default values of SGI */
8593 if (BRCMS_SGI_CAP_PHY(wlc)) {
8594 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8596 } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8597 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8600 brcms_c_ht_update_sgi_rx(wlc, 0);
8603 brcms_c_radio_mon_upd(wlc);
8604 brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8612 wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
8613 unit, __func__, err);
8615 brcms_c_detach(wlc);