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1 /*
2  * Copyright (c) 2010 Broadcom Corporation
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/pci_ids.h>
18 #include <linux/if_ether.h>
19 #include <net/mac80211.h>
20 #include <brcm_hw_ids.h>
21 #include <aiutils.h>
22 #include <chipcommon.h>
23 #include "rate.h"
24 #include "scb.h"
25 #include "phy/phy_hal.h"
26 #include "channel.h"
27 #include "antsel.h"
28 #include "stf.h"
29 #include "ampdu.h"
30 #include "mac80211_if.h"
31 #include "ucode_loader.h"
32 #include "main.h"
33 #include "soc.h"
34
35 /*
36  * Indication for txflowcontrol that all priority bits in
37  * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
38  */
39 #define ALLPRIO                         -1
40
41 /* watchdog timer, in unit of ms */
42 #define TIMER_INTERVAL_WATCHDOG         1000
43 /* radio monitor timer, in unit of ms */
44 #define TIMER_INTERVAL_RADIOCHK         800
45
46 /* Max MPC timeout, in unit of watchdog */
47 #ifndef BRCMS_MPC_MAX_DELAYCNT
48 #define BRCMS_MPC_MAX_DELAYCNT          10
49 #endif
50
51 /* Min MPC timeout, in unit of watchdog */
52 #define BRCMS_MPC_MIN_DELAYCNT          1
53 /* MPC count threshold level */
54 #define BRCMS_MPC_THRESHOLD             3
55
56 /* beacon interval, in unit of 1024TU */
57 #define BEACON_INTERVAL_DEFAULT         100
58
59 /* n-mode support capability */
60 /* 2x2 includes both 1x1 & 2x2 devices
61  * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
62  * control it independently
63  */
64 #define WL_11N_2x2                      1
65 #define WL_11N_3x3                      3
66 #define WL_11N_4x4                      4
67
68 #define EDCF_ACI_MASK                   0x60
69 #define EDCF_ACI_SHIFT                  5
70 #define EDCF_ECWMIN_MASK                0x0f
71 #define EDCF_ECWMAX_SHIFT               4
72 #define EDCF_AIFSN_MASK                 0x0f
73 #define EDCF_AIFSN_MAX                  15
74 #define EDCF_ECWMAX_MASK                0xf0
75
76 #define EDCF_AC_BE_TXOP_STA             0x0000
77 #define EDCF_AC_BK_TXOP_STA             0x0000
78 #define EDCF_AC_VO_ACI_STA              0x62
79 #define EDCF_AC_VO_ECW_STA              0x32
80 #define EDCF_AC_VI_ACI_STA              0x42
81 #define EDCF_AC_VI_ECW_STA              0x43
82 #define EDCF_AC_BK_ECW_STA              0xA4
83 #define EDCF_AC_VI_TXOP_STA             0x005e
84 #define EDCF_AC_VO_TXOP_STA             0x002f
85 #define EDCF_AC_BE_ACI_STA              0x03
86 #define EDCF_AC_BE_ECW_STA              0xA4
87 #define EDCF_AC_BK_ACI_STA              0x27
88 #define EDCF_AC_VO_TXOP_AP              0x002f
89
90 #define EDCF_TXOP2USEC(txop)            ((txop) << 5)
91 #define EDCF_ECW2CW(exp)                ((1 << (exp)) - 1)
92
93 #define APHY_SYMBOL_TIME                4
94 #define APHY_PREAMBLE_TIME              16
95 #define APHY_SIGNAL_TIME                4
96 #define APHY_SIFS_TIME                  16
97 #define APHY_SERVICE_NBITS              16
98 #define APHY_TAIL_NBITS                 6
99 #define BPHY_SIFS_TIME                  10
100 #define BPHY_PLCP_SHORT_TIME            96
101
102 #define PREN_PREAMBLE                   24
103 #define PREN_MM_EXT                     12
104 #define PREN_PREAMBLE_EXT               4
105
106 #define DOT11_MAC_HDR_LEN               24
107 #define DOT11_ACK_LEN                   10
108 #define DOT11_BA_LEN                    4
109 #define DOT11_OFDM_SIGNAL_EXTENSION     6
110 #define DOT11_MIN_FRAG_LEN              256
111 #define DOT11_RTS_LEN                   16
112 #define DOT11_CTS_LEN                   10
113 #define DOT11_BA_BITMAP_LEN             128
114 #define DOT11_MIN_BEACON_PERIOD         1
115 #define DOT11_MAX_BEACON_PERIOD         0xFFFF
116 #define DOT11_MAXNUMFRAGS               16
117 #define DOT11_MAX_FRAG_LEN              2346
118
119 #define BPHY_PLCP_TIME                  192
120 #define RIFS_11N_TIME                   2
121
122 #define AC_BE                           0
123 #define AC_BK                           1
124 #define AC_VI                           2
125 #define AC_VO                           3
126
127 /* length of the BCN template area */
128 #define BCN_TMPL_LEN                    512
129
130 /* brcms_bss_info flag bit values */
131 #define BRCMS_BSS_HT                    0x0020  /* BSS is HT (MIMO) capable */
132
133 /* chip rx buffer offset */
134 #define BRCMS_HWRXOFF                   38
135
136 /* rfdisable delay timer 500 ms, runs of ALP clock */
137 #define RFDISABLE_DEFAULT               10000000
138
139 #define BRCMS_TEMPSENSE_PERIOD          10      /* 10 second timeout */
140
141 /* precedences numbers for wlc queues. These are twice as may levels as
142  * 802.1D priorities.
143  * Odd numbers are used for HI priority traffic at same precedence levels
144  * These constants are used ONLY by wlc_prio2prec_map.  Do not use them
145  * elsewhere.
146  */
147 #define _BRCMS_PREC_NONE                0       /* None = - */
148 #define _BRCMS_PREC_BK                  2       /* BK - Background */
149 #define _BRCMS_PREC_BE                  4       /* BE - Best-effort */
150 #define _BRCMS_PREC_EE                  6       /* EE - Excellent-effort */
151 #define _BRCMS_PREC_CL                  8       /* CL - Controlled Load */
152 #define _BRCMS_PREC_VI                  10      /* Vi - Video */
153 #define _BRCMS_PREC_VO                  12      /* Vo - Voice */
154 #define _BRCMS_PREC_NC                  14      /* NC - Network Control */
155
156 /* synthpu_dly times in us */
157 #define SYNTHPU_DLY_APHY_US             3700
158 #define SYNTHPU_DLY_BPHY_US             1050
159 #define SYNTHPU_DLY_NPHY_US             2048
160 #define SYNTHPU_DLY_LPPHY_US            300
161
162 #define ANTCNT                          10      /* vanilla M_MAX_ANTCNT val */
163
164 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
165 #define EDCF_SHORT_S                    0
166 #define EDCF_SFB_S                      4
167 #define EDCF_LONG_S                     8
168 #define EDCF_LFB_S                      12
169 #define EDCF_SHORT_M                    BITFIELD_MASK(4)
170 #define EDCF_SFB_M                      BITFIELD_MASK(4)
171 #define EDCF_LONG_M                     BITFIELD_MASK(4)
172 #define EDCF_LFB_M                      BITFIELD_MASK(4)
173
174 #define RETRY_SHORT_DEF                 7       /* Default Short retry Limit */
175 #define RETRY_SHORT_MAX                 255     /* Maximum Short retry Limit */
176 #define RETRY_LONG_DEF                  4       /* Default Long retry count */
177 #define RETRY_SHORT_FB                  3       /* Short count for fb rate */
178 #define RETRY_LONG_FB                   2       /* Long count for fb rate */
179
180 #define APHY_CWMIN                      15
181 #define PHY_CWMAX                       1023
182
183 #define EDCF_AIFSN_MIN                  1
184
185 #define FRAGNUM_MASK                    0xF
186
187 #define APHY_SLOT_TIME                  9
188 #define BPHY_SLOT_TIME                  20
189
190 #define WL_SPURAVOID_OFF                0
191 #define WL_SPURAVOID_ON1                1
192 #define WL_SPURAVOID_ON2                2
193
194 /* invalid core flags, use the saved coreflags */
195 #define BRCMS_USE_COREFLAGS             0xffffffff
196
197 /* values for PLCPHdr_override */
198 #define BRCMS_PLCP_AUTO                 -1
199 #define BRCMS_PLCP_SHORT                0
200 #define BRCMS_PLCP_LONG                 1
201
202 /* values for g_protection_override and n_protection_override */
203 #define BRCMS_PROTECTION_AUTO           -1
204 #define BRCMS_PROTECTION_OFF            0
205 #define BRCMS_PROTECTION_ON             1
206 #define BRCMS_PROTECTION_MMHDR_ONLY     2
207 #define BRCMS_PROTECTION_CTS_ONLY       3
208
209 /* values for g_protection_control and n_protection_control */
210 #define BRCMS_PROTECTION_CTL_OFF        0
211 #define BRCMS_PROTECTION_CTL_LOCAL      1
212 #define BRCMS_PROTECTION_CTL_OVERLAP    2
213
214 /* values for n_protection */
215 #define BRCMS_N_PROTECTION_OFF          0
216 #define BRCMS_N_PROTECTION_OPTIONAL     1
217 #define BRCMS_N_PROTECTION_20IN40       2
218 #define BRCMS_N_PROTECTION_MIXEDMODE    3
219
220 /* values for band specific 40MHz capabilities */
221 #define BRCMS_N_BW_20ALL                0
222 #define BRCMS_N_BW_40ALL                1
223 #define BRCMS_N_BW_20IN2G_40IN5G        2
224
225 /* bitflags for SGI support (sgi_rx iovar) */
226 #define BRCMS_N_SGI_20                  0x01
227 #define BRCMS_N_SGI_40                  0x02
228
229 /* defines used by the nrate iovar */
230 /* MSC in use,indicates b0-6 holds an mcs */
231 #define NRATE_MCS_INUSE                 0x00000080
232 /* rate/mcs value */
233 #define NRATE_RATE_MASK                 0x0000007f
234 /* stf mode mask: siso, cdd, stbc, sdm */
235 #define NRATE_STF_MASK                  0x0000ff00
236 /* stf mode shift */
237 #define NRATE_STF_SHIFT                 8
238 /* bit indicate to override mcs only */
239 #define NRATE_OVERRIDE_MCS_ONLY         0x40000000
240 #define NRATE_SGI_MASK                  0x00800000      /* sgi mode */
241 #define NRATE_SGI_SHIFT                 23              /* sgi mode */
242 #define NRATE_LDPC_CODING               0x00400000      /* adv coding in use */
243 #define NRATE_LDPC_SHIFT                22              /* ldpc shift */
244
245 #define NRATE_STF_SISO                  0               /* stf mode SISO */
246 #define NRATE_STF_CDD                   1               /* stf mode CDD */
247 #define NRATE_STF_STBC                  2               /* stf mode STBC */
248 #define NRATE_STF_SDM                   3               /* stf mode SDM */
249
250 #define MAX_DMA_SEGS                    4
251
252 /* Max # of entries in Tx FIFO based on 4kb page size */
253 #define NTXD                            256
254 /* Max # of entries in Rx FIFO based on 4kb page size */
255 #define NRXD                            256
256
257 /* try to keep this # rbufs posted to the chip */
258 #define NRXBUFPOST                      32
259
260 /* data msg txq hiwat mark */
261 #define BRCMS_DATAHIWAT                 50
262
263 /* max # frames to process in brcms_c_recv() */
264 #define RXBND                           8
265 /* max # tx status to process in wlc_txstatus() */
266 #define TXSBND                          8
267
268 /* brcmu_format_flags() bit description structure */
269 struct brcms_c_bit_desc {
270         u32 bit;
271         const char *name;
272 };
273
274 /*
275  * The following table lists the buffer memory allocated to xmt fifos in HW.
276  * the size is in units of 256bytes(one block), total size is HW dependent
277  * ucode has default fifo partition, sw can overwrite if necessary
278  *
279  * This is documented in twiki under the topic UcodeTxFifo. Please ensure
280  * the twiki is updated before making changes.
281  */
282
283 /* Starting corerev for the fifo size table */
284 #define XMTFIFOTBL_STARTREV     20
285
286 struct d11init {
287         __le16 addr;
288         __le16 size;
289         __le32 value;
290 };
291
292 struct edcf_acparam {
293         u8 ACI;
294         u8 ECW;
295         u16 TXOP;
296 } __packed;
297
298 const u8 prio2fifo[NUMPRIO] = {
299         TX_AC_BE_FIFO,          /* 0    BE      AC_BE   Best Effort */
300         TX_AC_BK_FIFO,          /* 1    BK      AC_BK   Background */
301         TX_AC_BK_FIFO,          /* 2    --      AC_BK   Background */
302         TX_AC_BE_FIFO,          /* 3    EE      AC_BE   Best Effort */
303         TX_AC_VI_FIFO,          /* 4    CL      AC_VI   Video */
304         TX_AC_VI_FIFO,          /* 5    VI      AC_VI   Video */
305         TX_AC_VO_FIFO,          /* 6    VO      AC_VO   Voice */
306         TX_AC_VO_FIFO           /* 7    NC      AC_VO   Voice */
307 };
308
309 /* debug/trace */
310 uint brcm_msg_level =
311 #if defined(BCMDBG)
312         LOG_ERROR_VAL;
313 #else
314         0;
315 #endif                          /* BCMDBG */
316
317 /* TX FIFO number to WME/802.1E Access Category */
318 static const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE };
319
320 /* WME/802.1E Access Category to TX FIFO number */
321 static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 };
322
323 /* 802.1D Priority to precedence queue mapping */
324 const u8 wlc_prio2prec_map[] = {
325         _BRCMS_PREC_BE,         /* 0 BE - Best-effort */
326         _BRCMS_PREC_BK,         /* 1 BK - Background */
327         _BRCMS_PREC_NONE,               /* 2 None = - */
328         _BRCMS_PREC_EE,         /* 3 EE - Excellent-effort */
329         _BRCMS_PREC_CL,         /* 4 CL - Controlled Load */
330         _BRCMS_PREC_VI,         /* 5 Vi - Video */
331         _BRCMS_PREC_VO,         /* 6 Vo - Voice */
332         _BRCMS_PREC_NC,         /* 7 NC - Network Control */
333 };
334
335 static const u16 xmtfifo_sz[][NFIFO] = {
336         /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
337         {20, 192, 192, 21, 17, 5},
338         /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
339         {9, 58, 22, 14, 14, 5},
340         /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
341         {20, 192, 192, 21, 17, 5},
342         /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
343         {20, 192, 192, 21, 17, 5},
344         /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
345         {9, 58, 22, 14, 14, 5},
346 };
347
348 #ifdef BCMDBG
349 static const char * const fifo_names[] = {
350         "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
351 #else
352 static const char fifo_names[6][0];
353 #endif
354
355 #ifdef BCMDBG
356 /* pointer to most recently allocated wl/wlc */
357 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
358 #endif
359
360 /* Find basic rate for a given rate */
361 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
362 {
363         if (is_mcs_rate(rspec))
364                 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
365                        .leg_ofdm];
366         return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
367 }
368
369 static u16 frametype(u32 rspec, u8 mimoframe)
370 {
371         if (is_mcs_rate(rspec))
372                 return mimoframe;
373         return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
374 }
375
376 /* currently the best mechanism for determining SIFS is the band in use */
377 static u16 get_sifs(struct brcms_band *band)
378 {
379         return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
380                                  BPHY_SIFS_TIME;
381 }
382
383 /*
384  * Detect Card removed.
385  * Even checking an sbconfig register read will not false trigger when the core
386  * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
387  * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
388  * reg with fixed 0/1 pattern (some platforms return all 0).
389  * If clocks are present, call the sb routine which will figure out if the
390  * device is removed.
391  */
392 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
393 {
394         if (!wlc->hw->clk)
395                 return ai_deviceremoved(wlc->hw->sih);
396         return (R_REG(&wlc->hw->regs->maccontrol) &
397                 (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
398 }
399
400 /* sum the individual fifo tx pending packet counts */
401 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
402 {
403         return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
404                wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
405 }
406
407 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
408 {
409         return wlc->pub->_nbands > 1 && !wlc->bandlocked;
410 }
411
412 static int brcms_chspec_bw(u16 chanspec)
413 {
414         if (CHSPEC_IS40(chanspec))
415                 return BRCMS_40_MHZ;
416         if (CHSPEC_IS20(chanspec))
417                 return BRCMS_20_MHZ;
418
419         return BRCMS_10_MHZ;
420 }
421
422 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
423 {
424         if (cfg == NULL)
425                 return;
426
427         kfree(cfg->current_bss);
428         kfree(cfg);
429 }
430
431 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
432 {
433         if (wlc == NULL)
434                 return;
435
436         brcms_c_bsscfg_mfree(wlc->bsscfg);
437         kfree(wlc->pub);
438         kfree(wlc->modulecb);
439         kfree(wlc->default_bss);
440         kfree(wlc->protection);
441         kfree(wlc->stf);
442         kfree(wlc->bandstate[0]);
443         kfree(wlc->corestate->macstat_snapshot);
444         kfree(wlc->corestate);
445         kfree(wlc->hw->bandstate[0]);
446         kfree(wlc->hw);
447
448         /* free the wlc */
449         kfree(wlc);
450         wlc = NULL;
451 }
452
453 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
454 {
455         struct brcms_bss_cfg *cfg;
456
457         cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
458         if (cfg == NULL)
459                 goto fail;
460
461         cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
462         if (cfg->current_bss == NULL)
463                 goto fail;
464
465         return cfg;
466
467  fail:
468         brcms_c_bsscfg_mfree(cfg);
469         return NULL;
470 }
471
472 static struct brcms_c_info *
473 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
474 {
475         struct brcms_c_info *wlc;
476
477         wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
478         if (wlc == NULL) {
479                 *err = 1002;
480                 goto fail;
481         }
482
483         /* allocate struct brcms_c_pub state structure */
484         wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
485         if (wlc->pub == NULL) {
486                 *err = 1003;
487                 goto fail;
488         }
489         wlc->pub->wlc = wlc;
490
491         /* allocate struct brcms_hardware state structure */
492
493         wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
494         if (wlc->hw == NULL) {
495                 *err = 1005;
496                 goto fail;
497         }
498         wlc->hw->wlc = wlc;
499
500         wlc->hw->bandstate[0] =
501                 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
502         if (wlc->hw->bandstate[0] == NULL) {
503                 *err = 1006;
504                 goto fail;
505         } else {
506                 int i;
507
508                 for (i = 1; i < MAXBANDS; i++)
509                         wlc->hw->bandstate[i] = (struct brcms_hw_band *)
510                             ((unsigned long)wlc->hw->bandstate[0] +
511                              (sizeof(struct brcms_hw_band) * i));
512         }
513
514         wlc->modulecb =
515                 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
516         if (wlc->modulecb == NULL) {
517                 *err = 1009;
518                 goto fail;
519         }
520
521         wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
522         if (wlc->default_bss == NULL) {
523                 *err = 1010;
524                 goto fail;
525         }
526
527         wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
528         if (wlc->bsscfg == NULL) {
529                 *err = 1011;
530                 goto fail;
531         }
532
533         wlc->protection = kzalloc(sizeof(struct brcms_protection),
534                                   GFP_ATOMIC);
535         if (wlc->protection == NULL) {
536                 *err = 1016;
537                 goto fail;
538         }
539
540         wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
541         if (wlc->stf == NULL) {
542                 *err = 1017;
543                 goto fail;
544         }
545
546         wlc->bandstate[0] =
547                 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
548         if (wlc->bandstate[0] == NULL) {
549                 *err = 1025;
550                 goto fail;
551         } else {
552                 int i;
553
554                 for (i = 1; i < MAXBANDS; i++)
555                         wlc->bandstate[i] = (struct brcms_band *)
556                                 ((unsigned long)wlc->bandstate[0]
557                                 + (sizeof(struct brcms_band)*i));
558         }
559
560         wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
561         if (wlc->corestate == NULL) {
562                 *err = 1026;
563                 goto fail;
564         }
565
566         wlc->corestate->macstat_snapshot =
567                 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
568         if (wlc->corestate->macstat_snapshot == NULL) {
569                 *err = 1027;
570                 goto fail;
571         }
572
573         return wlc;
574
575  fail:
576         brcms_c_detach_mfree(wlc);
577         return NULL;
578 }
579
580 /*
581  * Update the slot timing for standard 11b/g (20us slots)
582  * or shortslot 11g (9us slots)
583  * The PSM needs to be suspended for this call.
584  */
585 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
586                                         bool shortslot)
587 {
588         struct d11regs __iomem *regs;
589
590         regs = wlc_hw->regs;
591
592         if (shortslot) {
593                 /* 11g short slot: 11a timing */
594                 W_REG(&regs->ifs_slot, 0x0207); /* APHY_SLOT_TIME */
595                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
596         } else {
597                 /* 11g long slot: 11b timing */
598                 W_REG(&regs->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */
599                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
600         }
601 }
602
603 /*
604  * calculate frame duration of a given rate and length, return
605  * time in usec unit
606  */
607 static uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
608                                     u8 preamble_type, uint mac_len)
609 {
610         uint nsyms, dur = 0, Ndps, kNdps;
611         uint rate = rspec2rate(ratespec);
612
613         if (rate == 0) {
614                 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
615                           wlc->pub->unit);
616                 rate = BRCM_RATE_1M;
617         }
618
619         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
620                  wlc->pub->unit, ratespec, preamble_type, mac_len);
621
622         if (is_mcs_rate(ratespec)) {
623                 uint mcs = ratespec & RSPEC_RATE_MASK;
624                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
625
626                 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
627                 if (preamble_type == BRCMS_MM_PREAMBLE)
628                         dur += PREN_MM_EXT;
629                 /* 1000Ndbps = kbps * 4 */
630                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
631                                    rspec_issgi(ratespec)) * 4;
632
633                 if (rspec_stc(ratespec) == 0)
634                         nsyms =
635                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
636                                   APHY_TAIL_NBITS) * 1000, kNdps);
637                 else
638                         /* STBC needs to have even number of symbols */
639                         nsyms =
640                             2 *
641                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
642                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
643
644                 dur += APHY_SYMBOL_TIME * nsyms;
645                 if (wlc->band->bandtype == BRCM_BAND_2G)
646                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
647         } else if (is_ofdm_rate(rate)) {
648                 dur = APHY_PREAMBLE_TIME;
649                 dur += APHY_SIGNAL_TIME;
650                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
651                 Ndps = rate * 2;
652                 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
653                 nsyms =
654                     CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
655                          Ndps);
656                 dur += APHY_SYMBOL_TIME * nsyms;
657                 if (wlc->band->bandtype == BRCM_BAND_2G)
658                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
659         } else {
660                 /*
661                  * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
662                  * will divide out
663                  */
664                 mac_len = mac_len * 8 * 2;
665                 /* calc ceiling of bits/rate = microseconds of air time */
666                 dur = (mac_len + rate - 1) / rate;
667                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
668                         dur += BPHY_PLCP_SHORT_TIME;
669                 else
670                         dur += BPHY_PLCP_TIME;
671         }
672         return dur;
673 }
674
675 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
676                                 const struct d11init *inits)
677 {
678         int i;
679         u8 __iomem *base;
680         u8 __iomem *addr;
681         u16 size;
682         u32 value;
683
684         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
685
686         base = (u8 __iomem *)wlc_hw->regs;
687
688         for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
689                 size = le16_to_cpu(inits[i].size);
690                 addr = base + le16_to_cpu(inits[i].addr);
691                 value = le32_to_cpu(inits[i].value);
692                 if (size == 2)
693                         W_REG((u16 __iomem *)addr, value);
694                 else if (size == 4)
695                         W_REG((u32 __iomem *)addr, value);
696                 else
697                         break;
698         }
699 }
700
701 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
702 {
703         u8 idx;
704         u16 addr[] = {
705                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
706                 M_HOST_FLAGS5
707         };
708
709         for (idx = 0; idx < MHFMAX; idx++)
710                 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
711 }
712
713 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
714 {
715         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
716         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
717
718         /* init microcode host flags */
719         brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
720
721         /* do band-specific ucode IHR, SHM, and SCR inits */
722         if (D11REV_IS(wlc_hw->corerev, 23)) {
723                 if (BRCMS_ISNPHY(wlc_hw->band))
724                         brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
725                 else
726                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
727                                   " %d\n", __func__, wlc_hw->unit,
728                                   wlc_hw->corerev);
729         } else {
730                 if (D11REV_IS(wlc_hw->corerev, 24)) {
731                         if (BRCMS_ISLCNPHY(wlc_hw->band))
732                                 brcms_c_write_inits(wlc_hw,
733                                                     ucode->d11lcn0bsinitvals24);
734                         else
735                                 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
736                                           " core rev %d\n", __func__,
737                                           wlc_hw->unit, wlc_hw->corerev);
738                 } else {
739                         wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
740                                 __func__, wlc_hw->unit, wlc_hw->corerev);
741                 }
742         }
743 }
744
745 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
746 {
747         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
748
749         wlc_hw->phyclk = clk;
750
751         if (OFF == clk) {       /* clear gmode bit, put phy into reset */
752
753                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE),
754                                (SICF_PRST | SICF_FGC));
755                 udelay(1);
756                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST);
757                 udelay(1);
758
759         } else {                /* take phy out of reset */
760
761                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC);
762                 udelay(1);
763                 ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0);
764                 udelay(1);
765
766         }
767 }
768
769 /* low-level band switch utility routine */
770 static void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
771 {
772         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
773                 bandunit);
774
775         wlc_hw->band = wlc_hw->bandstate[bandunit];
776
777         /*
778          * BMAC_NOTE:
779          *   until we eliminate need for wlc->band refs in low level code
780          */
781         wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
782
783         /* set gmode core flag */
784         if (wlc_hw->sbclk && !wlc_hw->noreset)
785                 ai_core_cflags(wlc_hw->sih, SICF_GMODE,
786                                ((bandunit == 0) ? SICF_GMODE : 0));
787 }
788
789 /* switch to new band but leave it inactive */
790 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
791 {
792         struct brcms_hardware *wlc_hw = wlc->hw;
793         u32 macintmask;
794
795         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
796
797         WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
798
799         /* disable interrupts */
800         macintmask = brcms_intrsoff(wlc->wl);
801
802         /* radio off */
803         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
804
805         brcms_b_core_phy_clk(wlc_hw, OFF);
806
807         brcms_c_setxband(wlc_hw, bandunit);
808
809         return macintmask;
810 }
811
812 /* process an individual struct tx_status */
813 static bool
814 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
815 {
816         struct sk_buff *p;
817         uint queue;
818         struct d11txh *txh;
819         struct scb *scb = NULL;
820         bool free_pdu;
821         int tx_rts, tx_frame_count, tx_rts_count;
822         uint totlen, supr_status;
823         bool lastframe;
824         struct ieee80211_hdr *h;
825         u16 mcl;
826         struct ieee80211_tx_info *tx_info;
827         struct ieee80211_tx_rate *txrate;
828         int i;
829
830         /* discard intermediate indications for ucode with one legitimate case:
831          *   e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
832          *   but the subsequent tx of DATA failed. so it will start rts/cts
833          *   from the beginning (resetting the rts transmission count)
834          */
835         if (!(txs->status & TX_STATUS_AMPDU)
836             && (txs->status & TX_STATUS_INTERMEDIATE)) {
837                 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
838                           __func__);
839                 return false;
840         }
841
842         queue = txs->frameid & TXFID_QUEUE_MASK;
843         if (queue >= NFIFO) {
844                 p = NULL;
845                 goto fatal;
846         }
847
848         p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
849         if (p == NULL)
850                 goto fatal;
851
852         txh = (struct d11txh *) (p->data);
853         mcl = le16_to_cpu(txh->MacTxControlLow);
854
855         if (txs->phyerr) {
856                 if (brcm_msg_level & LOG_ERROR_VAL) {
857                         wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
858                                   txs->phyerr, txh->MainRates);
859                         brcms_c_print_txdesc(txh);
860                 }
861                 brcms_c_print_txstatus(txs);
862         }
863
864         if (txs->frameid != le16_to_cpu(txh->TxFrameID))
865                 goto fatal;
866         tx_info = IEEE80211_SKB_CB(p);
867         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
868
869         if (tx_info->control.sta)
870                 scb = &wlc->pri_scb;
871
872         if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
873                 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
874                 return false;
875         }
876
877         supr_status = txs->status & TX_STATUS_SUPR_MASK;
878         if (supr_status == TX_STATUS_SUPR_BADCH)
879                 BCMMSG(wlc->wiphy,
880                        "%s: Pkt tx suppressed, possibly channel %d\n",
881                        __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
882
883         tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
884         tx_frame_count =
885             (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
886         tx_rts_count =
887             (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
888
889         lastframe = !ieee80211_has_morefrags(h->frame_control);
890
891         if (!lastframe) {
892                 wiphy_err(wlc->wiphy, "Not last frame!\n");
893         } else {
894                 /*
895                  * Set information to be consumed by Minstrel ht.
896                  *
897                  * The "fallback limit" is the number of tx attempts a given
898                  * MPDU is sent at the "primary" rate. Tx attempts beyond that
899                  * limit are sent at the "secondary" rate.
900                  * A 'short frame' does not exceed RTS treshold.
901                  */
902                 u16 sfbl,       /* Short Frame Rate Fallback Limit */
903                     lfbl,       /* Long Frame Rate Fallback Limit */
904                     fbl;
905
906                 if (queue < AC_COUNT) {
907                         sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
908                                       EDCF_SFB);
909                         lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
910                                       EDCF_LFB);
911                 } else {
912                         sfbl = wlc->SFBL;
913                         lfbl = wlc->LFBL;
914                 }
915
916                 txrate = tx_info->status.rates;
917                 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
918                         fbl = lfbl;
919                 else
920                         fbl = sfbl;
921
922                 ieee80211_tx_info_clear_status(tx_info);
923
924                 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
925                         /*
926                          * rate selection requested a fallback rate
927                          * and we used it
928                          */
929                         txrate[0].count = fbl;
930                         txrate[1].count = tx_frame_count - fbl;
931                 } else {
932                         /*
933                          * rate selection did not request fallback rate, or
934                          * we didn't need it
935                          */
936                         txrate[0].count = tx_frame_count;
937                         /*
938                          * rc80211_minstrel.c:minstrel_tx_status() expects
939                          * unused rates to be marked with idx = -1
940                          */
941                         txrate[1].idx = -1;
942                         txrate[1].count = 0;
943                 }
944
945                 /* clear the rest of the rates */
946                 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
947                         txrate[i].idx = -1;
948                         txrate[i].count = 0;
949                 }
950
951                 if (txs->status & TX_STATUS_ACK_RCV)
952                         tx_info->flags |= IEEE80211_TX_STAT_ACK;
953         }
954
955         totlen = brcmu_pkttotlen(p);
956         free_pdu = true;
957
958         brcms_c_txfifo_complete(wlc, queue, 1);
959
960         if (lastframe) {
961                 p->next = NULL;
962                 p->prev = NULL;
963                 /* remove PLCP & Broadcom tx descriptor header */
964                 skb_pull(p, D11_PHY_HDR_LEN);
965                 skb_pull(p, D11_TXH_LEN);
966                 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
967         } else {
968                 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
969                           "tx_status\n", __func__);
970         }
971
972         return false;
973
974  fatal:
975         if (p)
976                 brcmu_pkt_buf_free_skb(p);
977
978         return true;
979
980 }
981
982 /* process tx completion events in BMAC
983  * Return true if more tx status need to be processed. false otherwise.
984  */
985 static bool
986 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
987 {
988         bool morepending = false;
989         struct brcms_c_info *wlc = wlc_hw->wlc;
990         struct d11regs __iomem *regs;
991         struct tx_status txstatus, *txs;
992         u32 s1, s2;
993         uint n = 0;
994         /*
995          * Param 'max_tx_num' indicates max. # tx status to process before
996          * break out.
997          */
998         uint max_tx_num = bound ? TXSBND : -1;
999
1000         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1001
1002         txs = &txstatus;
1003         regs = wlc_hw->regs;
1004         *fatal = false;
1005         while (!(*fatal)
1006                && (s1 = R_REG(&regs->frmtxstatus)) & TXS_V) {
1007
1008                 if (s1 == 0xffffffff) {
1009                         wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1010                                 wlc_hw->unit, __func__);
1011                         return morepending;
1012                 }
1013
1014                 s2 = R_REG(&regs->frmtxstatus2);
1015
1016                 txs->status = s1 & TXS_STATUS_MASK;
1017                 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1018                 txs->sequence = s2 & TXS_SEQ_MASK;
1019                 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1020                 txs->lasttxtime = 0;
1021
1022                 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1023
1024                 /* !give others some time to run! */
1025                 if (++n >= max_tx_num)
1026                         break;
1027         }
1028
1029         if (*fatal)
1030                 return 0;
1031
1032         if (n >= max_tx_num)
1033                 morepending = true;
1034
1035         if (!pktq_empty(&wlc->pkt_queue->q))
1036                 brcms_c_send_q(wlc);
1037
1038         return morepending;
1039 }
1040
1041 static void brcms_c_tbtt(struct brcms_c_info *wlc)
1042 {
1043         if (!wlc->bsscfg->BSS)
1044                 /*
1045                  * DirFrmQ is now valid...defer setting until end
1046                  * of ATIM window
1047                  */
1048                 wlc->qvalid |= MCMD_DIRFRMQVAL;
1049 }
1050
1051 /* set initial host flags value */
1052 static void
1053 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1054 {
1055         struct brcms_hardware *wlc_hw = wlc->hw;
1056
1057         memset(mhfs, 0, MHFMAX * sizeof(u16));
1058
1059         mhfs[MHF2] |= mhf2_init;
1060
1061         /* prohibit use of slowclock on multifunction boards */
1062         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1063                 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1064
1065         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1066                 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1067                 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1068         }
1069 }
1070
1071 static struct dma64regs __iomem *
1072 dmareg(struct brcms_hardware *hw, uint direction, uint fifonum)
1073 {
1074         if (direction == DMA_TX)
1075                 return &(hw->regs->fifo64regs[fifonum].dmaxmt);
1076         return &(hw->regs->fifo64regs[fifonum].dmarcv);
1077 }
1078
1079 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1080 {
1081         uint i;
1082         char name[8];
1083         /*
1084          * ucode host flag 2 needed for pio mode, independent of band and fifo
1085          */
1086         u16 pio_mhf2 = 0;
1087         struct brcms_hardware *wlc_hw = wlc->hw;
1088         uint unit = wlc_hw->unit;
1089         struct wiphy *wiphy = wlc->wiphy;
1090
1091         /* name and offsets for dma_attach */
1092         snprintf(name, sizeof(name), "wl%d", unit);
1093
1094         if (wlc_hw->di[0] == NULL) {    /* Init FIFOs */
1095                 int dma_attach_err = 0;
1096
1097                 /*
1098                  * FIFO 0
1099                  * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1100                  * RX: RX_FIFO (RX data packets)
1101                  */
1102                 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih,
1103                                            (wme ? dmareg(wlc_hw, DMA_TX, 0) :
1104                                             NULL), dmareg(wlc_hw, DMA_RX, 0),
1105                                            (wme ? NTXD : 0), NRXD,
1106                                            RXBUFSZ, -1, NRXBUFPOST,
1107                                            BRCMS_HWRXOFF, &brcm_msg_level);
1108                 dma_attach_err |= (NULL == wlc_hw->di[0]);
1109
1110                 /*
1111                  * FIFO 1
1112                  * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1113                  *   (legacy) TX_DATA_FIFO (TX data packets)
1114                  * RX: UNUSED
1115                  */
1116                 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih,
1117                                            dmareg(wlc_hw, DMA_TX, 1), NULL,
1118                                            NTXD, 0, 0, -1, 0, 0,
1119                                            &brcm_msg_level);
1120                 dma_attach_err |= (NULL == wlc_hw->di[1]);
1121
1122                 /*
1123                  * FIFO 2
1124                  * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1125                  * RX: UNUSED
1126                  */
1127                 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih,
1128                                            dmareg(wlc_hw, DMA_TX, 2), NULL,
1129                                            NTXD, 0, 0, -1, 0, 0,
1130                                            &brcm_msg_level);
1131                 dma_attach_err |= (NULL == wlc_hw->di[2]);
1132                 /*
1133                  * FIFO 3
1134                  * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1135                  *   (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1136                  */
1137                 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih,
1138                                            dmareg(wlc_hw, DMA_TX, 3),
1139                                            NULL, NTXD, 0, 0, -1,
1140                                            0, 0, &brcm_msg_level);
1141                 dma_attach_err |= (NULL == wlc_hw->di[3]);
1142 /* Cleaner to leave this as if with AP defined */
1143
1144                 if (dma_attach_err) {
1145                         wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1146                                   "\n", unit);
1147                         return false;
1148                 }
1149
1150                 /* get pointer to dma engine tx flow control variable */
1151                 for (i = 0; i < NFIFO; i++)
1152                         if (wlc_hw->di[i])
1153                                 wlc_hw->txavail[i] =
1154                                     (uint *) dma_getvar(wlc_hw->di[i],
1155                                                         "&txavail");
1156         }
1157
1158         /* initial ucode host flags */
1159         brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1160
1161         return true;
1162 }
1163
1164 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1165 {
1166         uint j;
1167
1168         for (j = 0; j < NFIFO; j++) {
1169                 if (wlc_hw->di[j]) {
1170                         dma_detach(wlc_hw->di[j]);
1171                         wlc_hw->di[j] = NULL;
1172                 }
1173         }
1174 }
1175
1176 /*
1177  * Initialize brcms_c_info default values ...
1178  * may get overrides later in this function
1179  *  BMAC_NOTES, move low out and resolve the dangling ones
1180  */
1181 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1182 {
1183         struct brcms_c_info *wlc = wlc_hw->wlc;
1184
1185         /* set default sw macintmask value */
1186         wlc->defmacintmask = DEF_MACINTMASK;
1187
1188         /* various 802.11g modes */
1189         wlc_hw->shortslot = false;
1190
1191         wlc_hw->SFBL = RETRY_SHORT_FB;
1192         wlc_hw->LFBL = RETRY_LONG_FB;
1193
1194         /* default mac retry limits */
1195         wlc_hw->SRL = RETRY_SHORT_DEF;
1196         wlc_hw->LRL = RETRY_LONG_DEF;
1197         wlc_hw->chanspec = ch20mhz_chspec(1);
1198 }
1199
1200 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1201 {
1202         /* delay before first read of ucode state */
1203         udelay(40);
1204
1205         /* wait until ucode is no longer asleep */
1206         SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1207                   DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1208 }
1209
1210 /* control chip clock to save power, enable dynamic clock or force fast clock */
1211 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1212 {
1213         if (wlc_hw->sih->cccaps & CC_CAP_PMU) {
1214                 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1215                  * on backplane, but mac core will still run on ALP(not HT) when
1216                  * it enters powersave mode, which means the FCA bit may not be
1217                  * set. Should wakeup mac if driver wants it to run on HT.
1218                  */
1219
1220                 if (wlc_hw->clk) {
1221                         if (mode == CLK_FAST) {
1222                                 OR_REG(&wlc_hw->regs->clk_ctl_st,
1223                                        CCS_FORCEHT);
1224
1225                                 udelay(64);
1226
1227                                 SPINWAIT(((R_REG
1228                                            (&wlc_hw->regs->
1229                                             clk_ctl_st) & CCS_HTAVAIL) == 0),
1230                                          PMU_MAX_TRANSITION_DLY);
1231                                 WARN_ON(!(R_REG
1232                                           (&wlc_hw->regs->
1233                                            clk_ctl_st) & CCS_HTAVAIL));
1234                         } else {
1235                                 if ((wlc_hw->sih->pmurev == 0) &&
1236                                     (R_REG
1237                                      (&wlc_hw->regs->
1238                                       clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ)))
1239                                         SPINWAIT(((R_REG
1240                                                    (&wlc_hw->regs->
1241                                                     clk_ctl_st) & CCS_HTAVAIL)
1242                                                   == 0),
1243                                                  PMU_MAX_TRANSITION_DLY);
1244                                 AND_REG(&wlc_hw->regs->clk_ctl_st,
1245                                         ~CCS_FORCEHT);
1246                         }
1247                 }
1248                 wlc_hw->forcefastclk = (mode == CLK_FAST);
1249         } else {
1250
1251                 /* old chips w/o PMU, force HT through cc,
1252                  * then use FCA to verify mac is running fast clock
1253                  */
1254
1255                 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1256
1257                 /* check fast clock is available (if core is not in reset) */
1258                 if (wlc_hw->forcefastclk && wlc_hw->clk)
1259                         WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) &
1260                                   SISF_FCLKA));
1261
1262                 /*
1263                  * keep the ucode wake bit on if forcefastclk is on since we
1264                  * do not want ucode to put us back to slow clock when it dozes
1265                  * for PM mode. Code below matches the wake override bit with
1266                  * current forcefastclk state. Only setting bit in wake_override
1267                  * instead of waking ucode immediately since old code had this
1268                  * behavior. Older code set wlc->forcefastclk but only had the
1269                  * wake happen if the wakup_ucode work (protected by an up
1270                  * check) was executed just below.
1271                  */
1272                 if (wlc_hw->forcefastclk)
1273                         mboolset(wlc_hw->wake_override,
1274                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1275                 else
1276                         mboolclr(wlc_hw->wake_override,
1277                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1278         }
1279 }
1280
1281 /* set or clear ucode host flag bits
1282  * it has an optimization for no-change write
1283  * it only writes through shared memory when the core has clock;
1284  * pre-CLK changes should use wlc_write_mhf to get around the optimization
1285  *
1286  *
1287  * bands values are: BRCM_BAND_AUTO <--- Current band only
1288  *                   BRCM_BAND_5G   <--- 5G band only
1289  *                   BRCM_BAND_2G   <--- 2G band only
1290  *                   BRCM_BAND_ALL  <--- All bands
1291  */
1292 void
1293 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1294              int bands)
1295 {
1296         u16 save;
1297         u16 addr[MHFMAX] = {
1298                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1299                 M_HOST_FLAGS5
1300         };
1301         struct brcms_hw_band *band;
1302
1303         if ((val & ~mask) || idx >= MHFMAX)
1304                 return; /* error condition */
1305
1306         switch (bands) {
1307                 /* Current band only or all bands,
1308                  * then set the band to current band
1309                  */
1310         case BRCM_BAND_AUTO:
1311         case BRCM_BAND_ALL:
1312                 band = wlc_hw->band;
1313                 break;
1314         case BRCM_BAND_5G:
1315                 band = wlc_hw->bandstate[BAND_5G_INDEX];
1316                 break;
1317         case BRCM_BAND_2G:
1318                 band = wlc_hw->bandstate[BAND_2G_INDEX];
1319                 break;
1320         default:
1321                 band = NULL;    /* error condition */
1322         }
1323
1324         if (band) {
1325                 save = band->mhfs[idx];
1326                 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1327
1328                 /* optimization: only write through if changed, and
1329                  * changed band is the current band
1330                  */
1331                 if (wlc_hw->clk && (band->mhfs[idx] != save)
1332                     && (band == wlc_hw->band))
1333                         brcms_b_write_shm(wlc_hw, addr[idx],
1334                                            (u16) band->mhfs[idx]);
1335         }
1336
1337         if (bands == BRCM_BAND_ALL) {
1338                 wlc_hw->bandstate[0]->mhfs[idx] =
1339                     (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1340                 wlc_hw->bandstate[1]->mhfs[idx] =
1341                     (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1342         }
1343 }
1344
1345 /* set the maccontrol register to desired reset state and
1346  * initialize the sw cache of the register
1347  */
1348 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1349 {
1350         /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1351         wlc_hw->maccontrol = 0;
1352         wlc_hw->suspended_fifos = 0;
1353         wlc_hw->wake_override = 0;
1354         wlc_hw->mute_override = 0;
1355         brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1356 }
1357
1358 /*
1359  * write the software state of maccontrol and
1360  * overrides to the maccontrol register
1361  */
1362 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1363 {
1364         u32 maccontrol = wlc_hw->maccontrol;
1365
1366         /* OR in the wake bit if overridden */
1367         if (wlc_hw->wake_override)
1368                 maccontrol |= MCTL_WAKE;
1369
1370         /* set AP and INFRA bits for mute if needed */
1371         if (wlc_hw->mute_override) {
1372                 maccontrol &= ~(MCTL_AP);
1373                 maccontrol |= MCTL_INFRA;
1374         }
1375
1376         W_REG(&wlc_hw->regs->maccontrol, maccontrol);
1377 }
1378
1379 /* set or clear maccontrol bits */
1380 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1381 {
1382         u32 maccontrol;
1383         u32 new_maccontrol;
1384
1385         if (val & ~mask)
1386                 return; /* error condition */
1387         maccontrol = wlc_hw->maccontrol;
1388         new_maccontrol = (maccontrol & ~mask) | val;
1389
1390         /* if the new maccontrol value is the same as the old, nothing to do */
1391         if (new_maccontrol == maccontrol)
1392                 return;
1393
1394         /* something changed, cache the new value */
1395         wlc_hw->maccontrol = new_maccontrol;
1396
1397         /* write the new values with overrides applied */
1398         brcms_c_mctrl_write(wlc_hw);
1399 }
1400
1401 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1402                                  u32 override_bit)
1403 {
1404         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1405                 mboolset(wlc_hw->wake_override, override_bit);
1406                 return;
1407         }
1408
1409         mboolset(wlc_hw->wake_override, override_bit);
1410
1411         brcms_c_mctrl_write(wlc_hw);
1412         brcms_b_wait_for_wake(wlc_hw);
1413 }
1414
1415 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1416                                    u32 override_bit)
1417 {
1418         mboolclr(wlc_hw->wake_override, override_bit);
1419
1420         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1421                 return;
1422
1423         brcms_c_mctrl_write(wlc_hw);
1424 }
1425
1426 /* When driver needs ucode to stop beaconing, it has to make sure that
1427  * MCTL_AP is clear and MCTL_INFRA is set
1428  * Mode           MCTL_AP        MCTL_INFRA
1429  * AP                1              1
1430  * STA               0              1 <--- This will ensure no beacons
1431  * IBSS              0              0
1432  */
1433 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1434 {
1435         wlc_hw->mute_override = 1;
1436
1437         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1438          * override, then there is no change to write
1439          */
1440         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1441                 return;
1442
1443         brcms_c_mctrl_write(wlc_hw);
1444 }
1445
1446 /* Clear the override on AP and INFRA bits */
1447 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1448 {
1449         if (wlc_hw->mute_override == 0)
1450                 return;
1451
1452         wlc_hw->mute_override = 0;
1453
1454         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1455          * override, then there is no change to write
1456          */
1457         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1458                 return;
1459
1460         brcms_c_mctrl_write(wlc_hw);
1461 }
1462
1463 /*
1464  * Write a MAC address to the given match reg offset in the RXE match engine.
1465  */
1466 static void
1467 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1468                        const u8 *addr)
1469 {
1470         struct d11regs __iomem *regs;
1471         u16 mac_l;
1472         u16 mac_m;
1473         u16 mac_h;
1474
1475         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1476                  wlc_hw->unit);
1477
1478         regs = wlc_hw->regs;
1479         mac_l = addr[0] | (addr[1] << 8);
1480         mac_m = addr[2] | (addr[3] << 8);
1481         mac_h = addr[4] | (addr[5] << 8);
1482
1483         /* enter the MAC addr into the RXE match registers */
1484         W_REG(&regs->rcm_ctl, RCM_INC_DATA | match_reg_offset);
1485         W_REG(&regs->rcm_mat_data, mac_l);
1486         W_REG(&regs->rcm_mat_data, mac_m);
1487         W_REG(&regs->rcm_mat_data, mac_h);
1488
1489 }
1490
1491 void
1492 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1493                             void *buf)
1494 {
1495         struct d11regs __iomem *regs;
1496         u32 word;
1497         __le32 word_le;
1498         __be32 word_be;
1499         bool be_bit;
1500         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1501
1502         regs = wlc_hw->regs;
1503         W_REG(&regs->tplatewrptr, offset);
1504
1505         /* if MCTL_BIGEND bit set in mac control register,
1506          * the chip swaps data in fifo, as well as data in
1507          * template ram
1508          */
1509         be_bit = (R_REG(&regs->maccontrol) & MCTL_BIGEND) != 0;
1510
1511         while (len > 0) {
1512                 memcpy(&word, buf, sizeof(u32));
1513
1514                 if (be_bit) {
1515                         word_be = cpu_to_be32(word);
1516                         word = *(u32 *)&word_be;
1517                 } else {
1518                         word_le = cpu_to_le32(word);
1519                         word = *(u32 *)&word_le;
1520                 }
1521
1522                 W_REG(&regs->tplatewrdata, word);
1523
1524                 buf = (u8 *) buf + sizeof(u32);
1525                 len -= sizeof(u32);
1526         }
1527 }
1528
1529 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1530 {
1531         wlc_hw->band->CWmin = newmin;
1532
1533         W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1534         (void)R_REG(&wlc_hw->regs->objaddr);
1535         W_REG(&wlc_hw->regs->objdata, newmin);
1536 }
1537
1538 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1539 {
1540         wlc_hw->band->CWmax = newmax;
1541
1542         W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1543         (void)R_REG(&wlc_hw->regs->objaddr);
1544         W_REG(&wlc_hw->regs->objdata, newmax);
1545 }
1546
1547 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1548 {
1549         bool fastclk;
1550
1551         /* request FAST clock if not on */
1552         fastclk = wlc_hw->forcefastclk;
1553         if (!fastclk)
1554                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1555
1556         wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1557
1558         brcms_b_phy_reset(wlc_hw);
1559         wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1560
1561         /* restore the clk */
1562         if (!fastclk)
1563                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1564 }
1565
1566 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1567 {
1568         u16 v;
1569         struct brcms_c_info *wlc = wlc_hw->wlc;
1570         /* update SYNTHPU_DLY */
1571
1572         if (BRCMS_ISLCNPHY(wlc->band))
1573                 v = SYNTHPU_DLY_LPPHY_US;
1574         else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1575                 v = SYNTHPU_DLY_NPHY_US;
1576         else
1577                 v = SYNTHPU_DLY_BPHY_US;
1578
1579         brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1580 }
1581
1582 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1583 {
1584         u16 phyctl;
1585         u16 phytxant = wlc_hw->bmac_phytxant;
1586         u16 mask = PHY_TXC_ANT_MASK;
1587
1588         /* set the Probe Response frame phy control word */
1589         phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1590         phyctl = (phyctl & ~mask) | phytxant;
1591         brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1592
1593         /* set the Response (ACK/CTS) frame phy control word */
1594         phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1595         phyctl = (phyctl & ~mask) | phytxant;
1596         brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1597 }
1598
1599 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1600                                          u8 rate)
1601 {
1602         uint i;
1603         u8 plcp_rate = 0;
1604         struct plcp_signal_rate_lookup {
1605                 u8 rate;
1606                 u8 signal_rate;
1607         };
1608         /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1609         const struct plcp_signal_rate_lookup rate_lookup[] = {
1610                 {BRCM_RATE_6M, 0xB},
1611                 {BRCM_RATE_9M, 0xF},
1612                 {BRCM_RATE_12M, 0xA},
1613                 {BRCM_RATE_18M, 0xE},
1614                 {BRCM_RATE_24M, 0x9},
1615                 {BRCM_RATE_36M, 0xD},
1616                 {BRCM_RATE_48M, 0x8},
1617                 {BRCM_RATE_54M, 0xC}
1618         };
1619
1620         for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1621                 if (rate == rate_lookup[i].rate) {
1622                         plcp_rate = rate_lookup[i].signal_rate;
1623                         break;
1624                 }
1625         }
1626
1627         /* Find the SHM pointer to the rate table entry by looking in the
1628          * Direct-map Table
1629          */
1630         return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1631 }
1632
1633 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1634 {
1635         u8 rate;
1636         u8 rates[8] = {
1637                 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1638                 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1639         };
1640         u16 entry_ptr;
1641         u16 pctl1;
1642         uint i;
1643
1644         if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1645                 return;
1646
1647         /* walk the phy rate table and update the entries */
1648         for (i = 0; i < ARRAY_SIZE(rates); i++) {
1649                 rate = rates[i];
1650
1651                 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1652
1653                 /* read the SHM Rate Table entry OFDM PCTL1 values */
1654                 pctl1 =
1655                     brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1656
1657                 /* modify the value */
1658                 pctl1 &= ~PHY_TXC1_MODE_MASK;
1659                 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1660
1661                 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1662                 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1663                                    pctl1);
1664         }
1665 }
1666
1667 /* band-specific init */
1668 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1669 {
1670         struct brcms_hardware *wlc_hw = wlc->hw;
1671
1672         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1673                 wlc_hw->band->bandunit);
1674
1675         brcms_c_ucode_bsinit(wlc_hw);
1676
1677         wlc_phy_init(wlc_hw->band->pi, chanspec);
1678
1679         brcms_c_ucode_txant_set(wlc_hw);
1680
1681         /*
1682          * cwmin is band-specific, update hardware
1683          * with value for current band
1684          */
1685         brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1686         brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1687
1688         brcms_b_update_slot_timing(wlc_hw,
1689                                    wlc_hw->band->bandtype == BRCM_BAND_5G ?
1690                                    true : wlc_hw->shortslot);
1691
1692         /* write phytype and phyvers */
1693         brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1694         brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1695
1696         /*
1697          * initialize the txphyctl1 rate table since
1698          * shmem is shared between bands
1699          */
1700         brcms_upd_ofdm_pctl1_table(wlc_hw);
1701
1702         brcms_b_upd_synthpu(wlc_hw);
1703 }
1704
1705 /* Perform a soft reset of the PHY PLL */
1706 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1707 {
1708         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1709
1710         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1711                    offsetof(struct chipcregs, chipcontrol_addr), ~0, 0);
1712         udelay(1);
1713         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1714                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1715         udelay(1);
1716         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1717                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 4);
1718         udelay(1);
1719         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1720                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1721         udelay(1);
1722 }
1723
1724 /* light way to turn on phy clock without reset for NPHY only
1725  *  refer to brcms_b_core_phy_clk for full version
1726  */
1727 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1728 {
1729         /* support(necessary for NPHY and HYPHY) only */
1730         if (!BRCMS_ISNPHY(wlc_hw->band))
1731                 return;
1732
1733         if (ON == clk)
1734                 ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC);
1735         else
1736                 ai_core_cflags(wlc_hw->sih, SICF_FGC, 0);
1737
1738 }
1739
1740 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1741 {
1742         if (ON == clk)
1743                 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE);
1744         else
1745                 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0);
1746 }
1747
1748 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1749 {
1750         struct brcms_phy_pub *pih = wlc_hw->band->pi;
1751         u32 phy_bw_clkbits;
1752         bool phy_in_reset = false;
1753
1754         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1755
1756         if (pih == NULL)
1757                 return;
1758
1759         phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1760
1761         /* Specific reset sequence required for NPHY rev 3 and 4 */
1762         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1763             NREV_LE(wlc_hw->band->phyrev, 4)) {
1764                 /* Set the PHY bandwidth */
1765                 ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits);
1766
1767                 udelay(1);
1768
1769                 /* Perform a soft reset of the PHY PLL */
1770                 brcms_b_core_phypll_reset(wlc_hw);
1771
1772                 /* reset the PHY */
1773                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE),
1774                                (SICF_PRST | SICF_PCLKE));
1775                 phy_in_reset = true;
1776         } else {
1777                 ai_core_cflags(wlc_hw->sih,
1778                                (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1779                                (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1780         }
1781
1782         udelay(2);
1783         brcms_b_core_phy_clk(wlc_hw, ON);
1784
1785         if (pih)
1786                 wlc_phy_anacore(pih, ON);
1787 }
1788
1789 /* switch to and initialize new band */
1790 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1791                             u16 chanspec) {
1792         struct brcms_c_info *wlc = wlc_hw->wlc;
1793         u32 macintmask;
1794
1795         /* Enable the d11 core before accessing it */
1796         if (!ai_iscoreup(wlc_hw->sih)) {
1797                 ai_core_reset(wlc_hw->sih, 0, 0);
1798                 brcms_c_mctrl_reset(wlc_hw);
1799         }
1800
1801         macintmask = brcms_c_setband_inact(wlc, bandunit);
1802
1803         if (!wlc_hw->up)
1804                 return;
1805
1806         brcms_b_core_phy_clk(wlc_hw, ON);
1807
1808         /* band-specific initializations */
1809         brcms_b_bsinit(wlc, chanspec);
1810
1811         /*
1812          * If there are any pending software interrupt bits,
1813          * then replace these with a harmless nonzero value
1814          * so brcms_c_dpc() will re-enable interrupts when done.
1815          */
1816         if (wlc->macintstatus)
1817                 wlc->macintstatus = MI_DMAINT;
1818
1819         /* restore macintmask */
1820         brcms_intrsrestore(wlc->wl, macintmask);
1821
1822         /* ucode should still be suspended.. */
1823         WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
1824 }
1825
1826 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1827 {
1828
1829         /* reject unsupported corerev */
1830         if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1831                 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1832                           wlc_hw->corerev);
1833                 return false;
1834         }
1835
1836         return true;
1837 }
1838
1839 /* Validate some board info parameters */
1840 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1841 {
1842         uint boardrev = wlc_hw->boardrev;
1843
1844         /* 4 bits each for board type, major, minor, and tiny version */
1845         uint brt = (boardrev & 0xf000) >> 12;
1846         uint b0 = (boardrev & 0xf00) >> 8;
1847         uint b1 = (boardrev & 0xf0) >> 4;
1848         uint b2 = boardrev & 0xf;
1849
1850         /* voards from other vendors are always considered valid */
1851         if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM)
1852                 return true;
1853
1854         /* do some boardrev sanity checks when boardvendor is Broadcom */
1855         if (boardrev == 0)
1856                 return false;
1857
1858         if (boardrev <= 0xff)
1859                 return true;
1860
1861         if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1862                 || (b2 > 9))
1863                 return false;
1864
1865         return true;
1866 }
1867
1868 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
1869 {
1870         enum brcms_srom_id var_id = BRCMS_SROM_MACADDR;
1871         char *macaddr;
1872
1873         /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1874         macaddr = getvar(wlc_hw->sih, var_id);
1875         if (macaddr != NULL)
1876                 return macaddr;
1877
1878         if (wlc_hw->_nbands > 1)
1879                 var_id = BRCMS_SROM_ET1MACADDR;
1880         else
1881                 var_id = BRCMS_SROM_IL0MACADDR;
1882
1883         macaddr = getvar(wlc_hw->sih, var_id);
1884         if (macaddr == NULL)
1885                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
1886                           "getvar(%d) not found\n", wlc_hw->unit, var_id);
1887
1888         return macaddr;
1889 }
1890
1891 /* power both the pll and external oscillator on/off */
1892 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
1893 {
1894         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
1895
1896         /*
1897          * dont power down if plldown is false or
1898          * we must poll hw radio disable
1899          */
1900         if (!want && wlc_hw->pllreq)
1901                 return;
1902
1903         if (wlc_hw->sih)
1904                 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
1905
1906         wlc_hw->sbclk = want;
1907         if (!wlc_hw->sbclk) {
1908                 wlc_hw->clk = false;
1909                 if (wlc_hw->band && wlc_hw->band->pi)
1910                         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
1911         }
1912 }
1913
1914 /*
1915  * Return true if radio is disabled, otherwise false.
1916  * hw radio disable signal is an external pin, users activate it asynchronously
1917  * this function could be called when driver is down and w/o clock
1918  * it operates on different registers depending on corerev and boardflag.
1919  */
1920 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
1921 {
1922         bool v, clk, xtal;
1923         u32 resetbits = 0, flags = 0;
1924
1925         xtal = wlc_hw->sbclk;
1926         if (!xtal)
1927                 brcms_b_xtal(wlc_hw, ON);
1928
1929         /* may need to take core out of reset first */
1930         clk = wlc_hw->clk;
1931         if (!clk) {
1932                 /*
1933                  * mac no longer enables phyclk automatically when driver
1934                  * accesses phyreg throughput mac. This can be skipped since
1935                  * only mac reg is accessed below
1936                  */
1937                 flags |= SICF_PCLKE;
1938
1939                 /*
1940                  * AI chip doesn't restore bar0win2 on
1941                  * hibernation/resume, need sw fixup
1942                  */
1943                 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
1944                     (wlc_hw->sih->chip == BCM43225_CHIP_ID))
1945                         wlc_hw->regs = (struct d11regs __iomem *)
1946                                         ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
1947                 ai_core_reset(wlc_hw->sih, flags, resetbits);
1948                 brcms_c_mctrl_reset(wlc_hw);
1949         }
1950
1951         v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0);
1952
1953         /* put core back into reset */
1954         if (!clk)
1955                 ai_core_disable(wlc_hw->sih, 0);
1956
1957         if (!xtal)
1958                 brcms_b_xtal(wlc_hw, OFF);
1959
1960         return v;
1961 }
1962
1963 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
1964 {
1965         struct dma_pub *di = wlc_hw->di[fifo];
1966         return dma_rxreset(di);
1967 }
1968
1969 /* d11 core reset
1970  *   ensure fask clock during reset
1971  *   reset dma
1972  *   reset d11(out of reset)
1973  *   reset phy(out of reset)
1974  *   clear software macintstatus for fresh new start
1975  * one testing hack wlc_hw->noreset will bypass the d11/phy reset
1976  */
1977 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
1978 {
1979         struct d11regs __iomem *regs;
1980         uint i;
1981         bool fastclk;
1982         u32 resetbits = 0;
1983
1984         if (flags == BRCMS_USE_COREFLAGS)
1985                 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
1986
1987         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1988
1989         regs = wlc_hw->regs;
1990
1991         /* request FAST clock if not on  */
1992         fastclk = wlc_hw->forcefastclk;
1993         if (!fastclk)
1994                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1995
1996         /* reset the dma engines except first time thru */
1997         if (ai_iscoreup(wlc_hw->sih)) {
1998                 for (i = 0; i < NFIFO; i++)
1999                         if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2000                                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2001                                           "dma_txreset[%d]: cannot stop dma\n",
2002                                            wlc_hw->unit, __func__, i);
2003
2004                 if ((wlc_hw->di[RX_FIFO])
2005                     && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2006                         wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2007                                   "[%d]: cannot stop dma\n",
2008                                   wlc_hw->unit, __func__, RX_FIFO);
2009         }
2010         /* if noreset, just stop the psm and return */
2011         if (wlc_hw->noreset) {
2012                 wlc_hw->wlc->macintstatus = 0;  /* skip wl_dpc after down */
2013                 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2014                 return;
2015         }
2016
2017         /*
2018          * mac no longer enables phyclk automatically when driver accesses
2019          * phyreg throughput mac, AND phy_reset is skipped at early stage when
2020          * band->pi is invalid. need to enable PHY CLK
2021          */
2022         flags |= SICF_PCLKE;
2023
2024         /*
2025          * reset the core
2026          * In chips with PMU, the fastclk request goes through d11 core
2027          * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2028          *
2029          * This adds some delay and we can optimize it by also requesting
2030          * fastclk through chipcommon during this period if necessary. But
2031          * that has to work coordinate with other driver like mips/arm since
2032          * they may touch chipcommon as well.
2033          */
2034         wlc_hw->clk = false;
2035         ai_core_reset(wlc_hw->sih, flags, resetbits);
2036         wlc_hw->clk = true;
2037         if (wlc_hw->band && wlc_hw->band->pi)
2038                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2039
2040         brcms_c_mctrl_reset(wlc_hw);
2041
2042         if (wlc_hw->sih->cccaps & CC_CAP_PMU)
2043                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2044
2045         brcms_b_phy_reset(wlc_hw);
2046
2047         /* turn on PHY_PLL */
2048         brcms_b_core_phypll_ctl(wlc_hw, true);
2049
2050         /* clear sw intstatus */
2051         wlc_hw->wlc->macintstatus = 0;
2052
2053         /* restore the clk setting */
2054         if (!fastclk)
2055                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2056 }
2057
2058 /* txfifo sizes needs to be modified(increased) since the newer cores
2059  * have more memory.
2060  */
2061 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2062 {
2063         struct d11regs __iomem *regs = wlc_hw->regs;
2064         u16 fifo_nu;
2065         u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2066         u16 txfifo_def, txfifo_def1;
2067         u16 txfifo_cmd;
2068
2069         /* tx fifos start at TXFIFO_START_BLK from the Base address */
2070         txfifo_startblk = TXFIFO_START_BLK;
2071
2072         /* sequence of operations:  reset fifo, set fifo size, reset fifo */
2073         for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2074
2075                 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2076                 txfifo_def = (txfifo_startblk & 0xff) |
2077                     (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2078                 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2079                     ((((txfifo_endblk -
2080                         1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2081                 txfifo_cmd =
2082                     TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2083
2084                 W_REG(&regs->xmtfifocmd, txfifo_cmd);
2085                 W_REG(&regs->xmtfifodef, txfifo_def);
2086                 W_REG(&regs->xmtfifodef1, txfifo_def1);
2087
2088                 W_REG(&regs->xmtfifocmd, txfifo_cmd);
2089
2090                 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2091         }
2092         /*
2093          * need to propagate to shm location to be in sync since ucode/hw won't
2094          * do this
2095          */
2096         brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2097                            wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2098         brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2099                            wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2100         brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2101                            ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2102                             xmtfifo_sz[TX_AC_BK_FIFO]));
2103         brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2104                            ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2105                             xmtfifo_sz[TX_BCMC_FIFO]));
2106 }
2107
2108 /* This function is used for changing the tsf frac register
2109  * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2110  * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2111  * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2112  * HTPHY Formula is 2^26/freq(MHz) e.g.
2113  * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2114  *  - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2115  * For spuron: 123MHz -> 2^26/123    = 545600.5
2116  *  - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2117  * For spur off: 120MHz -> 2^26/120    = 559240.5
2118  *  - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2119  */
2120
2121 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2122 {
2123         struct d11regs __iomem *regs = wlc_hw->regs;
2124
2125         if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2126             (wlc_hw->sih->chip == BCM43225_CHIP_ID)) {
2127                 if (spurmode == WL_SPURAVOID_ON2) {     /* 126Mhz */
2128                         W_REG(&regs->tsf_clk_frac_l, 0x2082);
2129                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2130                 } else if (spurmode == WL_SPURAVOID_ON1) {      /* 123Mhz */
2131                         W_REG(&regs->tsf_clk_frac_l, 0x5341);
2132                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2133                 } else {        /* 120Mhz */
2134                         W_REG(&regs->tsf_clk_frac_l, 0x8889);
2135                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2136                 }
2137         } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2138                 if (spurmode == WL_SPURAVOID_ON1) {     /* 82Mhz */
2139                         W_REG(&regs->tsf_clk_frac_l, 0x7CE0);
2140                         W_REG(&regs->tsf_clk_frac_h, 0xC);
2141                 } else {        /* 80Mhz */
2142                         W_REG(&regs->tsf_clk_frac_l, 0xCCCD);
2143                         W_REG(&regs->tsf_clk_frac_h, 0xC);
2144                 }
2145         }
2146 }
2147
2148 /* Initialize GPIOs that are controlled by D11 core */
2149 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2150 {
2151         struct brcms_hardware *wlc_hw = wlc->hw;
2152         struct d11regs __iomem *regs;
2153         u32 gc, gm;
2154
2155         regs = wlc_hw->regs;
2156
2157         /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2158         brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2159
2160         /*
2161          * Common GPIO setup:
2162          *      G0 = LED 0 = WLAN Activity
2163          *      G1 = LED 1 = WLAN 2.4 GHz Radio State
2164          *      G2 = LED 2 = WLAN 5 GHz Radio State
2165          *      G4 = radio disable input (HI enabled, LO disabled)
2166          */
2167
2168         gc = gm = 0;
2169
2170         /* Allocate GPIOs for mimo antenna diversity feature */
2171         if (wlc_hw->antsel_type == ANTSEL_2x3) {
2172                 /* Enable antenna diversity, use 2x3 mode */
2173                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2174                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2175                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2176                              MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2177
2178                 /* init superswitch control */
2179                 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2180
2181         } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2182                 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2183                 /*
2184                  * The board itself is powered by these GPIOs
2185                  * (when not sending pattern) so set them high
2186                  */
2187                 OR_REG(&regs->psm_gpio_oe,
2188                        (BOARD_GPIO_12 | BOARD_GPIO_13));
2189                 OR_REG(&regs->psm_gpio_out,
2190                        (BOARD_GPIO_12 | BOARD_GPIO_13));
2191
2192                 /* Enable antenna diversity, use 2x4 mode */
2193                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2194                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2195                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2196                              BRCM_BAND_ALL);
2197
2198                 /* Configure the desired clock to be 4Mhz */
2199                 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2200                                    ANTSEL_CLKDIV_4MHZ);
2201         }
2202
2203         /*
2204          * gpio 9 controls the PA. ucode is responsible
2205          * for wiggling out and oe
2206          */
2207         if (wlc_hw->boardflags & BFL_PACTRL)
2208                 gm |= gc |= BOARD_GPIO_PACTRL;
2209
2210         /* apply to gpiocontrol register */
2211         ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2212 }
2213
2214 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2215                               const __le32 ucode[], const size_t nbytes)
2216 {
2217         struct d11regs __iomem *regs = wlc_hw->regs;
2218         uint i;
2219         uint count;
2220
2221         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2222
2223         count = (nbytes / sizeof(u32));
2224
2225         W_REG(&regs->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL));
2226         (void)R_REG(&regs->objaddr);
2227         for (i = 0; i < count; i++)
2228                 W_REG(&regs->objdata, le32_to_cpu(ucode[i]));
2229
2230 }
2231
2232 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2233 {
2234         struct brcms_c_info *wlc;
2235         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2236
2237         wlc = wlc_hw->wlc;
2238
2239         if (wlc_hw->ucode_loaded)
2240                 return;
2241
2242         if (D11REV_IS(wlc_hw->corerev, 23)) {
2243                 if (BRCMS_ISNPHY(wlc_hw->band)) {
2244                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2245                                           ucode->bcm43xx_16_mimosz);
2246                         wlc_hw->ucode_loaded = true;
2247                 } else
2248                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2249                                   "corerev %d\n",
2250                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2251         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2252                 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2253                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2254                                           ucode->bcm43xx_24_lcnsz);
2255                         wlc_hw->ucode_loaded = true;
2256                 } else {
2257                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2258                                   "corerev %d\n",
2259                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2260                 }
2261         }
2262 }
2263
2264 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2265 {
2266         /* update sw state */
2267         wlc_hw->bmac_phytxant = phytxant;
2268
2269         /* push to ucode if up */
2270         if (!wlc_hw->up)
2271                 return;
2272         brcms_c_ucode_txant_set(wlc_hw);
2273
2274 }
2275
2276 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2277 {
2278         return (u16) wlc_hw->wlc->stf->txant;
2279 }
2280
2281 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2282 {
2283         wlc_hw->antsel_type = antsel_type;
2284
2285         /* Update the antsel type for phy module to use */
2286         wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2287 }
2288
2289 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2290 {
2291         bool fatal = false;
2292         uint unit;
2293         uint intstatus, idx;
2294         struct d11regs __iomem *regs = wlc_hw->regs;
2295         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2296
2297         unit = wlc_hw->unit;
2298
2299         for (idx = 0; idx < NFIFO; idx++) {
2300                 /* read intstatus register and ignore any non-error bits */
2301                 intstatus =
2302                     R_REG(&regs->intctrlregs[idx].intstatus) & I_ERRORS;
2303                 if (!intstatus)
2304                         continue;
2305
2306                 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2307                         unit, idx, intstatus);
2308
2309                 if (intstatus & I_RO) {
2310                         wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2311                                   "overflow\n", unit, idx);
2312                         fatal = true;
2313                 }
2314
2315                 if (intstatus & I_PC) {
2316                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2317                                  unit, idx);
2318                         fatal = true;
2319                 }
2320
2321                 if (intstatus & I_PD) {
2322                         wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2323                                   idx);
2324                         fatal = true;
2325                 }
2326
2327                 if (intstatus & I_DE) {
2328                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2329                                   "error\n", unit, idx);
2330                         fatal = true;
2331                 }
2332
2333                 if (intstatus & I_RU)
2334                         wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2335                                   "underflow\n", idx, unit);
2336
2337                 if (intstatus & I_XU) {
2338                         wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2339                                   "underflow\n", idx, unit);
2340                         fatal = true;
2341                 }
2342
2343                 if (fatal) {
2344                         brcms_fatal_error(wlc_hw->wlc->wl); /* big hammer */
2345                         break;
2346                 } else
2347                         W_REG(&regs->intctrlregs[idx].intstatus,
2348                               intstatus);
2349         }
2350 }
2351
2352 void brcms_c_intrson(struct brcms_c_info *wlc)
2353 {
2354         struct brcms_hardware *wlc_hw = wlc->hw;
2355         wlc->macintmask = wlc->defmacintmask;
2356         W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2357 }
2358
2359 /*
2360  * callback for siutils.c, which has only wlc handler, no wl they both check
2361  * up, not only because there is no need to off/restore d11 interrupt but also
2362  * because per-port code may require sync with valid interrupt.
2363  */
2364 static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc)
2365 {
2366         if (!wlc->hw->up)
2367                 return 0;
2368
2369         return brcms_intrsoff(wlc->wl);
2370 }
2371
2372 static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2373 {
2374         if (!wlc->hw->up)
2375                 return;
2376
2377         brcms_intrsrestore(wlc->wl, macintmask);
2378 }
2379
2380 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2381 {
2382         struct brcms_hardware *wlc_hw = wlc->hw;
2383         u32 macintmask;
2384
2385         if (!wlc_hw->clk)
2386                 return 0;
2387
2388         macintmask = wlc->macintmask;   /* isr can still happen */
2389
2390         W_REG(&wlc_hw->regs->macintmask, 0);
2391         (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */
2392         udelay(1);              /* ensure int line is no longer driven */
2393         wlc->macintmask = 0;
2394
2395         /* return previous macintmask; resolve race between us and our isr */
2396         return wlc->macintstatus ? 0 : macintmask;
2397 }
2398
2399 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2400 {
2401         struct brcms_hardware *wlc_hw = wlc->hw;
2402         if (!wlc_hw->clk)
2403                 return;
2404
2405         wlc->macintmask = macintmask;
2406         W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2407 }
2408
2409 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2410                                     uint tx_fifo)
2411 {
2412         u8 fifo = 1 << tx_fifo;
2413
2414         /* Two clients of this code, 11h Quiet period and scanning. */
2415
2416         /* only suspend if not already suspended */
2417         if ((wlc_hw->suspended_fifos & fifo) == fifo)
2418                 return;
2419
2420         /* force the core awake only if not already */
2421         if (wlc_hw->suspended_fifos == 0)
2422                 brcms_c_ucode_wake_override_set(wlc_hw,
2423                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2424
2425         wlc_hw->suspended_fifos |= fifo;
2426
2427         if (wlc_hw->di[tx_fifo]) {
2428                 /*
2429                  * Suspending AMPDU transmissions in the middle can cause
2430                  * underflow which may result in mismatch between ucode and
2431                  * driver so suspend the mac before suspending the FIFO
2432                  */
2433                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2434                         brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2435
2436                 dma_txsuspend(wlc_hw->di[tx_fifo]);
2437
2438                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2439                         brcms_c_enable_mac(wlc_hw->wlc);
2440         }
2441 }
2442
2443 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2444                                    uint tx_fifo)
2445 {
2446         /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2447          * but need to be done here for PIO otherwise the watchdog will catch
2448          * the inconsistency and fire
2449          */
2450         /* Two clients of this code, 11h Quiet period and scanning. */
2451         if (wlc_hw->di[tx_fifo])
2452                 dma_txresume(wlc_hw->di[tx_fifo]);
2453
2454         /* allow core to sleep again */
2455         if (wlc_hw->suspended_fifos == 0)
2456                 return;
2457         else {
2458                 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2459                 if (wlc_hw->suspended_fifos == 0)
2460                         brcms_c_ucode_wake_override_clear(wlc_hw,
2461                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2462         }
2463 }
2464
2465 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, u32 flags)
2466 {
2467         static const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2468
2469         if (on) {
2470                 /* suspend tx fifos */
2471                 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2472                 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2473                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2474                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2475
2476                 /* zero the address match register so we do not send ACKs */
2477                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2478                                        null_ether_addr);
2479         } else {
2480                 /* resume tx fifos */
2481                 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2482                 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2483                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2484                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2485
2486                 /* Restore address */
2487                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2488                                        wlc_hw->etheraddr);
2489         }
2490
2491         wlc_phy_mute_upd(wlc_hw->band->pi, on, flags);
2492
2493         if (on)
2494                 brcms_c_ucode_mute_override_set(wlc_hw);
2495         else
2496                 brcms_c_ucode_mute_override_clear(wlc_hw);
2497 }
2498
2499 /*
2500  * Read and clear macintmask and macintstatus and intstatus registers.
2501  * This routine should be called with interrupts off
2502  * Return:
2503  *   -1 if brcms_deviceremoved(wlc) evaluates to true;
2504  *   0 if the interrupt is not for us, or we are in some special cases;
2505  *   device interrupt status bits otherwise.
2506  */
2507 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2508 {
2509         struct brcms_hardware *wlc_hw = wlc->hw;
2510         struct d11regs __iomem *regs = wlc_hw->regs;
2511         u32 macintstatus;
2512
2513         /* macintstatus includes a DMA interrupt summary bit */
2514         macintstatus = R_REG(&regs->macintstatus);
2515
2516         BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2517                  macintstatus);
2518
2519         /* detect cardbus removed, in power down(suspend) and in reset */
2520         if (brcms_deviceremoved(wlc))
2521                 return -1;
2522
2523         /* brcms_deviceremoved() succeeds even when the core is still resetting,
2524          * handle that case here.
2525          */
2526         if (macintstatus == 0xffffffff)
2527                 return 0;
2528
2529         /* defer unsolicited interrupts */
2530         macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2531
2532         /* if not for us */
2533         if (macintstatus == 0)
2534                 return 0;
2535
2536         /* interrupts are already turned off for CFE build
2537          * Caution: For CFE Turning off the interrupts again has some undesired
2538          * consequences
2539          */
2540         /* turn off the interrupts */
2541         W_REG(&regs->macintmask, 0);
2542         (void)R_REG(&regs->macintmask); /* sync readback */
2543         wlc->macintmask = 0;
2544
2545         /* clear device interrupts */
2546         W_REG(&regs->macintstatus, macintstatus);
2547
2548         /* MI_DMAINT is indication of non-zero intstatus */
2549         if (macintstatus & MI_DMAINT)
2550                 /*
2551                  * only fifo interrupt enabled is I_RI in
2552                  * RX_FIFO. If MI_DMAINT is set, assume it
2553                  * is set and clear the interrupt.
2554                  */
2555                 W_REG(&regs->intctrlregs[RX_FIFO].intstatus,
2556                       DEF_RXINTMASK);
2557
2558         return macintstatus;
2559 }
2560
2561 /* Update wlc->macintstatus and wlc->intstatus[]. */
2562 /* Return true if they are updated successfully. false otherwise */
2563 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2564 {
2565         u32 macintstatus;
2566
2567         /* read and clear macintstatus and intstatus registers */
2568         macintstatus = wlc_intstatus(wlc, false);
2569
2570         /* device is removed */
2571         if (macintstatus == 0xffffffff)
2572                 return false;
2573
2574         /* update interrupt status in software */
2575         wlc->macintstatus |= macintstatus;
2576
2577         return true;
2578 }
2579
2580 /*
2581  * First-level interrupt processing.
2582  * Return true if this was our interrupt, false otherwise.
2583  * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2584  * false otherwise.
2585  */
2586 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2587 {
2588         struct brcms_hardware *wlc_hw = wlc->hw;
2589         u32 macintstatus;
2590
2591         *wantdpc = false;
2592
2593         if (!wlc_hw->up || !wlc->macintmask)
2594                 return false;
2595
2596         /* read and clear macintstatus and intstatus registers */
2597         macintstatus = wlc_intstatus(wlc, true);
2598
2599         if (macintstatus == 0xffffffff)
2600                 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2601                           " path\n");
2602
2603         /* it is not for us */
2604         if (macintstatus == 0)
2605                 return false;
2606
2607         *wantdpc = true;
2608
2609         /* save interrupt status bits */
2610         wlc->macintstatus = macintstatus;
2611
2612         return true;
2613
2614 }
2615
2616 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2617 {
2618         struct brcms_hardware *wlc_hw = wlc->hw;
2619         struct d11regs __iomem *regs = wlc_hw->regs;
2620         u32 mc, mi;
2621         struct wiphy *wiphy = wlc->wiphy;
2622
2623         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2624                 wlc_hw->band->bandunit);
2625
2626         /*
2627          * Track overlapping suspend requests
2628          */
2629         wlc_hw->mac_suspend_depth++;
2630         if (wlc_hw->mac_suspend_depth > 1)
2631                 return;
2632
2633         /* force the core awake */
2634         brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2635
2636         mc = R_REG(&regs->maccontrol);
2637
2638         if (mc == 0xffffffff) {
2639                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2640                           __func__);
2641                 brcms_down(wlc->wl);
2642                 return;
2643         }
2644         WARN_ON(mc & MCTL_PSM_JMP_0);
2645         WARN_ON(!(mc & MCTL_PSM_RUN));
2646         WARN_ON(!(mc & MCTL_EN_MAC));
2647
2648         mi = R_REG(&regs->macintstatus);
2649         if (mi == 0xffffffff) {
2650                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2651                           __func__);
2652                 brcms_down(wlc->wl);
2653                 return;
2654         }
2655         WARN_ON(mi & MI_MACSSPNDD);
2656
2657         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2658
2659         SPINWAIT(!(R_REG(&regs->macintstatus) & MI_MACSSPNDD),
2660                  BRCMS_MAX_MAC_SUSPEND);
2661
2662         if (!(R_REG(&regs->macintstatus) & MI_MACSSPNDD)) {
2663                 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2664                           " and MI_MACSSPNDD is still not on.\n",
2665                           wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2666                 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2667                           "psm_brc 0x%04x\n", wlc_hw->unit,
2668                           R_REG(&regs->psmdebug),
2669                           R_REG(&regs->phydebug),
2670                           R_REG(&regs->psm_brc));
2671         }
2672
2673         mc = R_REG(&regs->maccontrol);
2674         if (mc == 0xffffffff) {
2675                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2676                           __func__);
2677                 brcms_down(wlc->wl);
2678                 return;
2679         }
2680         WARN_ON(mc & MCTL_PSM_JMP_0);
2681         WARN_ON(!(mc & MCTL_PSM_RUN));
2682         WARN_ON(mc & MCTL_EN_MAC);
2683 }
2684
2685 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2686 {
2687         struct brcms_hardware *wlc_hw = wlc->hw;
2688         struct d11regs __iomem *regs = wlc_hw->regs;
2689         u32 mc, mi;
2690
2691         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2692                 wlc->band->bandunit);
2693
2694         /*
2695          * Track overlapping suspend requests
2696          */
2697         wlc_hw->mac_suspend_depth--;
2698         if (wlc_hw->mac_suspend_depth > 0)
2699                 return;
2700
2701         mc = R_REG(&regs->maccontrol);
2702         WARN_ON(mc & MCTL_PSM_JMP_0);
2703         WARN_ON(mc & MCTL_EN_MAC);
2704         WARN_ON(!(mc & MCTL_PSM_RUN));
2705
2706         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2707         W_REG(&regs->macintstatus, MI_MACSSPNDD);
2708
2709         mc = R_REG(&regs->maccontrol);
2710         WARN_ON(mc & MCTL_PSM_JMP_0);
2711         WARN_ON(!(mc & MCTL_EN_MAC));
2712         WARN_ON(!(mc & MCTL_PSM_RUN));
2713
2714         mi = R_REG(&regs->macintstatus);
2715         WARN_ON(mi & MI_MACSSPNDD);
2716
2717         brcms_c_ucode_wake_override_clear(wlc_hw,
2718                                           BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2719 }
2720
2721 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2722 {
2723         wlc_hw->hw_stf_ss_opmode = stf_mode;
2724
2725         if (wlc_hw->clk)
2726                 brcms_upd_ofdm_pctl1_table(wlc_hw);
2727 }
2728
2729 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2730 {
2731         struct d11regs __iomem *regs;
2732         u32 w, val;
2733         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2734
2735         BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2736
2737         regs = wlc_hw->regs;
2738
2739         /* Validate dchip register access */
2740
2741         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2742         (void)R_REG(&regs->objaddr);
2743         w = R_REG(&regs->objdata);
2744
2745         /* Can we write and read back a 32bit register? */
2746         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2747         (void)R_REG(&regs->objaddr);
2748         W_REG(&regs->objdata, (u32) 0xaa5555aa);
2749
2750         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2751         (void)R_REG(&regs->objaddr);
2752         val = R_REG(&regs->objdata);
2753         if (val != (u32) 0xaa5555aa) {
2754                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2755                           "expected 0xaa5555aa\n", wlc_hw->unit, val);
2756                 return false;
2757         }
2758
2759         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2760         (void)R_REG(&regs->objaddr);
2761         W_REG(&regs->objdata, (u32) 0x55aaaa55);
2762
2763         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2764         (void)R_REG(&regs->objaddr);
2765         val = R_REG(&regs->objdata);
2766         if (val != (u32) 0x55aaaa55) {
2767                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2768                           "expected 0x55aaaa55\n", wlc_hw->unit, val);
2769                 return false;
2770         }
2771
2772         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2773         (void)R_REG(&regs->objaddr);
2774         W_REG(&regs->objdata, w);
2775
2776         /* clear CFPStart */
2777         W_REG(&regs->tsf_cfpstart, 0);
2778
2779         w = R_REG(&regs->maccontrol);
2780         if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2781             (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2782                 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2783                           "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2784                           (MCTL_IHR_EN | MCTL_WAKE),
2785                           (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2786                 return false;
2787         }
2788
2789         return true;
2790 }
2791
2792 #define PHYPLL_WAIT_US  100000
2793
2794 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2795 {
2796         struct d11regs __iomem *regs;
2797         u32 tmp;
2798
2799         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2800
2801         tmp = 0;
2802         regs = wlc_hw->regs;
2803
2804         if (on) {
2805                 if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
2806                         OR_REG(&regs->clk_ctl_st,
2807                                (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL |
2808                                 CCS_ERSRC_REQ_PHYPLL));
2809                         SPINWAIT((R_REG(&regs->clk_ctl_st) &
2810                                   (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT),
2811                                  PHYPLL_WAIT_US);
2812
2813                         tmp = R_REG(&regs->clk_ctl_st);
2814                         if ((tmp & (CCS_ERSRC_AVAIL_HT)) !=
2815                             (CCS_ERSRC_AVAIL_HT))
2816                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2817                                           " PLL failed\n", __func__);
2818                 } else {
2819                         OR_REG(&regs->clk_ctl_st,
2820                                (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL));
2821                         SPINWAIT((R_REG(&regs->clk_ctl_st) &
2822                                   (CCS_ERSRC_AVAIL_D11PLL |
2823                                    CCS_ERSRC_AVAIL_PHYPLL)) !=
2824                                  (CCS_ERSRC_AVAIL_D11PLL |
2825                                   CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2826
2827                         tmp = R_REG(&regs->clk_ctl_st);
2828                         if ((tmp &
2829                              (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2830                             !=
2831                             (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2832                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2833                                           "PHY PLL failed\n", __func__);
2834                 }
2835         } else {
2836                 /*
2837                  * Since the PLL may be shared, other cores can still
2838                  * be requesting it; so we'll deassert the request but
2839                  * not wait for status to comply.
2840                  */
2841                 AND_REG(&regs->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL);
2842                 tmp = R_REG(&regs->clk_ctl_st);
2843         }
2844 }
2845
2846 static void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2847 {
2848         bool dev_gone;
2849
2850         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2851
2852         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2853
2854         if (dev_gone)
2855                 return;
2856
2857         if (wlc_hw->noreset)
2858                 return;
2859
2860         /* radio off */
2861         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2862
2863         /* turn off analog core */
2864         wlc_phy_anacore(wlc_hw->band->pi, OFF);
2865
2866         /* turn off PHYPLL to save power */
2867         brcms_b_core_phypll_ctl(wlc_hw, false);
2868
2869         wlc_hw->clk = false;
2870         ai_core_disable(wlc_hw->sih, 0);
2871         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2872 }
2873
2874 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2875 {
2876         struct brcms_hardware *wlc_hw = wlc->hw;
2877         uint i;
2878
2879         /* free any posted tx packets */
2880         for (i = 0; i < NFIFO; i++)
2881                 if (wlc_hw->di[i]) {
2882                         dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
2883                         wlc->core->txpktpend[i] = 0;
2884                         BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
2885                 }
2886
2887         /* free any posted rx packets */
2888         dma_rxreclaim(wlc_hw->di[RX_FIFO]);
2889 }
2890
2891 static u16
2892 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
2893 {
2894         struct d11regs __iomem *regs = wlc_hw->regs;
2895         u16 __iomem *objdata_lo = (u16 __iomem *)&regs->objdata;
2896         u16 __iomem *objdata_hi = objdata_lo + 1;
2897         u16 v;
2898
2899         W_REG(&regs->objaddr, sel | (offset >> 2));
2900         (void)R_REG(&regs->objaddr);
2901         if (offset & 2)
2902                 v = R_REG(objdata_hi);
2903         else
2904                 v = R_REG(objdata_lo);
2905
2906         return v;
2907 }
2908
2909 static void
2910 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
2911                      u32 sel)
2912 {
2913         struct d11regs __iomem *regs = wlc_hw->regs;
2914         u16 __iomem *objdata_lo = (u16 __iomem *)&regs->objdata;
2915         u16 __iomem *objdata_hi = objdata_lo + 1;
2916
2917         W_REG(&regs->objaddr, sel | (offset >> 2));
2918         (void)R_REG(&regs->objaddr);
2919         if (offset & 2)
2920                 W_REG(objdata_hi, v);
2921         else
2922                 W_REG(objdata_lo, v);
2923 }
2924
2925 /*
2926  * Read a single u16 from shared memory.
2927  * SHM 'offset' needs to be an even address
2928  */
2929 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
2930 {
2931         return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
2932 }
2933
2934 /*
2935  * Write a single u16 to shared memory.
2936  * SHM 'offset' needs to be an even address
2937  */
2938 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
2939 {
2940         brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
2941 }
2942
2943 /*
2944  * Copy a buffer to shared memory of specified type .
2945  * SHM 'offset' needs to be an even address and
2946  * Buffer length 'len' must be an even number of bytes
2947  * 'sel' selects the type of memory
2948  */
2949 void
2950 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
2951                       const void *buf, int len, u32 sel)
2952 {
2953         u16 v;
2954         const u8 *p = (const u8 *)buf;
2955         int i;
2956
2957         if (len <= 0 || (offset & 1) || (len & 1))
2958                 return;
2959
2960         for (i = 0; i < len; i += 2) {
2961                 v = p[i] | (p[i + 1] << 8);
2962                 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
2963         }
2964 }
2965
2966 /*
2967  * Copy a piece of shared memory of specified type to a buffer .
2968  * SHM 'offset' needs to be an even address and
2969  * Buffer length 'len' must be an even number of bytes
2970  * 'sel' selects the type of memory
2971  */
2972 void
2973 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
2974                          int len, u32 sel)
2975 {
2976         u16 v;
2977         u8 *p = (u8 *) buf;
2978         int i;
2979
2980         if (len <= 0 || (offset & 1) || (len & 1))
2981                 return;
2982
2983         for (i = 0; i < len; i += 2) {
2984                 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
2985                 p[i] = v & 0xFF;
2986                 p[i + 1] = (v >> 8) & 0xFF;
2987         }
2988 }
2989
2990 /* Copy a buffer to shared memory.
2991  * SHM 'offset' needs to be an even address and
2992  * Buffer length 'len' must be an even number of bytes
2993  */
2994 static void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset,
2995                         const void *buf, int len)
2996 {
2997         brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
2998 }
2999
3000 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
3001                                    u16 SRL, u16 LRL)
3002 {
3003         wlc_hw->SRL = SRL;
3004         wlc_hw->LRL = LRL;
3005
3006         /* write retry limit to SCR, shouldn't need to suspend */
3007         if (wlc_hw->up) {
3008                 W_REG(&wlc_hw->regs->objaddr,
3009                       OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3010                 (void)R_REG(&wlc_hw->regs->objaddr);
3011                 W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL);
3012                 W_REG(&wlc_hw->regs->objaddr,
3013                       OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3014                 (void)R_REG(&wlc_hw->regs->objaddr);
3015                 W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL);
3016         }
3017 }
3018
3019 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3020 {
3021         if (set) {
3022                 if (mboolisset(wlc_hw->pllreq, req_bit))
3023                         return;
3024
3025                 mboolset(wlc_hw->pllreq, req_bit);
3026
3027                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3028                         if (!wlc_hw->sbclk)
3029                                 brcms_b_xtal(wlc_hw, ON);
3030                 }
3031         } else {
3032                 if (!mboolisset(wlc_hw->pllreq, req_bit))
3033                         return;
3034
3035                 mboolclr(wlc_hw->pllreq, req_bit);
3036
3037                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3038                         if (wlc_hw->sbclk)
3039                                 brcms_b_xtal(wlc_hw, OFF);
3040                 }
3041         }
3042 }
3043
3044 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3045 {
3046         wlc_hw->antsel_avail = antsel_avail;
3047 }
3048
3049 /*
3050  * conditions under which the PM bit should be set in outgoing frames
3051  * and STAY_AWAKE is meaningful
3052  */
3053 static bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3054 {
3055         struct brcms_bss_cfg *cfg = wlc->bsscfg;
3056
3057         /* disallow PS when one of the following global conditions meets */
3058         if (!wlc->pub->associated)
3059                 return false;
3060
3061         /* disallow PS when one of these meets when not scanning */
3062         if (wlc->monitor)
3063                 return false;
3064
3065         if (cfg->associated) {
3066                 /*
3067                  * disallow PS when one of the following
3068                  * bsscfg specific conditions meets
3069                  */
3070                 if (!cfg->BSS)
3071                         return false;
3072
3073                 return false;
3074         }
3075
3076         return true;
3077 }
3078
3079 static void brcms_c_statsupd(struct brcms_c_info *wlc)
3080 {
3081         int i;
3082         struct macstat macstats;
3083 #ifdef BCMDBG
3084         u16 delta;
3085         u16 rxf0ovfl;
3086         u16 txfunfl[NFIFO];
3087 #endif                          /* BCMDBG */
3088
3089         /* if driver down, make no sense to update stats */
3090         if (!wlc->pub->up)
3091                 return;
3092
3093 #ifdef BCMDBG
3094         /* save last rx fifo 0 overflow count */
3095         rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
3096
3097         /* save last tx fifo  underflow count */
3098         for (i = 0; i < NFIFO; i++)
3099                 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
3100 #endif                          /* BCMDBG */
3101
3102         /* Read mac stats from contiguous shared memory */
3103         brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
3104                                 sizeof(struct macstat), OBJADDR_SHM_SEL);
3105
3106 #ifdef BCMDBG
3107         /* check for rx fifo 0 overflow */
3108         delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
3109         if (delta)
3110                 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
3111                           wlc->pub->unit, delta);
3112
3113         /* check for tx fifo underflows */
3114         for (i = 0; i < NFIFO; i++) {
3115                 delta =
3116                     (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
3117                               txfunfl[i]);
3118                 if (delta)
3119                         wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
3120                                   "\n", wlc->pub->unit, delta, i);
3121         }
3122 #endif                          /* BCMDBG */
3123
3124         /* merge counters from dma module */
3125         for (i = 0; i < NFIFO; i++) {
3126                 if (wlc->hw->di[i])
3127                         dma_counterreset(wlc->hw->di[i]);
3128         }
3129 }
3130
3131 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3132 {
3133         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3134
3135         /* reset the core */
3136         if (!brcms_deviceremoved(wlc_hw->wlc))
3137                 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3138
3139         /* purge the dma rings */
3140         brcms_c_flushqueues(wlc_hw->wlc);
3141 }
3142
3143 void brcms_c_reset(struct brcms_c_info *wlc)
3144 {
3145         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3146
3147         /* slurp up hw mac counters before core reset */
3148         brcms_c_statsupd(wlc);
3149
3150         /* reset our snapshot of macstat counters */
3151         memset((char *)wlc->core->macstat_snapshot, 0,
3152                 sizeof(struct macstat));
3153
3154         brcms_b_reset(wlc->hw);
3155 }
3156
3157 /* Return the channel the driver should initialize during brcms_c_init.
3158  * the channel may have to be changed from the currently configured channel
3159  * if other configurations are in conflict (bandlocked, 11n mode disabled,
3160  * invalid channel for current country, etc.)
3161  */
3162 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3163 {
3164         u16 chanspec =
3165             1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3166             WL_CHANSPEC_BAND_2G;
3167
3168         return chanspec;
3169 }
3170
3171 void brcms_c_init_scb(struct scb *scb)
3172 {
3173         int i;
3174
3175         memset(scb, 0, sizeof(struct scb));
3176         scb->flags = SCB_WMECAP | SCB_HTCAP;
3177         for (i = 0; i < NUMPRIO; i++) {
3178                 scb->seqnum[i] = 0;
3179                 scb->seqctl[i] = 0xFFFF;
3180         }
3181
3182         scb->seqctl_nonqos = 0xFFFF;
3183         scb->magic = SCB_MAGIC;
3184 }
3185
3186 /* d11 core init
3187  *   reset PSM
3188  *   download ucode/PCM
3189  *   let ucode run to suspended
3190  *   download ucode inits
3191  *   config other core registers
3192  *   init dma
3193  */
3194 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3195 {
3196         struct brcms_hardware *wlc_hw = wlc->hw;
3197         struct d11regs __iomem *regs;
3198         u32 sflags;
3199         uint bcnint_us;
3200         uint i = 0;
3201         bool fifosz_fixup = false;
3202         int err = 0;
3203         u16 buf[NFIFO];
3204         struct wiphy *wiphy = wlc->wiphy;
3205         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3206
3207         regs = wlc_hw->regs;
3208
3209         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3210
3211         /* reset PSM */
3212         brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3213
3214         brcms_ucode_download(wlc_hw);
3215         /*
3216          * FIFOSZ fixup. driver wants to controls the fifo allocation.
3217          */
3218         fifosz_fixup = true;
3219
3220         /* let the PSM run to the suspended state, set mode to BSS STA */
3221         W_REG(&regs->macintstatus, -1);
3222         brcms_b_mctrl(wlc_hw, ~0,
3223                        (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3224
3225         /* wait for ucode to self-suspend after auto-init */
3226         SPINWAIT(((R_REG(&regs->macintstatus) & MI_MACSSPNDD) == 0),
3227                  1000 * 1000);
3228         if ((R_REG(&regs->macintstatus) & MI_MACSSPNDD) == 0)
3229                 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3230                           "suspend!\n", wlc_hw->unit);
3231
3232         brcms_c_gpio_init(wlc);
3233
3234         sflags = ai_core_sflags(wlc_hw->sih, 0, 0);
3235
3236         if (D11REV_IS(wlc_hw->corerev, 23)) {
3237                 if (BRCMS_ISNPHY(wlc_hw->band))
3238                         brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3239                 else
3240                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3241                                   " %d\n", __func__, wlc_hw->unit,
3242                                   wlc_hw->corerev);
3243         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3244                 if (BRCMS_ISLCNPHY(wlc_hw->band))
3245                         brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3246                 else
3247                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3248                                   " %d\n", __func__, wlc_hw->unit,
3249                                   wlc_hw->corerev);
3250         } else {
3251                 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3252                           __func__, wlc_hw->unit, wlc_hw->corerev);
3253         }
3254
3255         /* For old ucode, txfifo sizes needs to be modified(increased) */
3256         if (fifosz_fixup == true)
3257                 brcms_b_corerev_fifofixup(wlc_hw);
3258
3259         /* check txfifo allocations match between ucode and driver */
3260         buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3261         if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3262                 i = TX_AC_BE_FIFO;
3263                 err = -1;
3264         }
3265         buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3266         if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3267                 i = TX_AC_VI_FIFO;
3268                 err = -1;
3269         }
3270         buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3271         buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3272         buf[TX_AC_BK_FIFO] &= 0xff;
3273         if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3274                 i = TX_AC_BK_FIFO;
3275                 err = -1;
3276         }
3277         if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3278                 i = TX_AC_VO_FIFO;
3279                 err = -1;
3280         }
3281         buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3282         buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3283         buf[TX_BCMC_FIFO] &= 0xff;
3284         if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3285                 i = TX_BCMC_FIFO;
3286                 err = -1;
3287         }
3288         if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3289                 i = TX_ATIM_FIFO;
3290                 err = -1;
3291         }
3292         if (err != 0)
3293                 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3294                           " driver size %d index %d\n", buf[i],
3295                           wlc_hw->xmtfifo_sz[i], i);
3296
3297         /* make sure we can still talk to the mac */
3298         WARN_ON(R_REG(&regs->maccontrol) == 0xffffffff);
3299
3300         /* band-specific inits done by wlc_bsinit() */
3301
3302         /* Set up frame burst size and antenna swap threshold init values */
3303         brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3304         brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3305
3306         /* enable one rx interrupt per received frame */
3307         W_REG(&regs->intrcvlazy[0], (1 << IRL_FC_SHIFT));
3308
3309         /* set the station mode (BSS STA) */
3310         brcms_b_mctrl(wlc_hw,
3311                        (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3312                        (MCTL_INFRA | MCTL_DISCARD_PMQ));
3313
3314         /* set up Beacon interval */
3315         bcnint_us = 0x8000 << 10;
3316         W_REG(&regs->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT));
3317         W_REG(&regs->tsf_cfpstart, bcnint_us);
3318         W_REG(&regs->macintstatus, MI_GP1);
3319
3320         /* write interrupt mask */
3321         W_REG(&regs->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK);
3322
3323         /* allow the MAC to control the PHY clock (dynamic on/off) */
3324         brcms_b_macphyclk_set(wlc_hw, ON);
3325
3326         /* program dynamic clock control fast powerup delay register */
3327         wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3328         W_REG(&regs->scc_fastpwrup_dly, wlc->fastpwrup_dly);
3329
3330         /* tell the ucode the corerev */
3331         brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3332
3333         /* tell the ucode MAC capabilities */
3334         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3335                            (u16) (wlc_hw->machwcap & 0xffff));
3336         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3337                            (u16) ((wlc_hw->
3338                                       machwcap >> 16) & 0xffff));
3339
3340         /* write retry limits to SCR, this done after PSM init */
3341         W_REG(&regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3342         (void)R_REG(&regs->objaddr);
3343         W_REG(&regs->objdata, wlc_hw->SRL);
3344         W_REG(&regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3345         (void)R_REG(&regs->objaddr);
3346         W_REG(&regs->objdata, wlc_hw->LRL);
3347
3348         /* write rate fallback retry limits */
3349         brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3350         brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3351
3352         AND_REG(&regs->ifs_ctl, 0x0FFF);
3353         W_REG(&regs->ifs_aifsn, EDCF_AIFSN_MIN);
3354
3355         /* init the tx dma engines */
3356         for (i = 0; i < NFIFO; i++) {
3357                 if (wlc_hw->di[i])
3358                         dma_txinit(wlc_hw->di[i]);
3359         }
3360
3361         /* init the rx dma engine(s) and post receive buffers */
3362         dma_rxinit(wlc_hw->di[RX_FIFO]);
3363         dma_rxfill(wlc_hw->di[RX_FIFO]);
3364 }
3365
3366 void
3367 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec,
3368                           bool mute) {
3369         u32 macintmask;
3370         bool fastclk;
3371         struct brcms_c_info *wlc = wlc_hw->wlc;
3372
3373         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3374
3375         /* request FAST clock if not on */
3376         fastclk = wlc_hw->forcefastclk;
3377         if (!fastclk)
3378                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3379
3380         /* disable interrupts */
3381         macintmask = brcms_intrsoff(wlc->wl);
3382
3383         /* set up the specified band and chanspec */
3384         brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3385         wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3386
3387         /* do one-time phy inits and calibration */
3388         wlc_phy_cal_init(wlc_hw->band->pi);
3389
3390         /* core-specific initialization */
3391         brcms_b_coreinit(wlc);
3392
3393         /* suspend the tx fifos and mute the phy for preism cac time */
3394         if (mute)
3395                 brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM);
3396
3397         /* band-specific inits */
3398         brcms_b_bsinit(wlc, chanspec);
3399
3400         /* restore macintmask */
3401         brcms_intrsrestore(wlc->wl, macintmask);
3402
3403         /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3404          * is suspended and brcms_c_enable_mac() will clear this override bit.
3405          */
3406         mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3407
3408         /*
3409          * initialize mac_suspend_depth to 1 to match ucode
3410          * initial suspended state
3411          */
3412         wlc_hw->mac_suspend_depth = 1;
3413
3414         /* restore the clk */
3415         if (!fastclk)
3416                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3417 }
3418
3419 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3420                                      u16 chanspec)
3421 {
3422         /* Save our copy of the chanspec */
3423         wlc->chanspec = chanspec;
3424
3425         /* Set the chanspec and power limits for this locale */
3426         brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3427
3428         if (wlc->stf->ss_algosel_auto)
3429                 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3430                                             chanspec);
3431
3432         brcms_c_stf_ss_update(wlc, wlc->band);
3433 }
3434
3435 static void
3436 brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
3437 {
3438         brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
3439                 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
3440                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
3441                 brcms_chspec_bw(wlc->default_bss->chanspec),
3442                 wlc->stf->txstreams);
3443 }
3444
3445 /* derive wlc->band->basic_rate[] table from 'rateset' */
3446 static void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
3447                               struct brcms_c_rateset *rateset)
3448 {
3449         u8 rate;
3450         u8 mandatory;
3451         u8 cck_basic = 0;
3452         u8 ofdm_basic = 0;
3453         u8 *br = wlc->band->basic_rate;
3454         uint i;
3455
3456         /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
3457         memset(br, 0, BRCM_MAXRATE + 1);
3458
3459         /* For each basic rate in the rates list, make an entry in the
3460          * best basic lookup.
3461          */
3462         for (i = 0; i < rateset->count; i++) {
3463                 /* only make an entry for a basic rate */
3464                 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
3465                         continue;
3466
3467                 /* mask off basic bit */
3468                 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
3469
3470                 if (rate > BRCM_MAXRATE) {
3471                         wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
3472                                   "invalid rate 0x%X in rate set\n",
3473                                   rateset->rates[i]);
3474                         continue;
3475                 }
3476
3477                 br[rate] = rate;
3478         }
3479
3480         /* The rate lookup table now has non-zero entries for each
3481          * basic rate, equal to the basic rate: br[basicN] = basicN
3482          *
3483          * To look up the best basic rate corresponding to any
3484          * particular rate, code can use the basic_rate table
3485          * like this
3486          *
3487          * basic_rate = wlc->band->basic_rate[tx_rate]
3488          *
3489          * Make sure there is a best basic rate entry for
3490          * every rate by walking up the table from low rates
3491          * to high, filling in holes in the lookup table
3492          */
3493
3494         for (i = 0; i < wlc->band->hw_rateset.count; i++) {
3495                 rate = wlc->band->hw_rateset.rates[i];
3496
3497                 if (br[rate] != 0) {
3498                         /* This rate is a basic rate.
3499                          * Keep track of the best basic rate so far by
3500                          * modulation type.
3501                          */
3502                         if (is_ofdm_rate(rate))
3503                                 ofdm_basic = rate;
3504                         else
3505                                 cck_basic = rate;
3506
3507                         continue;
3508                 }
3509
3510                 /* This rate is not a basic rate so figure out the
3511                  * best basic rate less than this rate and fill in
3512                  * the hole in the table
3513                  */
3514
3515                 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
3516
3517                 if (br[rate] != 0)
3518                         continue;
3519
3520                 if (is_ofdm_rate(rate)) {
3521                         /*
3522                          * In 11g and 11a, the OFDM mandatory rates
3523                          * are 6, 12, and 24 Mbps
3524                          */
3525                         if (rate >= BRCM_RATE_24M)
3526                                 mandatory = BRCM_RATE_24M;
3527                         else if (rate >= BRCM_RATE_12M)
3528                                 mandatory = BRCM_RATE_12M;
3529                         else
3530                                 mandatory = BRCM_RATE_6M;
3531                 } else {
3532                         /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
3533                         mandatory = rate;
3534                 }
3535
3536                 br[rate] = mandatory;
3537         }
3538 }
3539
3540 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3541                                      u16 chanspec)
3542 {
3543         struct brcms_c_rateset default_rateset;
3544         uint parkband;
3545         uint i, band_order[2];
3546
3547         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3548         /*
3549          * We might have been bandlocked during down and the chip
3550          * power-cycled (hibernate). Figure out the right band to park on
3551          */
3552         if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3553                 /* updated in brcms_c_bandlock() */
3554                 parkband = wlc->band->bandunit;
3555                 band_order[0] = band_order[1] = parkband;
3556         } else {
3557                 /* park on the band of the specified chanspec */
3558                 parkband = chspec_bandunit(chanspec);
3559
3560                 /* order so that parkband initialize last */
3561                 band_order[0] = parkband ^ 1;
3562                 band_order[1] = parkband;
3563         }
3564
3565         /* make each band operational, software state init */
3566         for (i = 0; i < wlc->pub->_nbands; i++) {
3567                 uint j = band_order[i];
3568
3569                 wlc->band = wlc->bandstate[j];
3570
3571                 brcms_default_rateset(wlc, &default_rateset);
3572
3573                 /* fill in hw_rate */
3574                 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3575                                    false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3576                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3577
3578                 /* init basic rate lookup */
3579                 brcms_c_rate_lookup_init(wlc, &default_rateset);
3580         }
3581
3582         /* sync up phy/radio chanspec */
3583         brcms_c_set_phy_chanspec(wlc, chanspec);
3584 }
3585
3586 static void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc)
3587 {
3588         if (wlc->bcnmisc_monitor)
3589                 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC);
3590         else
3591                 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, 0);
3592 }
3593
3594 void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc)
3595 {
3596         wlc->bcnmisc_monitor = promisc;
3597         brcms_c_mac_bcn_promisc(wlc);
3598 }
3599
3600 /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */
3601 static void brcms_c_mac_promisc(struct brcms_c_info *wlc)
3602 {
3603         u32 promisc_bits = 0;
3604
3605         /*
3606          * promiscuous mode just sets MCTL_PROMISC
3607          * Note: APs get all BSS traffic without the need to set
3608          * the MCTL_PROMISC bit since all BSS data traffic is
3609          * directed at the AP
3610          */
3611         if (wlc->pub->promisc)
3612                 promisc_bits |= MCTL_PROMISC;
3613
3614         /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
3615          * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is
3616          * handled in brcms_c_mac_bcn_promisc()
3617          */
3618         if (wlc->monitor)
3619                 promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL;
3620
3621         brcms_b_mctrl(wlc->hw, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits);
3622 }
3623
3624 /*
3625  * ucode, hwmac update
3626  *    Channel dependent updates for ucode and hw
3627  */
3628 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3629 {
3630         /* enable or disable any active IBSSs depending on whether or not
3631          * we are on the home channel
3632          */
3633         if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3634                 if (wlc->pub->associated) {
3635                         /*
3636                          * BMAC_NOTE: This is something that should be fixed
3637                          * in ucode inits. I think that the ucode inits set
3638                          * up the bcn templates and shm values with a bogus
3639                          * beacon. This should not be done in the inits. If
3640                          * ucode needs to set up a beacon for testing, the
3641                          * test routines should write it down, not expect the
3642                          * inits to populate a bogus beacon.
3643                          */
3644                         if (BRCMS_PHY_11N_CAP(wlc->band))
3645                                 brcms_b_write_shm(wlc->hw,
3646                                                 M_BCN_TXTSF_OFFSET, 0);
3647                 }
3648         } else {
3649                 /* disable an active IBSS if we are not on the home channel */
3650         }
3651
3652         /* update the various promisc bits */
3653         brcms_c_mac_bcn_promisc(wlc);
3654         brcms_c_mac_promisc(wlc);
3655 }
3656
3657 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
3658                                    u8 basic_rate)
3659 {
3660         u8 phy_rate, index;
3661         u8 basic_phy_rate, basic_index;
3662         u16 dir_table, basic_table;
3663         u16 basic_ptr;
3664
3665         /* Shared memory address for the table we are reading */
3666         dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
3667
3668         /* Shared memory address for the table we are writing */
3669         basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
3670
3671         /*
3672          * for a given rate, the LS-nibble of the PLCP SIGNAL field is
3673          * the index into the rate table.
3674          */
3675         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
3676         basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
3677         index = phy_rate & 0xf;
3678         basic_index = basic_phy_rate & 0xf;
3679
3680         /* Find the SHM pointer to the ACK rate entry by looking in the
3681          * Direct-map Table
3682          */
3683         basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
3684
3685         /* Update the SHM BSS-basic-rate-set mapping table with the pointer
3686          * to the correct basic rate for the given incoming rate
3687          */
3688         brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
3689 }
3690
3691 static const struct brcms_c_rateset *
3692 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
3693 {
3694         const struct brcms_c_rateset *rs_dflt;
3695
3696         if (BRCMS_PHY_11N_CAP(wlc->band)) {
3697                 if (wlc->band->bandtype == BRCM_BAND_5G)
3698                         rs_dflt = &ofdm_mimo_rates;
3699                 else
3700                         rs_dflt = &cck_ofdm_mimo_rates;
3701         } else if (wlc->band->gmode)
3702                 rs_dflt = &cck_ofdm_rates;
3703         else
3704                 rs_dflt = &cck_rates;
3705
3706         return rs_dflt;
3707 }
3708
3709 static void brcms_c_set_ratetable(struct brcms_c_info *wlc)
3710 {
3711         const struct brcms_c_rateset *rs_dflt;
3712         struct brcms_c_rateset rs;
3713         u8 rate, basic_rate;
3714         uint i;
3715
3716         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
3717
3718         brcms_c_rateset_copy(rs_dflt, &rs);
3719         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
3720
3721         /* walk the phy rate table and update SHM basic rate lookup table */
3722         for (i = 0; i < rs.count; i++) {
3723                 rate = rs.rates[i] & BRCMS_RATE_MASK;
3724
3725                 /* for a given rate brcms_basic_rate returns the rate at
3726                  * which a response ACK/CTS should be sent.
3727                  */
3728                 basic_rate = brcms_basic_rate(wlc, rate);
3729                 if (basic_rate == 0)
3730                         /* This should only happen if we are using a
3731                          * restricted rateset.
3732                          */
3733                         basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
3734
3735                 brcms_c_write_rate_shm(wlc, rate, basic_rate);
3736         }
3737 }
3738
3739 /* band-specific init */
3740 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3741 {
3742         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3743                  wlc->pub->unit, wlc->band->bandunit);
3744
3745         /* write ucode ACK/CTS rate table */
3746         brcms_c_set_ratetable(wlc);
3747
3748         /* update some band specific mac configuration */
3749         brcms_c_ucode_mac_upd(wlc);
3750
3751         /* init antenna selection */
3752         brcms_c_antsel_init(wlc->asi);
3753
3754 }
3755
3756 /* formula:  IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3757 static int
3758 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3759                    bool writeToShm)
3760 {
3761         int idle_busy_ratio_x_16 = 0;
3762         uint offset =
3763             isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3764             M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3765         if (duty_cycle > 100 || duty_cycle < 0) {
3766                 wiphy_err(wlc->wiphy, "wl%d:  duty cycle value off limit\n",
3767                           wlc->pub->unit);
3768                 return -EINVAL;
3769         }
3770         if (duty_cycle)
3771                 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3772         /* Only write to shared memory  when wl is up */
3773         if (writeToShm)
3774                 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3775
3776         if (isOFDM)
3777                 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3778         else
3779                 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3780
3781         return 0;
3782 }
3783
3784 /*
3785  * Initialize the base precedence map for dequeueing
3786  * from txq based on WME settings
3787  */
3788 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3789 {
3790         wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3791         memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3792
3793         wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3794         wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3795         wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3796         wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3797 }
3798
3799 static void
3800 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3801                              struct brcms_txq_info *qi, bool on, int prio)
3802 {
3803         /* transmit flowcontrol is not yet implemented */
3804 }
3805
3806 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3807 {
3808         struct brcms_txq_info *qi;
3809
3810         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3811                 if (qi->stopped) {
3812                         brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3813                         qi->stopped = 0;
3814                 }
3815         }
3816 }
3817
3818 /* push sw hps and wake state through hardware */
3819 static void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3820 {
3821         u32 v1, v2;
3822         bool hps;
3823         bool awake_before;
3824
3825         hps = brcms_c_ps_allowed(wlc);
3826
3827         BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3828
3829         v1 = R_REG(&wlc->regs->maccontrol);
3830         v2 = MCTL_WAKE;
3831         if (hps)
3832                 v2 |= MCTL_HPS;
3833
3834         brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3835
3836         awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3837
3838         if (!awake_before)
3839                 brcms_b_wait_for_wake(wlc->hw);
3840 }
3841
3842 /*
3843  * Write this BSS config's MAC address to core.
3844  * Updates RXE match engine.
3845  */
3846 static int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3847 {
3848         int err = 0;
3849         struct brcms_c_info *wlc = bsscfg->wlc;
3850
3851         /* enter the MAC addr into the RXE match registers */
3852         brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3853
3854         brcms_c_ampdu_macaddr_upd(wlc);
3855
3856         return err;
3857 }
3858
3859 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3860  * Updates RXE match engine.
3861  */
3862 static void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3863 {
3864         /* we need to update BSSID in RXE match registers */
3865         brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3866 }
3867
3868 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3869 {
3870         wlc_hw->shortslot = shortslot;
3871
3872         if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3873                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3874                 brcms_b_update_slot_timing(wlc_hw, shortslot);
3875                 brcms_c_enable_mac(wlc_hw->wlc);
3876         }
3877 }
3878
3879 /*
3880  * Suspend the the MAC and update the slot timing
3881  * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3882  */
3883 static void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3884 {
3885         /* use the override if it is set */
3886         if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3887                 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3888
3889         if (wlc->shortslot == shortslot)
3890                 return;
3891
3892         wlc->shortslot = shortslot;
3893
3894         brcms_b_set_shortslot(wlc->hw, shortslot);
3895 }
3896
3897 static void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3898 {
3899         if (wlc->home_chanspec != chanspec) {
3900                 wlc->home_chanspec = chanspec;
3901
3902                 if (wlc->bsscfg->associated)
3903                         wlc->bsscfg->current_bss->chanspec = chanspec;
3904         }
3905 }
3906
3907 void
3908 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3909                       bool mute, struct txpwr_limits *txpwr)
3910 {
3911         uint bandunit;
3912
3913         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3914
3915         wlc_hw->chanspec = chanspec;
3916
3917         /* Switch bands if necessary */
3918         if (wlc_hw->_nbands > 1) {
3919                 bandunit = chspec_bandunit(chanspec);
3920                 if (wlc_hw->band->bandunit != bandunit) {
3921                         /* brcms_b_setband disables other bandunit,
3922                          *  use light band switch if not up yet
3923                          */
3924                         if (wlc_hw->up) {
3925                                 wlc_phy_chanspec_radio_set(wlc_hw->
3926                                                            bandstate[bandunit]->
3927                                                            pi, chanspec);
3928                                 brcms_b_setband(wlc_hw, bandunit, chanspec);
3929                         } else {
3930                                 brcms_c_setxband(wlc_hw, bandunit);
3931                         }
3932                 }
3933         }
3934
3935         wlc_phy_initcal_enable(wlc_hw->band->pi, !mute);
3936
3937         if (!wlc_hw->up) {
3938                 if (wlc_hw->clk)
3939                         wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3940                                                   chanspec);
3941                 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3942         } else {
3943                 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3944                 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3945
3946                 /* Update muting of the channel */
3947                 brcms_b_mute(wlc_hw, mute, 0);
3948         }
3949 }
3950
3951 /* switch to and initialize new band */
3952 static void brcms_c_setband(struct brcms_c_info *wlc,
3953                                            uint bandunit)
3954 {
3955         wlc->band = wlc->bandstate[bandunit];
3956
3957         if (!wlc->pub->up)
3958                 return;
3959
3960         /* wait for at least one beacon before entering sleeping state */
3961         brcms_c_set_ps_ctrl(wlc);
3962
3963         /* band-specific initializations */
3964         brcms_c_bsinit(wlc);
3965 }
3966
3967 static void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3968 {
3969         uint bandunit;
3970         bool switchband = false;
3971         u16 old_chanspec = wlc->chanspec;
3972
3973         if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3974                 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3975                           wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3976                 return;
3977         }
3978
3979         /* Switch bands if necessary */
3980         if (wlc->pub->_nbands > 1) {
3981                 bandunit = chspec_bandunit(chanspec);
3982                 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3983                         switchband = true;
3984                         if (wlc->bandlocked) {
3985                                 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3986                                           "band is locked!\n",
3987                                           wlc->pub->unit, __func__,
3988                                           CHSPEC_CHANNEL(chanspec));
3989                                 return;
3990                         }
3991                         /*
3992                          * should the setband call come after the
3993                          * brcms_b_chanspec() ? if the setband updates
3994                          * (brcms_c_bsinit) use low level calls to inspect and
3995                          * set state, the state inspected may be from the wrong
3996                          * band, or the following brcms_b_set_chanspec() may
3997                          * undo the work.
3998                          */
3999                         brcms_c_setband(wlc, bandunit);
4000                 }
4001         }
4002
4003         /* sync up phy/radio chanspec */
4004         brcms_c_set_phy_chanspec(wlc, chanspec);
4005
4006         /* init antenna selection */
4007         if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
4008                 brcms_c_antsel_init(wlc->asi);
4009
4010                 /* Fix the hardware rateset based on bw.
4011                  * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
4012                  */
4013                 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
4014                         wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
4015         }
4016
4017         /* update some mac configuration since chanspec changed */
4018         brcms_c_ucode_mac_upd(wlc);
4019 }
4020
4021 /*
4022  * This function changes the phytxctl for beacon based on current
4023  * beacon ratespec AND txant setting as per this table:
4024  *  ratespec     CCK            ant = wlc->stf->txant
4025  *              OFDM            ant = 3
4026  */
4027 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4028                                        u32 bcn_rspec)
4029 {
4030         u16 phyctl;
4031         u16 phytxant = wlc->stf->phytxant;
4032         u16 mask = PHY_TXC_ANT_MASK;
4033
4034         /* for non-siso rates or default setting, use the available chains */
4035         if (BRCMS_PHY_11N_CAP(wlc->band))
4036                 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4037
4038         phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4039         phyctl = (phyctl & ~mask) | phytxant;
4040         brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4041 }
4042
4043 /*
4044  * centralized protection config change function to simplify debugging, no
4045  * consistency checking this should be called only on changes to avoid overhead
4046  * in periodic function
4047  */
4048 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4049 {
4050         BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4051
4052         switch (idx) {
4053         case BRCMS_PROT_G_SPEC:
4054                 wlc->protection->_g = (bool) val;
4055                 break;
4056         case BRCMS_PROT_G_OVR:
4057                 wlc->protection->g_override = (s8) val;
4058                 break;
4059         case BRCMS_PROT_G_USER:
4060                 wlc->protection->gmode_user = (u8) val;
4061                 break;
4062         case BRCMS_PROT_OVERLAP:
4063                 wlc->protection->overlap = (s8) val;
4064                 break;
4065         case BRCMS_PROT_N_USER:
4066                 wlc->protection->nmode_user = (s8) val;
4067                 break;
4068         case BRCMS_PROT_N_CFG:
4069                 wlc->protection->n_cfg = (s8) val;
4070                 break;
4071         case BRCMS_PROT_N_CFG_OVR:
4072                 wlc->protection->n_cfg_override = (s8) val;
4073                 break;
4074         case BRCMS_PROT_N_NONGF:
4075                 wlc->protection->nongf = (bool) val;
4076                 break;
4077         case BRCMS_PROT_N_NONGF_OVR:
4078                 wlc->protection->nongf_override = (s8) val;
4079                 break;
4080         case BRCMS_PROT_N_PAM_OVR:
4081                 wlc->protection->n_pam_override = (s8) val;
4082                 break;
4083         case BRCMS_PROT_N_OBSS:
4084                 wlc->protection->n_obss = (bool) val;
4085                 break;
4086
4087         default:
4088                 break;
4089         }
4090
4091 }
4092
4093 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4094 {
4095         if (wlc->pub->up) {
4096                 brcms_c_update_beacon(wlc);
4097                 brcms_c_update_probe_resp(wlc, true);
4098         }
4099 }
4100
4101 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4102 {
4103         wlc->stf->ldpc = val;
4104
4105         if (wlc->pub->up) {
4106                 brcms_c_update_beacon(wlc);
4107                 brcms_c_update_probe_resp(wlc, true);
4108                 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4109         }
4110 }
4111
4112 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4113                        const struct ieee80211_tx_queue_params *params,
4114                        bool suspend)
4115 {
4116         int i;
4117         struct shm_acparams acp_shm;
4118         u16 *shm_entry;
4119
4120         /* Only apply params if the core is out of reset and has clocks */
4121         if (!wlc->clk) {
4122                 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4123                           __func__);
4124                 return;
4125         }
4126
4127         memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4128         /* fill in shm ac params struct */
4129         acp_shm.txop = params->txop;
4130         /* convert from units of 32us to us for ucode */
4131         wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4132             EDCF_TXOP2USEC(acp_shm.txop);
4133         acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4134
4135         if (aci == AC_VI && acp_shm.txop == 0
4136             && acp_shm.aifs < EDCF_AIFSN_MAX)
4137                 acp_shm.aifs++;
4138
4139         if (acp_shm.aifs < EDCF_AIFSN_MIN
4140             || acp_shm.aifs > EDCF_AIFSN_MAX) {
4141                 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4142                           "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4143         } else {
4144                 acp_shm.cwmin = params->cw_min;
4145                 acp_shm.cwmax = params->cw_max;
4146                 acp_shm.cwcur = acp_shm.cwmin;
4147                 acp_shm.bslots =
4148                     R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur;
4149                 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4150                 /* Indicate the new params to the ucode */
4151                 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4152                                                   wme_ac2fifo[aci] *
4153                                                   M_EDCF_QLEN +
4154                                                   M_EDCF_STATUS_OFF));
4155                 acp_shm.status |= WME_STATUS_NEWAC;
4156
4157                 /* Fill in shm acparam table */
4158                 shm_entry = (u16 *) &acp_shm;
4159                 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4160                         brcms_b_write_shm(wlc->hw,
4161                                           M_EDCF_QINFO +
4162                                           wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4163                                           *shm_entry++);
4164         }
4165
4166         if (suspend) {
4167                 brcms_c_suspend_mac_and_wait(wlc);
4168                 brcms_c_enable_mac(wlc);
4169         }
4170 }
4171
4172 static void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4173 {
4174         u16 aci;
4175         int i_ac;
4176         struct ieee80211_tx_queue_params txq_pars;
4177         static const struct edcf_acparam default_edcf_acparams[] = {
4178                  {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4179                  {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4180                  {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4181                  {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4182         }; /* ucode needs these parameters during its initialization */
4183         const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4184
4185         for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) {
4186                 /* find out which ac this set of params applies to */
4187                 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4188
4189                 /* fill in shm ac params struct */
4190                 txq_pars.txop = edcf_acp->TXOP;
4191                 txq_pars.aifs = edcf_acp->ACI;
4192
4193                 /* CWmin = 2^(ECWmin) - 1 */
4194                 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4195                 /* CWmax = 2^(ECWmax) - 1 */
4196                 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4197                                             >> EDCF_ECWMAX_SHIFT);
4198                 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4199         }
4200
4201         if (suspend) {
4202                 brcms_c_suspend_mac_and_wait(wlc);
4203                 brcms_c_enable_mac(wlc);
4204         }
4205 }
4206
4207 /* maintain LED behavior in down state */
4208 static void brcms_c_down_led_upd(struct brcms_c_info *wlc)
4209 {
4210         /*
4211          * maintain LEDs while in down state, turn on sbclk if
4212          * not available yet. Turn on sbclk if necessary
4213          */
4214         brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_FLIP);
4215         brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_FLIP);
4216 }
4217
4218 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4219 {
4220         /* Don't start the timer if HWRADIO feature is disabled */
4221         if (wlc->radio_monitor)
4222                 return;
4223
4224         wlc->radio_monitor = true;
4225         brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4226         brcms_add_timer(wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true);
4227 }
4228
4229 static void brcms_c_radio_disable(struct brcms_c_info *wlc)
4230 {
4231         if (!wlc->pub->up) {
4232                 brcms_c_down_led_upd(wlc);
4233                 return;
4234         }
4235
4236         brcms_c_radio_monitor_start(wlc);
4237         brcms_down(wlc->wl);
4238 }
4239
4240 static void brcms_c_radio_enable(struct brcms_c_info *wlc)
4241 {
4242         if (wlc->pub->up)
4243                 return;
4244
4245         if (brcms_deviceremoved(wlc))
4246                 return;
4247
4248         brcms_up(wlc->wl);
4249 }
4250
4251 static bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4252 {
4253         if (!wlc->radio_monitor)
4254                 return true;
4255
4256         wlc->radio_monitor = false;
4257         brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4258         return brcms_del_timer(wlc->radio_timer);
4259 }
4260
4261 /* read hwdisable state and propagate to wlc flag */
4262 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4263 {
4264         if (wlc->pub->hw_off)
4265                 return;
4266
4267         if (brcms_b_radio_read_hwdisabled(wlc->hw))
4268                 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4269         else
4270                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4271 }
4272
4273 /*
4274  * centralized radio disable/enable function,
4275  * invoke radio enable/disable after updating hwradio status
4276  */
4277 static void brcms_c_radio_upd(struct brcms_c_info *wlc)
4278 {
4279         if (wlc->pub->radio_disabled)
4280                 brcms_c_radio_disable(wlc);
4281         else
4282                 brcms_c_radio_enable(wlc);
4283 }
4284
4285 /* update hwradio status and return it */
4286 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4287 {
4288         brcms_c_radio_hwdisable_upd(wlc);
4289
4290         return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4291                         true : false;
4292 }
4293
4294 /* periodical query hw radio button while driver is "down" */
4295 static void brcms_c_radio_timer(void *arg)
4296 {
4297         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4298
4299         if (brcms_deviceremoved(wlc)) {
4300                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4301                         __func__);
4302                 brcms_down(wlc->wl);
4303                 return;
4304         }
4305
4306         brcms_c_radio_hwdisable_upd(wlc);
4307         brcms_c_radio_upd(wlc);
4308 }
4309
4310 /* common low-level watchdog code */
4311 static void brcms_b_watchdog(void *arg)
4312 {
4313         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4314         struct brcms_hardware *wlc_hw = wlc->hw;
4315
4316         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4317
4318         if (!wlc_hw->up)
4319                 return;
4320
4321         /* increment second count */
4322         wlc_hw->now++;
4323
4324         /* Check for FIFO error interrupts */
4325         brcms_b_fifoerrors(wlc_hw);
4326
4327         /* make sure RX dma has buffers */
4328         dma_rxfill(wlc->hw->di[RX_FIFO]);
4329
4330         wlc_phy_watchdog(wlc_hw->band->pi);
4331 }
4332
4333 static void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc)
4334 {
4335         /*
4336          * Clear the WL_RADIO_MPC_DISABLE bit when mpc feature is disabled
4337          * in case the WL_RADIO_MPC_DISABLE bit was set. Stop the radio
4338          * monitor also when WL_RADIO_MPC_DISABLE is the only reason that
4339          * the radio is going down.
4340          */
4341         if (!wlc->pub->radio_disabled)
4342                 return;
4343         mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
4344         brcms_c_radio_upd(wlc);
4345         if (!wlc->pub->radio_disabled)
4346                 brcms_c_radio_monitor_stop(wlc);
4347 }
4348
4349 /* common watchdog code */
4350 static void brcms_c_watchdog(void *arg)
4351 {
4352         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4353
4354         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4355
4356         if (!wlc->pub->up)
4357                 return;
4358
4359         if (brcms_deviceremoved(wlc)) {
4360                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4361                           __func__);
4362                 brcms_down(wlc->wl);
4363                 return;
4364         }
4365
4366         /* increment second count */
4367         wlc->pub->now++;
4368
4369         /* delay radio disable */
4370         if (wlc->mpc_delay_off) {
4371                 if (--wlc->mpc_delay_off == 0) {
4372                         mboolset(wlc->pub->radio_disabled,
4373                                  WL_RADIO_MPC_DISABLE);
4374                 }
4375         }
4376
4377         /* mpc sync */
4378         brcms_c_radio_mpc_upd(wlc);
4379         /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */
4380         brcms_c_radio_hwdisable_upd(wlc);
4381         brcms_c_radio_upd(wlc);
4382         /* if radio is disable, driver may be down, quit here */
4383         if (wlc->pub->radio_disabled)
4384                 return;
4385
4386         brcms_b_watchdog(wlc);
4387
4388         /*
4389          * occasionally sample mac stat counters to
4390          * detect 16-bit counter wrap
4391          */
4392         if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4393                 brcms_c_statsupd(wlc);
4394
4395         if (BRCMS_ISNPHY(wlc->band) &&
4396             ((wlc->pub->now - wlc->tempsense_lasttime) >=
4397              BRCMS_TEMPSENSE_PERIOD)) {
4398                 wlc->tempsense_lasttime = wlc->pub->now;
4399                 brcms_c_tempsense_upd(wlc);
4400         }
4401 }
4402
4403 static void brcms_c_watchdog_by_timer(void *arg)
4404 {
4405         brcms_c_watchdog(arg);
4406 }
4407
4408 static bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4409 {
4410         wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4411                 wlc, "watchdog");
4412         if (!wlc->wdtimer) {
4413                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for wdtimer "
4414                           "failed\n", unit);
4415                 goto fail;
4416         }
4417
4418         wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4419                 wlc, "radio");
4420         if (!wlc->radio_timer) {
4421                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for radio_timer "
4422                           "failed\n", unit);
4423                 goto fail;
4424         }
4425
4426         return true;
4427
4428  fail:
4429         return false;
4430 }
4431
4432 /*
4433  * Initialize brcms_c_info default values ...
4434  * may get overrides later in this function
4435  */
4436 static void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4437 {
4438         int i;
4439
4440         /* Save our copy of the chanspec */
4441         wlc->chanspec = ch20mhz_chspec(1);
4442
4443         /* various 802.11g modes */
4444         wlc->shortslot = false;
4445         wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4446
4447         brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4448         brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4449
4450         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4451                                BRCMS_PROTECTION_AUTO);
4452         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4453         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4454                                BRCMS_PROTECTION_AUTO);
4455         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4456         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4457
4458         brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4459                                BRCMS_PROTECTION_CTL_OVERLAP);
4460
4461         /* 802.11g draft 4.0 NonERP elt advertisement */
4462         wlc->include_legacy_erp = true;
4463
4464         wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4465         wlc->stf->txant = ANT_TX_DEF;
4466
4467         wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4468
4469         wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4470         for (i = 0; i < NFIFO; i++)
4471                 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4472         wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4473
4474         /* default rate fallback retry limits */
4475         wlc->SFBL = RETRY_SHORT_FB;
4476         wlc->LFBL = RETRY_LONG_FB;
4477
4478         /* default mac retry limits */
4479         wlc->SRL = RETRY_SHORT_DEF;
4480         wlc->LRL = RETRY_LONG_DEF;
4481
4482         /* WME QoS mode is Auto by default */
4483         wlc->pub->_ampdu = AMPDU_AGG_HOST;
4484         wlc->pub->bcmerror = 0;
4485
4486         /* initialize mpc delay */
4487         wlc->mpc_delay_off = BRCMS_MPC_MIN_DELAYCNT;
4488 }
4489
4490 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4491 {
4492         uint err = 0;
4493         uint unit;
4494         unit = wlc->pub->unit;
4495
4496         wlc->asi = brcms_c_antsel_attach(wlc);
4497         if (wlc->asi == NULL) {
4498                 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4499                           "failed\n", unit);
4500                 err = 44;
4501                 goto fail;
4502         }
4503
4504         wlc->ampdu = brcms_c_ampdu_attach(wlc);
4505         if (wlc->ampdu == NULL) {
4506                 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4507                           "failed\n", unit);
4508                 err = 50;
4509                 goto fail;
4510         }
4511
4512         if ((brcms_c_stf_attach(wlc) != 0)) {
4513                 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4514                           "failed\n", unit);
4515                 err = 68;
4516                 goto fail;
4517         }
4518  fail:
4519         return err;
4520 }
4521
4522 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4523 {
4524         return wlc->pub;
4525 }
4526
4527 /* low level attach
4528  *    run backplane attach, init nvram
4529  *    run phy attach
4530  *    initialize software state for each core and band
4531  *    put the whole chip in reset(driver down state), no clock
4532  */
4533 static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
4534                           uint unit, bool piomode, void __iomem *regsva,
4535                           struct pci_dev *btparam)
4536 {
4537         struct brcms_hardware *wlc_hw;
4538         struct d11regs __iomem *regs;
4539         char *macaddr = NULL;
4540         uint err = 0;
4541         uint j;
4542         bool wme = false;
4543         struct shared_phy_params sha_params;
4544         struct wiphy *wiphy = wlc->wiphy;
4545
4546         BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor,
4547                 device);
4548
4549         wme = true;
4550
4551         wlc_hw = wlc->hw;
4552         wlc_hw->wlc = wlc;
4553         wlc_hw->unit = unit;
4554         wlc_hw->band = wlc_hw->bandstate[0];
4555         wlc_hw->_piomode = piomode;
4556
4557         /* populate struct brcms_hardware with default values  */
4558         brcms_b_info_init(wlc_hw);
4559
4560         /*
4561          * Do the hardware portion of the attach. Also initialize software
4562          * state that depends on the particular hardware we are running.
4563          */
4564         wlc_hw->sih = ai_attach(regsva, btparam);
4565         if (wlc_hw->sih == NULL) {
4566                 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4567                           unit);
4568                 err = 11;
4569                 goto fail;
4570         }
4571
4572         /* verify again the device is supported */
4573         if (!brcms_c_chipmatch(vendor, device)) {
4574                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4575                         "vendor/device (0x%x/0x%x)\n",
4576                          unit, vendor, device);
4577                 err = 12;
4578                 goto fail;
4579         }
4580
4581         wlc_hw->vendorid = vendor;
4582         wlc_hw->deviceid = device;
4583
4584         /* set bar0 window to point at D11 core */
4585         wlc_hw->regs = (struct d11regs __iomem *)
4586                                 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
4587         wlc_hw->corerev = ai_corerev(wlc_hw->sih);
4588
4589         regs = wlc_hw->regs;
4590
4591         wlc->regs = wlc_hw->regs;
4592
4593         /* validate chip, chiprev and corerev */
4594         if (!brcms_c_isgoodchip(wlc_hw)) {
4595                 err = 13;
4596                 goto fail;
4597         }
4598
4599         /* initialize power control registers */
4600         ai_clkctl_init(wlc_hw->sih);
4601
4602         /* request fastclock and force fastclock for the rest of attach
4603          * bring the d11 core out of reset.
4604          *   For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4605          *   is still false; But it will be called again inside wlc_corereset,
4606          *   after d11 is out of reset.
4607          */
4608         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4609         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4610
4611         if (!brcms_b_validate_chip_access(wlc_hw)) {
4612                 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4613                         "failed\n", unit);
4614                 err = 14;
4615                 goto fail;
4616         }
4617
4618         /* get the board rev, used just below */
4619         j = getintvar(wlc_hw->sih, BRCMS_SROM_BOARDREV);
4620         /* promote srom boardrev of 0xFF to 1 */
4621         if (j == BOARDREV_PROMOTABLE)
4622                 j = BOARDREV_PROMOTED;
4623         wlc_hw->boardrev = (u16) j;
4624         if (!brcms_c_validboardtype(wlc_hw)) {
4625                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4626                         "board type (0x%x)" " or revision level (0x%x)\n",
4627                          unit, wlc_hw->sih->boardtype, wlc_hw->boardrev);
4628                 err = 15;
4629                 goto fail;
4630         }
4631         wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, BRCMS_SROM_REV);
4632         wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih,
4633                                              BRCMS_SROM_BOARDFLAGS);
4634         wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih,
4635                                               BRCMS_SROM_BOARDFLAGS2);
4636
4637         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4638                 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4639
4640         /* check device id(srom, nvram etc.) to set bands */
4641         if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4642             wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4643                 /* Dualband boards */
4644                 wlc_hw->_nbands = 2;
4645         else
4646                 wlc_hw->_nbands = 1;
4647
4648         if ((wlc_hw->sih->chip == BCM43225_CHIP_ID))
4649                 wlc_hw->_nbands = 1;
4650
4651         /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4652          * unconditionally does the init of these values
4653          */
4654         wlc->vendorid = wlc_hw->vendorid;
4655         wlc->deviceid = wlc_hw->deviceid;
4656         wlc->pub->sih = wlc_hw->sih;
4657         wlc->pub->corerev = wlc_hw->corerev;
4658         wlc->pub->sromrev = wlc_hw->sromrev;
4659         wlc->pub->boardrev = wlc_hw->boardrev;
4660         wlc->pub->boardflags = wlc_hw->boardflags;
4661         wlc->pub->boardflags2 = wlc_hw->boardflags2;
4662         wlc->pub->_nbands = wlc_hw->_nbands;
4663
4664         wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4665
4666         if (wlc_hw->physhim == NULL) {
4667                 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4668                         "failed\n", unit);
4669                 err = 25;
4670                 goto fail;
4671         }
4672
4673         /* pass all the parameters to wlc_phy_shared_attach in one struct */
4674         sha_params.sih = wlc_hw->sih;
4675         sha_params.physhim = wlc_hw->physhim;
4676         sha_params.unit = unit;
4677         sha_params.corerev = wlc_hw->corerev;
4678         sha_params.vid = wlc_hw->vendorid;
4679         sha_params.did = wlc_hw->deviceid;
4680         sha_params.chip = wlc_hw->sih->chip;
4681         sha_params.chiprev = wlc_hw->sih->chiprev;
4682         sha_params.chippkg = wlc_hw->sih->chippkg;
4683         sha_params.sromrev = wlc_hw->sromrev;
4684         sha_params.boardtype = wlc_hw->sih->boardtype;
4685         sha_params.boardrev = wlc_hw->boardrev;
4686         sha_params.boardvendor = wlc_hw->sih->boardvendor;
4687         sha_params.boardflags = wlc_hw->boardflags;
4688         sha_params.boardflags2 = wlc_hw->boardflags2;
4689         sha_params.buscorerev = wlc_hw->sih->buscorerev;
4690
4691         /* alloc and save pointer to shared phy state area */
4692         wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4693         if (!wlc_hw->phy_sh) {
4694                 err = 16;
4695                 goto fail;
4696         }
4697
4698         /* initialize software state for each core and band */
4699         for (j = 0; j < wlc_hw->_nbands; j++) {
4700                 /*
4701                  * band0 is always 2.4Ghz
4702                  * band1, if present, is 5Ghz
4703                  */
4704
4705                 brcms_c_setxband(wlc_hw, j);
4706
4707                 wlc_hw->band->bandunit = j;
4708                 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4709                 wlc->band->bandunit = j;
4710                 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4711                 wlc->core->coreidx = ai_coreidx(wlc_hw->sih);
4712
4713                 wlc_hw->machwcap = R_REG(&regs->machwcap);
4714                 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4715
4716                 /* init tx fifo size */
4717                 wlc_hw->xmtfifo_sz =
4718                     xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4719
4720                 /* Get a phy for this band */
4721                 wlc_hw->band->pi =
4722                         wlc_phy_attach(wlc_hw->phy_sh, regs,
4723                                        wlc_hw->band->bandtype,
4724                                        wlc->wiphy);
4725                 if (wlc_hw->band->pi == NULL) {
4726                         wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4727                                   "attach failed\n", unit);
4728                         err = 17;
4729                         goto fail;
4730                 }
4731
4732                 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4733
4734                 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4735                                        &wlc_hw->band->phyrev,
4736                                        &wlc_hw->band->radioid,
4737                                        &wlc_hw->band->radiorev);
4738                 wlc_hw->band->abgphy_encore =
4739                     wlc_phy_get_encore(wlc_hw->band->pi);
4740                 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4741                 wlc_hw->band->core_flags =
4742                     wlc_phy_get_coreflags(wlc_hw->band->pi);
4743
4744                 /* verify good phy_type & supported phy revision */
4745                 if (BRCMS_ISNPHY(wlc_hw->band)) {
4746                         if (NCONF_HAS(wlc_hw->band->phyrev))
4747                                 goto good_phy;
4748                         else
4749                                 goto bad_phy;
4750                 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4751                         if (LCNCONF_HAS(wlc_hw->band->phyrev))
4752                                 goto good_phy;
4753                         else
4754                                 goto bad_phy;
4755                 } else {
4756  bad_phy:
4757                         wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4758                                   "phy type/rev (%d/%d)\n", unit,
4759                                   wlc_hw->band->phytype, wlc_hw->band->phyrev);
4760                         err = 18;
4761                         goto fail;
4762                 }
4763
4764  good_phy:
4765                 /*
4766                  * BMAC_NOTE: wlc->band->pi should not be set below and should
4767                  * be done in the high level attach. However we can not make
4768                  * that change until all low level access is changed to
4769                  * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4770                  * keeping wlc_hw->band->pi as well for incremental update of
4771                  * low level fns, and cut over low only init when all fns
4772                  * updated.
4773                  */
4774                 wlc->band->pi = wlc_hw->band->pi;
4775                 wlc->band->phytype = wlc_hw->band->phytype;
4776                 wlc->band->phyrev = wlc_hw->band->phyrev;
4777                 wlc->band->radioid = wlc_hw->band->radioid;
4778                 wlc->band->radiorev = wlc_hw->band->radiorev;
4779
4780                 /* default contention windows size limits */
4781                 wlc_hw->band->CWmin = APHY_CWMIN;
4782                 wlc_hw->band->CWmax = PHY_CWMAX;
4783
4784                 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4785                         err = 19;
4786                         goto fail;
4787                 }
4788         }
4789
4790         /* disable core to match driver "down" state */
4791         brcms_c_coredisable(wlc_hw);
4792
4793         /* Match driver "down" state */
4794         ai_pci_down(wlc_hw->sih);
4795
4796         /* register sb interrupt callback functions */
4797         ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff,
4798                                   (void *)brcms_c_wlintrsrestore, NULL, wlc);
4799
4800         /* turn off pll and xtal to match driver "down" state */
4801         brcms_b_xtal(wlc_hw, OFF);
4802
4803         /* *******************************************************************
4804          * The hardware is in the DOWN state at this point. D11 core
4805          * or cores are in reset with clocks off, and the board PLLs
4806          * are off if possible.
4807          *
4808          * Beyond this point, wlc->sbclk == false and chip registers
4809          * should not be touched.
4810          *********************************************************************
4811          */
4812
4813         /* init etheraddr state variables */
4814         macaddr = brcms_c_get_macaddr(wlc_hw);
4815         if (macaddr == NULL) {
4816                 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4817                           unit);
4818                 err = 21;
4819                 goto fail;
4820         }
4821         if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4822             is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4823             is_zero_ether_addr(wlc_hw->etheraddr)) {
4824                 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4825                           unit, macaddr);
4826                 err = 22;
4827                 goto fail;
4828         }
4829
4830         BCMMSG(wlc->wiphy,
4831                  "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4832                  wlc_hw->deviceid, wlc_hw->_nbands,
4833                  wlc_hw->sih->boardtype, macaddr);
4834
4835         return err;
4836
4837  fail:
4838         wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4839                   err);
4840         return err;
4841 }
4842
4843 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4844 {
4845         uint unit;
4846         unit = wlc->pub->unit;
4847
4848         if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4849                 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4850                 wlc->band->antgain = 8;
4851         } else if (wlc->band->antgain == -1) {
4852                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4853                           " srom, using 2dB\n", unit, __func__);
4854                 wlc->band->antgain = 8;
4855         } else {
4856                 s8 gain, fract;
4857                 /* Older sroms specified gain in whole dbm only.  In order
4858                  * be able to specify qdbm granularity and remain backward
4859                  * compatible the whole dbms are now encoded in only
4860                  * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4861                  * 6 bit signed number ranges from -32 - 31.
4862                  *
4863                  * Examples:
4864                  * 0x1 = 1 db,
4865                  * 0xc1 = 1.75 db (1 + 3 quarters),
4866                  * 0x3f = -1 (-1 + 0 quarters),
4867                  * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4868                  * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4869                  */
4870                 gain = wlc->band->antgain & 0x3f;
4871                 gain <<= 2;     /* Sign extend */
4872                 gain >>= 2;
4873                 fract = (wlc->band->antgain & 0xc0) >> 6;
4874                 wlc->band->antgain = 4 * gain + fract;
4875         }
4876 }
4877
4878 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4879 {
4880         int aa;
4881         uint unit;
4882         int bandtype;
4883         struct si_pub *sih = wlc->hw->sih;
4884
4885         unit = wlc->pub->unit;
4886         bandtype = wlc->band->bandtype;
4887
4888         /* get antennas available */
4889         if (bandtype == BRCM_BAND_5G)
4890                 aa = (s8) getintvar(sih, BRCMS_SROM_AA5G);
4891         else
4892                 aa = (s8) getintvar(sih, BRCMS_SROM_AA2G);
4893
4894         if ((aa < 1) || (aa > 15)) {
4895                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4896                           " srom (0x%x), using 3\n", unit, __func__, aa);
4897                 aa = 3;
4898         }
4899
4900         /* reset the defaults if we have a single antenna */
4901         if (aa == 1) {
4902                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4903                 wlc->stf->txant = ANT_TX_FORCE_0;
4904         } else if (aa == 2) {
4905                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4906                 wlc->stf->txant = ANT_TX_FORCE_1;
4907         } else {
4908         }
4909
4910         /* Compute Antenna Gain */
4911         if (bandtype == BRCM_BAND_5G)
4912                 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG1);
4913         else
4914                 wlc->band->antgain = (s8) getintvar(sih, BRCMS_SROM_AG0);
4915
4916         brcms_c_attach_antgain_init(wlc);
4917
4918         return true;
4919 }
4920
4921 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4922 {
4923         u16 chanspec;
4924         struct brcms_band *band;
4925         struct brcms_bss_info *bi = wlc->default_bss;
4926
4927         /* init default and target BSS with some sane initial values */
4928         memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4929         bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4930
4931         /* fill the default channel as the first valid channel
4932          * starting from the 2G channels
4933          */
4934         chanspec = ch20mhz_chspec(1);
4935         wlc->home_chanspec = bi->chanspec = chanspec;
4936
4937         /* find the band of our default channel */
4938         band = wlc->band;
4939         if (wlc->pub->_nbands > 1 &&
4940             band->bandunit != chspec_bandunit(chanspec))
4941                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4942
4943         /* init bss rates to the band specific default rate set */
4944         brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4945                 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4946                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4947                 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4948
4949         if (wlc->pub->_n_enab & SUPPORT_11N)
4950                 bi->flags |= BRCMS_BSS_HT;
4951 }
4952
4953 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
4954 {
4955         struct brcms_txq_info *qi, *p;
4956
4957         qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
4958         if (qi != NULL) {
4959                 /*
4960                  * Have enough room for control packets along with HI watermark
4961                  * Also, add room to txq for total psq packets if all the SCBs
4962                  * leave PS mode. The watermark for flowcontrol to OS packets
4963                  * will remain the same
4964                  */
4965                 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
4966                           2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
4967
4968                 /* add this queue to the the global list */
4969                 p = wlc->tx_queues;
4970                 if (p == NULL) {
4971                         wlc->tx_queues = qi;
4972                 } else {
4973                         while (p->next != NULL)
4974                                 p = p->next;
4975                         p->next = qi;
4976                 }
4977         }
4978         return qi;
4979 }
4980
4981 static void brcms_c_txq_free(struct brcms_c_info *wlc,
4982                              struct brcms_txq_info *qi)
4983 {
4984         struct brcms_txq_info *p;
4985
4986         if (qi == NULL)
4987                 return;
4988
4989         /* remove the queue from the linked list */
4990         p = wlc->tx_queues;
4991         if (p == qi)
4992                 wlc->tx_queues = p->next;
4993         else {
4994                 while (p != NULL && p->next != qi)
4995                         p = p->next;
4996                 if (p != NULL)
4997                         p->next = p->next->next;
4998         }
4999
5000         kfree(qi);
5001 }
5002
5003 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
5004 {
5005         uint i;
5006         struct brcms_band *band;
5007
5008         for (i = 0; i < wlc->pub->_nbands; i++) {
5009                 band = wlc->bandstate[i];
5010                 if (band->bandtype == BRCM_BAND_5G) {
5011                         if ((bwcap == BRCMS_N_BW_40ALL)
5012                             || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
5013                                 band->mimo_cap_40 = true;
5014                         else
5015                                 band->mimo_cap_40 = false;
5016                 } else {
5017                         if (bwcap == BRCMS_N_BW_40ALL)
5018                                 band->mimo_cap_40 = true;
5019                         else
5020                                 band->mimo_cap_40 = false;
5021                 }
5022         }
5023 }
5024
5025 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
5026 {
5027         /* free timer state */
5028         if (wlc->wdtimer) {
5029                 brcms_free_timer(wlc->wdtimer);
5030                 wlc->wdtimer = NULL;
5031         }
5032         if (wlc->radio_timer) {
5033                 brcms_free_timer(wlc->radio_timer);
5034                 wlc->radio_timer = NULL;
5035         }
5036 }
5037
5038 static void brcms_c_detach_module(struct brcms_c_info *wlc)
5039 {
5040         if (wlc->asi) {
5041                 brcms_c_antsel_detach(wlc->asi);
5042                 wlc->asi = NULL;
5043         }
5044
5045         if (wlc->ampdu) {
5046                 brcms_c_ampdu_detach(wlc->ampdu);
5047                 wlc->ampdu = NULL;
5048         }
5049
5050         brcms_c_stf_detach(wlc);
5051 }
5052
5053 /*
5054  * low level detach
5055  */
5056 static int brcms_b_detach(struct brcms_c_info *wlc)
5057 {
5058         uint i;
5059         struct brcms_hw_band *band;
5060         struct brcms_hardware *wlc_hw = wlc->hw;
5061         int callbacks;
5062
5063         callbacks = 0;
5064
5065         if (wlc_hw->sih) {
5066                 /*
5067                  * detach interrupt sync mechanism since interrupt is disabled
5068                  * and per-port interrupt object may has been freed. this must
5069                  * be done before sb core switch
5070                  */
5071                 ai_deregister_intr_callback(wlc_hw->sih);
5072                 ai_pci_sleep(wlc_hw->sih);
5073         }
5074
5075         brcms_b_detach_dmapio(wlc_hw);
5076
5077         band = wlc_hw->band;
5078         for (i = 0; i < wlc_hw->_nbands; i++) {
5079                 if (band->pi) {
5080                         /* Detach this band's phy */
5081                         wlc_phy_detach(band->pi);
5082                         band->pi = NULL;
5083                 }
5084                 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
5085         }
5086
5087         /* Free shared phy state */
5088         kfree(wlc_hw->phy_sh);
5089
5090         wlc_phy_shim_detach(wlc_hw->physhim);
5091
5092         if (wlc_hw->sih) {
5093                 ai_detach(wlc_hw->sih);
5094                 wlc_hw->sih = NULL;
5095         }
5096
5097         return callbacks;
5098
5099 }
5100
5101 /*
5102  * Return a count of the number of driver callbacks still pending.
5103  *
5104  * General policy is that brcms_c_detach can only dealloc/free software states.
5105  * It can NOT touch hardware registers since the d11core may be in reset and
5106  * clock may not be available.
5107  * One exception is sb register access, which is possible if crystal is turned
5108  * on after "down" state, driver should avoid software timer with the exception
5109  * of radio_monitor.
5110  */
5111 uint brcms_c_detach(struct brcms_c_info *wlc)
5112 {
5113         uint callbacks = 0;
5114
5115         if (wlc == NULL)
5116                 return 0;
5117
5118         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5119
5120         callbacks += brcms_b_detach(wlc);
5121
5122         /* delete software timers */
5123         if (!brcms_c_radio_monitor_stop(wlc))
5124                 callbacks++;
5125
5126         brcms_c_channel_mgr_detach(wlc->cmi);
5127
5128         brcms_c_timers_deinit(wlc);
5129
5130         brcms_c_detach_module(wlc);
5131
5132
5133         while (wlc->tx_queues != NULL)
5134                 brcms_c_txq_free(wlc, wlc->tx_queues);
5135
5136         brcms_c_detach_mfree(wlc);
5137         return callbacks;
5138 }
5139
5140 /* update state that depends on the current value of "ap" */
5141 static void brcms_c_ap_upd(struct brcms_c_info *wlc)
5142 {
5143         /* STA-BSS; short capable */
5144         wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5145 }
5146
5147 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5148 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5149 {
5150         if (wlc_hw->wlc->pub->hw_up)
5151                 return;
5152
5153         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5154
5155         /*
5156          * Enable pll and xtal, initialize the power control registers,
5157          * and force fastclock for the remainder of brcms_c_up().
5158          */
5159         brcms_b_xtal(wlc_hw, ON);
5160         ai_clkctl_init(wlc_hw->sih);
5161         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5162
5163         ai_pci_fixcfg(wlc_hw->sih);
5164
5165         /*
5166          * AI chip doesn't restore bar0win2 on
5167          * hibernation/resume, need sw fixup
5168          */
5169         if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
5170             (wlc_hw->sih->chip == BCM43225_CHIP_ID))
5171                 wlc_hw->regs = (struct d11regs __iomem *)
5172                                 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
5173
5174         /*
5175          * Inform phy that a POR reset has occurred so
5176          * it does a complete phy init
5177          */
5178         wlc_phy_por_inform(wlc_hw->band->pi);
5179
5180         wlc_hw->ucode_loaded = false;
5181         wlc_hw->wlc->pub->hw_up = true;
5182
5183         if ((wlc_hw->boardflags & BFL_FEM)
5184             && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
5185                 if (!
5186                     (wlc_hw->boardrev >= 0x1250
5187                      && (wlc_hw->boardflags & BFL_FEM_BT)))
5188                         ai_epa_4313war(wlc_hw->sih);
5189         }
5190 }
5191
5192 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5193 {
5194         uint coremask;
5195
5196         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5197
5198         /*
5199          * Enable pll and xtal, initialize the power control registers,
5200          * and force fastclock for the remainder of brcms_c_up().
5201          */
5202         brcms_b_xtal(wlc_hw, ON);
5203         ai_clkctl_init(wlc_hw->sih);
5204         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5205
5206         /*
5207          * Configure pci/pcmcia here instead of in brcms_c_attach()
5208          * to allow mfg hotswap:  down, hotswap (chip power cycle), up.
5209          */
5210         coremask = (1 << wlc_hw->wlc->core->coreidx);
5211
5212         ai_pci_setup(wlc_hw->sih, coremask);
5213
5214         /*
5215          * Need to read the hwradio status here to cover the case where the
5216          * system is loaded with the hw radio disabled. We do not want to
5217          * bring the driver up in this case.
5218          */
5219         if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5220                 /* put SB PCI in down state again */
5221                 ai_pci_down(wlc_hw->sih);
5222                 brcms_b_xtal(wlc_hw, OFF);
5223                 return -ENOMEDIUM;
5224         }
5225
5226         ai_pci_up(wlc_hw->sih);
5227
5228         /* reset the d11 core */
5229         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5230
5231         return 0;
5232 }
5233
5234 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5235 {
5236         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5237
5238         wlc_hw->up = true;
5239         wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5240
5241         /* FULLY enable dynamic power control and d11 core interrupt */
5242         brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5243         brcms_intrson(wlc_hw->wlc->wl);
5244         return 0;
5245 }
5246
5247 /*
5248  * Write WME tunable parameters for retransmit/max rate
5249  * from wlc struct to ucode
5250  */
5251 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5252 {
5253         int ac;
5254
5255         /* Need clock to do this */
5256         if (!wlc->clk)
5257                 return;
5258
5259         for (ac = 0; ac < AC_COUNT; ac++)
5260                 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5261                                   wlc->wme_retries[ac]);
5262 }
5263
5264 /* make interface operational */
5265 int brcms_c_up(struct brcms_c_info *wlc)
5266 {
5267         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5268
5269         /* HW is turned off so don't try to access it */
5270         if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5271                 return -ENOMEDIUM;
5272
5273         if (!wlc->pub->hw_up) {
5274                 brcms_b_hw_up(wlc->hw);
5275                 wlc->pub->hw_up = true;
5276         }
5277
5278         if ((wlc->pub->boardflags & BFL_FEM)
5279             && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) {
5280                 if (wlc->pub->boardrev >= 0x1250
5281                     && (wlc->pub->boardflags & BFL_FEM_BT))
5282                         brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5283                                 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5284                 else
5285                         brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5286                                     MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5287         }
5288
5289         /*
5290          * Need to read the hwradio status here to cover the case where the
5291          * system is loaded with the hw radio disabled. We do not want to bring
5292          * the driver up in this case. If radio is disabled, abort up, lower
5293          * power, start radio timer and return 0(for NDIS) don't call
5294          * radio_update to avoid looping brcms_c_up.
5295          *
5296          * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5297          */
5298         if (!wlc->pub->radio_disabled) {
5299                 int status = brcms_b_up_prep(wlc->hw);
5300                 if (status == -ENOMEDIUM) {
5301                         if (!mboolisset
5302                             (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5303                                 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5304                                 mboolset(wlc->pub->radio_disabled,
5305                                          WL_RADIO_HW_DISABLE);
5306
5307                                 if (bsscfg->enable && bsscfg->BSS)
5308                                         wiphy_err(wlc->wiphy, "wl%d: up"
5309                                                   ": rfdisable -> "
5310                                                   "bsscfg_disable()\n",
5311                                                    wlc->pub->unit);
5312                         }
5313                 }
5314         }
5315
5316         if (wlc->pub->radio_disabled) {
5317                 brcms_c_radio_monitor_start(wlc);
5318                 return 0;
5319         }
5320
5321         /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5322         wlc->clk = true;
5323
5324         brcms_c_radio_monitor_stop(wlc);
5325
5326         /* Set EDCF hostflags */
5327         brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5328
5329         brcms_init(wlc->wl);
5330         wlc->pub->up = true;
5331
5332         if (wlc->bandinit_pending) {
5333                 brcms_c_suspend_mac_and_wait(wlc);
5334                 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5335                 wlc->bandinit_pending = false;
5336                 brcms_c_enable_mac(wlc);
5337         }
5338
5339         brcms_b_up_finish(wlc->hw);
5340
5341         /* Program the TX wme params with the current settings */
5342         brcms_c_wme_retries_write(wlc);
5343
5344         /* start one second watchdog timer */
5345         brcms_add_timer(wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5346         wlc->WDarmed = true;
5347
5348         /* ensure antenna config is up to date */
5349         brcms_c_stf_phy_txant_upd(wlc);
5350         /* ensure LDPC config is in sync */
5351         brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5352
5353         return 0;
5354 }
5355
5356 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5357 {
5358         uint callbacks = 0;
5359
5360         return callbacks;
5361 }
5362
5363 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5364 {
5365         bool dev_gone;
5366         uint callbacks = 0;
5367
5368         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5369
5370         if (!wlc_hw->up)
5371                 return callbacks;
5372
5373         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5374
5375         /* disable interrupts */
5376         if (dev_gone)
5377                 wlc_hw->wlc->macintmask = 0;
5378         else {
5379                 /* now disable interrupts */
5380                 brcms_intrsoff(wlc_hw->wlc->wl);
5381
5382                 /* ensure we're running on the pll clock again */
5383                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5384         }
5385         /* down phy at the last of this stage */
5386         callbacks += wlc_phy_down(wlc_hw->band->pi);
5387
5388         return callbacks;
5389 }
5390
5391 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5392 {
5393         uint callbacks = 0;
5394         bool dev_gone;
5395
5396         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5397
5398         if (!wlc_hw->up)
5399                 return callbacks;
5400
5401         wlc_hw->up = false;
5402         wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5403
5404         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5405
5406         if (dev_gone) {
5407                 wlc_hw->sbclk = false;
5408                 wlc_hw->clk = false;
5409                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5410
5411                 /* reclaim any posted packets */
5412                 brcms_c_flushqueues(wlc_hw->wlc);
5413         } else {
5414
5415                 /* Reset and disable the core */
5416                 if (ai_iscoreup(wlc_hw->sih)) {
5417                         if (R_REG(&wlc_hw->regs->maccontrol) &
5418                             MCTL_EN_MAC)
5419                                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5420                         callbacks += brcms_reset(wlc_hw->wlc->wl);
5421                         brcms_c_coredisable(wlc_hw);
5422                 }
5423
5424                 /* turn off primary xtal and pll */
5425                 if (!wlc_hw->noreset) {
5426                         ai_pci_down(wlc_hw->sih);
5427                         brcms_b_xtal(wlc_hw, OFF);
5428                 }
5429         }
5430
5431         return callbacks;
5432 }
5433
5434 /*
5435  * Mark the interface nonoperational, stop the software mechanisms,
5436  * disable the hardware, free any transient buffer state.
5437  * Return a count of the number of driver callbacks still pending.
5438  */
5439 uint brcms_c_down(struct brcms_c_info *wlc)
5440 {
5441
5442         uint callbacks = 0;
5443         int i;
5444         bool dev_gone = false;
5445         struct brcms_txq_info *qi;
5446
5447         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5448
5449         /* check if we are already in the going down path */
5450         if (wlc->going_down) {
5451                 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5452                           "\n", wlc->pub->unit, __func__);
5453                 return 0;
5454         }
5455         if (!wlc->pub->up)
5456                 return callbacks;
5457
5458         /* in between, mpc could try to bring down again.. */
5459         wlc->going_down = true;
5460
5461         callbacks += brcms_b_bmac_down_prep(wlc->hw);
5462
5463         dev_gone = brcms_deviceremoved(wlc);
5464
5465         /* Call any registered down handlers */
5466         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5467                 if (wlc->modulecb[i].down_fn)
5468                         callbacks +=
5469                             wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5470         }
5471
5472         /* cancel the watchdog timer */
5473         if (wlc->WDarmed) {
5474                 if (!brcms_del_timer(wlc->wdtimer))
5475                         callbacks++;
5476                 wlc->WDarmed = false;
5477         }
5478         /* cancel all other timers */
5479         callbacks += brcms_c_down_del_timer(wlc);
5480
5481         wlc->pub->up = false;
5482
5483         wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5484
5485         /* clear txq flow control */
5486         brcms_c_txflowcontrol_reset(wlc);
5487
5488         /* flush tx queues */
5489         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5490                 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5491
5492         callbacks += brcms_b_down_finish(wlc->hw);
5493
5494         /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5495         wlc->clk = false;
5496
5497         wlc->going_down = false;
5498         return callbacks;
5499 }
5500
5501 /* Set the current gmode configuration */
5502 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5503 {
5504         int ret = 0;
5505         uint i;
5506         struct brcms_c_rateset rs;
5507         /* Default to 54g Auto */
5508         /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5509         s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5510         bool shortslot_restrict = false; /* Restrict association to stations
5511                                           * that support shortslot
5512                                           */
5513         bool ofdm_basic = false;        /* Make 6, 12, and 24 basic rates */
5514         /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5515         int preamble = BRCMS_PLCP_LONG;
5516         bool preamble_restrict = false; /* Restrict association to stations
5517                                          * that support short preambles
5518                                          */
5519         struct brcms_band *band;
5520
5521         /* if N-support is enabled, allow Gmode set as long as requested
5522          * Gmode is not GMODE_LEGACY_B
5523          */
5524         if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5525                 return -ENOTSUPP;
5526
5527         /* verify that we are dealing with 2G band and grab the band pointer */
5528         if (wlc->band->bandtype == BRCM_BAND_2G)
5529                 band = wlc->band;
5530         else if ((wlc->pub->_nbands > 1) &&
5531                  (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5532                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5533         else
5534                 return -EINVAL;
5535
5536         /* Legacy or bust when no OFDM is supported by regulatory */
5537         if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5538              BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5539                 return -EINVAL;
5540
5541         /* update configuration value */
5542         if (config == true)
5543                 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5544
5545         /* Clear rateset override */
5546         memset(&rs, 0, sizeof(struct brcms_c_rateset));
5547
5548         switch (gmode) {
5549         case GMODE_LEGACY_B:
5550                 shortslot = BRCMS_SHORTSLOT_OFF;
5551                 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5552
5553                 break;
5554
5555         case GMODE_LRS:
5556                 break;
5557
5558         case GMODE_AUTO:
5559                 /* Accept defaults */
5560                 break;
5561
5562         case GMODE_ONLY:
5563                 ofdm_basic = true;
5564                 preamble = BRCMS_PLCP_SHORT;
5565                 preamble_restrict = true;
5566                 break;
5567
5568         case GMODE_PERFORMANCE:
5569                 shortslot = BRCMS_SHORTSLOT_ON;
5570                 shortslot_restrict = true;
5571                 ofdm_basic = true;
5572                 preamble = BRCMS_PLCP_SHORT;
5573                 preamble_restrict = true;
5574                 break;
5575
5576         default:
5577                 /* Error */
5578                 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5579                           wlc->pub->unit, __func__, gmode);
5580                 return -ENOTSUPP;
5581         }
5582
5583         band->gmode = gmode;
5584
5585         wlc->shortslot_override = shortslot;
5586
5587         /* Use the default 11g rateset */
5588         if (!rs.count)
5589                 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5590
5591         if (ofdm_basic) {
5592                 for (i = 0; i < rs.count; i++) {
5593                         if (rs.rates[i] == BRCM_RATE_6M
5594                             || rs.rates[i] == BRCM_RATE_12M
5595                             || rs.rates[i] == BRCM_RATE_24M)
5596                                 rs.rates[i] |= BRCMS_RATE_FLAG;
5597                 }
5598         }
5599
5600         /* Set default bss rateset */
5601         wlc->default_bss->rateset.count = rs.count;
5602         memcpy(wlc->default_bss->rateset.rates, rs.rates,
5603                sizeof(wlc->default_bss->rateset.rates));
5604
5605         return ret;
5606 }
5607
5608 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5609 {
5610         uint i;
5611         s32 nmode = AUTO;
5612
5613         if (wlc->stf->txstreams == WL_11N_3x3)
5614                 nmode = WL_11N_3x3;
5615         else
5616                 nmode = WL_11N_2x2;
5617
5618         /* force GMODE_AUTO if NMODE is ON */
5619         brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5620         if (nmode == WL_11N_3x3)
5621                 wlc->pub->_n_enab = SUPPORT_HT;
5622         else
5623                 wlc->pub->_n_enab = SUPPORT_11N;
5624         wlc->default_bss->flags |= BRCMS_BSS_HT;
5625         /* add the mcs rates to the default and hw ratesets */
5626         brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5627                               wlc->stf->txstreams);
5628         for (i = 0; i < wlc->pub->_nbands; i++)
5629                 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5630                        wlc->default_bss->rateset.mcs, MCSSET_LEN);
5631
5632         return 0;
5633 }
5634
5635 static int
5636 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5637                              struct brcms_c_rateset *rs_arg)
5638 {
5639         struct brcms_c_rateset rs, new;
5640         uint bandunit;
5641
5642         memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5643
5644         /* check for bad count value */
5645         if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5646                 return -EINVAL;
5647
5648         /* try the current band */
5649         bandunit = wlc->band->bandunit;
5650         memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5651         if (brcms_c_rate_hwrs_filter_sort_validate
5652             (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5653              wlc->stf->txstreams))
5654                 goto good;
5655
5656         /* try the other band */
5657         if (brcms_is_mband_unlocked(wlc)) {
5658                 bandunit = OTHERBANDUNIT(wlc);
5659                 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5660                 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5661                                                        &wlc->
5662                                                        bandstate[bandunit]->
5663                                                        hw_rateset, true,
5664                                                        wlc->stf->txstreams))
5665                         goto good;
5666         }
5667
5668         return -EBADE;
5669
5670  good:
5671         /* apply new rateset */
5672         memcpy(&wlc->default_bss->rateset, &new,
5673                sizeof(struct brcms_c_rateset));
5674         memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5675                sizeof(struct brcms_c_rateset));
5676         return 0;
5677 }
5678
5679 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5680 {
5681         u8 r;
5682         bool war = false;
5683
5684         if (wlc->bsscfg->associated)
5685                 r = wlc->bsscfg->current_bss->rateset.rates[0];
5686         else
5687                 r = wlc->default_bss->rateset.rates[0];
5688
5689         wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5690 }
5691
5692 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
5693 {
5694         u16 chspec = ch20mhz_chspec(channel);
5695
5696         if (channel < 0 || channel > MAXCHANNEL)
5697                 return -EINVAL;
5698
5699         if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
5700                 return -EINVAL;
5701
5702
5703         if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
5704                 if (wlc->band->bandunit != chspec_bandunit(chspec))
5705                         wlc->bandinit_pending = true;
5706                 else
5707                         wlc->bandinit_pending = false;
5708         }
5709
5710         wlc->default_bss->chanspec = chspec;
5711         /* brcms_c_BSSinit() will sanitize the rateset before
5712          * using it.. */
5713         if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
5714                 brcms_c_set_home_chanspec(wlc, chspec);
5715                 brcms_c_suspend_mac_and_wait(wlc);
5716                 brcms_c_set_chanspec(wlc, chspec);
5717                 brcms_c_enable_mac(wlc);
5718         }
5719         return 0;
5720 }
5721
5722 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
5723 {
5724         int ac;
5725
5726         if (srl < 1 || srl > RETRY_SHORT_MAX ||
5727             lrl < 1 || lrl > RETRY_SHORT_MAX)
5728                 return -EINVAL;
5729
5730         wlc->SRL = srl;
5731         wlc->LRL = lrl;
5732
5733         brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
5734
5735         for (ac = 0; ac < AC_COUNT; ac++) {
5736                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5737                                                EDCF_SHORT,  wlc->SRL);
5738                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
5739                                                EDCF_LONG, wlc->LRL);
5740         }
5741         brcms_c_wme_retries_write(wlc);
5742
5743         return 0;
5744 }
5745
5746 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
5747                                  struct brcm_rateset *currs)
5748 {
5749         struct brcms_c_rateset *rs;
5750
5751         if (wlc->pub->associated)
5752                 rs = &wlc->bsscfg->current_bss->rateset;
5753         else
5754                 rs = &wlc->default_bss->rateset;
5755
5756         /* Copy only legacy rateset section */
5757         currs->count = rs->count;
5758         memcpy(&currs->rates, &rs->rates, rs->count);
5759 }
5760
5761 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
5762 {
5763         struct brcms_c_rateset internal_rs;
5764         int bcmerror;
5765
5766         if (rs->count > BRCMS_NUMRATES)
5767                 return -ENOBUFS;
5768
5769         memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
5770
5771         /* Copy only legacy rateset section */
5772         internal_rs.count = rs->count;
5773         memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
5774
5775         /* merge rateset coming in with the current mcsset */
5776         if (wlc->pub->_n_enab & SUPPORT_11N) {
5777                 struct brcms_bss_info *mcsset_bss;
5778                 if (wlc->bsscfg->associated)
5779                         mcsset_bss = wlc->bsscfg->current_bss;
5780                 else
5781                         mcsset_bss = wlc->default_bss;
5782                 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
5783                        MCSSET_LEN);
5784         }
5785
5786         bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
5787         if (!bcmerror)
5788                 brcms_c_ofdm_rateset_war(wlc);
5789
5790         return bcmerror;
5791 }
5792
5793 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
5794 {
5795         if (period < DOT11_MIN_BEACON_PERIOD ||
5796             period > DOT11_MAX_BEACON_PERIOD)
5797                 return -EINVAL;
5798
5799         wlc->default_bss->beacon_period = period;
5800         return 0;
5801 }
5802
5803 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
5804 {
5805         return wlc->band->phytype;
5806 }
5807
5808 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
5809 {
5810         wlc->shortslot_override = sslot_override;
5811
5812         /*
5813          * shortslot is an 11g feature, so no more work if we are
5814          * currently on the 5G band
5815          */
5816         if (wlc->band->bandtype == BRCM_BAND_5G)
5817                 return;
5818
5819         if (wlc->pub->up && wlc->pub->associated) {
5820                 /* let watchdog or beacon processing update shortslot */
5821         } else if (wlc->pub->up) {
5822                 /* unassociated shortslot is off */
5823                 brcms_c_switch_shortslot(wlc, false);
5824         } else {
5825                 /* driver is down, so just update the brcms_c_info
5826                  * value */
5827                 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
5828                         wlc->shortslot = false;
5829                 else
5830                         wlc->shortslot =
5831                             (wlc->shortslot_override ==
5832                              BRCMS_SHORTSLOT_ON);
5833         }
5834 }
5835
5836 /*
5837  * register watchdog and down handlers.
5838  */
5839 int brcms_c_module_register(struct brcms_pub *pub,
5840                             const char *name, struct brcms_info *hdl,
5841                             int (*d_fn)(void *handle))
5842 {
5843         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5844         int i;
5845
5846         /* find an empty entry and just add, no duplication check! */
5847         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5848                 if (wlc->modulecb[i].name[0] == '\0') {
5849                         strncpy(wlc->modulecb[i].name, name,
5850                                 sizeof(wlc->modulecb[i].name) - 1);
5851                         wlc->modulecb[i].hdl = hdl;
5852                         wlc->modulecb[i].down_fn = d_fn;
5853                         return 0;
5854                 }
5855         }
5856
5857         return -ENOSR;
5858 }
5859
5860 /* unregister module callbacks */
5861 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
5862                               struct brcms_info *hdl)
5863 {
5864         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
5865         int i;
5866
5867         if (wlc == NULL)
5868                 return -ENODATA;
5869
5870         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5871                 if (!strcmp(wlc->modulecb[i].name, name) &&
5872                     (wlc->modulecb[i].hdl == hdl)) {
5873                         memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
5874                         return 0;
5875                 }
5876         }
5877
5878         /* table not found! */
5879         return -ENODATA;
5880 }
5881
5882 #ifdef BCMDBG
5883 static const char * const supr_reason[] = {
5884         "None", "PMQ Entry", "Flush request",
5885         "Previous frag failure", "Channel mismatch",
5886         "Lifetime Expiry", "Underflow"
5887 };
5888
5889 static void brcms_c_print_txs_status(u16 s)
5890 {
5891         printk(KERN_DEBUG "[15:12]  %d  frame attempts\n",
5892                (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT);
5893         printk(KERN_DEBUG " [11:8]  %d  rts attempts\n",
5894                (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT);
5895         printk(KERN_DEBUG "    [7]  %d  PM mode indicated\n",
5896                ((s & TX_STATUS_PMINDCTD) ? 1 : 0));
5897         printk(KERN_DEBUG "    [6]  %d  intermediate status\n",
5898                ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0));
5899         printk(KERN_DEBUG "    [5]  %d  AMPDU\n",
5900                (s & TX_STATUS_AMPDU) ? 1 : 0);
5901         printk(KERN_DEBUG "  [4:2]  %d  Frame Suppressed Reason (%s)\n",
5902                ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT),
5903                supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]);
5904         printk(KERN_DEBUG "    [1]  %d  acked\n",
5905                ((s & TX_STATUS_ACK_RCV) ? 1 : 0));
5906 }
5907 #endif                          /* BCMDBG */
5908
5909 void brcms_c_print_txstatus(struct tx_status *txs)
5910 {
5911 #if defined(BCMDBG)
5912         u16 s = txs->status;
5913         u16 ackphyrxsh = txs->ackphyrxsh;
5914
5915         printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n");
5916
5917         printk(KERN_DEBUG "FrameID: %04x   ", txs->frameid);
5918         printk(KERN_DEBUG "TxStatus: %04x", s);
5919         printk(KERN_DEBUG "\n");
5920
5921         brcms_c_print_txs_status(s);
5922
5923         printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime);
5924         printk(KERN_DEBUG "Seq: %04x ", txs->sequence);
5925         printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr);
5926         printk(KERN_DEBUG "RxAckRSSI: %04x ",
5927                (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT);
5928         printk(KERN_DEBUG "RxAckSQ: %04x",
5929                (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
5930         printk(KERN_DEBUG "\n");
5931 #endif                          /* defined(BCMDBG) */
5932 }
5933
5934 bool brcms_c_chipmatch(u16 vendor, u16 device)
5935 {
5936         if (vendor != PCI_VENDOR_ID_BROADCOM) {
5937                 pr_err("chipmatch: unknown vendor id %04x\n", vendor);
5938                 return false;
5939         }
5940
5941         if (device == BCM43224_D11N_ID_VEN1)
5942                 return true;
5943         if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
5944                 return true;
5945         if (device == BCM4313_D11N2G_ID)
5946                 return true;
5947         if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
5948                 return true;
5949
5950         pr_err("chipmatch: unknown device id %04x\n", device);
5951         return false;
5952 }
5953
5954 #if defined(BCMDBG)
5955 void brcms_c_print_txdesc(struct d11txh *txh)
5956 {
5957         u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
5958         u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
5959         u16 mfc = le16_to_cpu(txh->MacFrameControl);
5960         u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
5961         u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
5962         u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
5963         u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
5964         u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
5965         u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
5966         u16 mainrates = le16_to_cpu(txh->MainRates);
5967         u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
5968         u8 *iv = txh->IV;
5969         u8 *ra = txh->TxFrameRA;
5970         u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
5971         u8 *rtspfb = txh->RTSPLCPFallback;
5972         u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
5973         u8 *fragpfb = txh->FragPLCPFallback;
5974         u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
5975         u16 mmodelen = le16_to_cpu(txh->MModeLen);
5976         u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
5977         u16 tfid = le16_to_cpu(txh->TxFrameID);
5978         u16 txs = le16_to_cpu(txh->TxStatus);
5979         u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
5980         u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
5981         u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
5982         u16 mmbyte = le16_to_cpu(txh->MinMBytes);
5983
5984         u8 *rtsph = txh->RTSPhyHeader;
5985         struct ieee80211_rts rts = txh->rts_frame;
5986
5987         /* add plcp header along with txh descriptor */
5988         printk(KERN_DEBUG "Raw TxDesc + plcp header:\n");
5989         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
5990                              txh, sizeof(struct d11txh) + 48);
5991
5992         printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl);
5993         printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch);
5994         printk(KERN_DEBUG "FC: %04x ", mfc);
5995         printk(KERN_DEBUG "FES Time: %04x\n", tfest);
5996         printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw,
5997                (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
5998         printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1);
5999         printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
6000         printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
6001         printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
6002         printk(KERN_DEBUG "MainRates: %04x ", mainrates);
6003         printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
6004         printk(KERN_DEBUG "\n");
6005
6006         print_hex_dump_bytes("SecIV:", DUMP_PREFIX_OFFSET, iv, sizeof(txh->IV));
6007         print_hex_dump_bytes("RA:", DUMP_PREFIX_OFFSET,
6008                              ra, sizeof(txh->TxFrameRA));
6009
6010         printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
6011         print_hex_dump_bytes("Fb RTS PLCP:", DUMP_PREFIX_OFFSET,
6012                              rtspfb, sizeof(txh->RTSPLCPFallback));
6013         printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
6014         print_hex_dump_bytes("PLCP:", DUMP_PREFIX_OFFSET,
6015                              fragpfb, sizeof(txh->FragPLCPFallback));
6016         printk(KERN_DEBUG "DUR: %04x", fragdfb);
6017         printk(KERN_DEBUG "\n");
6018
6019         printk(KERN_DEBUG "MModeLen: %04x ", mmodelen);
6020         printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen);
6021
6022         printk(KERN_DEBUG "FrameID:     %04x\n", tfid);
6023         printk(KERN_DEBUG "TxStatus:    %04x\n", txs);
6024
6025         printk(KERN_DEBUG "MaxNumMpdu:  %04x\n", mnmpdu);
6026         printk(KERN_DEBUG "MaxAggbyte:  %04x\n", mabyte);
6027         printk(KERN_DEBUG "MaxAggbyte_fb:  %04x\n", mabyte_f);
6028         printk(KERN_DEBUG "MinByte:     %04x\n", mmbyte);
6029
6030         print_hex_dump_bytes("RTS PLCP:", DUMP_PREFIX_OFFSET,
6031                              rtsph, sizeof(txh->RTSPhyHeader));
6032         print_hex_dump_bytes("RTS Frame:", DUMP_PREFIX_OFFSET,
6033                              (u8 *)&rts, sizeof(txh->rts_frame));
6034         printk(KERN_DEBUG "\n");
6035 }
6036 #endif                          /* defined(BCMDBG) */
6037
6038 #if defined(BCMDBG)
6039 static int
6040 brcms_c_format_flags(const struct brcms_c_bit_desc *bd, u32 flags, char *buf,
6041                      int len)
6042 {
6043         int i;
6044         char *p = buf;
6045         char hexstr[16];
6046         int slen = 0, nlen = 0;
6047         u32 bit;
6048         const char *name;
6049
6050         if (len < 2 || !buf)
6051                 return 0;
6052
6053         buf[0] = '\0';
6054
6055         for (i = 0; flags != 0; i++) {
6056                 bit = bd[i].bit;
6057                 name = bd[i].name;
6058                 if (bit == 0 && flags != 0) {
6059                         /* print any unnamed bits */
6060                         snprintf(hexstr, 16, "0x%X", flags);
6061                         name = hexstr;
6062                         flags = 0;      /* exit loop */
6063                 } else if ((flags & bit) == 0)
6064                         continue;
6065                 flags &= ~bit;
6066                 nlen = strlen(name);
6067                 slen += nlen;
6068                 /* count btwn flag space */
6069                 if (flags != 0)
6070                         slen += 1;
6071                 /* need NULL char as well */
6072                 if (len <= slen)
6073                         break;
6074                 /* copy NULL char but don't count it */
6075                 strncpy(p, name, nlen + 1);
6076                 p += nlen;
6077                 /* copy btwn flag space and NULL char */
6078                 if (flags != 0)
6079                         p += snprintf(p, 2, " ");
6080                 len -= slen;
6081         }
6082
6083         /* indicate the str was too short */
6084         if (flags != 0) {
6085                 if (len < 2)
6086                         p -= 2 - len;   /* overwrite last char */
6087                 p += snprintf(p, 2, ">");
6088         }
6089
6090         return (int)(p - buf);
6091 }
6092 #endif                          /* defined(BCMDBG) */
6093
6094 #if defined(BCMDBG)
6095 void brcms_c_print_rxh(struct d11rxhdr *rxh)
6096 {
6097         u16 len = rxh->RxFrameSize;
6098         u16 phystatus_0 = rxh->PhyRxStatus_0;
6099         u16 phystatus_1 = rxh->PhyRxStatus_1;
6100         u16 phystatus_2 = rxh->PhyRxStatus_2;
6101         u16 phystatus_3 = rxh->PhyRxStatus_3;
6102         u16 macstatus1 = rxh->RxStatus1;
6103         u16 macstatus2 = rxh->RxStatus2;
6104         char flagstr[64];
6105         char lenbuf[20];
6106         static const struct brcms_c_bit_desc macstat_flags[] = {
6107                 {RXS_FCSERR, "FCSErr"},
6108                 {RXS_RESPFRAMETX, "Reply"},
6109                 {RXS_PBPRES, "PADDING"},
6110                 {RXS_DECATMPT, "DeCr"},
6111                 {RXS_DECERR, "DeCrErr"},
6112                 {RXS_BCNSENT, "Bcn"},
6113                 {0, NULL}
6114         };
6115
6116         printk(KERN_DEBUG "Raw RxDesc:\n");
6117         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh,
6118                              sizeof(struct d11rxhdr));
6119
6120         brcms_c_format_flags(macstat_flags, macstatus1, flagstr, 64);
6121
6122         snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
6123
6124         printk(KERN_DEBUG "RxFrameSize:     %6s (%d)%s\n", lenbuf, len,
6125                (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
6126         printk(KERN_DEBUG "RxPHYStatus:     %04x %04x %04x %04x\n",
6127                phystatus_0, phystatus_1, phystatus_2, phystatus_3);
6128         printk(KERN_DEBUG "RxMACStatus:     %x %s\n", macstatus1, flagstr);
6129         printk(KERN_DEBUG "RXMACaggtype:    %x\n",
6130                (macstatus2 & RXS_AGGTYPE_MASK));
6131         printk(KERN_DEBUG "RxTSFTime:       %04x\n", rxh->RxTSFTime);
6132 }
6133 #endif                          /* defined(BCMDBG) */
6134
6135 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6136 {
6137         u16 table_ptr;
6138         u8 phy_rate, index;
6139
6140         /* get the phy specific rate encoding for the PLCP SIGNAL field */
6141         if (is_ofdm_rate(rate))
6142                 table_ptr = M_RT_DIRMAP_A;
6143         else
6144                 table_ptr = M_RT_DIRMAP_B;
6145
6146         /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6147          * the index into the rate table.
6148          */
6149         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6150         index = phy_rate & 0xf;
6151
6152         /* Find the SHM pointer to the rate table entry by looking in the
6153          * Direct-map Table
6154          */
6155         return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6156 }
6157
6158 static bool
6159 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6160                       struct sk_buff *pkt, int prec, bool head)
6161 {
6162         struct sk_buff *p;
6163         int eprec = -1;         /* precedence to evict from */
6164
6165         /* Determine precedence from which to evict packet, if any */
6166         if (pktq_pfull(q, prec))
6167                 eprec = prec;
6168         else if (pktq_full(q)) {
6169                 p = brcmu_pktq_peek_tail(q, &eprec);
6170                 if (eprec > prec) {
6171                         wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6172                                   "\n", __func__, eprec, prec);
6173                         return false;
6174                 }
6175         }
6176
6177         /* Evict if needed */
6178         if (eprec >= 0) {
6179                 bool discard_oldest;
6180
6181                 discard_oldest = ac_bitmap_tst(0, eprec);
6182
6183                 /* Refuse newer packet unless configured to discard oldest */
6184                 if (eprec == prec && !discard_oldest) {
6185                         wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6186                                   "\n", __func__, prec);
6187                         return false;
6188                 }
6189
6190                 /* Evict packet according to discard policy */
6191                 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6192                         brcmu_pktq_pdeq_tail(q, eprec);
6193                 brcmu_pkt_buf_free_skb(p);
6194         }
6195
6196         /* Enqueue */
6197         if (head)
6198                 p = brcmu_pktq_penq_head(q, prec, pkt);
6199         else
6200                 p = brcmu_pktq_penq(q, prec, pkt);
6201
6202         return true;
6203 }
6204
6205 /*
6206  * Attempts to queue a packet onto a multiple-precedence queue,
6207  * if necessary evicting a lower precedence packet from the queue.
6208  *
6209  * 'prec' is the precedence number that has already been mapped
6210  * from the packet priority.
6211  *
6212  * Returns true if packet consumed (queued), false if not.
6213  */
6214 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6215                       struct sk_buff *pkt, int prec)
6216 {
6217         return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6218 }
6219
6220 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6221                      struct sk_buff *sdu, uint prec)
6222 {
6223         struct brcms_txq_info *qi = wlc->pkt_queue;     /* Check me */
6224         struct pktq *q = &qi->q;
6225         int prio;
6226
6227         prio = sdu->priority;
6228
6229         if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6230                 /*
6231                  * we might hit this condtion in case
6232                  * packet flooding from mac80211 stack
6233                  */
6234                 brcmu_pkt_buf_free_skb(sdu);
6235         }
6236 }
6237
6238 /*
6239  * bcmc_fid_generate:
6240  * Generate frame ID for a BCMC packet.  The frag field is not used
6241  * for MC frames so is used as part of the sequence number.
6242  */
6243 static inline u16
6244 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6245                   struct d11txh *txh)
6246 {
6247         u16 frameid;
6248
6249         frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6250                                                   TXFID_QUEUE_MASK);
6251         frameid |=
6252             (((wlc->
6253                mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6254             TX_BCMC_FIFO;
6255
6256         return frameid;
6257 }
6258
6259 static uint
6260 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6261                       u8 preamble_type)
6262 {
6263         uint dur = 0;
6264
6265         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6266                 wlc->pub->unit, rspec, preamble_type);
6267         /*
6268          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6269          * is less than or equal to the rate of the immediately previous
6270          * frame in the FES
6271          */
6272         rspec = brcms_basic_rate(wlc, rspec);
6273         /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6274         dur =
6275             brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6276                                 (DOT11_ACK_LEN + FCS_LEN));
6277         return dur;
6278 }
6279
6280 static uint
6281 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6282                       u8 preamble_type)
6283 {
6284         BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6285                 wlc->pub->unit, rspec, preamble_type);
6286         return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6287 }
6288
6289 static uint
6290 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6291                      u8 preamble_type)
6292 {
6293         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6294                  "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6295         /*
6296          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6297          * is less than or equal to the rate of the immediately previous
6298          * frame in the FES
6299          */
6300         rspec = brcms_basic_rate(wlc, rspec);
6301         /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6302         return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6303                                    (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6304                                     FCS_LEN));
6305 }
6306
6307 /* brcms_c_compute_frame_dur()
6308  *
6309  * Calculate the 802.11 MAC header DUR field for MPDU
6310  * DUR for a single frame = 1 SIFS + 1 ACK
6311  * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6312  *
6313  * rate                 MPDU rate in unit of 500kbps
6314  * next_frag_len        next MPDU length in bytes
6315  * preamble_type        use short/GF or long/MM PLCP header
6316  */
6317 static u16
6318 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6319                       u8 preamble_type, uint next_frag_len)
6320 {
6321         u16 dur, sifs;
6322
6323         sifs = get_sifs(wlc->band);
6324
6325         dur = sifs;
6326         dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6327
6328         if (next_frag_len) {
6329                 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6330                 dur *= 2;
6331                 /* add another SIFS and the frag time */
6332                 dur += sifs;
6333                 dur +=
6334                     (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6335                                                  next_frag_len);
6336         }
6337         return dur;
6338 }
6339
6340 /* The opposite of brcms_c_calc_frame_time */
6341 static uint
6342 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6343                    u8 preamble_type, uint dur)
6344 {
6345         uint nsyms, mac_len, Ndps, kNdps;
6346         uint rate = rspec2rate(ratespec);
6347
6348         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6349                  wlc->pub->unit, ratespec, preamble_type, dur);
6350
6351         if (is_mcs_rate(ratespec)) {
6352                 uint mcs = ratespec & RSPEC_RATE_MASK;
6353                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6354                 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6355                 /* payload calculation matches that of regular ofdm */
6356                 if (wlc->band->bandtype == BRCM_BAND_2G)
6357                         dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6358                 /* kNdbps = kbps * 4 */
6359                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6360                                    rspec_issgi(ratespec)) * 4;
6361                 nsyms = dur / APHY_SYMBOL_TIME;
6362                 mac_len =
6363                     ((nsyms * kNdps) -
6364                      ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6365         } else if (is_ofdm_rate(ratespec)) {
6366                 dur -= APHY_PREAMBLE_TIME;
6367                 dur -= APHY_SIGNAL_TIME;
6368                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6369                 Ndps = rate * 2;
6370                 nsyms = dur / APHY_SYMBOL_TIME;
6371                 mac_len =
6372                     ((nsyms * Ndps) -
6373                      (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6374         } else {
6375                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6376                         dur -= BPHY_PLCP_SHORT_TIME;
6377                 else
6378                         dur -= BPHY_PLCP_TIME;
6379                 mac_len = dur * rate;
6380                 /* divide out factor of 2 in rate (1/2 mbps) */
6381                 mac_len = mac_len / 8 / 2;
6382         }
6383         return mac_len;
6384 }
6385
6386 /*
6387  * Return true if the specified rate is supported by the specified band.
6388  * BRCM_BAND_AUTO indicates the current band.
6389  */
6390 static bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
6391                     bool verbose)
6392 {
6393         struct brcms_c_rateset *hw_rateset;
6394         uint i;
6395
6396         if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
6397                 hw_rateset = &wlc->band->hw_rateset;
6398         else if (wlc->pub->_nbands > 1)
6399                 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
6400         else
6401                 /* other band specified and we are a single band device */
6402                 return false;
6403
6404         /* check if this is a mimo rate */
6405         if (is_mcs_rate(rspec)) {
6406                 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
6407                         goto error;
6408
6409                 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
6410         }
6411
6412         for (i = 0; i < hw_rateset->count; i++)
6413                 if (hw_rateset->rates[i] == rspec2rate(rspec))
6414                         return true;
6415  error:
6416         if (verbose)
6417                 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
6418                           "not in hw_rateset\n", wlc->pub->unit, rspec);
6419
6420         return false;
6421 }
6422
6423 static u32
6424 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6425                        u32 int_val)
6426 {
6427         u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6428         u8 rate = int_val & NRATE_RATE_MASK;
6429         u32 rspec;
6430         bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6431         bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6432         bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6433                                   == NRATE_OVERRIDE_MCS_ONLY);
6434         int bcmerror = 0;
6435
6436         if (!ismcs)
6437                 return (u32) rate;
6438
6439         /* validate the combination of rate/mcs/stf is allowed */
6440         if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6441                 /* mcs only allowed when nmode */
6442                 if (stf > PHY_TXC1_MODE_SDM) {
6443                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6444                                   wlc->pub->unit, __func__);
6445                         bcmerror = -EINVAL;
6446                         goto done;
6447                 }
6448
6449                 /* mcs 32 is a special case, DUP mode 40 only */
6450                 if (rate == 32) {
6451                         if (!CHSPEC_IS40(wlc->home_chanspec) ||
6452                             ((stf != PHY_TXC1_MODE_SISO)
6453                              && (stf != PHY_TXC1_MODE_CDD))) {
6454                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6455                                           "32\n", wlc->pub->unit, __func__);
6456                                 bcmerror = -EINVAL;
6457                                 goto done;
6458                         }
6459                         /* mcs > 7 must use stf SDM */
6460                 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6461                         /* mcs > 7 must use stf SDM */
6462                         if (stf != PHY_TXC1_MODE_SDM) {
6463                                 BCMMSG(wlc->wiphy, "wl%d: enabling "
6464                                        "SDM mode for mcs %d\n",
6465                                        wlc->pub->unit, rate);
6466                                 stf = PHY_TXC1_MODE_SDM;
6467                         }
6468                 } else {
6469                         /*
6470                          * MCS 0-7 may use SISO, CDD, and for
6471                          * phy_rev >= 3 STBC
6472                          */
6473                         if ((stf > PHY_TXC1_MODE_STBC) ||
6474                             (!BRCMS_STBC_CAP_PHY(wlc)
6475                              && (stf == PHY_TXC1_MODE_STBC))) {
6476                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6477                                           "\n", wlc->pub->unit, __func__);
6478                                 bcmerror = -EINVAL;
6479                                 goto done;
6480                         }
6481                 }
6482         } else if (is_ofdm_rate(rate)) {
6483                 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6484                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6485                                   wlc->pub->unit, __func__);
6486                         bcmerror = -EINVAL;
6487                         goto done;
6488                 }
6489         } else if (is_cck_rate(rate)) {
6490                 if ((cur_band->bandtype != BRCM_BAND_2G)
6491                     || (stf != PHY_TXC1_MODE_SISO)) {
6492                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6493                                   wlc->pub->unit, __func__);
6494                         bcmerror = -EINVAL;
6495                         goto done;
6496                 }
6497         } else {
6498                 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6499                           wlc->pub->unit, __func__);
6500                 bcmerror = -EINVAL;
6501                 goto done;
6502         }
6503         /* make sure multiple antennae are available for non-siso rates */
6504         if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6505                 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6506                           "request\n", wlc->pub->unit, __func__);
6507                 bcmerror = -EINVAL;
6508                 goto done;
6509         }
6510
6511         rspec = rate;
6512         if (ismcs) {
6513                 rspec |= RSPEC_MIMORATE;
6514                 /* For STBC populate the STC field of the ratespec */
6515                 if (stf == PHY_TXC1_MODE_STBC) {
6516                         u8 stc;
6517                         stc = 1;        /* Nss for single stream is always 1 */
6518                         rspec |= (stc << RSPEC_STC_SHIFT);
6519                 }
6520         }
6521
6522         rspec |= (stf << RSPEC_STF_SHIFT);
6523
6524         if (override_mcs_only)
6525                 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6526
6527         if (issgi)
6528                 rspec |= RSPEC_SHORT_GI;
6529
6530         if ((rate != 0)
6531             && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6532                 return rate;
6533
6534         return rspec;
6535 done:
6536         return rate;
6537 }
6538
6539 /*
6540  * Compute PLCP, but only requires actual rate and length of pkt.
6541  * Rate is given in the driver standard multiple of 500 kbps.
6542  * le is set for 11 Mbps rate if necessary.
6543  * Broken out for PRQ.
6544  */
6545
6546 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
6547                              uint length, u8 *plcp)
6548 {
6549         u16 usec = 0;
6550         u8 le = 0;
6551
6552         switch (rate_500) {
6553         case BRCM_RATE_1M:
6554                 usec = length << 3;
6555                 break;
6556         case BRCM_RATE_2M:
6557                 usec = length << 2;
6558                 break;
6559         case BRCM_RATE_5M5:
6560                 usec = (length << 4) / 11;
6561                 if ((length << 4) - (usec * 11) > 0)
6562                         usec++;
6563                 break;
6564         case BRCM_RATE_11M:
6565                 usec = (length << 3) / 11;
6566                 if ((length << 3) - (usec * 11) > 0) {
6567                         usec++;
6568                         if ((usec * 11) - (length << 3) >= 8)
6569                                 le = D11B_PLCP_SIGNAL_LE;
6570                 }
6571                 break;
6572
6573         default:
6574                 wiphy_err(wlc->wiphy,
6575                           "brcms_c_cck_plcp_set: unsupported rate %d\n",
6576                           rate_500);
6577                 rate_500 = BRCM_RATE_1M;
6578                 usec = length << 3;
6579                 break;
6580         }
6581         /* PLCP signal byte */
6582         plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
6583         /* PLCP service byte */
6584         plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
6585         /* PLCP length u16, little endian */
6586         plcp[2] = usec & 0xff;
6587         plcp[3] = (usec >> 8) & 0xff;
6588         /* PLCP CRC16 */
6589         plcp[4] = 0;
6590         plcp[5] = 0;
6591 }
6592
6593 /* Rate: 802.11 rate code, length: PSDU length in octets */
6594 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
6595 {
6596         u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
6597         plcp[0] = mcs;
6598         if (rspec_is40mhz(rspec) || (mcs == 32))
6599                 plcp[0] |= MIMO_PLCP_40MHZ;
6600         BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
6601         plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
6602         plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
6603         plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
6604         plcp[5] = 0;
6605 }
6606
6607 /* Rate: 802.11 rate code, length: PSDU length in octets */
6608 static void
6609 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
6610 {
6611         u8 rate_signal;
6612         u32 tmp = 0;
6613         int rate = rspec2rate(rspec);
6614
6615         /*
6616          * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
6617          * transmitted first
6618          */
6619         rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
6620         memset(plcp, 0, D11_PHY_HDR_LEN);
6621         D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
6622
6623         tmp = (length & 0xfff) << 5;
6624         plcp[2] |= (tmp >> 16) & 0xff;
6625         plcp[1] |= (tmp >> 8) & 0xff;
6626         plcp[0] |= tmp & 0xff;
6627 }
6628
6629 /* Rate: 802.11 rate code, length: PSDU length in octets */
6630 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
6631                                  uint length, u8 *plcp)
6632 {
6633         int rate = rspec2rate(rspec);
6634
6635         brcms_c_cck_plcp_set(wlc, rate, length, plcp);
6636 }
6637
6638 static void
6639 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
6640                      uint length, u8 *plcp)
6641 {
6642         if (is_mcs_rate(rspec))
6643                 brcms_c_compute_mimo_plcp(rspec, length, plcp);
6644         else if (is_ofdm_rate(rspec))
6645                 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
6646         else
6647                 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
6648 }
6649
6650 /* brcms_c_compute_rtscts_dur()
6651  *
6652  * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
6653  * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
6654  * DUR for CTS-TO-SELF w/ frame    = 2 SIFS         + next frame time + 1 ACK
6655  *
6656  * cts                  cts-to-self or rts/cts
6657  * rts_rate             rts or cts rate in unit of 500kbps
6658  * rate                 next MPDU rate in unit of 500kbps
6659  * frame_len            next MPDU frame length in bytes
6660  */
6661 u16
6662 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
6663                            u32 rts_rate,
6664                            u32 frame_rate, u8 rts_preamble_type,
6665                            u8 frame_preamble_type, uint frame_len, bool ba)
6666 {
6667         u16 dur, sifs;
6668
6669         sifs = get_sifs(wlc->band);
6670
6671         if (!cts_only) {
6672                 /* RTS/CTS */
6673                 dur = 3 * sifs;
6674                 dur +=
6675                     (u16) brcms_c_calc_cts_time(wlc, rts_rate,
6676                                                rts_preamble_type);
6677         } else {
6678                 /* CTS-TO-SELF */
6679                 dur = 2 * sifs;
6680         }
6681
6682         dur +=
6683             (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
6684                                          frame_len);
6685         if (ba)
6686                 dur +=
6687                     (u16) brcms_c_calc_ba_time(wlc, frame_rate,
6688                                               BRCMS_SHORT_PREAMBLE);
6689         else
6690                 dur +=
6691                     (u16) brcms_c_calc_ack_time(wlc, frame_rate,
6692                                                frame_preamble_type);
6693         return dur;
6694 }
6695
6696 static u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
6697 {
6698         u16 phyctl1 = 0;
6699         u16 bw;
6700
6701         if (BRCMS_ISLCNPHY(wlc->band)) {
6702                 bw = PHY_TXC1_BW_20MHZ;
6703         } else {
6704                 bw = rspec_get_bw(rspec);
6705                 /* 10Mhz is not supported yet */
6706                 if (bw < PHY_TXC1_BW_20MHZ) {
6707                         wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
6708                                   "not supported yet, set to 20L\n", bw);
6709                         bw = PHY_TXC1_BW_20MHZ;
6710                 }
6711         }
6712
6713         if (is_mcs_rate(rspec)) {
6714                 uint mcs = rspec & RSPEC_RATE_MASK;
6715
6716                 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
6717                 phyctl1 = rspec_phytxbyte2(rspec);
6718                 /* set the upper byte of phyctl1 */
6719                 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
6720         } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
6721                    && !BRCMS_ISSSLPNPHY(wlc->band)) {
6722                 /*
6723                  * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
6724                  * Data Rate. Eventually MIMOPHY would also be converted to
6725                  * this format
6726                  */
6727                 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
6728                 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6729         } else {                /* legacy OFDM/CCK */
6730                 s16 phycfg;
6731                 /* get the phyctl byte from rate phycfg table */
6732                 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
6733                 if (phycfg == -1) {
6734                         wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
6735                                   "legacy OFDM/CCK rate\n");
6736                         phycfg = 0;
6737                 }
6738                 /* set the upper byte of phyctl1 */
6739                 phyctl1 =
6740                     (bw | (phycfg << 8) |
6741                      (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
6742         }
6743         return phyctl1;
6744 }
6745
6746 /*
6747  * Add struct d11txh, struct cck_phy_hdr.
6748  *
6749  * 'p' data must start with 802.11 MAC header
6750  * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6751  *
6752  * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6753  *
6754  */
6755 static u16
6756 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6757                      struct sk_buff *p, struct scb *scb, uint frag,
6758                      uint nfrags, uint queue, uint next_frag_len)
6759 {
6760         struct ieee80211_hdr *h;
6761         struct d11txh *txh;
6762         u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6763         int len, phylen, rts_phylen;
6764         u16 mch, phyctl, xfts, mainrates;
6765         u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6766         u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6767         u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6768         bool use_rts = false;
6769         bool use_cts = false;
6770         bool use_rifs = false;
6771         bool short_preamble[2] = { false, false };
6772         u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6773         u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6774         u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6775         struct ieee80211_rts *rts = NULL;
6776         bool qos;
6777         uint ac;
6778         bool hwtkmic = false;
6779         u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6780 #define ANTCFG_NONE 0xFF
6781         u8 antcfg = ANTCFG_NONE;
6782         u8 fbantcfg = ANTCFG_NONE;
6783         uint phyctl1_stf = 0;
6784         u16 durid = 0;
6785         struct ieee80211_tx_rate *txrate[2];
6786         int k;
6787         struct ieee80211_tx_info *tx_info;
6788         bool is_mcs;
6789         u16 mimo_txbw;
6790         u8 mimo_preamble_type;
6791
6792         /* locate 802.11 MAC header */
6793         h = (struct ieee80211_hdr *)(p->data);
6794         qos = ieee80211_is_data_qos(h->frame_control);
6795
6796         /* compute length of frame in bytes for use in PLCP computations */
6797         len = brcmu_pkttotlen(p);
6798         phylen = len + FCS_LEN;
6799
6800         /* Get tx_info */
6801         tx_info = IEEE80211_SKB_CB(p);
6802
6803         /* add PLCP */
6804         plcp = skb_push(p, D11_PHY_HDR_LEN);
6805
6806         /* add Broadcom tx descriptor header */
6807         txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6808         memset(txh, 0, D11_TXH_LEN);
6809
6810         /* setup frameid */
6811         if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6812                 /* non-AP STA should never use BCMC queue */
6813                 if (queue == TX_BCMC_FIFO) {
6814                         wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6815                                   "TX_BCMC!\n", wlc->pub->unit, __func__);
6816                         frameid = bcmc_fid_generate(wlc, NULL, txh);
6817                 } else {
6818                         /* Increment the counter for first fragment */
6819                         if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6820                                 scb->seqnum[p->priority]++;
6821
6822                         /* extract fragment number from frame first */
6823                         seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6824                         seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6825                         h->seq_ctrl = cpu_to_le16(seq);
6826
6827                         frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6828                             (queue & TXFID_QUEUE_MASK);
6829                 }
6830         }
6831         frameid |= queue & TXFID_QUEUE_MASK;
6832
6833         /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6834         if (ieee80211_is_beacon(h->frame_control))
6835                 mcl |= TXC_IGNOREPMQ;
6836
6837         txrate[0] = tx_info->control.rates;
6838         txrate[1] = txrate[0] + 1;
6839
6840         /*
6841          * if rate control algorithm didn't give us a fallback
6842          * rate, use the primary rate
6843          */
6844         if (txrate[1]->idx < 0)
6845                 txrate[1] = txrate[0];
6846
6847         for (k = 0; k < hw->max_rates; k++) {
6848                 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6849                 if (!is_mcs) {
6850                         if ((txrate[k]->idx >= 0)
6851                             && (txrate[k]->idx <
6852                                 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6853                                 rspec[k] =
6854                                     hw->wiphy->bands[tx_info->band]->
6855                                     bitrates[txrate[k]->idx].hw_value;
6856                                 short_preamble[k] =
6857                                     txrate[k]->
6858                                     flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6859                                     true : false;
6860                         } else {
6861                                 rspec[k] = BRCM_RATE_1M;
6862                         }
6863                 } else {
6864                         rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6865                                         NRATE_MCS_INUSE | txrate[k]->idx);
6866                 }
6867
6868                 /*
6869                  * Currently only support same setting for primay and
6870                  * fallback rates. Unify flags for each rate into a
6871                  * single value for the frame
6872                  */
6873                 use_rts |=
6874                     txrate[k]->
6875                     flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6876                 use_cts |=
6877                     txrate[k]->
6878                     flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6879
6880
6881                 /*
6882                  * (1) RATE:
6883                  *   determine and validate primary rate
6884                  *   and fallback rates
6885                  */
6886                 if (!rspec_active(rspec[k])) {
6887                         rspec[k] = BRCM_RATE_1M;
6888                 } else {
6889                         if (!is_multicast_ether_addr(h->addr1)) {
6890                                 /* set tx antenna config */
6891                                 brcms_c_antsel_antcfg_get(wlc->asi, false,
6892                                         false, 0, 0, &antcfg, &fbantcfg);
6893                         }
6894                 }
6895         }
6896
6897         phyctl1_stf = wlc->stf->ss_opmode;
6898
6899         if (wlc->pub->_n_enab & SUPPORT_11N) {
6900                 for (k = 0; k < hw->max_rates; k++) {
6901                         /*
6902                          * apply siso/cdd to single stream mcs's or ofdm
6903                          * if rspec is auto selected
6904                          */
6905                         if (((is_mcs_rate(rspec[k]) &&
6906                               is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6907                              is_ofdm_rate(rspec[k]))
6908                             && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6909                                 || !(rspec[k] & RSPEC_OVERRIDE))) {
6910                                 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6911
6912                                 /* For SISO MCS use STBC if possible */
6913                                 if (is_mcs_rate(rspec[k])
6914                                     && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6915                                         u8 stc;
6916
6917                                         /* Nss for single stream is always 1 */
6918                                         stc = 1;
6919                                         rspec[k] |= (PHY_TXC1_MODE_STBC <<
6920                                                         RSPEC_STF_SHIFT) |
6921                                                     (stc << RSPEC_STC_SHIFT);
6922                                 } else
6923                                         rspec[k] |=
6924                                             (phyctl1_stf << RSPEC_STF_SHIFT);
6925                         }
6926
6927                         /*
6928                          * Is the phy configured to use 40MHZ frames? If
6929                          * so then pick the desired txbw
6930                          */
6931                         if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6932                                 /* default txbw is 20in40 SB */
6933                                 mimo_ctlchbw = mimo_txbw =
6934                                    CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6935                                                                  wlc->band->pi))
6936                                    ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
6937
6938                                 if (is_mcs_rate(rspec[k])) {
6939                                         /* mcs 32 must be 40b/w DUP */
6940                                         if ((rspec[k] & RSPEC_RATE_MASK)
6941                                             == 32) {
6942                                                 mimo_txbw =
6943                                                     PHY_TXC1_BW_40MHZ_DUP;
6944                                                 /* use override */
6945                                         } else if (wlc->mimo_40txbw != AUTO)
6946                                                 mimo_txbw = wlc->mimo_40txbw;
6947                                         /* else check if dst is using 40 Mhz */
6948                                         else if (scb->flags & SCB_IS40)
6949                                                 mimo_txbw = PHY_TXC1_BW_40MHZ;
6950                                 } else if (is_ofdm_rate(rspec[k])) {
6951                                         if (wlc->ofdm_40txbw != AUTO)
6952                                                 mimo_txbw = wlc->ofdm_40txbw;
6953                                 } else if (wlc->cck_40txbw != AUTO) {
6954                                         mimo_txbw = wlc->cck_40txbw;
6955                                 }
6956                         } else {
6957                                 /*
6958                                  * mcs32 is 40 b/w only.
6959                                  * This is possible for probe packets on
6960                                  * a STA during SCAN
6961                                  */
6962                                 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
6963                                         /* mcs 0 */
6964                                         rspec[k] = RSPEC_MIMORATE;
6965
6966                                 mimo_txbw = PHY_TXC1_BW_20MHZ;
6967                         }
6968
6969                         /* Set channel width */
6970                         rspec[k] &= ~RSPEC_BW_MASK;
6971                         if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
6972                                 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
6973                         else
6974                                 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
6975
6976                         /* Disable short GI, not supported yet */
6977                         rspec[k] &= ~RSPEC_SHORT_GI;
6978
6979                         mimo_preamble_type = BRCMS_MM_PREAMBLE;
6980                         if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
6981                                 mimo_preamble_type = BRCMS_GF_PREAMBLE;
6982
6983                         if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
6984                             && (!is_mcs_rate(rspec[k]))) {
6985                                 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
6986                                           "RC_MCS != is_mcs_rate(rspec)\n",
6987                                           wlc->pub->unit, __func__);
6988                         }
6989
6990                         if (is_mcs_rate(rspec[k])) {
6991                                 preamble_type[k] = mimo_preamble_type;
6992
6993                                 /*
6994                                  * if SGI is selected, then forced mm
6995                                  * for single stream
6996                                  */
6997                                 if ((rspec[k] & RSPEC_SHORT_GI)
6998                                     && is_single_stream(rspec[k] &
6999                                                         RSPEC_RATE_MASK))
7000                                         preamble_type[k] = BRCMS_MM_PREAMBLE;
7001                         }
7002
7003                         /* should be better conditionalized */
7004                         if (!is_mcs_rate(rspec[0])
7005                             && (tx_info->control.rates[0].
7006                                 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
7007                                 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
7008                 }
7009         } else {
7010                 for (k = 0; k < hw->max_rates; k++) {
7011                         /* Set ctrlchbw as 20Mhz */
7012                         rspec[k] &= ~RSPEC_BW_MASK;
7013                         rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
7014
7015                         /* for nphy, stf of ofdm frames must follow policies */
7016                         if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
7017                                 rspec[k] &= ~RSPEC_STF_MASK;
7018                                 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
7019                         }
7020                 }
7021         }
7022
7023         /* Reset these for use with AMPDU's */
7024         txrate[0]->count = 0;
7025         txrate[1]->count = 0;
7026
7027         /* (2) PROTECTION, may change rspec */
7028         if ((ieee80211_is_data(h->frame_control) ||
7029             ieee80211_is_mgmt(h->frame_control)) &&
7030             (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
7031                 use_rts = true;
7032
7033         /* (3) PLCP: determine PLCP header and MAC duration,
7034          * fill struct d11txh */
7035         brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
7036         brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
7037         memcpy(&txh->FragPLCPFallback,
7038                plcp_fallback, sizeof(txh->FragPLCPFallback));
7039
7040         /* Length field now put in CCK FBR CRC field */
7041         if (is_cck_rate(rspec[1])) {
7042                 txh->FragPLCPFallback[4] = phylen & 0xff;
7043                 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
7044         }
7045
7046         /* MIMO-RATE: need validation ?? */
7047         mainrates = is_ofdm_rate(rspec[0]) ?
7048                         D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
7049                         plcp[0];
7050
7051         /* DUR field for main rate */
7052         if (!ieee80211_is_pspoll(h->frame_control) &&
7053             !is_multicast_ether_addr(h->addr1) && !use_rifs) {
7054                 durid =
7055                     brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
7056                                           next_frag_len);
7057                 h->duration_id = cpu_to_le16(durid);
7058         } else if (use_rifs) {
7059                 /* NAV protect to end of next max packet size */
7060                 durid =
7061                     (u16) brcms_c_calc_frame_time(wlc, rspec[0],
7062                                                  preamble_type[0],
7063                                                  DOT11_MAX_FRAG_LEN);
7064                 durid += RIFS_11N_TIME;
7065                 h->duration_id = cpu_to_le16(durid);
7066         }
7067
7068         /* DUR field for fallback rate */
7069         if (ieee80211_is_pspoll(h->frame_control))
7070                 txh->FragDurFallback = h->duration_id;
7071         else if (is_multicast_ether_addr(h->addr1) || use_rifs)
7072                 txh->FragDurFallback = 0;
7073         else {
7074                 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
7075                                               preamble_type[1], next_frag_len);
7076                 txh->FragDurFallback = cpu_to_le16(durid);
7077         }
7078
7079         /* (4) MAC-HDR: MacTxControlLow */
7080         if (frag == 0)
7081                 mcl |= TXC_STARTMSDU;
7082
7083         if (!is_multicast_ether_addr(h->addr1))
7084                 mcl |= TXC_IMMEDACK;
7085
7086         if (wlc->band->bandtype == BRCM_BAND_5G)
7087                 mcl |= TXC_FREQBAND_5G;
7088
7089         if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
7090                 mcl |= TXC_BW_40;
7091
7092         /* set AMIC bit if using hardware TKIP MIC */
7093         if (hwtkmic)
7094                 mcl |= TXC_AMIC;
7095
7096         txh->MacTxControlLow = cpu_to_le16(mcl);
7097
7098         /* MacTxControlHigh */
7099         mch = 0;
7100
7101         /* Set fallback rate preamble type */
7102         if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
7103             (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
7104                 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
7105                         mch |= TXC_PREAMBLE_DATA_FB_SHORT;
7106         }
7107
7108         /* MacFrameControl */
7109         memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
7110         txh->TxFesTimeNormal = cpu_to_le16(0);
7111
7112         txh->TxFesTimeFallback = cpu_to_le16(0);
7113
7114         /* TxFrameRA */
7115         memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
7116
7117         /* TxFrameID */
7118         txh->TxFrameID = cpu_to_le16(frameid);
7119
7120         /*
7121          * TxStatus, Note the case of recreating the first frag of a suppressed
7122          * frame then we may need to reset the retry cnt's via the status reg
7123          */
7124         txh->TxStatus = cpu_to_le16(status);
7125
7126         /*
7127          * extra fields for ucode AMPDU aggregation, the new fields are added to
7128          * the END of previous structure so that it's compatible in driver.
7129          */
7130         txh->MaxNMpdus = cpu_to_le16(0);
7131         txh->MaxABytes_MRT = cpu_to_le16(0);
7132         txh->MaxABytes_FBR = cpu_to_le16(0);
7133         txh->MinMBytes = cpu_to_le16(0);
7134
7135         /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7136          * furnish struct d11txh */
7137         /* RTS PLCP header and RTS frame */
7138         if (use_rts || use_cts) {
7139                 if (use_rts && use_cts)
7140                         use_cts = false;
7141
7142                 for (k = 0; k < 2; k++) {
7143                         rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7144                                                               false,
7145                                                               mimo_ctlchbw);
7146                 }
7147
7148                 if (!is_ofdm_rate(rts_rspec[0]) &&
7149                     !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7150                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7151                         rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7152                         mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7153                 }
7154
7155                 if (!is_ofdm_rate(rts_rspec[1]) &&
7156                     !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7157                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7158                         rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7159                         mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7160                 }
7161
7162                 /* RTS/CTS additions to MacTxControlLow */
7163                 if (use_cts) {
7164                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7165                 } else {
7166                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7167                         txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7168                 }
7169
7170                 /* RTS PLCP header */
7171                 rts_plcp = txh->RTSPhyHeader;
7172                 if (use_cts)
7173                         rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7174                 else
7175                         rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7176
7177                 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7178
7179                 /* fallback rate version of RTS PLCP header */
7180                 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7181                                  rts_plcp_fallback);
7182                 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7183                        sizeof(txh->RTSPLCPFallback));
7184
7185                 /* RTS frame fields... */
7186                 rts = (struct ieee80211_rts *)&txh->rts_frame;
7187
7188                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7189                                                rspec[0], rts_preamble_type[0],
7190                                                preamble_type[0], phylen, false);
7191                 rts->duration = cpu_to_le16(durid);
7192                 /* fallback rate version of RTS DUR field */
7193                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7194                                                rts_rspec[1], rspec[1],
7195                                                rts_preamble_type[1],
7196                                                preamble_type[1], phylen, false);
7197                 txh->RTSDurFallback = cpu_to_le16(durid);
7198
7199                 if (use_cts) {
7200                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7201                                                          IEEE80211_STYPE_CTS);
7202
7203                         memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7204                 } else {
7205                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7206                                                          IEEE80211_STYPE_RTS);
7207
7208                         memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7209                 }
7210
7211                 /* mainrate
7212                  *    low 8 bits: main frag rate/mcs,
7213                  *    high 8 bits: rts/cts rate/mcs
7214                  */
7215                 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7216                                 D11A_PHY_HDR_GRATE(
7217                                         (struct ofdm_phy_hdr *) rts_plcp) :
7218                                 rts_plcp[0]) << 8;
7219         } else {
7220                 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7221                 memset((char *)&txh->rts_frame, 0,
7222                         sizeof(struct ieee80211_rts));
7223                 memset((char *)txh->RTSPLCPFallback, 0,
7224                       sizeof(txh->RTSPLCPFallback));
7225                 txh->RTSDurFallback = 0;
7226         }
7227
7228 #ifdef SUPPORT_40MHZ
7229         /* add null delimiter count */
7230         if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7231                 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7232                    brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7233
7234 #endif
7235
7236         /*
7237          * Now that RTS/RTS FB preamble types are updated, write
7238          * the final value
7239          */
7240         txh->MacTxControlHigh = cpu_to_le16(mch);
7241
7242         /*
7243          * MainRates (both the rts and frag plcp rates have
7244          * been calculated now)
7245          */
7246         txh->MainRates = cpu_to_le16(mainrates);
7247
7248         /* XtraFrameTypes */
7249         xfts = frametype(rspec[1], wlc->mimoft);
7250         xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7251         xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7252         xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7253                                                              XFTS_CHANNEL_SHIFT;
7254         txh->XtraFrameTypes = cpu_to_le16(xfts);
7255
7256         /* PhyTxControlWord */
7257         phyctl = frametype(rspec[0], wlc->mimoft);
7258         if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7259             (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7260                 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7261                         phyctl |= PHY_TXC_SHORT_HDR;
7262         }
7263
7264         /* phytxant is properly bit shifted */
7265         phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7266         txh->PhyTxControlWord = cpu_to_le16(phyctl);
7267
7268         /* PhyTxControlWord_1 */
7269         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7270                 u16 phyctl1 = 0;
7271
7272                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7273                 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7274                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7275                 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7276
7277                 if (use_rts || use_cts) {
7278                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7279                         txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7280                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7281                         txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7282                 }
7283
7284                 /*
7285                  * For mcs frames, if mixedmode(overloaded with long preamble)
7286                  * is going to be set, fill in non-zero MModeLen and/or
7287                  * MModeFbrLen it will be unnecessary if they are separated
7288                  */
7289                 if (is_mcs_rate(rspec[0]) &&
7290                     (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7291                         u16 mmodelen =
7292                             brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7293                         txh->MModeLen = cpu_to_le16(mmodelen);
7294                 }
7295
7296                 if (is_mcs_rate(rspec[1]) &&
7297                     (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7298                         u16 mmodefbrlen =
7299                             brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7300                         txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7301                 }
7302         }
7303
7304         ac = skb_get_queue_mapping(p);
7305         if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7306                 uint frag_dur, dur, dur_fallback;
7307
7308                 /* WME: Update TXOP threshold */
7309                 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7310                         frag_dur =
7311                             brcms_c_calc_frame_time(wlc, rspec[0],
7312                                         preamble_type[0], phylen);
7313
7314                         if (rts) {
7315                                 /* 1 RTS or CTS-to-self frame */
7316                                 dur =
7317                                     brcms_c_calc_cts_time(wlc, rts_rspec[0],
7318                                                       rts_preamble_type[0]);
7319                                 dur_fallback =
7320                                     brcms_c_calc_cts_time(wlc, rts_rspec[1],
7321                                                       rts_preamble_type[1]);
7322                                 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7323                                 dur += le16_to_cpu(rts->duration);
7324                                 dur_fallback +=
7325                                         le16_to_cpu(txh->RTSDurFallback);
7326                         } else if (use_rifs) {
7327                                 dur = frag_dur;
7328                                 dur_fallback = 0;
7329                         } else {
7330                                 /* frame + SIFS + ACK */
7331                                 dur = frag_dur;
7332                                 dur +=
7333                                     brcms_c_compute_frame_dur(wlc, rspec[0],
7334                                                           preamble_type[0], 0);
7335
7336                                 dur_fallback =
7337                                     brcms_c_calc_frame_time(wlc, rspec[1],
7338                                                         preamble_type[1],
7339                                                         phylen);
7340                                 dur_fallback +=
7341                                     brcms_c_compute_frame_dur(wlc, rspec[1],
7342                                                           preamble_type[1], 0);
7343                         }
7344                         /* NEED to set TxFesTimeNormal (hard) */
7345                         txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7346                         /*
7347                          * NEED to set fallback rate version of
7348                          * TxFesTimeNormal (hard)
7349                          */
7350                         txh->TxFesTimeFallback =
7351                                 cpu_to_le16((u16) dur_fallback);
7352
7353                         /*
7354                          * update txop byte threshold (txop minus intraframe
7355                          * overhead)
7356                          */
7357                         if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7358                                 uint newfragthresh;
7359
7360                                 newfragthresh =
7361                                     brcms_c_calc_frame_len(wlc,
7362                                         rspec[0], preamble_type[0],
7363                                         (wlc->edcf_txop[ac] -
7364                                                 (dur - frag_dur)));
7365                                 /* range bound the fragthreshold */
7366                                 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7367                                         newfragthresh =
7368                                             DOT11_MIN_FRAG_LEN;
7369                                 else if (newfragthresh >
7370                                          wlc->usr_fragthresh)
7371                                         newfragthresh =
7372                                             wlc->usr_fragthresh;
7373                                 /* update the fragthresh and do txc update */
7374                                 if (wlc->fragthresh[queue] !=
7375                                     (u16) newfragthresh)
7376                                         wlc->fragthresh[queue] =
7377                                             (u16) newfragthresh;
7378                         } else {
7379                                 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7380                                           "for rate %d\n",
7381                                           wlc->pub->unit, fifo_names[queue],
7382                                           rspec2rate(rspec[0]));
7383                         }
7384
7385                         if (dur > wlc->edcf_txop[ac])
7386                                 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7387                                           "exceeded phylen %d/%d dur %d/%d\n",
7388                                           wlc->pub->unit, __func__,
7389                                           fifo_names[queue],
7390                                           phylen, wlc->fragthresh[queue],
7391                                           dur, wlc->edcf_txop[ac]);
7392                 }
7393         }
7394
7395         return 0;
7396 }
7397
7398 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7399                               struct ieee80211_hw *hw)
7400 {
7401         u8 prio;
7402         uint fifo;
7403         struct scb *scb = &wlc->pri_scb;
7404         struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7405
7406         /*
7407          * 802.11 standard requires management traffic
7408          * to go at highest priority
7409          */
7410         prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7411                 MAXPRIO;
7412         fifo = prio2fifo[prio];
7413         if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7414                 return;
7415         brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7416         brcms_c_send_q(wlc);
7417 }
7418
7419 void brcms_c_send_q(struct brcms_c_info *wlc)
7420 {
7421         struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7422         int prec;
7423         u16 prec_map;
7424         int err = 0, i, count;
7425         uint fifo;
7426         struct brcms_txq_info *qi = wlc->pkt_queue;
7427         struct pktq *q = &qi->q;
7428         struct ieee80211_tx_info *tx_info;
7429
7430         prec_map = wlc->tx_prec_map;
7431
7432         /* Send all the enq'd pkts that we can.
7433          * Dequeue packets with precedence with empty HW fifo only
7434          */
7435         while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7436                 tx_info = IEEE80211_SKB_CB(pkt[0]);
7437                 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7438                         err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7439                 } else {
7440                         count = 1;
7441                         err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7442                         if (!err) {
7443                                 for (i = 0; i < count; i++)
7444                                         brcms_c_txfifo(wlc, fifo, pkt[i], true,
7445                                                        1);
7446                         }
7447                 }
7448
7449                 if (err == -EBUSY) {
7450                         brcmu_pktq_penq_head(q, prec, pkt[0]);
7451                         /*
7452                          * If send failed due to any other reason than a
7453                          * change in HW FIFO condition, quit. Otherwise,
7454                          * read the new prec_map!
7455                          */
7456                         if (prec_map == wlc->tx_prec_map)
7457                                 break;
7458                         prec_map = wlc->tx_prec_map;
7459                 }
7460         }
7461 }
7462
7463 void
7464 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7465                bool commit, s8 txpktpend)
7466 {
7467         u16 frameid = INVALIDFID;
7468         struct d11txh *txh;
7469
7470         txh = (struct d11txh *) (p->data);
7471
7472         /* When a BC/MC frame is being committed to the BCMC fifo
7473          * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7474          */
7475         if (fifo == TX_BCMC_FIFO)
7476                 frameid = le16_to_cpu(txh->TxFrameID);
7477
7478         /*
7479          * Bump up pending count for if not using rpc. If rpc is
7480          * used, this will be handled in brcms_b_txfifo()
7481          */
7482         if (commit) {
7483                 wlc->core->txpktpend[fifo] += txpktpend;
7484                 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7485                          txpktpend, wlc->core->txpktpend[fifo]);
7486         }
7487
7488         /* Commit BCMC sequence number in the SHM frame ID location */
7489         if (frameid != INVALIDFID) {
7490                 /*
7491                  * To inform the ucode of the last mcast frame posted
7492                  * so that it can clear moredata bit
7493                  */
7494                 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7495         }
7496
7497         if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7498                 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7499 }
7500
7501 u32
7502 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7503                            bool use_rspec, u16 mimo_ctlchbw)
7504 {
7505         u32 rts_rspec = 0;
7506
7507         if (use_rspec)
7508                 /* use frame rate as rts rate */
7509                 rts_rspec = rspec;
7510         else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7511                 /* Use 11Mbps as the g protection RTS target rate and fallback.
7512                  * Use the brcms_basic_rate() lookup to find the best basic rate
7513                  * under the target in case 11 Mbps is not Basic.
7514                  * 6 and 9 Mbps are not usually selected by rate selection, but
7515                  * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7516                  * is more robust.
7517                  */
7518                 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7519         else
7520                 /* calculate RTS rate and fallback rate based on the frame rate
7521                  * RTS must be sent at a basic rate since it is a
7522                  * control frame, sec 9.6 of 802.11 spec
7523                  */
7524                 rts_rspec = brcms_basic_rate(wlc, rspec);
7525
7526         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7527                 /* set rts txbw to correct side band */
7528                 rts_rspec &= ~RSPEC_BW_MASK;
7529
7530                 /*
7531                  * if rspec/rspec_fallback is 40MHz, then send RTS on both
7532                  * 20MHz channel (DUP), otherwise send RTS on control channel
7533                  */
7534                 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7535                         rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7536                 else
7537                         rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7538
7539                 /* pick siso/cdd as default for ofdm */
7540                 if (is_ofdm_rate(rts_rspec)) {
7541                         rts_rspec &= ~RSPEC_STF_MASK;
7542                         rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7543                 }
7544         }
7545         return rts_rspec;
7546 }
7547
7548 void
7549 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7550 {
7551         wlc->core->txpktpend[fifo] -= txpktpend;
7552         BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7553                wlc->core->txpktpend[fifo]);
7554
7555         /* There is more room; mark precedences related to this FIFO sendable */
7556         wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7557
7558         /* figure out which bsscfg is being worked on... */
7559 }
7560
7561 /* Update beacon listen interval in shared memory */
7562 static void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7563 {
7564         /* wake up every DTIM is the default */
7565         if (wlc->bcn_li_dtim == 1)
7566                 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7567         else
7568                 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7569                               (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7570 }
7571
7572 static void
7573 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7574                   u32 *tsf_h_ptr)
7575 {
7576         struct d11regs __iomem *regs = wlc_hw->regs;
7577
7578         /* read the tsf timer low, then high to get an atomic read */
7579         *tsf_l_ptr = R_REG(&regs->tsf_timerlow);
7580         *tsf_h_ptr = R_REG(&regs->tsf_timerhigh);
7581 }
7582
7583 /*
7584  * recover 64bit TSF value from the 16bit TSF value in the rx header
7585  * given the assumption that the TSF passed in header is within 65ms
7586  * of the current tsf.
7587  *
7588  * 6       5       4       4       3       2       1
7589  * 3.......6.......8.......0.......2.......4.......6.......8......0
7590  * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7591  *
7592  * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7593  * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7594  * receive call sequence after rx interrupt. Only the higher 16 bits
7595  * are used. Finally, the tsf_h is read from the tsf register.
7596  */
7597 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7598                                  struct d11rxhdr *rxh)
7599 {
7600         u32 tsf_h, tsf_l;
7601         u16 rx_tsf_0_15, rx_tsf_16_31;
7602
7603         brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7604
7605         rx_tsf_16_31 = (u16)(tsf_l >> 16);
7606         rx_tsf_0_15 = rxh->RxTSFTime;
7607
7608         /*
7609          * a greater tsf time indicates the low 16 bits of
7610          * tsf_l wrapped, so decrement the high 16 bits.
7611          */
7612         if ((u16)tsf_l < rx_tsf_0_15) {
7613                 rx_tsf_16_31 -= 1;
7614                 if (rx_tsf_16_31 == 0xffff)
7615                         tsf_h -= 1;
7616         }
7617
7618         return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7619 }
7620
7621 static void
7622 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7623                      struct sk_buff *p,
7624                      struct ieee80211_rx_status *rx_status)
7625 {
7626         int preamble;
7627         int channel;
7628         u32 rspec;
7629         unsigned char *plcp;
7630
7631         /* fill in TSF and flag its presence */
7632         rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7633         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7634
7635         channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7636
7637         if (channel > 14) {
7638                 rx_status->band = IEEE80211_BAND_5GHZ;
7639                 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7640                                         WF_CHAN_FACTOR_5_G/2, channel);
7641
7642         } else {
7643                 rx_status->band = IEEE80211_BAND_2GHZ;
7644                 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7645         }
7646
7647         rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7648
7649         /* noise */
7650         /* qual */
7651         rx_status->antenna =
7652                 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7653
7654         plcp = p->data;
7655
7656         rspec = brcms_c_compute_rspec(rxh, plcp);
7657         if (is_mcs_rate(rspec)) {
7658                 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7659                 rx_status->flag |= RX_FLAG_HT;
7660                 if (rspec_is40mhz(rspec))
7661                         rx_status->flag |= RX_FLAG_40MHZ;
7662         } else {
7663                 switch (rspec2rate(rspec)) {
7664                 case BRCM_RATE_1M:
7665                         rx_status->rate_idx = 0;
7666                         break;
7667                 case BRCM_RATE_2M:
7668                         rx_status->rate_idx = 1;
7669                         break;
7670                 case BRCM_RATE_5M5:
7671                         rx_status->rate_idx = 2;
7672                         break;
7673                 case BRCM_RATE_11M:
7674                         rx_status->rate_idx = 3;
7675                         break;
7676                 case BRCM_RATE_6M:
7677                         rx_status->rate_idx = 4;
7678                         break;
7679                 case BRCM_RATE_9M:
7680                         rx_status->rate_idx = 5;
7681                         break;
7682                 case BRCM_RATE_12M:
7683                         rx_status->rate_idx = 6;
7684                         break;
7685                 case BRCM_RATE_18M:
7686                         rx_status->rate_idx = 7;
7687                         break;
7688                 case BRCM_RATE_24M:
7689                         rx_status->rate_idx = 8;
7690                         break;
7691                 case BRCM_RATE_36M:
7692                         rx_status->rate_idx = 9;
7693                         break;
7694                 case BRCM_RATE_48M:
7695                         rx_status->rate_idx = 10;
7696                         break;
7697                 case BRCM_RATE_54M:
7698                         rx_status->rate_idx = 11;
7699                         break;
7700                 default:
7701                         wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7702                 }
7703
7704                 /*
7705                  * For 5GHz, we should decrease the index as it is
7706                  * a subset of the 2.4G rates. See bitrates field
7707                  * of brcms_band_5GHz_nphy (in mac80211_if.c).
7708                  */
7709                 if (rx_status->band == IEEE80211_BAND_5GHZ)
7710                         rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7711
7712                 /* Determine short preamble and rate_idx */
7713                 preamble = 0;
7714                 if (is_cck_rate(rspec)) {
7715                         if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7716                                 rx_status->flag |= RX_FLAG_SHORTPRE;
7717                 } else if (is_ofdm_rate(rspec)) {
7718                         rx_status->flag |= RX_FLAG_SHORTPRE;
7719                 } else {
7720                         wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
7721                                   __func__);
7722                 }
7723         }
7724
7725         if (plcp3_issgi(plcp[3]))
7726                 rx_status->flag |= RX_FLAG_SHORT_GI;
7727
7728         if (rxh->RxStatus1 & RXS_DECERR) {
7729                 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
7730                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_PLCP_CRC\n",
7731                           __func__);
7732         }
7733         if (rxh->RxStatus1 & RXS_FCSERR) {
7734                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
7735                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_FCS_CRC\n",
7736                           __func__);
7737         }
7738 }
7739
7740 static void
7741 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7742                 struct sk_buff *p)
7743 {
7744         int len_mpdu;
7745         struct ieee80211_rx_status rx_status;
7746
7747         memset(&rx_status, 0, sizeof(rx_status));
7748         prep_mac80211_status(wlc, rxh, p, &rx_status);
7749
7750         /* mac header+body length, exclude CRC and plcp header */
7751         len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
7752         skb_pull(p, D11_PHY_HDR_LEN);
7753         __skb_trim(p, len_mpdu);
7754
7755         memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
7756         ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
7757 }
7758
7759 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
7760  * number of bytes goes in the length field
7761  *
7762  * Formula given by HT PHY Spec v 1.13
7763  *   len = 3(nsyms + nstream + 3) - 3
7764  */
7765 u16
7766 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
7767                       uint mac_len)
7768 {
7769         uint nsyms, len = 0, kNdps;
7770
7771         BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
7772                  wlc->pub->unit, rspec2rate(ratespec), mac_len);
7773
7774         if (is_mcs_rate(ratespec)) {
7775                 uint mcs = ratespec & RSPEC_RATE_MASK;
7776                 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
7777                                   rspec_stc(ratespec);
7778
7779                 /*
7780                  * the payload duration calculation matches that
7781                  * of regular ofdm
7782                  */
7783                 /* 1000Ndbps = kbps * 4 */
7784                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
7785                                    rspec_issgi(ratespec)) * 4;
7786
7787                 if (rspec_stc(ratespec) == 0)
7788                         nsyms =
7789                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7790                                   APHY_TAIL_NBITS) * 1000, kNdps);
7791                 else
7792                         /* STBC needs to have even number of symbols */
7793                         nsyms =
7794                             2 *
7795                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
7796                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
7797
7798                 /* (+3) account for HT-SIG(2) and HT-STF(1) */
7799                 nsyms += (tot_streams + 3);
7800                 /*
7801                  * 3 bytes/symbol @ legacy 6Mbps rate
7802                  * (-3) excluding service bits and tail bits
7803                  */
7804                 len = (3 * nsyms) - 3;
7805         }
7806
7807         return (u16) len;
7808 }
7809
7810 static void
7811 brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
7812 {
7813         const struct brcms_c_rateset *rs_dflt;
7814         struct brcms_c_rateset rs;
7815         u8 rate;
7816         u16 entry_ptr;
7817         u8 plcp[D11_PHY_HDR_LEN];
7818         u16 dur, sifs;
7819         uint i;
7820
7821         sifs = get_sifs(wlc->band);
7822
7823         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
7824
7825         brcms_c_rateset_copy(rs_dflt, &rs);
7826         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
7827
7828         /*
7829          * walk the phy rate table and update MAC core SHM
7830          * basic rate table entries
7831          */
7832         for (i = 0; i < rs.count; i++) {
7833                 rate = rs.rates[i] & BRCMS_RATE_MASK;
7834
7835                 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
7836
7837                 /* Calculate the Probe Response PLCP for the given rate */
7838                 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
7839
7840                 /*
7841                  * Calculate the duration of the Probe Response
7842                  * frame plus SIFS for the MAC
7843                  */
7844                 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
7845                                                 BRCMS_LONG_PREAMBLE, frame_len);
7846                 dur += sifs;
7847
7848                 /* Update the SHM Rate Table entry Probe Response values */
7849                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
7850                               (u16) (plcp[0] + (plcp[1] << 8)));
7851                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
7852                               (u16) (plcp[2] + (plcp[3] << 8)));
7853                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
7854         }
7855 }
7856
7857 /*      Max buffering needed for beacon template/prb resp template is 142 bytes.
7858  *
7859  *      PLCP header is 6 bytes.
7860  *      802.11 A3 header is 24 bytes.
7861  *      Max beacon frame body template length is 112 bytes.
7862  *      Max probe resp frame body template length is 110 bytes.
7863  *
7864  *      *len on input contains the max length of the packet available.
7865  *
7866  *      The *len value is set to the number of bytes in buf used, and starts
7867  *      with the PLCP and included up to, but not including, the 4 byte FCS.
7868  */
7869 static void
7870 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
7871                          u32 bcn_rspec,
7872                          struct brcms_bss_cfg *cfg, u16 *buf, int *len)
7873 {
7874         static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
7875         struct cck_phy_hdr *plcp;
7876         struct ieee80211_mgmt *h;
7877         int hdr_len, body_len;
7878
7879         hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
7880
7881         /* calc buffer size provided for frame body */
7882         body_len = *len - hdr_len;
7883         /* return actual size */
7884         *len = hdr_len + body_len;
7885
7886         /* format PHY and MAC headers */
7887         memset((char *)buf, 0, hdr_len);
7888
7889         plcp = (struct cck_phy_hdr *) buf;
7890
7891         /*
7892          * PLCP for Probe Response frames are filled in from
7893          * core's rate table
7894          */
7895         if (type == IEEE80211_STYPE_BEACON)
7896                 /* fill in PLCP */
7897                 brcms_c_compute_plcp(wlc, bcn_rspec,
7898                                  (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
7899                                  (u8 *) plcp);
7900
7901         /* "Regular" and 16 MBSS but not for 4 MBSS */
7902         /* Update the phytxctl for the beacon based on the rspec */
7903         brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
7904
7905         h = (struct ieee80211_mgmt *)&plcp[1];
7906
7907         /* fill in 802.11 header */
7908         h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
7909
7910         /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
7911         /* A1 filled in by MAC for prb resp, broadcast for bcn */
7912         if (type == IEEE80211_STYPE_BEACON)
7913                 memcpy(&h->da, &ether_bcast, ETH_ALEN);
7914         memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
7915         memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
7916
7917         /* SEQ filled in by MAC */
7918 }
7919
7920 int brcms_c_get_header_len(void)
7921 {
7922         return TXOFF;
7923 }
7924
7925 /*
7926  * Update all beacons for the system.
7927  */
7928 void brcms_c_update_beacon(struct brcms_c_info *wlc)
7929 {
7930         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7931
7932         if (bsscfg->up && !bsscfg->BSS)
7933                 /* Clear the soft intmask */
7934                 wlc->defmacintmask &= ~MI_BCNTPL;
7935 }
7936
7937 /* Write ssid into shared memory */
7938 static void
7939 brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
7940 {
7941         u8 *ssidptr = cfg->SSID;
7942         u16 base = M_SSID;
7943         u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
7944
7945         /* padding the ssid with zero and copy it into shm */
7946         memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
7947         memcpy(ssidbuf, ssidptr, cfg->SSID_len);
7948
7949         brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
7950         brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
7951 }
7952
7953 static void
7954 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
7955                               struct brcms_bss_cfg *cfg,
7956                               bool suspend)
7957 {
7958         u16 prb_resp[BCN_TMPL_LEN / 2];
7959         int len = BCN_TMPL_LEN;
7960
7961         /*
7962          * write the probe response to hardware, or save in
7963          * the config structure
7964          */
7965
7966         /* create the probe response template */
7967         brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
7968                                  cfg, prb_resp, &len);
7969
7970         if (suspend)
7971                 brcms_c_suspend_mac_and_wait(wlc);
7972
7973         /* write the probe response into the template region */
7974         brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
7975                                     (len + 3) & ~3, prb_resp);
7976
7977         /* write the length of the probe response frame (+PLCP/-FCS) */
7978         brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
7979
7980         /* write the SSID and SSID length */
7981         brcms_c_shm_ssid_upd(wlc, cfg);
7982
7983         /*
7984          * Write PLCP headers and durations for probe response frames
7985          * at all rates. Use the actual frame length covered by the
7986          * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
7987          * by subtracting the PLCP len and adding the FCS.
7988          */
7989         len += (-D11_PHY_HDR_LEN + FCS_LEN);
7990         brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
7991
7992         if (suspend)
7993                 brcms_c_enable_mac(wlc);
7994 }
7995
7996 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
7997 {
7998         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
7999
8000         /* update AP or IBSS probe responses */
8001         if (bsscfg->up && !bsscfg->BSS)
8002                 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
8003 }
8004
8005 /* prepares pdu for transmission. returns BCM error codes */
8006 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
8007 {
8008         uint fifo;
8009         struct d11txh *txh;
8010         struct ieee80211_hdr *h;
8011         struct scb *scb;
8012
8013         txh = (struct d11txh *) (pdu->data);
8014         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
8015
8016         /* get the pkt queue info. This was put at brcms_c_sendctl or
8017          * brcms_c_send for PDU */
8018         fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
8019
8020         scb = NULL;
8021
8022         *fifop = fifo;
8023
8024         /* return if insufficient dma resources */
8025         if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
8026                 /* Mark precedences related to this FIFO, unsendable */
8027                 /* A fifo is full. Clear precedences related to that FIFO */
8028                 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
8029                 return -EBUSY;
8030         }
8031         return 0;
8032 }
8033
8034 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
8035                            uint *blocks)
8036 {
8037         if (fifo >= NFIFO)
8038                 return -EINVAL;
8039
8040         *blocks = wlc_hw->xmtfifo_sz[fifo];
8041
8042         return 0;
8043 }
8044
8045 void
8046 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
8047                   const u8 *addr)
8048 {
8049         brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
8050         if (match_reg_offset == RCM_BSSID_OFFSET)
8051                 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
8052 }
8053
8054 /*
8055  * Flag 'scan in progress' to withhold dynamic phy calibration
8056  */
8057 void brcms_c_scan_start(struct brcms_c_info *wlc)
8058 {
8059         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
8060 }
8061
8062 void brcms_c_scan_stop(struct brcms_c_info *wlc)
8063 {
8064         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
8065 }
8066
8067 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
8068 {
8069         wlc->pub->associated = state;
8070         wlc->bsscfg->associated = state;
8071 }
8072
8073 /*
8074  * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
8075  * AMPDU traffic, packets pending in hardware have to be invalidated so that
8076  * when later on hardware releases them, they can be handled appropriately.
8077  */
8078 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
8079                                struct ieee80211_sta *sta,
8080                                void (*dma_callback_fn))
8081 {
8082         struct dma_pub *dmah;
8083         int i;
8084         for (i = 0; i < NFIFO; i++) {
8085                 dmah = hw->di[i];
8086                 if (dmah != NULL)
8087                         dma_walk_packets(dmah, dma_callback_fn, sta);
8088         }
8089 }
8090
8091 int brcms_c_get_curband(struct brcms_c_info *wlc)
8092 {
8093         return wlc->band->bandunit;
8094 }
8095
8096 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
8097 {
8098         /* flush packet queue when requested */
8099         if (drop)
8100                 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
8101
8102         /* wait for queue and DMA fifos to run dry */
8103         while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0)
8104                 brcms_msleep(wlc->wl, 1);
8105 }
8106
8107 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
8108 {
8109         wlc->bcn_li_bcn = interval;
8110         if (wlc->pub->up)
8111                 brcms_c_bcn_li_upd(wlc);
8112 }
8113
8114 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
8115 {
8116         uint qdbm;
8117
8118         /* Remove override bit and clip to max qdbm value */
8119         qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
8120         return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8121 }
8122
8123 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8124 {
8125         uint qdbm;
8126         bool override;
8127
8128         wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8129
8130         /* Return qdbm units */
8131         return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8132 }
8133
8134 void brcms_c_set_radio_mpc(struct brcms_c_info *wlc)
8135 {
8136         brcms_c_radio_mpc_upd(wlc);
8137 }
8138
8139 /* Process received frames */
8140 /*
8141  * Return true if more frames need to be processed. false otherwise.
8142  * Param 'bound' indicates max. # frames to process before break out.
8143  */
8144 static void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8145 {
8146         struct d11rxhdr *rxh;
8147         struct ieee80211_hdr *h;
8148         uint len;
8149         bool is_amsdu;
8150
8151         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8152
8153         /* frame starts with rxhdr */
8154         rxh = (struct d11rxhdr *) (p->data);
8155
8156         /* strip off rxhdr */
8157         skb_pull(p, BRCMS_HWRXOFF);
8158
8159         /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8160         if (rxh->RxStatus1 & RXS_PBPRES) {
8161                 if (p->len < 2) {
8162                         wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8163                                   "len %d\n", wlc->pub->unit, p->len);
8164                         goto toss;
8165                 }
8166                 skb_pull(p, 2);
8167         }
8168
8169         h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8170         len = p->len;
8171
8172         if (rxh->RxStatus1 & RXS_FCSERR) {
8173                 if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) {
8174                         wiphy_err(wlc->wiphy, "FCSERR while scanning******* -"
8175                                   " tossing\n");
8176                         goto toss;
8177                 } else {
8178                         wiphy_err(wlc->wiphy, "RCSERR!!!\n");
8179                         goto toss;
8180                 }
8181         }
8182
8183         /* check received pkt has at least frame control field */
8184         if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8185                 goto toss;
8186
8187         /* not supporting A-MSDU */
8188         is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8189         if (is_amsdu)
8190                 goto toss;
8191
8192         brcms_c_recvctl(wlc, rxh, p);
8193         return;
8194
8195  toss:
8196         brcmu_pkt_buf_free_skb(p);
8197 }
8198
8199 /* Process received frames */
8200 /*
8201  * Return true if more frames need to be processed. false otherwise.
8202  * Param 'bound' indicates max. # frames to process before break out.
8203  */
8204 static bool
8205 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
8206 {
8207         struct sk_buff *p;
8208         struct sk_buff *head = NULL;
8209         struct sk_buff *tail = NULL;
8210         uint n = 0;
8211         uint bound_limit = bound ? RXBND : -1;
8212
8213         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
8214         /* gather received frames */
8215         while ((p = dma_rx(wlc_hw->di[fifo]))) {
8216
8217                 if (!tail)
8218                         head = tail = p;
8219                 else {
8220                         tail->prev = p;
8221                         tail = p;
8222                 }
8223
8224                 /* !give others some time to run! */
8225                 if (++n >= bound_limit)
8226                         break;
8227         }
8228
8229         /* post more rbufs */
8230         dma_rxfill(wlc_hw->di[fifo]);
8231
8232         /* process each frame */
8233         while ((p = head) != NULL) {
8234                 struct d11rxhdr_le *rxh_le;
8235                 struct d11rxhdr *rxh;
8236                 head = head->prev;
8237                 p->prev = NULL;
8238
8239                 rxh_le = (struct d11rxhdr_le *)p->data;
8240                 rxh = (struct d11rxhdr *)p->data;
8241
8242                 /* fixup rx header endianness */
8243                 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
8244                 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
8245                 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
8246                 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
8247                 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
8248                 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
8249                 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
8250                 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
8251                 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
8252                 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
8253                 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
8254
8255                 brcms_c_recv(wlc_hw->wlc, p);
8256         }
8257
8258         return n >= bound_limit;
8259 }
8260
8261 /* second-level interrupt processing
8262  *   Return true if another dpc needs to be re-scheduled. false otherwise.
8263  *   Param 'bounded' indicates if applicable loops should be bounded.
8264  */
8265 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
8266 {
8267         u32 macintstatus;
8268         struct brcms_hardware *wlc_hw = wlc->hw;
8269         struct d11regs __iomem *regs = wlc_hw->regs;
8270         struct wiphy *wiphy = wlc->wiphy;
8271
8272         if (brcms_deviceremoved(wlc)) {
8273                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
8274                           __func__);
8275                 brcms_down(wlc->wl);
8276                 return false;
8277         }
8278
8279         /* grab and clear the saved software intstatus bits */
8280         macintstatus = wlc->macintstatus;
8281         wlc->macintstatus = 0;
8282
8283         BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
8284                wlc_hw->unit, macintstatus);
8285
8286         WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
8287
8288         /* tx status */
8289         if (macintstatus & MI_TFS) {
8290                 bool fatal;
8291                 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
8292                         wlc->macintstatus |= MI_TFS;
8293                 if (fatal) {
8294                         wiphy_err(wiphy, "MI_TFS: fatal\n");
8295                         goto fatal;
8296                 }
8297         }
8298
8299         if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
8300                 brcms_c_tbtt(wlc);
8301
8302         /* ATIM window end */
8303         if (macintstatus & MI_ATIMWINEND) {
8304                 BCMMSG(wlc->wiphy, "end of ATIM window\n");
8305                 OR_REG(&regs->maccommand, wlc->qvalid);
8306                 wlc->qvalid = 0;
8307         }
8308
8309         /*
8310          * received data or control frame, MI_DMAINT is
8311          * indication of RX_FIFO interrupt
8312          */
8313         if (macintstatus & MI_DMAINT)
8314                 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
8315                         wlc->macintstatus |= MI_DMAINT;
8316
8317         /* noise sample collected */
8318         if (macintstatus & MI_BG_NOISE)
8319                 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
8320
8321         if (macintstatus & MI_GP0) {
8322                 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
8323                         "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
8324
8325                 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
8326                                         __func__, wlc_hw->sih->chip,
8327                                         wlc_hw->sih->chiprev);
8328                 brcms_fatal_error(wlc_hw->wlc->wl);
8329         }
8330
8331         /* gptimer timeout */
8332         if (macintstatus & MI_TO)
8333                 W_REG(&regs->gptimer, 0);
8334
8335         if (macintstatus & MI_RFDISABLE) {
8336                 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
8337                        " RF Disable Input\n", wlc_hw->unit);
8338                 brcms_rfkill_set_hw_state(wlc->wl);
8339         }
8340
8341         /* send any enq'd tx packets. Just makes sure to jump start tx */
8342         if (!pktq_empty(&wlc->pkt_queue->q))
8343                 brcms_c_send_q(wlc);
8344
8345         /* it isn't done and needs to be resched if macintstatus is non-zero */
8346         return wlc->macintstatus != 0;
8347
8348  fatal:
8349         brcms_fatal_error(wlc_hw->wlc->wl);
8350         return wlc->macintstatus != 0;
8351 }
8352
8353 void brcms_c_init(struct brcms_c_info *wlc)
8354 {
8355         struct d11regs __iomem *regs;
8356         u16 chanspec;
8357         bool mute = false;
8358
8359         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8360
8361         regs = wlc->regs;
8362
8363         /*
8364          * This will happen if a big-hammer was executed. In
8365          * that case, we want to go back to the channel that
8366          * we were on and not new channel
8367          */
8368         if (wlc->pub->associated)
8369                 chanspec = wlc->home_chanspec;
8370         else
8371                 chanspec = brcms_c_init_chanspec(wlc);
8372
8373         brcms_b_init(wlc->hw, chanspec, mute);
8374
8375         /* update beacon listen interval */
8376         brcms_c_bcn_li_upd(wlc);
8377
8378         /* write ethernet address to core */
8379         brcms_c_set_mac(wlc->bsscfg);
8380         brcms_c_set_bssid(wlc->bsscfg);
8381
8382         /* Update tsf_cfprep if associated and up */
8383         if (wlc->pub->associated && wlc->bsscfg->up) {
8384                 u32 bi;
8385
8386                 /* get beacon period and convert to uS */
8387                 bi = wlc->bsscfg->current_bss->beacon_period << 10;
8388                 /*
8389                  * update since init path would reset
8390                  * to default value
8391                  */
8392                 W_REG(&regs->tsf_cfprep,
8393                       (bi << CFPREP_CBI_SHIFT));
8394
8395                 /* Update maccontrol PM related bits */
8396                 brcms_c_set_ps_ctrl(wlc);
8397         }
8398
8399         brcms_c_bandinit_ordered(wlc, chanspec);
8400
8401         /* init probe response timeout */
8402         brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
8403
8404         /* init max burst txop (framebursting) */
8405         brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
8406                       (wlc->
8407                        _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
8408
8409         /* initialize maximum allowed duty cycle */
8410         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
8411         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
8412
8413         /*
8414          * Update some shared memory locations related to
8415          * max AMPDU size allowed to received
8416          */
8417         brcms_c_ampdu_shm_upd(wlc->ampdu);
8418
8419         /* band-specific inits */
8420         brcms_c_bsinit(wlc);
8421
8422         /* Enable EDCF mode (while the MAC is suspended) */
8423         OR_REG(&regs->ifs_ctl, IFS_USEEDCF);
8424         brcms_c_edcf_setparams(wlc, false);
8425
8426         /* Init precedence maps for empty FIFOs */
8427         brcms_c_tx_prec_map_init(wlc);
8428
8429         /* read the ucode version if we have not yet done so */
8430         if (wlc->ucode_rev == 0) {
8431                 wlc->ucode_rev =
8432                     brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
8433                 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
8434         }
8435
8436         /* ..now really unleash hell (allow the MAC out of suspend) */
8437         brcms_c_enable_mac(wlc);
8438
8439         /* clear tx flow control */
8440         brcms_c_txflowcontrol_reset(wlc);
8441
8442         /* enable the RF Disable Delay timer */
8443         W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT);
8444
8445         /* initialize mpc delay */
8446         wlc->mpc_delay_off = BRCMS_MPC_MIN_DELAYCNT;
8447
8448         /*
8449          * Initialize WME parameters; if they haven't been set by some other
8450          * mechanism (IOVar, etc) then read them from the hardware.
8451          */
8452         if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
8453                 /* Uninitialized; read from HW */
8454                 int ac;
8455
8456                 for (ac = 0; ac < AC_COUNT; ac++)
8457                         wlc->wme_retries[ac] =
8458                             brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
8459         }
8460 }
8461
8462 /*
8463  * The common driver entry routine. Error codes should be unique
8464  */
8465 struct brcms_c_info *
8466 brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
8467                bool piomode, void __iomem *regsva, struct pci_dev *btparam,
8468                uint *perr)
8469 {
8470         struct brcms_c_info *wlc;
8471         uint err = 0;
8472         uint i, j;
8473         struct brcms_pub *pub;
8474
8475         /* allocate struct brcms_c_info state and its substructures */
8476         wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device);
8477         if (wlc == NULL)
8478                 goto fail;
8479         wlc->wiphy = wl->wiphy;
8480         pub = wlc->pub;
8481
8482 #if defined(BCMDBG)
8483         wlc_info_dbg = wlc;
8484 #endif
8485
8486         wlc->band = wlc->bandstate[0];
8487         wlc->core = wlc->corestate;
8488         wlc->wl = wl;
8489         pub->unit = unit;
8490         pub->_piomode = piomode;
8491         wlc->bandinit_pending = false;
8492
8493         /* populate struct brcms_c_info with default values  */
8494         brcms_c_info_init(wlc, unit);
8495
8496         /* update sta/ap related parameters */
8497         brcms_c_ap_upd(wlc);
8498
8499         /*
8500          * low level attach steps(all hw accesses go
8501          * inside, no more in rest of the attach)
8502          */
8503         err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva,
8504                              btparam);
8505         if (err)
8506                 goto fail;
8507
8508         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
8509
8510         pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
8511
8512         /* disable allowed duty cycle */
8513         wlc->tx_duty_cycle_ofdm = 0;
8514         wlc->tx_duty_cycle_cck = 0;
8515
8516         brcms_c_stf_phy_chain_calc(wlc);
8517
8518         /* txchain 1: txant 0, txchain 2: txant 1 */
8519         if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
8520                 wlc->stf->txant = wlc->stf->hw_txchain - 1;
8521
8522         /* push to BMAC driver */
8523         wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
8524                                wlc->stf->hw_rxchain);
8525
8526         /* pull up some info resulting from the low attach */
8527         for (i = 0; i < NFIFO; i++)
8528                 wlc->core->txavail[i] = wlc->hw->txavail[i];
8529
8530         memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8531         memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
8532
8533         for (j = 0; j < wlc->pub->_nbands; j++) {
8534                 wlc->band = wlc->bandstate[j];
8535
8536                 if (!brcms_c_attach_stf_ant_init(wlc)) {
8537                         err = 24;
8538                         goto fail;
8539                 }
8540
8541                 /* default contention windows size limits */
8542                 wlc->band->CWmin = APHY_CWMIN;
8543                 wlc->band->CWmax = PHY_CWMAX;
8544
8545                 /* init gmode value */
8546                 if (wlc->band->bandtype == BRCM_BAND_2G) {
8547                         wlc->band->gmode = GMODE_AUTO;
8548                         brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
8549                                            wlc->band->gmode);
8550                 }
8551
8552                 /* init _n_enab supported mode */
8553                 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8554                         pub->_n_enab = SUPPORT_11N;
8555                         brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
8556                                                    ((pub->_n_enab ==
8557                                                      SUPPORT_11N) ? WL_11N_2x2 :
8558                                                     WL_11N_3x3));
8559                 }
8560
8561                 /* init per-band default rateset, depend on band->gmode */
8562                 brcms_default_rateset(wlc, &wlc->band->defrateset);
8563
8564                 /* fill in hw_rateset */
8565                 brcms_c_rateset_filter(&wlc->band->defrateset,
8566                                    &wlc->band->hw_rateset, false,
8567                                    BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
8568                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
8569         }
8570
8571         /*
8572          * update antenna config due to
8573          * wlc->stf->txant/txchain/ant_rx_ovr change
8574          */
8575         brcms_c_stf_phy_txant_upd(wlc);
8576
8577         /* attach each modules */
8578         err = brcms_c_attach_module(wlc);
8579         if (err != 0)
8580                 goto fail;
8581
8582         if (!brcms_c_timers_init(wlc, unit)) {
8583                 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
8584                           __func__);
8585                 err = 32;
8586                 goto fail;
8587         }
8588
8589         /* depend on rateset, gmode */
8590         wlc->cmi = brcms_c_channel_mgr_attach(wlc);
8591         if (!wlc->cmi) {
8592                 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
8593                           "\n", unit, __func__);
8594                 err = 33;
8595                 goto fail;
8596         }
8597
8598         /* init default when all parameters are ready, i.e. ->rateset */
8599         brcms_c_bss_default_init(wlc);
8600
8601         /*
8602          * Complete the wlc default state initializations..
8603          */
8604
8605         /* allocate our initial queue */
8606         wlc->pkt_queue = brcms_c_txq_alloc(wlc);
8607         if (wlc->pkt_queue == NULL) {
8608                 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
8609                           unit, __func__);
8610                 err = 100;
8611                 goto fail;
8612         }
8613
8614         wlc->bsscfg->wlc = wlc;
8615
8616         wlc->mimoft = FT_HT;
8617         wlc->mimo_40txbw = AUTO;
8618         wlc->ofdm_40txbw = AUTO;
8619         wlc->cck_40txbw = AUTO;
8620         brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
8621
8622         /* Set default values of SGI */
8623         if (BRCMS_SGI_CAP_PHY(wlc)) {
8624                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8625                                                BRCMS_N_SGI_40));
8626         } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
8627                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
8628                                                BRCMS_N_SGI_40));
8629         } else {
8630                 brcms_c_ht_update_sgi_rx(wlc, 0);
8631         }
8632
8633         /* initialize radio_mpc_disable according to wlc->mpc */
8634         brcms_c_radio_mpc_upd(wlc);
8635         brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
8636
8637         if (perr)
8638                 *perr = 0;
8639
8640         return wlc;
8641
8642  fail:
8643         wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
8644                   unit, __func__, err);
8645         if (wlc)
8646                 brcms_c_detach(wlc);
8647
8648         if (perr)
8649                 *perr = err;
8650         return NULL;
8651 }