drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/atomic.h>
  19 #include <linux/kernel.h>
  20 #include <linux/kthread.h>
  21 #include <linux/printk.h>
  22 #include <linux/pci_ids.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/sched/signal.h>
  26 #include <linux/mmc/sdio.h>
  27 #include <linux/mmc/sdio_ids.h>
  28 #include <linux/mmc/sdio_func.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/semaphore.h>
  31 #include <linux/firmware.h>
  32 #include <linux/module.h>
  33 #include <linux/bcma/bcma.h>
  34 #include <linux/debugfs.h>
  35 #include <linux/vmalloc.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio.h"
  43 #include "chip.h"
  44 #include "firmware.h"
  45 #include "core.h"
  46 #include "common.h"
  47 #include "bcdc.h"
  48
  49 #define DCMD_RESP_TIMEOUT       msecs_to_jiffies(2500)
  50 #define CTL_DONE_TIMEOUT        msecs_to_jiffies(2500)
  51
  52 #ifdef DEBUG
  53
  54 #define BRCMF_TRAP_INFO_SIZE    80
  55
  56 #define CBUF_LEN        (128)
  57
  58 /* Device console log buffer state */
  59 #define CONSOLE_BUFFER_MAX      2024
  60
  61 struct rte_log_le {
  62         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  63         __le32 buf_size;
  64         __le32 idx;
  65         char *_buf_compat;      /* Redundant pointer for backward compat. */
  66 };
  67
  68 struct rte_console {
  69         /* Virtual UART
  70          * When there is no UART (e.g. Quickturn),
  71          * the host should write a complete
  72          * input line directly into cbuf and then write
  73          * the length into vcons_in.
  74          * This may also be used when there is a real UART
  75          * (at risk of conflicting with
  76          * the real UART).  vcons_out is currently unused.
  77          */
  78         uint vcons_in;
  79         uint vcons_out;
  80
  81         /* Output (logging) buffer
  82          * Console output is written to a ring buffer log_buf at index log_idx.
  83          * The host may read the output when it sees log_idx advance.
  84          * Output will be lost if the output wraps around faster than the host
  85          * polls.
  86          */
  87         struct rte_log_le log_le;
  88
  89         /* Console input line buffer
  90          * Characters are read one at a time into cbuf
  91          * until <CR> is received, then
  92          * the buffer is processed as a command line.
  93          * Also used for virtual UART.
  94          */
  95         uint cbuf_idx;
  96         char cbuf[CBUF_LEN];
  97 };
  98
  99 #endif                          /* DEBUG */
 100 #include <chipcommon.h>
 101
 102 #include "bus.h"
 103 #include "debug.h"
 104 #include "tracepoint.h"
 105
 106 #define TXQLEN          2048    /* bulk tx queue length */
 107 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 108 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 109 #define PRIOMASK        7
 110
 111 #define TXRETRIES       2       /* # of retries for tx frames */
 112
 113 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 114                                  one scheduling */
 115
 116 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 117                                  one scheduling */
 118
 119 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 120
 121 #define MEMBLOCK        2048    /* Block size used for downloading
 122                                  of dongle image */
 123 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 124                                  biggest possible glom */
 125
 126 #define BRCMF_FIRSTREAD (1 << 6)
 127
 128 #define BRCMF_CONSOLE   10      /* watchdog interval to poll console */
 129
 130 /* SBSDIO_DEVICE_CTL */
 131
 132 /* 1: device will assert busy signal when receiving CMD53 */
 133 #define SBSDIO_DEVCTL_SETBUSY           0x01
 134 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 135 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 136 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 137 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 138 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 139  * sdio bus power cycle to clear (rev 9) */
 140 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 141 /* Force SD->SB reset mapping (rev 11) */
 142 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 143 /*   Determined by CoreControl bit */
 144 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 145 /*   Force backplane reset */
 146 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 147 /*   Force no backplane reset */
 148 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 149
 150 /* direct(mapped) cis space */
 151
 152 /* MAPPED common CIS address */
 153 #define SBSDIO_CIS_BASE_COMMON          0x1000
 154 /* maximum bytes in one CIS */
 155 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 156 /* cis offset addr is < 17 bits */
 157 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 158
 159 /* manfid tuple length, include tuple, link bytes */
 160 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 161
 162 #define CORE_BUS_REG(base, field) \
 163                 (base + offsetof(struct sdpcmd_regs, field))
 164
 165 /* SDIO function 1 register CHIPCLKCSR */
 166 /* Force ALP request to backplane */
 167 #define SBSDIO_FORCE_ALP                0x01
 168 /* Force HT request to backplane */
 169 #define SBSDIO_FORCE_HT                 0x02
 170 /* Force ILP request to backplane */
 171 #define SBSDIO_FORCE_ILP                0x04
 172 /* Make ALP ready (power up xtal) */
 173 #define SBSDIO_ALP_AVAIL_REQ            0x08
 174 /* Make HT ready (power up PLL) */
 175 #define SBSDIO_HT_AVAIL_REQ             0x10
 176 /* Squelch clock requests from HW */
 177 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 178 /* Status: ALP is ready */
 179 #define SBSDIO_ALP_AVAIL                0x40
 180 /* Status: HT is ready */
 181 #define SBSDIO_HT_AVAIL                 0x80
 182 #define SBSDIO_CSR_MASK                 0x1F
 183 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 184 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 185 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 186 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 187 #define SBSDIO_CLKAV(regval, alponly) \
 188         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 189
 190 /* intstatus */
 191 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 192 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 193 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 194 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 195 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 196 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 197 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 198 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 199 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 200 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 201 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 202 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 203 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 204 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 205 #define I_PC            (1 << 10)       /* descriptor error */
 206 #define I_PD            (1 << 11)       /* data error */
 207 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 208 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 209 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 210 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 211 #define I_RI            (1 << 16)       /* Receive Interrupt */
 212 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 213 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 214 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 215 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 216 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 217 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 218 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 219 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 220 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 221 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 222 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 223 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 224
 225 /* corecontrol */
 226 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 227 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 228 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 229 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 230 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 231 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 232
 233 /* SDA_FRAMECTRL */
 234 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 235 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 236 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 237 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 238
 239 /*
 240  * Software allocation of To SB Mailbox resources
 241  */
 242
 243 /* tosbmailbox bits corresponding to intstatus bits */
 244 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 245 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 246 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 247 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 248
 249 /* tosbmailboxdata */
 250 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 251
 252 /*
 253  * Software allocation of To Host Mailbox resources
 254  */
 255
 256 /* intstatus bits */
 257 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 258 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 259 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 260 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 261
 262 /* tohostmailboxdata */
 263 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 264 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 265 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 266 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 267
 268 #define HMB_DATA_FCDATA_MASK    0xff000000
 269 #define HMB_DATA_FCDATA_SHIFT   24
 270
 271 #define HMB_DATA_VERSION_MASK   0x00ff0000
 272 #define HMB_DATA_VERSION_SHIFT  16
 273
 274 /*
 275  * Software-defined protocol header
 276  */
 277
 278 /* Current protocol version */
 279 #define SDPCM_PROT_VERSION      4
 280
 281 /*
 282  * Shared structure between dongle and the host.
 283  * The structure contains pointers to trap or assert information.
 284  */
 285 #define SDPCM_SHARED_VERSION       0x0003
 286 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 287 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 288 #define SDPCM_SHARED_ASSERT        0x0200
 289 #define SDPCM_SHARED_TRAP          0x0400
 290
 291 /* Space for header read, limit for data packets */
 292 #define MAX_HDR_READ    (1 << 6)
 293 #define MAX_RX_DATASZ   2048
 294
 295 /* Bump up limit on waiting for HT to account for first startup;
 296  * if the image is doing a CRC calculation before programming the PMU
 297  * for HT availability, it could take a couple hundred ms more, so
 298  * max out at a 1 second (1000000us).
 299  */
 300 #undef PMU_MAX_TRANSITION_DLY
 301 #define PMU_MAX_TRANSITION_DLY 1000000
 302
 303 /* Value for ChipClockCSR during initial setup */
 304 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 305                                         SBSDIO_ALP_AVAIL_REQ)
 306
 307 /* Flags for SDH calls */
 308 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 309
 310 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 311                                          * when idle
 312                                          */
 313 #define BRCMF_IDLE_INTERVAL     1
 314
 315 #define KSO_WAIT_US 50
 316 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 317 #define BRCMF_SDIO_MAX_ACCESS_ERRORS    5
 318
 319 /*
 320  * Conversion of 802.1D priority to precedence level
 321  */
 322 static uint prio2prec(u32 prio)
 323 {
 324         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 325                (prio^2) : prio;
 326 }
 327
 328 #ifdef DEBUG
 329 /* Device console log buffer state */
 330 struct brcmf_console {
 331         uint count;             /* Poll interval msec counter */
 332         uint log_addr;          /* Log struct address (fixed) */
 333         struct rte_log_le log_le;       /* Log struct (host copy) */
 334         uint bufsize;           /* Size of log buffer */
 335         u8 *buf;                /* Log buffer (host copy) */
 336         uint last;              /* Last buffer read index */
 337 };
 338
 339 struct brcmf_trap_info {
 340         __le32          type;
 341         __le32          epc;
 342         __le32          cpsr;
 343         __le32          spsr;
 344         __le32          r0;     /* a1 */
 345         __le32          r1;     /* a2 */
 346         __le32          r2;     /* a3 */
 347         __le32          r3;     /* a4 */
 348         __le32          r4;     /* v1 */
 349         __le32          r5;     /* v2 */
 350         __le32          r6;     /* v3 */
 351         __le32          r7;     /* v4 */
 352         __le32          r8;     /* v5 */
 353         __le32          r9;     /* sb/v6 */
 354         __le32          r10;    /* sl/v7 */
 355         __le32          r11;    /* fp/v8 */
 356         __le32          r12;    /* ip */
 357         __le32          r13;    /* sp */
 358         __le32          r14;    /* lr */
 359         __le32          pc;     /* r15 */
 360 };
 361 #endif                          /* DEBUG */
 362
 363 struct sdpcm_shared {
 364         u32 flags;
 365         u32 trap_addr;
 366         u32 assert_exp_addr;
 367         u32 assert_file_addr;
 368         u32 assert_line;
 369         u32 console_addr;       /* Address of struct rte_console */
 370         u32 msgtrace_addr;
 371         u8 tag[32];
 372         u32 brpt_addr;
 373 };
 374
 375 struct sdpcm_shared_le {
 376         __le32 flags;
 377         __le32 trap_addr;
 378         __le32 assert_exp_addr;
 379         __le32 assert_file_addr;
 380         __le32 assert_line;
 381         __le32 console_addr;    /* Address of struct rte_console */
 382         __le32 msgtrace_addr;
 383         u8 tag[32];
 384         __le32 brpt_addr;
 385 };
 386
 387 /* dongle SDIO bus specific header info */
 388 struct brcmf_sdio_hdrinfo {
 389         u8 seq_num;
 390         u8 channel;
 391         u16 len;
 392         u16 len_left;
 393         u16 len_nxtfrm;
 394         u8 dat_offset;
 395         bool lastfrm;
 396         u16 tail_pad;
 397 };
 398
 399 /*
 400  * hold counter variables
 401  */
 402 struct brcmf_sdio_count {
 403         uint intrcount;         /* Count of device interrupt callbacks */
 404         uint lastintrs;         /* Count as of last watchdog timer */
 405         uint pollcnt;           /* Count of active polls */
 406         uint regfails;          /* Count of R_REG failures */
 407         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 408         uint fcqueued;          /* Tx packets that got queued */
 409         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 410         uint rx_toolong;        /* Receive frames too long to receive */
 411         uint rxc_errors;        /* SDIO errors when reading control frames */
 412         uint rx_hdrfail;        /* SDIO errors on header reads */
 413         uint rx_badhdr;         /* Bad received headers (roosync?) */
 414         uint rx_badseq;         /* Mismatched rx sequence number */
 415         uint fc_rcvd;           /* Number of flow-control events received */
 416         uint fc_xoff;           /* Number which turned on flow-control */
 417         uint fc_xon;            /* Number which turned off flow-control */
 418         uint rxglomfail;        /* Failed deglom attempts */
 419         uint rxglomframes;      /* Number of glom frames (superframes) */
 420         uint rxglompkts;        /* Number of packets from glom frames */
 421         uint f2rxhdrs;          /* Number of header reads */
 422         uint f2rxdata;          /* Number of frame data reads */
 423         uint f2txdata;          /* Number of f2 frame writes */
 424         uint f1regdata;         /* Number of f1 register accesses */
 425         uint tickcnt;           /* Number of watchdog been schedule */
 426         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 427         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 428         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 429         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 430         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 431 };
 432
 433 /* misc chip info needed by some of the routines */
 434 /* Private data for SDIO bus interaction */
 435 struct brcmf_sdio {
 436         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 437         struct brcmf_chip *ci;  /* Chip info struct */
 438
 439         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 440         atomic_t intstatus;     /* Intstatus bits (events) pending */
 441         atomic_t fcstate;       /* State of dongle flow-control */
 442
 443         uint blocksize;         /* Block size of SDIO transfers */
 444         uint roundup;           /* Max roundup limit */
 445
 446         struct pktq txq;        /* Queue length used for flow-control */
 447         u8 flowcontrol; /* per prio flow control bitmask */
 448         u8 tx_seq;              /* Transmit sequence number (next) */
 449         u8 tx_max;              /* Maximum transmit sequence allowed */
 450
 451         u8 *hdrbuf;             /* buffer for handling rx frame */
 452         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 453         u8 rx_seq;              /* Receive sequence number (expected) */
 454         struct brcmf_sdio_hdrinfo cur_read;
 455                                 /* info of current read frame */
 456         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 457         bool rxpending;         /* Data frame pending in dongle */
 458
 459         uint rxbound;           /* Rx frames to read before resched */
 460         uint txbound;           /* Tx frames to send before resched */
 461         uint txminmax;
 462
 463         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 464         struct sk_buff_head glom; /* Packet list for glommed superframe */
 465
 466         u8 *rxbuf;              /* Buffer for receiving control packets */
 467         uint rxblen;            /* Allocated length of rxbuf */
 468         u8 *rxctl;              /* Aligned pointer into rxbuf */
 469         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 470         uint rxlen;             /* Length of valid data in buffer */
 471         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 472
 473         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 474
 475         bool intr;              /* Use interrupts */
 476         bool poll;              /* Use polling */
 477         atomic_t ipend;         /* Device interrupt is pending */
 478         uint spurious;          /* Count of spurious interrupts */
 479         uint pollrate;          /* Ticks between device polls */
 480         uint polltick;          /* Tick counter */
 481
 482 #ifdef DEBUG
 483         uint console_interval;
 484         struct brcmf_console console;   /* Console output polling support */
 485         uint console_addr;      /* Console address from shared struct */
 486 #endif                          /* DEBUG */
 487
 488         uint clkstate;          /* State of sd and backplane clock(s) */
 489         s32 idletime;           /* Control for activity timeout */
 490         s32 idlecount;          /* Activity timeout counter */
 491         s32 idleclock;          /* How to set bus driver when idle */
 492         bool rxflow_mode;       /* Rx flow control mode */
 493         bool rxflow;            /* Is rx flow control on */
 494         bool alp_only;          /* Don't use HT clock (ALP only) */
 495
 496         u8 *ctrl_frame_buf;
 497         u16 ctrl_frame_len;
 498         bool ctrl_frame_stat;
 499         int ctrl_frame_err;
 500
 501         spinlock_t txq_lock;            /* protect bus->txq */
 502         wait_queue_head_t ctrl_wait;
 503         wait_queue_head_t dcmd_resp_wait;
 504
 505         struct timer_list timer;
 506         struct completion watchdog_wait;
 507         struct task_struct *watchdog_tsk;
 508         bool wd_active;
 509
 510         struct workqueue_struct *brcmf_wq;
 511         struct work_struct datawork;
 512         bool dpc_triggered;
 513         bool dpc_running;
 514
 515         bool txoff;             /* Transmit flow-controlled */
 516         struct brcmf_sdio_count sdcnt;
 517         bool sr_enabled; /* SaveRestore enabled */
 518         bool sleeping;
 519
 520         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 521         bool txglom;            /* host tx glomming enable flag */
 522         u16 head_align;         /* buffer pointer alignment */
 523         u16 sgentry_align;      /* scatter-gather buffer alignment */
 524 };
 525
 526 /* clkstate */
 527 #define CLK_NONE        0
 528 #define CLK_SDONLY      1
 529 #define CLK_PENDING     2
 530 #define CLK_AVAIL       3
 531
 532 #ifdef DEBUG
 533 static int qcount[NUMPRIO];
 534 #endif                          /* DEBUG */
 535
 536 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 537
 538 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 539
 540 /* Limit on rounding up frames */
 541 static const uint max_roundup = 512;
 542
 543 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
 544 #define ALIGNMENT  8
 545 #else
 546 #define ALIGNMENT  4
 547 #endif
 548
 549 enum brcmf_sdio_frmtype {
 550         BRCMF_SDIO_FT_NORMAL,
 551         BRCMF_SDIO_FT_SUPER,
 552         BRCMF_SDIO_FT_SUB,
 553 };
 554
 555 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 556
 557 /* SDIO Pad drive strength to select value mappings */
 558 struct sdiod_drive_str {
 559         u8 strength;    /* Pad Drive Strength in mA */
 560         u8 sel;         /* Chip-specific select value */
 561 };
 562
 563 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 564 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 565         {32, 0x6},
 566         {26, 0x7},
 567         {22, 0x4},
 568         {16, 0x5},
 569         {12, 0x2},
 570         {8, 0x3},
 571         {4, 0x0},
 572         {0, 0x1}
 573 };
 574
 575 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 576 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 577         {6, 0x7},
 578         {5, 0x6},
 579         {4, 0x5},
 580         {3, 0x4},
 581         {2, 0x2},
 582         {1, 0x1},
 583         {0, 0x0}
 584 };
 585
 586 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 587 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 588         {3, 0x3},
 589         {2, 0x2},
 590         {1, 0x1},
 591         {0, 0x0} };
 592
 593 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 594 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 595         {16, 0x7},
 596         {12, 0x5},
 597         {8,  0x3},
 598         {4,  0x1}
 599 };
 600
 601 BRCMF_FW_NVRAM_DEF(43143, "brcmfmac43143-sdio.bin", "brcmfmac43143-sdio.txt");
 602 BRCMF_FW_NVRAM_DEF(43241B0, "brcmfmac43241b0-sdio.bin",
 603                    "brcmfmac43241b0-sdio.txt");
 604 BRCMF_FW_NVRAM_DEF(43241B4, "brcmfmac43241b4-sdio.bin",
 605                    "brcmfmac43241b4-sdio.txt");
 606 BRCMF_FW_NVRAM_DEF(43241B5, "brcmfmac43241b5-sdio.bin",
 607                    "brcmfmac43241b5-sdio.txt");
 608 BRCMF_FW_NVRAM_DEF(4329, "brcmfmac4329-sdio.bin", "brcmfmac4329-sdio.txt");
 609 BRCMF_FW_NVRAM_DEF(4330, "brcmfmac4330-sdio.bin", "brcmfmac4330-sdio.txt");
 610 BRCMF_FW_NVRAM_DEF(4334, "brcmfmac4334-sdio.bin", "brcmfmac4334-sdio.txt");
 611 BRCMF_FW_NVRAM_DEF(43340, "brcmfmac43340-sdio.bin", "brcmfmac43340-sdio.txt");
 612 BRCMF_FW_NVRAM_DEF(4335, "brcmfmac4335-sdio.bin", "brcmfmac4335-sdio.txt");
 613 BRCMF_FW_NVRAM_DEF(43362, "brcmfmac43362-sdio.bin", "brcmfmac43362-sdio.txt");
 614 BRCMF_FW_NVRAM_DEF(4339, "brcmfmac4339-sdio.bin", "brcmfmac4339-sdio.txt");
 615 BRCMF_FW_NVRAM_DEF(43430, "brcmfmac43430-sdio.bin", "brcmfmac43430-sdio.txt");
 616 BRCMF_FW_NVRAM_DEF(43455, "brcmfmac43455-sdio.bin", "brcmfmac43455-sdio.txt");
 617 BRCMF_FW_NVRAM_DEF(4354, "brcmfmac4354-sdio.bin", "brcmfmac4354-sdio.txt");
 618 BRCMF_FW_NVRAM_DEF(4356, "brcmfmac4356-sdio.bin", "brcmfmac4356-sdio.txt");
 619
 620 static struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
 621         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
 622         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
 623         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
 624         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
 625         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
 626         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
 627         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
 628         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
 629         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),
 630         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, 4335),
 631         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, 43362),
 632         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, 4339),
 633         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43430_CHIP_ID, 0xFFFFFFFF, 43430),
 634         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4345_CHIP_ID, 0xFFFFFFC0, 43455),
 635         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, 4354),
 636         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4356_CHIP_ID, 0xFFFFFFFF, 4356)
 637 };
 638
 639 static void pkt_align(struct sk_buff *p, int len, int align)
 640 {
 641         uint datalign;
 642         datalign = (unsigned long)(p->data);
 643         datalign = roundup(datalign, (align)) - datalign;
 644         if (datalign)
 645                 skb_pull(p, datalign);
 646         __skb_trim(p, len);
 647 }
 648
 649 /* To check if there's window offered */
 650 static bool data_ok(struct brcmf_sdio *bus)
 651 {
 652         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 653                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 654 }
 655
 656 /*
 657  * Reads a register in the SDIO hardware block. This block occupies a series of
 658  * adresses on the 32 bit backplane bus.
 659  */
 660 static int r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 661 {
 662         struct brcmf_core *core;
 663         int ret;
 664
 665         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 666         *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
 667
 668         return ret;
 669 }
 670
 671 static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 672 {
 673         struct brcmf_core *core;
 674         int ret;
 675
 676         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 677         brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
 678
 679         return ret;
 680 }
 681
 682 static int
 683 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 684 {
 685         u8 wr_val = 0, rd_val, cmp_val, bmask;
 686         int err = 0;
 687         int err_cnt = 0;
 688         int try_cnt = 0;
 689
 690         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 691
 692         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 693         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 694         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 695                           wr_val, &err);
 696
 697         if (on) {
 698                 /* device WAKEUP through KSO:
 699                  * write bit 0 & read back until
 700                  * both bits 0 (kso bit) & 1 (dev on status) are set
 701                  */
 702                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 703                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 704                 bmask = cmp_val;
 705                 usleep_range(2000, 3000);
 706         } else {
 707                 /* Put device to sleep, turn off KSO */
 708                 cmp_val = 0;
 709                 /* only check for bit0, bit1(dev on status) may not
 710                  * get cleared right away
 711                  */
 712                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 713         }
 714
 715         do {
 716                 /* reliable KSO bit set/clr:
 717                  * the sdiod sleep write access is synced to PMU 32khz clk
 718                  * just one write attempt may fail,
 719                  * read it back until it matches written value
 720                  */
 721                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 722                                            &err);
 723                 if (!err) {
 724                         if ((rd_val & bmask) == cmp_val)
 725                                 break;
 726                         err_cnt = 0;
 727                 }
 728                 /* bail out upon subsequent access errors */
 729                 if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
 730                         break;
 731                 udelay(KSO_WAIT_US);
 732                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 733                                   wr_val, &err);
 734         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 735
 736         if (try_cnt > 2)
 737                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 738                           rd_val, err);
 739
 740         if (try_cnt > MAX_KSO_ATTEMPTS)
 741                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 742
 743         return err;
 744 }
 745
 746 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 747
 748 /* Turn backplane clock on or off */
 749 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 750 {
 751         int err;
 752         u8 clkctl, clkreq, devctl;
 753         unsigned long timeout;
 754
 755         brcmf_dbg(SDIO, "Enter\n");
 756
 757         clkctl = 0;
 758
 759         if (bus->sr_enabled) {
 760                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 761                 return 0;
 762         }
 763
 764         if (on) {
 765                 /* Request HT Avail */
 766                 clkreq =
 767                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 768
 769                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 770                                   clkreq, &err);
 771                 if (err) {
 772                         brcmf_err("HT Avail request error: %d\n", err);
 773                         return -EBADE;
 774                 }
 775
 776                 /* Check current status */
 777                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 778                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 779                 if (err) {
 780                         brcmf_err("HT Avail read error: %d\n", err);
 781                         return -EBADE;
 782                 }
 783
 784                 /* Go to pending and await interrupt if appropriate */
 785                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 786                         /* Allow only clock-available interrupt */
 787                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 788                                                    SBSDIO_DEVICE_CTL, &err);
 789                         if (err) {
 790                                 brcmf_err("Devctl error setting CA: %d\n",
 791                                           err);
 792                                 return -EBADE;
 793                         }
 794
 795                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 796                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 797                                           devctl, &err);
 798                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 799                         bus->clkstate = CLK_PENDING;
 800
 801                         return 0;
 802                 } else if (bus->clkstate == CLK_PENDING) {
 803                         /* Cancel CA-only interrupt filter */
 804                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 805                                                    SBSDIO_DEVICE_CTL, &err);
 806                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 807                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 808                                           devctl, &err);
 809                 }
 810
 811                 /* Otherwise, wait here (polling) for HT Avail */
 812                 timeout = jiffies +
 813                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 814                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 815                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 816                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 817                                                    &err);
 818                         if (time_after(jiffies, timeout))
 819                                 break;
 820                         else
 821                                 usleep_range(5000, 10000);
 822                 }
 823                 if (err) {
 824                         brcmf_err("HT Avail request error: %d\n", err);
 825                         return -EBADE;
 826                 }
 827                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 828                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 829                                   PMU_MAX_TRANSITION_DLY, clkctl);
 830                         return -EBADE;
 831                 }
 832
 833                 /* Mark clock available */
 834                 bus->clkstate = CLK_AVAIL;
 835                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 836
 837 #if defined(DEBUG)
 838                 if (!bus->alp_only) {
 839                         if (SBSDIO_ALPONLY(clkctl))
 840                                 brcmf_err("HT Clock should be on\n");
 841                 }
 842 #endif                          /* defined (DEBUG) */
 843
 844         } else {
 845                 clkreq = 0;
 846
 847                 if (bus->clkstate == CLK_PENDING) {
 848                         /* Cancel CA-only interrupt filter */
 849                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 850                                                    SBSDIO_DEVICE_CTL, &err);
 851                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 852                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 853                                           devctl, &err);
 854                 }
 855
 856                 bus->clkstate = CLK_SDONLY;
 857                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 858                                   clkreq, &err);
 859                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 860                 if (err) {
 861                         brcmf_err("Failed access turning clock off: %d\n",
 862                                   err);
 863                         return -EBADE;
 864                 }
 865         }
 866         return 0;
 867 }
 868
 869 /* Change idle/active SD state */
 870 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 871 {
 872         brcmf_dbg(SDIO, "Enter\n");
 873
 874         if (on)
 875                 bus->clkstate = CLK_SDONLY;
 876         else
 877                 bus->clkstate = CLK_NONE;
 878
 879         return 0;
 880 }
 881
 882 /* Transition SD and backplane clock readiness */
 883 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 884 {
 885 #ifdef DEBUG
 886         uint oldstate = bus->clkstate;
 887 #endif                          /* DEBUG */
 888
 889         brcmf_dbg(SDIO, "Enter\n");
 890
 891         /* Early exit if we're already there */
 892         if (bus->clkstate == target)
 893                 return 0;
 894
 895         switch (target) {
 896         case CLK_AVAIL:
 897                 /* Make sure SD clock is available */
 898                 if (bus->clkstate == CLK_NONE)
 899                         brcmf_sdio_sdclk(bus, true);
 900                 /* Now request HT Avail on the backplane */
 901                 brcmf_sdio_htclk(bus, true, pendok);
 902                 break;
 903
 904         case CLK_SDONLY:
 905                 /* Remove HT request, or bring up SD clock */
 906                 if (bus->clkstate == CLK_NONE)
 907                         brcmf_sdio_sdclk(bus, true);
 908                 else if (bus->clkstate == CLK_AVAIL)
 909                         brcmf_sdio_htclk(bus, false, false);
 910                 else
 911                         brcmf_err("request for %d -> %d\n",
 912                                   bus->clkstate, target);
 913                 break;
 914
 915         case CLK_NONE:
 916                 /* Make sure to remove HT request */
 917                 if (bus->clkstate == CLK_AVAIL)
 918                         brcmf_sdio_htclk(bus, false, false);
 919                 /* Now remove the SD clock */
 920                 brcmf_sdio_sdclk(bus, false);
 921                 break;
 922         }
 923 #ifdef DEBUG
 924         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 925 #endif                          /* DEBUG */
 926
 927         return 0;
 928 }
 929
 930 static int
 931 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 932 {
 933         int err = 0;
 934         u8 clkcsr;
 935
 936         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
 937                   (sleep ? "SLEEP" : "WAKE"),
 938                   (bus->sleeping ? "SLEEP" : "WAKE"));
 939
 940         /* If SR is enabled control bus state with KSO */
 941         if (bus->sr_enabled) {
 942                 /* Done if we're already in the requested state */
 943                 if (sleep == bus->sleeping)
 944                         goto end;
 945
 946                 /* Going to sleep */
 947                 if (sleep) {
 948                         clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
 949                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 950                                                    &err);
 951                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
 952                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
 953                                 brcmf_sdiod_regwb(bus->sdiodev,
 954                                                   SBSDIO_FUNC1_CHIPCLKCSR,
 955                                                   SBSDIO_ALP_AVAIL_REQ, &err);
 956                         }
 957                         err = brcmf_sdio_kso_control(bus, false);
 958                 } else {
 959                         err = brcmf_sdio_kso_control(bus, true);
 960                 }
 961                 if (err) {
 962                         brcmf_err("error while changing bus sleep state %d\n",
 963                                   err);
 964                         goto done;
 965                 }
 966         }
 967
 968 end:
 969         /* control clocks */
 970         if (sleep) {
 971                 if (!bus->sr_enabled)
 972                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 973         } else {
 974                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 975                 brcmf_sdio_wd_timer(bus, true);
 976         }
 977         bus->sleeping = sleep;
 978         brcmf_dbg(SDIO, "new state %s\n",
 979                   (sleep ? "SLEEP" : "WAKE"));
 980 done:
 981         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
 982         return err;
 983
 984 }
 985
 986 #ifdef DEBUG
 987 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
 988 {
 989         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
 990 }
 991
 992 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
 993                                  struct sdpcm_shared *sh)
 994 {
 995         u32 addr = 0;
 996         int rv;
 997         u32 shaddr = 0;
 998         struct sdpcm_shared_le sh_le;
 999         __le32 addr_le;
1000
1001         sdio_claim_host(bus->sdiodev->func[1]);
1002         brcmf_sdio_bus_sleep(bus, false, false);
1003
1004         /*
1005          * Read last word in socram to determine
1006          * address of sdpcm_shared structure
1007          */
1008         shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
1009         if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
1010                 shaddr -= bus->ci->srsize;
1011         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
1012                                (u8 *)&addr_le, 4);
1013         if (rv < 0)
1014                 goto fail;
1015
1016         /*
1017          * Check if addr is valid.
1018          * NVRAM length at the end of memory should have been overwritten.
1019          */
1020         addr = le32_to_cpu(addr_le);
1021         if (!brcmf_sdio_valid_shared_address(addr)) {
1022                 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1023                 rv = -EINVAL;
1024                 goto fail;
1025         }
1026
1027         brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1028
1029         /* Read hndrte_shared structure */
1030         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1031                                sizeof(struct sdpcm_shared_le));
1032         if (rv < 0)
1033                 goto fail;
1034
1035         sdio_release_host(bus->sdiodev->func[1]);
1036
1037         /* Endianness */
1038         sh->flags = le32_to_cpu(sh_le.flags);
1039         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1040         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1041         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1042         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1043         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1044         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1045
1046         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1047                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1048                           SDPCM_SHARED_VERSION,
1049                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1050                 return -EPROTO;
1051         }
1052         return 0;
1053
1054 fail:
1055         brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1056                   rv, addr);
1057         sdio_release_host(bus->sdiodev->func[1]);
1058         return rv;
1059 }
1060
1061 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1062 {
1063         struct sdpcm_shared sh;
1064
1065         if (brcmf_sdio_readshared(bus, &sh) == 0)
1066                 bus->console_addr = sh.console_addr;
1067 }
1068 #else
1069 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1070 {
1071 }
1072 #endif /* DEBUG */
1073
1074 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1075 {
1076         u32 intstatus = 0;
1077         u32 hmb_data;
1078         u8 fcbits;
1079         int ret;
1080
1081         brcmf_dbg(SDIO, "Enter\n");
1082
1083         /* Read mailbox data and ack that we did so */
1084         ret = r_sdreg32(bus, &hmb_data,
1085                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
1086
1087         if (ret == 0)
1088                 w_sdreg32(bus, SMB_INT_ACK,
1089                           offsetof(struct sdpcmd_regs, tosbmailbox));
1090         bus->sdcnt.f1regdata += 2;
1091
1092         /* Dongle recomposed rx frames, accept them again */
1093         if (hmb_data & HMB_DATA_NAKHANDLED) {
1094                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1095                           bus->rx_seq);
1096                 if (!bus->rxskip)
1097                         brcmf_err("unexpected NAKHANDLED!\n");
1098
1099                 bus->rxskip = false;
1100                 intstatus |= I_HMB_FRAME_IND;
1101         }
1102
1103         /*
1104          * DEVREADY does not occur with gSPI.
1105          */
1106         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1107                 bus->sdpcm_ver =
1108                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1109                     HMB_DATA_VERSION_SHIFT;
1110                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1111                         brcmf_err("Version mismatch, dongle reports %d, "
1112                                   "expecting %d\n",
1113                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1114                 else
1115                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1116                                   bus->sdpcm_ver);
1117
1118                 /*
1119                  * Retrieve console state address now that firmware should have
1120                  * updated it.
1121                  */
1122                 brcmf_sdio_get_console_addr(bus);
1123         }
1124
1125         /*
1126          * Flow Control has been moved into the RX headers and this out of band
1127          * method isn't used any more.
1128          * remaining backward compatible with older dongles.
1129          */
1130         if (hmb_data & HMB_DATA_FC) {
1131                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1132                                                         HMB_DATA_FCDATA_SHIFT;
1133
1134                 if (fcbits & ~bus->flowcontrol)
1135                         bus->sdcnt.fc_xoff++;
1136
1137                 if (bus->flowcontrol & ~fcbits)
1138                         bus->sdcnt.fc_xon++;
1139
1140                 bus->sdcnt.fc_rcvd++;
1141                 bus->flowcontrol = fcbits;
1142         }
1143
1144         /* Shouldn't be any others */
1145         if (hmb_data & ~(HMB_DATA_DEVREADY |
1146                          HMB_DATA_NAKHANDLED |
1147                          HMB_DATA_FC |
1148                          HMB_DATA_FWREADY |
1149                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1150                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1151                           hmb_data);
1152
1153         return intstatus;
1154 }
1155
1156 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1157 {
1158         uint retries = 0;
1159         u16 lastrbc;
1160         u8 hi, lo;
1161         int err;
1162
1163         brcmf_err("%sterminate frame%s\n",
1164                   abort ? "abort command, " : "",
1165                   rtx ? ", send NAK" : "");
1166
1167         if (abort)
1168                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1169
1170         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1171                           SFC_RF_TERM, &err);
1172         bus->sdcnt.f1regdata++;
1173
1174         /* Wait until the packet has been flushed (device/FIFO stable) */
1175         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1176                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1177                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1178                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1179                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1180                 bus->sdcnt.f1regdata += 2;
1181
1182                 if ((hi == 0) && (lo == 0))
1183                         break;
1184
1185                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1186                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1187                                   lastrbc, (hi << 8) + lo);
1188                 }
1189                 lastrbc = (hi << 8) + lo;
1190         }
1191
1192         if (!retries)
1193                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1194         else
1195                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1196
1197         if (rtx) {
1198                 bus->sdcnt.rxrtx++;
1199                 err = w_sdreg32(bus, SMB_NAK,
1200                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1201
1202                 bus->sdcnt.f1regdata++;
1203                 if (err == 0)
1204                         bus->rxskip = true;
1205         }
1206
1207         /* Clear partial in any case */
1208         bus->cur_read.len = 0;
1209 }
1210
1211 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1212 {
1213         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1214         u8 i, hi, lo;
1215
1216         /* On failure, abort the command and terminate the frame */
1217         brcmf_err("sdio error, abort command and terminate frame\n");
1218         bus->sdcnt.tx_sderrs++;
1219
1220         brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
1221         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1222         bus->sdcnt.f1regdata++;
1223
1224         for (i = 0; i < 3; i++) {
1225                 hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1226                 lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1227                 bus->sdcnt.f1regdata += 2;
1228                 if ((hi == 0) && (lo == 0))
1229                         break;
1230         }
1231 }
1232
1233 /* return total length of buffer chain */
1234 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1235 {
1236         struct sk_buff *p;
1237         uint total;
1238
1239         total = 0;
1240         skb_queue_walk(&bus->glom, p)
1241                 total += p->len;
1242         return total;
1243 }
1244
1245 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1246 {
1247         struct sk_buff *cur, *next;
1248
1249         skb_queue_walk_safe(&bus->glom, cur, next) {
1250                 skb_unlink(cur, &bus->glom);
1251                 brcmu_pkt_buf_free_skb(cur);
1252         }
1253 }
1254
1255 /**
1256  * brcmfmac sdio bus specific header
1257  * This is the lowest layer header wrapped on the packets transmitted between
1258  * host and WiFi dongle which contains information needed for SDIO core and
1259  * firmware
1260  *
1261  * It consists of 3 parts: hardware header, hardware extension header and
1262  * software header
1263  * hardware header (frame tag) - 4 bytes
1264  * Byte 0~1: Frame length
1265  * Byte 2~3: Checksum, bit-wise inverse of frame length
1266  * hardware extension header - 8 bytes
1267  * Tx glom mode only, N/A for Rx or normal Tx
1268  * Byte 0~1: Packet length excluding hw frame tag
1269  * Byte 2: Reserved
1270  * Byte 3: Frame flags, bit 0: last frame indication
1271  * Byte 4~5: Reserved
1272  * Byte 6~7: Tail padding length
1273  * software header - 8 bytes
1274  * Byte 0: Rx/Tx sequence number
1275  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1276  * Byte 2: Length of next data frame, reserved for Tx
1277  * Byte 3: Data offset
1278  * Byte 4: Flow control bits, reserved for Tx
1279  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1280  * Byte 6~7: Reserved
1281  */
1282 #define SDPCM_HWHDR_LEN                 4
1283 #define SDPCM_HWEXT_LEN                 8
1284 #define SDPCM_SWHDR_LEN                 8
1285 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1286 /* software header */
1287 #define SDPCM_SEQ_MASK                  0x000000ff
1288 #define SDPCM_SEQ_WRAP                  256
1289 #define SDPCM_CHANNEL_MASK              0x00000f00
1290 #define SDPCM_CHANNEL_SHIFT             8
1291 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1292 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1293 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1294 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1295 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1296 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1297 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1298 #define SDPCM_NEXTLEN_SHIFT             16
1299 #define SDPCM_DOFFSET_MASK              0xff000000
1300 #define SDPCM_DOFFSET_SHIFT             24
1301 #define SDPCM_FCMASK_MASK               0x000000ff
1302 #define SDPCM_WINDOW_MASK               0x0000ff00
1303 #define SDPCM_WINDOW_SHIFT              8
1304
1305 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1306 {
1307         u32 hdrvalue;
1308         hdrvalue = *(u32 *)swheader;
1309         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1310 }
1311
1312 static inline bool brcmf_sdio_fromevntchan(u8 *swheader)
1313 {
1314         u32 hdrvalue;
1315         u8 ret;
1316
1317         hdrvalue = *(u32 *)swheader;
1318         ret = (u8)((hdrvalue & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT);
1319
1320         return (ret == SDPCM_EVENT_CHANNEL);
1321 }
1322
1323 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1324                               struct brcmf_sdio_hdrinfo *rd,
1325                               enum brcmf_sdio_frmtype type)
1326 {
1327         u16 len, checksum;
1328         u8 rx_seq, fc, tx_seq_max;
1329         u32 swheader;
1330
1331         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1332
1333         /* hw header */
1334         len = get_unaligned_le16(header);
1335         checksum = get_unaligned_le16(header + sizeof(u16));
1336         /* All zero means no more to read */
1337         if (!(len | checksum)) {
1338                 bus->rxpending = false;
1339                 return -ENODATA;
1340         }
1341         if ((u16)(~(len ^ checksum))) {
1342                 brcmf_err("HW header checksum error\n");
1343                 bus->sdcnt.rx_badhdr++;
1344                 brcmf_sdio_rxfail(bus, false, false);
1345                 return -EIO;
1346         }
1347         if (len < SDPCM_HDRLEN) {
1348                 brcmf_err("HW header length error\n");
1349                 return -EPROTO;
1350         }
1351         if (type == BRCMF_SDIO_FT_SUPER &&
1352             (roundup(len, bus->blocksize) != rd->len)) {
1353                 brcmf_err("HW superframe header length error\n");
1354                 return -EPROTO;
1355         }
1356         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1357                 brcmf_err("HW subframe header length error\n");
1358                 return -EPROTO;
1359         }
1360         rd->len = len;
1361
1362         /* software header */
1363         header += SDPCM_HWHDR_LEN;
1364         swheader = le32_to_cpu(*(__le32 *)header);
1365         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1366                 brcmf_err("Glom descriptor found in superframe head\n");
1367                 rd->len = 0;
1368                 return -EINVAL;
1369         }
1370         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1371         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1372         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1373             type != BRCMF_SDIO_FT_SUPER) {
1374                 brcmf_err("HW header length too long\n");
1375                 bus->sdcnt.rx_toolong++;
1376                 brcmf_sdio_rxfail(bus, false, false);
1377                 rd->len = 0;
1378                 return -EPROTO;
1379         }
1380         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1381                 brcmf_err("Wrong channel for superframe\n");
1382                 rd->len = 0;
1383                 return -EINVAL;
1384         }
1385         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1386             rd->channel != SDPCM_EVENT_CHANNEL) {
1387                 brcmf_err("Wrong channel for subframe\n");
1388                 rd->len = 0;
1389                 return -EINVAL;
1390         }
1391         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1392         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1393                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1394                 bus->sdcnt.rx_badhdr++;
1395                 brcmf_sdio_rxfail(bus, false, false);
1396                 rd->len = 0;
1397                 return -ENXIO;
1398         }
1399         if (rd->seq_num != rx_seq) {
1400                 brcmf_dbg(SDIO, "seq %d, expected %d\n", rx_seq, rd->seq_num);
1401                 bus->sdcnt.rx_badseq++;
1402                 rd->seq_num = rx_seq;
1403         }
1404         /* no need to check the reset for subframe */
1405         if (type == BRCMF_SDIO_FT_SUB)
1406                 return 0;
1407         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1408         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1409                 /* only warm for NON glom packet */
1410                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1411                         brcmf_err("seq %d: next length error\n", rx_seq);
1412                 rd->len_nxtfrm = 0;
1413         }
1414         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1415         fc = swheader & SDPCM_FCMASK_MASK;
1416         if (bus->flowcontrol != fc) {
1417                 if (~bus->flowcontrol & fc)
1418                         bus->sdcnt.fc_xoff++;
1419                 if (bus->flowcontrol & ~fc)
1420                         bus->sdcnt.fc_xon++;
1421                 bus->sdcnt.fc_rcvd++;
1422                 bus->flowcontrol = fc;
1423         }
1424         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1425         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1426                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1427                 tx_seq_max = bus->tx_seq + 2;
1428         }
1429         bus->tx_max = tx_seq_max;
1430
1431         return 0;
1432 }
1433
1434 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1435 {
1436         *(__le16 *)header = cpu_to_le16(frm_length);
1437         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1438 }
1439
1440 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1441                               struct brcmf_sdio_hdrinfo *hd_info)
1442 {
1443         u32 hdrval;
1444         u8 hdr_offset;
1445
1446         brcmf_sdio_update_hwhdr(header, hd_info->len);
1447         hdr_offset = SDPCM_HWHDR_LEN;
1448
1449         if (bus->txglom) {
1450                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1451                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1452                 hdrval = (u16)hd_info->tail_pad << 16;
1453                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1454                 hdr_offset += SDPCM_HWEXT_LEN;
1455         }
1456
1457         hdrval = hd_info->seq_num;
1458         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1459                   SDPCM_CHANNEL_MASK;
1460         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1461                   SDPCM_DOFFSET_MASK;
1462         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1463         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1464         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1465 }
1466
1467 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1468 {
1469         u16 dlen, totlen;
1470         u8 *dptr, num = 0;
1471         u16 sublen;
1472         struct sk_buff *pfirst, *pnext;
1473
1474         int errcode;
1475         u8 doff, sfdoff;
1476
1477         struct brcmf_sdio_hdrinfo rd_new;
1478
1479         /* If packets, issue read(s) and send up packet chain */
1480         /* Return sequence numbers consumed? */
1481
1482         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1483                   bus->glomd, skb_peek(&bus->glom));
1484
1485         /* If there's a descriptor, generate the packet chain */
1486         if (bus->glomd) {
1487                 pfirst = pnext = NULL;
1488                 dlen = (u16) (bus->glomd->len);
1489                 dptr = bus->glomd->data;
1490                 if (!dlen || (dlen & 1)) {
1491                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1492                                   dlen);
1493                         dlen = 0;
1494                 }
1495
1496                 for (totlen = num = 0; dlen; num++) {
1497                         /* Get (and move past) next length */
1498                         sublen = get_unaligned_le16(dptr);
1499                         dlen -= sizeof(u16);
1500                         dptr += sizeof(u16);
1501                         if ((sublen < SDPCM_HDRLEN) ||
1502                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1503                                 brcmf_err("descriptor len %d bad: %d\n",
1504                                           num, sublen);
1505                                 pnext = NULL;
1506                                 break;
1507                         }
1508                         if (sublen % bus->sgentry_align) {
1509                                 brcmf_err("sublen %d not multiple of %d\n",
1510                                           sublen, bus->sgentry_align);
1511                         }
1512                         totlen += sublen;
1513
1514                         /* For last frame, adjust read len so total
1515                                  is a block multiple */
1516                         if (!dlen) {
1517                                 sublen +=
1518                                     (roundup(totlen, bus->blocksize) - totlen);
1519                                 totlen = roundup(totlen, bus->blocksize);
1520                         }
1521
1522                         /* Allocate/chain packet for next subframe */
1523                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1524                         if (pnext == NULL) {
1525                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1526                                           num, sublen);
1527                                 break;
1528                         }
1529                         skb_queue_tail(&bus->glom, pnext);
1530
1531                         /* Adhere to start alignment requirements */
1532                         pkt_align(pnext, sublen, bus->sgentry_align);
1533                 }
1534
1535                 /* If all allocations succeeded, save packet chain
1536                          in bus structure */
1537                 if (pnext) {
1538                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1539                                   totlen, num);
1540                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1541                             totlen != bus->cur_read.len) {
1542                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1543                                           bus->cur_read.len, totlen, rxseq);
1544                         }
1545                         pfirst = pnext = NULL;
1546                 } else {
1547                         brcmf_sdio_free_glom(bus);
1548                         num = 0;
1549                 }
1550
1551                 /* Done with descriptor packet */
1552                 brcmu_pkt_buf_free_skb(bus->glomd);
1553                 bus->glomd = NULL;
1554                 bus->cur_read.len = 0;
1555         }
1556
1557         /* Ok -- either we just generated a packet chain,
1558                  or had one from before */
1559         if (!skb_queue_empty(&bus->glom)) {
1560                 if (BRCMF_GLOM_ON()) {
1561                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1562                         skb_queue_walk(&bus->glom, pnext) {
1563                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1564                                           pnext, (u8 *) (pnext->data),
1565                                           pnext->len, pnext->len);
1566                         }
1567                 }
1568
1569                 pfirst = skb_peek(&bus->glom);
1570                 dlen = (u16) brcmf_sdio_glom_len(bus);
1571
1572                 /* Do an SDIO read for the superframe.  Configurable iovar to
1573                  * read directly into the chained packet, or allocate a large
1574                  * packet and and copy into the chain.
1575                  */
1576                 sdio_claim_host(bus->sdiodev->func[1]);
1577                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1578                                                  &bus->glom, dlen);
1579                 sdio_release_host(bus->sdiodev->func[1]);
1580                 bus->sdcnt.f2rxdata++;
1581
1582                 /* On failure, kill the superframe */
1583                 if (errcode < 0) {
1584                         brcmf_err("glom read of %d bytes failed: %d\n",
1585                                   dlen, errcode);
1586
1587                         sdio_claim_host(bus->sdiodev->func[1]);
1588                         brcmf_sdio_rxfail(bus, true, false);
1589                         bus->sdcnt.rxglomfail++;
1590                         brcmf_sdio_free_glom(bus);
1591                         sdio_release_host(bus->sdiodev->func[1]);
1592                         return 0;
1593                 }
1594
1595                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1596                                    pfirst->data, min_t(int, pfirst->len, 48),
1597                                    "SUPERFRAME:\n");
1598
1599                 rd_new.seq_num = rxseq;
1600                 rd_new.len = dlen;
1601                 sdio_claim_host(bus->sdiodev->func[1]);
1602                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1603                                              BRCMF_SDIO_FT_SUPER);
1604                 sdio_release_host(bus->sdiodev->func[1]);
1605                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1606
1607                 /* Remove superframe header, remember offset */
1608                 skb_pull(pfirst, rd_new.dat_offset);
1609                 sfdoff = rd_new.dat_offset;
1610                 num = 0;
1611
1612                 /* Validate all the subframe headers */
1613                 skb_queue_walk(&bus->glom, pnext) {
1614                         /* leave when invalid subframe is found */
1615                         if (errcode)
1616                                 break;
1617
1618                         rd_new.len = pnext->len;
1619                         rd_new.seq_num = rxseq++;
1620                         sdio_claim_host(bus->sdiodev->func[1]);
1621                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1622                                                      BRCMF_SDIO_FT_SUB);
1623                         sdio_release_host(bus->sdiodev->func[1]);
1624                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1625                                            pnext->data, 32, "subframe:\n");
1626
1627                         num++;
1628                 }
1629
1630                 if (errcode) {
1631                         /* Terminate frame on error */
1632                         sdio_claim_host(bus->sdiodev->func[1]);
1633                         brcmf_sdio_rxfail(bus, true, false);
1634                         bus->sdcnt.rxglomfail++;
1635                         brcmf_sdio_free_glom(bus);
1636                         sdio_release_host(bus->sdiodev->func[1]);
1637                         bus->cur_read.len = 0;
1638                         return 0;
1639                 }
1640
1641                 /* Basic SD framing looks ok - process each packet (header) */
1642
1643                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1644                         dptr = (u8 *) (pfirst->data);
1645                         sublen = get_unaligned_le16(dptr);
1646                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1647
1648                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1649                                            dptr, pfirst->len,
1650                                            "Rx Subframe Data:\n");
1651
1652                         __skb_trim(pfirst, sublen);
1653                         skb_pull(pfirst, doff);
1654
1655                         if (pfirst->len == 0) {
1656                                 skb_unlink(pfirst, &bus->glom);
1657                                 brcmu_pkt_buf_free_skb(pfirst);
1658                                 continue;
1659                         }
1660
1661                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1662                                            pfirst->data,
1663                                            min_t(int, pfirst->len, 32),
1664                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1665                                            bus->glom.qlen, pfirst, pfirst->data,
1666                                            pfirst->len, pfirst->next,
1667                                            pfirst->prev);
1668                         skb_unlink(pfirst, &bus->glom);
1669                         if (brcmf_sdio_fromevntchan(&dptr[SDPCM_HWHDR_LEN]))
1670                                 brcmf_rx_event(bus->sdiodev->dev, pfirst);
1671                         else
1672                                 brcmf_rx_frame(bus->sdiodev->dev, pfirst,
1673                                                false);
1674                         bus->sdcnt.rxglompkts++;
1675                 }
1676
1677                 bus->sdcnt.rxglomframes++;
1678         }
1679         return num;
1680 }
1681
1682 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1683                                      bool *pending)
1684 {
1685         DECLARE_WAITQUEUE(wait, current);
1686         int timeout = DCMD_RESP_TIMEOUT;
1687
1688         /* Wait until control frame is available */
1689         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1690         set_current_state(TASK_INTERRUPTIBLE);
1691
1692         while (!(*condition) && (!signal_pending(current) && timeout))
1693                 timeout = schedule_timeout(timeout);
1694
1695         if (signal_pending(current))
1696                 *pending = true;
1697
1698         set_current_state(TASK_RUNNING);
1699         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1700
1701         return timeout;
1702 }
1703
1704 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1705 {
1706         wake_up_interruptible(&bus->dcmd_resp_wait);
1707
1708         return 0;
1709 }
1710 static void
1711 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1712 {
1713         uint rdlen, pad;
1714         u8 *buf = NULL, *rbuf;
1715         int sdret;
1716
1717         brcmf_dbg(TRACE, "Enter\n");
1718
1719         if (bus->rxblen)
1720                 buf = vzalloc(bus->rxblen);
1721         if (!buf)
1722                 goto done;
1723
1724         rbuf = bus->rxbuf;
1725         pad = ((unsigned long)rbuf % bus->head_align);
1726         if (pad)
1727                 rbuf += (bus->head_align - pad);
1728
1729         /* Copy the already-read portion over */
1730         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1731         if (len <= BRCMF_FIRSTREAD)
1732                 goto gotpkt;
1733
1734         /* Raise rdlen to next SDIO block to avoid tail command */
1735         rdlen = len - BRCMF_FIRSTREAD;
1736         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1737                 pad = bus->blocksize - (rdlen % bus->blocksize);
1738                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1739                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1740                         rdlen += pad;
1741         } else if (rdlen % bus->head_align) {
1742                 rdlen += bus->head_align - (rdlen % bus->head_align);
1743         }
1744
1745         /* Drop if the read is too big or it exceeds our maximum */
1746         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1747                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1748                           rdlen, bus->sdiodev->bus_if->maxctl);
1749                 brcmf_sdio_rxfail(bus, false, false);
1750                 goto done;
1751         }
1752
1753         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1754                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1755                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1756                 bus->sdcnt.rx_toolong++;
1757                 brcmf_sdio_rxfail(bus, false, false);
1758                 goto done;
1759         }
1760
1761         /* Read remain of frame body */
1762         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1763         bus->sdcnt.f2rxdata++;
1764
1765         /* Control frame failures need retransmission */
1766         if (sdret < 0) {
1767                 brcmf_err("read %d control bytes failed: %d\n",
1768                           rdlen, sdret);
1769                 bus->sdcnt.rxc_errors++;
1770                 brcmf_sdio_rxfail(bus, true, true);
1771                 goto done;
1772         } else
1773                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1774
1775 gotpkt:
1776
1777         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1778                            buf, len, "RxCtrl:\n");
1779
1780         /* Point to valid data and indicate its length */
1781         spin_lock_bh(&bus->rxctl_lock);
1782         if (bus->rxctl) {
1783                 brcmf_err("last control frame is being processed.\n");
1784                 spin_unlock_bh(&bus->rxctl_lock);
1785                 vfree(buf);
1786                 goto done;
1787         }
1788         bus->rxctl = buf + doff;
1789         bus->rxctl_orig = buf;
1790         bus->rxlen = len - doff;
1791         spin_unlock_bh(&bus->rxctl_lock);
1792
1793 done:
1794         /* Awake any waiters */
1795         brcmf_sdio_dcmd_resp_wake(bus);
1796 }
1797
1798 /* Pad read to blocksize for efficiency */
1799 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1800 {
1801         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1802                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1803                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1804                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1805                         *rdlen += *pad;
1806         } else if (*rdlen % bus->head_align) {
1807                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1808         }
1809 }
1810
1811 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1812 {
1813         struct sk_buff *pkt;            /* Packet for event or data frames */
1814         u16 pad;                /* Number of pad bytes to read */
1815         uint rxleft = 0;        /* Remaining number of frames allowed */
1816         int ret;                /* Return code from calls */
1817         uint rxcount = 0;       /* Total frames read */
1818         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1819         u8 head_read = 0;
1820
1821         brcmf_dbg(TRACE, "Enter\n");
1822
1823         /* Not finished unless we encounter no more frames indication */
1824         bus->rxpending = true;
1825
1826         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1827              !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1828              rd->seq_num++, rxleft--) {
1829
1830                 /* Handle glomming separately */
1831                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1832                         u8 cnt;
1833                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1834                                   bus->glomd, skb_peek(&bus->glom));
1835                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1836                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1837                         rd->seq_num += cnt - 1;
1838                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1839                         continue;
1840                 }
1841
1842                 rd->len_left = rd->len;
1843                 /* read header first for unknow frame length */
1844                 sdio_claim_host(bus->sdiodev->func[1]);
1845                 if (!rd->len) {
1846                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1847                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1848                         bus->sdcnt.f2rxhdrs++;
1849                         if (ret < 0) {
1850                                 brcmf_err("RXHEADER FAILED: %d\n",
1851                                           ret);
1852                                 bus->sdcnt.rx_hdrfail++;
1853                                 brcmf_sdio_rxfail(bus, true, true);
1854                                 sdio_release_host(bus->sdiodev->func[1]);
1855                                 continue;
1856                         }
1857
1858                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1859                                            bus->rxhdr, SDPCM_HDRLEN,
1860                                            "RxHdr:\n");
1861
1862                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1863                                                BRCMF_SDIO_FT_NORMAL)) {
1864                                 sdio_release_host(bus->sdiodev->func[1]);
1865                                 if (!bus->rxpending)
1866                                         break;
1867                                 else
1868                                         continue;
1869                         }
1870
1871                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1872                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1873                                                         rd->len,
1874                                                         rd->dat_offset);
1875                                 /* prepare the descriptor for the next read */
1876                                 rd->len = rd->len_nxtfrm << 4;
1877                                 rd->len_nxtfrm = 0;
1878                                 /* treat all packet as event if we don't know */
1879                                 rd->channel = SDPCM_EVENT_CHANNEL;
1880                                 sdio_release_host(bus->sdiodev->func[1]);
1881                                 continue;
1882                         }
1883                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1884                                        rd->len - BRCMF_FIRSTREAD : 0;
1885                         head_read = BRCMF_FIRSTREAD;
1886                 }
1887
1888                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1889
1890                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1891                                             bus->head_align);
1892                 if (!pkt) {
1893                         /* Give up on data, request rtx of events */
1894                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1895                         brcmf_sdio_rxfail(bus, false,
1896                                             RETRYCHAN(rd->channel));
1897                         sdio_release_host(bus->sdiodev->func[1]);
1898                         continue;
1899                 }
1900                 skb_pull(pkt, head_read);
1901                 pkt_align(pkt, rd->len_left, bus->head_align);
1902
1903                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1904                 bus->sdcnt.f2rxdata++;
1905                 sdio_release_host(bus->sdiodev->func[1]);
1906
1907                 if (ret < 0) {
1908                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1909                                   rd->len, rd->channel, ret);
1910                         brcmu_pkt_buf_free_skb(pkt);
1911                         sdio_claim_host(bus->sdiodev->func[1]);
1912                         brcmf_sdio_rxfail(bus, true,
1913                                             RETRYCHAN(rd->channel));
1914                         sdio_release_host(bus->sdiodev->func[1]);
1915                         continue;
1916                 }
1917
1918                 if (head_read) {
1919                         skb_push(pkt, head_read);
1920                         memcpy(pkt->data, bus->rxhdr, head_read);
1921                         head_read = 0;
1922                 } else {
1923                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1924                         rd_new.seq_num = rd->seq_num;
1925                         sdio_claim_host(bus->sdiodev->func[1]);
1926                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1927                                                BRCMF_SDIO_FT_NORMAL)) {
1928                                 rd->len = 0;
1929                                 brcmu_pkt_buf_free_skb(pkt);
1930                         }
1931                         bus->sdcnt.rx_readahead_cnt++;
1932                         if (rd->len != roundup(rd_new.len, 16)) {
1933                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1934                                           rd->len,
1935                                           roundup(rd_new.len, 16) >> 4);
1936                                 rd->len = 0;
1937                                 brcmf_sdio_rxfail(bus, true, true);
1938                                 sdio_release_host(bus->sdiodev->func[1]);
1939                                 brcmu_pkt_buf_free_skb(pkt);
1940                                 continue;
1941                         }
1942                         sdio_release_host(bus->sdiodev->func[1]);
1943                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1944                         rd->channel = rd_new.channel;
1945                         rd->dat_offset = rd_new.dat_offset;
1946
1947                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1948                                              BRCMF_DATA_ON()) &&
1949                                            BRCMF_HDRS_ON(),
1950                                            bus->rxhdr, SDPCM_HDRLEN,
1951                                            "RxHdr:\n");
1952
1953                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1954                                 brcmf_err("readahead on control packet %d?\n",
1955                                           rd_new.seq_num);
1956                                 /* Force retry w/normal header read */
1957                                 rd->len = 0;
1958                                 sdio_claim_host(bus->sdiodev->func[1]);
1959                                 brcmf_sdio_rxfail(bus, false, true);
1960                                 sdio_release_host(bus->sdiodev->func[1]);
1961                                 brcmu_pkt_buf_free_skb(pkt);
1962                                 continue;
1963                         }
1964                 }
1965
1966                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1967                                    pkt->data, rd->len, "Rx Data:\n");
1968
1969                 /* Save superframe descriptor and allocate packet frame */
1970                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1971                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1972                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1973                                           rd->len);
1974                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1975                                                    pkt->data, rd->len,
1976                                                    "Glom Data:\n");
1977                                 __skb_trim(pkt, rd->len);
1978                                 skb_pull(pkt, SDPCM_HDRLEN);
1979                                 bus->glomd = pkt;
1980                         } else {
1981                                 brcmf_err("%s: glom superframe w/o "
1982                                           "descriptor!\n", __func__);
1983                                 sdio_claim_host(bus->sdiodev->func[1]);
1984                                 brcmf_sdio_rxfail(bus, false, false);
1985                                 sdio_release_host(bus->sdiodev->func[1]);
1986                         }
1987                         /* prepare the descriptor for the next read */
1988                         rd->len = rd->len_nxtfrm << 4;
1989                         rd->len_nxtfrm = 0;
1990                         /* treat all packet as event if we don't know */
1991                         rd->channel = SDPCM_EVENT_CHANNEL;
1992                         continue;
1993                 }
1994
1995                 /* Fill in packet len and prio, deliver upward */
1996                 __skb_trim(pkt, rd->len);
1997                 skb_pull(pkt, rd->dat_offset);
1998
1999                 if (pkt->len == 0)
2000                         brcmu_pkt_buf_free_skb(pkt);
2001                 else if (rd->channel == SDPCM_EVENT_CHANNEL)
2002                         brcmf_rx_event(bus->sdiodev->dev, pkt);
2003                 else
2004                         brcmf_rx_frame(bus->sdiodev->dev, pkt,
2005                                        false);
2006
2007                 /* prepare the descriptor for the next read */
2008                 rd->len = rd->len_nxtfrm << 4;
2009                 rd->len_nxtfrm = 0;
2010                 /* treat all packet as event if we don't know */
2011                 rd->channel = SDPCM_EVENT_CHANNEL;
2012         }
2013
2014         rxcount = maxframes - rxleft;
2015         /* Message if we hit the limit */
2016         if (!rxleft)
2017                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2018         else
2019                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2020         /* Back off rxseq if awaiting rtx, update rx_seq */
2021         if (bus->rxskip)
2022                 rd->seq_num--;
2023         bus->rx_seq = rd->seq_num;
2024
2025         return rxcount;
2026 }
2027
2028 static void
2029 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2030 {
2031         wake_up_interruptible(&bus->ctrl_wait);
2032         return;
2033 }
2034
2035 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2036 {
2037         u16 head_pad;
2038         u8 *dat_buf;
2039
2040         dat_buf = (u8 *)(pkt->data);
2041
2042         /* Check head padding */
2043         head_pad = ((unsigned long)dat_buf % bus->head_align);
2044         if (head_pad) {
2045                 if (skb_headroom(pkt) < head_pad) {
2046                         bus->sdiodev->bus_if->tx_realloc++;
2047                         head_pad = 0;
2048                         if (skb_cow(pkt, head_pad))
2049                                 return -ENOMEM;
2050                 }
2051                 skb_push(pkt, head_pad);
2052                 dat_buf = (u8 *)(pkt->data);
2053                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2054         }
2055         return head_pad;
2056 }
2057
2058 /**
2059  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2060  * bus layer usage.
2061  */
2062 /* flag marking a dummy skb added for DMA alignment requirement */
2063 #define ALIGN_SKB_FLAG          0x8000
2064 /* bit mask of data length chopped from the previous packet */
2065 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2066
2067 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2068                                     struct sk_buff_head *pktq,
2069                                     struct sk_buff *pkt, u16 total_len)
2070 {
2071         struct brcmf_sdio_dev *sdiodev;
2072         struct sk_buff *pkt_pad;
2073         u16 tail_pad, tail_chop, chain_pad;
2074         unsigned int blksize;
2075         bool lastfrm;
2076         int ntail, ret;
2077
2078         sdiodev = bus->sdiodev;
2079         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
2080         /* sg entry alignment should be a divisor of block size */
2081         WARN_ON(blksize % bus->sgentry_align);
2082
2083         /* Check tail padding */
2084         lastfrm = skb_queue_is_last(pktq, pkt);
2085         tail_pad = 0;
2086         tail_chop = pkt->len % bus->sgentry_align;
2087         if (tail_chop)
2088                 tail_pad = bus->sgentry_align - tail_chop;
2089         chain_pad = (total_len + tail_pad) % blksize;
2090         if (lastfrm && chain_pad)
2091                 tail_pad += blksize - chain_pad;
2092         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2093                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2094                                                 bus->head_align);
2095                 if (pkt_pad == NULL)
2096                         return -ENOMEM;
2097                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2098                 if (unlikely(ret < 0)) {
2099                         kfree_skb(pkt_pad);
2100                         return ret;
2101                 }
2102                 memcpy(pkt_pad->data,
2103                        pkt->data + pkt->len - tail_chop,
2104                        tail_chop);
2105                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2106                 skb_trim(pkt, pkt->len - tail_chop);
2107                 skb_trim(pkt_pad, tail_pad + tail_chop);
2108                 __skb_queue_after(pktq, pkt, pkt_pad);
2109         } else {
2110                 ntail = pkt->data_len + tail_pad -
2111                         (pkt->end - pkt->tail);
2112                 if (skb_cloned(pkt) || ntail > 0)
2113                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2114                                 return -ENOMEM;
2115                 if (skb_linearize(pkt))
2116                         return -ENOMEM;
2117                 __skb_put(pkt, tail_pad);
2118         }
2119
2120         return tail_pad;
2121 }
2122
2123 /**
2124  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2125  * @bus: brcmf_sdio structure pointer
2126  * @pktq: packet list pointer
2127  * @chan: virtual channel to transmit the packet
2128  *
2129  * Processes to be applied to the packet
2130  *      - Align data buffer pointer
2131  *      - Align data buffer length
2132  *      - Prepare header
2133  * Return: negative value if there is error
2134  */
2135 static int
2136 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2137                       uint chan)
2138 {
2139         u16 head_pad, total_len;
2140         struct sk_buff *pkt_next;
2141         u8 txseq;
2142         int ret;
2143         struct brcmf_sdio_hdrinfo hd_info = {0};
2144
2145         txseq = bus->tx_seq;
2146         total_len = 0;
2147         skb_queue_walk(pktq, pkt_next) {
2148                 /* alignment packet inserted in previous
2149                  * loop cycle can be skipped as it is
2150                  * already properly aligned and does not
2151                  * need an sdpcm header.
2152                  */
2153                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2154                         continue;
2155
2156                 /* align packet data pointer */
2157                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2158                 if (ret < 0)
2159                         return ret;
2160                 head_pad = (u16)ret;
2161                 if (head_pad)
2162                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2163
2164                 total_len += pkt_next->len;
2165
2166                 hd_info.len = pkt_next->len;
2167                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2168                 if (bus->txglom && pktq->qlen > 1) {
2169                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2170                                                        pkt_next, total_len);
2171                         if (ret < 0)
2172                                 return ret;
2173                         hd_info.tail_pad = (u16)ret;
2174                         total_len += (u16)ret;
2175                 }
2176
2177                 hd_info.channel = chan;
2178                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2179                 hd_info.seq_num = txseq++;
2180
2181                 /* Now fill the header */
2182                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2183
2184                 if (BRCMF_BYTES_ON() &&
2185                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2186                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2187                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2188                                            "Tx Frame:\n");
2189                 else if (BRCMF_HDRS_ON())
2190                         brcmf_dbg_hex_dump(true, pkt_next->data,
2191                                            head_pad + bus->tx_hdrlen,
2192                                            "Tx Header:\n");
2193         }
2194         /* Hardware length tag of the first packet should be total
2195          * length of the chain (including padding)
2196          */
2197         if (bus->txglom)
2198                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2199         return 0;
2200 }
2201
2202 /**
2203  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2204  * @bus: brcmf_sdio structure pointer
2205  * @pktq: packet list pointer
2206  *
2207  * Processes to be applied to the packet
2208  *      - Remove head padding
2209  *      - Remove tail padding
2210  */
2211 static void
2212 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2213 {
2214         u8 *hdr;
2215         u32 dat_offset;
2216         u16 tail_pad;
2217         u16 dummy_flags, chop_len;
2218         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2219
2220         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2221                 dummy_flags = *(u16 *)(pkt_next->cb);
2222                 if (dummy_flags & ALIGN_SKB_FLAG) {
2223                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2224                         if (chop_len) {
2225                                 pkt_prev = pkt_next->prev;
2226                                 skb_put(pkt_prev, chop_len);
2227                         }
2228                         __skb_unlink(pkt_next, pktq);
2229                         brcmu_pkt_buf_free_skb(pkt_next);
2230                 } else {
2231                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2232                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2233                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2234                                      SDPCM_DOFFSET_SHIFT;
2235                         skb_pull(pkt_next, dat_offset);
2236                         if (bus->txglom) {
2237                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2238                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2239                         }
2240                 }
2241         }
2242 }
2243
2244 /* Writes a HW/SW header into the packet and sends it. */
2245 /* Assumes: (a) header space already there, (b) caller holds lock */
2246 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2247                             uint chan)
2248 {
2249         int ret;
2250         struct sk_buff *pkt_next, *tmp;
2251
2252         brcmf_dbg(TRACE, "Enter\n");
2253
2254         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2255         if (ret)
2256                 goto done;
2257
2258         sdio_claim_host(bus->sdiodev->func[1]);
2259         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2260         bus->sdcnt.f2txdata++;
2261
2262         if (ret < 0)
2263                 brcmf_sdio_txfail(bus);
2264
2265         sdio_release_host(bus->sdiodev->func[1]);
2266
2267 done:
2268         brcmf_sdio_txpkt_postp(bus, pktq);
2269         if (ret == 0)
2270                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2271         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2272                 __skb_unlink(pkt_next, pktq);
2273                 brcmf_proto_bcdc_txcomplete(bus->sdiodev->dev, pkt_next,
2274                                             ret == 0);
2275         }
2276         return ret;
2277 }
2278
2279 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2280 {
2281         struct sk_buff *pkt;
2282         struct sk_buff_head pktq;
2283         u32 intstatus = 0;
2284         int ret = 0, prec_out, i;
2285         uint cnt = 0;
2286         u8 tx_prec_map, pkt_num;
2287
2288         brcmf_dbg(TRACE, "Enter\n");
2289
2290         tx_prec_map = ~bus->flowcontrol;
2291
2292         /* Send frames until the limit or some other event */
2293         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2294                 pkt_num = 1;
2295                 if (bus->txglom)
2296                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2297                                         bus->sdiodev->txglomsz);
2298                 pkt_num = min_t(u32, pkt_num,
2299                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2300                 __skb_queue_head_init(&pktq);
2301                 spin_lock_bh(&bus->txq_lock);
2302                 for (i = 0; i < pkt_num; i++) {
2303                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2304                                               &prec_out);
2305                         if (pkt == NULL)
2306                                 break;
2307                         __skb_queue_tail(&pktq, pkt);
2308                 }
2309                 spin_unlock_bh(&bus->txq_lock);
2310                 if (i == 0)
2311                         break;
2312
2313                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2314
2315                 cnt += i;
2316
2317                 /* In poll mode, need to check for other events */
2318                 if (!bus->intr) {
2319                         /* Check device status, signal pending interrupt */
2320                         sdio_claim_host(bus->sdiodev->func[1]);
2321                         ret = r_sdreg32(bus, &intstatus,
2322                                         offsetof(struct sdpcmd_regs,
2323                                                  intstatus));
2324                         sdio_release_host(bus->sdiodev->func[1]);
2325                         bus->sdcnt.f2txdata++;
2326                         if (ret != 0)
2327                                 break;
2328                         if (intstatus & bus->hostintmask)
2329                                 atomic_set(&bus->ipend, 1);
2330                 }
2331         }
2332
2333         /* Deflow-control stack if needed */
2334         if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2335             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2336                 bus->txoff = false;
2337                 brcmf_proto_bcdc_txflowblock(bus->sdiodev->dev, false);
2338         }
2339
2340         return cnt;
2341 }
2342
2343 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2344 {
2345         u8 doff;
2346         u16 pad;
2347         uint retries = 0;
2348         struct brcmf_sdio_hdrinfo hd_info = {0};
2349         int ret;
2350
2351         brcmf_dbg(TRACE, "Enter\n");
2352
2353         /* Back the pointer to make room for bus header */
2354         frame -= bus->tx_hdrlen;
2355         len += bus->tx_hdrlen;
2356
2357         /* Add alignment padding (optional for ctl frames) */
2358         doff = ((unsigned long)frame % bus->head_align);
2359         if (doff) {
2360                 frame -= doff;
2361                 len += doff;
2362                 memset(frame + bus->tx_hdrlen, 0, doff);
2363         }
2364
2365         /* Round send length to next SDIO block */
2366         pad = 0;
2367         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2368                 pad = bus->blocksize - (len % bus->blocksize);
2369                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2370                         pad = 0;
2371         } else if (len % bus->head_align) {
2372                 pad = bus->head_align - (len % bus->head_align);
2373         }
2374         len += pad;
2375
2376         hd_info.len = len - pad;
2377         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2378         hd_info.dat_offset = doff + bus->tx_hdrlen;
2379         hd_info.seq_num = bus->tx_seq;
2380         hd_info.lastfrm = true;
2381         hd_info.tail_pad = pad;
2382         brcmf_sdio_hdpack(bus, frame, &hd_info);
2383
2384         if (bus->txglom)
2385                 brcmf_sdio_update_hwhdr(frame, len);
2386
2387         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2388                            frame, len, "Tx Frame:\n");
2389         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2390                            BRCMF_HDRS_ON(),
2391                            frame, min_t(u16, len, 16), "TxHdr:\n");
2392
2393         do {
2394                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2395
2396                 if (ret < 0)
2397                         brcmf_sdio_txfail(bus);
2398                 else
2399                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2400         } while (ret < 0 && retries++ < TXRETRIES);
2401
2402         return ret;
2403 }
2404
2405 static void brcmf_sdio_bus_stop(struct device *dev)
2406 {
2407         u32 local_hostintmask;
2408         u8 saveclk;
2409         int err;
2410         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2411         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2412         struct brcmf_sdio *bus = sdiodev->bus;
2413
2414         brcmf_dbg(TRACE, "Enter\n");
2415
2416         if (bus->watchdog_tsk) {
2417                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2418                 kthread_stop(bus->watchdog_tsk);
2419                 bus->watchdog_tsk = NULL;
2420         }
2421
2422         if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2423                 sdio_claim_host(sdiodev->func[1]);
2424
2425                 /* Enable clock for device interrupts */
2426                 brcmf_sdio_bus_sleep(bus, false, false);
2427
2428                 /* Disable and clear interrupts at the chip level also */
2429                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2430                 local_hostintmask = bus->hostintmask;
2431                 bus->hostintmask = 0;
2432
2433                 /* Force backplane clocks to assure F2 interrupt propagates */
2434                 saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2435                                             &err);
2436                 if (!err)
2437                         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2438                                           (saveclk | SBSDIO_FORCE_HT), &err);
2439                 if (err)
2440                         brcmf_err("Failed to force clock for F2: err %d\n",
2441                                   err);
2442
2443                 /* Turn off the bus (F2), free any pending packets */
2444                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2445                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2446
2447                 /* Clear any pending interrupts now that F2 is disabled */
2448                 w_sdreg32(bus, local_hostintmask,
2449                           offsetof(struct sdpcmd_regs, intstatus));
2450
2451                 sdio_release_host(sdiodev->func[1]);
2452         }
2453         /* Clear the data packet queues */
2454         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2455
2456         /* Clear any held glomming stuff */
2457         brcmu_pkt_buf_free_skb(bus->glomd);
2458         brcmf_sdio_free_glom(bus);
2459
2460         /* Clear rx control and wake any waiters */
2461         spin_lock_bh(&bus->rxctl_lock);
2462         bus->rxlen = 0;
2463         spin_unlock_bh(&bus->rxctl_lock);
2464         brcmf_sdio_dcmd_resp_wake(bus);
2465
2466         /* Reset some F2 state stuff */
2467         bus->rxskip = false;
2468         bus->tx_seq = bus->rx_seq = 0;
2469 }
2470
2471 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2472 {
2473         struct brcmf_sdio_dev *sdiodev;
2474         unsigned long flags;
2475
2476         sdiodev = bus->sdiodev;
2477         if (sdiodev->oob_irq_requested) {
2478                 spin_lock_irqsave(&sdiodev->irq_en_lock, flags);
2479                 if (!sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2480                         enable_irq(sdiodev->settings->bus.sdio.oob_irq_nr);
2481                         sdiodev->irq_en = true;
2482                 }
2483                 spin_unlock_irqrestore(&sdiodev->irq_en_lock, flags);
2484         }
2485 }
2486
2487 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2488 {
2489         struct brcmf_core *buscore;
2490         u32 addr;
2491         unsigned long val;
2492         int ret;
2493
2494         buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
2495         addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
2496
2497         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2498         bus->sdcnt.f1regdata++;
2499         if (ret != 0)
2500                 return ret;
2501
2502         val &= bus->hostintmask;
2503         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2504
2505         /* Clear interrupts */
2506         if (val) {
2507                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2508                 bus->sdcnt.f1regdata++;
2509                 atomic_or(val, &bus->intstatus);
2510         }
2511
2512         return ret;
2513 }
2514
2515 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2516 {
2517         u32 newstatus = 0;
2518         unsigned long intstatus;
2519         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2520         uint framecnt;                  /* Temporary counter of tx/rx frames */
2521         int err = 0;
2522
2523         brcmf_dbg(TRACE, "Enter\n");
2524
2525         sdio_claim_host(bus->sdiodev->func[1]);
2526
2527         /* If waiting for HTAVAIL, check status */
2528         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2529                 u8 clkctl, devctl = 0;
2530
2531 #ifdef DEBUG
2532                 /* Check for inconsistent device control */
2533                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2534                                            SBSDIO_DEVICE_CTL, &err);
2535 #endif                          /* DEBUG */
2536
2537                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2538                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2539                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2540
2541                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2542                           devctl, clkctl);
2543
2544                 if (SBSDIO_HTAV(clkctl)) {
2545                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2546                                                    SBSDIO_DEVICE_CTL, &err);
2547                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2548                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2549                                           devctl, &err);
2550                         bus->clkstate = CLK_AVAIL;
2551                 }
2552         }
2553
2554         /* Make sure backplane clock is on */
2555         brcmf_sdio_bus_sleep(bus, false, true);
2556
2557         /* Pending interrupt indicates new device status */
2558         if (atomic_read(&bus->ipend) > 0) {
2559                 atomic_set(&bus->ipend, 0);
2560                 err = brcmf_sdio_intr_rstatus(bus);
2561         }
2562
2563         /* Start with leftover status bits */
2564         intstatus = atomic_xchg(&bus->intstatus, 0);
2565
2566         /* Handle flow-control change: read new state in case our ack
2567          * crossed another change interrupt.  If change still set, assume
2568          * FC ON for safety, let next loop through do the debounce.
2569          */
2570         if (intstatus & I_HMB_FC_CHANGE) {
2571                 intstatus &= ~I_HMB_FC_CHANGE;
2572                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2573                                 offsetof(struct sdpcmd_regs, intstatus));
2574
2575                 err = r_sdreg32(bus, &newstatus,
2576                                 offsetof(struct sdpcmd_regs, intstatus));
2577                 bus->sdcnt.f1regdata += 2;
2578                 atomic_set(&bus->fcstate,
2579                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2580                 intstatus |= (newstatus & bus->hostintmask);
2581         }
2582
2583         /* Handle host mailbox indication */
2584         if (intstatus & I_HMB_HOST_INT) {
2585                 intstatus &= ~I_HMB_HOST_INT;
2586                 intstatus |= brcmf_sdio_hostmail(bus);
2587         }
2588
2589         sdio_release_host(bus->sdiodev->func[1]);
2590
2591         /* Generally don't ask for these, can get CRC errors... */
2592         if (intstatus & I_WR_OOSYNC) {
2593                 brcmf_err("Dongle reports WR_OOSYNC\n");
2594                 intstatus &= ~I_WR_OOSYNC;
2595         }
2596
2597         if (intstatus & I_RD_OOSYNC) {
2598                 brcmf_err("Dongle reports RD_OOSYNC\n");
2599                 intstatus &= ~I_RD_OOSYNC;
2600         }
2601
2602         if (intstatus & I_SBINT) {
2603                 brcmf_err("Dongle reports SBINT\n");
2604                 intstatus &= ~I_SBINT;
2605         }
2606
2607         /* Would be active due to wake-wlan in gSPI */
2608         if (intstatus & I_CHIPACTIVE) {
2609                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2610                 intstatus &= ~I_CHIPACTIVE;
2611         }
2612
2613         /* Ignore frame indications if rxskip is set */
2614         if (bus->rxskip)
2615                 intstatus &= ~I_HMB_FRAME_IND;
2616
2617         /* On frame indication, read available frames */
2618         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2619                 brcmf_sdio_readframes(bus, bus->rxbound);
2620                 if (!bus->rxpending)
2621                         intstatus &= ~I_HMB_FRAME_IND;
2622         }
2623
2624         /* Keep still-pending events for next scheduling */
2625         if (intstatus)
2626                 atomic_or(intstatus, &bus->intstatus);
2627
2628         brcmf_sdio_clrintr(bus);
2629
2630         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2631             data_ok(bus)) {
2632                 sdio_claim_host(bus->sdiodev->func[1]);
2633                 if (bus->ctrl_frame_stat) {
2634                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2635                                                       bus->ctrl_frame_len);
2636                         bus->ctrl_frame_err = err;
2637                         wmb();
2638                         bus->ctrl_frame_stat = false;
2639                 }
2640                 sdio_release_host(bus->sdiodev->func[1]);
2641                 brcmf_sdio_wait_event_wakeup(bus);
2642         }
2643         /* Send queued frames (limit 1 if rx may still be pending) */
2644         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2645             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2646             data_ok(bus)) {
2647                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2648                                             txlimit;
2649                 brcmf_sdio_sendfromq(bus, framecnt);
2650         }
2651
2652         if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2653                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2654                 atomic_set(&bus->intstatus, 0);
2655                 if (bus->ctrl_frame_stat) {
2656                         sdio_claim_host(bus->sdiodev->func[1]);
2657                         if (bus->ctrl_frame_stat) {
2658                                 bus->ctrl_frame_err = -ENODEV;
2659                                 wmb();
2660                                 bus->ctrl_frame_stat = false;
2661                                 brcmf_sdio_wait_event_wakeup(bus);
2662                         }
2663                         sdio_release_host(bus->sdiodev->func[1]);
2664                 }
2665         } else if (atomic_read(&bus->intstatus) ||
2666                    atomic_read(&bus->ipend) > 0 ||
2667                    (!atomic_read(&bus->fcstate) &&
2668                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2669                     data_ok(bus))) {
2670                 bus->dpc_triggered = true;
2671         }
2672 }
2673
2674 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2675 {
2676         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2677         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2678         struct brcmf_sdio *bus = sdiodev->bus;
2679
2680         return &bus->txq;
2681 }
2682
2683 static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2684 {
2685         struct sk_buff *p;
2686         int eprec = -1;         /* precedence to evict from */
2687
2688         /* Fast case, precedence queue is not full and we are also not
2689          * exceeding total queue length
2690          */
2691         if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2692                 brcmu_pktq_penq(q, prec, pkt);
2693                 return true;
2694         }
2695
2696         /* Determine precedence from which to evict packet, if any */
2697         if (pktq_pfull(q, prec)) {
2698                 eprec = prec;
2699         } else if (pktq_full(q)) {
2700                 p = brcmu_pktq_peek_tail(q, &eprec);
2701                 if (eprec > prec)
2702                         return false;
2703         }
2704
2705         /* Evict if needed */
2706         if (eprec >= 0) {
2707                 /* Detect queueing to unconfigured precedence */
2708                 if (eprec == prec)
2709                         return false;   /* refuse newer (incoming) packet */
2710                 /* Evict packet according to discard policy */
2711                 p = brcmu_pktq_pdeq_tail(q, eprec);
2712                 if (p == NULL)
2713                         brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2714                 brcmu_pkt_buf_free_skb(p);
2715         }
2716
2717         /* Enqueue */
2718         p = brcmu_pktq_penq(q, prec, pkt);
2719         if (p == NULL)
2720                 brcmf_err("brcmu_pktq_penq() failed\n");
2721
2722         return p != NULL;
2723 }
2724
2725 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2726 {
2727         int ret = -EBADE;
2728         uint prec;
2729         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2730         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2731         struct brcmf_sdio *bus = sdiodev->bus;
2732
2733         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2734         if (sdiodev->state != BRCMF_SDIOD_DATA)
2735                 return -EIO;
2736
2737         /* Add space for the header */
2738         skb_push(pkt, bus->tx_hdrlen);
2739         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2740
2741         prec = prio2prec((pkt->priority & PRIOMASK));
2742
2743         /* Check for existing queue, current flow-control,
2744                          pending event, or pending clock */
2745         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2746         bus->sdcnt.fcqueued++;
2747
2748         /* Priority based enq */
2749         spin_lock_bh(&bus->txq_lock);
2750         /* reset bus_flags in packet cb */
2751         *(u16 *)(pkt->cb) = 0;
2752         if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2753                 skb_pull(pkt, bus->tx_hdrlen);
2754                 brcmf_err("out of bus->txq !!!\n");
2755                 ret = -ENOSR;
2756         } else {
2757                 ret = 0;
2758         }
2759
2760         if (pktq_len(&bus->txq) >= TXHI) {
2761                 bus->txoff = true;
2762                 brcmf_proto_bcdc_txflowblock(dev, true);
2763         }
2764         spin_unlock_bh(&bus->txq_lock);
2765
2766 #ifdef DEBUG
2767         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2768                 qcount[prec] = pktq_plen(&bus->txq, prec);
2769 #endif
2770
2771         brcmf_sdio_trigger_dpc(bus);
2772         return ret;
2773 }
2774
2775 #ifdef DEBUG
2776 #define CONSOLE_LINE_MAX        192
2777
2778 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2779 {
2780         struct brcmf_console *c = &bus->console;
2781         u8 line[CONSOLE_LINE_MAX], ch;
2782         u32 n, idx, addr;
2783         int rv;
2784
2785         /* Don't do anything until FWREADY updates console address */
2786         if (bus->console_addr == 0)
2787                 return 0;
2788
2789         /* Read console log struct */
2790         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2791         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2792                                sizeof(c->log_le));
2793         if (rv < 0)
2794                 return rv;
2795
2796         /* Allocate console buffer (one time only) */
2797         if (c->buf == NULL) {
2798                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2799                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2800                 if (c->buf == NULL)
2801                         return -ENOMEM;
2802         }
2803
2804         idx = le32_to_cpu(c->log_le.idx);
2805
2806         /* Protect against corrupt value */
2807         if (idx > c->bufsize)
2808                 return -EBADE;
2809
2810         /* Skip reading the console buffer if the index pointer
2811          has not moved */
2812         if (idx == c->last)
2813                 return 0;
2814
2815         /* Read the console buffer */
2816         addr = le32_to_cpu(c->log_le.buf);
2817         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2818         if (rv < 0)
2819                 return rv;
2820
2821         while (c->last != idx) {
2822                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2823                         if (c->last == idx) {
2824                                 /* This would output a partial line.
2825                                  * Instead, back up
2826                                  * the buffer pointer and output this
2827                                  * line next time around.
2828                                  */
2829                                 if (c->last >= n)
2830                                         c->last -= n;
2831                                 else
2832                                         c->last = c->bufsize - n;
2833                                 goto break2;
2834                         }
2835                         ch = c->buf[c->last];
2836                         c->last = (c->last + 1) % c->bufsize;
2837                         if (ch == '\n')
2838                                 break;
2839                         line[n] = ch;
2840                 }
2841
2842                 if (n > 0) {
2843                         if (line[n - 1] == '\r')
2844                                 n--;
2845                         line[n] = 0;
2846                         pr_debug("CONSOLE: %s\n", line);
2847                 }
2848         }
2849 break2:
2850
2851         return 0;
2852 }
2853 #endif                          /* DEBUG */
2854
2855 static int
2856 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2857 {
2858         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2859         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2860         struct brcmf_sdio *bus = sdiodev->bus;
2861         int ret;
2862
2863         brcmf_dbg(TRACE, "Enter\n");
2864         if (sdiodev->state != BRCMF_SDIOD_DATA)
2865                 return -EIO;
2866
2867         /* Send from dpc */
2868         bus->ctrl_frame_buf = msg;
2869         bus->ctrl_frame_len = msglen;
2870         wmb();
2871         bus->ctrl_frame_stat = true;
2872
2873         brcmf_sdio_trigger_dpc(bus);
2874         wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2875                                          CTL_DONE_TIMEOUT);
2876         ret = 0;
2877         if (bus->ctrl_frame_stat) {
2878                 sdio_claim_host(bus->sdiodev->func[1]);
2879                 if (bus->ctrl_frame_stat) {
2880                         brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2881                         bus->ctrl_frame_stat = false;
2882                         ret = -ETIMEDOUT;
2883                 }
2884                 sdio_release_host(bus->sdiodev->func[1]);
2885         }
2886         if (!ret) {
2887                 brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2888                           bus->ctrl_frame_err);
2889                 rmb();
2890                 ret = bus->ctrl_frame_err;
2891         }
2892
2893         if (ret)
2894                 bus->sdcnt.tx_ctlerrs++;
2895         else
2896                 bus->sdcnt.tx_ctlpkts++;
2897
2898         return ret;
2899 }
2900
2901 #ifdef DEBUG
2902 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2903                                    struct sdpcm_shared *sh)
2904 {
2905         u32 addr, console_ptr, console_size, console_index;
2906         char *conbuf = NULL;
2907         __le32 sh_val;
2908         int rv;
2909
2910         /* obtain console information from device memory */
2911         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2912         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2913                                (u8 *)&sh_val, sizeof(u32));
2914         if (rv < 0)
2915                 return rv;
2916         console_ptr = le32_to_cpu(sh_val);
2917
2918         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2919         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2920                                (u8 *)&sh_val, sizeof(u32));
2921         if (rv < 0)
2922                 return rv;
2923         console_size = le32_to_cpu(sh_val);
2924
2925         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2926         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2927                                (u8 *)&sh_val, sizeof(u32));
2928         if (rv < 0)
2929                 return rv;
2930         console_index = le32_to_cpu(sh_val);
2931
2932         /* allocate buffer for console data */
2933         if (console_size <= CONSOLE_BUFFER_MAX)
2934                 conbuf = vzalloc(console_size+1);
2935
2936         if (!conbuf)
2937                 return -ENOMEM;
2938
2939         /* obtain the console data from device */
2940         conbuf[console_size] = '\0';
2941         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2942                                console_size);
2943         if (rv < 0)
2944                 goto done;
2945
2946         rv = seq_write(seq, conbuf + console_index,
2947                        console_size - console_index);
2948         if (rv < 0)
2949                 goto done;
2950
2951         if (console_index > 0)
2952                 rv = seq_write(seq, conbuf, console_index - 1);
2953
2954 done:
2955         vfree(conbuf);
2956         return rv;
2957 }
2958
2959 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
2960                                 struct sdpcm_shared *sh)
2961 {
2962         int error;
2963         struct brcmf_trap_info tr;
2964
2965         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2966                 brcmf_dbg(INFO, "no trap in firmware\n");
2967                 return 0;
2968         }
2969
2970         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2971                                   sizeof(struct brcmf_trap_info));
2972         if (error < 0)
2973                 return error;
2974
2975         seq_printf(seq,
2976                    "dongle trap info: type 0x%x @ epc 0x%08x\n"
2977                    "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2978                    "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2979                    "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2980                    "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2981                    le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2982                    le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2983                    le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2984                    le32_to_cpu(tr.pc), sh->trap_addr,
2985                    le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2986                    le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2987                    le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2988                    le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2989
2990         return 0;
2991 }
2992
2993 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
2994                                   struct sdpcm_shared *sh)
2995 {
2996         int error = 0;
2997         char file[80] = "?";
2998         char expr[80] = "<???>";
2999
3000         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3001                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3002                 return 0;
3003         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3004                 brcmf_dbg(INFO, "no assert in dongle\n");
3005                 return 0;
3006         }
3007
3008         sdio_claim_host(bus->sdiodev->func[1]);
3009         if (sh->assert_file_addr != 0) {
3010                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3011                                           sh->assert_file_addr, (u8 *)file, 80);
3012                 if (error < 0)
3013                         return error;
3014         }
3015         if (sh->assert_exp_addr != 0) {
3016                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3017                                           sh->assert_exp_addr, (u8 *)expr, 80);
3018                 if (error < 0)
3019                         return error;
3020         }
3021         sdio_release_host(bus->sdiodev->func[1]);
3022
3023         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3024                    file, sh->assert_line, expr);
3025         return 0;
3026 }
3027
3028 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3029 {
3030         int error;
3031         struct sdpcm_shared sh;
3032
3033         error = brcmf_sdio_readshared(bus, &sh);
3034
3035         if (error < 0)
3036                 return error;
3037
3038         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3039                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3040         else if (sh.flags & SDPCM_SHARED_ASSERT)
3041                 brcmf_err("assertion in dongle\n");
3042
3043         if (sh.flags & SDPCM_SHARED_TRAP)
3044                 brcmf_err("firmware trap in dongle\n");
3045
3046         return 0;
3047 }
3048
3049 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3050 {
3051         int error = 0;
3052         struct sdpcm_shared sh;
3053
3054         error = brcmf_sdio_readshared(bus, &sh);
3055         if (error < 0)
3056                 goto done;
3057
3058         error = brcmf_sdio_assert_info(seq, bus, &sh);
3059         if (error < 0)
3060                 goto done;
3061
3062         error = brcmf_sdio_trap_info(seq, bus, &sh);
3063         if (error < 0)
3064                 goto done;
3065
3066         error = brcmf_sdio_dump_console(seq, bus, &sh);
3067
3068 done:
3069         return error;
3070 }
3071
3072 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3073 {
3074         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3075         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3076
3077         return brcmf_sdio_died_dump(seq, bus);
3078 }
3079
3080 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3081 {
3082         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3083         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3084         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3085
3086         seq_printf(seq,
3087                    "intrcount:    %u\nlastintrs:    %u\n"
3088                    "pollcnt:      %u\nregfails:     %u\n"
3089                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3090                    "rxrtx:        %u\nrx_toolong:   %u\n"
3091                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3092                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3093                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3094                    "fc_xon:       %u\nrxglomfail:   %u\n"
3095                    "rxglomframes: %u\nrxglompkts:   %u\n"
3096                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3097                    "f2txdata:     %u\nf1regdata:    %u\n"
3098                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3099                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3100                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3101                    sdcnt->intrcount, sdcnt->lastintrs,
3102                    sdcnt->pollcnt, sdcnt->regfails,
3103                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3104                    sdcnt->rxrtx, sdcnt->rx_toolong,
3105                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3106                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3107                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3108                    sdcnt->fc_xon, sdcnt->rxglomfail,
3109                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3110                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3111                    sdcnt->f2txdata, sdcnt->f1regdata,
3112                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3113                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3114                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3115
3116         return 0;
3117 }
3118
3119 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3120 {
3121         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3122         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3123
3124         if (IS_ERR_OR_NULL(dentry))
3125                 return;
3126
3127         bus->console_interval = BRCMF_CONSOLE;
3128
3129         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3130         brcmf_debugfs_add_entry(drvr, "counters",
3131                                 brcmf_debugfs_sdio_count_read);
3132         debugfs_create_u32("console_interval", 0644, dentry,
3133                            &bus->console_interval);
3134 }
3135 #else
3136 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3137 {
3138         return 0;
3139 }
3140
3141 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3142 {
3143 }
3144 #endif /* DEBUG */
3145
3146 static int
3147 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3148 {
3149         int timeleft;
3150         uint rxlen = 0;
3151         bool pending;
3152         u8 *buf;
3153         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3154         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3155         struct brcmf_sdio *bus = sdiodev->bus;
3156
3157         brcmf_dbg(TRACE, "Enter\n");
3158         if (sdiodev->state != BRCMF_SDIOD_DATA)
3159                 return -EIO;
3160
3161         /* Wait until control frame is available */
3162         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3163
3164         spin_lock_bh(&bus->rxctl_lock);
3165         rxlen = bus->rxlen;
3166         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3167         bus->rxctl = NULL;
3168         buf = bus->rxctl_orig;
3169         bus->rxctl_orig = NULL;
3170         bus->rxlen = 0;
3171         spin_unlock_bh(&bus->rxctl_lock);
3172         vfree(buf);
3173
3174         if (rxlen) {
3175                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3176                           rxlen, msglen);
3177         } else if (timeleft == 0) {
3178                 brcmf_err("resumed on timeout\n");
3179                 brcmf_sdio_checkdied(bus);
3180         } else if (pending) {
3181                 brcmf_dbg(CTL, "cancelled\n");
3182                 return -ERESTARTSYS;
3183         } else {
3184                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3185                 brcmf_sdio_checkdied(bus);
3186         }
3187
3188         if (rxlen)
3189                 bus->sdcnt.rx_ctlpkts++;
3190         else
3191                 bus->sdcnt.rx_ctlerrs++;
3192
3193         return rxlen ? (int)rxlen : -ETIMEDOUT;
3194 }
3195
3196 #ifdef DEBUG
3197 static bool
3198 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3199                         u8 *ram_data, uint ram_sz)
3200 {
3201         char *ram_cmp;
3202         int err;
3203         bool ret = true;
3204         int address;
3205         int offset;
3206         int len;
3207
3208         /* read back and verify */
3209         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3210                   ram_sz);
3211         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3212         /* do not proceed while no memory but  */
3213         if (!ram_cmp)
3214                 return true;
3215
3216         address = ram_addr;
3217         offset = 0;
3218         while (offset < ram_sz) {
3219                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3220                       ram_sz - offset;
3221                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3222                 if (err) {
3223                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3224                                   err, len, address);
3225                         ret = false;
3226                         break;
3227                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3228                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3229                                   offset, len);
3230                         ret = false;
3231                         break;
3232                 }
3233                 offset += len;
3234                 address += len;
3235         }
3236
3237         kfree(ram_cmp);
3238
3239         return ret;
3240 }
3241 #else   /* DEBUG */
3242 static bool
3243 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3244                         u8 *ram_data, uint ram_sz)
3245 {
3246         return true;
3247 }
3248 #endif  /* DEBUG */
3249
3250 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3251                                          const struct firmware *fw)
3252 {
3253         int err;
3254
3255         brcmf_dbg(TRACE, "Enter\n");
3256
3257         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3258                                 (u8 *)fw->data, fw->size);
3259         if (err)
3260                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3261                           err, (int)fw->size, bus->ci->rambase);
3262         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3263                                           (u8 *)fw->data, fw->size))
3264                 err = -EIO;
3265
3266         return err;
3267 }
3268
3269 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3270                                      void *vars, u32 varsz)
3271 {
3272         int address;
3273         int err;
3274
3275         brcmf_dbg(TRACE, "Enter\n");
3276
3277         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3278         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3279         if (err)
3280                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3281                           err, varsz, address);
3282         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3283                 err = -EIO;
3284
3285         return err;
3286 }
3287
3288 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3289                                         const struct firmware *fw,
3290                                         void *nvram, u32 nvlen)
3291 {
3292         int bcmerror;
3293         u32 rstvec;
3294
3295         sdio_claim_host(bus->sdiodev->func[1]);
3296         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3297
3298         rstvec = get_unaligned_le32(fw->data);
3299         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3300
3301         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3302         release_firmware(fw);
3303         if (bcmerror) {
3304                 brcmf_err("dongle image file download failed\n");
3305                 brcmf_fw_nvram_free(nvram);
3306                 goto err;
3307         }
3308
3309         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3310         brcmf_fw_nvram_free(nvram);
3311         if (bcmerror) {
3312                 brcmf_err("dongle nvram file download failed\n");
3313                 goto err;
3314         }
3315
3316         /* Take arm out of reset */
3317         if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3318                 brcmf_err("error getting out of ARM core reset\n");
3319                 goto err;
3320         }
3321
3322 err:
3323         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3324         sdio_release_host(bus->sdiodev->func[1]);
3325         return bcmerror;
3326 }
3327
3328 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3329 {
3330         int err = 0;
3331         u8 val;
3332
3333         brcmf_dbg(TRACE, "Enter\n");
3334
3335         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3336         if (err) {
3337                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3338                 return;
3339         }
3340
3341         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3342         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3343         if (err) {
3344                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3345                 return;
3346         }
3347
3348         /* Add CMD14 Support */
3349         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3350                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3351                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3352                           &err);
3353         if (err) {
3354                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3355                 return;
3356         }
3357
3358         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3359                           SBSDIO_FORCE_HT, &err);
3360         if (err) {
3361                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3362                 return;
3363         }
3364
3365         /* set flag */
3366         bus->sr_enabled = true;
3367         brcmf_dbg(INFO, "SR enabled\n");
3368 }
3369
3370 /* enable KSO bit */
3371 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3372 {
3373         u8 val;
3374         int err = 0;
3375
3376         brcmf_dbg(TRACE, "Enter\n");
3377
3378         /* KSO bit added in SDIO core rev 12 */
3379         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
3380                 return 0;
3381
3382         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3383         if (err) {
3384                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3385                 return err;
3386         }
3387
3388         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3389                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3390                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3391                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3392                                   val, &err);
3393                 if (err) {
3394                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3395                         return err;
3396                 }
3397         }
3398
3399         return 0;
3400 }
3401
3402
3403 static int brcmf_sdio_bus_preinit(struct device *dev)
3404 {
3405         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3406         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3407         struct brcmf_sdio *bus = sdiodev->bus;
3408         uint pad_size;
3409         u32 value;
3410         int err;
3411
3412         /* the commands below use the terms tx and rx from
3413          * a device perspective, ie. bus:txglom affects the
3414          * bus transfers from device to host.
3415          */
3416         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12) {
3417                 /* for sdio core rev < 12, disable txgloming */
3418                 value = 0;
3419                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3420                                            sizeof(u32));
3421         } else {
3422                 /* otherwise, set txglomalign */
3423                 value = sdiodev->settings->bus.sdio.sd_sgentry_align;
3424                 /* SDIO ADMA requires at least 32 bit alignment */
3425                 value = max_t(u32, value, 4);
3426                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3427                                            sizeof(u32));
3428         }
3429
3430         if (err < 0)
3431                 goto done;
3432
3433         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3434         if (sdiodev->sg_support) {
3435                 bus->txglom = false;
3436                 value = 1;
3437                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3438                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3439                                            &value, sizeof(u32));
3440                 if (err < 0) {
3441                         /* bus:rxglom is allowed to fail */
3442                         err = 0;
3443                 } else {
3444                         bus->txglom = true;
3445                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3446                 }
3447         }
3448         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3449
3450 done:
3451         return err;
3452 }
3453
3454 static size_t brcmf_sdio_bus_get_ramsize(struct device *dev)
3455 {
3456         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3457         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3458         struct brcmf_sdio *bus = sdiodev->bus;
3459
3460         return bus->ci->ramsize - bus->ci->srsize;
3461 }
3462
3463 static int brcmf_sdio_bus_get_memdump(struct device *dev, void *data,
3464                                       size_t mem_size)
3465 {
3466         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3467         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3468         struct brcmf_sdio *bus = sdiodev->bus;
3469         int err;
3470         int address;
3471         int offset;
3472         int len;
3473
3474         brcmf_dbg(INFO, "dump at 0x%08x: size=%zu\n", bus->ci->rambase,
3475                   mem_size);
3476
3477         address = bus->ci->rambase;
3478         offset = err = 0;
3479         sdio_claim_host(sdiodev->func[1]);
3480         while (offset < mem_size) {
3481                 len = ((offset + MEMBLOCK) < mem_size) ? MEMBLOCK :
3482                       mem_size - offset;
3483                 err = brcmf_sdiod_ramrw(sdiodev, false, address, data, len);
3484                 if (err) {
3485                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3486                                   err, len, address);
3487                         goto done;
3488                 }
3489                 data += len;
3490                 offset += len;
3491                 address += len;
3492         }
3493
3494 done:
3495         sdio_release_host(sdiodev->func[1]);
3496         return err;
3497 }
3498
3499 void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3500 {
3501         if (!bus->dpc_triggered) {
3502                 bus->dpc_triggered = true;
3503                 queue_work(bus->brcmf_wq, &bus->datawork);
3504         }
3505 }
3506
3507 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3508 {
3509         brcmf_dbg(TRACE, "Enter\n");
3510
3511         if (!bus) {
3512                 brcmf_err("bus is null pointer, exiting\n");
3513                 return;
3514         }
3515
3516         /* Count the interrupt call */
3517         bus->sdcnt.intrcount++;
3518         if (in_interrupt())
3519                 atomic_set(&bus->ipend, 1);
3520         else
3521                 if (brcmf_sdio_intr_rstatus(bus)) {
3522                         brcmf_err("failed backplane access\n");
3523                 }
3524
3525         /* Disable additional interrupts (is this needed now)? */
3526         if (!bus->intr)
3527                 brcmf_err("isr w/o interrupt configured!\n");
3528
3529         bus->dpc_triggered = true;
3530         queue_work(bus->brcmf_wq, &bus->datawork);
3531 }
3532
3533 static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3534 {
3535         brcmf_dbg(TIMER, "Enter\n");
3536
3537         /* Poll period: check device if appropriate. */
3538         if (!bus->sr_enabled &&
3539             bus->poll && (++bus->polltick >= bus->pollrate)) {
3540                 u32 intstatus = 0;
3541
3542                 /* Reset poll tick */
3543                 bus->polltick = 0;
3544
3545                 /* Check device if no interrupts */
3546                 if (!bus->intr ||
3547                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3548
3549                         if (!bus->dpc_triggered) {
3550                                 u8 devpend;
3551
3552                                 sdio_claim_host(bus->sdiodev->func[1]);
3553                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3554                                                             SDIO_CCCR_INTx,
3555                                                             NULL);
3556                                 sdio_release_host(bus->sdiodev->func[1]);
3557                                 intstatus = devpend & (INTR_STATUS_FUNC1 |
3558                                                        INTR_STATUS_FUNC2);
3559                         }
3560
3561                         /* If there is something, make like the ISR and
3562                                  schedule the DPC */
3563                         if (intstatus) {
3564                                 bus->sdcnt.pollcnt++;
3565                                 atomic_set(&bus->ipend, 1);
3566
3567                                 bus->dpc_triggered = true;
3568                                 queue_work(bus->brcmf_wq, &bus->datawork);
3569                         }
3570                 }
3571
3572                 /* Update interrupt tracking */
3573                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3574         }
3575 #ifdef DEBUG
3576         /* Poll for console output periodically */
3577         if (bus->sdiodev->state == BRCMF_SDIOD_DATA && BRCMF_FWCON_ON() &&
3578             bus->console_interval != 0) {
3579                 bus->console.count += jiffies_to_msecs(BRCMF_WD_POLL);
3580                 if (bus->console.count >= bus->console_interval) {
3581                         bus->console.count -= bus->console_interval;
3582                         sdio_claim_host(bus->sdiodev->func[1]);
3583                         /* Make sure backplane clock is on */
3584                         brcmf_sdio_bus_sleep(bus, false, false);
3585                         if (brcmf_sdio_readconsole(bus) < 0)
3586                                 /* stop on error */
3587                                 bus->console_interval = 0;
3588                         sdio_release_host(bus->sdiodev->func[1]);
3589                 }
3590         }
3591 #endif                          /* DEBUG */
3592
3593         /* On idle timeout clear activity flag and/or turn off clock */
3594         if (!bus->dpc_triggered) {
3595                 rmb();
3596                 if ((!bus->dpc_running) && (bus->idletime > 0) &&
3597                     (bus->clkstate == CLK_AVAIL)) {
3598                         bus->idlecount++;
3599                         if (bus->idlecount > bus->idletime) {
3600                                 brcmf_dbg(SDIO, "idle\n");
3601                                 sdio_claim_host(bus->sdiodev->func[1]);
3602                                 brcmf_sdio_wd_timer(bus, false);
3603                                 bus->idlecount = 0;
3604                                 brcmf_sdio_bus_sleep(bus, true, false);
3605                                 sdio_release_host(bus->sdiodev->func[1]);
3606                         }
3607                 } else {
3608                         bus->idlecount = 0;
3609                 }
3610         } else {
3611                 bus->idlecount = 0;
3612         }
3613 }
3614
3615 static void brcmf_sdio_dataworker(struct work_struct *work)
3616 {
3617         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3618                                               datawork);
3619
3620         bus->dpc_running = true;
3621         wmb();
3622         while (ACCESS_ONCE(bus->dpc_triggered)) {
3623                 bus->dpc_triggered = false;
3624                 brcmf_sdio_dpc(bus);
3625                 bus->idlecount = 0;
3626         }
3627         bus->dpc_running = false;
3628         if (brcmf_sdiod_freezing(bus->sdiodev)) {
3629                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3630                 brcmf_sdiod_try_freeze(bus->sdiodev);
3631                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3632         }
3633 }
3634
3635 static void
3636 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3637                              struct brcmf_chip *ci, u32 drivestrength)
3638 {
3639         const struct sdiod_drive_str *str_tab = NULL;
3640         u32 str_mask;
3641         u32 str_shift;
3642         u32 i;
3643         u32 drivestrength_sel = 0;
3644         u32 cc_data_temp;
3645         u32 addr;
3646
3647         if (!(ci->cc_caps & CC_CAP_PMU))
3648                 return;
3649
3650         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3651         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3652                 str_tab = sdiod_drvstr_tab1_1v8;
3653                 str_mask = 0x00003800;
3654                 str_shift = 11;
3655                 break;
3656         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3657                 str_tab = sdiod_drvstr_tab6_1v8;
3658                 str_mask = 0x00001800;
3659                 str_shift = 11;
3660                 break;
3661         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3662                 /* note: 43143 does not support tristate */
3663                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3664                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3665                         str_tab = sdiod_drvstr_tab2_3v3;
3666                         str_mask = 0x00000007;
3667                         str_shift = 0;
3668                 } else
3669                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3670                                   ci->name, drivestrength);
3671                 break;
3672         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3673                 str_tab = sdiod_drive_strength_tab5_1v8;
3674                 str_mask = 0x00003800;
3675                 str_shift = 11;
3676                 break;
3677         default:
3678                 brcmf_dbg(INFO, "No SDIO driver strength init needed for chip %s rev %d pmurev %d\n",
3679                           ci->name, ci->chiprev, ci->pmurev);
3680                 break;
3681         }
3682
3683         if (str_tab != NULL) {
3684                 struct brcmf_core *pmu = brcmf_chip_get_pmu(ci);
3685
3686                 for (i = 0; str_tab[i].strength != 0; i++) {
3687                         if (drivestrength >= str_tab[i].strength) {
3688                                 drivestrength_sel = str_tab[i].sel;
3689                                 break;
3690                         }
3691                 }
3692                 addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
3693                 brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
3694                 cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3695                 cc_data_temp &= ~str_mask;
3696                 drivestrength_sel <<= str_shift;
3697                 cc_data_temp |= drivestrength_sel;
3698                 brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
3699
3700                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3701                           str_tab[i].strength, drivestrength, cc_data_temp);
3702         }
3703 }
3704
3705 static int brcmf_sdio_buscoreprep(void *ctx)
3706 {
3707         struct brcmf_sdio_dev *sdiodev = ctx;
3708         int err = 0;
3709         u8 clkval, clkset;
3710
3711         /* Try forcing SDIO core to do ALPAvail request only */
3712         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3713         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3714         if (err) {
3715                 brcmf_err("error writing for HT off\n");
3716                 return err;
3717         }
3718
3719         /* If register supported, wait for ALPAvail and then force ALP */
3720         /* This may take up to 15 milliseconds */
3721         clkval = brcmf_sdiod_regrb(sdiodev,
3722                                    SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3723
3724         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3725                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3726                           clkset, clkval);
3727                 return -EACCES;
3728         }
3729
3730         SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
3731                                               SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
3732                         !SBSDIO_ALPAV(clkval)),
3733                         PMU_MAX_TRANSITION_DLY);
3734         if (!SBSDIO_ALPAV(clkval)) {
3735                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3736                           clkval);
3737                 return -EBUSY;
3738         }
3739
3740         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3741         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3742         udelay(65);
3743
3744         /* Also, disable the extra SDIO pull-ups */
3745         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3746
3747         return 0;
3748 }
3749
3750 static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3751                                         u32 rstvec)
3752 {
3753         struct brcmf_sdio_dev *sdiodev = ctx;
3754         struct brcmf_core *core;
3755         u32 reg_addr;
3756
3757         /* clear all interrupts */
3758         core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
3759         reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
3760         brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3761
3762         if (rstvec)
3763                 /* Write reset vector to address 0 */
3764                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3765                                   sizeof(rstvec));
3766 }
3767
3768 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3769 {
3770         struct brcmf_sdio_dev *sdiodev = ctx;
3771         u32 val, rev;
3772
3773         val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3774         if ((sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 ||
3775              sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4339) &&
3776             addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
3777                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3778                 if (rev >= 2) {
3779                         val &= ~CID_ID_MASK;
3780                         val |= BRCM_CC_4339_CHIP_ID;
3781                 }
3782         }
3783         return val;
3784 }
3785
3786 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3787 {
3788         struct brcmf_sdio_dev *sdiodev = ctx;
3789
3790         brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
3791 }
3792
3793 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3794         .prepare = brcmf_sdio_buscoreprep,
3795         .activate = brcmf_sdio_buscore_activate,
3796         .read32 = brcmf_sdio_buscore_read32,
3797         .write32 = brcmf_sdio_buscore_write32,
3798 };
3799
3800 static bool
3801 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3802 {
3803         struct brcmf_sdio_dev *sdiodev;
3804         u8 clkctl = 0;
3805         int err = 0;
3806         int reg_addr;
3807         u32 reg_val;
3808         u32 drivestrength;
3809
3810         sdiodev = bus->sdiodev;
3811         sdio_claim_host(sdiodev->func[1]);
3812
3813         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3814                  brcmf_sdiod_regrl(sdiodev, SI_ENUM_BASE, NULL));
3815
3816         /*
3817          * Force PLL off until brcmf_chip_attach()
3818          * programs PLL control regs
3819          */
3820
3821         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3822                           BRCMF_INIT_CLKCTL1, &err);
3823         if (!err)
3824                 clkctl = brcmf_sdiod_regrb(sdiodev,
3825                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3826
3827         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3828                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3829                           err, BRCMF_INIT_CLKCTL1, clkctl);
3830                 goto fail;
3831         }
3832
3833         bus->ci = brcmf_chip_attach(sdiodev, &brcmf_sdio_buscore_ops);
3834         if (IS_ERR(bus->ci)) {
3835                 brcmf_err("brcmf_chip_attach failed!\n");
3836                 bus->ci = NULL;
3837                 goto fail;
3838         }
3839         sdiodev->settings = brcmf_get_module_param(sdiodev->dev,
3840                                                    BRCMF_BUSTYPE_SDIO,
3841                                                    bus->ci->chip,
3842                                                    bus->ci->chiprev);
3843         if (!sdiodev->settings) {
3844                 brcmf_err("Failed to get device parameters\n");
3845                 goto fail;
3846         }
3847         /* platform specific configuration:
3848          *   alignments must be at least 4 bytes for ADMA
3849          */
3850         bus->head_align = ALIGNMENT;
3851         bus->sgentry_align = ALIGNMENT;
3852         if (sdiodev->settings->bus.sdio.sd_head_align > ALIGNMENT)
3853                 bus->head_align = sdiodev->settings->bus.sdio.sd_head_align;
3854         if (sdiodev->settings->bus.sdio.sd_sgentry_align > ALIGNMENT)
3855                 bus->sgentry_align =
3856                                 sdiodev->settings->bus.sdio.sd_sgentry_align;
3857
3858         /* allocate scatter-gather table. sg support
3859          * will be disabled upon allocation failure.
3860          */
3861         brcmf_sdiod_sgtable_alloc(sdiodev);
3862
3863 #ifdef CONFIG_PM_SLEEP
3864         /* wowl can be supported when KEEP_POWER is true and (WAKE_SDIO_IRQ
3865          * is true or when platform data OOB irq is true).
3866          */
3867         if ((sdio_get_host_pm_caps(sdiodev->func[1]) & MMC_PM_KEEP_POWER) &&
3868             ((sdio_get_host_pm_caps(sdiodev->func[1]) & MMC_PM_WAKE_SDIO_IRQ) ||
3869              (sdiodev->settings->bus.sdio.oob_irq_supported)))
3870                 sdiodev->bus_if->wowl_supported = true;
3871 #endif
3872
3873         if (brcmf_sdio_kso_init(bus)) {
3874                 brcmf_err("error enabling KSO\n");
3875                 goto fail;
3876         }
3877
3878         if (sdiodev->settings->bus.sdio.drive_strength)
3879                 drivestrength = sdiodev->settings->bus.sdio.drive_strength;
3880         else
3881                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3882         brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
3883
3884         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3885         reg_val = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
3886         if (err)
3887                 goto fail;
3888
3889         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3890
3891         brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3892         if (err)
3893                 goto fail;
3894
3895         /* set PMUControl so a backplane reset does PMU state reload */
3896         reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
3897         reg_val = brcmf_sdiod_regrl(sdiodev, reg_addr, &err);
3898         if (err)
3899                 goto fail;
3900
3901         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3902
3903         brcmf_sdiod_regwl(sdiodev, reg_addr, reg_val, &err);
3904         if (err)
3905                 goto fail;
3906
3907         sdio_release_host(sdiodev->func[1]);
3908
3909         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3910
3911         /* allocate header buffer */
3912         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3913         if (!bus->hdrbuf)
3914                 return false;
3915         /* Locate an appropriately-aligned portion of hdrbuf */
3916         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3917                                     bus->head_align);
3918
3919         /* Set the poll and/or interrupt flags */
3920         bus->intr = true;
3921         bus->poll = false;
3922         if (bus->poll)
3923                 bus->pollrate = 1;
3924
3925         return true;
3926
3927 fail:
3928         sdio_release_host(sdiodev->func[1]);
3929         return false;
3930 }
3931
3932 static int
3933 brcmf_sdio_watchdog_thread(void *data)
3934 {
3935         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3936         int wait;
3937
3938         allow_signal(SIGTERM);
3939         /* Run until signal received */
3940         brcmf_sdiod_freezer_count(bus->sdiodev);
3941         while (1) {
3942                 if (kthread_should_stop())
3943                         break;
3944                 brcmf_sdiod_freezer_uncount(bus->sdiodev);
3945                 wait = wait_for_completion_interruptible(&bus->watchdog_wait);
3946                 brcmf_sdiod_freezer_count(bus->sdiodev);
3947                 brcmf_sdiod_try_freeze(bus->sdiodev);
3948                 if (!wait) {
3949                         brcmf_sdio_bus_watchdog(bus);
3950                         /* Count the tick for reference */
3951                         bus->sdcnt.tickcnt++;
3952                         reinit_completion(&bus->watchdog_wait);
3953                 } else
3954                         break;
3955         }
3956         return 0;
3957 }
3958
3959 static void
3960 brcmf_sdio_watchdog(unsigned long data)
3961 {
3962         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3963
3964         if (bus->watchdog_tsk) {
3965                 complete(&bus->watchdog_wait);
3966                 /* Reschedule the watchdog */
3967                 if (bus->wd_active)
3968                         mod_timer(&bus->timer,
3969                                   jiffies + BRCMF_WD_POLL);
3970         }
3971 }
3972
3973 static const struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3974         .stop = brcmf_sdio_bus_stop,
3975         .preinit = brcmf_sdio_bus_preinit,
3976         .txdata = brcmf_sdio_bus_txdata,
3977         .txctl = brcmf_sdio_bus_txctl,
3978         .rxctl = brcmf_sdio_bus_rxctl,
3979         .gettxq = brcmf_sdio_bus_gettxq,
3980         .wowl_config = brcmf_sdio_wowl_config,
3981         .get_ramsize = brcmf_sdio_bus_get_ramsize,
3982         .get_memdump = brcmf_sdio_bus_get_memdump,
3983 };
3984
3985 static void brcmf_sdio_firmware_callback(struct device *dev,
3986                                          const struct firmware *code,
3987                                          void *nvram, u32 nvram_len)
3988 {
3989         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3990         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3991         struct brcmf_sdio *bus = sdiodev->bus;
3992         int err = 0;
3993         u8 saveclk;
3994
3995         brcmf_dbg(TRACE, "Enter: dev=%s\n", dev_name(dev));
3996
3997         if (!bus_if->drvr)
3998                 return;
3999
4000         /* try to download image and nvram to the dongle */
4001         bus->alp_only = true;
4002         err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
4003         if (err)
4004                 goto fail;
4005         bus->alp_only = false;
4006
4007         /* Start the watchdog timer */
4008         bus->sdcnt.tickcnt = 0;
4009         brcmf_sdio_wd_timer(bus, true);
4010
4011         sdio_claim_host(sdiodev->func[1]);
4012
4013         /* Make sure backplane clock is on, needed to generate F2 interrupt */
4014         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4015         if (bus->clkstate != CLK_AVAIL)
4016                 goto release;
4017
4018         /* Force clocks on backplane to be sure F2 interrupt propagates */
4019         saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4020         if (!err) {
4021                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4022                                   (saveclk | SBSDIO_FORCE_HT), &err);
4023         }
4024         if (err) {
4025                 brcmf_err("Failed to force clock for F2: err %d\n", err);
4026                 goto release;
4027         }
4028
4029         /* Enable function 2 (frame transfers) */
4030         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
4031                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
4032         err = sdio_enable_func(sdiodev->func[SDIO_FUNC_2]);
4033
4034
4035         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4036
4037         /* If F2 successfully enabled, set core and enable interrupts */
4038         if (!err) {
4039                 /* Set up the interrupt mask and enable interrupts */
4040                 bus->hostintmask = HOSTINTMASK;
4041                 w_sdreg32(bus, bus->hostintmask,
4042                           offsetof(struct sdpcmd_regs, hostintmask));
4043
4044                 brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
4045         } else {
4046                 /* Disable F2 again */
4047                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
4048                 goto release;
4049         }
4050
4051         if (brcmf_chip_sr_capable(bus->ci)) {
4052                 brcmf_sdio_sr_init(bus);
4053         } else {
4054                 /* Restore previous clock setting */
4055                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4056                                   saveclk, &err);
4057         }
4058
4059         if (err == 0) {
4060                 /* Allow full data communication using DPC from now on. */
4061                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
4062
4063                 err = brcmf_sdiod_intr_register(sdiodev);
4064                 if (err != 0)
4065                         brcmf_err("intr register failed:%d\n", err);
4066         }
4067
4068         /* If we didn't come up, turn off backplane clock */
4069         if (err != 0)
4070                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4071
4072         sdio_release_host(sdiodev->func[1]);
4073
4074         err = brcmf_bus_started(dev);
4075         if (err != 0) {
4076                 brcmf_err("dongle is not responding\n");
4077                 goto fail;
4078         }
4079         return;
4080
4081 release:
4082         sdio_release_host(sdiodev->func[1]);
4083 fail:
4084         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4085         device_release_driver(dev);
4086 }
4087
4088 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4089 {
4090         int ret;
4091         struct brcmf_sdio *bus;
4092         struct workqueue_struct *wq;
4093
4094         brcmf_dbg(TRACE, "Enter\n");
4095
4096         /* Allocate private bus interface state */
4097         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4098         if (!bus)
4099                 goto fail;
4100
4101         bus->sdiodev = sdiodev;
4102         sdiodev->bus = bus;
4103         skb_queue_head_init(&bus->glom);
4104         bus->txbound = BRCMF_TXBOUND;
4105         bus->rxbound = BRCMF_RXBOUND;
4106         bus->txminmax = BRCMF_TXMINMAX;
4107         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4108
4109         /* single-threaded workqueue */
4110         wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4111                                      dev_name(&sdiodev->func[1]->dev));
4112         if (!wq) {
4113                 brcmf_err("insufficient memory to create txworkqueue\n");
4114                 goto fail;
4115         }
4116         brcmf_sdiod_freezer_count(sdiodev);
4117         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4118         bus->brcmf_wq = wq;
4119
4120         /* attempt to attach to the dongle */
4121         if (!(brcmf_sdio_probe_attach(bus))) {
4122                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4123                 goto fail;
4124         }
4125
4126         spin_lock_init(&bus->rxctl_lock);
4127         spin_lock_init(&bus->txq_lock);
4128         init_waitqueue_head(&bus->ctrl_wait);
4129         init_waitqueue_head(&bus->dcmd_resp_wait);
4130
4131         /* Set up the watchdog timer */
4132         init_timer(&bus->timer);
4133         bus->timer.data = (unsigned long)bus;
4134         bus->timer.function = brcmf_sdio_watchdog;
4135
4136         /* Initialize watchdog thread */
4137         init_completion(&bus->watchdog_wait);
4138         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4139                                         bus, "brcmf_wdog/%s",
4140                                         dev_name(&sdiodev->func[1]->dev));
4141         if (IS_ERR(bus->watchdog_tsk)) {
4142                 pr_warn("brcmf_watchdog thread failed to start\n");
4143                 bus->watchdog_tsk = NULL;
4144         }
4145         /* Initialize DPC thread */
4146         bus->dpc_triggered = false;
4147         bus->dpc_running = false;
4148
4149         /* Assign bus interface call back */
4150         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4151         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4152         bus->sdiodev->bus_if->chip = bus->ci->chip;
4153         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4154
4155         /* default sdio bus header length for tx packet */
4156         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4157
4158         /* Attach to the common layer, reserve hdr space */
4159         ret = brcmf_attach(bus->sdiodev->dev, bus->sdiodev->settings);
4160         if (ret != 0) {
4161                 brcmf_err("brcmf_attach failed\n");
4162                 goto fail;
4163         }
4164
4165         /* allocate scatter-gather table. sg support
4166          * will be disabled upon allocation failure.
4167          */
4168         brcmf_sdiod_sgtable_alloc(bus->sdiodev);
4169
4170         /* Query the F2 block size, set roundup accordingly */
4171         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4172         bus->roundup = min(max_roundup, bus->blocksize);
4173
4174         /* Allocate buffers */
4175         if (bus->sdiodev->bus_if->maxctl) {
4176                 bus->sdiodev->bus_if->maxctl += bus->roundup;
4177                 bus->rxblen =
4178                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4179                             ALIGNMENT) + bus->head_align;
4180                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4181                 if (!(bus->rxbuf)) {
4182                         brcmf_err("rxbuf allocation failed\n");
4183                         goto fail;
4184                 }
4185         }
4186
4187         sdio_claim_host(bus->sdiodev->func[1]);
4188
4189         /* Disable F2 to clear any intermediate frame state on the dongle */
4190         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4191
4192         bus->rxflow = false;
4193
4194         /* Done with backplane-dependent accesses, can drop clock... */
4195         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4196
4197         sdio_release_host(bus->sdiodev->func[1]);
4198
4199         /* ...and initialize clock/power states */
4200         bus->clkstate = CLK_SDONLY;
4201         bus->idletime = BRCMF_IDLE_INTERVAL;
4202         bus->idleclock = BRCMF_IDLE_ACTIVE;
4203
4204         /* SR state */
4205         bus->sr_enabled = false;
4206
4207         brcmf_sdio_debugfs_create(bus);
4208         brcmf_dbg(INFO, "completed!!\n");
4209
4210         ret = brcmf_fw_map_chip_to_name(bus->ci->chip, bus->ci->chiprev,
4211                                         brcmf_sdio_fwnames,
4212                                         ARRAY_SIZE(brcmf_sdio_fwnames),
4213                                         sdiodev->fw_name, sdiodev->nvram_name);
4214         if (ret)
4215                 goto fail;
4216
4217         ret = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM,
4218                                      sdiodev->fw_name, sdiodev->nvram_name,
4219                                      brcmf_sdio_firmware_callback);
4220         if (ret != 0) {
4221                 brcmf_err("async firmware request failed: %d\n", ret);
4222                 goto fail;
4223         }
4224
4225         return bus;
4226
4227 fail:
4228         brcmf_sdio_remove(bus);
4229         return NULL;
4230 }
4231
4232 /* Detach and free everything */
4233 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4234 {
4235         brcmf_dbg(TRACE, "Enter\n");
4236
4237         if (bus) {
4238                 /* De-register interrupt handler */
4239                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4240
4241                 brcmf_detach(bus->sdiodev->dev);
4242
4243                 cancel_work_sync(&bus->datawork);
4244                 if (bus->brcmf_wq)
4245                         destroy_workqueue(bus->brcmf_wq);
4246
4247                 if (bus->ci) {
4248                         if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4249                                 sdio_claim_host(bus->sdiodev->func[1]);
4250                                 brcmf_sdio_wd_timer(bus, false);
4251                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4252                                 /* Leave the device in state where it is
4253                                  * 'passive'. This is done by resetting all
4254                                  * necessary cores.
4255                                  */
4256                                 msleep(20);
4257                                 brcmf_chip_set_passive(bus->ci);
4258                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4259                                 sdio_release_host(bus->sdiodev->func[1]);
4260                         }
4261                         brcmf_chip_detach(bus->ci);
4262                 }
4263                 if (bus->sdiodev->settings)
4264                         brcmf_release_module_param(bus->sdiodev->settings);
4265
4266                 kfree(bus->rxbuf);
4267                 kfree(bus->hdrbuf);
4268                 kfree(bus);
4269         }
4270
4271         brcmf_dbg(TRACE, "Disconnected\n");
4272 }
4273
4274 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, bool active)
4275 {
4276         /* Totally stop the timer */
4277         if (!active && bus->wd_active) {
4278                 del_timer_sync(&bus->timer);
4279                 bus->wd_active = false;
4280                 return;
4281         }
4282
4283         /* don't start the wd until fw is loaded */
4284         if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4285                 return;
4286
4287         if (active) {
4288                 if (!bus->wd_active) {
4289                         /* Create timer again when watchdog period is
4290                            dynamically changed or in the first instance
4291                          */
4292                         bus->timer.expires = jiffies + BRCMF_WD_POLL;
4293                         add_timer(&bus->timer);
4294                         bus->wd_active = true;
4295                 } else {
4296                         /* Re arm the timer, at last watchdog period */
4297                         mod_timer(&bus->timer, jiffies + BRCMF_WD_POLL);
4298                 }
4299         }
4300 }
4301
4302 int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4303 {
4304         int ret;
4305
4306         sdio_claim_host(bus->sdiodev->func[1]);
4307         ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4308         sdio_release_host(bus->sdiodev->func[1]);
4309
4310         return ret;
4311 }
4312