drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c

   1 /*
   2  * Copyright (c) 2010 Broadcom Corporation
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/atomic.h>
  19 #include <linux/kernel.h>
  20 #include <linux/kthread.h>
  21 #include <linux/printk.h>
  22 #include <linux/pci_ids.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/sched/signal.h>
  26 #include <linux/mmc/sdio.h>
  27 #include <linux/mmc/sdio_ids.h>
  28 #include <linux/mmc/sdio_func.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/semaphore.h>
  31 #include <linux/firmware.h>
  32 #include <linux/module.h>
  33 #include <linux/bcma/bcma.h>
  34 #include <linux/debugfs.h>
  35 #include <linux/vmalloc.h>
  36 #include <asm/unaligned.h>
  37 #include <defs.h>
  38 #include <brcmu_wifi.h>
  39 #include <brcmu_utils.h>
  40 #include <brcm_hw_ids.h>
  41 #include <soc.h>
  42 #include "sdio.h"
  43 #include "chip.h"
  44 #include "firmware.h"
  45 #include "core.h"
  46 #include "common.h"
  47
  48 #define DCMD_RESP_TIMEOUT       msecs_to_jiffies(2500)
  49 #define CTL_DONE_TIMEOUT        msecs_to_jiffies(2500)
  50
  51 #ifdef DEBUG
  52
  53 #define BRCMF_TRAP_INFO_SIZE    80
  54
  55 #define CBUF_LEN        (128)
  56
  57 /* Device console log buffer state */
  58 #define CONSOLE_BUFFER_MAX      2024
  59
  60 struct rte_log_le {
  61         __le32 buf;             /* Can't be pointer on (64-bit) hosts */
  62         __le32 buf_size;
  63         __le32 idx;
  64         char *_buf_compat;      /* Redundant pointer for backward compat. */
  65 };
  66
  67 struct rte_console {
  68         /* Virtual UART
  69          * When there is no UART (e.g. Quickturn),
  70          * the host should write a complete
  71          * input line directly into cbuf and then write
  72          * the length into vcons_in.
  73          * This may also be used when there is a real UART
  74          * (at risk of conflicting with
  75          * the real UART).  vcons_out is currently unused.
  76          */
  77         uint vcons_in;
  78         uint vcons_out;
  79
  80         /* Output (logging) buffer
  81          * Console output is written to a ring buffer log_buf at index log_idx.
  82          * The host may read the output when it sees log_idx advance.
  83          * Output will be lost if the output wraps around faster than the host
  84          * polls.
  85          */
  86         struct rte_log_le log_le;
  87
  88         /* Console input line buffer
  89          * Characters are read one at a time into cbuf
  90          * until <CR> is received, then
  91          * the buffer is processed as a command line.
  92          * Also used for virtual UART.
  93          */
  94         uint cbuf_idx;
  95         char cbuf[CBUF_LEN];
  96 };
  97
  98 #endif                          /* DEBUG */
  99 #include <chipcommon.h>
 100
 101 #include "bus.h"
 102 #include "debug.h"
 103 #include "tracepoint.h"
 104
 105 #define TXQLEN          2048    /* bulk tx queue length */
 106 #define TXHI            (TXQLEN - 256)  /* turn on flow control above TXHI */
 107 #define TXLOW           (TXHI - 256)    /* turn off flow control below TXLOW */
 108 #define PRIOMASK        7
 109
 110 #define TXRETRIES       2       /* # of retries for tx frames */
 111
 112 #define BRCMF_RXBOUND   50      /* Default for max rx frames in
 113                                  one scheduling */
 114
 115 #define BRCMF_TXBOUND   20      /* Default for max tx frames in
 116                                  one scheduling */
 117
 118 #define BRCMF_TXMINMAX  1       /* Max tx frames if rx still pending */
 119
 120 #define MEMBLOCK        2048    /* Block size used for downloading
 121                                  of dongle image */
 122 #define MAX_DATA_BUF    (32 * 1024)     /* Must be large enough to hold
 123                                  biggest possible glom */
 124
 125 #define BRCMF_FIRSTREAD (1 << 6)
 126
 127 #define BRCMF_CONSOLE   10      /* watchdog interval to poll console */
 128
 129 /* SBSDIO_DEVICE_CTL */
 130
 131 /* 1: device will assert busy signal when receiving CMD53 */
 132 #define SBSDIO_DEVCTL_SETBUSY           0x01
 133 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
 134 #define SBSDIO_DEVCTL_SPI_INTR_SYNC     0x02
 135 /* 1: mask all interrupts to host except the chipActive (rev 8) */
 136 #define SBSDIO_DEVCTL_CA_INT_ONLY       0x04
 137 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
 138  * sdio bus power cycle to clear (rev 9) */
 139 #define SBSDIO_DEVCTL_PADS_ISO          0x08
 140 /* Force SD->SB reset mapping (rev 11) */
 141 #define SBSDIO_DEVCTL_SB_RST_CTL        0x30
 142 /*   Determined by CoreControl bit */
 143 #define SBSDIO_DEVCTL_RST_CORECTL       0x00
 144 /*   Force backplane reset */
 145 #define SBSDIO_DEVCTL_RST_BPRESET       0x10
 146 /*   Force no backplane reset */
 147 #define SBSDIO_DEVCTL_RST_NOBPRESET     0x20
 148
 149 /* direct(mapped) cis space */
 150
 151 /* MAPPED common CIS address */
 152 #define SBSDIO_CIS_BASE_COMMON          0x1000
 153 /* maximum bytes in one CIS */
 154 #define SBSDIO_CIS_SIZE_LIMIT           0x200
 155 /* cis offset addr is < 17 bits */
 156 #define SBSDIO_CIS_OFT_ADDR_MASK        0x1FFFF
 157
 158 /* manfid tuple length, include tuple, link bytes */
 159 #define SBSDIO_CIS_MANFID_TUPLE_LEN     6
 160
 161 #define CORE_BUS_REG(base, field) \
 162                 (base + offsetof(struct sdpcmd_regs, field))
 163
 164 /* SDIO function 1 register CHIPCLKCSR */
 165 /* Force ALP request to backplane */
 166 #define SBSDIO_FORCE_ALP                0x01
 167 /* Force HT request to backplane */
 168 #define SBSDIO_FORCE_HT                 0x02
 169 /* Force ILP request to backplane */
 170 #define SBSDIO_FORCE_ILP                0x04
 171 /* Make ALP ready (power up xtal) */
 172 #define SBSDIO_ALP_AVAIL_REQ            0x08
 173 /* Make HT ready (power up PLL) */
 174 #define SBSDIO_HT_AVAIL_REQ             0x10
 175 /* Squelch clock requests from HW */
 176 #define SBSDIO_FORCE_HW_CLKREQ_OFF      0x20
 177 /* Status: ALP is ready */
 178 #define SBSDIO_ALP_AVAIL                0x40
 179 /* Status: HT is ready */
 180 #define SBSDIO_HT_AVAIL                 0x80
 181 #define SBSDIO_CSR_MASK                 0x1F
 182 #define SBSDIO_AVBITS           (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
 183 #define SBSDIO_ALPAV(regval)    ((regval) & SBSDIO_AVBITS)
 184 #define SBSDIO_HTAV(regval)     (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
 185 #define SBSDIO_ALPONLY(regval)  (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
 186 #define SBSDIO_CLKAV(regval, alponly) \
 187         (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
 188
 189 /* intstatus */
 190 #define I_SMB_SW0       (1 << 0)        /* To SB Mail S/W interrupt 0 */
 191 #define I_SMB_SW1       (1 << 1)        /* To SB Mail S/W interrupt 1 */
 192 #define I_SMB_SW2       (1 << 2)        /* To SB Mail S/W interrupt 2 */
 193 #define I_SMB_SW3       (1 << 3)        /* To SB Mail S/W interrupt 3 */
 194 #define I_SMB_SW_MASK   0x0000000f      /* To SB Mail S/W interrupts mask */
 195 #define I_SMB_SW_SHIFT  0       /* To SB Mail S/W interrupts shift */
 196 #define I_HMB_SW0       (1 << 4)        /* To Host Mail S/W interrupt 0 */
 197 #define I_HMB_SW1       (1 << 5)        /* To Host Mail S/W interrupt 1 */
 198 #define I_HMB_SW2       (1 << 6)        /* To Host Mail S/W interrupt 2 */
 199 #define I_HMB_SW3       (1 << 7)        /* To Host Mail S/W interrupt 3 */
 200 #define I_HMB_SW_MASK   0x000000f0      /* To Host Mail S/W interrupts mask */
 201 #define I_HMB_SW_SHIFT  4       /* To Host Mail S/W interrupts shift */
 202 #define I_WR_OOSYNC     (1 << 8)        /* Write Frame Out Of Sync */
 203 #define I_RD_OOSYNC     (1 << 9)        /* Read Frame Out Of Sync */
 204 #define I_PC            (1 << 10)       /* descriptor error */
 205 #define I_PD            (1 << 11)       /* data error */
 206 #define I_DE            (1 << 12)       /* Descriptor protocol Error */
 207 #define I_RU            (1 << 13)       /* Receive descriptor Underflow */
 208 #define I_RO            (1 << 14)       /* Receive fifo Overflow */
 209 #define I_XU            (1 << 15)       /* Transmit fifo Underflow */
 210 #define I_RI            (1 << 16)       /* Receive Interrupt */
 211 #define I_BUSPWR        (1 << 17)       /* SDIO Bus Power Change (rev 9) */
 212 #define I_XMTDATA_AVAIL (1 << 23)       /* bits in fifo */
 213 #define I_XI            (1 << 24)       /* Transmit Interrupt */
 214 #define I_RF_TERM       (1 << 25)       /* Read Frame Terminate */
 215 #define I_WF_TERM       (1 << 26)       /* Write Frame Terminate */
 216 #define I_PCMCIA_XU     (1 << 27)       /* PCMCIA Transmit FIFO Underflow */
 217 #define I_SBINT         (1 << 28)       /* sbintstatus Interrupt */
 218 #define I_CHIPACTIVE    (1 << 29)       /* chip from doze to active state */
 219 #define I_SRESET        (1 << 30)       /* CCCR RES interrupt */
 220 #define I_IOE2          (1U << 31)      /* CCCR IOE2 Bit Changed */
 221 #define I_ERRORS        (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
 222 #define I_DMA           (I_RI | I_XI | I_ERRORS)
 223
 224 /* corecontrol */
 225 #define CC_CISRDY               (1 << 0)        /* CIS Ready */
 226 #define CC_BPRESEN              (1 << 1)        /* CCCR RES signal */
 227 #define CC_F2RDY                (1 << 2)        /* set CCCR IOR2 bit */
 228 #define CC_CLRPADSISO           (1 << 3)        /* clear SDIO pads isolation */
 229 #define CC_XMTDATAAVAIL_MODE    (1 << 4)
 230 #define CC_XMTDATAAVAIL_CTRL    (1 << 5)
 231
 232 /* SDA_FRAMECTRL */
 233 #define SFC_RF_TERM     (1 << 0)        /* Read Frame Terminate */
 234 #define SFC_WF_TERM     (1 << 1)        /* Write Frame Terminate */
 235 #define SFC_CRC4WOOS    (1 << 2)        /* CRC error for write out of sync */
 236 #define SFC_ABORTALL    (1 << 3)        /* Abort all in-progress frames */
 237
 238 /*
 239  * Software allocation of To SB Mailbox resources
 240  */
 241
 242 /* tosbmailbox bits corresponding to intstatus bits */
 243 #define SMB_NAK         (1 << 0)        /* Frame NAK */
 244 #define SMB_INT_ACK     (1 << 1)        /* Host Interrupt ACK */
 245 #define SMB_USE_OOB     (1 << 2)        /* Use OOB Wakeup */
 246 #define SMB_DEV_INT     (1 << 3)        /* Miscellaneous Interrupt */
 247
 248 /* tosbmailboxdata */
 249 #define SMB_DATA_VERSION_SHIFT  16      /* host protocol version */
 250
 251 /*
 252  * Software allocation of To Host Mailbox resources
 253  */
 254
 255 /* intstatus bits */
 256 #define I_HMB_FC_STATE  I_HMB_SW0       /* Flow Control State */
 257 #define I_HMB_FC_CHANGE I_HMB_SW1       /* Flow Control State Changed */
 258 #define I_HMB_FRAME_IND I_HMB_SW2       /* Frame Indication */
 259 #define I_HMB_HOST_INT  I_HMB_SW3       /* Miscellaneous Interrupt */
 260
 261 /* tohostmailboxdata */
 262 #define HMB_DATA_NAKHANDLED     1       /* retransmit NAK'd frame */
 263 #define HMB_DATA_DEVREADY       2       /* talk to host after enable */
 264 #define HMB_DATA_FC             4       /* per prio flowcontrol update flag */
 265 #define HMB_DATA_FWREADY        8       /* fw ready for protocol activity */
 266
 267 #define HMB_DATA_FCDATA_MASK    0xff000000
 268 #define HMB_DATA_FCDATA_SHIFT   24
 269
 270 #define HMB_DATA_VERSION_MASK   0x00ff0000
 271 #define HMB_DATA_VERSION_SHIFT  16
 272
 273 /*
 274  * Software-defined protocol header
 275  */
 276
 277 /* Current protocol version */
 278 #define SDPCM_PROT_VERSION      4
 279
 280 /*
 281  * Shared structure between dongle and the host.
 282  * The structure contains pointers to trap or assert information.
 283  */
 284 #define SDPCM_SHARED_VERSION       0x0003
 285 #define SDPCM_SHARED_VERSION_MASK  0x00FF
 286 #define SDPCM_SHARED_ASSERT_BUILT  0x0100
 287 #define SDPCM_SHARED_ASSERT        0x0200
 288 #define SDPCM_SHARED_TRAP          0x0400
 289
 290 /* Space for header read, limit for data packets */
 291 #define MAX_HDR_READ    (1 << 6)
 292 #define MAX_RX_DATASZ   2048
 293
 294 /* Bump up limit on waiting for HT to account for first startup;
 295  * if the image is doing a CRC calculation before programming the PMU
 296  * for HT availability, it could take a couple hundred ms more, so
 297  * max out at a 1 second (1000000us).
 298  */
 299 #undef PMU_MAX_TRANSITION_DLY
 300 #define PMU_MAX_TRANSITION_DLY 1000000
 301
 302 /* Value for ChipClockCSR during initial setup */
 303 #define BRCMF_INIT_CLKCTL1      (SBSDIO_FORCE_HW_CLKREQ_OFF |   \
 304                                         SBSDIO_ALP_AVAIL_REQ)
 305
 306 /* Flags for SDH calls */
 307 #define F2SYNC  (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
 308
 309 #define BRCMF_IDLE_ACTIVE       0       /* Do not request any SD clock change
 310                                          * when idle
 311                                          */
 312 #define BRCMF_IDLE_INTERVAL     1
 313
 314 #define KSO_WAIT_US 50
 315 #define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
 316 #define BRCMF_SDIO_MAX_ACCESS_ERRORS    5
 317
 318 /*
 319  * Conversion of 802.1D priority to precedence level
 320  */
 321 static uint prio2prec(u32 prio)
 322 {
 323         return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
 324                (prio^2) : prio;
 325 }
 326
 327 #ifdef DEBUG
 328 /* Device console log buffer state */
 329 struct brcmf_console {
 330         uint count;             /* Poll interval msec counter */
 331         uint log_addr;          /* Log struct address (fixed) */
 332         struct rte_log_le log_le;       /* Log struct (host copy) */
 333         uint bufsize;           /* Size of log buffer */
 334         u8 *buf;                /* Log buffer (host copy) */
 335         uint last;              /* Last buffer read index */
 336 };
 337
 338 struct brcmf_trap_info {
 339         __le32          type;
 340         __le32          epc;
 341         __le32          cpsr;
 342         __le32          spsr;
 343         __le32          r0;     /* a1 */
 344         __le32          r1;     /* a2 */
 345         __le32          r2;     /* a3 */
 346         __le32          r3;     /* a4 */
 347         __le32          r4;     /* v1 */
 348         __le32          r5;     /* v2 */
 349         __le32          r6;     /* v3 */
 350         __le32          r7;     /* v4 */
 351         __le32          r8;     /* v5 */
 352         __le32          r9;     /* sb/v6 */
 353         __le32          r10;    /* sl/v7 */
 354         __le32          r11;    /* fp/v8 */
 355         __le32          r12;    /* ip */
 356         __le32          r13;    /* sp */
 357         __le32          r14;    /* lr */
 358         __le32          pc;     /* r15 */
 359 };
 360 #endif                          /* DEBUG */
 361
 362 struct sdpcm_shared {
 363         u32 flags;
 364         u32 trap_addr;
 365         u32 assert_exp_addr;
 366         u32 assert_file_addr;
 367         u32 assert_line;
 368         u32 console_addr;       /* Address of struct rte_console */
 369         u32 msgtrace_addr;
 370         u8 tag[32];
 371         u32 brpt_addr;
 372 };
 373
 374 struct sdpcm_shared_le {
 375         __le32 flags;
 376         __le32 trap_addr;
 377         __le32 assert_exp_addr;
 378         __le32 assert_file_addr;
 379         __le32 assert_line;
 380         __le32 console_addr;    /* Address of struct rte_console */
 381         __le32 msgtrace_addr;
 382         u8 tag[32];
 383         __le32 brpt_addr;
 384 };
 385
 386 /* dongle SDIO bus specific header info */
 387 struct brcmf_sdio_hdrinfo {
 388         u8 seq_num;
 389         u8 channel;
 390         u16 len;
 391         u16 len_left;
 392         u16 len_nxtfrm;
 393         u8 dat_offset;
 394         bool lastfrm;
 395         u16 tail_pad;
 396 };
 397
 398 /*
 399  * hold counter variables
 400  */
 401 struct brcmf_sdio_count {
 402         uint intrcount;         /* Count of device interrupt callbacks */
 403         uint lastintrs;         /* Count as of last watchdog timer */
 404         uint pollcnt;           /* Count of active polls */
 405         uint regfails;          /* Count of R_REG failures */
 406         uint tx_sderrs;         /* Count of tx attempts with sd errors */
 407         uint fcqueued;          /* Tx packets that got queued */
 408         uint rxrtx;             /* Count of rtx requests (NAK to dongle) */
 409         uint rx_toolong;        /* Receive frames too long to receive */
 410         uint rxc_errors;        /* SDIO errors when reading control frames */
 411         uint rx_hdrfail;        /* SDIO errors on header reads */
 412         uint rx_badhdr;         /* Bad received headers (roosync?) */
 413         uint rx_badseq;         /* Mismatched rx sequence number */
 414         uint fc_rcvd;           /* Number of flow-control events received */
 415         uint fc_xoff;           /* Number which turned on flow-control */
 416         uint fc_xon;            /* Number which turned off flow-control */
 417         uint rxglomfail;        /* Failed deglom attempts */
 418         uint rxglomframes;      /* Number of glom frames (superframes) */
 419         uint rxglompkts;        /* Number of packets from glom frames */
 420         uint f2rxhdrs;          /* Number of header reads */
 421         uint f2rxdata;          /* Number of frame data reads */
 422         uint f2txdata;          /* Number of f2 frame writes */
 423         uint f1regdata;         /* Number of f1 register accesses */
 424         uint tickcnt;           /* Number of watchdog been schedule */
 425         ulong tx_ctlerrs;       /* Err of sending ctrl frames */
 426         ulong tx_ctlpkts;       /* Ctrl frames sent to dongle */
 427         ulong rx_ctlerrs;       /* Err of processing rx ctrl frames */
 428         ulong rx_ctlpkts;       /* Ctrl frames processed from dongle */
 429         ulong rx_readahead_cnt; /* packets where header read-ahead was used */
 430 };
 431
 432 /* misc chip info needed by some of the routines */
 433 /* Private data for SDIO bus interaction */
 434 struct brcmf_sdio {
 435         struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
 436         struct brcmf_chip *ci;  /* Chip info struct */
 437
 438         u32 hostintmask;        /* Copy of Host Interrupt Mask */
 439         atomic_t intstatus;     /* Intstatus bits (events) pending */
 440         atomic_t fcstate;       /* State of dongle flow-control */
 441
 442         uint blocksize;         /* Block size of SDIO transfers */
 443         uint roundup;           /* Max roundup limit */
 444
 445         struct pktq txq;        /* Queue length used for flow-control */
 446         u8 flowcontrol; /* per prio flow control bitmask */
 447         u8 tx_seq;              /* Transmit sequence number (next) */
 448         u8 tx_max;              /* Maximum transmit sequence allowed */
 449
 450         u8 *hdrbuf;             /* buffer for handling rx frame */
 451         u8 *rxhdr;              /* Header of current rx frame (in hdrbuf) */
 452         u8 rx_seq;              /* Receive sequence number (expected) */
 453         struct brcmf_sdio_hdrinfo cur_read;
 454                                 /* info of current read frame */
 455         bool rxskip;            /* Skip receive (awaiting NAK ACK) */
 456         bool rxpending;         /* Data frame pending in dongle */
 457
 458         uint rxbound;           /* Rx frames to read before resched */
 459         uint txbound;           /* Tx frames to send before resched */
 460         uint txminmax;
 461
 462         struct sk_buff *glomd;  /* Packet containing glomming descriptor */
 463         struct sk_buff_head glom; /* Packet list for glommed superframe */
 464
 465         u8 *rxbuf;              /* Buffer for receiving control packets */
 466         uint rxblen;            /* Allocated length of rxbuf */
 467         u8 *rxctl;              /* Aligned pointer into rxbuf */
 468         u8 *rxctl_orig;         /* pointer for freeing rxctl */
 469         uint rxlen;             /* Length of valid data in buffer */
 470         spinlock_t rxctl_lock;  /* protection lock for ctrl frame resources */
 471
 472         u8 sdpcm_ver;   /* Bus protocol reported by dongle */
 473
 474         bool intr;              /* Use interrupts */
 475         bool poll;              /* Use polling */
 476         atomic_t ipend;         /* Device interrupt is pending */
 477         uint spurious;          /* Count of spurious interrupts */
 478         uint pollrate;          /* Ticks between device polls */
 479         uint polltick;          /* Tick counter */
 480
 481 #ifdef DEBUG
 482         uint console_interval;
 483         struct brcmf_console console;   /* Console output polling support */
 484         uint console_addr;      /* Console address from shared struct */
 485 #endif                          /* DEBUG */
 486
 487         uint clkstate;          /* State of sd and backplane clock(s) */
 488         s32 idletime;           /* Control for activity timeout */
 489         s32 idlecount;          /* Activity timeout counter */
 490         s32 idleclock;          /* How to set bus driver when idle */
 491         bool rxflow_mode;       /* Rx flow control mode */
 492         bool rxflow;            /* Is rx flow control on */
 493         bool alp_only;          /* Don't use HT clock (ALP only) */
 494
 495         u8 *ctrl_frame_buf;
 496         u16 ctrl_frame_len;
 497         bool ctrl_frame_stat;
 498         int ctrl_frame_err;
 499
 500         spinlock_t txq_lock;            /* protect bus->txq */
 501         wait_queue_head_t ctrl_wait;
 502         wait_queue_head_t dcmd_resp_wait;
 503
 504         struct timer_list timer;
 505         struct completion watchdog_wait;
 506         struct task_struct *watchdog_tsk;
 507         bool wd_active;
 508
 509         struct workqueue_struct *brcmf_wq;
 510         struct work_struct datawork;
 511         bool dpc_triggered;
 512         bool dpc_running;
 513
 514         bool txoff;             /* Transmit flow-controlled */
 515         struct brcmf_sdio_count sdcnt;
 516         bool sr_enabled; /* SaveRestore enabled */
 517         bool sleeping;
 518
 519         u8 tx_hdrlen;           /* sdio bus header length for tx packet */
 520         bool txglom;            /* host tx glomming enable flag */
 521         u16 head_align;         /* buffer pointer alignment */
 522         u16 sgentry_align;      /* scatter-gather buffer alignment */
 523 };
 524
 525 /* clkstate */
 526 #define CLK_NONE        0
 527 #define CLK_SDONLY      1
 528 #define CLK_PENDING     2
 529 #define CLK_AVAIL       3
 530
 531 #ifdef DEBUG
 532 static int qcount[NUMPRIO];
 533 #endif                          /* DEBUG */
 534
 535 #define DEFAULT_SDIO_DRIVE_STRENGTH     6       /* in milliamps */
 536
 537 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
 538
 539 /* Limit on rounding up frames */
 540 static const uint max_roundup = 512;
 541
 542 #define ALIGNMENT  4
 543
 544 enum brcmf_sdio_frmtype {
 545         BRCMF_SDIO_FT_NORMAL,
 546         BRCMF_SDIO_FT_SUPER,
 547         BRCMF_SDIO_FT_SUB,
 548 };
 549
 550 #define SDIOD_DRVSTR_KEY(chip, pmu)     (((chip) << 16) | (pmu))
 551
 552 /* SDIO Pad drive strength to select value mappings */
 553 struct sdiod_drive_str {
 554         u8 strength;    /* Pad Drive Strength in mA */
 555         u8 sel;         /* Chip-specific select value */
 556 };
 557
 558 /* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8V) */
 559 static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
 560         {32, 0x6},
 561         {26, 0x7},
 562         {22, 0x4},
 563         {16, 0x5},
 564         {12, 0x2},
 565         {8, 0x3},
 566         {4, 0x0},
 567         {0, 0x1}
 568 };
 569
 570 /* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
 571 static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
 572         {6, 0x7},
 573         {5, 0x6},
 574         {4, 0x5},
 575         {3, 0x4},
 576         {2, 0x2},
 577         {1, 0x1},
 578         {0, 0x0}
 579 };
 580
 581 /* SDIO Drive Strength to sel value table for PMU Rev 17 (1.8v) */
 582 static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
 583         {3, 0x3},
 584         {2, 0x2},
 585         {1, 0x1},
 586         {0, 0x0} };
 587
 588 /* SDIO Drive Strength to sel value table for 43143 PMU Rev 17 (3.3V) */
 589 static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
 590         {16, 0x7},
 591         {12, 0x5},
 592         {8,  0x3},
 593         {4,  0x1}
 594 };
 595
 596 BRCMF_FW_NVRAM_DEF(43143, "brcmfmac43143-sdio.bin", "brcmfmac43143-sdio.txt");
 597 BRCMF_FW_NVRAM_DEF(43241B0, "brcmfmac43241b0-sdio.bin",
 598                    "brcmfmac43241b0-sdio.txt");
 599 BRCMF_FW_NVRAM_DEF(43241B4, "brcmfmac43241b4-sdio.bin",
 600                    "brcmfmac43241b4-sdio.txt");
 601 BRCMF_FW_NVRAM_DEF(43241B5, "brcmfmac43241b5-sdio.bin",
 602                    "brcmfmac43241b5-sdio.txt");
 603 BRCMF_FW_NVRAM_DEF(4329, "brcmfmac4329-sdio.bin", "brcmfmac4329-sdio.txt");
 604 BRCMF_FW_NVRAM_DEF(4330, "brcmfmac4330-sdio.bin", "brcmfmac4330-sdio.txt");
 605 BRCMF_FW_NVRAM_DEF(4334, "brcmfmac4334-sdio.bin", "brcmfmac4334-sdio.txt");
 606 BRCMF_FW_NVRAM_DEF(43340, "brcmfmac43340-sdio.bin", "brcmfmac43340-sdio.txt");
 607 BRCMF_FW_NVRAM_DEF(4335, "brcmfmac4335-sdio.bin", "brcmfmac4335-sdio.txt");
 608 BRCMF_FW_NVRAM_DEF(43362, "brcmfmac43362-sdio.bin", "brcmfmac43362-sdio.txt");
 609 BRCMF_FW_NVRAM_DEF(4339, "brcmfmac4339-sdio.bin", "brcmfmac4339-sdio.txt");
 610 BRCMF_FW_NVRAM_DEF(43430, "brcmfmac43430-sdio.bin", "brcmfmac43430-sdio.txt");
 611 BRCMF_FW_NVRAM_DEF(43455, "brcmfmac43455-sdio.bin", "brcmfmac43455-sdio.txt");
 612 BRCMF_FW_NVRAM_DEF(4354, "brcmfmac4354-sdio.bin", "brcmfmac4354-sdio.txt");
 613 BRCMF_FW_NVRAM_DEF(4356, "brcmfmac4356-sdio.bin", "brcmfmac4356-sdio.txt");
 614
 615 static struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
 616         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
 617         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
 618         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
 619         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
 620         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
 621         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
 622         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
 623         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
 624         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),
 625         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, 4335),
 626         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, 43362),
 627         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, 4339),
 628         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_43430_CHIP_ID, 0xFFFFFFFF, 43430),
 629         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4345_CHIP_ID, 0xFFFFFFC0, 43455),
 630         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, 4354),
 631         BRCMF_FW_NVRAM_ENTRY(BRCM_CC_4356_CHIP_ID, 0xFFFFFFFF, 4356)
 632 };
 633
 634 static void pkt_align(struct sk_buff *p, int len, int align)
 635 {
 636         uint datalign;
 637         datalign = (unsigned long)(p->data);
 638         datalign = roundup(datalign, (align)) - datalign;
 639         if (datalign)
 640                 skb_pull(p, datalign);
 641         __skb_trim(p, len);
 642 }
 643
 644 /* To check if there's window offered */
 645 static bool data_ok(struct brcmf_sdio *bus)
 646 {
 647         return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
 648                ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
 649 }
 650
 651 /*
 652  * Reads a register in the SDIO hardware block. This block occupies a series of
 653  * adresses on the 32 bit backplane bus.
 654  */
 655 static int r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 offset)
 656 {
 657         struct brcmf_core *core;
 658         int ret;
 659
 660         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 661         *regvar = brcmf_sdiod_regrl(bus->sdiodev, core->base + offset, &ret);
 662
 663         return ret;
 664 }
 665
 666 static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset)
 667 {
 668         struct brcmf_core *core;
 669         int ret;
 670
 671         core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
 672         brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret);
 673
 674         return ret;
 675 }
 676
 677 static int
 678 brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
 679 {
 680         u8 wr_val = 0, rd_val, cmp_val, bmask;
 681         int err = 0;
 682         int err_cnt = 0;
 683         int try_cnt = 0;
 684
 685         brcmf_dbg(TRACE, "Enter: on=%d\n", on);
 686
 687         wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
 688         /* 1st KSO write goes to AOS wake up core if device is asleep  */
 689         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 690                           wr_val, &err);
 691
 692         if (on) {
 693                 /* device WAKEUP through KSO:
 694                  * write bit 0 & read back until
 695                  * both bits 0 (kso bit) & 1 (dev on status) are set
 696                  */
 697                 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
 698                           SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
 699                 bmask = cmp_val;
 700                 usleep_range(2000, 3000);
 701         } else {
 702                 /* Put device to sleep, turn off KSO */
 703                 cmp_val = 0;
 704                 /* only check for bit0, bit1(dev on status) may not
 705                  * get cleared right away
 706                  */
 707                 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
 708         }
 709
 710         do {
 711                 /* reliable KSO bit set/clr:
 712                  * the sdiod sleep write access is synced to PMU 32khz clk
 713                  * just one write attempt may fail,
 714                  * read it back until it matches written value
 715                  */
 716                 rd_val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 717                                            &err);
 718                 if (!err) {
 719                         if ((rd_val & bmask) == cmp_val)
 720                                 break;
 721                         err_cnt = 0;
 722                 }
 723                 /* bail out upon subsequent access errors */
 724                 if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
 725                         break;
 726                 udelay(KSO_WAIT_US);
 727                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
 728                                   wr_val, &err);
 729         } while (try_cnt++ < MAX_KSO_ATTEMPTS);
 730
 731         if (try_cnt > 2)
 732                 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
 733                           rd_val, err);
 734
 735         if (try_cnt > MAX_KSO_ATTEMPTS)
 736                 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
 737
 738         return err;
 739 }
 740
 741 #define HOSTINTMASK             (I_HMB_SW_MASK | I_CHIPACTIVE)
 742
 743 /* Turn backplane clock on or off */
 744 static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
 745 {
 746         int err;
 747         u8 clkctl, clkreq, devctl;
 748         unsigned long timeout;
 749
 750         brcmf_dbg(SDIO, "Enter\n");
 751
 752         clkctl = 0;
 753
 754         if (bus->sr_enabled) {
 755                 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
 756                 return 0;
 757         }
 758
 759         if (on) {
 760                 /* Request HT Avail */
 761                 clkreq =
 762                     bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
 763
 764                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 765                                   clkreq, &err);
 766                 if (err) {
 767                         brcmf_err("HT Avail request error: %d\n", err);
 768                         return -EBADE;
 769                 }
 770
 771                 /* Check current status */
 772                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 773                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
 774                 if (err) {
 775                         brcmf_err("HT Avail read error: %d\n", err);
 776                         return -EBADE;
 777                 }
 778
 779                 /* Go to pending and await interrupt if appropriate */
 780                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
 781                         /* Allow only clock-available interrupt */
 782                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 783                                                    SBSDIO_DEVICE_CTL, &err);
 784                         if (err) {
 785                                 brcmf_err("Devctl error setting CA: %d\n",
 786                                           err);
 787                                 return -EBADE;
 788                         }
 789
 790                         devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
 791                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 792                                           devctl, &err);
 793                         brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
 794                         bus->clkstate = CLK_PENDING;
 795
 796                         return 0;
 797                 } else if (bus->clkstate == CLK_PENDING) {
 798                         /* Cancel CA-only interrupt filter */
 799                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 800                                                    SBSDIO_DEVICE_CTL, &err);
 801                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 802                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 803                                           devctl, &err);
 804                 }
 805
 806                 /* Otherwise, wait here (polling) for HT Avail */
 807                 timeout = jiffies +
 808                           msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
 809                 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 810                         clkctl = brcmf_sdiod_regrb(bus->sdiodev,
 811                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 812                                                    &err);
 813                         if (time_after(jiffies, timeout))
 814                                 break;
 815                         else
 816                                 usleep_range(5000, 10000);
 817                 }
 818                 if (err) {
 819                         brcmf_err("HT Avail request error: %d\n", err);
 820                         return -EBADE;
 821                 }
 822                 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
 823                         brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
 824                                   PMU_MAX_TRANSITION_DLY, clkctl);
 825                         return -EBADE;
 826                 }
 827
 828                 /* Mark clock available */
 829                 bus->clkstate = CLK_AVAIL;
 830                 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
 831
 832 #if defined(DEBUG)
 833                 if (!bus->alp_only) {
 834                         if (SBSDIO_ALPONLY(clkctl))
 835                                 brcmf_err("HT Clock should be on\n");
 836                 }
 837 #endif                          /* defined (DEBUG) */
 838
 839         } else {
 840                 clkreq = 0;
 841
 842                 if (bus->clkstate == CLK_PENDING) {
 843                         /* Cancel CA-only interrupt filter */
 844                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
 845                                                    SBSDIO_DEVICE_CTL, &err);
 846                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
 847                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
 848                                           devctl, &err);
 849                 }
 850
 851                 bus->clkstate = CLK_SDONLY;
 852                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
 853                                   clkreq, &err);
 854                 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
 855                 if (err) {
 856                         brcmf_err("Failed access turning clock off: %d\n",
 857                                   err);
 858                         return -EBADE;
 859                 }
 860         }
 861         return 0;
 862 }
 863
 864 /* Change idle/active SD state */
 865 static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
 866 {
 867         brcmf_dbg(SDIO, "Enter\n");
 868
 869         if (on)
 870                 bus->clkstate = CLK_SDONLY;
 871         else
 872                 bus->clkstate = CLK_NONE;
 873
 874         return 0;
 875 }
 876
 877 /* Transition SD and backplane clock readiness */
 878 static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
 879 {
 880 #ifdef DEBUG
 881         uint oldstate = bus->clkstate;
 882 #endif                          /* DEBUG */
 883
 884         brcmf_dbg(SDIO, "Enter\n");
 885
 886         /* Early exit if we're already there */
 887         if (bus->clkstate == target)
 888                 return 0;
 889
 890         switch (target) {
 891         case CLK_AVAIL:
 892                 /* Make sure SD clock is available */
 893                 if (bus->clkstate == CLK_NONE)
 894                         brcmf_sdio_sdclk(bus, true);
 895                 /* Now request HT Avail on the backplane */
 896                 brcmf_sdio_htclk(bus, true, pendok);
 897                 break;
 898
 899         case CLK_SDONLY:
 900                 /* Remove HT request, or bring up SD clock */
 901                 if (bus->clkstate == CLK_NONE)
 902                         brcmf_sdio_sdclk(bus, true);
 903                 else if (bus->clkstate == CLK_AVAIL)
 904                         brcmf_sdio_htclk(bus, false, false);
 905                 else
 906                         brcmf_err("request for %d -> %d\n",
 907                                   bus->clkstate, target);
 908                 break;
 909
 910         case CLK_NONE:
 911                 /* Make sure to remove HT request */
 912                 if (bus->clkstate == CLK_AVAIL)
 913                         brcmf_sdio_htclk(bus, false, false);
 914                 /* Now remove the SD clock */
 915                 brcmf_sdio_sdclk(bus, false);
 916                 break;
 917         }
 918 #ifdef DEBUG
 919         brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
 920 #endif                          /* DEBUG */
 921
 922         return 0;
 923 }
 924
 925 static int
 926 brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
 927 {
 928         int err = 0;
 929         u8 clkcsr;
 930
 931         brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
 932                   (sleep ? "SLEEP" : "WAKE"),
 933                   (bus->sleeping ? "SLEEP" : "WAKE"));
 934
 935         /* If SR is enabled control bus state with KSO */
 936         if (bus->sr_enabled) {
 937                 /* Done if we're already in the requested state */
 938                 if (sleep == bus->sleeping)
 939                         goto end;
 940
 941                 /* Going to sleep */
 942                 if (sleep) {
 943                         clkcsr = brcmf_sdiod_regrb(bus->sdiodev,
 944                                                    SBSDIO_FUNC1_CHIPCLKCSR,
 945                                                    &err);
 946                         if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
 947                                 brcmf_dbg(SDIO, "no clock, set ALP\n");
 948                                 brcmf_sdiod_regwb(bus->sdiodev,
 949                                                   SBSDIO_FUNC1_CHIPCLKCSR,
 950                                                   SBSDIO_ALP_AVAIL_REQ, &err);
 951                         }
 952                         err = brcmf_sdio_kso_control(bus, false);
 953                 } else {
 954                         err = brcmf_sdio_kso_control(bus, true);
 955                 }
 956                 if (err) {
 957                         brcmf_err("error while changing bus sleep state %d\n",
 958                                   err);
 959                         goto done;
 960                 }
 961         }
 962
 963 end:
 964         /* control clocks */
 965         if (sleep) {
 966                 if (!bus->sr_enabled)
 967                         brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
 968         } else {
 969                 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
 970                 brcmf_sdio_wd_timer(bus, true);
 971         }
 972         bus->sleeping = sleep;
 973         brcmf_dbg(SDIO, "new state %s\n",
 974                   (sleep ? "SLEEP" : "WAKE"));
 975 done:
 976         brcmf_dbg(SDIO, "Exit: err=%d\n", err);
 977         return err;
 978
 979 }
 980
 981 #ifdef DEBUG
 982 static inline bool brcmf_sdio_valid_shared_address(u32 addr)
 983 {
 984         return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
 985 }
 986
 987 static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
 988                                  struct sdpcm_shared *sh)
 989 {
 990         u32 addr = 0;
 991         int rv;
 992         u32 shaddr = 0;
 993         struct sdpcm_shared_le sh_le;
 994         __le32 addr_le;
 995
 996         sdio_claim_host(bus->sdiodev->func[1]);
 997         brcmf_sdio_bus_sleep(bus, false, false);
 998
 999         /*
1000          * Read last word in socram to determine
1001          * address of sdpcm_shared structure
1002          */
1003         shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
1004         if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
1005                 shaddr -= bus->ci->srsize;
1006         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
1007                                (u8 *)&addr_le, 4);
1008         if (rv < 0)
1009                 goto fail;
1010
1011         /*
1012          * Check if addr is valid.
1013          * NVRAM length at the end of memory should have been overwritten.
1014          */
1015         addr = le32_to_cpu(addr_le);
1016         if (!brcmf_sdio_valid_shared_address(addr)) {
1017                 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1018                 rv = -EINVAL;
1019                 goto fail;
1020         }
1021
1022         brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1023
1024         /* Read hndrte_shared structure */
1025         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1026                                sizeof(struct sdpcm_shared_le));
1027         if (rv < 0)
1028                 goto fail;
1029
1030         sdio_release_host(bus->sdiodev->func[1]);
1031
1032         /* Endianness */
1033         sh->flags = le32_to_cpu(sh_le.flags);
1034         sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1035         sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1036         sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1037         sh->assert_line = le32_to_cpu(sh_le.assert_line);
1038         sh->console_addr = le32_to_cpu(sh_le.console_addr);
1039         sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1040
1041         if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1042                 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1043                           SDPCM_SHARED_VERSION,
1044                           sh->flags & SDPCM_SHARED_VERSION_MASK);
1045                 return -EPROTO;
1046         }
1047         return 0;
1048
1049 fail:
1050         brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1051                   rv, addr);
1052         sdio_release_host(bus->sdiodev->func[1]);
1053         return rv;
1054 }
1055
1056 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1057 {
1058         struct sdpcm_shared sh;
1059
1060         if (brcmf_sdio_readshared(bus, &sh) == 0)
1061                 bus->console_addr = sh.console_addr;
1062 }
1063 #else
1064 static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1065 {
1066 }
1067 #endif /* DEBUG */
1068
1069 static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1070 {
1071         u32 intstatus = 0;
1072         u32 hmb_data;
1073         u8 fcbits;
1074         int ret;
1075
1076         brcmf_dbg(SDIO, "Enter\n");
1077
1078         /* Read mailbox data and ack that we did so */
1079         ret = r_sdreg32(bus, &hmb_data,
1080                         offsetof(struct sdpcmd_regs, tohostmailboxdata));
1081
1082         if (ret == 0)
1083                 w_sdreg32(bus, SMB_INT_ACK,
1084                           offsetof(struct sdpcmd_regs, tosbmailbox));
1085         bus->sdcnt.f1regdata += 2;
1086
1087         /* Dongle recomposed rx frames, accept them again */
1088         if (hmb_data & HMB_DATA_NAKHANDLED) {
1089                 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1090                           bus->rx_seq);
1091                 if (!bus->rxskip)
1092                         brcmf_err("unexpected NAKHANDLED!\n");
1093
1094                 bus->rxskip = false;
1095                 intstatus |= I_HMB_FRAME_IND;
1096         }
1097
1098         /*
1099          * DEVREADY does not occur with gSPI.
1100          */
1101         if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1102                 bus->sdpcm_ver =
1103                     (hmb_data & HMB_DATA_VERSION_MASK) >>
1104                     HMB_DATA_VERSION_SHIFT;
1105                 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1106                         brcmf_err("Version mismatch, dongle reports %d, "
1107                                   "expecting %d\n",
1108                                   bus->sdpcm_ver, SDPCM_PROT_VERSION);
1109                 else
1110                         brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1111                                   bus->sdpcm_ver);
1112
1113                 /*
1114                  * Retrieve console state address now that firmware should have
1115                  * updated it.
1116                  */
1117                 brcmf_sdio_get_console_addr(bus);
1118         }
1119
1120         /*
1121          * Flow Control has been moved into the RX headers and this out of band
1122          * method isn't used any more.
1123          * remaining backward compatible with older dongles.
1124          */
1125         if (hmb_data & HMB_DATA_FC) {
1126                 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1127                                                         HMB_DATA_FCDATA_SHIFT;
1128
1129                 if (fcbits & ~bus->flowcontrol)
1130                         bus->sdcnt.fc_xoff++;
1131
1132                 if (bus->flowcontrol & ~fcbits)
1133                         bus->sdcnt.fc_xon++;
1134
1135                 bus->sdcnt.fc_rcvd++;
1136                 bus->flowcontrol = fcbits;
1137         }
1138
1139         /* Shouldn't be any others */
1140         if (hmb_data & ~(HMB_DATA_DEVREADY |
1141                          HMB_DATA_NAKHANDLED |
1142                          HMB_DATA_FC |
1143                          HMB_DATA_FWREADY |
1144                          HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1145                 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1146                           hmb_data);
1147
1148         return intstatus;
1149 }
1150
1151 static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1152 {
1153         uint retries = 0;
1154         u16 lastrbc;
1155         u8 hi, lo;
1156         int err;
1157
1158         brcmf_err("%sterminate frame%s\n",
1159                   abort ? "abort command, " : "",
1160                   rtx ? ", send NAK" : "");
1161
1162         if (abort)
1163                 brcmf_sdiod_abort(bus->sdiodev, SDIO_FUNC_2);
1164
1165         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL,
1166                           SFC_RF_TERM, &err);
1167         bus->sdcnt.f1regdata++;
1168
1169         /* Wait until the packet has been flushed (device/FIFO stable) */
1170         for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1171                 hi = brcmf_sdiod_regrb(bus->sdiodev,
1172                                        SBSDIO_FUNC1_RFRAMEBCHI, &err);
1173                 lo = brcmf_sdiod_regrb(bus->sdiodev,
1174                                        SBSDIO_FUNC1_RFRAMEBCLO, &err);
1175                 bus->sdcnt.f1regdata += 2;
1176
1177                 if ((hi == 0) && (lo == 0))
1178                         break;
1179
1180                 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1181                         brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1182                                   lastrbc, (hi << 8) + lo);
1183                 }
1184                 lastrbc = (hi << 8) + lo;
1185         }
1186
1187         if (!retries)
1188                 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1189         else
1190                 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1191
1192         if (rtx) {
1193                 bus->sdcnt.rxrtx++;
1194                 err = w_sdreg32(bus, SMB_NAK,
1195                                 offsetof(struct sdpcmd_regs, tosbmailbox));
1196
1197                 bus->sdcnt.f1regdata++;
1198                 if (err == 0)
1199                         bus->rxskip = true;
1200         }
1201
1202         /* Clear partial in any case */
1203         bus->cur_read.len = 0;
1204 }
1205
1206 static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1207 {
1208         struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1209         u8 i, hi, lo;
1210
1211         /* On failure, abort the command and terminate the frame */
1212         brcmf_err("sdio error, abort command and terminate frame\n");
1213         bus->sdcnt.tx_sderrs++;
1214
1215         brcmf_sdiod_abort(sdiodev, SDIO_FUNC_2);
1216         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1217         bus->sdcnt.f1regdata++;
1218
1219         for (i = 0; i < 3; i++) {
1220                 hi = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1221                 lo = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1222                 bus->sdcnt.f1regdata += 2;
1223                 if ((hi == 0) && (lo == 0))
1224                         break;
1225         }
1226 }
1227
1228 /* return total length of buffer chain */
1229 static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1230 {
1231         struct sk_buff *p;
1232         uint total;
1233
1234         total = 0;
1235         skb_queue_walk(&bus->glom, p)
1236                 total += p->len;
1237         return total;
1238 }
1239
1240 static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1241 {
1242         struct sk_buff *cur, *next;
1243
1244         skb_queue_walk_safe(&bus->glom, cur, next) {
1245                 skb_unlink(cur, &bus->glom);
1246                 brcmu_pkt_buf_free_skb(cur);
1247         }
1248 }
1249
1250 /**
1251  * brcmfmac sdio bus specific header
1252  * This is the lowest layer header wrapped on the packets transmitted between
1253  * host and WiFi dongle which contains information needed for SDIO core and
1254  * firmware
1255  *
1256  * It consists of 3 parts: hardware header, hardware extension header and
1257  * software header
1258  * hardware header (frame tag) - 4 bytes
1259  * Byte 0~1: Frame length
1260  * Byte 2~3: Checksum, bit-wise inverse of frame length
1261  * hardware extension header - 8 bytes
1262  * Tx glom mode only, N/A for Rx or normal Tx
1263  * Byte 0~1: Packet length excluding hw frame tag
1264  * Byte 2: Reserved
1265  * Byte 3: Frame flags, bit 0: last frame indication
1266  * Byte 4~5: Reserved
1267  * Byte 6~7: Tail padding length
1268  * software header - 8 bytes
1269  * Byte 0: Rx/Tx sequence number
1270  * Byte 1: 4 MSB Channel number, 4 LSB arbitrary flag
1271  * Byte 2: Length of next data frame, reserved for Tx
1272  * Byte 3: Data offset
1273  * Byte 4: Flow control bits, reserved for Tx
1274  * Byte 5: Maximum Sequence number allowed by firmware for Tx, N/A for Tx packet
1275  * Byte 6~7: Reserved
1276  */
1277 #define SDPCM_HWHDR_LEN                 4
1278 #define SDPCM_HWEXT_LEN                 8
1279 #define SDPCM_SWHDR_LEN                 8
1280 #define SDPCM_HDRLEN                    (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1281 /* software header */
1282 #define SDPCM_SEQ_MASK                  0x000000ff
1283 #define SDPCM_SEQ_WRAP                  256
1284 #define SDPCM_CHANNEL_MASK              0x00000f00
1285 #define SDPCM_CHANNEL_SHIFT             8
1286 #define SDPCM_CONTROL_CHANNEL           0       /* Control */
1287 #define SDPCM_EVENT_CHANNEL             1       /* Asyc Event Indication */
1288 #define SDPCM_DATA_CHANNEL              2       /* Data Xmit/Recv */
1289 #define SDPCM_GLOM_CHANNEL              3       /* Coalesced packets */
1290 #define SDPCM_TEST_CHANNEL              15      /* Test/debug packets */
1291 #define SDPCM_GLOMDESC(p)               (((u8 *)p)[1] & 0x80)
1292 #define SDPCM_NEXTLEN_MASK              0x00ff0000
1293 #define SDPCM_NEXTLEN_SHIFT             16
1294 #define SDPCM_DOFFSET_MASK              0xff000000
1295 #define SDPCM_DOFFSET_SHIFT             24
1296 #define SDPCM_FCMASK_MASK               0x000000ff
1297 #define SDPCM_WINDOW_MASK               0x0000ff00
1298 #define SDPCM_WINDOW_SHIFT              8
1299
1300 static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1301 {
1302         u32 hdrvalue;
1303         hdrvalue = *(u32 *)swheader;
1304         return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1305 }
1306
1307 static inline bool brcmf_sdio_fromevntchan(u8 *swheader)
1308 {
1309         u32 hdrvalue;
1310         u8 ret;
1311
1312         hdrvalue = *(u32 *)swheader;
1313         ret = (u8)((hdrvalue & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT);
1314
1315         return (ret == SDPCM_EVENT_CHANNEL);
1316 }
1317
1318 static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1319                               struct brcmf_sdio_hdrinfo *rd,
1320                               enum brcmf_sdio_frmtype type)
1321 {
1322         u16 len, checksum;
1323         u8 rx_seq, fc, tx_seq_max;
1324         u32 swheader;
1325
1326         trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1327
1328         /* hw header */
1329         len = get_unaligned_le16(header);
1330         checksum = get_unaligned_le16(header + sizeof(u16));
1331         /* All zero means no more to read */
1332         if (!(len | checksum)) {
1333                 bus->rxpending = false;
1334                 return -ENODATA;
1335         }
1336         if ((u16)(~(len ^ checksum))) {
1337                 brcmf_err("HW header checksum error\n");
1338                 bus->sdcnt.rx_badhdr++;
1339                 brcmf_sdio_rxfail(bus, false, false);
1340                 return -EIO;
1341         }
1342         if (len < SDPCM_HDRLEN) {
1343                 brcmf_err("HW header length error\n");
1344                 return -EPROTO;
1345         }
1346         if (type == BRCMF_SDIO_FT_SUPER &&
1347             (roundup(len, bus->blocksize) != rd->len)) {
1348                 brcmf_err("HW superframe header length error\n");
1349                 return -EPROTO;
1350         }
1351         if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1352                 brcmf_err("HW subframe header length error\n");
1353                 return -EPROTO;
1354         }
1355         rd->len = len;
1356
1357         /* software header */
1358         header += SDPCM_HWHDR_LEN;
1359         swheader = le32_to_cpu(*(__le32 *)header);
1360         if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1361                 brcmf_err("Glom descriptor found in superframe head\n");
1362                 rd->len = 0;
1363                 return -EINVAL;
1364         }
1365         rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1366         rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1367         if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1368             type != BRCMF_SDIO_FT_SUPER) {
1369                 brcmf_err("HW header length too long\n");
1370                 bus->sdcnt.rx_toolong++;
1371                 brcmf_sdio_rxfail(bus, false, false);
1372                 rd->len = 0;
1373                 return -EPROTO;
1374         }
1375         if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1376                 brcmf_err("Wrong channel for superframe\n");
1377                 rd->len = 0;
1378                 return -EINVAL;
1379         }
1380         if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1381             rd->channel != SDPCM_EVENT_CHANNEL) {
1382                 brcmf_err("Wrong channel for subframe\n");
1383                 rd->len = 0;
1384                 return -EINVAL;
1385         }
1386         rd->dat_offset = brcmf_sdio_getdatoffset(header);
1387         if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1388                 brcmf_err("seq %d: bad data offset\n", rx_seq);
1389                 bus->sdcnt.rx_badhdr++;
1390                 brcmf_sdio_rxfail(bus, false, false);
1391                 rd->len = 0;
1392                 return -ENXIO;
1393         }
1394         if (rd->seq_num != rx_seq) {
1395                 brcmf_dbg(SDIO, "seq %d, expected %d\n", rx_seq, rd->seq_num);
1396                 bus->sdcnt.rx_badseq++;
1397                 rd->seq_num = rx_seq;
1398         }
1399         /* no need to check the reset for subframe */
1400         if (type == BRCMF_SDIO_FT_SUB)
1401                 return 0;
1402         rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1403         if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1404                 /* only warm for NON glom packet */
1405                 if (rd->channel != SDPCM_GLOM_CHANNEL)
1406                         brcmf_err("seq %d: next length error\n", rx_seq);
1407                 rd->len_nxtfrm = 0;
1408         }
1409         swheader = le32_to_cpu(*(__le32 *)(header + 4));
1410         fc = swheader & SDPCM_FCMASK_MASK;
1411         if (bus->flowcontrol != fc) {
1412                 if (~bus->flowcontrol & fc)
1413                         bus->sdcnt.fc_xoff++;
1414                 if (bus->flowcontrol & ~fc)
1415                         bus->sdcnt.fc_xon++;
1416                 bus->sdcnt.fc_rcvd++;
1417                 bus->flowcontrol = fc;
1418         }
1419         tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1420         if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1421                 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1422                 tx_seq_max = bus->tx_seq + 2;
1423         }
1424         bus->tx_max = tx_seq_max;
1425
1426         return 0;
1427 }
1428
1429 static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1430 {
1431         *(__le16 *)header = cpu_to_le16(frm_length);
1432         *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1433 }
1434
1435 static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1436                               struct brcmf_sdio_hdrinfo *hd_info)
1437 {
1438         u32 hdrval;
1439         u8 hdr_offset;
1440
1441         brcmf_sdio_update_hwhdr(header, hd_info->len);
1442         hdr_offset = SDPCM_HWHDR_LEN;
1443
1444         if (bus->txglom) {
1445                 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1446                 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1447                 hdrval = (u16)hd_info->tail_pad << 16;
1448                 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1449                 hdr_offset += SDPCM_HWEXT_LEN;
1450         }
1451
1452         hdrval = hd_info->seq_num;
1453         hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1454                   SDPCM_CHANNEL_MASK;
1455         hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1456                   SDPCM_DOFFSET_MASK;
1457         *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1458         *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1459         trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1460 }
1461
1462 static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1463 {
1464         u16 dlen, totlen;
1465         u8 *dptr, num = 0;
1466         u16 sublen;
1467         struct sk_buff *pfirst, *pnext;
1468
1469         int errcode;
1470         u8 doff, sfdoff;
1471
1472         struct brcmf_sdio_hdrinfo rd_new;
1473
1474         /* If packets, issue read(s) and send up packet chain */
1475         /* Return sequence numbers consumed? */
1476
1477         brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1478                   bus->glomd, skb_peek(&bus->glom));
1479
1480         /* If there's a descriptor, generate the packet chain */
1481         if (bus->glomd) {
1482                 pfirst = pnext = NULL;
1483                 dlen = (u16) (bus->glomd->len);
1484                 dptr = bus->glomd->data;
1485                 if (!dlen || (dlen & 1)) {
1486                         brcmf_err("bad glomd len(%d), ignore descriptor\n",
1487                                   dlen);
1488                         dlen = 0;
1489                 }
1490
1491                 for (totlen = num = 0; dlen; num++) {
1492                         /* Get (and move past) next length */
1493                         sublen = get_unaligned_le16(dptr);
1494                         dlen -= sizeof(u16);
1495                         dptr += sizeof(u16);
1496                         if ((sublen < SDPCM_HDRLEN) ||
1497                             ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1498                                 brcmf_err("descriptor len %d bad: %d\n",
1499                                           num, sublen);
1500                                 pnext = NULL;
1501                                 break;
1502                         }
1503                         if (sublen % bus->sgentry_align) {
1504                                 brcmf_err("sublen %d not multiple of %d\n",
1505                                           sublen, bus->sgentry_align);
1506                         }
1507                         totlen += sublen;
1508
1509                         /* For last frame, adjust read len so total
1510                                  is a block multiple */
1511                         if (!dlen) {
1512                                 sublen +=
1513                                     (roundup(totlen, bus->blocksize) - totlen);
1514                                 totlen = roundup(totlen, bus->blocksize);
1515                         }
1516
1517                         /* Allocate/chain packet for next subframe */
1518                         pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1519                         if (pnext == NULL) {
1520                                 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1521                                           num, sublen);
1522                                 break;
1523                         }
1524                         skb_queue_tail(&bus->glom, pnext);
1525
1526                         /* Adhere to start alignment requirements */
1527                         pkt_align(pnext, sublen, bus->sgentry_align);
1528                 }
1529
1530                 /* If all allocations succeeded, save packet chain
1531                          in bus structure */
1532                 if (pnext) {
1533                         brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1534                                   totlen, num);
1535                         if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1536                             totlen != bus->cur_read.len) {
1537                                 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1538                                           bus->cur_read.len, totlen, rxseq);
1539                         }
1540                         pfirst = pnext = NULL;
1541                 } else {
1542                         brcmf_sdio_free_glom(bus);
1543                         num = 0;
1544                 }
1545
1546                 /* Done with descriptor packet */
1547                 brcmu_pkt_buf_free_skb(bus->glomd);
1548                 bus->glomd = NULL;
1549                 bus->cur_read.len = 0;
1550         }
1551
1552         /* Ok -- either we just generated a packet chain,
1553                  or had one from before */
1554         if (!skb_queue_empty(&bus->glom)) {
1555                 if (BRCMF_GLOM_ON()) {
1556                         brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1557                         skb_queue_walk(&bus->glom, pnext) {
1558                                 brcmf_dbg(GLOM, "    %p: %p len 0x%04x (%d)\n",
1559                                           pnext, (u8 *) (pnext->data),
1560                                           pnext->len, pnext->len);
1561                         }
1562                 }
1563
1564                 pfirst = skb_peek(&bus->glom);
1565                 dlen = (u16) brcmf_sdio_glom_len(bus);
1566
1567                 /* Do an SDIO read for the superframe.  Configurable iovar to
1568                  * read directly into the chained packet, or allocate a large
1569                  * packet and and copy into the chain.
1570                  */
1571                 sdio_claim_host(bus->sdiodev->func[1]);
1572                 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1573                                                  &bus->glom, dlen);
1574                 sdio_release_host(bus->sdiodev->func[1]);
1575                 bus->sdcnt.f2rxdata++;
1576
1577                 /* On failure, kill the superframe */
1578                 if (errcode < 0) {
1579                         brcmf_err("glom read of %d bytes failed: %d\n",
1580                                   dlen, errcode);
1581
1582                         sdio_claim_host(bus->sdiodev->func[1]);
1583                         brcmf_sdio_rxfail(bus, true, false);
1584                         bus->sdcnt.rxglomfail++;
1585                         brcmf_sdio_free_glom(bus);
1586                         sdio_release_host(bus->sdiodev->func[1]);
1587                         return 0;
1588                 }
1589
1590                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1591                                    pfirst->data, min_t(int, pfirst->len, 48),
1592                                    "SUPERFRAME:\n");
1593
1594                 rd_new.seq_num = rxseq;
1595                 rd_new.len = dlen;
1596                 sdio_claim_host(bus->sdiodev->func[1]);
1597                 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1598                                              BRCMF_SDIO_FT_SUPER);
1599                 sdio_release_host(bus->sdiodev->func[1]);
1600                 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1601
1602                 /* Remove superframe header, remember offset */
1603                 skb_pull(pfirst, rd_new.dat_offset);
1604                 sfdoff = rd_new.dat_offset;
1605                 num = 0;
1606
1607                 /* Validate all the subframe headers */
1608                 skb_queue_walk(&bus->glom, pnext) {
1609                         /* leave when invalid subframe is found */
1610                         if (errcode)
1611                                 break;
1612
1613                         rd_new.len = pnext->len;
1614                         rd_new.seq_num = rxseq++;
1615                         sdio_claim_host(bus->sdiodev->func[1]);
1616                         errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1617                                                      BRCMF_SDIO_FT_SUB);
1618                         sdio_release_host(bus->sdiodev->func[1]);
1619                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1620                                            pnext->data, 32, "subframe:\n");
1621
1622                         num++;
1623                 }
1624
1625                 if (errcode) {
1626                         /* Terminate frame on error */
1627                         sdio_claim_host(bus->sdiodev->func[1]);
1628                         brcmf_sdio_rxfail(bus, true, false);
1629                         bus->sdcnt.rxglomfail++;
1630                         brcmf_sdio_free_glom(bus);
1631                         sdio_release_host(bus->sdiodev->func[1]);
1632                         bus->cur_read.len = 0;
1633                         return 0;
1634                 }
1635
1636                 /* Basic SD framing looks ok - process each packet (header) */
1637
1638                 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1639                         dptr = (u8 *) (pfirst->data);
1640                         sublen = get_unaligned_le16(dptr);
1641                         doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1642
1643                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1644                                            dptr, pfirst->len,
1645                                            "Rx Subframe Data:\n");
1646
1647                         __skb_trim(pfirst, sublen);
1648                         skb_pull(pfirst, doff);
1649
1650                         if (pfirst->len == 0) {
1651                                 skb_unlink(pfirst, &bus->glom);
1652                                 brcmu_pkt_buf_free_skb(pfirst);
1653                                 continue;
1654                         }
1655
1656                         brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1657                                            pfirst->data,
1658                                            min_t(int, pfirst->len, 32),
1659                                            "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1660                                            bus->glom.qlen, pfirst, pfirst->data,
1661                                            pfirst->len, pfirst->next,
1662                                            pfirst->prev);
1663                         skb_unlink(pfirst, &bus->glom);
1664                         if (brcmf_sdio_fromevntchan(&dptr[SDPCM_HWHDR_LEN]))
1665                                 brcmf_rx_event(bus->sdiodev->dev, pfirst);
1666                         else
1667                                 brcmf_rx_frame(bus->sdiodev->dev, pfirst,
1668                                                false);
1669                         bus->sdcnt.rxglompkts++;
1670                 }
1671
1672                 bus->sdcnt.rxglomframes++;
1673         }
1674         return num;
1675 }
1676
1677 static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1678                                      bool *pending)
1679 {
1680         DECLARE_WAITQUEUE(wait, current);
1681         int timeout = DCMD_RESP_TIMEOUT;
1682
1683         /* Wait until control frame is available */
1684         add_wait_queue(&bus->dcmd_resp_wait, &wait);
1685         set_current_state(TASK_INTERRUPTIBLE);
1686
1687         while (!(*condition) && (!signal_pending(current) && timeout))
1688                 timeout = schedule_timeout(timeout);
1689
1690         if (signal_pending(current))
1691                 *pending = true;
1692
1693         set_current_state(TASK_RUNNING);
1694         remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1695
1696         return timeout;
1697 }
1698
1699 static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1700 {
1701         wake_up_interruptible(&bus->dcmd_resp_wait);
1702
1703         return 0;
1704 }
1705 static void
1706 brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1707 {
1708         uint rdlen, pad;
1709         u8 *buf = NULL, *rbuf;
1710         int sdret;
1711
1712         brcmf_dbg(TRACE, "Enter\n");
1713
1714         if (bus->rxblen)
1715                 buf = vzalloc(bus->rxblen);
1716         if (!buf)
1717                 goto done;
1718
1719         rbuf = bus->rxbuf;
1720         pad = ((unsigned long)rbuf % bus->head_align);
1721         if (pad)
1722                 rbuf += (bus->head_align - pad);
1723
1724         /* Copy the already-read portion over */
1725         memcpy(buf, hdr, BRCMF_FIRSTREAD);
1726         if (len <= BRCMF_FIRSTREAD)
1727                 goto gotpkt;
1728
1729         /* Raise rdlen to next SDIO block to avoid tail command */
1730         rdlen = len - BRCMF_FIRSTREAD;
1731         if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1732                 pad = bus->blocksize - (rdlen % bus->blocksize);
1733                 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1734                     ((len + pad) < bus->sdiodev->bus_if->maxctl))
1735                         rdlen += pad;
1736         } else if (rdlen % bus->head_align) {
1737                 rdlen += bus->head_align - (rdlen % bus->head_align);
1738         }
1739
1740         /* Drop if the read is too big or it exceeds our maximum */
1741         if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1742                 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1743                           rdlen, bus->sdiodev->bus_if->maxctl);
1744                 brcmf_sdio_rxfail(bus, false, false);
1745                 goto done;
1746         }
1747
1748         if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1749                 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1750                           len, len - doff, bus->sdiodev->bus_if->maxctl);
1751                 bus->sdcnt.rx_toolong++;
1752                 brcmf_sdio_rxfail(bus, false, false);
1753                 goto done;
1754         }
1755
1756         /* Read remain of frame body */
1757         sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1758         bus->sdcnt.f2rxdata++;
1759
1760         /* Control frame failures need retransmission */
1761         if (sdret < 0) {
1762                 brcmf_err("read %d control bytes failed: %d\n",
1763                           rdlen, sdret);
1764                 bus->sdcnt.rxc_errors++;
1765                 brcmf_sdio_rxfail(bus, true, true);
1766                 goto done;
1767         } else
1768                 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1769
1770 gotpkt:
1771
1772         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1773                            buf, len, "RxCtrl:\n");
1774
1775         /* Point to valid data and indicate its length */
1776         spin_lock_bh(&bus->rxctl_lock);
1777         if (bus->rxctl) {
1778                 brcmf_err("last control frame is being processed.\n");
1779                 spin_unlock_bh(&bus->rxctl_lock);
1780                 vfree(buf);
1781                 goto done;
1782         }
1783         bus->rxctl = buf + doff;
1784         bus->rxctl_orig = buf;
1785         bus->rxlen = len - doff;
1786         spin_unlock_bh(&bus->rxctl_lock);
1787
1788 done:
1789         /* Awake any waiters */
1790         brcmf_sdio_dcmd_resp_wake(bus);
1791 }
1792
1793 /* Pad read to blocksize for efficiency */
1794 static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1795 {
1796         if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1797                 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1798                 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1799                     *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1800                         *rdlen += *pad;
1801         } else if (*rdlen % bus->head_align) {
1802                 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1803         }
1804 }
1805
1806 static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1807 {
1808         struct sk_buff *pkt;            /* Packet for event or data frames */
1809         u16 pad;                /* Number of pad bytes to read */
1810         uint rxleft = 0;        /* Remaining number of frames allowed */
1811         int ret;                /* Return code from calls */
1812         uint rxcount = 0;       /* Total frames read */
1813         struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1814         u8 head_read = 0;
1815
1816         brcmf_dbg(TRACE, "Enter\n");
1817
1818         /* Not finished unless we encounter no more frames indication */
1819         bus->rxpending = true;
1820
1821         for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1822              !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1823              rd->seq_num++, rxleft--) {
1824
1825                 /* Handle glomming separately */
1826                 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1827                         u8 cnt;
1828                         brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1829                                   bus->glomd, skb_peek(&bus->glom));
1830                         cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1831                         brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1832                         rd->seq_num += cnt - 1;
1833                         rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1834                         continue;
1835                 }
1836
1837                 rd->len_left = rd->len;
1838                 /* read header first for unknow frame length */
1839                 sdio_claim_host(bus->sdiodev->func[1]);
1840                 if (!rd->len) {
1841                         ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1842                                                    bus->rxhdr, BRCMF_FIRSTREAD);
1843                         bus->sdcnt.f2rxhdrs++;
1844                         if (ret < 0) {
1845                                 brcmf_err("RXHEADER FAILED: %d\n",
1846                                           ret);
1847                                 bus->sdcnt.rx_hdrfail++;
1848                                 brcmf_sdio_rxfail(bus, true, true);
1849                                 sdio_release_host(bus->sdiodev->func[1]);
1850                                 continue;
1851                         }
1852
1853                         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1854                                            bus->rxhdr, SDPCM_HDRLEN,
1855                                            "RxHdr:\n");
1856
1857                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1858                                                BRCMF_SDIO_FT_NORMAL)) {
1859                                 sdio_release_host(bus->sdiodev->func[1]);
1860                                 if (!bus->rxpending)
1861                                         break;
1862                                 else
1863                                         continue;
1864                         }
1865
1866                         if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1867                                 brcmf_sdio_read_control(bus, bus->rxhdr,
1868                                                         rd->len,
1869                                                         rd->dat_offset);
1870                                 /* prepare the descriptor for the next read */
1871                                 rd->len = rd->len_nxtfrm << 4;
1872                                 rd->len_nxtfrm = 0;
1873                                 /* treat all packet as event if we don't know */
1874                                 rd->channel = SDPCM_EVENT_CHANNEL;
1875                                 sdio_release_host(bus->sdiodev->func[1]);
1876                                 continue;
1877                         }
1878                         rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1879                                        rd->len - BRCMF_FIRSTREAD : 0;
1880                         head_read = BRCMF_FIRSTREAD;
1881                 }
1882
1883                 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1884
1885                 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1886                                             bus->head_align);
1887                 if (!pkt) {
1888                         /* Give up on data, request rtx of events */
1889                         brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1890                         brcmf_sdio_rxfail(bus, false,
1891                                             RETRYCHAN(rd->channel));
1892                         sdio_release_host(bus->sdiodev->func[1]);
1893                         continue;
1894                 }
1895                 skb_pull(pkt, head_read);
1896                 pkt_align(pkt, rd->len_left, bus->head_align);
1897
1898                 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1899                 bus->sdcnt.f2rxdata++;
1900                 sdio_release_host(bus->sdiodev->func[1]);
1901
1902                 if (ret < 0) {
1903                         brcmf_err("read %d bytes from channel %d failed: %d\n",
1904                                   rd->len, rd->channel, ret);
1905                         brcmu_pkt_buf_free_skb(pkt);
1906                         sdio_claim_host(bus->sdiodev->func[1]);
1907                         brcmf_sdio_rxfail(bus, true,
1908                                             RETRYCHAN(rd->channel));
1909                         sdio_release_host(bus->sdiodev->func[1]);
1910                         continue;
1911                 }
1912
1913                 if (head_read) {
1914                         skb_push(pkt, head_read);
1915                         memcpy(pkt->data, bus->rxhdr, head_read);
1916                         head_read = 0;
1917                 } else {
1918                         memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1919                         rd_new.seq_num = rd->seq_num;
1920                         sdio_claim_host(bus->sdiodev->func[1]);
1921                         if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1922                                                BRCMF_SDIO_FT_NORMAL)) {
1923                                 rd->len = 0;
1924                                 brcmu_pkt_buf_free_skb(pkt);
1925                         }
1926                         bus->sdcnt.rx_readahead_cnt++;
1927                         if (rd->len != roundup(rd_new.len, 16)) {
1928                                 brcmf_err("frame length mismatch:read %d, should be %d\n",
1929                                           rd->len,
1930                                           roundup(rd_new.len, 16) >> 4);
1931                                 rd->len = 0;
1932                                 brcmf_sdio_rxfail(bus, true, true);
1933                                 sdio_release_host(bus->sdiodev->func[1]);
1934                                 brcmu_pkt_buf_free_skb(pkt);
1935                                 continue;
1936                         }
1937                         sdio_release_host(bus->sdiodev->func[1]);
1938                         rd->len_nxtfrm = rd_new.len_nxtfrm;
1939                         rd->channel = rd_new.channel;
1940                         rd->dat_offset = rd_new.dat_offset;
1941
1942                         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1943                                              BRCMF_DATA_ON()) &&
1944                                            BRCMF_HDRS_ON(),
1945                                            bus->rxhdr, SDPCM_HDRLEN,
1946                                            "RxHdr:\n");
1947
1948                         if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1949                                 brcmf_err("readahead on control packet %d?\n",
1950                                           rd_new.seq_num);
1951                                 /* Force retry w/normal header read */
1952                                 rd->len = 0;
1953                                 sdio_claim_host(bus->sdiodev->func[1]);
1954                                 brcmf_sdio_rxfail(bus, false, true);
1955                                 sdio_release_host(bus->sdiodev->func[1]);
1956                                 brcmu_pkt_buf_free_skb(pkt);
1957                                 continue;
1958                         }
1959                 }
1960
1961                 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1962                                    pkt->data, rd->len, "Rx Data:\n");
1963
1964                 /* Save superframe descriptor and allocate packet frame */
1965                 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1966                         if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1967                                 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1968                                           rd->len);
1969                                 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1970                                                    pkt->data, rd->len,
1971                                                    "Glom Data:\n");
1972                                 __skb_trim(pkt, rd->len);
1973                                 skb_pull(pkt, SDPCM_HDRLEN);
1974                                 bus->glomd = pkt;
1975                         } else {
1976                                 brcmf_err("%s: glom superframe w/o "
1977                                           "descriptor!\n", __func__);
1978                                 sdio_claim_host(bus->sdiodev->func[1]);
1979                                 brcmf_sdio_rxfail(bus, false, false);
1980                                 sdio_release_host(bus->sdiodev->func[1]);
1981                         }
1982                         /* prepare the descriptor for the next read */
1983                         rd->len = rd->len_nxtfrm << 4;
1984                         rd->len_nxtfrm = 0;
1985                         /* treat all packet as event if we don't know */
1986                         rd->channel = SDPCM_EVENT_CHANNEL;
1987                         continue;
1988                 }
1989
1990                 /* Fill in packet len and prio, deliver upward */
1991                 __skb_trim(pkt, rd->len);
1992                 skb_pull(pkt, rd->dat_offset);
1993
1994                 if (pkt->len == 0)
1995                         brcmu_pkt_buf_free_skb(pkt);
1996                 else if (rd->channel == SDPCM_EVENT_CHANNEL)
1997                         brcmf_rx_event(bus->sdiodev->dev, pkt);
1998                 else
1999                         brcmf_rx_frame(bus->sdiodev->dev, pkt,
2000                                        false);
2001
2002                 /* prepare the descriptor for the next read */
2003                 rd->len = rd->len_nxtfrm << 4;
2004                 rd->len_nxtfrm = 0;
2005                 /* treat all packet as event if we don't know */
2006                 rd->channel = SDPCM_EVENT_CHANNEL;
2007         }
2008
2009         rxcount = maxframes - rxleft;
2010         /* Message if we hit the limit */
2011         if (!rxleft)
2012                 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2013         else
2014                 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2015         /* Back off rxseq if awaiting rtx, update rx_seq */
2016         if (bus->rxskip)
2017                 rd->seq_num--;
2018         bus->rx_seq = rd->seq_num;
2019
2020         return rxcount;
2021 }
2022
2023 static void
2024 brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2025 {
2026         wake_up_interruptible(&bus->ctrl_wait);
2027         return;
2028 }
2029
2030 static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2031 {
2032         u16 head_pad;
2033         u8 *dat_buf;
2034
2035         dat_buf = (u8 *)(pkt->data);
2036
2037         /* Check head padding */
2038         head_pad = ((unsigned long)dat_buf % bus->head_align);
2039         if (head_pad) {
2040                 if (skb_headroom(pkt) < head_pad) {
2041                         bus->sdiodev->bus_if->tx_realloc++;
2042                         head_pad = 0;
2043                         if (skb_cow(pkt, head_pad))
2044                                 return -ENOMEM;
2045                 }
2046                 skb_push(pkt, head_pad);
2047                 dat_buf = (u8 *)(pkt->data);
2048                 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2049         }
2050         return head_pad;
2051 }
2052
2053 /**
2054  * struct brcmf_skbuff_cb reserves first two bytes in sk_buff::cb for
2055  * bus layer usage.
2056  */
2057 /* flag marking a dummy skb added for DMA alignment requirement */
2058 #define ALIGN_SKB_FLAG          0x8000
2059 /* bit mask of data length chopped from the previous packet */
2060 #define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2061
2062 static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2063                                     struct sk_buff_head *pktq,
2064                                     struct sk_buff *pkt, u16 total_len)
2065 {
2066         struct brcmf_sdio_dev *sdiodev;
2067         struct sk_buff *pkt_pad;
2068         u16 tail_pad, tail_chop, chain_pad;
2069         unsigned int blksize;
2070         bool lastfrm;
2071         int ntail, ret;
2072
2073         sdiodev = bus->sdiodev;
2074         blksize = sdiodev->func[SDIO_FUNC_2]->cur_blksize;
2075         /* sg entry alignment should be a divisor of block size */
2076         WARN_ON(blksize % bus->sgentry_align);
2077
2078         /* Check tail padding */
2079         lastfrm = skb_queue_is_last(pktq, pkt);
2080         tail_pad = 0;
2081         tail_chop = pkt->len % bus->sgentry_align;
2082         if (tail_chop)
2083                 tail_pad = bus->sgentry_align - tail_chop;
2084         chain_pad = (total_len + tail_pad) % blksize;
2085         if (lastfrm && chain_pad)
2086                 tail_pad += blksize - chain_pad;
2087         if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2088                 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2089                                                 bus->head_align);
2090                 if (pkt_pad == NULL)
2091                         return -ENOMEM;
2092                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2093                 if (unlikely(ret < 0)) {
2094                         kfree_skb(pkt_pad);
2095                         return ret;
2096                 }
2097                 memcpy(pkt_pad->data,
2098                        pkt->data + pkt->len - tail_chop,
2099                        tail_chop);
2100                 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2101                 skb_trim(pkt, pkt->len - tail_chop);
2102                 skb_trim(pkt_pad, tail_pad + tail_chop);
2103                 __skb_queue_after(pktq, pkt, pkt_pad);
2104         } else {
2105                 ntail = pkt->data_len + tail_pad -
2106                         (pkt->end - pkt->tail);
2107                 if (skb_cloned(pkt) || ntail > 0)
2108                         if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2109                                 return -ENOMEM;
2110                 if (skb_linearize(pkt))
2111                         return -ENOMEM;
2112                 __skb_put(pkt, tail_pad);
2113         }
2114
2115         return tail_pad;
2116 }
2117
2118 /**
2119  * brcmf_sdio_txpkt_prep - packet preparation for transmit
2120  * @bus: brcmf_sdio structure pointer
2121  * @pktq: packet list pointer
2122  * @chan: virtual channel to transmit the packet
2123  *
2124  * Processes to be applied to the packet
2125  *      - Align data buffer pointer
2126  *      - Align data buffer length
2127  *      - Prepare header
2128  * Return: negative value if there is error
2129  */
2130 static int
2131 brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2132                       uint chan)
2133 {
2134         u16 head_pad, total_len;
2135         struct sk_buff *pkt_next;
2136         u8 txseq;
2137         int ret;
2138         struct brcmf_sdio_hdrinfo hd_info = {0};
2139
2140         txseq = bus->tx_seq;
2141         total_len = 0;
2142         skb_queue_walk(pktq, pkt_next) {
2143                 /* alignment packet inserted in previous
2144                  * loop cycle can be skipped as it is
2145                  * already properly aligned and does not
2146                  * need an sdpcm header.
2147                  */
2148                 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2149                         continue;
2150
2151                 /* align packet data pointer */
2152                 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2153                 if (ret < 0)
2154                         return ret;
2155                 head_pad = (u16)ret;
2156                 if (head_pad)
2157                         memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2158
2159                 total_len += pkt_next->len;
2160
2161                 hd_info.len = pkt_next->len;
2162                 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2163                 if (bus->txglom && pktq->qlen > 1) {
2164                         ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2165                                                        pkt_next, total_len);
2166                         if (ret < 0)
2167                                 return ret;
2168                         hd_info.tail_pad = (u16)ret;
2169                         total_len += (u16)ret;
2170                 }
2171
2172                 hd_info.channel = chan;
2173                 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2174                 hd_info.seq_num = txseq++;
2175
2176                 /* Now fill the header */
2177                 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2178
2179                 if (BRCMF_BYTES_ON() &&
2180                     ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2181                      (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2182                         brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2183                                            "Tx Frame:\n");
2184                 else if (BRCMF_HDRS_ON())
2185                         brcmf_dbg_hex_dump(true, pkt_next->data,
2186                                            head_pad + bus->tx_hdrlen,
2187                                            "Tx Header:\n");
2188         }
2189         /* Hardware length tag of the first packet should be total
2190          * length of the chain (including padding)
2191          */
2192         if (bus->txglom)
2193                 brcmf_sdio_update_hwhdr(pktq->next->data, total_len);
2194         return 0;
2195 }
2196
2197 /**
2198  * brcmf_sdio_txpkt_postp - packet post processing for transmit
2199  * @bus: brcmf_sdio structure pointer
2200  * @pktq: packet list pointer
2201  *
2202  * Processes to be applied to the packet
2203  *      - Remove head padding
2204  *      - Remove tail padding
2205  */
2206 static void
2207 brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2208 {
2209         u8 *hdr;
2210         u32 dat_offset;
2211         u16 tail_pad;
2212         u16 dummy_flags, chop_len;
2213         struct sk_buff *pkt_next, *tmp, *pkt_prev;
2214
2215         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2216                 dummy_flags = *(u16 *)(pkt_next->cb);
2217                 if (dummy_flags & ALIGN_SKB_FLAG) {
2218                         chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2219                         if (chop_len) {
2220                                 pkt_prev = pkt_next->prev;
2221                                 skb_put(pkt_prev, chop_len);
2222                         }
2223                         __skb_unlink(pkt_next, pktq);
2224                         brcmu_pkt_buf_free_skb(pkt_next);
2225                 } else {
2226                         hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2227                         dat_offset = le32_to_cpu(*(__le32 *)hdr);
2228                         dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2229                                      SDPCM_DOFFSET_SHIFT;
2230                         skb_pull(pkt_next, dat_offset);
2231                         if (bus->txglom) {
2232                                 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2233                                 skb_trim(pkt_next, pkt_next->len - tail_pad);
2234                         }
2235                 }
2236         }
2237 }
2238
2239 /* Writes a HW/SW header into the packet and sends it. */
2240 /* Assumes: (a) header space already there, (b) caller holds lock */
2241 static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2242                             uint chan)
2243 {
2244         int ret;
2245         struct sk_buff *pkt_next, *tmp;
2246
2247         brcmf_dbg(TRACE, "Enter\n");
2248
2249         ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2250         if (ret)
2251                 goto done;
2252
2253         sdio_claim_host(bus->sdiodev->func[1]);
2254         ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2255         bus->sdcnt.f2txdata++;
2256
2257         if (ret < 0)
2258                 brcmf_sdio_txfail(bus);
2259
2260         sdio_release_host(bus->sdiodev->func[1]);
2261
2262 done:
2263         brcmf_sdio_txpkt_postp(bus, pktq);
2264         if (ret == 0)
2265                 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2266         skb_queue_walk_safe(pktq, pkt_next, tmp) {
2267                 __skb_unlink(pkt_next, pktq);
2268                 brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
2269         }
2270         return ret;
2271 }
2272
2273 static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2274 {
2275         struct sk_buff *pkt;
2276         struct sk_buff_head pktq;
2277         u32 intstatus = 0;
2278         int ret = 0, prec_out, i;
2279         uint cnt = 0;
2280         u8 tx_prec_map, pkt_num;
2281
2282         brcmf_dbg(TRACE, "Enter\n");
2283
2284         tx_prec_map = ~bus->flowcontrol;
2285
2286         /* Send frames until the limit or some other event */
2287         for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2288                 pkt_num = 1;
2289                 if (bus->txglom)
2290                         pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2291                                         bus->sdiodev->txglomsz);
2292                 pkt_num = min_t(u32, pkt_num,
2293                                 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2294                 __skb_queue_head_init(&pktq);
2295                 spin_lock_bh(&bus->txq_lock);
2296                 for (i = 0; i < pkt_num; i++) {
2297                         pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2298                                               &prec_out);
2299                         if (pkt == NULL)
2300                                 break;
2301                         __skb_queue_tail(&pktq, pkt);
2302                 }
2303                 spin_unlock_bh(&bus->txq_lock);
2304                 if (i == 0)
2305                         break;
2306
2307                 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2308
2309                 cnt += i;
2310
2311                 /* In poll mode, need to check for other events */
2312                 if (!bus->intr) {
2313                         /* Check device status, signal pending interrupt */
2314                         sdio_claim_host(bus->sdiodev->func[1]);
2315                         ret = r_sdreg32(bus, &intstatus,
2316                                         offsetof(struct sdpcmd_regs,
2317                                                  intstatus));
2318                         sdio_release_host(bus->sdiodev->func[1]);
2319                         bus->sdcnt.f2txdata++;
2320                         if (ret != 0)
2321                                 break;
2322                         if (intstatus & bus->hostintmask)
2323                                 atomic_set(&bus->ipend, 1);
2324                 }
2325         }
2326
2327         /* Deflow-control stack if needed */
2328         if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2329             bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2330                 bus->txoff = false;
2331                 brcmf_txflowblock(bus->sdiodev->dev, false);
2332         }
2333
2334         return cnt;
2335 }
2336
2337 static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2338 {
2339         u8 doff;
2340         u16 pad;
2341         uint retries = 0;
2342         struct brcmf_sdio_hdrinfo hd_info = {0};
2343         int ret;
2344
2345         brcmf_dbg(TRACE, "Enter\n");
2346
2347         /* Back the pointer to make room for bus header */
2348         frame -= bus->tx_hdrlen;
2349         len += bus->tx_hdrlen;
2350
2351         /* Add alignment padding (optional for ctl frames) */
2352         doff = ((unsigned long)frame % bus->head_align);
2353         if (doff) {
2354                 frame -= doff;
2355                 len += doff;
2356                 memset(frame + bus->tx_hdrlen, 0, doff);
2357         }
2358
2359         /* Round send length to next SDIO block */
2360         pad = 0;
2361         if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2362                 pad = bus->blocksize - (len % bus->blocksize);
2363                 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2364                         pad = 0;
2365         } else if (len % bus->head_align) {
2366                 pad = bus->head_align - (len % bus->head_align);
2367         }
2368         len += pad;
2369
2370         hd_info.len = len - pad;
2371         hd_info.channel = SDPCM_CONTROL_CHANNEL;
2372         hd_info.dat_offset = doff + bus->tx_hdrlen;
2373         hd_info.seq_num = bus->tx_seq;
2374         hd_info.lastfrm = true;
2375         hd_info.tail_pad = pad;
2376         brcmf_sdio_hdpack(bus, frame, &hd_info);
2377
2378         if (bus->txglom)
2379                 brcmf_sdio_update_hwhdr(frame, len);
2380
2381         brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2382                            frame, len, "Tx Frame:\n");
2383         brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2384                            BRCMF_HDRS_ON(),
2385                            frame, min_t(u16, len, 16), "TxHdr:\n");
2386
2387         do {
2388                 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2389
2390                 if (ret < 0)
2391                         brcmf_sdio_txfail(bus);
2392                 else
2393                         bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2394         } while (ret < 0 && retries++ < TXRETRIES);
2395
2396         return ret;
2397 }
2398
2399 static void brcmf_sdio_bus_stop(struct device *dev)
2400 {
2401         u32 local_hostintmask;
2402         u8 saveclk;
2403         int err;
2404         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2405         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2406         struct brcmf_sdio *bus = sdiodev->bus;
2407
2408         brcmf_dbg(TRACE, "Enter\n");
2409
2410         if (bus->watchdog_tsk) {
2411                 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2412                 kthread_stop(bus->watchdog_tsk);
2413                 bus->watchdog_tsk = NULL;
2414         }
2415
2416         if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2417                 sdio_claim_host(sdiodev->func[1]);
2418
2419                 /* Enable clock for device interrupts */
2420                 brcmf_sdio_bus_sleep(bus, false, false);
2421
2422                 /* Disable and clear interrupts at the chip level also */
2423                 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask));
2424                 local_hostintmask = bus->hostintmask;
2425                 bus->hostintmask = 0;
2426
2427                 /* Force backplane clocks to assure F2 interrupt propagates */
2428                 saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2429                                             &err);
2430                 if (!err)
2431                         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2432                                           (saveclk | SBSDIO_FORCE_HT), &err);
2433                 if (err)
2434                         brcmf_err("Failed to force clock for F2: err %d\n",
2435                                   err);
2436
2437                 /* Turn off the bus (F2), free any pending packets */
2438                 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2439                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
2440
2441                 /* Clear any pending interrupts now that F2 is disabled */
2442                 w_sdreg32(bus, local_hostintmask,
2443                           offsetof(struct sdpcmd_regs, intstatus));
2444
2445                 sdio_release_host(sdiodev->func[1]);
2446         }
2447         /* Clear the data packet queues */
2448         brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2449
2450         /* Clear any held glomming stuff */
2451         brcmu_pkt_buf_free_skb(bus->glomd);
2452         brcmf_sdio_free_glom(bus);
2453
2454         /* Clear rx control and wake any waiters */
2455         spin_lock_bh(&bus->rxctl_lock);
2456         bus->rxlen = 0;
2457         spin_unlock_bh(&bus->rxctl_lock);
2458         brcmf_sdio_dcmd_resp_wake(bus);
2459
2460         /* Reset some F2 state stuff */
2461         bus->rxskip = false;
2462         bus->tx_seq = bus->rx_seq = 0;
2463 }
2464
2465 static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2466 {
2467         struct brcmf_sdio_dev *sdiodev;
2468         unsigned long flags;
2469
2470         sdiodev = bus->sdiodev;
2471         if (sdiodev->oob_irq_requested) {
2472                 spin_lock_irqsave(&sdiodev->irq_en_lock, flags);
2473                 if (!sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2474                         enable_irq(sdiodev->settings->bus.sdio.oob_irq_nr);
2475                         sdiodev->irq_en = true;
2476                 }
2477                 spin_unlock_irqrestore(&sdiodev->irq_en_lock, flags);
2478         }
2479 }
2480
2481 static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2482 {
2483         struct brcmf_core *buscore;
2484         u32 addr;
2485         unsigned long val;
2486         int ret;
2487
2488         buscore = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
2489         addr = buscore->base + offsetof(struct sdpcmd_regs, intstatus);
2490
2491         val = brcmf_sdiod_regrl(bus->sdiodev, addr, &ret);
2492         bus->sdcnt.f1regdata++;
2493         if (ret != 0)
2494                 return ret;
2495
2496         val &= bus->hostintmask;
2497         atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2498
2499         /* Clear interrupts */
2500         if (val) {
2501                 brcmf_sdiod_regwl(bus->sdiodev, addr, val, &ret);
2502                 bus->sdcnt.f1regdata++;
2503                 atomic_or(val, &bus->intstatus);
2504         }
2505
2506         return ret;
2507 }
2508
2509 static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2510 {
2511         u32 newstatus = 0;
2512         unsigned long intstatus;
2513         uint txlimit = bus->txbound;    /* Tx frames to send before resched */
2514         uint framecnt;                  /* Temporary counter of tx/rx frames */
2515         int err = 0;
2516
2517         brcmf_dbg(TRACE, "Enter\n");
2518
2519         sdio_claim_host(bus->sdiodev->func[1]);
2520
2521         /* If waiting for HTAVAIL, check status */
2522         if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2523                 u8 clkctl, devctl = 0;
2524
2525 #ifdef DEBUG
2526                 /* Check for inconsistent device control */
2527                 devctl = brcmf_sdiod_regrb(bus->sdiodev,
2528                                            SBSDIO_DEVICE_CTL, &err);
2529 #endif                          /* DEBUG */
2530
2531                 /* Read CSR, if clock on switch to AVAIL, else ignore */
2532                 clkctl = brcmf_sdiod_regrb(bus->sdiodev,
2533                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
2534
2535                 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2536                           devctl, clkctl);
2537
2538                 if (SBSDIO_HTAV(clkctl)) {
2539                         devctl = brcmf_sdiod_regrb(bus->sdiodev,
2540                                                    SBSDIO_DEVICE_CTL, &err);
2541                         devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2542                         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2543                                           devctl, &err);
2544                         bus->clkstate = CLK_AVAIL;
2545                 }
2546         }
2547
2548         /* Make sure backplane clock is on */
2549         brcmf_sdio_bus_sleep(bus, false, true);
2550
2551         /* Pending interrupt indicates new device status */
2552         if (atomic_read(&bus->ipend) > 0) {
2553                 atomic_set(&bus->ipend, 0);
2554                 err = brcmf_sdio_intr_rstatus(bus);
2555         }
2556
2557         /* Start with leftover status bits */
2558         intstatus = atomic_xchg(&bus->intstatus, 0);
2559
2560         /* Handle flow-control change: read new state in case our ack
2561          * crossed another change interrupt.  If change still set, assume
2562          * FC ON for safety, let next loop through do the debounce.
2563          */
2564         if (intstatus & I_HMB_FC_CHANGE) {
2565                 intstatus &= ~I_HMB_FC_CHANGE;
2566                 err = w_sdreg32(bus, I_HMB_FC_CHANGE,
2567                                 offsetof(struct sdpcmd_regs, intstatus));
2568
2569                 err = r_sdreg32(bus, &newstatus,
2570                                 offsetof(struct sdpcmd_regs, intstatus));
2571                 bus->sdcnt.f1regdata += 2;
2572                 atomic_set(&bus->fcstate,
2573                            !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2574                 intstatus |= (newstatus & bus->hostintmask);
2575         }
2576
2577         /* Handle host mailbox indication */
2578         if (intstatus & I_HMB_HOST_INT) {
2579                 intstatus &= ~I_HMB_HOST_INT;
2580                 intstatus |= brcmf_sdio_hostmail(bus);
2581         }
2582
2583         sdio_release_host(bus->sdiodev->func[1]);
2584
2585         /* Generally don't ask for these, can get CRC errors... */
2586         if (intstatus & I_WR_OOSYNC) {
2587                 brcmf_err("Dongle reports WR_OOSYNC\n");
2588                 intstatus &= ~I_WR_OOSYNC;
2589         }
2590
2591         if (intstatus & I_RD_OOSYNC) {
2592                 brcmf_err("Dongle reports RD_OOSYNC\n");
2593                 intstatus &= ~I_RD_OOSYNC;
2594         }
2595
2596         if (intstatus & I_SBINT) {
2597                 brcmf_err("Dongle reports SBINT\n");
2598                 intstatus &= ~I_SBINT;
2599         }
2600
2601         /* Would be active due to wake-wlan in gSPI */
2602         if (intstatus & I_CHIPACTIVE) {
2603                 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2604                 intstatus &= ~I_CHIPACTIVE;
2605         }
2606
2607         /* Ignore frame indications if rxskip is set */
2608         if (bus->rxskip)
2609                 intstatus &= ~I_HMB_FRAME_IND;
2610
2611         /* On frame indication, read available frames */
2612         if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2613                 brcmf_sdio_readframes(bus, bus->rxbound);
2614                 if (!bus->rxpending)
2615                         intstatus &= ~I_HMB_FRAME_IND;
2616         }
2617
2618         /* Keep still-pending events for next scheduling */
2619         if (intstatus)
2620                 atomic_or(intstatus, &bus->intstatus);
2621
2622         brcmf_sdio_clrintr(bus);
2623
2624         if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2625             data_ok(bus)) {
2626                 sdio_claim_host(bus->sdiodev->func[1]);
2627                 if (bus->ctrl_frame_stat) {
2628                         err = brcmf_sdio_tx_ctrlframe(bus,  bus->ctrl_frame_buf,
2629                                                       bus->ctrl_frame_len);
2630                         bus->ctrl_frame_err = err;
2631                         wmb();
2632                         bus->ctrl_frame_stat = false;
2633                 }
2634                 sdio_release_host(bus->sdiodev->func[1]);
2635                 brcmf_sdio_wait_event_wakeup(bus);
2636         }
2637         /* Send queued frames (limit 1 if rx may still be pending) */
2638         if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2639             brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2640             data_ok(bus)) {
2641                 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2642                                             txlimit;
2643                 brcmf_sdio_sendfromq(bus, framecnt);
2644         }
2645
2646         if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2647                 brcmf_err("failed backplane access over SDIO, halting operation\n");
2648                 atomic_set(&bus->intstatus, 0);
2649                 if (bus->ctrl_frame_stat) {
2650                         sdio_claim_host(bus->sdiodev->func[1]);
2651                         if (bus->ctrl_frame_stat) {
2652                                 bus->ctrl_frame_err = -ENODEV;
2653                                 wmb();
2654                                 bus->ctrl_frame_stat = false;
2655                                 brcmf_sdio_wait_event_wakeup(bus);
2656                         }
2657                         sdio_release_host(bus->sdiodev->func[1]);
2658                 }
2659         } else if (atomic_read(&bus->intstatus) ||
2660                    atomic_read(&bus->ipend) > 0 ||
2661                    (!atomic_read(&bus->fcstate) &&
2662                     brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2663                     data_ok(bus))) {
2664                 bus->dpc_triggered = true;
2665         }
2666 }
2667
2668 static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2669 {
2670         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2671         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2672         struct brcmf_sdio *bus = sdiodev->bus;
2673
2674         return &bus->txq;
2675 }
2676
2677 static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2678 {
2679         struct sk_buff *p;
2680         int eprec = -1;         /* precedence to evict from */
2681
2682         /* Fast case, precedence queue is not full and we are also not
2683          * exceeding total queue length
2684          */
2685         if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2686                 brcmu_pktq_penq(q, prec, pkt);
2687                 return true;
2688         }
2689
2690         /* Determine precedence from which to evict packet, if any */
2691         if (pktq_pfull(q, prec)) {
2692                 eprec = prec;
2693         } else if (pktq_full(q)) {
2694                 p = brcmu_pktq_peek_tail(q, &eprec);
2695                 if (eprec > prec)
2696                         return false;
2697         }
2698
2699         /* Evict if needed */
2700         if (eprec >= 0) {
2701                 /* Detect queueing to unconfigured precedence */
2702                 if (eprec == prec)
2703                         return false;   /* refuse newer (incoming) packet */
2704                 /* Evict packet according to discard policy */
2705                 p = brcmu_pktq_pdeq_tail(q, eprec);
2706                 if (p == NULL)
2707                         brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2708                 brcmu_pkt_buf_free_skb(p);
2709         }
2710
2711         /* Enqueue */
2712         p = brcmu_pktq_penq(q, prec, pkt);
2713         if (p == NULL)
2714                 brcmf_err("brcmu_pktq_penq() failed\n");
2715
2716         return p != NULL;
2717 }
2718
2719 static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2720 {
2721         int ret = -EBADE;
2722         uint prec;
2723         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2724         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2725         struct brcmf_sdio *bus = sdiodev->bus;
2726
2727         brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2728         if (sdiodev->state != BRCMF_SDIOD_DATA)
2729                 return -EIO;
2730
2731         /* Add space for the header */
2732         skb_push(pkt, bus->tx_hdrlen);
2733         /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2734
2735         prec = prio2prec((pkt->priority & PRIOMASK));
2736
2737         /* Check for existing queue, current flow-control,
2738                          pending event, or pending clock */
2739         brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2740         bus->sdcnt.fcqueued++;
2741
2742         /* Priority based enq */
2743         spin_lock_bh(&bus->txq_lock);
2744         /* reset bus_flags in packet cb */
2745         *(u16 *)(pkt->cb) = 0;
2746         if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2747                 skb_pull(pkt, bus->tx_hdrlen);
2748                 brcmf_err("out of bus->txq !!!\n");
2749                 ret = -ENOSR;
2750         } else {
2751                 ret = 0;
2752         }
2753
2754         if (pktq_len(&bus->txq) >= TXHI) {
2755                 bus->txoff = true;
2756                 brcmf_txflowblock(dev, true);
2757         }
2758         spin_unlock_bh(&bus->txq_lock);
2759
2760 #ifdef DEBUG
2761         if (pktq_plen(&bus->txq, prec) > qcount[prec])
2762                 qcount[prec] = pktq_plen(&bus->txq, prec);
2763 #endif
2764
2765         brcmf_sdio_trigger_dpc(bus);
2766         return ret;
2767 }
2768
2769 #ifdef DEBUG
2770 #define CONSOLE_LINE_MAX        192
2771
2772 static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2773 {
2774         struct brcmf_console *c = &bus->console;
2775         u8 line[CONSOLE_LINE_MAX], ch;
2776         u32 n, idx, addr;
2777         int rv;
2778
2779         /* Don't do anything until FWREADY updates console address */
2780         if (bus->console_addr == 0)
2781                 return 0;
2782
2783         /* Read console log struct */
2784         addr = bus->console_addr + offsetof(struct rte_console, log_le);
2785         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2786                                sizeof(c->log_le));
2787         if (rv < 0)
2788                 return rv;
2789
2790         /* Allocate console buffer (one time only) */
2791         if (c->buf == NULL) {
2792                 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2793                 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2794                 if (c->buf == NULL)
2795                         return -ENOMEM;
2796         }
2797
2798         idx = le32_to_cpu(c->log_le.idx);
2799
2800         /* Protect against corrupt value */
2801         if (idx > c->bufsize)
2802                 return -EBADE;
2803
2804         /* Skip reading the console buffer if the index pointer
2805          has not moved */
2806         if (idx == c->last)
2807                 return 0;
2808
2809         /* Read the console buffer */
2810         addr = le32_to_cpu(c->log_le.buf);
2811         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2812         if (rv < 0)
2813                 return rv;
2814
2815         while (c->last != idx) {
2816                 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2817                         if (c->last == idx) {
2818                                 /* This would output a partial line.
2819                                  * Instead, back up
2820                                  * the buffer pointer and output this
2821                                  * line next time around.
2822                                  */
2823                                 if (c->last >= n)
2824                                         c->last -= n;
2825                                 else
2826                                         c->last = c->bufsize - n;
2827                                 goto break2;
2828                         }
2829                         ch = c->buf[c->last];
2830                         c->last = (c->last + 1) % c->bufsize;
2831                         if (ch == '\n')
2832                                 break;
2833                         line[n] = ch;
2834                 }
2835
2836                 if (n > 0) {
2837                         if (line[n - 1] == '\r')
2838                                 n--;
2839                         line[n] = 0;
2840                         pr_debug("CONSOLE: %s\n", line);
2841                 }
2842         }
2843 break2:
2844
2845         return 0;
2846 }
2847 #endif                          /* DEBUG */
2848
2849 static int
2850 brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2851 {
2852         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2853         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2854         struct brcmf_sdio *bus = sdiodev->bus;
2855         int ret;
2856
2857         brcmf_dbg(TRACE, "Enter\n");
2858         if (sdiodev->state != BRCMF_SDIOD_DATA)
2859                 return -EIO;
2860
2861         /* Send from dpc */
2862         bus->ctrl_frame_buf = msg;
2863         bus->ctrl_frame_len = msglen;
2864         wmb();
2865         bus->ctrl_frame_stat = true;
2866
2867         brcmf_sdio_trigger_dpc(bus);
2868         wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2869                                          CTL_DONE_TIMEOUT);
2870         ret = 0;
2871         if (bus->ctrl_frame_stat) {
2872                 sdio_claim_host(bus->sdiodev->func[1]);
2873                 if (bus->ctrl_frame_stat) {
2874                         brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2875                         bus->ctrl_frame_stat = false;
2876                         ret = -ETIMEDOUT;
2877                 }
2878                 sdio_release_host(bus->sdiodev->func[1]);
2879         }
2880         if (!ret) {
2881                 brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2882                           bus->ctrl_frame_err);
2883                 rmb();
2884                 ret = bus->ctrl_frame_err;
2885         }
2886
2887         if (ret)
2888                 bus->sdcnt.tx_ctlerrs++;
2889         else
2890                 bus->sdcnt.tx_ctlpkts++;
2891
2892         return ret;
2893 }
2894
2895 #ifdef DEBUG
2896 static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2897                                    struct sdpcm_shared *sh)
2898 {
2899         u32 addr, console_ptr, console_size, console_index;
2900         char *conbuf = NULL;
2901         __le32 sh_val;
2902         int rv;
2903
2904         /* obtain console information from device memory */
2905         addr = sh->console_addr + offsetof(struct rte_console, log_le);
2906         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2907                                (u8 *)&sh_val, sizeof(u32));
2908         if (rv < 0)
2909                 return rv;
2910         console_ptr = le32_to_cpu(sh_val);
2911
2912         addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2913         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2914                                (u8 *)&sh_val, sizeof(u32));
2915         if (rv < 0)
2916                 return rv;
2917         console_size = le32_to_cpu(sh_val);
2918
2919         addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2920         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2921                                (u8 *)&sh_val, sizeof(u32));
2922         if (rv < 0)
2923                 return rv;
2924         console_index = le32_to_cpu(sh_val);
2925
2926         /* allocate buffer for console data */
2927         if (console_size <= CONSOLE_BUFFER_MAX)
2928                 conbuf = vzalloc(console_size+1);
2929
2930         if (!conbuf)
2931                 return -ENOMEM;
2932
2933         /* obtain the console data from device */
2934         conbuf[console_size] = '\0';
2935         rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2936                                console_size);
2937         if (rv < 0)
2938                 goto done;
2939
2940         rv = seq_write(seq, conbuf + console_index,
2941                        console_size - console_index);
2942         if (rv < 0)
2943                 goto done;
2944
2945         if (console_index > 0)
2946                 rv = seq_write(seq, conbuf, console_index - 1);
2947
2948 done:
2949         vfree(conbuf);
2950         return rv;
2951 }
2952
2953 static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
2954                                 struct sdpcm_shared *sh)
2955 {
2956         int error;
2957         struct brcmf_trap_info tr;
2958
2959         if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2960                 brcmf_dbg(INFO, "no trap in firmware\n");
2961                 return 0;
2962         }
2963
2964         error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
2965                                   sizeof(struct brcmf_trap_info));
2966         if (error < 0)
2967                 return error;
2968
2969         seq_printf(seq,
2970                    "dongle trap info: type 0x%x @ epc 0x%08x\n"
2971                    "  cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
2972                    "  lr   0x%08x pc   0x%08x offset 0x%x\n"
2973                    "  r0   0x%08x r1   0x%08x r2 0x%08x r3 0x%08x\n"
2974                    "  r4   0x%08x r5   0x%08x r6 0x%08x r7 0x%08x\n",
2975                    le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
2976                    le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
2977                    le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
2978                    le32_to_cpu(tr.pc), sh->trap_addr,
2979                    le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
2980                    le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
2981                    le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
2982                    le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
2983
2984         return 0;
2985 }
2986
2987 static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
2988                                   struct sdpcm_shared *sh)
2989 {
2990         int error = 0;
2991         char file[80] = "?";
2992         char expr[80] = "<???>";
2993
2994         if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
2995                 brcmf_dbg(INFO, "firmware not built with -assert\n");
2996                 return 0;
2997         } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
2998                 brcmf_dbg(INFO, "no assert in dongle\n");
2999                 return 0;
3000         }
3001
3002         sdio_claim_host(bus->sdiodev->func[1]);
3003         if (sh->assert_file_addr != 0) {
3004                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3005                                           sh->assert_file_addr, (u8 *)file, 80);
3006                 if (error < 0)
3007                         return error;
3008         }
3009         if (sh->assert_exp_addr != 0) {
3010                 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3011                                           sh->assert_exp_addr, (u8 *)expr, 80);
3012                 if (error < 0)
3013                         return error;
3014         }
3015         sdio_release_host(bus->sdiodev->func[1]);
3016
3017         seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3018                    file, sh->assert_line, expr);
3019         return 0;
3020 }
3021
3022 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3023 {
3024         int error;
3025         struct sdpcm_shared sh;
3026
3027         error = brcmf_sdio_readshared(bus, &sh);
3028
3029         if (error < 0)
3030                 return error;
3031
3032         if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3033                 brcmf_dbg(INFO, "firmware not built with -assert\n");
3034         else if (sh.flags & SDPCM_SHARED_ASSERT)
3035                 brcmf_err("assertion in dongle\n");
3036
3037         if (sh.flags & SDPCM_SHARED_TRAP)
3038                 brcmf_err("firmware trap in dongle\n");
3039
3040         return 0;
3041 }
3042
3043 static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3044 {
3045         int error = 0;
3046         struct sdpcm_shared sh;
3047
3048         error = brcmf_sdio_readshared(bus, &sh);
3049         if (error < 0)
3050                 goto done;
3051
3052         error = brcmf_sdio_assert_info(seq, bus, &sh);
3053         if (error < 0)
3054                 goto done;
3055
3056         error = brcmf_sdio_trap_info(seq, bus, &sh);
3057         if (error < 0)
3058                 goto done;
3059
3060         error = brcmf_sdio_dump_console(seq, bus, &sh);
3061
3062 done:
3063         return error;
3064 }
3065
3066 static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3067 {
3068         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3069         struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3070
3071         return brcmf_sdio_died_dump(seq, bus);
3072 }
3073
3074 static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3075 {
3076         struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3077         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3078         struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3079
3080         seq_printf(seq,
3081                    "intrcount:    %u\nlastintrs:    %u\n"
3082                    "pollcnt:      %u\nregfails:     %u\n"
3083                    "tx_sderrs:    %u\nfcqueued:     %u\n"
3084                    "rxrtx:        %u\nrx_toolong:   %u\n"
3085                    "rxc_errors:   %u\nrx_hdrfail:   %u\n"
3086                    "rx_badhdr:    %u\nrx_badseq:    %u\n"
3087                    "fc_rcvd:      %u\nfc_xoff:      %u\n"
3088                    "fc_xon:       %u\nrxglomfail:   %u\n"
3089                    "rxglomframes: %u\nrxglompkts:   %u\n"
3090                    "f2rxhdrs:     %u\nf2rxdata:     %u\n"
3091                    "f2txdata:     %u\nf1regdata:    %u\n"
3092                    "tickcnt:      %u\ntx_ctlerrs:   %lu\n"
3093                    "tx_ctlpkts:   %lu\nrx_ctlerrs:   %lu\n"
3094                    "rx_ctlpkts:   %lu\nrx_readahead: %lu\n",
3095                    sdcnt->intrcount, sdcnt->lastintrs,
3096                    sdcnt->pollcnt, sdcnt->regfails,
3097                    sdcnt->tx_sderrs, sdcnt->fcqueued,
3098                    sdcnt->rxrtx, sdcnt->rx_toolong,
3099                    sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3100                    sdcnt->rx_badhdr, sdcnt->rx_badseq,
3101                    sdcnt->fc_rcvd, sdcnt->fc_xoff,
3102                    sdcnt->fc_xon, sdcnt->rxglomfail,
3103                    sdcnt->rxglomframes, sdcnt->rxglompkts,
3104                    sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3105                    sdcnt->f2txdata, sdcnt->f1regdata,
3106                    sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3107                    sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3108                    sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3109
3110         return 0;
3111 }
3112
3113 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3114 {
3115         struct brcmf_pub *drvr = bus->sdiodev->bus_if->drvr;
3116         struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3117
3118         if (IS_ERR_OR_NULL(dentry))
3119                 return;
3120
3121         bus->console_interval = BRCMF_CONSOLE;
3122
3123         brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3124         brcmf_debugfs_add_entry(drvr, "counters",
3125                                 brcmf_debugfs_sdio_count_read);
3126         debugfs_create_u32("console_interval", 0644, dentry,
3127                            &bus->console_interval);
3128 }
3129 #else
3130 static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3131 {
3132         return 0;
3133 }
3134
3135 static void brcmf_sdio_debugfs_create(struct brcmf_sdio *bus)
3136 {
3137 }
3138 #endif /* DEBUG */
3139
3140 static int
3141 brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3142 {
3143         int timeleft;
3144         uint rxlen = 0;
3145         bool pending;
3146         u8 *buf;
3147         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3148         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3149         struct brcmf_sdio *bus = sdiodev->bus;
3150
3151         brcmf_dbg(TRACE, "Enter\n");
3152         if (sdiodev->state != BRCMF_SDIOD_DATA)
3153                 return -EIO;
3154
3155         /* Wait until control frame is available */
3156         timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3157
3158         spin_lock_bh(&bus->rxctl_lock);
3159         rxlen = bus->rxlen;
3160         memcpy(msg, bus->rxctl, min(msglen, rxlen));
3161         bus->rxctl = NULL;
3162         buf = bus->rxctl_orig;
3163         bus->rxctl_orig = NULL;
3164         bus->rxlen = 0;
3165         spin_unlock_bh(&bus->rxctl_lock);
3166         vfree(buf);
3167
3168         if (rxlen) {
3169                 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3170                           rxlen, msglen);
3171         } else if (timeleft == 0) {
3172                 brcmf_err("resumed on timeout\n");
3173                 brcmf_sdio_checkdied(bus);
3174         } else if (pending) {
3175                 brcmf_dbg(CTL, "cancelled\n");
3176                 return -ERESTARTSYS;
3177         } else {
3178                 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3179                 brcmf_sdio_checkdied(bus);
3180         }
3181
3182         if (rxlen)
3183                 bus->sdcnt.rx_ctlpkts++;
3184         else
3185                 bus->sdcnt.rx_ctlerrs++;
3186
3187         return rxlen ? (int)rxlen : -ETIMEDOUT;
3188 }
3189
3190 #ifdef DEBUG
3191 static bool
3192 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3193                         u8 *ram_data, uint ram_sz)
3194 {
3195         char *ram_cmp;
3196         int err;
3197         bool ret = true;
3198         int address;
3199         int offset;
3200         int len;
3201
3202         /* read back and verify */
3203         brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3204                   ram_sz);
3205         ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3206         /* do not proceed while no memory but  */
3207         if (!ram_cmp)
3208                 return true;
3209
3210         address = ram_addr;
3211         offset = 0;
3212         while (offset < ram_sz) {
3213                 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3214                       ram_sz - offset;
3215                 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3216                 if (err) {
3217                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3218                                   err, len, address);
3219                         ret = false;
3220                         break;
3221                 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3222                         brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3223                                   offset, len);
3224                         ret = false;
3225                         break;
3226                 }
3227                 offset += len;
3228                 address += len;
3229         }
3230
3231         kfree(ram_cmp);
3232
3233         return ret;
3234 }
3235 #else   /* DEBUG */
3236 static bool
3237 brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3238                         u8 *ram_data, uint ram_sz)
3239 {
3240         return true;
3241 }
3242 #endif  /* DEBUG */
3243
3244 static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3245                                          const struct firmware *fw)
3246 {
3247         int err;
3248
3249         brcmf_dbg(TRACE, "Enter\n");
3250
3251         err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3252                                 (u8 *)fw->data, fw->size);
3253         if (err)
3254                 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3255                           err, (int)fw->size, bus->ci->rambase);
3256         else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3257                                           (u8 *)fw->data, fw->size))
3258                 err = -EIO;
3259
3260         return err;
3261 }
3262
3263 static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3264                                      void *vars, u32 varsz)
3265 {
3266         int address;
3267         int err;
3268
3269         brcmf_dbg(TRACE, "Enter\n");
3270
3271         address = bus->ci->ramsize - varsz + bus->ci->rambase;
3272         err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3273         if (err)
3274                 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3275                           err, varsz, address);
3276         else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3277                 err = -EIO;
3278
3279         return err;
3280 }
3281
3282 static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3283                                         const struct firmware *fw,
3284                                         void *nvram, u32 nvlen)
3285 {
3286         int bcmerror;
3287         u32 rstvec;
3288
3289         sdio_claim_host(bus->sdiodev->func[1]);
3290         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3291
3292         rstvec = get_unaligned_le32(fw->data);
3293         brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3294
3295         bcmerror = brcmf_sdio_download_code_file(bus, fw);
3296         release_firmware(fw);
3297         if (bcmerror) {
3298                 brcmf_err("dongle image file download failed\n");
3299                 brcmf_fw_nvram_free(nvram);
3300                 goto err;
3301         }
3302
3303         bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3304         brcmf_fw_nvram_free(nvram);
3305         if (bcmerror) {
3306                 brcmf_err("dongle nvram file download failed\n");
3307                 goto err;
3308         }
3309
3310         /* Take arm out of reset */
3311         if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3312                 brcmf_err("error getting out of ARM core reset\n");
3313                 goto err;
3314         }
3315
3316 err:
3317         brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3318         sdio_release_host(bus->sdiodev->func[1]);
3319         return bcmerror;
3320 }
3321
3322 static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3323 {
3324         int err = 0;
3325         u8 val;
3326
3327         brcmf_dbg(TRACE, "Enter\n");
3328
3329         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3330         if (err) {
3331                 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3332                 return;
3333         }
3334
3335         val |= 1 << SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3336         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3337         if (err) {
3338                 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3339                 return;
3340         }
3341
3342         /* Add CMD14 Support */
3343         brcmf_sdiod_regwb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3344                           (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3345                            SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT),
3346                           &err);
3347         if (err) {
3348                 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3349                 return;
3350         }
3351
3352         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3353                           SBSDIO_FORCE_HT, &err);
3354         if (err) {
3355                 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3356                 return;
3357         }
3358
3359         /* set flag */
3360         bus->sr_enabled = true;
3361         brcmf_dbg(INFO, "SR enabled\n");
3362 }
3363
3364 /* enable KSO bit */
3365 static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3366 {
3367         u8 val;
3368         int err = 0;
3369
3370         brcmf_dbg(TRACE, "Enter\n");
3371
3372         /* KSO bit added in SDIO core rev 12 */
3373         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12)
3374                 return 0;
3375
3376         val = brcmf_sdiod_regrb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3377         if (err) {
3378                 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3379                 return err;
3380         }
3381
3382         if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3383                 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3384                         SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3385                 brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3386                                   val, &err);
3387                 if (err) {
3388                         brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3389                         return err;
3390                 }
3391         }
3392
3393         return 0;
3394 }
3395
3396
3397 static int brcmf_sdio_bus_preinit(struct device *dev)
3398 {
3399         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3400         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3401         struct brcmf_sdio *bus = sdiodev->bus;
3402         uint pad_size;
3403         u32 value;
3404         int err;
3405
3406         /* the commands below use the terms tx and rx from
3407          * a device perspective, ie. bus:txglom affects the
3408          * bus transfers from device to host.
3409          */
3410         if (brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV)->rev < 12) {
3411                 /* for sdio core rev < 12, disable txgloming */
3412                 value = 0;
3413                 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3414                                            sizeof(u32));
3415         } else {
3416                 /* otherwise, set txglomalign */
3417                 value = sdiodev->settings->bus.sdio.sd_sgentry_align;
3418                 /* SDIO ADMA requires at least 32 bit alignment */
3419                 value = max_t(u32, value, 4);
3420                 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3421                                            sizeof(u32));
3422         }
3423
3424         if (err < 0)
3425                 goto done;
3426
3427         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3428         if (sdiodev->sg_support) {
3429                 bus->txglom = false;
3430                 value = 1;
3431                 pad_size = bus->sdiodev->func[2]->cur_blksize << 1;
3432                 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3433                                            &value, sizeof(u32));
3434                 if (err < 0) {
3435                         /* bus:rxglom is allowed to fail */
3436                         err = 0;
3437                 } else {
3438                         bus->txglom = true;
3439                         bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3440                 }
3441         }
3442         brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3443
3444 done:
3445         return err;
3446 }
3447
3448 static size_t brcmf_sdio_bus_get_ramsize(struct device *dev)
3449 {
3450         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3451         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3452         struct brcmf_sdio *bus = sdiodev->bus;
3453
3454         return bus->ci->ramsize - bus->ci->srsize;
3455 }
3456
3457 static int brcmf_sdio_bus_get_memdump(struct device *dev, void *data,
3458                                       size_t mem_size)
3459 {
3460         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3461         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3462         struct brcmf_sdio *bus = sdiodev->bus;
3463         int err;
3464         int address;
3465         int offset;
3466         int len;
3467
3468         brcmf_dbg(INFO, "dump at 0x%08x: size=%zu\n", bus->ci->rambase,
3469                   mem_size);
3470
3471         address = bus->ci->rambase;
3472         offset = err = 0;
3473         sdio_claim_host(sdiodev->func[1]);
3474         while (offset < mem_size) {
3475                 len = ((offset + MEMBLOCK) < mem_size) ? MEMBLOCK :
3476                       mem_size - offset;
3477                 err = brcmf_sdiod_ramrw(sdiodev, false, address, data, len);
3478                 if (err) {
3479                         brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3480                                   err, len, address);
3481                         goto done;
3482                 }
3483                 data += len;
3484                 offset += len;
3485                 address += len;
3486         }
3487
3488 done:
3489         sdio_release_host(sdiodev->func[1]);
3490         return err;
3491 }
3492
3493 void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3494 {
3495         if (!bus->dpc_triggered) {
3496                 bus->dpc_triggered = true;
3497                 queue_work(bus->brcmf_wq, &bus->datawork);
3498         }
3499 }
3500
3501 void brcmf_sdio_isr(struct brcmf_sdio *bus)
3502 {
3503         brcmf_dbg(TRACE, "Enter\n");
3504
3505         if (!bus) {
3506                 brcmf_err("bus is null pointer, exiting\n");
3507                 return;
3508         }
3509
3510         /* Count the interrupt call */
3511         bus->sdcnt.intrcount++;
3512         if (in_interrupt())
3513                 atomic_set(&bus->ipend, 1);
3514         else
3515                 if (brcmf_sdio_intr_rstatus(bus)) {
3516                         brcmf_err("failed backplane access\n");
3517                 }
3518
3519         /* Disable additional interrupts (is this needed now)? */
3520         if (!bus->intr)
3521                 brcmf_err("isr w/o interrupt configured!\n");
3522
3523         bus->dpc_triggered = true;
3524         queue_work(bus->brcmf_wq, &bus->datawork);
3525 }
3526
3527 static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3528 {
3529         brcmf_dbg(TIMER, "Enter\n");
3530
3531         /* Poll period: check device if appropriate. */
3532         if (!bus->sr_enabled &&
3533             bus->poll && (++bus->polltick >= bus->pollrate)) {
3534                 u32 intstatus = 0;
3535
3536                 /* Reset poll tick */
3537                 bus->polltick = 0;
3538
3539                 /* Check device if no interrupts */
3540                 if (!bus->intr ||
3541                     (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3542
3543                         if (!bus->dpc_triggered) {
3544                                 u8 devpend;
3545
3546                                 sdio_claim_host(bus->sdiodev->func[1]);
3547                                 devpend = brcmf_sdiod_regrb(bus->sdiodev,
3548                                                             SDIO_CCCR_INTx,
3549                                                             NULL);
3550                                 sdio_release_host(bus->sdiodev->func[1]);
3551                                 intstatus = devpend & (INTR_STATUS_FUNC1 |
3552                                                        INTR_STATUS_FUNC2);
3553                         }
3554
3555                         /* If there is something, make like the ISR and
3556                                  schedule the DPC */
3557                         if (intstatus) {
3558                                 bus->sdcnt.pollcnt++;
3559                                 atomic_set(&bus->ipend, 1);
3560
3561                                 bus->dpc_triggered = true;
3562                                 queue_work(bus->brcmf_wq, &bus->datawork);
3563                         }
3564                 }
3565
3566                 /* Update interrupt tracking */
3567                 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3568         }
3569 #ifdef DEBUG
3570         /* Poll for console output periodically */
3571         if (bus->sdiodev->state == BRCMF_SDIOD_DATA && BRCMF_FWCON_ON() &&
3572             bus->console_interval != 0) {
3573                 bus->console.count += jiffies_to_msecs(BRCMF_WD_POLL);
3574                 if (bus->console.count >= bus->console_interval) {
3575                         bus->console.count -= bus->console_interval;
3576                         sdio_claim_host(bus->sdiodev->func[1]);
3577                         /* Make sure backplane clock is on */
3578                         brcmf_sdio_bus_sleep(bus, false, false);
3579                         if (brcmf_sdio_readconsole(bus) < 0)
3580                                 /* stop on error */
3581                                 bus->console_interval = 0;
3582                         sdio_release_host(bus->sdiodev->func[1]);
3583                 }
3584         }
3585 #endif                          /* DEBUG */
3586
3587         /* On idle timeout clear activity flag and/or turn off clock */
3588         if (!bus->dpc_triggered) {
3589                 rmb();
3590                 if ((!bus->dpc_running) && (bus->idletime > 0) &&
3591                     (bus->clkstate == CLK_AVAIL)) {
3592                         bus->idlecount++;
3593                         if (bus->idlecount > bus->idletime) {
3594                                 brcmf_dbg(SDIO, "idle\n");
3595                                 sdio_claim_host(bus->sdiodev->func[1]);
3596                                 brcmf_sdio_wd_timer(bus, false);
3597                                 bus->idlecount = 0;
3598                                 brcmf_sdio_bus_sleep(bus, true, false);
3599                                 sdio_release_host(bus->sdiodev->func[1]);
3600                         }
3601                 } else {
3602                         bus->idlecount = 0;
3603                 }
3604         } else {
3605                 bus->idlecount = 0;
3606         }
3607 }
3608
3609 static void brcmf_sdio_dataworker(struct work_struct *work)
3610 {
3611         struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3612                                               datawork);
3613
3614         bus->dpc_running = true;
3615         wmb();
3616         while (ACCESS_ONCE(bus->dpc_triggered)) {
3617                 bus->dpc_triggered = false;
3618                 brcmf_sdio_dpc(bus);
3619                 bus->idlecount = 0;
3620         }
3621         bus->dpc_running = false;
3622         if (brcmf_sdiod_freezing(bus->sdiodev)) {
3623                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3624                 brcmf_sdiod_try_freeze(bus->sdiodev);
3625                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3626         }
3627 }
3628
3629 static void
3630 brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3631                              struct brcmf_chip *ci, u32 drivestrength)
3632 {
3633         const struct sdiod_drive_str *str_tab = NULL;
3634         u32 str_mask;
3635         u32 str_shift;
3636         u32 i;
3637         u32 drivestrength_sel = 0;
3638         u32 cc_data_temp;
3639         u32 addr;
3640
3641         if (!(ci->cc_caps & CC_CAP_PMU))
3642                 return;
3643
3644         switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3645         case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3646                 str_tab = sdiod_drvstr_tab1_1v8;
3647                 str_mask = 0x00003800;
3648                 str_shift = 11;
3649                 break;
3650         case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3651                 str_tab = sdiod_drvstr_tab6_1v8;
3652                 str_mask = 0x00001800;
3653                 str_shift = 11;
3654                 break;
3655         case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3656                 /* note: 43143 does not support tristate */
3657                 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3658                 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3659                         str_tab = sdiod_drvstr_tab2_3v3;
3660                         str_mask = 0x00000007;
3661                         str_shift = 0;
3662                 } else
3663                         brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3664                                   ci->name, drivestrength);
3665                 break;
3666         case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3667                 str_tab = sdiod_drive_strength_tab5_1v8;
3668                 str_mask = 0x00003800;
3669                 str_shift = 11;
3670                 break;
3671         default:
3672                 brcmf_dbg(INFO, "No SDIO driver strength init needed for chip %s rev %d pmurev %d\n",
3673                           ci->name, ci->chiprev, ci->pmurev);
3674                 break;
3675         }
3676
3677         if (str_tab != NULL) {
3678                 struct brcmf_core *pmu = brcmf_chip_get_pmu(ci);
3679
3680                 for (i = 0; str_tab[i].strength != 0; i++) {
3681                         if (drivestrength >= str_tab[i].strength) {
3682                                 drivestrength_sel = str_tab[i].sel;
3683                                 break;
3684                         }
3685                 }
3686                 addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
3687                 brcmf_sdiod_regwl(sdiodev, addr, 1, NULL);
3688                 cc_data_temp = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3689                 cc_data_temp &= ~str_mask;
3690                 drivestrength_sel <<= str_shift;
3691                 cc_data_temp |= drivestrength_sel;
3692                 brcmf_sdiod_regwl(sdiodev, addr, cc_data_temp, NULL);
3693
3694                 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3695                           str_tab[i].strength, drivestrength, cc_data_temp);
3696         }
3697 }
3698
3699 static int brcmf_sdio_buscoreprep(void *ctx)
3700 {
3701         struct brcmf_sdio_dev *sdiodev = ctx;
3702         int err = 0;
3703         u8 clkval, clkset;
3704
3705         /* Try forcing SDIO core to do ALPAvail request only */
3706         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3707         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3708         if (err) {
3709                 brcmf_err("error writing for HT off\n");
3710                 return err;
3711         }
3712
3713         /* If register supported, wait for ALPAvail and then force ALP */
3714         /* This may take up to 15 milliseconds */
3715         clkval = brcmf_sdiod_regrb(sdiodev,
3716                                    SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3717
3718         if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3719                 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3720                           clkset, clkval);
3721                 return -EACCES;
3722         }
3723
3724         SPINWAIT(((clkval = brcmf_sdiod_regrb(sdiodev,
3725                                               SBSDIO_FUNC1_CHIPCLKCSR, NULL)),
3726                         !SBSDIO_ALPAV(clkval)),
3727                         PMU_MAX_TRANSITION_DLY);
3728         if (!SBSDIO_ALPAV(clkval)) {
3729                 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3730                           clkval);
3731                 return -EBUSY;
3732         }
3733
3734         clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3735         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3736         udelay(65);
3737
3738         /* Also, disable the extra SDIO pull-ups */
3739         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3740
3741         return 0;
3742 }
3743
3744 static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3745                                         u32 rstvec)
3746 {
3747         struct brcmf_sdio_dev *sdiodev = ctx;
3748         struct brcmf_core *core;
3749         u32 reg_addr;
3750
3751         /* clear all interrupts */
3752         core = brcmf_chip_get_core(chip, BCMA_CORE_SDIO_DEV);
3753         reg_addr = core->base + offsetof(struct sdpcmd_regs, intstatus);
3754         brcmf_sdiod_regwl(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3755
3756         if (rstvec)
3757                 /* Write reset vector to address 0 */
3758                 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3759                                   sizeof(rstvec));
3760 }
3761
3762 static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3763 {
3764         struct brcmf_sdio_dev *sdiodev = ctx;
3765         u32 val, rev;
3766
3767         val = brcmf_sdiod_regrl(sdiodev, addr, NULL);
3768         if ((sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4335_4339 ||
3769              sdiodev->func[0]->device == SDIO_DEVICE_ID_BROADCOM_4339) &&
3770             addr == CORE_CC_REG(SI_ENUM_BASE, chipid)) {
3771                 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3772                 if (rev >= 2) {
3773                         val &= ~CID_ID_MASK;
3774                         val |= BRCM_CC_4339_CHIP_ID;
3775                 }
3776         }
3777         return val;
3778 }
3779
3780 static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3781 {
3782         struct brcmf_sdio_dev *sdiodev = ctx;
3783
3784         brcmf_sdiod_regwl(sdiodev, addr, val, NULL);
3785 }
3786
3787 static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3788         .prepare = brcmf_sdio_buscoreprep,
3789         .activate = brcmf_sdio_buscore_activate,
3790         .read32 = brcmf_sdio_buscore_read32,
3791         .write32 = brcmf_sdio_buscore_write32,
3792 };
3793
3794 static bool
3795 brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3796 {
3797         struct brcmf_sdio_dev *sdiodev;
3798         u8 clkctl = 0;
3799         int err = 0;
3800         int reg_addr;
3801         u32 reg_val;
3802         u32 drivestrength;
3803
3804         sdiodev = bus->sdiodev;
3805         sdio_claim_host(sdiodev->func[1]);
3806
3807         pr_debug("F1 signature read @0x18000000=0x%4x\n",
3808                  brcmf_sdiod_regrl(sdiodev, SI_ENUM_BASE, NULL));
3809
3810         /*
3811          * Force PLL off until brcmf_chip_attach()
3812          * programs PLL control regs
3813          */
3814
3815         brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3816                           BRCMF_INIT_CLKCTL1, &err);
3817         if (!err)
3818                 clkctl = brcmf_sdiod_regrb(sdiodev,
3819                                            SBSDIO_FUNC1_CHIPCLKCSR, &err);
3820
3821         if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3822                 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3823                           err, BRCMF_INIT_CLKCTL1, clkctl);
3824                 goto fail;
3825         }
3826
3827         bus->ci = brcmf_chip_attach(sdiodev, &brcmf_sdio_buscore_ops);
3828         if (IS_ERR(bus->ci)) {
3829                 brcmf_err("brcmf_chip_attach failed!\n");
3830                 bus->ci = NULL;
3831                 goto fail;
3832         }
3833         sdiodev->settings = brcmf_get_module_param(sdiodev->dev,
3834                                                    BRCMF_BUSTYPE_SDIO,
3835                                                    bus->ci->chip,
3836                                                    bus->ci->chiprev);
3837         if (!sdiodev->settings) {
3838                 brcmf_err("Failed to get device parameters\n");
3839                 goto fail;
3840         }
3841         /* platform specific configuration:
3842          *   alignments must be at least 4 bytes for ADMA
3843          */
3844         bus->head_align = ALIGNMENT;
3845         bus->sgentry_align = ALIGNMENT;
3846         if (sdiodev->settings->bus.sdio.sd_head_align > ALIGNMENT)
3847                 bus->head_align = sdiodev->settings->bus.sdio.sd_head_align;
3848         if (sdiodev->settings->bus.sdio.sd_sgentry_align > ALIGNMENT)
3849                 bus->sgentry_align =
3850                                 sdiodev->settings->bus.sdio.sd_sgentry_align;
3851
3852         /* allocate scatter-gather table. sg support
3853          * will be disabled upon allocation failure.
3854          */
3855         brcmf_sdiod_sgtable_alloc(sdiodev);
3856
3857 #ifdef CONFIG_PM_SLEEP
3858         /* wowl can be supported when KEEP_POWER is true and (WAKE_SDIO_IRQ
3859          * is true or when platform data OOB irq is true).
3860          */
3861         if ((sdio_get_host_pm_caps(sdiodev->func[1]) & MMC_PM_KEEP_POWER) &&
3862             ((sdio_get_host_pm_caps(sdiodev->func[1]) & MMC_PM_WAKE_SDIO_IRQ) ||
3863              (sdiodev->settings->bus.sdio.oob_irq_supported)))
3864                 sdiodev->bus_if->wowl_supported = true;
3865 #endif
3866
3867         if (brcmf_sdio_kso_init(bus)) {
3868                 brcmf_err("error enabling KSO\n");
3869                 goto fail;
3870         }
3871
3872         if (sdiodev->settings->bus.sdio.drive_strength)
3873                 drivestrength = sdiodev->settings->bus.sdio.drive_strength;
3874         else
3875                 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3876         brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
3877
3878         /* Set card control so an SDIO card reset does a WLAN backplane reset */
3879         reg_val = brcmf_sdiod_regrb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
3880         if (err)
3881                 goto fail;
3882
3883         reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3884
3885         brcmf_sdiod_regwb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3886         if (err)
3887                 goto fail;
3888
3889         /* set PMUControl so a backplane reset does PMU state reload */
3890         reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
3891         reg_val = brcmf_sdiod_regrl(sdiodev, reg_addr, &err);
3892         if (err)
3893                 goto fail;
3894
3895         reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
3896
3897         brcmf_sdiod_regwl(sdiodev, reg_addr, reg_val, &err);
3898         if (err)
3899                 goto fail;
3900
3901         sdio_release_host(sdiodev->func[1]);
3902
3903         brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3904
3905         /* allocate header buffer */
3906         bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
3907         if (!bus->hdrbuf)
3908                 return false;
3909         /* Locate an appropriately-aligned portion of hdrbuf */
3910         bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3911                                     bus->head_align);
3912
3913         /* Set the poll and/or interrupt flags */
3914         bus->intr = true;
3915         bus->poll = false;
3916         if (bus->poll)
3917                 bus->pollrate = 1;
3918
3919         return true;
3920
3921 fail:
3922         sdio_release_host(sdiodev->func[1]);
3923         return false;
3924 }
3925
3926 static int
3927 brcmf_sdio_watchdog_thread(void *data)
3928 {
3929         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3930         int wait;
3931
3932         allow_signal(SIGTERM);
3933         /* Run until signal received */
3934         brcmf_sdiod_freezer_count(bus->sdiodev);
3935         while (1) {
3936                 if (kthread_should_stop())
3937                         break;
3938                 brcmf_sdiod_freezer_uncount(bus->sdiodev);
3939                 wait = wait_for_completion_interruptible(&bus->watchdog_wait);
3940                 brcmf_sdiod_freezer_count(bus->sdiodev);
3941                 brcmf_sdiod_try_freeze(bus->sdiodev);
3942                 if (!wait) {
3943                         brcmf_sdio_bus_watchdog(bus);
3944                         /* Count the tick for reference */
3945                         bus->sdcnt.tickcnt++;
3946                         reinit_completion(&bus->watchdog_wait);
3947                 } else
3948                         break;
3949         }
3950         return 0;
3951 }
3952
3953 static void
3954 brcmf_sdio_watchdog(unsigned long data)
3955 {
3956         struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3957
3958         if (bus->watchdog_tsk) {
3959                 complete(&bus->watchdog_wait);
3960                 /* Reschedule the watchdog */
3961                 if (bus->wd_active)
3962                         mod_timer(&bus->timer,
3963                                   jiffies + BRCMF_WD_POLL);
3964         }
3965 }
3966
3967 static const struct brcmf_bus_ops brcmf_sdio_bus_ops = {
3968         .stop = brcmf_sdio_bus_stop,
3969         .preinit = brcmf_sdio_bus_preinit,
3970         .txdata = brcmf_sdio_bus_txdata,
3971         .txctl = brcmf_sdio_bus_txctl,
3972         .rxctl = brcmf_sdio_bus_rxctl,
3973         .gettxq = brcmf_sdio_bus_gettxq,
3974         .wowl_config = brcmf_sdio_wowl_config,
3975         .get_ramsize = brcmf_sdio_bus_get_ramsize,
3976         .get_memdump = brcmf_sdio_bus_get_memdump,
3977 };
3978
3979 static void brcmf_sdio_firmware_callback(struct device *dev,
3980                                          const struct firmware *code,
3981                                          void *nvram, u32 nvram_len)
3982 {
3983         struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3984         struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3985         struct brcmf_sdio *bus = sdiodev->bus;
3986         int err = 0;
3987         u8 saveclk;
3988
3989         brcmf_dbg(TRACE, "Enter: dev=%s\n", dev_name(dev));
3990
3991         if (!bus_if->drvr)
3992                 return;
3993
3994         /* try to download image and nvram to the dongle */
3995         bus->alp_only = true;
3996         err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
3997         if (err)
3998                 goto fail;
3999         bus->alp_only = false;
4000
4001         /* Start the watchdog timer */
4002         bus->sdcnt.tickcnt = 0;
4003         brcmf_sdio_wd_timer(bus, true);
4004
4005         sdio_claim_host(sdiodev->func[1]);
4006
4007         /* Make sure backplane clock is on, needed to generate F2 interrupt */
4008         brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4009         if (bus->clkstate != CLK_AVAIL)
4010                 goto release;
4011
4012         /* Force clocks on backplane to be sure F2 interrupt propagates */
4013         saveclk = brcmf_sdiod_regrb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4014         if (!err) {
4015                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4016                                   (saveclk | SBSDIO_FORCE_HT), &err);
4017         }
4018         if (err) {
4019                 brcmf_err("Failed to force clock for F2: err %d\n", err);
4020                 goto release;
4021         }
4022
4023         /* Enable function 2 (frame transfers) */
4024         w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
4025                   offsetof(struct sdpcmd_regs, tosbmailboxdata));
4026         err = sdio_enable_func(sdiodev->func[SDIO_FUNC_2]);
4027
4028
4029         brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4030
4031         /* If F2 successfully enabled, set core and enable interrupts */
4032         if (!err) {
4033                 /* Set up the interrupt mask and enable interrupts */
4034                 bus->hostintmask = HOSTINTMASK;
4035                 w_sdreg32(bus, bus->hostintmask,
4036                           offsetof(struct sdpcmd_regs, hostintmask));
4037
4038                 brcmf_sdiod_regwb(sdiodev, SBSDIO_WATERMARK, 8, &err);
4039         } else {
4040                 /* Disable F2 again */
4041                 sdio_disable_func(sdiodev->func[SDIO_FUNC_2]);
4042                 goto release;
4043         }
4044
4045         if (brcmf_chip_sr_capable(bus->ci)) {
4046                 brcmf_sdio_sr_init(bus);
4047         } else {
4048                 /* Restore previous clock setting */
4049                 brcmf_sdiod_regwb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
4050                                   saveclk, &err);
4051         }
4052
4053         if (err == 0) {
4054                 /* Allow full data communication using DPC from now on. */
4055                 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
4056
4057                 err = brcmf_sdiod_intr_register(sdiodev);
4058                 if (err != 0)
4059                         brcmf_err("intr register failed:%d\n", err);
4060         }
4061
4062         /* If we didn't come up, turn off backplane clock */
4063         if (err != 0)
4064                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4065
4066         sdio_release_host(sdiodev->func[1]);
4067
4068         err = brcmf_bus_started(dev);
4069         if (err != 0) {
4070                 brcmf_err("dongle is not responding\n");
4071                 goto fail;
4072         }
4073         return;
4074
4075 release:
4076         sdio_release_host(sdiodev->func[1]);
4077 fail:
4078         brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4079         device_release_driver(dev);
4080 }
4081
4082 struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4083 {
4084         int ret;
4085         struct brcmf_sdio *bus;
4086         struct workqueue_struct *wq;
4087
4088         brcmf_dbg(TRACE, "Enter\n");
4089
4090         /* Allocate private bus interface state */
4091         bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4092         if (!bus)
4093                 goto fail;
4094
4095         bus->sdiodev = sdiodev;
4096         sdiodev->bus = bus;
4097         skb_queue_head_init(&bus->glom);
4098         bus->txbound = BRCMF_TXBOUND;
4099         bus->rxbound = BRCMF_RXBOUND;
4100         bus->txminmax = BRCMF_TXMINMAX;
4101         bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4102
4103         /* single-threaded workqueue */
4104         wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4105                                      dev_name(&sdiodev->func[1]->dev));
4106         if (!wq) {
4107                 brcmf_err("insufficient memory to create txworkqueue\n");
4108                 goto fail;
4109         }
4110         brcmf_sdiod_freezer_count(sdiodev);
4111         INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4112         bus->brcmf_wq = wq;
4113
4114         /* attempt to attach to the dongle */
4115         if (!(brcmf_sdio_probe_attach(bus))) {
4116                 brcmf_err("brcmf_sdio_probe_attach failed\n");
4117                 goto fail;
4118         }
4119
4120         spin_lock_init(&bus->rxctl_lock);
4121         spin_lock_init(&bus->txq_lock);
4122         init_waitqueue_head(&bus->ctrl_wait);
4123         init_waitqueue_head(&bus->dcmd_resp_wait);
4124
4125         /* Set up the watchdog timer */
4126         init_timer(&bus->timer);
4127         bus->timer.data = (unsigned long)bus;
4128         bus->timer.function = brcmf_sdio_watchdog;
4129
4130         /* Initialize watchdog thread */
4131         init_completion(&bus->watchdog_wait);
4132         bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4133                                         bus, "brcmf_wdog/%s",
4134                                         dev_name(&sdiodev->func[1]->dev));
4135         if (IS_ERR(bus->watchdog_tsk)) {
4136                 pr_warn("brcmf_watchdog thread failed to start\n");
4137                 bus->watchdog_tsk = NULL;
4138         }
4139         /* Initialize DPC thread */
4140         bus->dpc_triggered = false;
4141         bus->dpc_running = false;
4142
4143         /* Assign bus interface call back */
4144         bus->sdiodev->bus_if->dev = bus->sdiodev->dev;
4145         bus->sdiodev->bus_if->ops = &brcmf_sdio_bus_ops;
4146         bus->sdiodev->bus_if->chip = bus->ci->chip;
4147         bus->sdiodev->bus_if->chiprev = bus->ci->chiprev;
4148
4149         /* default sdio bus header length for tx packet */
4150         bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4151
4152         /* Attach to the common layer, reserve hdr space */
4153         ret = brcmf_attach(bus->sdiodev->dev, bus->sdiodev->settings);
4154         if (ret != 0) {
4155                 brcmf_err("brcmf_attach failed\n");
4156                 goto fail;
4157         }
4158
4159         /* allocate scatter-gather table. sg support
4160          * will be disabled upon allocation failure.
4161          */
4162         brcmf_sdiod_sgtable_alloc(bus->sdiodev);
4163
4164         /* Query the F2 block size, set roundup accordingly */
4165         bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
4166         bus->roundup = min(max_roundup, bus->blocksize);
4167
4168         /* Allocate buffers */
4169         if (bus->sdiodev->bus_if->maxctl) {
4170                 bus->sdiodev->bus_if->maxctl += bus->roundup;
4171                 bus->rxblen =
4172                     roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
4173                             ALIGNMENT) + bus->head_align;
4174                 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
4175                 if (!(bus->rxbuf)) {
4176                         brcmf_err("rxbuf allocation failed\n");
4177                         goto fail;
4178                 }
4179         }
4180
4181         sdio_claim_host(bus->sdiodev->func[1]);
4182
4183         /* Disable F2 to clear any intermediate frame state on the dongle */
4184         sdio_disable_func(bus->sdiodev->func[SDIO_FUNC_2]);
4185
4186         bus->rxflow = false;
4187
4188         /* Done with backplane-dependent accesses, can drop clock... */
4189         brcmf_sdiod_regwb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4190
4191         sdio_release_host(bus->sdiodev->func[1]);
4192
4193         /* ...and initialize clock/power states */
4194         bus->clkstate = CLK_SDONLY;
4195         bus->idletime = BRCMF_IDLE_INTERVAL;
4196         bus->idleclock = BRCMF_IDLE_ACTIVE;
4197
4198         /* SR state */
4199         bus->sr_enabled = false;
4200
4201         brcmf_sdio_debugfs_create(bus);
4202         brcmf_dbg(INFO, "completed!!\n");
4203
4204         ret = brcmf_fw_map_chip_to_name(bus->ci->chip, bus->ci->chiprev,
4205                                         brcmf_sdio_fwnames,
4206                                         ARRAY_SIZE(brcmf_sdio_fwnames),
4207                                         sdiodev->fw_name, sdiodev->nvram_name);
4208         if (ret)
4209                 goto fail;
4210
4211         ret = brcmf_fw_get_firmwares(sdiodev->dev, BRCMF_FW_REQUEST_NVRAM,
4212                                      sdiodev->fw_name, sdiodev->nvram_name,
4213                                      brcmf_sdio_firmware_callback);
4214         if (ret != 0) {
4215                 brcmf_err("async firmware request failed: %d\n", ret);
4216                 goto fail;
4217         }
4218
4219         return bus;
4220
4221 fail:
4222         brcmf_sdio_remove(bus);
4223         return NULL;
4224 }
4225
4226 /* Detach and free everything */
4227 void brcmf_sdio_remove(struct brcmf_sdio *bus)
4228 {
4229         brcmf_dbg(TRACE, "Enter\n");
4230
4231         if (bus) {
4232                 /* De-register interrupt handler */
4233                 brcmf_sdiod_intr_unregister(bus->sdiodev);
4234
4235                 brcmf_detach(bus->sdiodev->dev);
4236
4237                 cancel_work_sync(&bus->datawork);
4238                 if (bus->brcmf_wq)
4239                         destroy_workqueue(bus->brcmf_wq);
4240
4241                 if (bus->ci) {
4242                         if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4243                                 sdio_claim_host(bus->sdiodev->func[1]);
4244                                 brcmf_sdio_wd_timer(bus, false);
4245                                 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4246                                 /* Leave the device in state where it is
4247                                  * 'passive'. This is done by resetting all
4248                                  * necessary cores.
4249                                  */
4250                                 msleep(20);
4251                                 brcmf_chip_set_passive(bus->ci);
4252                                 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4253                                 sdio_release_host(bus->sdiodev->func[1]);
4254                         }
4255                         brcmf_chip_detach(bus->ci);
4256                 }
4257                 if (bus->sdiodev->settings)
4258                         brcmf_release_module_param(bus->sdiodev->settings);
4259
4260                 kfree(bus->rxbuf);
4261                 kfree(bus->hdrbuf);
4262                 kfree(bus);
4263         }
4264
4265         brcmf_dbg(TRACE, "Disconnected\n");
4266 }
4267
4268 void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, bool active)
4269 {
4270         /* Totally stop the timer */
4271         if (!active && bus->wd_active) {
4272                 del_timer_sync(&bus->timer);
4273                 bus->wd_active = false;
4274                 return;
4275         }
4276
4277         /* don't start the wd until fw is loaded */
4278         if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4279                 return;
4280
4281         if (active) {
4282                 if (!bus->wd_active) {
4283                         /* Create timer again when watchdog period is
4284                            dynamically changed or in the first instance
4285                          */
4286                         bus->timer.expires = jiffies + BRCMF_WD_POLL;
4287                         add_timer(&bus->timer);
4288                         bus->wd_active = true;
4289                 } else {
4290                         /* Re arm the timer, at last watchdog period */
4291                         mod_timer(&bus->timer, jiffies + BRCMF_WD_POLL);
4292                 }
4293         }
4294 }
4295
4296 int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4297 {
4298         int ret;
4299
4300         sdio_claim_host(bus->sdiodev->func[1]);
4301         ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4302         sdio_release_host(bus->sdiodev->func[1]);
4303
4304         return ret;
4305 }
4306