1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/firmware.h>
44 #include <linux/etherdevice.h>
45 #include <linux/if_arp.h>
47 #include <net/ieee80211_radiotap.h>
48 #include <net/mac80211.h>
50 #include <asm/div64.h>
52 #define DRV_NAME "iwl3945"
57 #include "iwl-spectrum.h"
60 * module name, copyright, version, etc.
63 #define DRV_DESCRIPTION \
64 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
66 #ifdef CONFIG_IWLEGACY_DEBUG
73 * add "s" to indicate spectrum measurement included.
74 * we add it here to be consistent with previous releases in which
75 * this was configurable.
77 #define DRV_VERSION IWLWIFI_VERSION VD "s"
78 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
79 #define DRV_AUTHOR "<ilw@linux.intel.com>"
81 MODULE_DESCRIPTION(DRV_DESCRIPTION);
82 MODULE_VERSION(DRV_VERSION);
83 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
84 MODULE_LICENSE("GPL");
86 /* module parameters */
87 struct il_mod_params il3945_mod_params = {
91 /* the rest are 0 by default */
95 * il3945_get_antenna_flags - Get antenna flags for RXON command
96 * @il: eeprom and antenna fields are used to determine antenna flags
98 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
99 * il3945_mod_params.antenna specifies the antenna diversity mode:
101 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
102 * IL_ANTENNA_MAIN - Force MAIN antenna
103 * IL_ANTENNA_AUX - Force AUX antenna
105 __le32 il3945_get_antenna_flags(const struct il_priv *il)
107 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
109 switch (il3945_mod_params.antenna) {
110 case IL_ANTENNA_DIVERSITY:
113 case IL_ANTENNA_MAIN:
114 if (eeprom->antenna_switch_type)
115 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
116 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
119 if (eeprom->antenna_switch_type)
120 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
121 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
124 /* bad antenna selector value */
125 IL_ERR("Bad antenna selector value (0x%x)\n",
126 il3945_mod_params.antenna);
128 return 0; /* "diversity" is default if error */
131 static int il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
132 struct ieee80211_key_conf *keyconf,
136 __le16 key_flags = 0;
139 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
140 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
142 if (sta_id == il->ctx.bcast_sta_id)
143 key_flags |= STA_KEY_MULTICAST_MSK;
145 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
146 keyconf->hw_key_idx = keyconf->keyidx;
147 key_flags &= ~STA_KEY_FLG_INVALID;
149 spin_lock_irqsave(&il->sta_lock, flags);
150 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
151 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
152 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key,
155 memcpy(il->stations[sta_id].sta.key.key, keyconf->key,
158 if ((il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
159 == STA_KEY_FLG_NO_ENC)
160 il->stations[sta_id].sta.key.key_offset =
161 il_get_free_ucode_key_idx(il);
162 /* else, we are overriding an existing key => no need to allocated room
165 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
166 "no space for a new key");
168 il->stations[sta_id].sta.key.key_flags = key_flags;
169 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
170 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
172 D_INFO("hwcrypto: modify ucode station key info\n");
174 ret = il_send_add_sta(il,
175 &il->stations[sta_id].sta, CMD_ASYNC);
177 spin_unlock_irqrestore(&il->sta_lock, flags);
182 static int il3945_set_tkip_dynamic_key_info(struct il_priv *il,
183 struct ieee80211_key_conf *keyconf,
189 static int il3945_set_wep_dynamic_key_info(struct il_priv *il,
190 struct ieee80211_key_conf *keyconf,
196 static int il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
199 struct il_addsta_cmd sta_cmd;
201 spin_lock_irqsave(&il->sta_lock, flags);
202 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
203 memset(&il->stations[sta_id].sta.key, 0,
204 sizeof(struct il4965_keyinfo));
205 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
206 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
207 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
208 memcpy(&sta_cmd, &il->stations[sta_id].sta, sizeof(struct il_addsta_cmd));
209 spin_unlock_irqrestore(&il->sta_lock, flags);
211 D_INFO("hwcrypto: clear ucode station key info\n");
212 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
215 static int il3945_set_dynamic_key(struct il_priv *il,
216 struct ieee80211_key_conf *keyconf, u8 sta_id)
220 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
222 switch (keyconf->cipher) {
223 case WLAN_CIPHER_SUITE_CCMP:
224 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
226 case WLAN_CIPHER_SUITE_TKIP:
227 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
229 case WLAN_CIPHER_SUITE_WEP40:
230 case WLAN_CIPHER_SUITE_WEP104:
231 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
234 IL_ERR("Unknown alg: %s alg=%x\n", __func__,
239 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
240 keyconf->cipher, keyconf->keylen, keyconf->keyidx,
246 static int il3945_remove_static_key(struct il_priv *il)
248 int ret = -EOPNOTSUPP;
253 static int il3945_set_static_key(struct il_priv *il,
254 struct ieee80211_key_conf *key)
256 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
257 key->cipher == WLAN_CIPHER_SUITE_WEP104)
260 IL_ERR("Static key invalid: cipher %x\n", key->cipher);
264 static void il3945_clear_free_frames(struct il_priv *il)
266 struct list_head *element;
268 D_INFO("%d frames on pre-allocated heap on clear.\n",
271 while (!list_empty(&il->free_frames)) {
272 element = il->free_frames.next;
274 kfree(list_entry(element, struct il3945_frame, list));
278 if (il->frames_count) {
279 IL_WARN("%d frames still in use. Did we lose one?\n",
281 il->frames_count = 0;
285 static struct il3945_frame *il3945_get_free_frame(struct il_priv *il)
287 struct il3945_frame *frame;
288 struct list_head *element;
289 if (list_empty(&il->free_frames)) {
290 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
292 IL_ERR("Could not allocate frame!\n");
300 element = il->free_frames.next;
302 return list_entry(element, struct il3945_frame, list);
305 static void il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
307 memset(frame, 0, sizeof(*frame));
308 list_add(&frame->list, &il->free_frames);
311 unsigned int il3945_fill_beacon_frame(struct il_priv *il,
312 struct ieee80211_hdr *hdr,
316 if (!il_is_associated(il) || !il->beacon_skb)
319 if (il->beacon_skb->len > left)
322 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
324 return il->beacon_skb->len;
327 static int il3945_send_beacon_cmd(struct il_priv *il)
329 struct il3945_frame *frame;
330 unsigned int frame_size;
334 frame = il3945_get_free_frame(il);
337 IL_ERR("Could not obtain free frame buffer for beacon "
342 rate = il_get_lowest_plcp(il,
345 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
347 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size,
350 il3945_free_frame(il, frame);
355 static void il3945_unset_hw_params(struct il_priv *il)
357 if (il->_3945.shared_virt)
358 dma_free_coherent(&il->pci_dev->dev,
359 sizeof(struct il3945_shared),
360 il->_3945.shared_virt,
361 il->_3945.shared_phys);
364 static void il3945_build_tx_cmd_hwcrypto(struct il_priv *il,
365 struct ieee80211_tx_info *info,
366 struct il_device_cmd *cmd,
367 struct sk_buff *skb_frag,
370 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
371 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
375 switch (keyinfo->cipher) {
376 case WLAN_CIPHER_SUITE_CCMP:
377 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
378 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
379 D_TX("tx_cmd with AES hwcrypto\n");
382 case WLAN_CIPHER_SUITE_TKIP:
385 case WLAN_CIPHER_SUITE_WEP104:
386 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
388 case WLAN_CIPHER_SUITE_WEP40:
389 tx_cmd->sec_ctl |= TX_CMD_SEC_WEP |
390 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
392 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
394 D_TX("Configuring packet for WEP encryption "
395 "with key %d\n", info->control.hw_key->hw_key_idx);
399 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
405 * handle build C_TX command notification.
407 static void il3945_build_tx_cmd_basic(struct il_priv *il,
408 struct il_device_cmd *cmd,
409 struct ieee80211_tx_info *info,
410 struct ieee80211_hdr *hdr, u8 std_id)
412 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
413 __le32 tx_flags = tx_cmd->tx_flags;
414 __le16 fc = hdr->frame_control;
416 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
417 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
418 tx_flags |= TX_CMD_FLG_ACK_MSK;
419 if (ieee80211_is_mgmt(fc))
420 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
421 if (ieee80211_is_probe_resp(fc) &&
422 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
423 tx_flags |= TX_CMD_FLG_TSF_MSK;
425 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
426 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
429 tx_cmd->sta_id = std_id;
430 if (ieee80211_has_morefrags(fc))
431 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
433 if (ieee80211_is_data_qos(fc)) {
434 u8 *qc = ieee80211_get_qos_ctl(hdr);
435 tx_cmd->tid_tspec = qc[0] & 0xf;
436 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
438 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
441 il_tx_cmd_protection(il, info, fc, &tx_flags);
443 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
444 if (ieee80211_is_mgmt(fc)) {
445 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
446 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
448 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
450 tx_cmd->timeout.pm_frame_timeout = 0;
453 tx_cmd->driver_txop = 0;
454 tx_cmd->tx_flags = tx_flags;
455 tx_cmd->next_frame_len = 0;
459 * start C_TX command process
461 static int il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
463 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
464 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
465 struct il3945_tx_cmd *tx_cmd;
466 struct il_tx_queue *txq = NULL;
467 struct il_queue *q = NULL;
468 struct il_device_cmd *out_cmd;
469 struct il_cmd_meta *out_meta;
470 dma_addr_t phys_addr;
471 dma_addr_t txcmd_phys;
472 int txq_id = skb_get_queue_mapping(skb);
473 u16 len, idx, hdr_len;
479 u8 wait_write_ptr = 0;
482 spin_lock_irqsave(&il->lock, flags);
483 if (il_is_rfkill(il)) {
484 D_DROP("Dropping - RF KILL\n");
488 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == IL_INVALID_RATE) {
489 IL_ERR("ERROR: No TX rate available.\n");
493 unicast = !is_multicast_ether_addr(hdr->addr1);
496 fc = hdr->frame_control;
498 #ifdef CONFIG_IWLEGACY_DEBUG
499 if (ieee80211_is_auth(fc))
500 D_TX("Sending AUTH frame\n");
501 else if (ieee80211_is_assoc_req(fc))
502 D_TX("Sending ASSOC frame\n");
503 else if (ieee80211_is_reassoc_req(fc))
504 D_TX("Sending REASSOC frame\n");
507 spin_unlock_irqrestore(&il->lock, flags);
509 hdr_len = ieee80211_hdrlen(fc);
511 /* Find idx into station table for destination station */
512 sta_id = il_sta_id_or_broadcast(
515 if (sta_id == IL_INVALID_STATION) {
516 D_DROP("Dropping - INVALID STATION: %pM\n",
521 D_RATE("station Id %d\n", sta_id);
523 if (ieee80211_is_data_qos(fc)) {
524 u8 *qc = ieee80211_get_qos_ctl(hdr);
525 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
526 if (unlikely(tid >= MAX_TID_COUNT))
530 /* Descriptor for chosen Tx queue */
531 txq = &il->txq[txq_id];
534 if ((il_queue_space(q) < q->high_mark))
537 spin_lock_irqsave(&il->lock, flags);
539 idx = il_get_cmd_idx(q, q->write_ptr, 0);
541 /* Set up driver data for this TFD */
542 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct il_tx_info));
543 txq->txb[q->write_ptr].skb = skb;
544 txq->txb[q->write_ptr].ctx = &il->ctx;
546 /* Init first empty entry in queue's array of Tx/cmd buffers */
547 out_cmd = txq->cmd[idx];
548 out_meta = &txq->meta[idx];
549 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
550 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
551 memset(tx_cmd, 0, sizeof(*tx_cmd));
554 * Set up the Tx-command (not MAC!) header.
555 * Store the chosen Tx queue and TFD idx within the sequence field;
556 * after Tx, uCode's Tx response will return this value so driver can
557 * locate the frame within the tx queue and do post-tx processing.
559 out_cmd->hdr.cmd = C_TX;
560 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
561 IDX_TO_SEQ(q->write_ptr)));
563 /* Copy MAC header from skb into command buffer */
564 memcpy(tx_cmd->hdr, hdr, hdr_len);
567 if (info->control.hw_key)
568 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
570 /* TODO need this for burst mode later on */
571 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
573 /* set is_hcca to 0; it probably will never be implemented */
574 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id, 0);
576 /* Total # bytes to be transmitted */
578 tx_cmd->len = cpu_to_le16(len);
580 il_dbg_log_tx_data_frame(il, len, hdr);
581 il_update_stats(il, true, fc, len);
582 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
583 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
585 if (!ieee80211_has_morefrags(hdr->frame_control)) {
586 txq->need_update = 1;
589 txq->need_update = 0;
592 D_TX("sequence nr = 0X%x\n",
593 le16_to_cpu(out_cmd->hdr.sequence));
594 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
595 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
596 il_print_hex_dump(il, IL_DL_TX, (u8 *)tx_cmd->hdr,
597 ieee80211_hdrlen(fc));
600 * Use the first empty entry in this queue's command buffer array
601 * to contain the Tx command and MAC header concatenated together
602 * (payload data will be in another buffer).
603 * Size of this varies, due to varying MAC header length.
604 * If end is not dword aligned, we'll have 2 extra bytes at the end
605 * of the MAC header (device reads on dword boundaries).
606 * We'll tell device about this padding later.
608 len = sizeof(struct il3945_tx_cmd) +
609 sizeof(struct il_cmd_header) + hdr_len;
610 len = (len + 3) & ~3;
612 /* Physical address of this Tx command's header (not MAC header!),
613 * within command buffer array. */
614 txcmd_phys = pci_map_single(il->pci_dev, &out_cmd->hdr,
615 len, PCI_DMA_TODEVICE);
616 /* we do not map meta data ... so we can safely access address to
617 * provide to unmap command*/
618 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
619 dma_unmap_len_set(out_meta, len, len);
621 /* Add buffer containing Tx command and MAC(!) header to TFD's
623 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
624 txcmd_phys, len, 1, 0);
627 /* Set up TFD's 2nd entry to point directly to remainder of skb,
628 * if any (802.11 null frames have no payload). */
629 len = skb->len - hdr_len;
631 phys_addr = pci_map_single(il->pci_dev, skb->data + hdr_len,
632 len, PCI_DMA_TODEVICE);
633 il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
639 /* Tell device the write idx *just past* this latest filled TFD */
640 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
641 il_txq_update_write_ptr(il, txq);
642 spin_unlock_irqrestore(&il->lock, flags);
644 if (il_queue_space(q) < q->high_mark
645 && il->mac80211_registered) {
646 if (wait_write_ptr) {
647 spin_lock_irqsave(&il->lock, flags);
648 txq->need_update = 1;
649 il_txq_update_write_ptr(il, txq);
650 spin_unlock_irqrestore(&il->lock, flags);
653 il_stop_queue(il, txq);
659 spin_unlock_irqrestore(&il->lock, flags);
664 static int il3945_get_measurement(struct il_priv *il,
665 struct ieee80211_measurement_params *params,
668 struct il_spectrum_cmd spectrum;
669 struct il_rx_pkt *pkt;
670 struct il_host_cmd cmd = {
671 .id = C_SPECTRUM_MEASUREMENT,
672 .data = (void *)&spectrum,
673 .flags = CMD_WANT_SKB,
675 u32 add_time = le64_to_cpu(params->start_time);
677 int spectrum_resp_status;
678 int duration = le16_to_cpu(params->duration);
679 struct il_rxon_context *ctx = &il->ctx;
681 if (il_is_associated(il))
682 add_time = il_usecs_to_beacons(il,
683 le64_to_cpu(params->start_time) - il->_3945.last_tsf,
684 le16_to_cpu(ctx->timing.beacon_interval));
686 memset(&spectrum, 0, sizeof(spectrum));
688 spectrum.channel_count = cpu_to_le16(1);
690 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
691 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
692 cmd.len = sizeof(spectrum);
693 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
695 if (il_is_associated(il))
696 spectrum.start_time =
697 il_add_beacon_time(il,
698 il->_3945.last_beacon_time, add_time,
699 le16_to_cpu(ctx->timing.beacon_interval));
701 spectrum.start_time = 0;
703 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
704 spectrum.channels[0].channel = params->channel;
705 spectrum.channels[0].type = type;
706 if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
707 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
708 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
710 rc = il_send_cmd_sync(il, &cmd);
714 pkt = (struct il_rx_pkt *)cmd.reply_page;
715 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
716 IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
720 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
721 switch (spectrum_resp_status) {
722 case 0: /* Command will be handled */
723 if (pkt->u.spectrum.id != 0xff) {
724 D_INFO("Replaced existing measurement: %d\n",
726 il->measurement_status &= ~MEASUREMENT_READY;
728 il->measurement_status |= MEASUREMENT_ACTIVE;
732 case 1: /* Command will not be handled */
737 il_free_pages(il, cmd.reply_page);
742 static void il3945_hdl_alive(struct il_priv *il,
743 struct il_rx_buf *rxb)
745 struct il_rx_pkt *pkt = rxb_addr(rxb);
746 struct il_alive_resp *palive;
747 struct delayed_work *pwork;
749 palive = &pkt->u.alive_frame;
751 D_INFO("Alive ucode status 0x%08X revision "
753 palive->is_valid, palive->ver_type,
754 palive->ver_subtype);
756 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
757 D_INFO("Initialization Alive received.\n");
758 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
759 sizeof(struct il_alive_resp));
760 pwork = &il->init_alive_start;
762 D_INFO("Runtime Alive received.\n");
763 memcpy(&il->card_alive, &pkt->u.alive_frame,
764 sizeof(struct il_alive_resp));
765 pwork = &il->alive_start;
766 il3945_disable_events(il);
769 /* We delay the ALIVE response by 5ms to
770 * give the HW RF Kill time to activate... */
771 if (palive->is_valid == UCODE_VALID_OK)
772 queue_delayed_work(il->workqueue, pwork,
773 msecs_to_jiffies(5));
775 IL_WARN("uCode did not respond OK.\n");
778 static void il3945_hdl_add_sta(struct il_priv *il,
779 struct il_rx_buf *rxb)
781 #ifdef CONFIG_IWLEGACY_DEBUG
782 struct il_rx_pkt *pkt = rxb_addr(rxb);
785 D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
788 static void il3945_hdl_beacon(struct il_priv *il,
789 struct il_rx_buf *rxb)
791 struct il_rx_pkt *pkt = rxb_addr(rxb);
792 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
793 #ifdef CONFIG_IWLEGACY_DEBUG
794 u8 rate = beacon->beacon_notify_hdr.rate;
796 D_RX("beacon status %x retries %d iss %d "
797 "tsf %d %d rate %d\n",
798 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
799 beacon->beacon_notify_hdr.failure_frame,
800 le32_to_cpu(beacon->ibss_mgr_status),
801 le32_to_cpu(beacon->high_tsf),
802 le32_to_cpu(beacon->low_tsf), rate);
805 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
809 /* Handle notification from uCode that card's power state is changing
810 * due to software, hardware, or critical temperature RFKILL */
811 static void il3945_hdl_card_state(struct il_priv *il,
812 struct il_rx_buf *rxb)
814 struct il_rx_pkt *pkt = rxb_addr(rxb);
815 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
816 unsigned long status = il->status;
818 IL_WARN("Card state received: HW:%s SW:%s\n",
819 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
820 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
822 _il_wr(il, CSR_UCODE_DRV_GP1_SET,
823 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
825 if (flags & HW_CARD_DISABLED)
826 set_bit(S_RF_KILL_HW, &il->status);
828 clear_bit(S_RF_KILL_HW, &il->status);
833 if ((test_bit(S_RF_KILL_HW, &status) !=
834 test_bit(S_RF_KILL_HW, &il->status)))
835 wiphy_rfkill_set_hw_state(il->hw->wiphy,
836 test_bit(S_RF_KILL_HW, &il->status));
838 wake_up(&il->wait_command_queue);
842 * il3945_setup_handlers - Initialize Rx handler callbacks
844 * Setup the RX handlers for each of the reply types sent from the uCode
847 * This function chains into the hardware specific files for them to setup
848 * any hardware specific handlers as well.
850 static void il3945_setup_handlers(struct il_priv *il)
852 il->handlers[N_ALIVE] = il3945_hdl_alive;
853 il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
854 il->handlers[N_ERROR] = il_hdl_error;
855 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
856 il->handlers[N_SPECTRUM_MEASUREMENT] =
857 il_hdl_spectrum_measurement;
858 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
859 il->handlers[N_PM_DEBUG_STATS] =
860 il_hdl_pm_debug_stats;
861 il->handlers[N_BEACON] = il3945_hdl_beacon;
864 * The same handler is used for both the REPLY to a discrete
865 * stats request from the host as well as for the periodic
866 * stats notifications (after received beacons) from the uCode.
868 il->handlers[C_STATS] = il3945_hdl_c_stats;
869 il->handlers[N_STATS] = il3945_hdl_stats;
871 il_setup_rx_scan_handlers(il);
872 il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
874 /* Set up hardware specific Rx handlers */
875 il3945_hw_handler_setup(il);
878 /************************** RX-FUNCTIONS ****************************/
880 * Rx theory of operation
882 * The host allocates 32 DMA target addresses and passes the host address
883 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
887 * The host/firmware share two idx registers for managing the Rx buffers.
889 * The READ idx maps to the first position that the firmware may be writing
890 * to -- the driver can read up to (but not including) this position and get
892 * The READ idx is managed by the firmware once the card is enabled.
894 * The WRITE idx maps to the last position the driver has read from -- the
895 * position preceding WRITE is the last slot the firmware can place a packet.
897 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
900 * During initialization, the host sets up the READ queue position to the first
901 * IDX position, and WRITE to the last (READ - 1 wrapped)
903 * When the firmware places a packet in a buffer, it will advance the READ idx
904 * and fire the RX interrupt. The driver can then query the READ idx and
905 * process as many packets as possible, moving the WRITE idx forward as it
906 * resets the Rx queue buffers with new memory.
908 * The management in the driver is as follows:
909 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
910 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
911 * to replenish the iwl->rxq->rx_free.
912 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
913 * iwl->rxq is replenished and the READ IDX is updated (updating the
914 * 'processed' and 'read' driver idxes as well)
915 * + A received packet is processed and handed to the kernel network stack,
916 * detached from the iwl->rxq. The driver 'processed' idx is updated.
917 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
918 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
919 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
920 * were enough free buffers and RX_STALLED is set it is cleared.
925 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
926 * il3945_rx_queue_restock
927 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
928 * queue, updates firmware pointers, and updates
929 * the WRITE idx. If insufficient rx_free buffers
930 * are available, schedules il3945_rx_replenish
932 * -- enable interrupts --
933 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
934 * READ IDX, detaching the SKB from the pool.
935 * Moves the packet buffer from queue to rx_used.
936 * Calls il3945_rx_queue_restock to refill any empty
943 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
945 static inline __le32 il3945_dma_addr2rbd_ptr(struct il_priv *il,
948 return cpu_to_le32((u32)dma_addr);
952 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
954 * If there are slots in the RX queue that need to be restocked,
955 * and we have free pre-allocated buffers, fill the ranks as much
956 * as we can, pulling from rx_free.
958 * This moves the 'write' idx forward to catch up with 'processed', and
959 * also updates the memory address in the firmware to reference the new
962 static void il3945_rx_queue_restock(struct il_priv *il)
964 struct il_rx_queue *rxq = &il->rxq;
965 struct list_head *element;
966 struct il_rx_buf *rxb;
970 spin_lock_irqsave(&rxq->lock, flags);
971 write = rxq->write & ~0x7;
972 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
973 /* Get next free Rx buffer, remove from free list */
974 element = rxq->rx_free.next;
975 rxb = list_entry(element, struct il_rx_buf, list);
978 /* Point to Rx buffer via next RBD in circular buffer */
979 rxq->bd[rxq->write] = il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
980 rxq->queue[rxq->write] = rxb;
981 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
984 spin_unlock_irqrestore(&rxq->lock, flags);
985 /* If the pre-allocated buffer pool is dropping low, schedule to
987 if (rxq->free_count <= RX_LOW_WATERMARK)
988 queue_work(il->workqueue, &il->rx_replenish);
991 /* If we've added more space for the firmware to place data, tell it.
992 * Increment device's write pointer in multiples of 8. */
993 if (rxq->write_actual != (rxq->write & ~0x7) ||
994 abs(rxq->write - rxq->read) > 7) {
995 spin_lock_irqsave(&rxq->lock, flags);
996 rxq->need_update = 1;
997 spin_unlock_irqrestore(&rxq->lock, flags);
998 il_rx_queue_update_write_ptr(il, rxq);
1003 * il3945_rx_replenish - Move all used packet from rx_used to rx_free
1005 * When moving to rx_free an SKB is allocated for the slot.
1007 * Also restock the Rx queue via il3945_rx_queue_restock.
1008 * This is called as a scheduled work item (except for during initialization)
1010 static void il3945_rx_allocate(struct il_priv *il, gfp_t priority)
1012 struct il_rx_queue *rxq = &il->rxq;
1013 struct list_head *element;
1014 struct il_rx_buf *rxb;
1016 unsigned long flags;
1017 gfp_t gfp_mask = priority;
1020 spin_lock_irqsave(&rxq->lock, flags);
1022 if (list_empty(&rxq->rx_used)) {
1023 spin_unlock_irqrestore(&rxq->lock, flags);
1026 spin_unlock_irqrestore(&rxq->lock, flags);
1028 if (rxq->free_count > RX_LOW_WATERMARK)
1029 gfp_mask |= __GFP_NOWARN;
1031 if (il->hw_params.rx_page_order > 0)
1032 gfp_mask |= __GFP_COMP;
1034 /* Alloc a new receive buffer */
1035 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
1037 if (net_ratelimit())
1038 D_INFO("Failed to allocate SKB buffer.\n");
1039 if (rxq->free_count <= RX_LOW_WATERMARK &&
1041 IL_ERR("Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1042 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
1044 /* We don't reschedule replenish work here -- we will
1045 * call the restock method and if it still needs
1046 * more buffers it will schedule replenish */
1050 spin_lock_irqsave(&rxq->lock, flags);
1051 if (list_empty(&rxq->rx_used)) {
1052 spin_unlock_irqrestore(&rxq->lock, flags);
1053 __free_pages(page, il->hw_params.rx_page_order);
1056 element = rxq->rx_used.next;
1057 rxb = list_entry(element, struct il_rx_buf, list);
1059 spin_unlock_irqrestore(&rxq->lock, flags);
1062 /* Get physical address of RB/SKB */
1063 rxb->page_dma = pci_map_page(il->pci_dev, page, 0,
1064 PAGE_SIZE << il->hw_params.rx_page_order,
1065 PCI_DMA_FROMDEVICE);
1067 spin_lock_irqsave(&rxq->lock, flags);
1069 list_add_tail(&rxb->list, &rxq->rx_free);
1071 il->alloc_rxb_page++;
1073 spin_unlock_irqrestore(&rxq->lock, flags);
1077 void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
1079 unsigned long flags;
1081 spin_lock_irqsave(&rxq->lock, flags);
1082 INIT_LIST_HEAD(&rxq->rx_free);
1083 INIT_LIST_HEAD(&rxq->rx_used);
1084 /* Fill the rx_used queue with _all_ of the Rx buffers */
1085 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1086 /* In the reset function, these buffers may have been allocated
1087 * to an SKB, so we need to unmap and free potential storage */
1088 if (rxq->pool[i].page != NULL) {
1089 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1090 PAGE_SIZE << il->hw_params.rx_page_order,
1091 PCI_DMA_FROMDEVICE);
1092 __il_free_pages(il, rxq->pool[i].page);
1093 rxq->pool[i].page = NULL;
1095 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1098 /* Set us so that we have processed and used all buffers, but have
1099 * not restocked the Rx queue with fresh buffers */
1100 rxq->read = rxq->write = 0;
1101 rxq->write_actual = 0;
1102 rxq->free_count = 0;
1103 spin_unlock_irqrestore(&rxq->lock, flags);
1106 void il3945_rx_replenish(void *data)
1108 struct il_priv *il = data;
1109 unsigned long flags;
1111 il3945_rx_allocate(il, GFP_KERNEL);
1113 spin_lock_irqsave(&il->lock, flags);
1114 il3945_rx_queue_restock(il);
1115 spin_unlock_irqrestore(&il->lock, flags);
1118 static void il3945_rx_replenish_now(struct il_priv *il)
1120 il3945_rx_allocate(il, GFP_ATOMIC);
1122 il3945_rx_queue_restock(il);
1126 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1127 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1128 * This free routine walks the list of POOL entries and if SKB is set to
1129 * non NULL it is unmapped and freed
1131 static void il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
1134 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1135 if (rxq->pool[i].page != NULL) {
1136 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1137 PAGE_SIZE << il->hw_params.rx_page_order,
1138 PCI_DMA_FROMDEVICE);
1139 __il_free_pages(il, rxq->pool[i].page);
1140 rxq->pool[i].page = NULL;
1144 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1146 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
1147 rxq->rb_stts, rxq->rb_stts_dma);
1149 rxq->rb_stts = NULL;
1153 /* Convert linear signal-to-noise ratio into dB */
1154 static u8 ratio2dB[100] = {
1155 /* 0 1 2 3 4 5 6 7 8 9 */
1156 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1157 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1158 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1159 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1160 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1161 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1162 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1163 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1164 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1165 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1168 /* Calculates a relative dB value from a ratio of linear
1169 * (i.e. not dB) signal levels.
1170 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1171 int il3945_calc_db_from_ratio(int sig_ratio)
1173 /* 1000:1 or higher just report as 60 dB */
1174 if (sig_ratio >= 1000)
1177 /* 100:1 or higher, divide by 10 and use table,
1178 * add 20 dB to make up for divide by 10 */
1179 if (sig_ratio >= 100)
1180 return 20 + (int)ratio2dB[sig_ratio/10];
1182 /* We shouldn't see this */
1186 /* Use table for ratios 1:1 - 99:1 */
1187 return (int)ratio2dB[sig_ratio];
1191 * il3945_rx_handle - Main entry function for receiving responses from uCode
1193 * Uses the il->handlers callback function array to invoke
1194 * the appropriate handlers, including command responses,
1195 * frame-received notifications, and other notifications.
1197 static void il3945_rx_handle(struct il_priv *il)
1199 struct il_rx_buf *rxb;
1200 struct il_rx_pkt *pkt;
1201 struct il_rx_queue *rxq = &il->rxq;
1204 unsigned long flags;
1207 int total_empty = 0;
1209 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
1210 * buffer that the driver may process (last buffer filled by ucode). */
1211 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1214 /* calculate total frames need to be restock after handling RX */
1215 total_empty = r - rxq->write_actual;
1216 if (total_empty < 0)
1217 total_empty += RX_QUEUE_SIZE;
1219 if (total_empty > (RX_QUEUE_SIZE / 2))
1221 /* Rx interrupt, but nothing sent from uCode */
1223 D_RX("r = %d, i = %d\n", r, i);
1228 rxb = rxq->queue[i];
1230 /* If an RXB doesn't have a Rx queue slot associated with it,
1231 * then a bug has been introduced in the queue refilling
1232 * routines -- catch it here */
1233 BUG_ON(rxb == NULL);
1235 rxq->queue[i] = NULL;
1237 pci_unmap_page(il->pci_dev, rxb->page_dma,
1238 PAGE_SIZE << il->hw_params.rx_page_order,
1239 PCI_DMA_FROMDEVICE);
1240 pkt = rxb_addr(rxb);
1242 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
1243 len += sizeof(u32); /* account for status word */
1245 /* Reclaim a command buffer only if this packet is a response
1246 * to a (driver-originated) command.
1247 * If the packet (e.g. Rx frame) originated from uCode,
1248 * there is no command buffer to reclaim.
1249 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1250 * but apparently a few don't get set; catch them here. */
1251 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1252 pkt->hdr.cmd != N_STATS &&
1253 pkt->hdr.cmd != C_TX;
1255 /* Based on type of command response or notification,
1256 * handle those that need handling via function in
1257 * handlers table. See il3945_setup_handlers() */
1258 if (il->handlers[pkt->hdr.cmd]) {
1259 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
1260 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1261 il->isr_stats.handlers[pkt->hdr.cmd]++;
1262 il->handlers[pkt->hdr.cmd] (il, rxb);
1264 /* No handling needed */
1266 "r %d i %d No handler needed for %s, 0x%02x\n",
1267 r, i, il_get_cmd_string(pkt->hdr.cmd),
1272 * XXX: After here, we should always check rxb->page
1273 * against NULL before touching it or its virtual
1274 * memory (pkt). Because some handler might have
1275 * already taken or freed the pages.
1279 /* Invoke any callbacks, transfer the buffer to caller,
1280 * and fire off the (possibly) blocking il_send_cmd()
1281 * as we reclaim the driver command queue */
1283 il_tx_cmd_complete(il, rxb);
1285 IL_WARN("Claim null rxb?\n");
1288 /* Reuse the page if possible. For notification packets and
1289 * SKBs that fail to Rx correctly, add them back into the
1290 * rx_free list for reuse later. */
1291 spin_lock_irqsave(&rxq->lock, flags);
1292 if (rxb->page != NULL) {
1293 rxb->page_dma = pci_map_page(il->pci_dev, rxb->page,
1294 0, PAGE_SIZE << il->hw_params.rx_page_order,
1295 PCI_DMA_FROMDEVICE);
1296 list_add_tail(&rxb->list, &rxq->rx_free);
1299 list_add_tail(&rxb->list, &rxq->rx_used);
1301 spin_unlock_irqrestore(&rxq->lock, flags);
1303 i = (i + 1) & RX_QUEUE_MASK;
1304 /* If there are a lot of unused frames,
1305 * restock the Rx queue so ucode won't assert. */
1310 il3945_rx_replenish_now(il);
1316 /* Backtrack one entry */
1319 il3945_rx_replenish_now(il);
1321 il3945_rx_queue_restock(il);
1324 /* call this function to flush any scheduled tasklet */
1325 static inline void il3945_synchronize_irq(struct il_priv *il)
1327 /* wait to make sure we flush pending tasklet*/
1328 synchronize_irq(il->pci_dev->irq);
1329 tasklet_kill(&il->irq_tasklet);
1332 static const char *il3945_desc_lookup(int i)
1340 return "BAD_CHECKSUM";
1342 return "NMI_INTERRUPT";
1346 return "FATAL_ERROR";
1352 #define ERROR_START_OFFSET (1 * sizeof(u32))
1353 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1355 void il3945_dump_nic_error_log(struct il_priv *il)
1358 u32 desc, time, count, base, data1;
1359 u32 blink1, blink2, ilink1, ilink2;
1361 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
1363 if (!il3945_hw_valid_rtc_data_addr(base)) {
1364 IL_ERR("Not valid error log pointer 0x%08X\n", base);
1369 count = il_read_targ_mem(il, base);
1371 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1372 IL_ERR("Start IWL Error Log Dump:\n");
1373 IL_ERR("Status: 0x%08lX, count: %d\n",
1377 IL_ERR("Desc Time asrtPC blink2 "
1378 "ilink1 nmiPC Line\n");
1379 for (i = ERROR_START_OFFSET;
1380 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1381 i += ERROR_ELEM_SIZE) {
1382 desc = il_read_targ_mem(il, base + i);
1384 il_read_targ_mem(il, base + i + 1 * sizeof(u32));
1386 il_read_targ_mem(il, base + i + 2 * sizeof(u32));
1388 il_read_targ_mem(il, base + i + 3 * sizeof(u32));
1390 il_read_targ_mem(il, base + i + 4 * sizeof(u32));
1392 il_read_targ_mem(il, base + i + 5 * sizeof(u32));
1394 il_read_targ_mem(il, base + i + 6 * sizeof(u32));
1397 "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1398 il3945_desc_lookup(desc), desc, time, blink1, blink2,
1399 ilink1, ilink2, data1);
1403 static void il3945_irq_tasklet(struct il_priv *il)
1405 u32 inta, handled = 0;
1407 unsigned long flags;
1408 #ifdef CONFIG_IWLEGACY_DEBUG
1412 spin_lock_irqsave(&il->lock, flags);
1414 /* Ack/clear/reset pending uCode interrupts.
1415 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1416 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1417 inta = _il_rd(il, CSR_INT);
1418 _il_wr(il, CSR_INT, inta);
1420 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1421 * Any new interrupts that happen after this, either while we're
1422 * in this tasklet, or later, will show up in next ISR/tasklet. */
1423 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1424 _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
1426 #ifdef CONFIG_IWLEGACY_DEBUG
1427 if (il_get_debug_level(il) & IL_DL_ISR) {
1428 /* just for debug */
1429 inta_mask = _il_rd(il, CSR_INT_MASK);
1430 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1431 inta, inta_mask, inta_fh);
1435 spin_unlock_irqrestore(&il->lock, flags);
1437 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1438 * atomic, make sure that inta covers all the interrupts that
1439 * we've discovered, even if FH interrupt came in just after
1440 * reading CSR_INT. */
1441 if (inta_fh & CSR39_FH_INT_RX_MASK)
1442 inta |= CSR_INT_BIT_FH_RX;
1443 if (inta_fh & CSR39_FH_INT_TX_MASK)
1444 inta |= CSR_INT_BIT_FH_TX;
1446 /* Now service all interrupt bits discovered above. */
1447 if (inta & CSR_INT_BIT_HW_ERR) {
1448 IL_ERR("Hardware error detected. Restarting.\n");
1450 /* Tell the device to stop sending interrupts */
1451 il_disable_interrupts(il);
1454 il_irq_handle_error(il);
1456 handled |= CSR_INT_BIT_HW_ERR;
1461 #ifdef CONFIG_IWLEGACY_DEBUG
1462 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1463 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1464 if (inta & CSR_INT_BIT_SCD) {
1465 D_ISR("Scheduler finished to transmit "
1466 "the frame/frames.\n");
1467 il->isr_stats.sch++;
1470 /* Alive notification via Rx interrupt will do the real work */
1471 if (inta & CSR_INT_BIT_ALIVE) {
1472 D_ISR("Alive interrupt\n");
1473 il->isr_stats.alive++;
1477 /* Safely ignore these bits for debug checks below */
1478 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1480 /* Error detected by uCode */
1481 if (inta & CSR_INT_BIT_SW_ERR) {
1482 IL_ERR("Microcode SW error detected. "
1483 "Restarting 0x%X.\n", inta);
1485 il_irq_handle_error(il);
1486 handled |= CSR_INT_BIT_SW_ERR;
1489 /* uCode wakes up after power-down sleep */
1490 if (inta & CSR_INT_BIT_WAKEUP) {
1491 D_ISR("Wakeup interrupt\n");
1492 il_rx_queue_update_write_ptr(il, &il->rxq);
1493 il_txq_update_write_ptr(il, &il->txq[0]);
1494 il_txq_update_write_ptr(il, &il->txq[1]);
1495 il_txq_update_write_ptr(il, &il->txq[2]);
1496 il_txq_update_write_ptr(il, &il->txq[3]);
1497 il_txq_update_write_ptr(il, &il->txq[4]);
1498 il_txq_update_write_ptr(il, &il->txq[5]);
1500 il->isr_stats.wakeup++;
1501 handled |= CSR_INT_BIT_WAKEUP;
1504 /* All uCode command responses, including Tx command responses,
1505 * Rx "responses" (frame-received notification), and other
1506 * notifications from uCode come through here*/
1507 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1508 il3945_rx_handle(il);
1510 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1513 if (inta & CSR_INT_BIT_FH_TX) {
1514 D_ISR("Tx interrupt\n");
1517 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
1518 il_wr(il, FH39_TCSR_CREDIT
1519 (FH39_SRVC_CHNL), 0x0);
1520 handled |= CSR_INT_BIT_FH_TX;
1523 if (inta & ~handled) {
1524 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1525 il->isr_stats.unhandled++;
1528 if (inta & ~il->inta_mask) {
1529 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
1530 inta & ~il->inta_mask);
1531 IL_WARN(" with FH_INT = 0x%08x\n", inta_fh);
1534 /* Re-enable all interrupts */
1535 /* only Re-enable if disabled by irq */
1536 if (test_bit(S_INT_ENABLED, &il->status))
1537 il_enable_interrupts(il);
1539 #ifdef CONFIG_IWLEGACY_DEBUG
1540 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1541 inta = _il_rd(il, CSR_INT);
1542 inta_mask = _il_rd(il, CSR_INT_MASK);
1543 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1544 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1545 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1550 static int il3945_get_channels_for_scan(struct il_priv *il,
1551 enum ieee80211_band band,
1552 u8 is_active, u8 n_probes,
1553 struct il3945_scan_channel *scan_ch,
1554 struct ieee80211_vif *vif)
1556 struct ieee80211_channel *chan;
1557 const struct ieee80211_supported_band *sband;
1558 const struct il_channel_info *ch_info;
1559 u16 passive_dwell = 0;
1560 u16 active_dwell = 0;
1563 sband = il_get_hw_mode(il, band);
1567 active_dwell = il_get_active_dwell_time(il, band, n_probes);
1568 passive_dwell = il_get_passive_dwell_time(il, band, vif);
1570 if (passive_dwell <= active_dwell)
1571 passive_dwell = active_dwell + 1;
1573 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
1574 chan = il->scan_request->channels[i];
1576 if (chan->band != band)
1579 scan_ch->channel = chan->hw_value;
1581 ch_info = il_get_channel_info(il, band,
1583 if (!il_is_channel_valid(ch_info)) {
1585 "Channel %d is INVALID for this band.\n",
1590 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1591 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1592 /* If passive , set up for auto-switch
1593 * and use long active_dwell time.
1595 if (!is_active || il_is_channel_passive(ch_info) ||
1596 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1597 scan_ch->type = 0; /* passive */
1598 if (IL_UCODE_API(il->ucode_ver) == 1)
1599 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1601 scan_ch->type = 1; /* active */
1604 /* Set direct probe bits. These may be used both for active
1605 * scan channels (probes gets sent right away),
1606 * or for passive channels (probes get se sent only after
1607 * hearing clear Rx packet).*/
1608 if (IL_UCODE_API(il->ucode_ver) >= 2) {
1610 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1612 /* uCode v1 does not allow setting direct probe bits on
1613 * passive channel. */
1614 if ((scan_ch->type & 1) && n_probes)
1615 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1618 /* Set txpower levels to defaults */
1619 scan_ch->tpc.dsp_atten = 110;
1620 /* scan_pwr_info->tpc.dsp_atten; */
1622 /*scan_pwr_info->tpc.tx_gain; */
1623 if (band == IEEE80211_BAND_5GHZ)
1624 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1626 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1627 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1629 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1633 D_SCAN("Scanning %d [%s %d]\n",
1635 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1636 (scan_ch->type & 1) ?
1637 active_dwell : passive_dwell);
1643 D_SCAN("total channels to scan %d\n", added);
1647 static void il3945_init_hw_rates(struct il_priv *il,
1648 struct ieee80211_rate *rates)
1652 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
1653 rates[i].bitrate = il3945_rates[i].ieee * 5;
1654 rates[i].hw_value = i; /* Rate scaling will work on idxes */
1655 rates[i].hw_value_short = i;
1657 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
1659 * If CCK != 1M then set short preamble rate flag.
1661 rates[i].flags |= (il3945_rates[i].plcp == 10) ?
1662 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1667 /******************************************************************************
1669 * uCode download functions
1671 ******************************************************************************/
1673 static void il3945_dealloc_ucode_pci(struct il_priv *il)
1675 il_free_fw_desc(il->pci_dev, &il->ucode_code);
1676 il_free_fw_desc(il->pci_dev, &il->ucode_data);
1677 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
1678 il_free_fw_desc(il->pci_dev, &il->ucode_init);
1679 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
1680 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
1684 * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
1685 * looking at all data.
1687 static int il3945_verify_inst_full(struct il_priv *il, __le32 *image, u32 len)
1694 D_INFO("ucode inst image size is %u\n", len);
1696 il_wr(il, HBUS_TARG_MEM_RADDR,
1697 IL39_RTC_INST_LOWER_BOUND);
1700 for (; len > 0; len -= sizeof(u32), image++) {
1701 /* read data comes through single port, auto-incr addr */
1702 /* NOTE: Use the debugless read so we don't flood kernel log
1703 * if IL_DL_IO is set */
1704 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1705 if (val != le32_to_cpu(*image)) {
1706 IL_ERR("uCode INST section is invalid at "
1707 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1708 save_len - len, val, le32_to_cpu(*image));
1719 "ucode image in INSTRUCTION memory is good\n");
1726 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1727 * using sample data 100 bytes apart. If these sample points are good,
1728 * it's a pretty good bet that everything between them is good, too.
1730 static int il3945_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len)
1737 D_INFO("ucode inst image size is %u\n", len);
1739 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1740 /* read data comes through single port, auto-incr addr */
1741 /* NOTE: Use the debugless read so we don't flood kernel log
1742 * if IL_DL_IO is set */
1743 il_wr(il, HBUS_TARG_MEM_RADDR,
1744 i + IL39_RTC_INST_LOWER_BOUND);
1745 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1746 if (val != le32_to_cpu(*image)) {
1747 #if 0 /* Enable this if you want to see details */
1748 IL_ERR("uCode INST section is invalid at "
1749 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1764 * il3945_verify_ucode - determine which instruction image is in SRAM,
1765 * and verify its contents
1767 static int il3945_verify_ucode(struct il_priv *il)
1774 image = (__le32 *)il->ucode_boot.v_addr;
1775 len = il->ucode_boot.len;
1776 rc = il3945_verify_inst_sparse(il, image, len);
1778 D_INFO("Bootstrap uCode is good in inst SRAM\n");
1782 /* Try initialize */
1783 image = (__le32 *)il->ucode_init.v_addr;
1784 len = il->ucode_init.len;
1785 rc = il3945_verify_inst_sparse(il, image, len);
1787 D_INFO("Initialize uCode is good in inst SRAM\n");
1791 /* Try runtime/protocol */
1792 image = (__le32 *)il->ucode_code.v_addr;
1793 len = il->ucode_code.len;
1794 rc = il3945_verify_inst_sparse(il, image, len);
1796 D_INFO("Runtime uCode is good in inst SRAM\n");
1800 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1802 /* Since nothing seems to match, show first several data entries in
1803 * instruction SRAM, so maybe visual inspection will give a clue.
1804 * Selection of bootstrap image (vs. other images) is arbitrary. */
1805 image = (__le32 *)il->ucode_boot.v_addr;
1806 len = il->ucode_boot.len;
1807 rc = il3945_verify_inst_full(il, image, len);
1812 static void il3945_nic_start(struct il_priv *il)
1814 /* Remove all resets to allow NIC to operate */
1815 _il_wr(il, CSR_RESET, 0);
1818 #define IL3945_UCODE_GET(item) \
1819 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
1821 return le32_to_cpu(ucode->v1.item); \
1824 static u32 il3945_ucode_get_header_size(u32 api_ver)
1829 static u8 *il3945_ucode_get_data(const struct il_ucode_header *ucode)
1831 return (u8 *) ucode->v1.data;
1834 IL3945_UCODE_GET(inst_size);
1835 IL3945_UCODE_GET(data_size);
1836 IL3945_UCODE_GET(init_size);
1837 IL3945_UCODE_GET(init_data_size);
1838 IL3945_UCODE_GET(boot_size);
1841 * il3945_read_ucode - Read uCode images from disk file.
1843 * Copy into buffers for card to fetch via bus-mastering
1845 static int il3945_read_ucode(struct il_priv *il)
1847 const struct il_ucode_header *ucode;
1848 int ret = -EINVAL, idx;
1849 const struct firmware *ucode_raw;
1850 /* firmware file name contains uCode/driver compatibility version */
1851 const char *name_pre = il->cfg->fw_name_pre;
1852 const unsigned int api_max = il->cfg->ucode_api_max;
1853 const unsigned int api_min = il->cfg->ucode_api_min;
1857 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1859 /* Ask kernel firmware_class module to get the boot firmware off disk.
1860 * request_firmware() is synchronous, file is in memory on return. */
1861 for (idx = api_max; idx >= api_min; idx--) {
1862 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
1863 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
1865 IL_ERR("%s firmware file req failed: %d\n",
1873 IL_ERR("Loaded firmware %s, "
1874 "which is deprecated. "
1875 " Please use API v%u instead.\n",
1877 D_INFO("Got firmware '%s' file "
1878 "(%zd bytes) from disk\n",
1879 buf, ucode_raw->size);
1887 /* Make sure that we got at least our header! */
1888 if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
1889 IL_ERR("File size way too small!\n");
1894 /* Data from ucode file: header followed by uCode images */
1895 ucode = (struct il_ucode_header *)ucode_raw->data;
1897 il->ucode_ver = le32_to_cpu(ucode->ver);
1898 api_ver = IL_UCODE_API(il->ucode_ver);
1899 inst_size = il3945_ucode_get_inst_size(ucode);
1900 data_size = il3945_ucode_get_data_size(ucode);
1901 init_size = il3945_ucode_get_init_size(ucode);
1902 init_data_size = il3945_ucode_get_init_data_size(ucode);
1903 boot_size = il3945_ucode_get_boot_size(ucode);
1904 src = il3945_ucode_get_data(ucode);
1906 /* api_ver should match the api version forming part of the
1907 * firmware filename ... but we don't check for that and only rely
1908 * on the API version read from firmware header from here on forward */
1910 if (api_ver < api_min || api_ver > api_max) {
1911 IL_ERR("Driver unable to support your firmware API. "
1912 "Driver supports v%u, firmware is v%u.\n",
1918 if (api_ver != api_max)
1919 IL_ERR("Firmware has old API version. Expected %u, "
1920 "got %u. New firmware can be obtained "
1921 "from http://www.intellinuxwireless.org.\n",
1924 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
1925 IL_UCODE_MAJOR(il->ucode_ver),
1926 IL_UCODE_MINOR(il->ucode_ver),
1927 IL_UCODE_API(il->ucode_ver),
1928 IL_UCODE_SERIAL(il->ucode_ver));
1930 snprintf(il->hw->wiphy->fw_version,
1931 sizeof(il->hw->wiphy->fw_version),
1933 IL_UCODE_MAJOR(il->ucode_ver),
1934 IL_UCODE_MINOR(il->ucode_ver),
1935 IL_UCODE_API(il->ucode_ver),
1936 IL_UCODE_SERIAL(il->ucode_ver));
1938 D_INFO("f/w package hdr ucode version raw = 0x%x\n",
1940 D_INFO("f/w package hdr runtime inst size = %u\n",
1942 D_INFO("f/w package hdr runtime data size = %u\n",
1944 D_INFO("f/w package hdr init inst size = %u\n",
1946 D_INFO("f/w package hdr init data size = %u\n",
1948 D_INFO("f/w package hdr boot inst size = %u\n",
1952 /* Verify size of file vs. image size info in file's header */
1953 if (ucode_raw->size != il3945_ucode_get_header_size(api_ver) +
1954 inst_size + data_size + init_size +
1955 init_data_size + boot_size) {
1958 "uCode file size %zd does not match expected size\n",
1964 /* Verify that uCode images will fit in card's SRAM */
1965 if (inst_size > IL39_MAX_INST_SIZE) {
1966 D_INFO("uCode instr len %d too large to fit in\n",
1972 if (data_size > IL39_MAX_DATA_SIZE) {
1973 D_INFO("uCode data len %d too large to fit in\n",
1978 if (init_size > IL39_MAX_INST_SIZE) {
1980 "uCode init instr len %d too large to fit in\n",
1985 if (init_data_size > IL39_MAX_DATA_SIZE) {
1987 "uCode init data len %d too large to fit in\n",
1992 if (boot_size > IL39_MAX_BSM_SIZE) {
1994 "uCode boot instr len %d too large to fit in\n",
2000 /* Allocate ucode buffers for card's bus-master loading ... */
2002 /* Runtime instructions and 2 copies of data:
2003 * 1) unmodified from disk
2004 * 2) backup cache for save/restore during power-downs */
2005 il->ucode_code.len = inst_size;
2006 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
2008 il->ucode_data.len = data_size;
2009 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
2011 il->ucode_data_backup.len = data_size;
2012 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
2014 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
2015 !il->ucode_data_backup.v_addr)
2018 /* Initialization instructions and data */
2019 if (init_size && init_data_size) {
2020 il->ucode_init.len = init_size;
2021 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
2023 il->ucode_init_data.len = init_data_size;
2024 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
2026 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
2030 /* Bootstrap (instructions only, no data) */
2032 il->ucode_boot.len = boot_size;
2033 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
2035 if (!il->ucode_boot.v_addr)
2039 /* Copy images into buffers for card's bus-master reads ... */
2041 /* Runtime instructions (first block of data in file) */
2044 "Copying (but not loading) uCode instr len %zd\n", len);
2045 memcpy(il->ucode_code.v_addr, src, len);
2048 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2049 il->ucode_code.v_addr, (u32)il->ucode_code.p_addr);
2051 /* Runtime data (2nd block)
2052 * NOTE: Copy into backup buffer will be done in il3945_up() */
2055 "Copying (but not loading) uCode data len %zd\n", len);
2056 memcpy(il->ucode_data.v_addr, src, len);
2057 memcpy(il->ucode_data_backup.v_addr, src, len);
2060 /* Initialization instructions (3rd block) */
2064 "Copying (but not loading) init instr len %zd\n", len);
2065 memcpy(il->ucode_init.v_addr, src, len);
2069 /* Initialization data (4th block) */
2070 if (init_data_size) {
2071 len = init_data_size;
2073 "Copying (but not loading) init data len %zd\n", len);
2074 memcpy(il->ucode_init_data.v_addr, src, len);
2078 /* Bootstrap instructions (5th block) */
2081 "Copying (but not loading) boot instr len %zd\n", len);
2082 memcpy(il->ucode_boot.v_addr, src, len);
2084 /* We have our copies now, allow OS release its copies */
2085 release_firmware(ucode_raw);
2089 IL_ERR("failed to allocate pci memory\n");
2091 il3945_dealloc_ucode_pci(il);
2094 release_firmware(ucode_raw);
2102 * il3945_set_ucode_ptrs - Set uCode address location
2104 * Tell initialization uCode where to find runtime uCode.
2106 * BSM registers initially contain pointers to initialization uCode.
2107 * We need to replace them to load runtime uCode inst and data,
2108 * and to save runtime data when powering down.
2110 static int il3945_set_ucode_ptrs(struct il_priv *il)
2115 /* bits 31:0 for 3945 */
2116 pinst = il->ucode_code.p_addr;
2117 pdata = il->ucode_data_backup.p_addr;
2119 /* Tell bootstrap uCode where to find image to load */
2120 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2121 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2122 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG,
2123 il->ucode_data.len);
2125 /* Inst byte count must be last to set up, bit 31 signals uCode
2126 * that all new ptr/size info is in place */
2127 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
2128 il->ucode_code.len | BSM_DRAM_INST_LOAD);
2130 D_INFO("Runtime uCode pointers are set.\n");
2136 * il3945_init_alive_start - Called after N_ALIVE notification received
2138 * Called after N_ALIVE notification received from "initialize" uCode.
2140 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2142 static void il3945_init_alive_start(struct il_priv *il)
2144 /* Check alive response for "valid" sign from uCode */
2145 if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
2146 /* We had an error bringing up the hardware, so take it
2147 * all the way back down so we can try again */
2148 D_INFO("Initialize Alive failed.\n");
2152 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2153 * This is a paranoid check, because we would not have gotten the
2154 * "initialize" alive if code weren't properly loaded. */
2155 if (il3945_verify_ucode(il)) {
2156 /* Runtime instruction load was bad;
2157 * take it all the way back down so we can try again */
2158 D_INFO("Bad \"initialize\" uCode load.\n");
2162 /* Send pointers to protocol/runtime uCode image ... init code will
2163 * load and launch runtime uCode, which will send us another "Alive"
2165 D_INFO("Initialization Alive received.\n");
2166 if (il3945_set_ucode_ptrs(il)) {
2167 /* Runtime instruction load won't happen;
2168 * take it all the way back down so we can try again */
2169 D_INFO("Couldn't set up uCode pointers.\n");
2175 queue_work(il->workqueue, &il->restart);
2179 * il3945_alive_start - called after N_ALIVE notification received
2180 * from protocol/runtime uCode (initialization uCode's
2181 * Alive gets handled by il3945_init_alive_start()).
2183 static void il3945_alive_start(struct il_priv *il)
2185 int thermal_spin = 0;
2187 struct il_rxon_context *ctx = &il->ctx;
2189 D_INFO("Runtime Alive received.\n");
2191 if (il->card_alive.is_valid != UCODE_VALID_OK) {
2192 /* We had an error bringing up the hardware, so take it
2193 * all the way back down so we can try again */
2194 D_INFO("Alive failed.\n");
2198 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2199 * This is a paranoid check, because we would not have gotten the
2200 * "runtime" alive if code weren't properly loaded. */
2201 if (il3945_verify_ucode(il)) {
2202 /* Runtime instruction load was bad;
2203 * take it all the way back down so we can try again */
2204 D_INFO("Bad runtime uCode load.\n");
2208 rfkill = il_rd_prph(il, APMG_RFKILL_REG);
2209 D_INFO("RFKILL status: 0x%x\n", rfkill);
2212 clear_bit(S_RF_KILL_HW, &il->status);
2213 /* if RFKILL is not on, then wait for thermal
2214 * sensor in adapter to kick in */
2215 while (il3945_hw_get_temperature(il) == 0) {
2221 D_INFO("Thermal calibration took %dus\n",
2224 set_bit(S_RF_KILL_HW, &il->status);
2226 /* After the ALIVE response, we can send commands to 3945 uCode */
2227 set_bit(S_ALIVE, &il->status);
2229 /* Enable watchdog to monitor the driver tx queues */
2230 il_setup_watchdog(il);
2232 if (il_is_rfkill(il))
2235 ieee80211_wake_queues(il->hw);
2237 il->active_rate = RATES_MASK_3945;
2239 il_power_update_mode(il, true);
2241 if (il_is_associated(il)) {
2242 struct il3945_rxon_cmd *active_rxon =
2243 (struct il3945_rxon_cmd *)(&ctx->active);
2245 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2246 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2248 /* Initialize our rx_config data */
2249 il_connection_init_rx_config(il, ctx);
2252 /* Configure Bluetooth device coexistence support */
2253 il_send_bt_config(il);
2255 set_bit(S_READY, &il->status);
2257 /* Configure the adapter for unassociated operation */
2258 il3945_commit_rxon(il, ctx);
2260 il3945_reg_txpower_periodic(il);
2262 D_INFO("ALIVE processing complete.\n");
2263 wake_up(&il->wait_command_queue);
2268 queue_work(il->workqueue, &il->restart);
2271 static void il3945_cancel_deferred_work(struct il_priv *il);
2273 static void __il3945_down(struct il_priv *il)
2275 unsigned long flags;
2278 D_INFO(DRV_NAME " is going down\n");
2280 il_scan_cancel_timeout(il, 200);
2282 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
2284 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
2285 * to prevent rearm timer */
2286 del_timer_sync(&il->watchdog);
2288 /* Station information will now be cleared in device */
2289 il_clear_ucode_stations(il, NULL);
2290 il_dealloc_bcast_stations(il);
2291 il_clear_driver_stations(il);
2293 /* Unblock any waiting calls */
2294 wake_up_all(&il->wait_command_queue);
2296 /* Wipe out the EXIT_PENDING status bit if we are not actually
2297 * exiting the module */
2299 clear_bit(S_EXIT_PENDING, &il->status);
2301 /* stop and reset the on-board processor */
2302 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2304 /* tell the device to stop sending interrupts */
2305 spin_lock_irqsave(&il->lock, flags);
2306 il_disable_interrupts(il);
2307 spin_unlock_irqrestore(&il->lock, flags);
2308 il3945_synchronize_irq(il);
2310 if (il->mac80211_registered)
2311 ieee80211_stop_queues(il->hw);
2313 /* If we have not previously called il3945_init() then
2314 * clear all bits but the RF Kill bits and return */
2315 if (!il_is_init(il)) {
2316 il->status = test_bit(S_RF_KILL_HW, &il->status) <<
2318 test_bit(S_GEO_CONFIGURED, &il->status) <<
2320 test_bit(S_EXIT_PENDING, &il->status) <<
2325 /* ...otherwise clear out all the status bits but the RF Kill
2326 * bit and continue taking the NIC down. */
2327 il->status &= test_bit(S_RF_KILL_HW, &il->status) <<
2329 test_bit(S_GEO_CONFIGURED, &il->status) <<
2331 test_bit(S_FW_ERROR, &il->status) <<
2333 test_bit(S_EXIT_PENDING, &il->status) <<
2336 il3945_hw_txq_ctx_stop(il);
2337 il3945_hw_rxq_stop(il);
2339 /* Power-down device's busmaster DMA clocks */
2340 il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2343 /* Stop the device, and put it in low power state */
2347 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
2350 dev_kfree_skb(il->beacon_skb);
2351 il->beacon_skb = NULL;
2353 /* clear out any free frames */
2354 il3945_clear_free_frames(il);
2357 static void il3945_down(struct il_priv *il)
2359 mutex_lock(&il->mutex);
2361 mutex_unlock(&il->mutex);
2363 il3945_cancel_deferred_work(il);
2366 #define MAX_HW_RESTARTS 5
2368 static int il3945_alloc_bcast_station(struct il_priv *il)
2370 struct il_rxon_context *ctx = &il->ctx;
2371 unsigned long flags;
2374 spin_lock_irqsave(&il->sta_lock, flags);
2375 sta_id = il_prep_station(il, ctx,
2376 il_bcast_addr, false, NULL);
2377 if (sta_id == IL_INVALID_STATION) {
2378 IL_ERR("Unable to prepare broadcast station\n");
2379 spin_unlock_irqrestore(&il->sta_lock, flags);
2384 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
2385 il->stations[sta_id].used |= IL_STA_BCAST;
2386 spin_unlock_irqrestore(&il->sta_lock, flags);
2391 static int __il3945_up(struct il_priv *il)
2395 rc = il3945_alloc_bcast_station(il);
2399 if (test_bit(S_EXIT_PENDING, &il->status)) {
2400 IL_WARN("Exit pending; will not bring the NIC up\n");
2404 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
2405 IL_ERR("ucode not available for device bring up\n");
2409 /* If platform's RF_KILL switch is NOT set to KILL */
2410 if (_il_rd(il, CSR_GP_CNTRL) &
2411 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2412 clear_bit(S_RF_KILL_HW, &il->status);
2414 set_bit(S_RF_KILL_HW, &il->status);
2415 IL_WARN("Radio disabled by HW RF Kill switch\n");
2419 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2421 rc = il3945_hw_nic_init(il);
2423 IL_ERR("Unable to int nic\n");
2427 /* make sure rfkill handshake bits are cleared */
2428 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2429 _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
2430 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2432 /* clear (again), then enable host interrupts */
2433 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2434 il_enable_interrupts(il);
2436 /* really make sure rfkill handshake bits are cleared */
2437 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2438 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2440 /* Copy original ucode data image from disk into backup cache.
2441 * This will be used to initialize the on-board processor's
2442 * data SRAM for a clean start when the runtime program first loads. */
2443 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
2444 il->ucode_data.len);
2446 /* We return success when we resume from suspend and rf_kill is on. */
2447 if (test_bit(S_RF_KILL_HW, &il->status))
2450 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2452 /* load bootstrap state machine,
2453 * load bootstrap program into processor's memory,
2454 * prepare to load the "initialize" uCode */
2455 rc = il->cfg->ops->lib->load_ucode(il);
2459 "Unable to set up bootstrap uCode: %d\n", rc);
2463 /* start card; "initialize" will load runtime ucode */
2464 il3945_nic_start(il);
2466 D_INFO(DRV_NAME " is coming up\n");
2471 set_bit(S_EXIT_PENDING, &il->status);
2473 clear_bit(S_EXIT_PENDING, &il->status);
2475 /* tried to restart and config the device for as long as our
2476 * patience could withstand */
2477 IL_ERR("Unable to initialize device after %d attempts.\n", i);
2482 /*****************************************************************************
2484 * Workqueue callbacks
2486 *****************************************************************************/
2488 static void il3945_bg_init_alive_start(struct work_struct *data)
2490 struct il_priv *il =
2491 container_of(data, struct il_priv, init_alive_start.work);
2493 mutex_lock(&il->mutex);
2494 if (test_bit(S_EXIT_PENDING, &il->status))
2497 il3945_init_alive_start(il);
2499 mutex_unlock(&il->mutex);
2502 static void il3945_bg_alive_start(struct work_struct *data)
2504 struct il_priv *il =
2505 container_of(data, struct il_priv, alive_start.work);
2507 mutex_lock(&il->mutex);
2508 if (test_bit(S_EXIT_PENDING, &il->status))
2511 il3945_alive_start(il);
2513 mutex_unlock(&il->mutex);
2517 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2518 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2519 * *is* readable even when device has been SW_RESET into low power mode
2520 * (e.g. during RF KILL).
2522 static void il3945_rfkill_poll(struct work_struct *data)
2524 struct il_priv *il =
2525 container_of(data, struct il_priv, _3945.rfkill_poll.work);
2526 bool old_rfkill = test_bit(S_RF_KILL_HW, &il->status);
2527 bool new_rfkill = !(_il_rd(il, CSR_GP_CNTRL)
2528 & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2530 if (new_rfkill != old_rfkill) {
2532 set_bit(S_RF_KILL_HW, &il->status);
2534 clear_bit(S_RF_KILL_HW, &il->status);
2536 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
2538 D_RF_KILL("RF_KILL bit toggled to %s.\n",
2539 new_rfkill ? "disable radio" : "enable radio");
2542 /* Keep this running, even if radio now enabled. This will be
2543 * cancelled in mac_start() if system decides to start again */
2544 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2545 round_jiffies_relative(2 * HZ));
2549 int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
2551 struct il_host_cmd cmd = {
2553 .len = sizeof(struct il3945_scan_cmd),
2554 .flags = CMD_SIZE_HUGE,
2556 struct il3945_scan_cmd *scan;
2558 enum ieee80211_band band;
2559 bool is_active = false;
2563 lockdep_assert_held(&il->mutex);
2565 if (!il->scan_cmd) {
2566 il->scan_cmd = kmalloc(sizeof(struct il3945_scan_cmd) +
2567 IL_MAX_SCAN_SIZE, GFP_KERNEL);
2568 if (!il->scan_cmd) {
2569 D_SCAN("Fail to allocate scan memory\n");
2573 scan = il->scan_cmd;
2574 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
2576 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
2577 scan->quiet_time = IL_ACTIVE_QUIET_TIME;
2579 if (il_is_associated(il)) {
2582 u32 suspend_time = 100;
2583 u32 scan_suspend_time = 100;
2585 D_INFO("Scanning while associated...\n");
2587 interval = vif->bss_conf.beacon_int;
2589 scan->suspend_time = 0;
2590 scan->max_out_time = cpu_to_le32(200 * 1024);
2592 interval = suspend_time;
2594 * suspend time format:
2595 * 0-19: beacon interval in usec (time before exec.)
2597 * 24-31: number of beacons (suspend between channels)
2600 extra = (suspend_time / interval) << 24;
2601 scan_suspend_time = 0xFF0FFFFF &
2602 (extra | ((suspend_time % interval) * 1024));
2604 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2605 D_SCAN("suspend_time 0x%X beacon interval %d\n",
2606 scan_suspend_time, interval);
2609 if (il->scan_request->n_ssids) {
2611 D_SCAN("Kicking off active scan\n");
2612 for (i = 0; i < il->scan_request->n_ssids; i++) {
2613 /* always does wildcard anyway */
2614 if (!il->scan_request->ssids[i].ssid_len)
2616 scan->direct_scan[p].id = WLAN_EID_SSID;
2617 scan->direct_scan[p].len =
2618 il->scan_request->ssids[i].ssid_len;
2619 memcpy(scan->direct_scan[p].ssid,
2620 il->scan_request->ssids[i].ssid,
2621 il->scan_request->ssids[i].ssid_len);
2627 D_SCAN("Kicking off passive scan.\n");
2629 /* We don't build a direct scan probe request; the uCode will do
2630 * that based on the direct_mask added to each channel entry */
2631 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2632 scan->tx_cmd.sta_id = il->ctx.bcast_sta_id;
2633 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2635 /* flags + rate selection */
2637 switch (il->scan_band) {
2638 case IEEE80211_BAND_2GHZ:
2639 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2640 scan->tx_cmd.rate = RATE_1M_PLCP;
2641 band = IEEE80211_BAND_2GHZ;
2643 case IEEE80211_BAND_5GHZ:
2644 scan->tx_cmd.rate = RATE_6M_PLCP;
2645 band = IEEE80211_BAND_5GHZ;
2648 IL_WARN("Invalid scan band\n");
2653 * If active scaning is requested but a certain channel
2654 * is marked passive, we can do active scanning if we
2655 * detect transmissions.
2657 scan->good_CRC_th = is_active ? IL_GOOD_CRC_TH_DEFAULT :
2658 IL_GOOD_CRC_TH_DISABLED;
2660 len = il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
2661 vif->addr, il->scan_request->ie,
2662 il->scan_request->ie_len,
2663 IL_MAX_SCAN_SIZE - sizeof(*scan));
2664 scan->tx_cmd.len = cpu_to_le16(len);
2666 /* select Rx antennas */
2667 scan->flags |= il3945_get_antenna_flags(il);
2669 scan->channel_count = il3945_get_channels_for_scan(il, band, is_active, n_probes,
2670 (void *)&scan->data[len], vif);
2671 if (scan->channel_count == 0) {
2672 D_SCAN("channel count %d\n", scan->channel_count);
2676 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2677 scan->channel_count * sizeof(struct il3945_scan_channel);
2679 scan->len = cpu_to_le16(cmd.len);
2681 set_bit(S_SCAN_HW, &il->status);
2682 ret = il_send_cmd_sync(il, &cmd);
2684 clear_bit(S_SCAN_HW, &il->status);
2688 void il3945_post_scan(struct il_priv *il)
2690 struct il_rxon_context *ctx = &il->ctx;
2693 * Since setting the RXON may have been deferred while
2694 * performing the scan, fire one off if needed
2696 if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
2697 il3945_commit_rxon(il, ctx);
2700 static void il3945_bg_restart(struct work_struct *data)
2702 struct il_priv *il = container_of(data, struct il_priv, restart);
2704 if (test_bit(S_EXIT_PENDING, &il->status))
2707 if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
2708 mutex_lock(&il->mutex);
2711 mutex_unlock(&il->mutex);
2713 ieee80211_restart_hw(il->hw);
2717 mutex_lock(&il->mutex);
2718 if (test_bit(S_EXIT_PENDING, &il->status)) {
2719 mutex_unlock(&il->mutex);
2724 mutex_unlock(&il->mutex);
2728 static void il3945_bg_rx_replenish(struct work_struct *data)
2730 struct il_priv *il =
2731 container_of(data, struct il_priv, rx_replenish);
2733 mutex_lock(&il->mutex);
2734 if (test_bit(S_EXIT_PENDING, &il->status))
2737 il3945_rx_replenish(il);
2739 mutex_unlock(&il->mutex);
2742 void il3945_post_associate(struct il_priv *il)
2745 struct ieee80211_conf *conf = NULL;
2746 struct il_rxon_context *ctx = &il->ctx;
2748 if (!ctx->vif || !il->is_open)
2751 D_ASSOC("Associated as %d to: %pM\n",
2752 ctx->vif->bss_conf.aid, ctx->active.bssid_addr);
2754 if (test_bit(S_EXIT_PENDING, &il->status))
2757 il_scan_cancel_timeout(il, 200);
2759 conf = &il->hw->conf;
2761 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2762 il3945_commit_rxon(il, ctx);
2764 rc = il_send_rxon_timing(il, ctx);
2766 IL_WARN("C_RXON_TIMING failed - "
2767 "Attempting to continue.\n");
2769 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2771 ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
2773 D_ASSOC("assoc id %d beacon interval %d\n",
2774 ctx->vif->bss_conf.aid, ctx->vif->bss_conf.beacon_int);
2776 if (ctx->vif->bss_conf.use_short_preamble)
2777 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2779 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2781 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2782 if (ctx->vif->bss_conf.use_short_slot)
2783 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2785 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2788 il3945_commit_rxon(il, ctx);
2790 switch (ctx->vif->type) {
2791 case NL80211_IFTYPE_STATION:
2792 il3945_rate_scale_init(il->hw, IL_AP_ID);
2794 case NL80211_IFTYPE_ADHOC:
2795 il3945_send_beacon_cmd(il);
2798 IL_ERR("%s Should not be called in %d mode\n",
2799 __func__, ctx->vif->type);
2804 /*****************************************************************************
2806 * mac80211 entry point functions
2808 *****************************************************************************/
2810 #define UCODE_READY_TIMEOUT (2 * HZ)
2812 static int il3945_mac_start(struct ieee80211_hw *hw)
2814 struct il_priv *il = hw->priv;
2817 D_MAC80211("enter\n");
2819 /* we should be verifying the device is ready to be opened */
2820 mutex_lock(&il->mutex);
2822 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2823 * ucode filename and max sizes are card-specific. */
2825 if (!il->ucode_code.len) {
2826 ret = il3945_read_ucode(il);
2828 IL_ERR("Could not read microcode: %d\n", ret);
2829 mutex_unlock(&il->mutex);
2830 goto out_release_irq;
2834 ret = __il3945_up(il);
2836 mutex_unlock(&il->mutex);
2839 goto out_release_irq;
2841 D_INFO("Start UP work.\n");
2843 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
2844 * mac80211 will not be run successfully. */
2845 ret = wait_event_timeout(il->wait_command_queue,
2846 test_bit(S_READY, &il->status),
2847 UCODE_READY_TIMEOUT);
2849 if (!test_bit(S_READY, &il->status)) {
2851 "Wait for START_ALIVE timeout after %dms.\n",
2852 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2854 goto out_release_irq;
2858 /* ucode is running and will send rfkill notifications,
2859 * no need to poll the killswitch state anymore */
2860 cancel_delayed_work(&il->_3945.rfkill_poll);
2863 D_MAC80211("leave\n");
2868 D_MAC80211("leave - failed\n");
2872 static void il3945_mac_stop(struct ieee80211_hw *hw)
2874 struct il_priv *il = hw->priv;
2876 D_MAC80211("enter\n");
2879 D_MAC80211("leave - skip\n");
2887 flush_workqueue(il->workqueue);
2889 /* start polling the killswitch state again */
2890 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2891 round_jiffies_relative(2 * HZ));
2893 D_MAC80211("leave\n");
2896 static void il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2898 struct il_priv *il = hw->priv;
2900 D_MAC80211("enter\n");
2902 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2903 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2905 if (il3945_tx_skb(il, skb))
2906 dev_kfree_skb_any(skb);
2908 D_MAC80211("leave\n");
2911 void il3945_config_ap(struct il_priv *il)
2913 struct il_rxon_context *ctx = &il->ctx;
2914 struct ieee80211_vif *vif = ctx->vif;
2917 if (test_bit(S_EXIT_PENDING, &il->status))
2920 /* The following should be done only at AP bring up */
2921 if (!(il_is_associated(il))) {
2923 /* RXON - unassoc (to set timing command) */
2924 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2925 il3945_commit_rxon(il, ctx);
2928 rc = il_send_rxon_timing(il, ctx);
2930 IL_WARN("C_RXON_TIMING failed - "
2931 "Attempting to continue.\n");
2933 ctx->staging.assoc_id = 0;
2935 if (vif->bss_conf.use_short_preamble)
2936 ctx->staging.flags |=
2937 RXON_FLG_SHORT_PREAMBLE_MSK;
2939 ctx->staging.flags &=
2940 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2942 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2943 if (vif->bss_conf.use_short_slot)
2944 ctx->staging.flags |=
2945 RXON_FLG_SHORT_SLOT_MSK;
2947 ctx->staging.flags &=
2948 ~RXON_FLG_SHORT_SLOT_MSK;
2950 /* restore RXON assoc */
2951 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2952 il3945_commit_rxon(il, ctx);
2954 il3945_send_beacon_cmd(il);
2957 static int il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2958 struct ieee80211_vif *vif,
2959 struct ieee80211_sta *sta,
2960 struct ieee80211_key_conf *key)
2962 struct il_priv *il = hw->priv;
2964 u8 sta_id = IL_INVALID_STATION;
2967 D_MAC80211("enter\n");
2969 if (il3945_mod_params.sw_crypto) {
2970 D_MAC80211("leave - hwcrypto disabled\n");
2975 * To support IBSS RSN, don't program group keys in IBSS, the
2976 * hardware will then not attempt to decrypt the frames.
2978 if (vif->type == NL80211_IFTYPE_ADHOC &&
2979 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
2982 static_key = !il_is_associated(il);
2985 sta_id = il_sta_id_or_broadcast(
2987 if (sta_id == IL_INVALID_STATION)
2991 mutex_lock(&il->mutex);
2992 il_scan_cancel_timeout(il, 100);
2997 ret = il3945_set_static_key(il, key);
2999 ret = il3945_set_dynamic_key(il, key, sta_id);
3000 D_MAC80211("enable hwcrypto key\n");
3004 ret = il3945_remove_static_key(il);
3006 ret = il3945_clear_sta_key_info(il, sta_id);
3007 D_MAC80211("disable hwcrypto key\n");
3013 mutex_unlock(&il->mutex);
3014 D_MAC80211("leave\n");
3019 static int il3945_mac_sta_add(struct ieee80211_hw *hw,
3020 struct ieee80211_vif *vif,
3021 struct ieee80211_sta *sta)
3023 struct il_priv *il = hw->priv;
3024 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
3026 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3029 D_INFO("received request to add station %pM\n",
3031 mutex_lock(&il->mutex);
3032 D_INFO("proceeding to add station %pM\n",
3034 sta_priv->common.sta_id = IL_INVALID_STATION;
3037 ret = il_add_station_common(il,
3039 sta->addr, is_ap, sta, &sta_id);
3041 IL_ERR("Unable to add station %pM (%d)\n",
3043 /* Should we return success if return code is EEXIST ? */
3044 mutex_unlock(&il->mutex);
3048 sta_priv->common.sta_id = sta_id;
3050 /* Initialize rate scaling */
3051 D_INFO("Initializing rate scaling for station %pM\n",
3053 il3945_rs_rate_init(il, sta, sta_id);
3054 mutex_unlock(&il->mutex);
3059 static void il3945_configure_filter(struct ieee80211_hw *hw,
3060 unsigned int changed_flags,
3061 unsigned int *total_flags,
3064 struct il_priv *il = hw->priv;
3065 __le32 filter_or = 0, filter_nand = 0;
3066 struct il_rxon_context *ctx = &il->ctx;
3068 #define CHK(test, flag) do { \
3069 if (*total_flags & (test)) \
3070 filter_or |= (flag); \
3072 filter_nand |= (flag); \
3075 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
3076 changed_flags, *total_flags);
3078 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3079 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3080 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3084 mutex_lock(&il->mutex);
3086 ctx->staging.filter_flags &= ~filter_nand;
3087 ctx->staging.filter_flags |= filter_or;
3090 * Not committing directly because hardware can perform a scan,
3091 * but even if hw is ready, committing here breaks for some reason,
3092 * we'll eventually commit the filter flags change anyway.
3095 mutex_unlock(&il->mutex);
3098 * Receiving all multicast frames is always enabled by the
3099 * default flags setup in il_connection_init_rx_config()
3100 * since we currently do not support programming multicast
3101 * filters into the device.
3103 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3104 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3108 /*****************************************************************************
3112 *****************************************************************************/
3114 #ifdef CONFIG_IWLEGACY_DEBUG
3117 * The following adds a new attribute to the sysfs representation
3118 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3119 * used for controlling the debug level.
3121 * See the level definitions in iwl for details.
3123 * The debug_level being managed using sysfs below is a per device debug
3124 * level that is used instead of the global debug level if it (the per
3125 * device debug level) is set.
3127 static ssize_t il3945_show_debug_level(struct device *d,
3128 struct device_attribute *attr, char *buf)
3130 struct il_priv *il = dev_get_drvdata(d);
3131 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
3133 static ssize_t il3945_store_debug_level(struct device *d,
3134 struct device_attribute *attr,
3135 const char *buf, size_t count)
3137 struct il_priv *il = dev_get_drvdata(d);
3141 ret = strict_strtoul(buf, 0, &val);
3143 IL_INFO("%s is not in hex or decimal form.\n", buf);
3145 il->debug_level = val;
3146 if (il_alloc_traffic_mem(il))
3148 "Not enough memory to generate traffic log\n");
3150 return strnlen(buf, count);
3153 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3154 il3945_show_debug_level, il3945_store_debug_level);
3156 #endif /* CONFIG_IWLEGACY_DEBUG */
3158 static ssize_t il3945_show_temperature(struct device *d,
3159 struct device_attribute *attr, char *buf)
3161 struct il_priv *il = dev_get_drvdata(d);
3163 if (!il_is_alive(il))
3166 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
3169 static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
3171 static ssize_t il3945_show_tx_power(struct device *d,
3172 struct device_attribute *attr, char *buf)
3174 struct il_priv *il = dev_get_drvdata(d);
3175 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
3178 static ssize_t il3945_store_tx_power(struct device *d,
3179 struct device_attribute *attr,
3180 const char *buf, size_t count)
3182 struct il_priv *il = dev_get_drvdata(d);
3183 char *p = (char *)buf;
3186 val = simple_strtoul(p, &p, 10);
3188 IL_INFO(": %s is not in decimal form.\n", buf);
3190 il3945_hw_reg_set_txpower(il, val);
3195 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power, il3945_store_tx_power);
3197 static ssize_t il3945_show_flags(struct device *d,
3198 struct device_attribute *attr, char *buf)
3200 struct il_priv *il = dev_get_drvdata(d);
3201 struct il_rxon_context *ctx = &il->ctx;
3203 return sprintf(buf, "0x%04X\n", ctx->active.flags);
3206 static ssize_t il3945_store_flags(struct device *d,
3207 struct device_attribute *attr,
3208 const char *buf, size_t count)
3210 struct il_priv *il = dev_get_drvdata(d);
3211 u32 flags = simple_strtoul(buf, NULL, 0);
3212 struct il_rxon_context *ctx = &il->ctx;
3214 mutex_lock(&il->mutex);
3215 if (le32_to_cpu(ctx->staging.flags) != flags) {
3216 /* Cancel any currently running scans... */
3217 if (il_scan_cancel_timeout(il, 100))
3218 IL_WARN("Could not cancel scan.\n");
3220 D_INFO("Committing rxon.flags = 0x%04X\n",
3222 ctx->staging.flags = cpu_to_le32(flags);
3223 il3945_commit_rxon(il, ctx);
3226 mutex_unlock(&il->mutex);
3231 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags, il3945_store_flags);
3233 static ssize_t il3945_show_filter_flags(struct device *d,
3234 struct device_attribute *attr, char *buf)
3236 struct il_priv *il = dev_get_drvdata(d);
3237 struct il_rxon_context *ctx = &il->ctx;
3239 return sprintf(buf, "0x%04X\n",
3240 le32_to_cpu(ctx->active.filter_flags));
3243 static ssize_t il3945_store_filter_flags(struct device *d,
3244 struct device_attribute *attr,
3245 const char *buf, size_t count)
3247 struct il_priv *il = dev_get_drvdata(d);
3248 struct il_rxon_context *ctx = &il->ctx;
3249 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3251 mutex_lock(&il->mutex);
3252 if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
3253 /* Cancel any currently running scans... */
3254 if (il_scan_cancel_timeout(il, 100))
3255 IL_WARN("Could not cancel scan.\n");
3257 D_INFO("Committing rxon.filter_flags = "
3258 "0x%04X\n", filter_flags);
3259 ctx->staging.filter_flags =
3260 cpu_to_le32(filter_flags);
3261 il3945_commit_rxon(il, ctx);
3264 mutex_unlock(&il->mutex);
3269 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
3270 il3945_store_filter_flags);
3272 static ssize_t il3945_show_measurement(struct device *d,
3273 struct device_attribute *attr, char *buf)
3275 struct il_priv *il = dev_get_drvdata(d);
3276 struct il_spectrum_notification measure_report;
3277 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3278 u8 *data = (u8 *)&measure_report;
3279 unsigned long flags;
3281 spin_lock_irqsave(&il->lock, flags);
3282 if (!(il->measurement_status & MEASUREMENT_READY)) {
3283 spin_unlock_irqrestore(&il->lock, flags);
3286 memcpy(&measure_report, &il->measure_report, size);
3287 il->measurement_status = 0;
3288 spin_unlock_irqrestore(&il->lock, flags);
3290 while (size && PAGE_SIZE - len) {
3291 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3292 PAGE_SIZE - len, 1);
3294 if (PAGE_SIZE - len)
3298 size -= min(size, 16U);
3304 static ssize_t il3945_store_measurement(struct device *d,
3305 struct device_attribute *attr,
3306 const char *buf, size_t count)
3308 struct il_priv *il = dev_get_drvdata(d);
3309 struct il_rxon_context *ctx = &il->ctx;
3310 struct ieee80211_measurement_params params = {
3311 .channel = le16_to_cpu(ctx->active.channel),
3312 .start_time = cpu_to_le64(il->_3945.last_tsf),
3313 .duration = cpu_to_le16(1),
3315 u8 type = IL_MEASURE_BASIC;
3321 strncpy(buffer, buf, min(sizeof(buffer), count));
3322 channel = simple_strtoul(p, NULL, 0);
3324 params.channel = channel;
3327 while (*p && *p != ' ')
3330 type = simple_strtoul(p + 1, NULL, 0);
3333 D_INFO("Invoking measurement of type %d on "
3334 "channel %d (for '%s')\n", type, params.channel, buf);
3335 il3945_get_measurement(il, ¶ms, type);
3340 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3341 il3945_show_measurement, il3945_store_measurement);
3343 static ssize_t il3945_store_retry_rate(struct device *d,
3344 struct device_attribute *attr,
3345 const char *buf, size_t count)
3347 struct il_priv *il = dev_get_drvdata(d);
3349 il->retry_rate = simple_strtoul(buf, NULL, 0);
3350 if (il->retry_rate <= 0)
3356 static ssize_t il3945_show_retry_rate(struct device *d,
3357 struct device_attribute *attr, char *buf)
3359 struct il_priv *il = dev_get_drvdata(d);
3360 return sprintf(buf, "%d", il->retry_rate);
3363 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
3364 il3945_store_retry_rate);
3367 static ssize_t il3945_show_channels(struct device *d,
3368 struct device_attribute *attr, char *buf)
3370 /* all this shit doesn't belong into sysfs anyway */
3374 static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
3376 static ssize_t il3945_show_antenna(struct device *d,
3377 struct device_attribute *attr, char *buf)
3379 struct il_priv *il = dev_get_drvdata(d);
3381 if (!il_is_alive(il))
3384 return sprintf(buf, "%d\n", il3945_mod_params.antenna);
3387 static ssize_t il3945_store_antenna(struct device *d,
3388 struct device_attribute *attr,
3389 const char *buf, size_t count)
3391 struct il_priv *il __maybe_unused = dev_get_drvdata(d);
3397 if (sscanf(buf, "%1i", &ant) != 1) {
3398 D_INFO("not in hex or decimal form.\n");
3402 if (ant >= 0 && ant <= 2) {
3403 D_INFO("Setting antenna select to %d.\n", ant);
3404 il3945_mod_params.antenna = (enum il3945_antenna)ant;
3406 D_INFO("Bad antenna select value %d.\n", ant);
3412 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna, il3945_store_antenna);
3414 static ssize_t il3945_show_status(struct device *d,
3415 struct device_attribute *attr, char *buf)
3417 struct il_priv *il = dev_get_drvdata(d);
3418 if (!il_is_alive(il))
3420 return sprintf(buf, "0x%08x\n", (int)il->status);
3423 static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
3425 static ssize_t il3945_dump_error_log(struct device *d,
3426 struct device_attribute *attr,
3427 const char *buf, size_t count)
3429 struct il_priv *il = dev_get_drvdata(d);
3430 char *p = (char *)buf;
3433 il3945_dump_nic_error_log(il);
3435 return strnlen(buf, count);
3438 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
3440 /*****************************************************************************
3442 * driver setup and tear down
3444 *****************************************************************************/
3446 static void il3945_setup_deferred_work(struct il_priv *il)
3448 il->workqueue = create_singlethread_workqueue(DRV_NAME);
3450 init_waitqueue_head(&il->wait_command_queue);
3452 INIT_WORK(&il->restart, il3945_bg_restart);
3453 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
3454 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
3455 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
3456 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
3458 il_setup_scan_deferred_work(il);
3460 il3945_hw_setup_deferred_work(il);
3462 init_timer(&il->watchdog);
3463 il->watchdog.data = (unsigned long)il;
3464 il->watchdog.function = il_bg_watchdog;
3466 tasklet_init(&il->irq_tasklet, (void (*)(unsigned long))
3467 il3945_irq_tasklet, (unsigned long)il);
3470 static void il3945_cancel_deferred_work(struct il_priv *il)
3472 il3945_hw_cancel_deferred_work(il);
3474 cancel_delayed_work_sync(&il->init_alive_start);
3475 cancel_delayed_work(&il->alive_start);
3477 il_cancel_scan_deferred_work(il);
3480 static struct attribute *il3945_sysfs_entries[] = {
3481 &dev_attr_antenna.attr,
3482 &dev_attr_channels.attr,
3483 &dev_attr_dump_errors.attr,
3484 &dev_attr_flags.attr,
3485 &dev_attr_filter_flags.attr,
3486 &dev_attr_measurement.attr,
3487 &dev_attr_retry_rate.attr,
3488 &dev_attr_status.attr,
3489 &dev_attr_temperature.attr,
3490 &dev_attr_tx_power.attr,
3491 #ifdef CONFIG_IWLEGACY_DEBUG
3492 &dev_attr_debug_level.attr,
3497 static struct attribute_group il3945_attribute_group = {
3498 .name = NULL, /* put in device directory */
3499 .attrs = il3945_sysfs_entries,
3502 struct ieee80211_ops il3945_hw_ops = {
3503 .tx = il3945_mac_tx,
3504 .start = il3945_mac_start,
3505 .stop = il3945_mac_stop,
3506 .add_interface = il_mac_add_interface,
3507 .remove_interface = il_mac_remove_interface,
3508 .change_interface = il_mac_change_interface,
3509 .config = il_mac_config,
3510 .configure_filter = il3945_configure_filter,
3511 .set_key = il3945_mac_set_key,
3512 .conf_tx = il_mac_conf_tx,
3513 .reset_tsf = il_mac_reset_tsf,
3514 .bss_info_changed = il_mac_bss_info_changed,
3515 .hw_scan = il_mac_hw_scan,
3516 .sta_add = il3945_mac_sta_add,
3517 .sta_remove = il_mac_sta_remove,
3518 .tx_last_beacon = il_mac_tx_last_beacon,
3521 static int il3945_init_drv(struct il_priv *il)
3524 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
3527 il->beacon_skb = NULL;
3529 spin_lock_init(&il->sta_lock);
3530 spin_lock_init(&il->hcmd_lock);
3532 INIT_LIST_HEAD(&il->free_frames);
3534 mutex_init(&il->mutex);
3536 il->ieee_channels = NULL;
3537 il->ieee_rates = NULL;
3538 il->band = IEEE80211_BAND_2GHZ;
3540 il->iw_mode = NL80211_IFTYPE_STATION;
3541 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
3543 /* initialize force reset */
3544 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
3546 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3547 IL_WARN("Unsupported EEPROM version: 0x%04X\n",
3552 ret = il_init_channel_map(il);
3554 IL_ERR("initializing regulatory failed: %d\n", ret);
3558 /* Set up txpower settings in driver for all channels */
3559 if (il3945_txpower_set_from_eeprom(il)) {
3561 goto err_free_channel_map;
3564 ret = il_init_geos(il);
3566 IL_ERR("initializing geos failed: %d\n", ret);
3567 goto err_free_channel_map;
3569 il3945_init_hw_rates(il, il->ieee_rates);
3573 err_free_channel_map:
3574 il_free_channel_map(il);
3579 #define IL3945_MAX_PROBE_REQUEST 200
3581 static int il3945_setup_mac(struct il_priv *il)
3584 struct ieee80211_hw *hw = il->hw;
3586 hw->rate_control_algorithm = "iwl-3945-rs";
3587 hw->sta_data_size = sizeof(struct il3945_sta_priv);
3588 hw->vif_data_size = sizeof(struct il_vif_priv);
3590 /* Tell mac80211 our characteristics */
3591 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3592 IEEE80211_HW_SPECTRUM_MGMT;
3594 hw->wiphy->interface_modes =
3595 il->ctx.interface_modes;
3597 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3598 WIPHY_FLAG_DISABLE_BEACON_HINTS |
3599 WIPHY_FLAG_IBSS_RSN;
3601 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3602 /* we create the 802.11 header and a zero-length SSID element */
3603 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
3605 /* Default value; 4 EDCA QOS priorities */
3608 if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
3609 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3610 &il->bands[IEEE80211_BAND_2GHZ];
3612 if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
3613 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3614 &il->bands[IEEE80211_BAND_5GHZ];
3618 ret = ieee80211_register_hw(il->hw);
3620 IL_ERR("Failed to register hw (error %d)\n", ret);
3623 il->mac80211_registered = 1;
3628 static int il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3632 struct ieee80211_hw *hw;
3633 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
3634 struct il3945_eeprom *eeprom;
3635 unsigned long flags;
3637 /***********************
3638 * 1. Allocating HW data
3639 * ********************/
3641 /* mac80211 allocates memory for this device instance, including
3642 * space for this driver's ilate structure */
3643 hw = il_alloc_all(cfg);
3645 pr_err("Can not allocate network device\n");
3650 SET_IEEE80211_DEV(hw, &pdev->dev);
3652 il->cmd_queue = IL39_CMD_QUEUE_NUM;
3656 il->ctx.rxon_cmd = C_RXON;
3657 il->ctx.rxon_timing_cmd = C_RXON_TIMING;
3658 il->ctx.rxon_assoc_cmd = C_RXON_ASSOC;
3659 il->ctx.qos_cmd = C_QOS_PARAM;
3660 il->ctx.ap_sta_id = IL_AP_ID;
3661 il->ctx.wep_key_cmd = C_WEPKEY;
3662 il->ctx.interface_modes =
3663 BIT(NL80211_IFTYPE_STATION) |
3664 BIT(NL80211_IFTYPE_ADHOC);
3665 il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS;
3666 il->ctx.station_devtype = RXON_DEV_TYPE_ESS;
3667 il->ctx.unused_devtype = RXON_DEV_TYPE_ESS;
3670 * Disabling hardware scan means that mac80211 will perform scans
3671 * "the hard way", rather than using device's scan.
3673 if (il3945_mod_params.disable_hw_scan) {
3674 D_INFO("Disabling hw_scan\n");
3675 il3945_hw_ops.hw_scan = NULL;
3678 D_INFO("*** LOAD DRIVER ***\n");
3681 il->inta_mask = CSR_INI_SET_MASK;
3683 if (il_alloc_traffic_mem(il))
3684 IL_ERR("Not enough memory to generate traffic log\n");
3686 /***************************
3687 * 2. Initializing PCI bus
3688 * *************************/
3689 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3690 PCIE_LINK_STATE_CLKPM);
3692 if (pci_enable_device(pdev)) {
3694 goto out_ieee80211_free_hw;
3697 pci_set_master(pdev);
3699 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3701 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3703 IL_WARN("No suitable DMA available.\n");
3704 goto out_pci_disable_device;
3707 pci_set_drvdata(pdev, il);
3708 err = pci_request_regions(pdev, DRV_NAME);
3710 goto out_pci_disable_device;
3712 /***********************
3713 * 3. Read REV Register
3714 * ********************/
3715 il->hw_base = pci_iomap(pdev, 0, 0);
3718 goto out_pci_release_regions;
3721 D_INFO("pci_resource_len = 0x%08llx\n",
3722 (unsigned long long) pci_resource_len(pdev, 0));
3723 D_INFO("pci_resource_base = %p\n", il->hw_base);
3725 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3726 * PCI Tx retries from interfering with C3 CPU state */
3727 pci_write_config_byte(pdev, 0x41, 0x00);
3729 /* these spin locks will be used in apm_ops.init and EEPROM access
3730 * we should init now
3732 spin_lock_init(&il->reg_lock);
3733 spin_lock_init(&il->lock);
3736 * stop and reset the on-board processor just in case it is in a
3737 * strange state ... like being left stranded by a primary kernel
3738 * and this is now the kdump kernel trying to start up
3740 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3742 /***********************
3744 * ********************/
3746 /* Read the EEPROM */
3747 err = il_eeprom_init(il);
3749 IL_ERR("Unable to init EEPROM\n");
3752 /* MAC Address location in EEPROM same for 3945/4965 */
3753 eeprom = (struct il3945_eeprom *)il->eeprom;
3754 D_INFO("MAC address: %pM\n", eeprom->mac_address);
3755 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
3757 /***********************
3758 * 5. Setup HW Constants
3759 * ********************/
3760 /* Device-specific setup */
3761 if (il3945_hw_set_hw_params(il)) {
3762 IL_ERR("failed to set hw settings\n");
3763 goto out_eeprom_free;
3766 /***********************
3768 * ********************/
3770 err = il3945_init_drv(il);
3772 IL_ERR("initializing driver failed\n");
3773 goto out_unset_hw_params;
3776 IL_INFO("Detected Intel Wireless WiFi Link %s\n",
3779 /***********************
3781 * ********************/
3783 spin_lock_irqsave(&il->lock, flags);
3784 il_disable_interrupts(il);
3785 spin_unlock_irqrestore(&il->lock, flags);
3787 pci_enable_msi(il->pci_dev);
3789 err = request_irq(il->pci_dev->irq, il_isr,
3790 IRQF_SHARED, DRV_NAME, il);
3792 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
3793 goto out_disable_msi;
3796 err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
3798 IL_ERR("failed to create sysfs device attributes\n");
3799 goto out_release_irq;
3802 il_set_rxon_channel(il,
3803 &il->bands[IEEE80211_BAND_2GHZ].channels[5],
3805 il3945_setup_deferred_work(il);
3806 il3945_setup_handlers(il);
3807 il_power_initialize(il);
3809 /*********************************
3810 * 8. Setup and Register mac80211
3811 * *******************************/
3813 il_enable_interrupts(il);
3815 err = il3945_setup_mac(il);
3817 goto out_remove_sysfs;
3819 err = il_dbgfs_register(il, DRV_NAME);
3821 IL_ERR("failed to create debugfs files. Ignoring error: %d\n", err);
3823 /* Start monitoring the killswitch */
3824 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
3830 destroy_workqueue(il->workqueue);
3831 il->workqueue = NULL;
3832 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3834 free_irq(il->pci_dev->irq, il);
3836 pci_disable_msi(il->pci_dev);
3838 il_free_channel_map(il);
3839 out_unset_hw_params:
3840 il3945_unset_hw_params(il);
3844 pci_iounmap(pdev, il->hw_base);
3845 out_pci_release_regions:
3846 pci_release_regions(pdev);
3847 out_pci_disable_device:
3848 pci_set_drvdata(pdev, NULL);
3849 pci_disable_device(pdev);
3850 out_ieee80211_free_hw:
3851 il_free_traffic_mem(il);
3852 ieee80211_free_hw(il->hw);
3857 static void __devexit il3945_pci_remove(struct pci_dev *pdev)
3859 struct il_priv *il = pci_get_drvdata(pdev);
3860 unsigned long flags;
3865 D_INFO("*** UNLOAD DRIVER ***\n");
3867 il_dbgfs_unregister(il);
3869 set_bit(S_EXIT_PENDING, &il->status);
3873 if (il->mac80211_registered) {
3874 ieee80211_unregister_hw(il->hw);
3875 il->mac80211_registered = 0;
3881 * Make sure device is reset to low power before unloading driver.
3882 * This may be redundant with il_down(), but there are paths to
3883 * run il_down() without calling apm_ops.stop(), and there are
3884 * paths to avoid running il_down() at all before leaving driver.
3885 * This (inexpensive) call *makes sure* device is reset.
3889 /* make sure we flush any pending irq or
3890 * tasklet for the driver
3892 spin_lock_irqsave(&il->lock, flags);
3893 il_disable_interrupts(il);
3894 spin_unlock_irqrestore(&il->lock, flags);
3896 il3945_synchronize_irq(il);
3898 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3900 cancel_delayed_work_sync(&il->_3945.rfkill_poll);
3902 il3945_dealloc_ucode_pci(il);
3905 il3945_rx_queue_free(il, &il->rxq);
3906 il3945_hw_txq_ctx_free(il);
3908 il3945_unset_hw_params(il);
3910 /*netif_stop_queue(dev); */
3911 flush_workqueue(il->workqueue);
3913 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
3914 * il->workqueue... so we can't take down the workqueue
3916 destroy_workqueue(il->workqueue);
3917 il->workqueue = NULL;
3918 il_free_traffic_mem(il);
3920 free_irq(pdev->irq, il);
3921 pci_disable_msi(pdev);
3923 pci_iounmap(pdev, il->hw_base);
3924 pci_release_regions(pdev);
3925 pci_disable_device(pdev);
3926 pci_set_drvdata(pdev, NULL);
3928 il_free_channel_map(il);
3930 kfree(il->scan_cmd);
3932 dev_kfree_skb(il->beacon_skb);
3934 ieee80211_free_hw(il->hw);
3938 /*****************************************************************************
3940 * driver and module entry point
3942 *****************************************************************************/
3944 static struct pci_driver il3945_driver = {
3946 .id_table = il3945_hw_card_ids,
3947 .probe = il3945_pci_probe,
3948 .remove = __devexit_p(il3945_pci_remove),
3949 .driver.pm = IL_LEGACY_PM_OPS,
3952 static int __init il3945_init(void)
3956 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3957 pr_info(DRV_COPYRIGHT "\n");
3959 ret = il3945_rate_control_register();
3961 pr_err("Unable to register rate control algorithm: %d\n", ret);
3965 ret = pci_register_driver(&il3945_driver);
3967 pr_err("Unable to initialize PCI module\n");
3968 goto error_register;
3974 il3945_rate_control_unregister();
3978 static void __exit il3945_exit(void)
3980 pci_unregister_driver(&il3945_driver);
3981 il3945_rate_control_unregister();
3984 MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
3986 module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
3987 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3988 module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
3989 MODULE_PARM_DESC(swcrypto,
3990 "using software crypto (default 1 [software])");
3991 module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan,
3993 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
3994 #ifdef CONFIG_IWLEGACY_DEBUG
3995 module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
3996 MODULE_PARM_DESC(debug, "debug output mask");
3998 module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
3999 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4001 module_exit(il3945_exit);
4002 module_init(il3945_init);