drivers/net/wireless/iwlegacy/3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/slab.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/sched.h>
  35 #include <linux/skbuff.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/firmware.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40 #include <net/mac80211.h>
  41
  42 #include "common.h"
  43 #include "commands.h"
  44 #include "iwl-eeprom.h"
  45 #include "iwl-led.h"
  46 #include "3945.h"
  47
  48 /* Send led command */
  49 static int il3945_send_led_cmd(struct il_priv *il,
  50                                 struct il_led_cmd *led_cmd)
  51 {
  52         struct il_host_cmd cmd = {
  53                 .id = C_LEDS,
  54                 .len = sizeof(struct il_led_cmd),
  55                 .data = led_cmd,
  56                 .flags = CMD_ASYNC,
  57                 .callback = NULL,
  58         };
  59
  60         return il_send_cmd(il, &cmd);
  61 }
  62
  63 const struct il_led_ops il3945_led_ops = {
  64         .cmd = il3945_send_led_cmd,
  65 };
  66
  67 #define IL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  68         [RATE_##r##M_IDX] = { RATE_##r##M_PLCP,   \
  69                                     RATE_##r##M_IEEE,   \
  70                                     RATE_##ip##M_IDX, \
  71                                     RATE_##in##M_IDX, \
  72                                     RATE_##rp##M_IDX, \
  73                                     RATE_##rn##M_IDX, \
  74                                     RATE_##pp##M_IDX, \
  75                                     RATE_##np##M_IDX, \
  76                                     RATE_##r##M_IDX_TBL, \
  77                                     RATE_##ip##M_IDX_TBL }
  78
  79 /*
  80  * Parameter order:
  81  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  82  *
  83  * If there isn't a valid next or previous rate then INV is used which
  84  * maps to RATE_INVALID
  85  *
  86  */
  87 const struct il3945_rate_info il3945_rates[RATE_COUNT_3945] = {
  88         IL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  89         IL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  90         IL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  91         IL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  92         IL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  93         IL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  94         IL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  95         IL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  96         IL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  97         IL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  98         IL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  99         IL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
 100 };
 101
 102 static inline u8 il3945_get_prev_ieee_rate(u8 rate_idx)
 103 {
 104         u8 rate = il3945_rates[rate_idx].prev_ieee;
 105
 106         if (rate == RATE_INVALID)
 107                 rate = rate_idx;
 108         return rate;
 109 }
 110
 111 /* 1 = enable the il3945_disable_events() function */
 112 #define IL_EVT_DISABLE (0)
 113 #define IL_EVT_DISABLE_SIZE (1532/32)
 114
 115 /**
 116  * il3945_disable_events - Disable selected events in uCode event log
 117  *
 118  * Disable an event by writing "1"s into "disable"
 119  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
 120  *   Default values of 0 enable uCode events to be logged.
 121  * Use for only special debugging.  This function is just a placeholder as-is,
 122  *   you'll need to provide the special bits! ...
 123  *   ... and set IL_EVT_DISABLE to 1. */
 124 void il3945_disable_events(struct il_priv *il)
 125 {
 126         int i;
 127         u32 base;               /* SRAM address of event log header */
 128         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 129         u32 array_size;         /* # of u32 entries in array */
 130         static const u32 evt_disable[IL_EVT_DISABLE_SIZE] = {
 131                 0x00000000,     /*   31 -    0  Event id numbers */
 132                 0x00000000,     /*   63 -   32 */
 133                 0x00000000,     /*   95 -   64 */
 134                 0x00000000,     /*  127 -   96 */
 135                 0x00000000,     /*  159 -  128 */
 136                 0x00000000,     /*  191 -  160 */
 137                 0x00000000,     /*  223 -  192 */
 138                 0x00000000,     /*  255 -  224 */
 139                 0x00000000,     /*  287 -  256 */
 140                 0x00000000,     /*  319 -  288 */
 141                 0x00000000,     /*  351 -  320 */
 142                 0x00000000,     /*  383 -  352 */
 143                 0x00000000,     /*  415 -  384 */
 144                 0x00000000,     /*  447 -  416 */
 145                 0x00000000,     /*  479 -  448 */
 146                 0x00000000,     /*  511 -  480 */
 147                 0x00000000,     /*  543 -  512 */
 148                 0x00000000,     /*  575 -  544 */
 149                 0x00000000,     /*  607 -  576 */
 150                 0x00000000,     /*  639 -  608 */
 151                 0x00000000,     /*  671 -  640 */
 152                 0x00000000,     /*  703 -  672 */
 153                 0x00000000,     /*  735 -  704 */
 154                 0x00000000,     /*  767 -  736 */
 155                 0x00000000,     /*  799 -  768 */
 156                 0x00000000,     /*  831 -  800 */
 157                 0x00000000,     /*  863 -  832 */
 158                 0x00000000,     /*  895 -  864 */
 159                 0x00000000,     /*  927 -  896 */
 160                 0x00000000,     /*  959 -  928 */
 161                 0x00000000,     /*  991 -  960 */
 162                 0x00000000,     /* 1023 -  992 */
 163                 0x00000000,     /* 1055 - 1024 */
 164                 0x00000000,     /* 1087 - 1056 */
 165                 0x00000000,     /* 1119 - 1088 */
 166                 0x00000000,     /* 1151 - 1120 */
 167                 0x00000000,     /* 1183 - 1152 */
 168                 0x00000000,     /* 1215 - 1184 */
 169                 0x00000000,     /* 1247 - 1216 */
 170                 0x00000000,     /* 1279 - 1248 */
 171                 0x00000000,     /* 1311 - 1280 */
 172                 0x00000000,     /* 1343 - 1312 */
 173                 0x00000000,     /* 1375 - 1344 */
 174                 0x00000000,     /* 1407 - 1376 */
 175                 0x00000000,     /* 1439 - 1408 */
 176                 0x00000000,     /* 1471 - 1440 */
 177                 0x00000000,     /* 1503 - 1472 */
 178         };
 179
 180         base = le32_to_cpu(il->card_alive.log_event_table_ptr);
 181         if (!il3945_hw_valid_rtc_data_addr(base)) {
 182                 IL_ERR("Invalid event log pointer 0x%08X\n", base);
 183                 return;
 184         }
 185
 186         disable_ptr = il_read_targ_mem(il, base + (4 * sizeof(u32)));
 187         array_size = il_read_targ_mem(il, base + (5 * sizeof(u32)));
 188
 189         if (IL_EVT_DISABLE && array_size == IL_EVT_DISABLE_SIZE) {
 190                 D_INFO("Disabling selected uCode log events at 0x%x\n",
 191                                disable_ptr);
 192                 for (i = 0; i < IL_EVT_DISABLE_SIZE; i++)
 193                         il_write_targ_mem(il,
 194                                            disable_ptr + (i * sizeof(u32)),
 195                                            evt_disable[i]);
 196
 197         } else {
 198                 D_INFO("Selected uCode log events may be disabled\n");
 199                 D_INFO("  by writing \"1\"s into disable bitmap\n");
 200                 D_INFO("  in SRAM at 0x%x, size %d u32s\n",
 201                                disable_ptr, array_size);
 202         }
 203
 204 }
 205
 206 static int il3945_hwrate_to_plcp_idx(u8 plcp)
 207 {
 208         int idx;
 209
 210         for (idx = 0; idx < RATE_COUNT_3945; idx++)
 211                 if (il3945_rates[idx].plcp == plcp)
 212                         return idx;
 213         return -1;
 214 }
 215
 216 #ifdef CONFIG_IWLEGACY_DEBUG
 217 #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x
 218
 219 static const char *il3945_get_tx_fail_reason(u32 status)
 220 {
 221         switch (status & TX_STATUS_MSK) {
 222         case TX_3945_STATUS_SUCCESS:
 223                 return "SUCCESS";
 224                 TX_STATUS_ENTRY(SHORT_LIMIT);
 225                 TX_STATUS_ENTRY(LONG_LIMIT);
 226                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 227                 TX_STATUS_ENTRY(MGMNT_ABORT);
 228                 TX_STATUS_ENTRY(NEXT_FRAG);
 229                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 230                 TX_STATUS_ENTRY(DEST_PS);
 231                 TX_STATUS_ENTRY(ABORTED);
 232                 TX_STATUS_ENTRY(BT_RETRY);
 233                 TX_STATUS_ENTRY(STA_INVALID);
 234                 TX_STATUS_ENTRY(FRAG_DROPPED);
 235                 TX_STATUS_ENTRY(TID_DISABLE);
 236                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 237                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 238                 TX_STATUS_ENTRY(TX_LOCKED);
 239                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 240         }
 241
 242         return "UNKNOWN";
 243 }
 244 #else
 245 static inline const char *il3945_get_tx_fail_reason(u32 status)
 246 {
 247         return "";
 248 }
 249 #endif
 250
 251 /*
 252  * get ieee prev rate from rate scale table.
 253  * for A and B mode we need to overright prev
 254  * value
 255  */
 256 int il3945_rs_next_rate(struct il_priv *il, int rate)
 257 {
 258         int next_rate = il3945_get_prev_ieee_rate(rate);
 259
 260         switch (il->band) {
 261         case IEEE80211_BAND_5GHZ:
 262                 if (rate == RATE_12M_IDX)
 263                         next_rate = RATE_9M_IDX;
 264                 else if (rate == RATE_6M_IDX)
 265                         next_rate = RATE_6M_IDX;
 266                 break;
 267         case IEEE80211_BAND_2GHZ:
 268                 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) &&
 269                     il_is_associated(il)) {
 270                         if (rate == RATE_11M_IDX)
 271                                 next_rate = RATE_5M_IDX;
 272                 }
 273                 break;
 274
 275         default:
 276                 break;
 277         }
 278
 279         return next_rate;
 280 }
 281
 282
 283 /**
 284  * il3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 285  *
 286  * When FW advances 'R' idx, all entries between old and new 'R' idx
 287  * need to be reclaimed. As result, some free space forms. If there is
 288  * enough free space (> low mark), wake the stack that feeds us.
 289  */
 290 static void il3945_tx_queue_reclaim(struct il_priv *il,
 291                                      int txq_id, int idx)
 292 {
 293         struct il_tx_queue *txq = &il->txq[txq_id];
 294         struct il_queue *q = &txq->q;
 295         struct il_tx_info *tx_info;
 296
 297         BUG_ON(txq_id == IL39_CMD_QUEUE_NUM);
 298
 299         for (idx = il_queue_inc_wrap(idx, q->n_bd);
 300                 q->read_ptr != idx;
 301                 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 302
 303                 tx_info = &txq->txb[txq->q.read_ptr];
 304                 ieee80211_tx_status_irqsafe(il->hw, tx_info->skb);
 305                 tx_info->skb = NULL;
 306                 il->cfg->ops->lib->txq_free_tfd(il, txq);
 307         }
 308
 309         if (il_queue_space(q) > q->low_mark && txq_id >= 0 &&
 310             txq_id != IL39_CMD_QUEUE_NUM && il->mac80211_registered)
 311                 il_wake_queue(il, txq);
 312 }
 313
 314 /**
 315  * il3945_hdl_tx - Handle Tx response
 316  */
 317 static void il3945_hdl_tx(struct il_priv *il,
 318                                 struct il_rx_buf *rxb)
 319 {
 320         struct il_rx_pkt *pkt = rxb_addr(rxb);
 321         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 322         int txq_id = SEQ_TO_QUEUE(sequence);
 323         int idx = SEQ_TO_IDX(sequence);
 324         struct il_tx_queue *txq = &il->txq[txq_id];
 325         struct ieee80211_tx_info *info;
 326         struct il3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 327         u32  status = le32_to_cpu(tx_resp->status);
 328         int rate_idx;
 329         int fail;
 330
 331         if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
 332                 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
 333                           "is out of range [0-%d] %d %d\n", txq_id,
 334                           idx, txq->q.n_bd, txq->q.write_ptr,
 335                           txq->q.read_ptr);
 336                 return;
 337         }
 338
 339         txq->time_stamp = jiffies;
 340         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
 341         ieee80211_tx_info_clear_status(info);
 342
 343         /* Fill the MRR chain with some info about on-chip retransmissions */
 344         rate_idx = il3945_hwrate_to_plcp_idx(tx_resp->rate);
 345         if (info->band == IEEE80211_BAND_5GHZ)
 346                 rate_idx -= IL_FIRST_OFDM_RATE;
 347
 348         fail = tx_resp->failure_frame;
 349
 350         info->status.rates[0].idx = rate_idx;
 351         info->status.rates[0].count = fail + 1; /* add final attempt */
 352
 353         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 354         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 355                                 IEEE80211_TX_STAT_ACK : 0;
 356
 357         D_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 358                         txq_id, il3945_get_tx_fail_reason(status), status,
 359                         tx_resp->rate, tx_resp->failure_frame);
 360
 361         D_TX_REPLY("Tx queue reclaim %d\n", idx);
 362         il3945_tx_queue_reclaim(il, txq_id, idx);
 363
 364         if (status & TX_ABORT_REQUIRED_MSK)
 365                 IL_ERR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 366 }
 367
 368
 369
 370 /*****************************************************************************
 371  *
 372  * Intel PRO/Wireless 3945ABG/BG Network Connection
 373  *
 374  *  RX handler implementations
 375  *
 376  *****************************************************************************/
 377 #ifdef CONFIG_IWLEGACY_DEBUGFS
 378 static void il3945_accumulative_stats(struct il_priv *il,
 379                                             __le32 *stats)
 380 {
 381         int i;
 382         __le32 *prev_stats;
 383         u32 *accum_stats;
 384         u32 *delta, *max_delta;
 385
 386         prev_stats = (__le32 *)&il->_3945.stats;
 387         accum_stats = (u32 *)&il->_3945.accum_stats;
 388         delta = (u32 *)&il->_3945.delta_stats;
 389         max_delta = (u32 *)&il->_3945.max_delta;
 390
 391         for (i = sizeof(__le32); i < sizeof(struct il3945_notif_stats);
 392              i += sizeof(__le32), stats++, prev_stats++, delta++,
 393              max_delta++, accum_stats++) {
 394                 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
 395                         *delta = (le32_to_cpu(*stats) -
 396                                 le32_to_cpu(*prev_stats));
 397                         *accum_stats += *delta;
 398                         if (*delta > *max_delta)
 399                                 *max_delta = *delta;
 400                 }
 401         }
 402
 403         /* reset accumulative stats for "no-counter" type stats */
 404         il->_3945.accum_stats.general.temperature =
 405                 il->_3945.stats.general.temperature;
 406         il->_3945.accum_stats.general.ttl_timestamp =
 407                 il->_3945.stats.general.ttl_timestamp;
 408 }
 409 #endif
 410
 411 void il3945_hdl_stats(struct il_priv *il,
 412                 struct il_rx_buf *rxb)
 413 {
 414         struct il_rx_pkt *pkt = rxb_addr(rxb);
 415
 416         D_RX("Statistics notification received (%d vs %d).\n",
 417                      (int)sizeof(struct il3945_notif_stats),
 418                      le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK);
 419 #ifdef CONFIG_IWLEGACY_DEBUGFS
 420         il3945_accumulative_stats(il, (__le32 *)&pkt->u.raw);
 421 #endif
 422
 423         memcpy(&il->_3945.stats, pkt->u.raw, sizeof(il->_3945.stats));
 424 }
 425
 426 void il3945_hdl_c_stats(struct il_priv *il,
 427                               struct il_rx_buf *rxb)
 428 {
 429         struct il_rx_pkt *pkt = rxb_addr(rxb);
 430         __le32 *flag = (__le32 *)&pkt->u.raw;
 431
 432         if (le32_to_cpu(*flag) & UCODE_STATS_CLEAR_MSK) {
 433 #ifdef CONFIG_IWLEGACY_DEBUGFS
 434                 memset(&il->_3945.accum_stats, 0,
 435                         sizeof(struct il3945_notif_stats));
 436                 memset(&il->_3945.delta_stats, 0,
 437                         sizeof(struct il3945_notif_stats));
 438                 memset(&il->_3945.max_delta, 0,
 439                         sizeof(struct il3945_notif_stats));
 440 #endif
 441                 D_RX("Statistics have been cleared\n");
 442         }
 443         il3945_hdl_stats(il, rxb);
 444 }
 445
 446
 447 /******************************************************************************
 448  *
 449  * Misc. internal state and helper functions
 450  *
 451  ******************************************************************************/
 452
 453 /* This is necessary only for a number of stats, see the caller. */
 454 static int il3945_is_network_packet(struct il_priv *il,
 455                 struct ieee80211_hdr *header)
 456 {
 457         /* Filter incoming packets to determine if they are targeted toward
 458          * this network, discarding packets coming from ourselves */
 459         switch (il->iw_mode) {
 460         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 461                 /* packets to our IBSS update information */
 462                 return !compare_ether_addr(header->addr3, il->bssid);
 463         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 464                 /* packets to our IBSS update information */
 465                 return !compare_ether_addr(header->addr2, il->bssid);
 466         default:
 467                 return 1;
 468         }
 469 }
 470
 471 static void il3945_pass_packet_to_mac80211(struct il_priv *il,
 472                                    struct il_rx_buf *rxb,
 473                                    struct ieee80211_rx_status *stats)
 474 {
 475         struct il_rx_pkt *pkt = rxb_addr(rxb);
 476         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IL_RX_DATA(pkt);
 477         struct il3945_rx_frame_hdr *rx_hdr = IL_RX_HDR(pkt);
 478         struct il3945_rx_frame_end *rx_end = IL_RX_END(pkt);
 479         u16 len = le16_to_cpu(rx_hdr->len);
 480         struct sk_buff *skb;
 481         __le16 fc = hdr->frame_control;
 482
 483         /* We received data from the HW, so stop the watchdog */
 484         if (unlikely(len + IL39_RX_FRAME_SIZE >
 485                      PAGE_SIZE << il->hw_params.rx_page_order)) {
 486                 D_DROP("Corruption detected!\n");
 487                 return;
 488         }
 489
 490         /* We only process data packets if the interface is open */
 491         if (unlikely(!il->is_open)) {
 492                 D_DROP(
 493                         "Dropping packet while interface is not open.\n");
 494                 return;
 495         }
 496
 497         skb = dev_alloc_skb(128);
 498         if (!skb) {
 499                 IL_ERR("dev_alloc_skb failed\n");
 500                 return;
 501         }
 502
 503         if (!il3945_mod_params.sw_crypto)
 504                 il_set_decrypted_flag(il,
 505                                        (struct ieee80211_hdr *)rxb_addr(rxb),
 506                                        le32_to_cpu(rx_end->status), stats);
 507
 508         skb_add_rx_frag(skb, 0, rxb->page,
 509                         (void *)rx_hdr->payload - (void *)pkt, len);
 510
 511         il_update_stats(il, false, fc, len);
 512         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
 513
 514         ieee80211_rx(il->hw, skb);
 515         il->alloc_rxb_page--;
 516         rxb->page = NULL;
 517 }
 518
 519 #define IL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 520
 521 static void il3945_hdl_rx(struct il_priv *il,
 522                                 struct il_rx_buf *rxb)
 523 {
 524         struct ieee80211_hdr *header;
 525         struct ieee80211_rx_status rx_status;
 526         struct il_rx_pkt *pkt = rxb_addr(rxb);
 527         struct il3945_rx_frame_stats *rx_stats = IL_RX_STATS(pkt);
 528         struct il3945_rx_frame_hdr *rx_hdr = IL_RX_HDR(pkt);
 529         struct il3945_rx_frame_end *rx_end = IL_RX_END(pkt);
 530         u16 rx_stats_sig_avg __maybe_unused = le16_to_cpu(rx_stats->sig_avg);
 531         u16 rx_stats_noise_diff __maybe_unused = le16_to_cpu(rx_stats->noise_diff);
 532         u8 network_packet;
 533
 534         rx_status.flag = 0;
 535         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 536         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 537                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 538         rx_status.freq =
 539                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel),
 540                                                rx_status.band);
 541
 542         rx_status.rate_idx = il3945_hwrate_to_plcp_idx(rx_hdr->rate);
 543         if (rx_status.band == IEEE80211_BAND_5GHZ)
 544                 rx_status.rate_idx -= IL_FIRST_OFDM_RATE;
 545
 546         rx_status.antenna = (le16_to_cpu(rx_hdr->phy_flags) &
 547                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 548
 549         /* set the preamble flag if appropriate */
 550         if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 551                 rx_status.flag |= RX_FLAG_SHORTPRE;
 552
 553         if ((unlikely(rx_stats->phy_count > 20))) {
 554                 D_DROP("dsp size out of range [0,20]: %d/n",
 555                                 rx_stats->phy_count);
 556                 return;
 557         }
 558
 559         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR) ||
 560             !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 561                 D_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 562                 return;
 563         }
 564
 565
 566
 567         /* Convert 3945's rssi indicator to dBm */
 568         rx_status.signal = rx_stats->rssi - IL39_RSSI_OFFSET;
 569
 570         D_STATS("Rssi %d sig_avg %d noise_diff %d\n",
 571                         rx_status.signal, rx_stats_sig_avg,
 572                         rx_stats_noise_diff);
 573
 574         header = (struct ieee80211_hdr *)IL_RX_DATA(pkt);
 575
 576         network_packet = il3945_is_network_packet(il, header);
 577
 578         D_STATS("[%c] %d RSSI:%d Signal:%u, Rate:%u\n",
 579                               network_packet ? '*' : ' ',
 580                               le16_to_cpu(rx_hdr->channel),
 581                               rx_status.signal, rx_status.signal,
 582                               rx_status.rate_idx);
 583
 584         il_dbg_log_rx_data_frame(il, le16_to_cpu(rx_hdr->len),
 585                                                 header);
 586
 587         if (network_packet) {
 588                 il->_3945.last_beacon_time =
 589                         le32_to_cpu(rx_end->beacon_timestamp);
 590                 il->_3945.last_tsf = le64_to_cpu(rx_end->timestamp);
 591                 il->_3945.last_rx_rssi = rx_status.signal;
 592         }
 593
 594         il3945_pass_packet_to_mac80211(il, rxb, &rx_status);
 595 }
 596
 597 int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il,
 598                                      struct il_tx_queue *txq,
 599                                      dma_addr_t addr, u16 len, u8 reset, u8 pad)
 600 {
 601         int count;
 602         struct il_queue *q;
 603         struct il3945_tfd *tfd, *tfd_tmp;
 604
 605         q = &txq->q;
 606         tfd_tmp = (struct il3945_tfd *)txq->tfds;
 607         tfd = &tfd_tmp[q->write_ptr];
 608
 609         if (reset)
 610                 memset(tfd, 0, sizeof(*tfd));
 611
 612         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 613
 614         if (count >= NUM_TFD_CHUNKS || count < 0) {
 615                 IL_ERR("Error can not send more than %d chunks\n",
 616                           NUM_TFD_CHUNKS);
 617                 return -EINVAL;
 618         }
 619
 620         tfd->tbs[count].addr = cpu_to_le32(addr);
 621         tfd->tbs[count].len = cpu_to_le32(len);
 622
 623         count++;
 624
 625         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 626                                          TFD_CTL_PAD_SET(pad));
 627
 628         return 0;
 629 }
 630
 631 /**
 632  * il3945_hw_txq_free_tfd - Free one TFD, those at idx [txq->q.read_ptr]
 633  *
 634  * Does NOT advance any idxes
 635  */
 636 void il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
 637 {
 638         struct il3945_tfd *tfd_tmp = (struct il3945_tfd *)txq->tfds;
 639         int idx = txq->q.read_ptr;
 640         struct il3945_tfd *tfd = &tfd_tmp[idx];
 641         struct pci_dev *dev = il->pci_dev;
 642         int i;
 643         int counter;
 644
 645         /* sanity check */
 646         counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 647         if (counter > NUM_TFD_CHUNKS) {
 648                 IL_ERR("Too many chunks: %i\n", counter);
 649                 /* @todo issue fatal error, it is quite serious situation */
 650                 return;
 651         }
 652
 653         /* Unmap tx_cmd */
 654         if (counter)
 655                 pci_unmap_single(dev,
 656                                 dma_unmap_addr(&txq->meta[idx], mapping),
 657                                 dma_unmap_len(&txq->meta[idx], len),
 658                                 PCI_DMA_TODEVICE);
 659
 660         /* unmap chunks if any */
 661
 662         for (i = 1; i < counter; i++)
 663                 pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr),
 664                          le32_to_cpu(tfd->tbs[i].len), PCI_DMA_TODEVICE);
 665
 666         /* free SKB */
 667         if (txq->txb) {
 668                 struct sk_buff *skb;
 669
 670                 skb = txq->txb[txq->q.read_ptr].skb;
 671
 672                 /* can be called from irqs-disabled context */
 673                 if (skb) {
 674                         dev_kfree_skb_any(skb);
 675                         txq->txb[txq->q.read_ptr].skb = NULL;
 676                 }
 677         }
 678 }
 679
 680 /**
 681  * il3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 682  *
 683 */
 684 void il3945_hw_build_tx_cmd_rate(struct il_priv *il,
 685                                   struct il_device_cmd *cmd,
 686                                   struct ieee80211_tx_info *info,
 687                                   struct ieee80211_hdr *hdr,
 688                                   int sta_id, int tx_id)
 689 {
 690         u16 hw_value = ieee80211_get_tx_rate(il->hw, info)->hw_value;
 691         u16 rate_idx = min(hw_value & 0xffff, RATE_COUNT_3945);
 692         u16 rate_mask;
 693         int rate;
 694         u8 rts_retry_limit;
 695         u8 data_retry_limit;
 696         __le32 tx_flags;
 697         __le16 fc = hdr->frame_control;
 698         struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
 699
 700         rate = il3945_rates[rate_idx].plcp;
 701         tx_flags = tx_cmd->tx_flags;
 702
 703         /* We need to figure out how to get the sta->supp_rates while
 704          * in this running context */
 705         rate_mask = RATES_MASK_3945;
 706
 707         /* Set retry limit on DATA packets and Probe Responses*/
 708         if (ieee80211_is_probe_resp(fc))
 709                 data_retry_limit = 3;
 710         else
 711                 data_retry_limit = IL_DEFAULT_TX_RETRY;
 712         tx_cmd->data_retry_limit = data_retry_limit;
 713
 714         if (tx_id >= IL39_CMD_QUEUE_NUM)
 715                 rts_retry_limit = 3;
 716         else
 717                 rts_retry_limit = 7;
 718
 719         if (data_retry_limit < rts_retry_limit)
 720                 rts_retry_limit = data_retry_limit;
 721         tx_cmd->rts_retry_limit = rts_retry_limit;
 722
 723         tx_cmd->rate = rate;
 724         tx_cmd->tx_flags = tx_flags;
 725
 726         /* OFDM */
 727         tx_cmd->supp_rates[0] =
 728            ((rate_mask & IL_OFDM_RATES_MASK) >> IL_FIRST_OFDM_RATE) & 0xFF;
 729
 730         /* CCK */
 731         tx_cmd->supp_rates[1] = (rate_mask & 0xF);
 732
 733         D_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 734                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 735                        tx_cmd->rate, le32_to_cpu(tx_cmd->tx_flags),
 736                        tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]);
 737 }
 738
 739 static u8 il3945_sync_sta(struct il_priv *il, int sta_id, u16 tx_rate)
 740 {
 741         unsigned long flags_spin;
 742         struct il_station_entry *station;
 743
 744         if (sta_id == IL_INVALID_STATION)
 745                 return IL_INVALID_STATION;
 746
 747         spin_lock_irqsave(&il->sta_lock, flags_spin);
 748         station = &il->stations[sta_id];
 749
 750         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 751         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 752         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 753         il_send_add_sta(il, &station->sta, CMD_ASYNC);
 754         spin_unlock_irqrestore(&il->sta_lock, flags_spin);
 755
 756         D_RATE("SCALE sync station %d to rate %d\n",
 757                         sta_id, tx_rate);
 758         return sta_id;
 759 }
 760
 761 static void il3945_set_pwr_vmain(struct il_priv *il)
 762 {
 763 /*
 764  * (for documentation purposes)
 765  * to set power to V_AUX, do
 766
 767                 if (pci_pme_capable(il->pci_dev, PCI_D3cold)) {
 768                         il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
 769                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 770                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 771
 772                         _il_poll_bit(il, CSR_GPIO_IN,
 773                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 774                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 775                 }
 776  */
 777
 778         il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
 779                         APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 780                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 781
 782         _il_poll_bit(il, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 783                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 784 }
 785
 786 static int il3945_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
 787 {
 788         il_wr(il, FH39_RCSR_RBD_BASE(0), rxq->bd_dma);
 789         il_wr(il, FH39_RCSR_RPTR_ADDR(0),
 790                                         rxq->rb_stts_dma);
 791         il_wr(il, FH39_RCSR_WPTR(0), 0);
 792         il_wr(il, FH39_RCSR_CONFIG(0),
 793                 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 794                 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 795                 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 796                 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 797                 (RX_QUEUE_SIZE_LOG << FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 798                 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 799                 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
 800                 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 801
 802         /* fake read to flush all prev I/O */
 803         il_rd(il, FH39_RSSR_CTRL);
 804
 805         return 0;
 806 }
 807
 808 static int il3945_tx_reset(struct il_priv *il)
 809 {
 810
 811         /* bypass mode */
 812         il_wr_prph(il, ALM_SCD_MODE_REG, 0x2);
 813
 814         /* RA 0 is active */
 815         il_wr_prph(il, ALM_SCD_ARASTAT_REG, 0x01);
 816
 817         /* all 6 fifo are active */
 818         il_wr_prph(il, ALM_SCD_TXFACT_REG, 0x3f);
 819
 820         il_wr_prph(il, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
 821         il_wr_prph(il, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
 822         il_wr_prph(il, ALM_SCD_TXF4MF_REG, 0x000004);
 823         il_wr_prph(il, ALM_SCD_TXF5MF_REG, 0x000005);
 824
 825         il_wr(il, FH39_TSSR_CBB_BASE,
 826                              il->_3945.shared_phys);
 827
 828         il_wr(il, FH39_TSSR_MSG_CONFIG,
 829                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
 830                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
 831                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
 832                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
 833                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
 834                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
 835                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
 836
 837
 838         return 0;
 839 }
 840
 841 /**
 842  * il3945_txq_ctx_reset - Reset TX queue context
 843  *
 844  * Destroys all DMA structures and initialize them again
 845  */
 846 static int il3945_txq_ctx_reset(struct il_priv *il)
 847 {
 848         int rc;
 849         int txq_id, slots_num;
 850
 851         il3945_hw_txq_ctx_free(il);
 852
 853         /* allocate tx queue structure */
 854         rc = il_alloc_txq_mem(il);
 855         if (rc)
 856                 return rc;
 857
 858         /* Tx CMD queue */
 859         rc = il3945_tx_reset(il);
 860         if (rc)
 861                 goto error;
 862
 863         /* Tx queue(s) */
 864         for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
 865                 slots_num = (txq_id == IL39_CMD_QUEUE_NUM) ?
 866                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
 867                 rc = il_tx_queue_init(il, &il->txq[txq_id],
 868                                                 slots_num, txq_id);
 869                 if (rc) {
 870                         IL_ERR("Tx %d queue init failed\n", txq_id);
 871                         goto error;
 872                 }
 873         }
 874
 875         return rc;
 876
 877  error:
 878         il3945_hw_txq_ctx_free(il);
 879         return rc;
 880 }
 881
 882
 883 /*
 884  * Start up 3945's basic functionality after it has been reset
 885  * (e.g. after platform boot, or shutdown via il_apm_stop())
 886  * NOTE:  This does not load uCode nor start the embedded processor
 887  */
 888 static int il3945_apm_init(struct il_priv *il)
 889 {
 890         int ret = il_apm_init(il);
 891
 892         /* Clear APMG (NIC's internal power management) interrupts */
 893         il_wr_prph(il, APMG_RTC_INT_MSK_REG, 0x0);
 894         il_wr_prph(il, APMG_RTC_INT_STT_REG, 0xFFFFFFFF);
 895
 896         /* Reset radio chip */
 897         il_set_bits_prph(il, APMG_PS_CTRL_REG,
 898                                 APMG_PS_CTRL_VAL_RESET_REQ);
 899         udelay(5);
 900         il_clear_bits_prph(il, APMG_PS_CTRL_REG,
 901                                 APMG_PS_CTRL_VAL_RESET_REQ);
 902
 903         return ret;
 904 }
 905
 906 static void il3945_nic_config(struct il_priv *il)
 907 {
 908         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
 909         unsigned long flags;
 910         u8 rev_id = il->pci_dev->revision;
 911
 912         spin_lock_irqsave(&il->lock, flags);
 913
 914         /* Determine HW type */
 915         D_INFO("HW Revision ID = 0x%X\n", rev_id);
 916
 917         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
 918                 D_INFO("RTP type\n");
 919         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
 920                 D_INFO("3945 RADIO-MB type\n");
 921                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 922                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
 923         } else {
 924                 D_INFO("3945 RADIO-MM type\n");
 925                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 926                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
 927         }
 928
 929         if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) {
 930                 D_INFO("SKU OP mode is mrc\n");
 931                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 932                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
 933         } else
 934                 D_INFO("SKU OP mode is basic\n");
 935
 936         if ((eeprom->board_revision & 0xF0) == 0xD0) {
 937                 D_INFO("3945ABG revision is 0x%X\n",
 938                                eeprom->board_revision);
 939                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 940                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 941         } else {
 942                 D_INFO("3945ABG revision is 0x%X\n",
 943                                eeprom->board_revision);
 944                 il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
 945                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 946         }
 947
 948         if (eeprom->almgor_m_version <= 1) {
 949                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 950                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
 951                 D_INFO("Card M type A version is 0x%X\n",
 952                                eeprom->almgor_m_version);
 953         } else {
 954                 D_INFO("Card M type B version is 0x%X\n",
 955                                eeprom->almgor_m_version);
 956                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 957                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
 958         }
 959         spin_unlock_irqrestore(&il->lock, flags);
 960
 961         if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
 962                 D_RF_KILL("SW RF KILL supported in EEPROM.\n");
 963
 964         if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
 965                 D_RF_KILL("HW RF KILL supported in EEPROM.\n");
 966 }
 967
 968 int il3945_hw_nic_init(struct il_priv *il)
 969 {
 970         int rc;
 971         unsigned long flags;
 972         struct il_rx_queue *rxq = &il->rxq;
 973
 974         spin_lock_irqsave(&il->lock, flags);
 975         il->cfg->ops->lib->apm_ops.init(il);
 976         spin_unlock_irqrestore(&il->lock, flags);
 977
 978         il3945_set_pwr_vmain(il);
 979
 980         il->cfg->ops->lib->apm_ops.config(il);
 981
 982         /* Allocate the RX queue, or reset if it is already allocated */
 983         if (!rxq->bd) {
 984                 rc = il_rx_queue_alloc(il);
 985                 if (rc) {
 986                         IL_ERR("Unable to initialize Rx queue\n");
 987                         return -ENOMEM;
 988                 }
 989         } else
 990                 il3945_rx_queue_reset(il, rxq);
 991
 992         il3945_rx_replenish(il);
 993
 994         il3945_rx_init(il, rxq);
 995
 996
 997         /* Look at using this instead:
 998         rxq->need_update = 1;
 999         il_rx_queue_update_write_ptr(il, rxq);
1000         */
1001
1002         il_wr(il, FH39_RCSR_WPTR(0), rxq->write & ~7);
1003
1004         rc = il3945_txq_ctx_reset(il);
1005         if (rc)
1006                 return rc;
1007
1008         set_bit(S_INIT, &il->status);
1009
1010         return 0;
1011 }
1012
1013 /**
1014  * il3945_hw_txq_ctx_free - Free TXQ Context
1015  *
1016  * Destroy all TX DMA queues and structures
1017  */
1018 void il3945_hw_txq_ctx_free(struct il_priv *il)
1019 {
1020         int txq_id;
1021
1022         /* Tx queues */
1023         if (il->txq)
1024                 for (txq_id = 0; txq_id < il->hw_params.max_txq_num;
1025                      txq_id++)
1026                         if (txq_id == IL39_CMD_QUEUE_NUM)
1027                                 il_cmd_queue_free(il);
1028                         else
1029                                 il_tx_queue_free(il, txq_id);
1030
1031         /* free tx queue structure */
1032         il_txq_mem(il);
1033 }
1034
1035 void il3945_hw_txq_ctx_stop(struct il_priv *il)
1036 {
1037         int txq_id;
1038
1039         /* stop SCD */
1040         il_wr_prph(il, ALM_SCD_MODE_REG, 0);
1041         il_wr_prph(il, ALM_SCD_TXFACT_REG, 0);
1042
1043         /* reset TFD queues */
1044         for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
1045                 il_wr(il, FH39_TCSR_CONFIG(txq_id), 0x0);
1046                 il_poll_bit(il, FH39_TSSR_TX_STATUS,
1047                                 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1048                                 1000);
1049         }
1050
1051         il3945_hw_txq_ctx_free(il);
1052 }
1053
1054 /**
1055  * il3945_hw_reg_adjust_power_by_temp
1056  * return idx delta into power gain settings table
1057 */
1058 static int il3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1059 {
1060         return (new_reading - old_reading) * (-11) / 100;
1061 }
1062
1063 /**
1064  * il3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1065  */
1066 static inline int il3945_hw_reg_temp_out_of_range(int temperature)
1067 {
1068         return (temperature < -260 || temperature > 25) ? 1 : 0;
1069 }
1070
1071 int il3945_hw_get_temperature(struct il_priv *il)
1072 {
1073         return _il_rd(il, CSR_UCODE_DRV_GP2);
1074 }
1075
1076 /**
1077  * il3945_hw_reg_txpower_get_temperature
1078  * get the current temperature by reading from NIC
1079 */
1080 static int il3945_hw_reg_txpower_get_temperature(struct il_priv *il)
1081 {
1082         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1083         int temperature;
1084
1085         temperature = il3945_hw_get_temperature(il);
1086
1087         /* driver's okay range is -260 to +25.
1088          *   human readable okay range is 0 to +285 */
1089         D_INFO("Temperature: %d\n", temperature + IL_TEMP_CONVERT);
1090
1091         /* handle insane temp reading */
1092         if (il3945_hw_reg_temp_out_of_range(temperature)) {
1093                 IL_ERR("Error bad temperature value  %d\n", temperature);
1094
1095                 /* if really really hot(?),
1096                  *   substitute the 3rd band/group's temp measured at factory */
1097                 if (il->last_temperature > 100)
1098                         temperature = eeprom->groups[2].temperature;
1099                 else /* else use most recent "sane" value from driver */
1100                         temperature = il->last_temperature;
1101         }
1102
1103         return temperature;     /* raw, not "human readable" */
1104 }
1105
1106 /* Adjust Txpower only if temperature variance is greater than threshold.
1107  *
1108  * Both are lower than older versions' 9 degrees */
1109 #define IL_TEMPERATURE_LIMIT_TIMER   6
1110
1111 /**
1112  * il3945_is_temp_calib_needed - determines if new calibration is needed
1113  *
1114  * records new temperature in tx_mgr->temperature.
1115  * replaces tx_mgr->last_temperature *only* if calib needed
1116  *    (assumes caller will actually do the calibration!). */
1117 static int il3945_is_temp_calib_needed(struct il_priv *il)
1118 {
1119         int temp_diff;
1120
1121         il->temperature = il3945_hw_reg_txpower_get_temperature(il);
1122         temp_diff = il->temperature - il->last_temperature;
1123
1124         /* get absolute value */
1125         if (temp_diff < 0) {
1126                 D_POWER("Getting cooler, delta %d,\n", temp_diff);
1127                 temp_diff = -temp_diff;
1128         } else if (temp_diff == 0)
1129                 D_POWER("Same temp,\n");
1130         else
1131                 D_POWER("Getting warmer, delta %d,\n", temp_diff);
1132
1133         /* if we don't need calibration, *don't* update last_temperature */
1134         if (temp_diff < IL_TEMPERATURE_LIMIT_TIMER) {
1135                 D_POWER("Timed thermal calib not needed\n");
1136                 return 0;
1137         }
1138
1139         D_POWER("Timed thermal calib needed\n");
1140
1141         /* assume that caller will actually do calib ...
1142          *   update the "last temperature" value */
1143         il->last_temperature = il->temperature;
1144         return 1;
1145 }
1146
1147 #define IL_MAX_GAIN_ENTRIES 78
1148 #define IL_CCK_FROM_OFDM_POWER_DIFF  -5
1149 #define IL_CCK_FROM_OFDM_IDX_DIFF (10)
1150
1151 /* radio and DSP power table, each step is 1/2 dB.
1152  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1153 static struct il3945_tx_power power_gain_table[2][IL_MAX_GAIN_ENTRIES] = {
1154         {
1155          {251, 127},            /* 2.4 GHz, highest power */
1156          {251, 127},
1157          {251, 127},
1158          {251, 127},
1159          {251, 125},
1160          {251, 110},
1161          {251, 105},
1162          {251, 98},
1163          {187, 125},
1164          {187, 115},
1165          {187, 108},
1166          {187, 99},
1167          {243, 119},
1168          {243, 111},
1169          {243, 105},
1170          {243, 97},
1171          {243, 92},
1172          {211, 106},
1173          {211, 100},
1174          {179, 120},
1175          {179, 113},
1176          {179, 107},
1177          {147, 125},
1178          {147, 119},
1179          {147, 112},
1180          {147, 106},
1181          {147, 101},
1182          {147, 97},
1183          {147, 91},
1184          {115, 107},
1185          {235, 121},
1186          {235, 115},
1187          {235, 109},
1188          {203, 127},
1189          {203, 121},
1190          {203, 115},
1191          {203, 108},
1192          {203, 102},
1193          {203, 96},
1194          {203, 92},
1195          {171, 110},
1196          {171, 104},
1197          {171, 98},
1198          {139, 116},
1199          {227, 125},
1200          {227, 119},
1201          {227, 113},
1202          {227, 107},
1203          {227, 101},
1204          {227, 96},
1205          {195, 113},
1206          {195, 106},
1207          {195, 102},
1208          {195, 95},
1209          {163, 113},
1210          {163, 106},
1211          {163, 102},
1212          {163, 95},
1213          {131, 113},
1214          {131, 106},
1215          {131, 102},
1216          {131, 95},
1217          {99, 113},
1218          {99, 106},
1219          {99, 102},
1220          {99, 95},
1221          {67, 113},
1222          {67, 106},
1223          {67, 102},
1224          {67, 95},
1225          {35, 113},
1226          {35, 106},
1227          {35, 102},
1228          {35, 95},
1229          {3, 113},
1230          {3, 106},
1231          {3, 102},
1232          {3, 95} },             /* 2.4 GHz, lowest power */
1233         {
1234          {251, 127},            /* 5.x GHz, highest power */
1235          {251, 120},
1236          {251, 114},
1237          {219, 119},
1238          {219, 101},
1239          {187, 113},
1240          {187, 102},
1241          {155, 114},
1242          {155, 103},
1243          {123, 117},
1244          {123, 107},
1245          {123, 99},
1246          {123, 92},
1247          {91, 108},
1248          {59, 125},
1249          {59, 118},
1250          {59, 109},
1251          {59, 102},
1252          {59, 96},
1253          {59, 90},
1254          {27, 104},
1255          {27, 98},
1256          {27, 92},
1257          {115, 118},
1258          {115, 111},
1259          {115, 104},
1260          {83, 126},
1261          {83, 121},
1262          {83, 113},
1263          {83, 105},
1264          {83, 99},
1265          {51, 118},
1266          {51, 111},
1267          {51, 104},
1268          {51, 98},
1269          {19, 116},
1270          {19, 109},
1271          {19, 102},
1272          {19, 98},
1273          {19, 93},
1274          {171, 113},
1275          {171, 107},
1276          {171, 99},
1277          {139, 120},
1278          {139, 113},
1279          {139, 107},
1280          {139, 99},
1281          {107, 120},
1282          {107, 113},
1283          {107, 107},
1284          {107, 99},
1285          {75, 120},
1286          {75, 113},
1287          {75, 107},
1288          {75, 99},
1289          {43, 120},
1290          {43, 113},
1291          {43, 107},
1292          {43, 99},
1293          {11, 120},
1294          {11, 113},
1295          {11, 107},
1296          {11, 99},
1297          {131, 107},
1298          {131, 99},
1299          {99, 120},
1300          {99, 113},
1301          {99, 107},
1302          {99, 99},
1303          {67, 120},
1304          {67, 113},
1305          {67, 107},
1306          {67, 99},
1307          {35, 120},
1308          {35, 113},
1309          {35, 107},
1310          {35, 99},
1311          {3, 120} }             /* 5.x GHz, lowest power */
1312 };
1313
1314 static inline u8 il3945_hw_reg_fix_power_idx(int idx)
1315 {
1316         if (idx < 0)
1317                 return 0;
1318         if (idx >= IL_MAX_GAIN_ENTRIES)
1319                 return IL_MAX_GAIN_ENTRIES - 1;
1320         return (u8) idx;
1321 }
1322
1323 /* Kick off thermal recalibration check every 60 seconds */
1324 #define REG_RECALIB_PERIOD (60)
1325
1326 /**
1327  * il3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1328  *
1329  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1330  * or 6 Mbit (OFDM) rates.
1331  */
1332 static void il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_idx,
1333                                s32 rate_idx, const s8 *clip_pwrs,
1334                                struct il_channel_info *ch_info,
1335                                int band_idx)
1336 {
1337         struct il3945_scan_power_info *scan_power_info;
1338         s8 power;
1339         u8 power_idx;
1340
1341         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_idx];
1342
1343         /* use this channel group's 6Mbit clipping/saturation pwr,
1344          *   but cap at regulatory scan power restriction (set during init
1345          *   based on eeprom channel data) for this channel.  */
1346         power = min(ch_info->scan_power, clip_pwrs[RATE_6M_IDX_TBL]);
1347
1348         power = min(power, il->tx_power_user_lmt);
1349         scan_power_info->requested_power = power;
1350
1351         /* find difference between new scan *power* and current "normal"
1352          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1353          *   current "normal" temperature-compensated Tx power *idx* for
1354          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1355          *   *idx*. */
1356         power_idx = ch_info->power_info[rate_idx].power_table_idx
1357             - (power - ch_info->power_info
1358                [RATE_6M_IDX_TBL].requested_power) * 2;
1359
1360         /* store reference idx that we use when adjusting *all* scan
1361          *   powers.  So we can accommodate user (all channel) or spectrum
1362          *   management (single channel) power changes "between" temperature
1363          *   feedback compensation procedures.
1364          * don't force fit this reference idx into gain table; it may be a
1365          *   negative number.  This will help avoid errors when we're at
1366          *   the lower bounds (highest gains, for warmest temperatures)
1367          *   of the table. */
1368
1369         /* don't exceed table bounds for "real" setting */
1370         power_idx = il3945_hw_reg_fix_power_idx(power_idx);
1371
1372         scan_power_info->power_table_idx = power_idx;
1373         scan_power_info->tpc.tx_gain =
1374             power_gain_table[band_idx][power_idx].tx_gain;
1375         scan_power_info->tpc.dsp_atten =
1376             power_gain_table[band_idx][power_idx].dsp_atten;
1377 }
1378
1379 /**
1380  * il3945_send_tx_power - fill in Tx Power command with gain settings
1381  *
1382  * Configures power settings for all rates for the current channel,
1383  * using values from channel info struct, and send to NIC
1384  */
1385 static int il3945_send_tx_power(struct il_priv *il)
1386 {
1387         int rate_idx, i;
1388         const struct il_channel_info *ch_info = NULL;
1389         struct il3945_txpowertable_cmd txpower = {
1390                 .channel = il->ctx.active.channel,
1391         };
1392         u16 chan;
1393
1394         if (WARN_ONCE(test_bit(S_SCAN_HW, &il->status),
1395                       "TX Power requested while scanning!\n"))
1396                 return -EAGAIN;
1397
1398         chan = le16_to_cpu(il->ctx.active.channel);
1399
1400         txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1401         ch_info = il_get_channel_info(il, il->band, chan);
1402         if (!ch_info) {
1403                 IL_ERR(
1404                         "Failed to get channel info for channel %d [%d]\n",
1405                         chan, il->band);
1406                 return -EINVAL;
1407         }
1408
1409         if (!il_is_channel_valid(ch_info)) {
1410                 D_POWER("Not calling TX_PWR_TBL_CMD on "
1411                                 "non-Tx channel.\n");
1412                 return 0;
1413         }
1414
1415         /* fill cmd with power settings for all rates for current channel */
1416         /* Fill OFDM rate */
1417         for (rate_idx = IL_FIRST_OFDM_RATE, i = 0;
1418              rate_idx <= IL39_LAST_OFDM_RATE; rate_idx++, i++) {
1419
1420                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1421                 txpower.power[i].rate = il3945_rates[rate_idx].plcp;
1422
1423                 D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1424                                 le16_to_cpu(txpower.channel),
1425                                 txpower.band,
1426                                 txpower.power[i].tpc.tx_gain,
1427                                 txpower.power[i].tpc.dsp_atten,
1428                                 txpower.power[i].rate);
1429         }
1430         /* Fill CCK rates */
1431         for (rate_idx = IL_FIRST_CCK_RATE;
1432              rate_idx <= IL_LAST_CCK_RATE; rate_idx++, i++) {
1433                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1434                 txpower.power[i].rate = il3945_rates[rate_idx].plcp;
1435
1436                 D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1437                                 le16_to_cpu(txpower.channel),
1438                                 txpower.band,
1439                                 txpower.power[i].tpc.tx_gain,
1440                                 txpower.power[i].tpc.dsp_atten,
1441                                 txpower.power[i].rate);
1442         }
1443
1444         return il_send_cmd_pdu(il, C_TX_PWR_TBL,
1445                                 sizeof(struct il3945_txpowertable_cmd),
1446                                 &txpower);
1447
1448 }
1449
1450 /**
1451  * il3945_hw_reg_set_new_power - Configures power tables at new levels
1452  * @ch_info: Channel to update.  Uses power_info.requested_power.
1453  *
1454  * Replace requested_power and base_power_idx ch_info fields for
1455  * one channel.
1456  *
1457  * Called if user or spectrum management changes power preferences.
1458  * Takes into account h/w and modulation limitations (clip power).
1459  *
1460  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1461  *
1462  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1463  *       properly fill out the scan powers, and actual h/w gain settings,
1464  *       and send changes to NIC
1465  */
1466 static int il3945_hw_reg_set_new_power(struct il_priv *il,
1467                              struct il_channel_info *ch_info)
1468 {
1469         struct il3945_channel_power_info *power_info;
1470         int power_changed = 0;
1471         int i;
1472         const s8 *clip_pwrs;
1473         int power;
1474
1475         /* Get this chnlgrp's rate-to-max/clip-powers table */
1476         clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers;
1477
1478         /* Get this channel's rate-to-current-power settings table */
1479         power_info = ch_info->power_info;
1480
1481         /* update OFDM Txpower settings */
1482         for (i = RATE_6M_IDX_TBL; i <= RATE_54M_IDX_TBL;
1483              i++, ++power_info) {
1484                 int delta_idx;
1485
1486                 /* limit new power to be no more than h/w capability */
1487                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1488                 if (power == power_info->requested_power)
1489                         continue;
1490
1491                 /* find difference between old and new requested powers,
1492                  *    update base (non-temp-compensated) power idx */
1493                 delta_idx = (power - power_info->requested_power) * 2;
1494                 power_info->base_power_idx -= delta_idx;
1495
1496                 /* save new requested power value */
1497                 power_info->requested_power = power;
1498
1499                 power_changed = 1;
1500         }
1501
1502         /* update CCK Txpower settings, based on OFDM 12M setting ...
1503          *    ... all CCK power settings for a given channel are the *same*. */
1504         if (power_changed) {
1505                 power =
1506                     ch_info->power_info[RATE_12M_IDX_TBL].
1507                     requested_power + IL_CCK_FROM_OFDM_POWER_DIFF;
1508
1509                 /* do all CCK rates' il3945_channel_power_info structures */
1510                 for (i = RATE_1M_IDX_TBL; i <= RATE_11M_IDX_TBL; i++) {
1511                         power_info->requested_power = power;
1512                         power_info->base_power_idx =
1513                             ch_info->power_info[RATE_12M_IDX_TBL].
1514                             base_power_idx + IL_CCK_FROM_OFDM_IDX_DIFF;
1515                         ++power_info;
1516                 }
1517         }
1518
1519         return 0;
1520 }
1521
1522 /**
1523  * il3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1524  *
1525  * NOTE: Returned power limit may be less (but not more) than requested,
1526  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1527  *       (no consideration for h/w clipping limitations).
1528  */
1529 static int il3945_hw_reg_get_ch_txpower_limit(struct il_channel_info *ch_info)
1530 {
1531         s8 max_power;
1532
1533 #if 0
1534         /* if we're using TGd limits, use lower of TGd or EEPROM */
1535         if (ch_info->tgd_data.max_power != 0)
1536                 max_power = min(ch_info->tgd_data.max_power,
1537                                 ch_info->eeprom.max_power_avg);
1538
1539         /* else just use EEPROM limits */
1540         else
1541 #endif
1542                 max_power = ch_info->eeprom.max_power_avg;
1543
1544         return min(max_power, ch_info->max_power_avg);
1545 }
1546
1547 /**
1548  * il3945_hw_reg_comp_txpower_temp - Compensate for temperature
1549  *
1550  * Compensate txpower settings of *all* channels for temperature.
1551  * This only accounts for the difference between current temperature
1552  *   and the factory calibration temperatures, and bases the new settings
1553  *   on the channel's base_power_idx.
1554  *
1555  * If RxOn is "associated", this sends the new Txpower to NIC!
1556  */
1557 static int il3945_hw_reg_comp_txpower_temp(struct il_priv *il)
1558 {
1559         struct il_channel_info *ch_info = NULL;
1560         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1561         int delta_idx;
1562         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1563         u8 a_band;
1564         u8 rate_idx;
1565         u8 scan_tbl_idx;
1566         u8 i;
1567         int ref_temp;
1568         int temperature = il->temperature;
1569
1570         if (il->disable_tx_power_cal ||
1571             test_bit(S_SCANNING, &il->status)) {
1572                 /* do not perform tx power calibration */
1573                 return 0;
1574         }
1575         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1576         for (i = 0; i < il->channel_count; i++) {
1577                 ch_info = &il->channel_info[i];
1578                 a_band = il_is_channel_a_band(ch_info);
1579
1580                 /* Get this chnlgrp's factory calibration temperature */
1581                 ref_temp = (s16)eeprom->groups[ch_info->group_idx].
1582                     temperature;
1583
1584                 /* get power idx adjustment based on current and factory
1585                  * temps */
1586                 delta_idx = il3945_hw_reg_adjust_power_by_temp(temperature,
1587                                                               ref_temp);
1588
1589                 /* set tx power value for all rates, OFDM and CCK */
1590                 for (rate_idx = 0; rate_idx < RATE_COUNT_3945;
1591                      rate_idx++) {
1592                         int power_idx =
1593                             ch_info->power_info[rate_idx].base_power_idx;
1594
1595                         /* temperature compensate */
1596                         power_idx += delta_idx;
1597
1598                         /* stay within table range */
1599                         power_idx = il3945_hw_reg_fix_power_idx(power_idx);
1600                         ch_info->power_info[rate_idx].
1601                             power_table_idx = (u8) power_idx;
1602                         ch_info->power_info[rate_idx].tpc =
1603                             power_gain_table[a_band][power_idx];
1604                 }
1605
1606                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1607                 clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers;
1608
1609                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1610                 for (scan_tbl_idx = 0;
1611                      scan_tbl_idx < IL_NUM_SCAN_RATES; scan_tbl_idx++) {
1612                         s32 actual_idx = (scan_tbl_idx == 0) ?
1613                             RATE_1M_IDX_TBL : RATE_6M_IDX_TBL;
1614                         il3945_hw_reg_set_scan_power(il, scan_tbl_idx,
1615                                            actual_idx, clip_pwrs,
1616                                            ch_info, a_band);
1617                 }
1618         }
1619
1620         /* send Txpower command for current channel to ucode */
1621         return il->cfg->ops->lib->send_tx_power(il);
1622 }
1623
1624 int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power)
1625 {
1626         struct il_channel_info *ch_info;
1627         s8 max_power;
1628         u8 a_band;
1629         u8 i;
1630
1631         if (il->tx_power_user_lmt == power) {
1632                 D_POWER("Requested Tx power same as current "
1633                                 "limit: %ddBm.\n", power);
1634                 return 0;
1635         }
1636
1637         D_POWER("Setting upper limit clamp to %ddBm.\n", power);
1638         il->tx_power_user_lmt = power;
1639
1640         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1641
1642         for (i = 0; i < il->channel_count; i++) {
1643                 ch_info = &il->channel_info[i];
1644                 a_band = il_is_channel_a_band(ch_info);
1645
1646                 /* find minimum power of all user and regulatory constraints
1647                  *    (does not consider h/w clipping limitations) */
1648                 max_power = il3945_hw_reg_get_ch_txpower_limit(ch_info);
1649                 max_power = min(power, max_power);
1650                 if (max_power != ch_info->curr_txpow) {
1651                         ch_info->curr_txpow = max_power;
1652
1653                         /* this considers the h/w clipping limitations */
1654                         il3945_hw_reg_set_new_power(il, ch_info);
1655                 }
1656         }
1657
1658         /* update txpower settings for all channels,
1659          *   send to NIC if associated. */
1660         il3945_is_temp_calib_needed(il);
1661         il3945_hw_reg_comp_txpower_temp(il);
1662
1663         return 0;
1664 }
1665
1666 static int il3945_send_rxon_assoc(struct il_priv *il,
1667                                    struct il_rxon_context *ctx)
1668 {
1669         int rc = 0;
1670         struct il_rx_pkt *pkt;
1671         struct il3945_rxon_assoc_cmd rxon_assoc;
1672         struct il_host_cmd cmd = {
1673                 .id = C_RXON_ASSOC,
1674                 .len = sizeof(rxon_assoc),
1675                 .flags = CMD_WANT_SKB,
1676                 .data = &rxon_assoc,
1677         };
1678         const struct il_rxon_cmd *rxon1 = &ctx->staging;
1679         const struct il_rxon_cmd *rxon2 = &ctx->active;
1680
1681         if (rxon1->flags == rxon2->flags &&
1682             rxon1->filter_flags == rxon2->filter_flags &&
1683             rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
1684             rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
1685                 D_INFO("Using current RXON_ASSOC.  Not resending.\n");
1686                 return 0;
1687         }
1688
1689         rxon_assoc.flags = ctx->staging.flags;
1690         rxon_assoc.filter_flags = ctx->staging.filter_flags;
1691         rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
1692         rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
1693         rxon_assoc.reserved = 0;
1694
1695         rc = il_send_cmd_sync(il, &cmd);
1696         if (rc)
1697                 return rc;
1698
1699         pkt = (struct il_rx_pkt *)cmd.reply_page;
1700         if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1701                 IL_ERR("Bad return from C_RXON_ASSOC command\n");
1702                 rc = -EIO;
1703         }
1704
1705         il_free_pages(il, cmd.reply_page);
1706
1707         return rc;
1708 }
1709
1710 /**
1711  * il3945_commit_rxon - commit staging_rxon to hardware
1712  *
1713  * The RXON command in staging_rxon is committed to the hardware and
1714  * the active_rxon structure is updated with the new data.  This
1715  * function correctly transitions out of the RXON_ASSOC_MSK state if
1716  * a HW tune is required based on the RXON structure changes.
1717  */
1718 int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx)
1719 {
1720         /* cast away the const for active_rxon in this function */
1721         struct il3945_rxon_cmd *active_rxon = (void *)&ctx->active;
1722         struct il3945_rxon_cmd *staging_rxon = (void *)&ctx->staging;
1723         int rc = 0;
1724         bool new_assoc = !!(staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK);
1725
1726         if (test_bit(S_EXIT_PENDING, &il->status))
1727                 return -EINVAL;
1728
1729         if (!il_is_alive(il))
1730                 return -1;
1731
1732         /* always get timestamp with Rx frame */
1733         staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
1734
1735         /* select antenna */
1736         staging_rxon->flags &=
1737             ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1738         staging_rxon->flags |= il3945_get_antenna_flags(il);
1739
1740         rc = il_check_rxon_cmd(il, ctx);
1741         if (rc) {
1742                 IL_ERR("Invalid RXON configuration.  Not committing.\n");
1743                 return -EINVAL;
1744         }
1745
1746         /* If we don't need to send a full RXON, we can use
1747          * il3945_rxon_assoc_cmd which is used to reconfigure filter
1748          * and other flags for the current radio configuration. */
1749         if (!il_full_rxon_required(il,
1750                         &il->ctx)) {
1751                 rc = il_send_rxon_assoc(il,
1752                                          &il->ctx);
1753                 if (rc) {
1754                         IL_ERR("Error setting RXON_ASSOC "
1755                                   "configuration (%d).\n", rc);
1756                         return rc;
1757                 }
1758
1759                 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1760                 /*
1761                  * We do not commit tx power settings while channel changing,
1762                  * do it now if tx power changed.
1763                  */
1764                 il_set_tx_power(il, il->tx_power_next, false);
1765                 return 0;
1766         }
1767
1768         /* If we are currently associated and the new config requires
1769          * an RXON_ASSOC and the new config wants the associated mask enabled,
1770          * we must clear the associated from the active configuration
1771          * before we apply the new config */
1772         if (il_is_associated(il) && new_assoc) {
1773                 D_INFO("Toggling associated bit on current RXON\n");
1774                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1775
1776                 /*
1777                  * reserved4 and 5 could have been filled by the iwlcore code.
1778                  * Let's clear them before pushing to the 3945.
1779                  */
1780                 active_rxon->reserved4 = 0;
1781                 active_rxon->reserved5 = 0;
1782                 rc = il_send_cmd_pdu(il, C_RXON,
1783                                       sizeof(struct il3945_rxon_cmd),
1784                                       &il->ctx.active);
1785
1786                 /* If the mask clearing failed then we set
1787                  * active_rxon back to what it was previously */
1788                 if (rc) {
1789                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1790                         IL_ERR("Error clearing ASSOC_MSK on current "
1791                                   "configuration (%d).\n", rc);
1792                         return rc;
1793                 }
1794                 il_clear_ucode_stations(il,
1795                                          &il->ctx);
1796                 il_restore_stations(il,
1797                                          &il->ctx);
1798         }
1799
1800         D_INFO("Sending RXON\n"
1801                        "* with%s RXON_FILTER_ASSOC_MSK\n"
1802                        "* channel = %d\n"
1803                        "* bssid = %pM\n",
1804                        (new_assoc ? "" : "out"),
1805                        le16_to_cpu(staging_rxon->channel),
1806                        staging_rxon->bssid_addr);
1807
1808         /*
1809          * reserved4 and 5 could have been filled by the iwlcore code.
1810          * Let's clear them before pushing to the 3945.
1811          */
1812         staging_rxon->reserved4 = 0;
1813         staging_rxon->reserved5 = 0;
1814
1815         il_set_rxon_hwcrypto(il, ctx, !il3945_mod_params.sw_crypto);
1816
1817         /* Apply the new configuration */
1818         rc = il_send_cmd_pdu(il, C_RXON,
1819                               sizeof(struct il3945_rxon_cmd),
1820                               staging_rxon);
1821         if (rc) {
1822                 IL_ERR("Error setting new configuration (%d).\n", rc);
1823                 return rc;
1824         }
1825
1826         memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1827
1828         if (!new_assoc) {
1829                 il_clear_ucode_stations(il,
1830                                          &il->ctx);
1831                 il_restore_stations(il,
1832                                         &il->ctx);
1833         }
1834
1835         /* If we issue a new RXON command which required a tune then we must
1836          * send a new TXPOWER command or we won't be able to Tx any frames */
1837         rc = il_set_tx_power(il, il->tx_power_next, true);
1838         if (rc) {
1839                 IL_ERR("Error setting Tx power (%d).\n", rc);
1840                 return rc;
1841         }
1842
1843         /* Init the hardware's rate fallback order based on the band */
1844         rc = il3945_init_hw_rate_table(il);
1845         if (rc) {
1846                 IL_ERR("Error setting HW rate table: %02X\n", rc);
1847                 return -EIO;
1848         }
1849
1850         return 0;
1851 }
1852
1853 /**
1854  * il3945_reg_txpower_periodic -  called when time to check our temperature.
1855  *
1856  * -- reset periodic timer
1857  * -- see if temp has changed enough to warrant re-calibration ... if so:
1858  *     -- correct coeffs for temp (can reset temp timer)
1859  *     -- save this temp as "last",
1860  *     -- send new set of gain settings to NIC
1861  * NOTE:  This should continue working, even when we're not associated,
1862  *   so we can keep our internal table of scan powers current. */
1863 void il3945_reg_txpower_periodic(struct il_priv *il)
1864 {
1865         /* This will kick in the "brute force"
1866          * il3945_hw_reg_comp_txpower_temp() below */
1867         if (!il3945_is_temp_calib_needed(il))
1868                 goto reschedule;
1869
1870         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1871          * This is based *only* on current temperature,
1872          * ignoring any previous power measurements */
1873         il3945_hw_reg_comp_txpower_temp(il);
1874
1875  reschedule:
1876         queue_delayed_work(il->workqueue,
1877                            &il->_3945.thermal_periodic, REG_RECALIB_PERIOD * HZ);
1878 }
1879
1880 static void il3945_bg_reg_txpower_periodic(struct work_struct *work)
1881 {
1882         struct il_priv *il = container_of(work, struct il_priv,
1883                                              _3945.thermal_periodic.work);
1884
1885         if (test_bit(S_EXIT_PENDING, &il->status))
1886                 return;
1887
1888         mutex_lock(&il->mutex);
1889         il3945_reg_txpower_periodic(il);
1890         mutex_unlock(&il->mutex);
1891 }
1892
1893 /**
1894  * il3945_hw_reg_get_ch_grp_idx - find the channel-group idx (0-4)
1895  *                                 for the channel.
1896  *
1897  * This function is used when initializing channel-info structs.
1898  *
1899  * NOTE: These channel groups do *NOT* match the bands above!
1900  *       These channel groups are based on factory-tested channels;
1901  *       on A-band, EEPROM's "group frequency" entries represent the top
1902  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1903  */
1904 static u16 il3945_hw_reg_get_ch_grp_idx(struct il_priv *il,
1905                                        const struct il_channel_info *ch_info)
1906 {
1907         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1908         struct il3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0];
1909         u8 group;
1910         u16 group_idx = 0;      /* based on factory calib frequencies */
1911         u8 grp_channel;
1912
1913         /* Find the group idx for the channel ... don't use idx 1(?) */
1914         if (il_is_channel_a_band(ch_info)) {
1915                 for (group = 1; group < 5; group++) {
1916                         grp_channel = ch_grp[group].group_channel;
1917                         if (ch_info->channel <= grp_channel) {
1918                                 group_idx = group;
1919                                 break;
1920                         }
1921                 }
1922                 /* group 4 has a few channels *above* its factory cal freq */
1923                 if (group == 5)
1924                         group_idx = 4;
1925         } else
1926                 group_idx = 0;  /* 2.4 GHz, group 0 */
1927
1928         D_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1929                         group_idx);
1930         return group_idx;
1931 }
1932
1933 /**
1934  * il3945_hw_reg_get_matched_power_idx - Interpolate to get nominal idx
1935  *
1936  * Interpolate to get nominal (i.e. at factory calibration temperature) idx
1937  *   into radio/DSP gain settings table for requested power.
1938  */
1939 static int il3945_hw_reg_get_matched_power_idx(struct il_priv *il,
1940                                        s8 requested_power,
1941                                        s32 setting_idx, s32 *new_idx)
1942 {
1943         const struct il3945_eeprom_txpower_group *chnl_grp = NULL;
1944         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1945         s32 idx0, idx1;
1946         s32 power = 2 * requested_power;
1947         s32 i;
1948         const struct il3945_eeprom_txpower_sample *samples;
1949         s32 gains0, gains1;
1950         s32 res;
1951         s32 denominator;
1952
1953         chnl_grp = &eeprom->groups[setting_idx];
1954         samples = chnl_grp->samples;
1955         for (i = 0; i < 5; i++) {
1956                 if (power == samples[i].power) {
1957                         *new_idx = samples[i].gain_idx;
1958                         return 0;
1959                 }
1960         }
1961
1962         if (power > samples[1].power) {
1963                 idx0 = 0;
1964                 idx1 = 1;
1965         } else if (power > samples[2].power) {
1966                 idx0 = 1;
1967                 idx1 = 2;
1968         } else if (power > samples[3].power) {
1969                 idx0 = 2;
1970                 idx1 = 3;
1971         } else {
1972                 idx0 = 3;
1973                 idx1 = 4;
1974         }
1975
1976         denominator = (s32) samples[idx1].power - (s32) samples[idx0].power;
1977         if (denominator == 0)
1978                 return -EINVAL;
1979         gains0 = (s32) samples[idx0].gain_idx * (1 << 19);
1980         gains1 = (s32) samples[idx1].gain_idx * (1 << 19);
1981         res = gains0 + (gains1 - gains0) *
1982             ((s32) power - (s32) samples[idx0].power) / denominator +
1983             (1 << 18);
1984         *new_idx = res >> 19;
1985         return 0;
1986 }
1987
1988 static void il3945_hw_reg_init_channel_groups(struct il_priv *il)
1989 {
1990         u32 i;
1991         s32 rate_idx;
1992         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1993         const struct il3945_eeprom_txpower_group *group;
1994
1995         D_POWER("Initializing factory calib info from EEPROM\n");
1996
1997         for (i = 0; i < IL_NUM_TX_CALIB_GROUPS; i++) {
1998                 s8 *clip_pwrs;  /* table of power levels for each rate */
1999                 s8 satur_pwr;   /* saturation power for each chnl group */
2000                 group = &eeprom->groups[i];
2001
2002                 /* sanity check on factory saturation power value */
2003                 if (group->saturation_power < 40) {
2004                         IL_WARN("Error: saturation power is %d, "
2005                                     "less than minimum expected 40\n",
2006                                     group->saturation_power);
2007                         return;
2008                 }
2009
2010                 /*
2011                  * Derive requested power levels for each rate, based on
2012                  *   hardware capabilities (saturation power for band).
2013                  * Basic value is 3dB down from saturation, with further
2014                  *   power reductions for highest 3 data rates.  These
2015                  *   backoffs provide headroom for high rate modulation
2016                  *   power peaks, without too much distortion (clipping).
2017                  */
2018                 /* we'll fill in this array with h/w max power levels */
2019                 clip_pwrs = (s8 *) il->_3945.clip_groups[i].clip_powers;
2020
2021                 /* divide factory saturation power by 2 to find -3dB level */
2022                 satur_pwr = (s8) (group->saturation_power >> 1);
2023
2024                 /* fill in channel group's nominal powers for each rate */
2025                 for (rate_idx = 0;
2026                      rate_idx < RATE_COUNT_3945; rate_idx++, clip_pwrs++) {
2027                         switch (rate_idx) {
2028                         case RATE_36M_IDX_TBL:
2029                                 if (i == 0)     /* B/G */
2030                                         *clip_pwrs = satur_pwr;
2031                                 else    /* A */
2032                                         *clip_pwrs = satur_pwr - 5;
2033                                 break;
2034                         case RATE_48M_IDX_TBL:
2035                                 if (i == 0)
2036                                         *clip_pwrs = satur_pwr - 7;
2037                                 else
2038                                         *clip_pwrs = satur_pwr - 10;
2039                                 break;
2040                         case RATE_54M_IDX_TBL:
2041                                 if (i == 0)
2042                                         *clip_pwrs = satur_pwr - 9;
2043                                 else
2044                                         *clip_pwrs = satur_pwr - 12;
2045                                 break;
2046                         default:
2047                                 *clip_pwrs = satur_pwr;
2048                                 break;
2049                         }
2050                 }
2051         }
2052 }
2053
2054 /**
2055  * il3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2056  *
2057  * Second pass (during init) to set up il->channel_info
2058  *
2059  * Set up Tx-power settings in our channel info database for each VALID
2060  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2061  * and current temperature.
2062  *
2063  * Since this is based on current temperature (at init time), these values may
2064  * not be valid for very long, but it gives us a starting/default point,
2065  * and allows us to active (i.e. using Tx) scan.
2066  *
2067  * This does *not* write values to NIC, just sets up our internal table.
2068  */
2069 int il3945_txpower_set_from_eeprom(struct il_priv *il)
2070 {
2071         struct il_channel_info *ch_info = NULL;
2072         struct il3945_channel_power_info *pwr_info;
2073         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
2074         int delta_idx;
2075         u8 rate_idx;
2076         u8 scan_tbl_idx;
2077         const s8 *clip_pwrs;    /* array of power levels for each rate */
2078         u8 gain, dsp_atten;
2079         s8 power;
2080         u8 pwr_idx, base_pwr_idx, a_band;
2081         u8 i;
2082         int temperature;
2083
2084         /* save temperature reference,
2085          *   so we can determine next time to calibrate */
2086         temperature = il3945_hw_reg_txpower_get_temperature(il);
2087         il->last_temperature = temperature;
2088
2089         il3945_hw_reg_init_channel_groups(il);
2090
2091         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2092         for (i = 0, ch_info = il->channel_info; i < il->channel_count;
2093              i++, ch_info++) {
2094                 a_band = il_is_channel_a_band(ch_info);
2095                 if (!il_is_channel_valid(ch_info))
2096                         continue;
2097
2098                 /* find this channel's channel group (*not* "band") idx */
2099                 ch_info->group_idx =
2100                         il3945_hw_reg_get_ch_grp_idx(il, ch_info);
2101
2102                 /* Get this chnlgrp's rate->max/clip-powers table */
2103                 clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers;
2104
2105                 /* calculate power idx *adjustment* value according to
2106                  *  diff between current temperature and factory temperature */
2107                 delta_idx = il3945_hw_reg_adjust_power_by_temp(temperature,
2108                                 eeprom->groups[ch_info->group_idx].
2109                                 temperature);
2110
2111                 D_POWER("Delta idx for channel %d: %d [%d]\n",
2112                                 ch_info->channel, delta_idx, temperature +
2113                                 IL_TEMP_CONVERT);
2114
2115                 /* set tx power value for all OFDM rates */
2116                 for (rate_idx = 0; rate_idx < IL_OFDM_RATES;
2117                      rate_idx++) {
2118                         s32 uninitialized_var(power_idx);
2119                         int rc;
2120
2121                         /* use channel group's clip-power table,
2122                          *   but don't exceed channel's max power */
2123                         s8 pwr = min(ch_info->max_power_avg,
2124                                      clip_pwrs[rate_idx]);
2125
2126                         pwr_info = &ch_info->power_info[rate_idx];
2127
2128                         /* get base (i.e. at factory-measured temperature)
2129                          *    power table idx for this rate's power */
2130                         rc = il3945_hw_reg_get_matched_power_idx(il, pwr,
2131                                                          ch_info->group_idx,
2132                                                          &power_idx);
2133                         if (rc) {
2134                                 IL_ERR("Invalid power idx\n");
2135                                 return rc;
2136                         }
2137                         pwr_info->base_power_idx = (u8) power_idx;
2138
2139                         /* temperature compensate */
2140                         power_idx += delta_idx;
2141
2142                         /* stay within range of gain table */
2143                         power_idx = il3945_hw_reg_fix_power_idx(power_idx);
2144
2145                         /* fill 1 OFDM rate's il3945_channel_power_info struct */
2146                         pwr_info->requested_power = pwr;
2147                         pwr_info->power_table_idx = (u8) power_idx;
2148                         pwr_info->tpc.tx_gain =
2149                             power_gain_table[a_band][power_idx].tx_gain;
2150                         pwr_info->tpc.dsp_atten =
2151                             power_gain_table[a_band][power_idx].dsp_atten;
2152                 }
2153
2154                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2155                 pwr_info = &ch_info->power_info[RATE_12M_IDX_TBL];
2156                 power = pwr_info->requested_power +
2157                         IL_CCK_FROM_OFDM_POWER_DIFF;
2158                 pwr_idx = pwr_info->power_table_idx +
2159                         IL_CCK_FROM_OFDM_IDX_DIFF;
2160                 base_pwr_idx = pwr_info->base_power_idx +
2161                         IL_CCK_FROM_OFDM_IDX_DIFF;
2162
2163                 /* stay within table range */
2164                 pwr_idx = il3945_hw_reg_fix_power_idx(pwr_idx);
2165                 gain = power_gain_table[a_band][pwr_idx].tx_gain;
2166                 dsp_atten = power_gain_table[a_band][pwr_idx].dsp_atten;
2167
2168                 /* fill each CCK rate's il3945_channel_power_info structure
2169                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2170                  * NOTE:  CCK rates start at end of OFDM rates! */
2171                 for (rate_idx = 0;
2172                      rate_idx < IL_CCK_RATES; rate_idx++) {
2173                         pwr_info = &ch_info->power_info[rate_idx+IL_OFDM_RATES];
2174                         pwr_info->requested_power = power;
2175                         pwr_info->power_table_idx = pwr_idx;
2176                         pwr_info->base_power_idx = base_pwr_idx;
2177                         pwr_info->tpc.tx_gain = gain;
2178                         pwr_info->tpc.dsp_atten = dsp_atten;
2179                 }
2180
2181                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2182                 for (scan_tbl_idx = 0;
2183                      scan_tbl_idx < IL_NUM_SCAN_RATES; scan_tbl_idx++) {
2184                         s32 actual_idx = (scan_tbl_idx == 0) ?
2185                                 RATE_1M_IDX_TBL : RATE_6M_IDX_TBL;
2186                         il3945_hw_reg_set_scan_power(il, scan_tbl_idx,
2187                                 actual_idx, clip_pwrs, ch_info, a_band);
2188                 }
2189         }
2190
2191         return 0;
2192 }
2193
2194 int il3945_hw_rxq_stop(struct il_priv *il)
2195 {
2196         int rc;
2197
2198         il_wr(il, FH39_RCSR_CONFIG(0), 0);
2199         rc = il_poll_bit(il, FH39_RSSR_STATUS,
2200                         FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
2201         if (rc < 0)
2202                 IL_ERR("Can't stop Rx DMA.\n");
2203
2204         return 0;
2205 }
2206
2207 int il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq)
2208 {
2209         int txq_id = txq->q.id;
2210
2211         struct il3945_shared *shared_data = il->_3945.shared_virt;
2212
2213         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2214
2215         il_wr(il, FH39_CBCC_CTRL(txq_id), 0);
2216         il_wr(il, FH39_CBCC_BASE(txq_id), 0);
2217
2218         il_wr(il, FH39_TCSR_CONFIG(txq_id),
2219                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2220                 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2221                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2222                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2223                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2224
2225         /* fake read to flush all prev. writes */
2226         _il_rd(il, FH39_TSSR_CBB_BASE);
2227
2228         return 0;
2229 }
2230
2231 /*
2232  * HCMD utils
2233  */
2234 static u16 il3945_get_hcmd_size(u8 cmd_id, u16 len)
2235 {
2236         switch (cmd_id) {
2237         case C_RXON:
2238                 return sizeof(struct il3945_rxon_cmd);
2239         case C_POWER_TBL:
2240                 return sizeof(struct il3945_powertable_cmd);
2241         default:
2242                 return len;
2243         }
2244 }
2245
2246
2247 static u16 il3945_build_addsta_hcmd(const struct il_addsta_cmd *cmd,
2248                                                                 u8 *data)
2249 {
2250         struct il3945_addsta_cmd *addsta = (struct il3945_addsta_cmd *)data;
2251         addsta->mode = cmd->mode;
2252         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
2253         memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
2254         addsta->station_flags = cmd->station_flags;
2255         addsta->station_flags_msk = cmd->station_flags_msk;
2256         addsta->tid_disable_tx = cpu_to_le16(0);
2257         addsta->rate_n_flags = cmd->rate_n_flags;
2258         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2259         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2260         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2261
2262         return (u16)sizeof(struct il3945_addsta_cmd);
2263 }
2264
2265 static int il3945_add_bssid_station(struct il_priv *il,
2266                                      const u8 *addr, u8 *sta_id_r)
2267 {
2268         struct il_rxon_context *ctx = &il->ctx;
2269         int ret;
2270         u8 sta_id;
2271         unsigned long flags;
2272
2273         if (sta_id_r)
2274                 *sta_id_r = IL_INVALID_STATION;
2275
2276         ret = il_add_station_common(il, ctx, addr, 0, NULL, &sta_id);
2277         if (ret) {
2278                 IL_ERR("Unable to add station %pM\n", addr);
2279                 return ret;
2280         }
2281
2282         if (sta_id_r)
2283                 *sta_id_r = sta_id;
2284
2285         spin_lock_irqsave(&il->sta_lock, flags);
2286         il->stations[sta_id].used |= IL_STA_LOCAL;
2287         spin_unlock_irqrestore(&il->sta_lock, flags);
2288
2289         return 0;
2290 }
2291 static int il3945_manage_ibss_station(struct il_priv *il,
2292                                        struct ieee80211_vif *vif, bool add)
2293 {
2294         struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
2295         int ret;
2296
2297         if (add) {
2298                 ret = il3945_add_bssid_station(il, vif->bss_conf.bssid,
2299                                                 &vif_priv->ibss_bssid_sta_id);
2300                 if (ret)
2301                         return ret;
2302
2303                 il3945_sync_sta(il, vif_priv->ibss_bssid_sta_id,
2304                                  (il->band == IEEE80211_BAND_5GHZ) ?
2305                                  RATE_6M_PLCP : RATE_1M_PLCP);
2306                 il3945_rate_scale_init(il->hw, vif_priv->ibss_bssid_sta_id);
2307
2308                 return 0;
2309         }
2310
2311         return il_remove_station(il, vif_priv->ibss_bssid_sta_id,
2312                                   vif->bss_conf.bssid);
2313 }
2314
2315 /**
2316  * il3945_init_hw_rate_table - Initialize the hardware rate fallback table
2317  */
2318 int il3945_init_hw_rate_table(struct il_priv *il)
2319 {
2320         int rc, i, idx, prev_idx;
2321         struct il3945_rate_scaling_cmd rate_cmd = {
2322                 .reserved = {0, 0, 0},
2323         };
2324         struct il3945_rate_scaling_info *table = rate_cmd.table;
2325
2326         for (i = 0; i < ARRAY_SIZE(il3945_rates); i++) {
2327                 idx = il3945_rates[i].table_rs_idx;
2328
2329                 table[idx].rate_n_flags =
2330                         il3945_hw_set_rate_n_flags(il3945_rates[i].plcp, 0);
2331                 table[idx].try_cnt = il->retry_rate;
2332                 prev_idx = il3945_get_prev_ieee_rate(i);
2333                 table[idx].next_rate_idx =
2334                                 il3945_rates[prev_idx].table_rs_idx;
2335         }
2336
2337         switch (il->band) {
2338         case IEEE80211_BAND_5GHZ:
2339                 D_RATE("Select A mode rate scale\n");
2340                 /* If one of the following CCK rates is used,
2341                  * have it fall back to the 6M OFDM rate */
2342                 for (i = RATE_1M_IDX_TBL;
2343                         i <= RATE_11M_IDX_TBL; i++)
2344                         table[i].next_rate_idx =
2345                           il3945_rates[IL_FIRST_OFDM_RATE].table_rs_idx;
2346
2347                 /* Don't fall back to CCK rates */
2348                 table[RATE_12M_IDX_TBL].next_rate_idx =
2349                                                 RATE_9M_IDX_TBL;
2350
2351                 /* Don't drop out of OFDM rates */
2352                 table[RATE_6M_IDX_TBL].next_rate_idx =
2353                     il3945_rates[IL_FIRST_OFDM_RATE].table_rs_idx;
2354                 break;
2355
2356         case IEEE80211_BAND_2GHZ:
2357                 D_RATE("Select B/G mode rate scale\n");
2358                 /* If an OFDM rate is used, have it fall back to the
2359                  * 1M CCK rates */
2360
2361                 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) &&
2362                     il_is_associated(il)) {
2363
2364                         idx = IL_FIRST_CCK_RATE;
2365                         for (i = RATE_6M_IDX_TBL;
2366                              i <= RATE_54M_IDX_TBL; i++)
2367                                 table[i].next_rate_idx =
2368                                         il3945_rates[idx].table_rs_idx;
2369
2370                         idx = RATE_11M_IDX_TBL;
2371                         /* CCK shouldn't fall back to OFDM... */
2372                         table[idx].next_rate_idx = RATE_5M_IDX_TBL;
2373                 }
2374                 break;
2375
2376         default:
2377                 WARN_ON(1);
2378                 break;
2379         }
2380
2381         /* Update the rate scaling for control frame Tx */
2382         rate_cmd.table_id = 0;
2383         rc = il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd),
2384                               &rate_cmd);
2385         if (rc)
2386                 return rc;
2387
2388         /* Update the rate scaling for data frame Tx */
2389         rate_cmd.table_id = 1;
2390         return il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd),
2391                                 &rate_cmd);
2392 }
2393
2394 /* Called when initializing driver */
2395 int il3945_hw_set_hw_params(struct il_priv *il)
2396 {
2397         memset((void *)&il->hw_params, 0,
2398                sizeof(struct il_hw_params));
2399
2400         il->_3945.shared_virt =
2401                 dma_alloc_coherent(&il->pci_dev->dev,
2402                                    sizeof(struct il3945_shared),
2403                                    &il->_3945.shared_phys, GFP_KERNEL);
2404         if (!il->_3945.shared_virt) {
2405                 IL_ERR("failed to allocate pci memory\n");
2406                 return -ENOMEM;
2407         }
2408
2409         /* Assign number of Usable TX queues */
2410         il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues;
2411
2412         il->hw_params.tfd_size = sizeof(struct il3945_tfd);
2413         il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_3K);
2414         il->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2415         il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2416         il->hw_params.max_stations = IL3945_STATION_COUNT;
2417         il->ctx.bcast_sta_id = IL3945_BROADCAST_ID;
2418
2419         il->sta_key_max_num = STA_KEY_MAX_NUM;
2420
2421         il->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR;
2422         il->hw_params.max_beacon_itrvl = IL39_MAX_UCODE_BEACON_INTERVAL;
2423         il->hw_params.beacon_time_tsf_bits = IL3945_EXT_BEACON_TIME_POS;
2424
2425         return 0;
2426 }
2427
2428 unsigned int il3945_hw_get_beacon_cmd(struct il_priv *il,
2429                           struct il3945_frame *frame, u8 rate)
2430 {
2431         struct il3945_tx_beacon_cmd *tx_beacon_cmd;
2432         unsigned int frame_size;
2433
2434         tx_beacon_cmd = (struct il3945_tx_beacon_cmd *)&frame->u;
2435         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2436
2437         tx_beacon_cmd->tx.sta_id =
2438                 il->ctx.bcast_sta_id;
2439         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2440
2441         frame_size = il3945_fill_beacon_frame(il,
2442                                 tx_beacon_cmd->frame,
2443                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2444
2445         BUG_ON(frame_size > MAX_MPDU_SIZE);
2446         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2447
2448         tx_beacon_cmd->tx.rate = rate;
2449         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2450                                       TX_CMD_FLG_TSF_MSK);
2451
2452         /* supp_rates[0] == OFDM start at IL_FIRST_OFDM_RATE*/
2453         tx_beacon_cmd->tx.supp_rates[0] =
2454                 (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
2455
2456         tx_beacon_cmd->tx.supp_rates[1] =
2457                 (IL_CCK_BASIC_RATES_MASK & 0xF);
2458
2459         return sizeof(struct il3945_tx_beacon_cmd) + frame_size;
2460 }
2461
2462 void il3945_hw_handler_setup(struct il_priv *il)
2463 {
2464         il->handlers[C_TX] = il3945_hdl_tx;
2465         il->handlers[N_3945_RX] = il3945_hdl_rx;
2466 }
2467
2468 void il3945_hw_setup_deferred_work(struct il_priv *il)
2469 {
2470         INIT_DELAYED_WORK(&il->_3945.thermal_periodic,
2471                           il3945_bg_reg_txpower_periodic);
2472 }
2473
2474 void il3945_hw_cancel_deferred_work(struct il_priv *il)
2475 {
2476         cancel_delayed_work(&il->_3945.thermal_periodic);
2477 }
2478
2479 /* check contents of special bootstrap uCode SRAM */
2480 static int il3945_verify_bsm(struct il_priv *il)
2481  {
2482         __le32 *image = il->ucode_boot.v_addr;
2483         u32 len = il->ucode_boot.len;
2484         u32 reg;
2485         u32 val;
2486
2487         D_INFO("Begin verify bsm\n");
2488
2489         /* verify BSM SRAM contents */
2490         val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
2491         for (reg = BSM_SRAM_LOWER_BOUND;
2492              reg < BSM_SRAM_LOWER_BOUND + len;
2493              reg += sizeof(u32), image++) {
2494                 val = il_rd_prph(il, reg);
2495                 if (val != le32_to_cpu(*image)) {
2496                         IL_ERR("BSM uCode verification failed at "
2497                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2498                                   BSM_SRAM_LOWER_BOUND,
2499                                   reg - BSM_SRAM_LOWER_BOUND, len,
2500                                   val, le32_to_cpu(*image));
2501                         return -EIO;
2502                 }
2503         }
2504
2505         D_INFO("BSM bootstrap uCode image OK\n");
2506
2507         return 0;
2508 }
2509
2510
2511 /******************************************************************************
2512  *
2513  * EEPROM related functions
2514  *
2515  ******************************************************************************/
2516
2517 /*
2518  * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2519  * embedded controller) as EEPROM reader; each read is a series of pulses
2520  * to/from the EEPROM chip, not a single event, so even reads could conflict
2521  * if they weren't arbitrated by some ownership mechanism.  Here, the driver
2522  * simply claims ownership, which should be safe when this function is called
2523  * (i.e. before loading uCode!).
2524  */
2525 static int il3945_eeprom_acquire_semaphore(struct il_priv *il)
2526 {
2527         _il_clear_bit(il, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2528         return 0;
2529 }
2530
2531
2532 static void il3945_eeprom_release_semaphore(struct il_priv *il)
2533 {
2534         return;
2535 }
2536
2537  /**
2538   * il3945_load_bsm - Load bootstrap instructions
2539   *
2540   * BSM operation:
2541   *
2542   * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
2543   * in special SRAM that does not power down during RFKILL.  When powering back
2544   * up after power-saving sleeps (or during initial uCode load), the BSM loads
2545   * the bootstrap program into the on-board processor, and starts it.
2546   *
2547   * The bootstrap program loads (via DMA) instructions and data for a new
2548   * program from host DRAM locations indicated by the host driver in the
2549   * BSM_DRAM_* registers.  Once the new program is loaded, it starts
2550   * automatically.
2551   *
2552   * When initializing the NIC, the host driver points the BSM to the
2553   * "initialize" uCode image.  This uCode sets up some internal data, then
2554   * notifies host via "initialize alive" that it is complete.
2555   *
2556   * The host then replaces the BSM_DRAM_* pointer values to point to the
2557   * normal runtime uCode instructions and a backup uCode data cache buffer
2558   * (filled initially with starting data values for the on-board processor),
2559   * then triggers the "initialize" uCode to load and launch the runtime uCode,
2560   * which begins normal operation.
2561   *
2562   * When doing a power-save shutdown, runtime uCode saves data SRAM into
2563   * the backup data cache in DRAM before SRAM is powered down.
2564   *
2565   * When powering back up, the BSM loads the bootstrap program.  This reloads
2566   * the runtime uCode instructions and the backup data cache into SRAM,
2567   * and re-launches the runtime uCode from where it left off.
2568   */
2569 static int il3945_load_bsm(struct il_priv *il)
2570 {
2571         __le32 *image = il->ucode_boot.v_addr;
2572         u32 len = il->ucode_boot.len;
2573         dma_addr_t pinst;
2574         dma_addr_t pdata;
2575         u32 inst_len;
2576         u32 data_len;
2577         int rc;
2578         int i;
2579         u32 done;
2580         u32 reg_offset;
2581
2582         D_INFO("Begin load bsm\n");
2583
2584         /* make sure bootstrap program is no larger than BSM's SRAM size */
2585         if (len > IL39_MAX_BSM_SIZE)
2586                 return -EINVAL;
2587
2588         /* Tell bootstrap uCode where to find the "Initialize" uCode
2589         *   in host DRAM ... host DRAM physical address bits 31:0 for 3945.
2590         * NOTE:  il3945_initialize_alive_start() will replace these values,
2591         *        after the "initialize" uCode has run, to point to
2592         *        runtime/protocol instructions and backup data cache. */
2593         pinst = il->ucode_init.p_addr;
2594         pdata = il->ucode_init_data.p_addr;
2595         inst_len = il->ucode_init.len;
2596         data_len = il->ucode_init_data.len;
2597
2598         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2599         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2600         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
2601         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
2602
2603         /* Fill BSM memory with bootstrap instructions */
2604         for (reg_offset = BSM_SRAM_LOWER_BOUND;
2605              reg_offset < BSM_SRAM_LOWER_BOUND + len;
2606              reg_offset += sizeof(u32), image++)
2607                 _il_wr_prph(il, reg_offset,
2608                                           le32_to_cpu(*image));
2609
2610         rc = il3945_verify_bsm(il);
2611         if (rc)
2612                 return rc;
2613
2614         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2615         il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
2616         il_wr_prph(il, BSM_WR_MEM_DST_REG,
2617                                  IL39_RTC_INST_LOWER_BOUND);
2618         il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
2619
2620         /* Load bootstrap code into instruction SRAM now,
2621          *   to prepare to load "initialize" uCode */
2622         il_wr_prph(il, BSM_WR_CTRL_REG,
2623                 BSM_WR_CTRL_REG_BIT_START);
2624
2625         /* Wait for load of bootstrap uCode to finish */
2626         for (i = 0; i < 100; i++) {
2627                 done = il_rd_prph(il, BSM_WR_CTRL_REG);
2628                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
2629                         break;
2630                 udelay(10);
2631         }
2632         if (i < 100)
2633                 D_INFO("BSM write complete, poll %d iterations\n", i);
2634         else {
2635                 IL_ERR("BSM write did not complete!\n");
2636                 return -EIO;
2637         }
2638
2639         /* Enable future boot loads whenever power management unit triggers it
2640          *   (e.g. when powering back up after power-save shutdown) */
2641         il_wr_prph(il, BSM_WR_CTRL_REG,
2642                 BSM_WR_CTRL_REG_BIT_START_EN);
2643
2644         return 0;
2645 }
2646
2647 static struct il_hcmd_ops il3945_hcmd = {
2648         .rxon_assoc = il3945_send_rxon_assoc,
2649         .commit_rxon = il3945_commit_rxon,
2650 };
2651
2652 static struct il_lib_ops il3945_lib = {
2653         .txq_attach_buf_to_tfd = il3945_hw_txq_attach_buf_to_tfd,
2654         .txq_free_tfd = il3945_hw_txq_free_tfd,
2655         .txq_init = il3945_hw_tx_queue_init,
2656         .load_ucode = il3945_load_bsm,
2657         .dump_nic_error_log = il3945_dump_nic_error_log,
2658         .apm_ops = {
2659                 .init = il3945_apm_init,
2660                 .config = il3945_nic_config,
2661         },
2662         .eeprom_ops = {
2663                 .regulatory_bands = {
2664                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2665                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2666                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2667                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2668                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2669                         EEPROM_REGULATORY_BAND_NO_HT40,
2670                         EEPROM_REGULATORY_BAND_NO_HT40,
2671                 },
2672                 .acquire_semaphore = il3945_eeprom_acquire_semaphore,
2673                 .release_semaphore = il3945_eeprom_release_semaphore,
2674         },
2675         .send_tx_power  = il3945_send_tx_power,
2676         .is_valid_rtc_data_addr = il3945_hw_valid_rtc_data_addr,
2677
2678         .debugfs_ops = {
2679                 .rx_stats_read = il3945_ucode_rx_stats_read,
2680                 .tx_stats_read = il3945_ucode_tx_stats_read,
2681                 .general_stats_read = il3945_ucode_general_stats_read,
2682         },
2683 };
2684
2685 static const struct il_legacy_ops il3945_legacy_ops = {
2686         .post_associate = il3945_post_associate,
2687         .config_ap = il3945_config_ap,
2688         .manage_ibss_station = il3945_manage_ibss_station,
2689 };
2690
2691 static struct il_hcmd_utils_ops il3945_hcmd_utils = {
2692         .get_hcmd_size = il3945_get_hcmd_size,
2693         .build_addsta_hcmd = il3945_build_addsta_hcmd,
2694         .request_scan = il3945_request_scan,
2695         .post_scan = il3945_post_scan,
2696 };
2697
2698 static const struct il_ops il3945_ops = {
2699         .lib = &il3945_lib,
2700         .hcmd = &il3945_hcmd,
2701         .utils = &il3945_hcmd_utils,
2702         .led = &il3945_led_ops,
2703         .legacy = &il3945_legacy_ops,
2704         .ieee80211_ops = &il3945_hw_ops,
2705 };
2706
2707 static struct il_base_params il3945_base_params = {
2708         .eeprom_size = IL3945_EEPROM_IMG_SIZE,
2709         .num_of_queues = IL39_NUM_QUEUES,
2710         .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
2711         .set_l0s = false,
2712         .use_bsm = true,
2713         .led_compensation = 64,
2714         .wd_timeout = IL_DEF_WD_TIMEOUT,
2715 };
2716
2717 static struct il_cfg il3945_bg_cfg = {
2718         .name = "3945BG",
2719         .fw_name_pre = IL3945_FW_PRE,
2720         .ucode_api_max = IL3945_UCODE_API_MAX,
2721         .ucode_api_min = IL3945_UCODE_API_MIN,
2722         .sku = IL_SKU_G,
2723         .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2724         .ops = &il3945_ops,
2725         .mod_params = &il3945_mod_params,
2726         .base_params = &il3945_base_params,
2727         .led_mode = IL_LED_BLINK,
2728 };
2729
2730 static struct il_cfg il3945_abg_cfg = {
2731         .name = "3945ABG",
2732         .fw_name_pre = IL3945_FW_PRE,
2733         .ucode_api_max = IL3945_UCODE_API_MAX,
2734         .ucode_api_min = IL3945_UCODE_API_MIN,
2735         .sku = IL_SKU_A|IL_SKU_G,
2736         .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2737         .ops = &il3945_ops,
2738         .mod_params = &il3945_mod_params,
2739         .base_params = &il3945_base_params,
2740         .led_mode = IL_LED_BLINK,
2741 };
2742
2743 DEFINE_PCI_DEVICE_TABLE(il3945_hw_card_ids) = {
2744         {IL_PCI_DEVICE(0x4222, 0x1005, il3945_bg_cfg)},
2745         {IL_PCI_DEVICE(0x4222, 0x1034, il3945_bg_cfg)},
2746         {IL_PCI_DEVICE(0x4222, 0x1044, il3945_bg_cfg)},
2747         {IL_PCI_DEVICE(0x4227, 0x1014, il3945_bg_cfg)},
2748         {IL_PCI_DEVICE(0x4222, PCI_ANY_ID, il3945_abg_cfg)},
2749         {IL_PCI_DEVICE(0x4227, PCI_ANY_ID, il3945_abg_cfg)},
2750         {0}
2751 };
2752
2753 MODULE_DEVICE_TABLE(pci, il3945_hw_card_ids);