drivers/net/wireless/iwlegacy/3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/slab.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/sched.h>
  35 #include <linux/skbuff.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/firmware.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40 #include <net/mac80211.h>
  41
  42 #include "commands.h"
  43 #include "iwl-sta.h"
  44 #include "iwl-eeprom.h"
  45 #include "common.h"
  46 #include "iwl-helpers.h"
  47 #include "iwl-led.h"
  48 #include "3945.h"
  49
  50 /* Send led command */
  51 static int il3945_send_led_cmd(struct il_priv *il,
  52                                 struct il_led_cmd *led_cmd)
  53 {
  54         struct il_host_cmd cmd = {
  55                 .id = C_LEDS,
  56                 .len = sizeof(struct il_led_cmd),
  57                 .data = led_cmd,
  58                 .flags = CMD_ASYNC,
  59                 .callback = NULL,
  60         };
  61
  62         return il_send_cmd(il, &cmd);
  63 }
  64
  65 const struct il_led_ops il3945_led_ops = {
  66         .cmd = il3945_send_led_cmd,
  67 };
  68
  69 #define IL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  70         [RATE_##r##M_IDX] = { RATE_##r##M_PLCP,   \
  71                                     RATE_##r##M_IEEE,   \
  72                                     RATE_##ip##M_IDX, \
  73                                     RATE_##in##M_IDX, \
  74                                     RATE_##rp##M_IDX, \
  75                                     RATE_##rn##M_IDX, \
  76                                     RATE_##pp##M_IDX, \
  77                                     RATE_##np##M_IDX, \
  78                                     RATE_##r##M_IDX_TBL, \
  79                                     RATE_##ip##M_IDX_TBL }
  80
  81 /*
  82  * Parameter order:
  83  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  84  *
  85  * If there isn't a valid next or previous rate then INV is used which
  86  * maps to RATE_INVALID
  87  *
  88  */
  89 const struct il3945_rate_info il3945_rates[RATE_COUNT_3945] = {
  90         IL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  91         IL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  92         IL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  93         IL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  94         IL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  95         IL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  96         IL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  97         IL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  98         IL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  99         IL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
 100         IL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
 101         IL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
 102 };
 103
 104 static inline u8 il3945_get_prev_ieee_rate(u8 rate_idx)
 105 {
 106         u8 rate = il3945_rates[rate_idx].prev_ieee;
 107
 108         if (rate == RATE_INVALID)
 109                 rate = rate_idx;
 110         return rate;
 111 }
 112
 113 /* 1 = enable the il3945_disable_events() function */
 114 #define IL_EVT_DISABLE (0)
 115 #define IL_EVT_DISABLE_SIZE (1532/32)
 116
 117 /**
 118  * il3945_disable_events - Disable selected events in uCode event log
 119  *
 120  * Disable an event by writing "1"s into "disable"
 121  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
 122  *   Default values of 0 enable uCode events to be logged.
 123  * Use for only special debugging.  This function is just a placeholder as-is,
 124  *   you'll need to provide the special bits! ...
 125  *   ... and set IL_EVT_DISABLE to 1. */
 126 void il3945_disable_events(struct il_priv *il)
 127 {
 128         int i;
 129         u32 base;               /* SRAM address of event log header */
 130         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 131         u32 array_size;         /* # of u32 entries in array */
 132         static const u32 evt_disable[IL_EVT_DISABLE_SIZE] = {
 133                 0x00000000,     /*   31 -    0  Event id numbers */
 134                 0x00000000,     /*   63 -   32 */
 135                 0x00000000,     /*   95 -   64 */
 136                 0x00000000,     /*  127 -   96 */
 137                 0x00000000,     /*  159 -  128 */
 138                 0x00000000,     /*  191 -  160 */
 139                 0x00000000,     /*  223 -  192 */
 140                 0x00000000,     /*  255 -  224 */
 141                 0x00000000,     /*  287 -  256 */
 142                 0x00000000,     /*  319 -  288 */
 143                 0x00000000,     /*  351 -  320 */
 144                 0x00000000,     /*  383 -  352 */
 145                 0x00000000,     /*  415 -  384 */
 146                 0x00000000,     /*  447 -  416 */
 147                 0x00000000,     /*  479 -  448 */
 148                 0x00000000,     /*  511 -  480 */
 149                 0x00000000,     /*  543 -  512 */
 150                 0x00000000,     /*  575 -  544 */
 151                 0x00000000,     /*  607 -  576 */
 152                 0x00000000,     /*  639 -  608 */
 153                 0x00000000,     /*  671 -  640 */
 154                 0x00000000,     /*  703 -  672 */
 155                 0x00000000,     /*  735 -  704 */
 156                 0x00000000,     /*  767 -  736 */
 157                 0x00000000,     /*  799 -  768 */
 158                 0x00000000,     /*  831 -  800 */
 159                 0x00000000,     /*  863 -  832 */
 160                 0x00000000,     /*  895 -  864 */
 161                 0x00000000,     /*  927 -  896 */
 162                 0x00000000,     /*  959 -  928 */
 163                 0x00000000,     /*  991 -  960 */
 164                 0x00000000,     /* 1023 -  992 */
 165                 0x00000000,     /* 1055 - 1024 */
 166                 0x00000000,     /* 1087 - 1056 */
 167                 0x00000000,     /* 1119 - 1088 */
 168                 0x00000000,     /* 1151 - 1120 */
 169                 0x00000000,     /* 1183 - 1152 */
 170                 0x00000000,     /* 1215 - 1184 */
 171                 0x00000000,     /* 1247 - 1216 */
 172                 0x00000000,     /* 1279 - 1248 */
 173                 0x00000000,     /* 1311 - 1280 */
 174                 0x00000000,     /* 1343 - 1312 */
 175                 0x00000000,     /* 1375 - 1344 */
 176                 0x00000000,     /* 1407 - 1376 */
 177                 0x00000000,     /* 1439 - 1408 */
 178                 0x00000000,     /* 1471 - 1440 */
 179                 0x00000000,     /* 1503 - 1472 */
 180         };
 181
 182         base = le32_to_cpu(il->card_alive.log_event_table_ptr);
 183         if (!il3945_hw_valid_rtc_data_addr(base)) {
 184                 IL_ERR("Invalid event log pointer 0x%08X\n", base);
 185                 return;
 186         }
 187
 188         disable_ptr = il_read_targ_mem(il, base + (4 * sizeof(u32)));
 189         array_size = il_read_targ_mem(il, base + (5 * sizeof(u32)));
 190
 191         if (IL_EVT_DISABLE && array_size == IL_EVT_DISABLE_SIZE) {
 192                 D_INFO("Disabling selected uCode log events at 0x%x\n",
 193                                disable_ptr);
 194                 for (i = 0; i < IL_EVT_DISABLE_SIZE; i++)
 195                         il_write_targ_mem(il,
 196                                            disable_ptr + (i * sizeof(u32)),
 197                                            evt_disable[i]);
 198
 199         } else {
 200                 D_INFO("Selected uCode log events may be disabled\n");
 201                 D_INFO("  by writing \"1\"s into disable bitmap\n");
 202                 D_INFO("  in SRAM at 0x%x, size %d u32s\n",
 203                                disable_ptr, array_size);
 204         }
 205
 206 }
 207
 208 static int il3945_hwrate_to_plcp_idx(u8 plcp)
 209 {
 210         int idx;
 211
 212         for (idx = 0; idx < RATE_COUNT_3945; idx++)
 213                 if (il3945_rates[idx].plcp == plcp)
 214                         return idx;
 215         return -1;
 216 }
 217
 218 #ifdef CONFIG_IWLEGACY_DEBUG
 219 #define TX_STATUS_ENTRY(x) case TX_3945_STATUS_FAIL_ ## x: return #x
 220
 221 static const char *il3945_get_tx_fail_reason(u32 status)
 222 {
 223         switch (status & TX_STATUS_MSK) {
 224         case TX_3945_STATUS_SUCCESS:
 225                 return "SUCCESS";
 226                 TX_STATUS_ENTRY(SHORT_LIMIT);
 227                 TX_STATUS_ENTRY(LONG_LIMIT);
 228                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 229                 TX_STATUS_ENTRY(MGMNT_ABORT);
 230                 TX_STATUS_ENTRY(NEXT_FRAG);
 231                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 232                 TX_STATUS_ENTRY(DEST_PS);
 233                 TX_STATUS_ENTRY(ABORTED);
 234                 TX_STATUS_ENTRY(BT_RETRY);
 235                 TX_STATUS_ENTRY(STA_INVALID);
 236                 TX_STATUS_ENTRY(FRAG_DROPPED);
 237                 TX_STATUS_ENTRY(TID_DISABLE);
 238                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 239                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 240                 TX_STATUS_ENTRY(TX_LOCKED);
 241                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 242         }
 243
 244         return "UNKNOWN";
 245 }
 246 #else
 247 static inline const char *il3945_get_tx_fail_reason(u32 status)
 248 {
 249         return "";
 250 }
 251 #endif
 252
 253 /*
 254  * get ieee prev rate from rate scale table.
 255  * for A and B mode we need to overright prev
 256  * value
 257  */
 258 int il3945_rs_next_rate(struct il_priv *il, int rate)
 259 {
 260         int next_rate = il3945_get_prev_ieee_rate(rate);
 261
 262         switch (il->band) {
 263         case IEEE80211_BAND_5GHZ:
 264                 if (rate == RATE_12M_IDX)
 265                         next_rate = RATE_9M_IDX;
 266                 else if (rate == RATE_6M_IDX)
 267                         next_rate = RATE_6M_IDX;
 268                 break;
 269         case IEEE80211_BAND_2GHZ:
 270                 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) &&
 271                     il_is_associated(il)) {
 272                         if (rate == RATE_11M_IDX)
 273                                 next_rate = RATE_5M_IDX;
 274                 }
 275                 break;
 276
 277         default:
 278                 break;
 279         }
 280
 281         return next_rate;
 282 }
 283
 284
 285 /**
 286  * il3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 287  *
 288  * When FW advances 'R' idx, all entries between old and new 'R' idx
 289  * need to be reclaimed. As result, some free space forms. If there is
 290  * enough free space (> low mark), wake the stack that feeds us.
 291  */
 292 static void il3945_tx_queue_reclaim(struct il_priv *il,
 293                                      int txq_id, int idx)
 294 {
 295         struct il_tx_queue *txq = &il->txq[txq_id];
 296         struct il_queue *q = &txq->q;
 297         struct il_tx_info *tx_info;
 298
 299         BUG_ON(txq_id == IL39_CMD_QUEUE_NUM);
 300
 301         for (idx = il_queue_inc_wrap(idx, q->n_bd);
 302                 q->read_ptr != idx;
 303                 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 304
 305                 tx_info = &txq->txb[txq->q.read_ptr];
 306                 ieee80211_tx_status_irqsafe(il->hw, tx_info->skb);
 307                 tx_info->skb = NULL;
 308                 il->cfg->ops->lib->txq_free_tfd(il, txq);
 309         }
 310
 311         if (il_queue_space(q) > q->low_mark && txq_id >= 0 &&
 312             txq_id != IL39_CMD_QUEUE_NUM && il->mac80211_registered)
 313                 il_wake_queue(il, txq);
 314 }
 315
 316 /**
 317  * il3945_hdl_tx - Handle Tx response
 318  */
 319 static void il3945_hdl_tx(struct il_priv *il,
 320                                 struct il_rx_buf *rxb)
 321 {
 322         struct il_rx_pkt *pkt = rxb_addr(rxb);
 323         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 324         int txq_id = SEQ_TO_QUEUE(sequence);
 325         int idx = SEQ_TO_IDX(sequence);
 326         struct il_tx_queue *txq = &il->txq[txq_id];
 327         struct ieee80211_tx_info *info;
 328         struct il3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 329         u32  status = le32_to_cpu(tx_resp->status);
 330         int rate_idx;
 331         int fail;
 332
 333         if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
 334                 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
 335                           "is out of range [0-%d] %d %d\n", txq_id,
 336                           idx, txq->q.n_bd, txq->q.write_ptr,
 337                           txq->q.read_ptr);
 338                 return;
 339         }
 340
 341         txq->time_stamp = jiffies;
 342         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
 343         ieee80211_tx_info_clear_status(info);
 344
 345         /* Fill the MRR chain with some info about on-chip retransmissions */
 346         rate_idx = il3945_hwrate_to_plcp_idx(tx_resp->rate);
 347         if (info->band == IEEE80211_BAND_5GHZ)
 348                 rate_idx -= IL_FIRST_OFDM_RATE;
 349
 350         fail = tx_resp->failure_frame;
 351
 352         info->status.rates[0].idx = rate_idx;
 353         info->status.rates[0].count = fail + 1; /* add final attempt */
 354
 355         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 356         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 357                                 IEEE80211_TX_STAT_ACK : 0;
 358
 359         D_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 360                         txq_id, il3945_get_tx_fail_reason(status), status,
 361                         tx_resp->rate, tx_resp->failure_frame);
 362
 363         D_TX_REPLY("Tx queue reclaim %d\n", idx);
 364         il3945_tx_queue_reclaim(il, txq_id, idx);
 365
 366         if (status & TX_ABORT_REQUIRED_MSK)
 367                 IL_ERR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 368 }
 369
 370
 371
 372 /*****************************************************************************
 373  *
 374  * Intel PRO/Wireless 3945ABG/BG Network Connection
 375  *
 376  *  RX handler implementations
 377  *
 378  *****************************************************************************/
 379 #ifdef CONFIG_IWLEGACY_DEBUGFS
 380 static void il3945_accumulative_stats(struct il_priv *il,
 381                                             __le32 *stats)
 382 {
 383         int i;
 384         __le32 *prev_stats;
 385         u32 *accum_stats;
 386         u32 *delta, *max_delta;
 387
 388         prev_stats = (__le32 *)&il->_3945.stats;
 389         accum_stats = (u32 *)&il->_3945.accum_stats;
 390         delta = (u32 *)&il->_3945.delta_stats;
 391         max_delta = (u32 *)&il->_3945.max_delta;
 392
 393         for (i = sizeof(__le32); i < sizeof(struct il3945_notif_stats);
 394              i += sizeof(__le32), stats++, prev_stats++, delta++,
 395              max_delta++, accum_stats++) {
 396                 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
 397                         *delta = (le32_to_cpu(*stats) -
 398                                 le32_to_cpu(*prev_stats));
 399                         *accum_stats += *delta;
 400                         if (*delta > *max_delta)
 401                                 *max_delta = *delta;
 402                 }
 403         }
 404
 405         /* reset accumulative stats for "no-counter" type stats */
 406         il->_3945.accum_stats.general.temperature =
 407                 il->_3945.stats.general.temperature;
 408         il->_3945.accum_stats.general.ttl_timestamp =
 409                 il->_3945.stats.general.ttl_timestamp;
 410 }
 411 #endif
 412
 413 void il3945_hdl_stats(struct il_priv *il,
 414                 struct il_rx_buf *rxb)
 415 {
 416         struct il_rx_pkt *pkt = rxb_addr(rxb);
 417
 418         D_RX("Statistics notification received (%d vs %d).\n",
 419                      (int)sizeof(struct il3945_notif_stats),
 420                      le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 421 #ifdef CONFIG_IWLEGACY_DEBUGFS
 422         il3945_accumulative_stats(il, (__le32 *)&pkt->u.raw);
 423 #endif
 424
 425         memcpy(&il->_3945.stats, pkt->u.raw, sizeof(il->_3945.stats));
 426 }
 427
 428 void il3945_hdl_c_stats(struct il_priv *il,
 429                               struct il_rx_buf *rxb)
 430 {
 431         struct il_rx_pkt *pkt = rxb_addr(rxb);
 432         __le32 *flag = (__le32 *)&pkt->u.raw;
 433
 434         if (le32_to_cpu(*flag) & UCODE_STATS_CLEAR_MSK) {
 435 #ifdef CONFIG_IWLEGACY_DEBUGFS
 436                 memset(&il->_3945.accum_stats, 0,
 437                         sizeof(struct il3945_notif_stats));
 438                 memset(&il->_3945.delta_stats, 0,
 439                         sizeof(struct il3945_notif_stats));
 440                 memset(&il->_3945.max_delta, 0,
 441                         sizeof(struct il3945_notif_stats));
 442 #endif
 443                 D_RX("Statistics have been cleared\n");
 444         }
 445         il3945_hdl_stats(il, rxb);
 446 }
 447
 448
 449 /******************************************************************************
 450  *
 451  * Misc. internal state and helper functions
 452  *
 453  ******************************************************************************/
 454
 455 /* This is necessary only for a number of stats, see the caller. */
 456 static int il3945_is_network_packet(struct il_priv *il,
 457                 struct ieee80211_hdr *header)
 458 {
 459         /* Filter incoming packets to determine if they are targeted toward
 460          * this network, discarding packets coming from ourselves */
 461         switch (il->iw_mode) {
 462         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
 463                 /* packets to our IBSS update information */
 464                 return !compare_ether_addr(header->addr3, il->bssid);
 465         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
 466                 /* packets to our IBSS update information */
 467                 return !compare_ether_addr(header->addr2, il->bssid);
 468         default:
 469                 return 1;
 470         }
 471 }
 472
 473 static void il3945_pass_packet_to_mac80211(struct il_priv *il,
 474                                    struct il_rx_buf *rxb,
 475                                    struct ieee80211_rx_status *stats)
 476 {
 477         struct il_rx_pkt *pkt = rxb_addr(rxb);
 478         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IL_RX_DATA(pkt);
 479         struct il3945_rx_frame_hdr *rx_hdr = IL_RX_HDR(pkt);
 480         struct il3945_rx_frame_end *rx_end = IL_RX_END(pkt);
 481         u16 len = le16_to_cpu(rx_hdr->len);
 482         struct sk_buff *skb;
 483         __le16 fc = hdr->frame_control;
 484
 485         /* We received data from the HW, so stop the watchdog */
 486         if (unlikely(len + IL39_RX_FRAME_SIZE >
 487                      PAGE_SIZE << il->hw_params.rx_page_order)) {
 488                 D_DROP("Corruption detected!\n");
 489                 return;
 490         }
 491
 492         /* We only process data packets if the interface is open */
 493         if (unlikely(!il->is_open)) {
 494                 D_DROP(
 495                         "Dropping packet while interface is not open.\n");
 496                 return;
 497         }
 498
 499         skb = dev_alloc_skb(128);
 500         if (!skb) {
 501                 IL_ERR("dev_alloc_skb failed\n");
 502                 return;
 503         }
 504
 505         if (!il3945_mod_params.sw_crypto)
 506                 il_set_decrypted_flag(il,
 507                                        (struct ieee80211_hdr *)rxb_addr(rxb),
 508                                        le32_to_cpu(rx_end->status), stats);
 509
 510         skb_add_rx_frag(skb, 0, rxb->page,
 511                         (void *)rx_hdr->payload - (void *)pkt, len);
 512
 513         il_update_stats(il, false, fc, len);
 514         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
 515
 516         ieee80211_rx(il->hw, skb);
 517         il->alloc_rxb_page--;
 518         rxb->page = NULL;
 519 }
 520
 521 #define IL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 522
 523 static void il3945_hdl_rx(struct il_priv *il,
 524                                 struct il_rx_buf *rxb)
 525 {
 526         struct ieee80211_hdr *header;
 527         struct ieee80211_rx_status rx_status;
 528         struct il_rx_pkt *pkt = rxb_addr(rxb);
 529         struct il3945_rx_frame_stats *rx_stats = IL_RX_STATS(pkt);
 530         struct il3945_rx_frame_hdr *rx_hdr = IL_RX_HDR(pkt);
 531         struct il3945_rx_frame_end *rx_end = IL_RX_END(pkt);
 532         u16 rx_stats_sig_avg __maybe_unused = le16_to_cpu(rx_stats->sig_avg);
 533         u16 rx_stats_noise_diff __maybe_unused = le16_to_cpu(rx_stats->noise_diff);
 534         u8 network_packet;
 535
 536         rx_status.flag = 0;
 537         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 538         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 539                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 540         rx_status.freq =
 541                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel),
 542                                                rx_status.band);
 543
 544         rx_status.rate_idx = il3945_hwrate_to_plcp_idx(rx_hdr->rate);
 545         if (rx_status.band == IEEE80211_BAND_5GHZ)
 546                 rx_status.rate_idx -= IL_FIRST_OFDM_RATE;
 547
 548         rx_status.antenna = (le16_to_cpu(rx_hdr->phy_flags) &
 549                                         RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
 550
 551         /* set the preamble flag if appropriate */
 552         if (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 553                 rx_status.flag |= RX_FLAG_SHORTPRE;
 554
 555         if ((unlikely(rx_stats->phy_count > 20))) {
 556                 D_DROP("dsp size out of range [0,20]: %d/n",
 557                                 rx_stats->phy_count);
 558                 return;
 559         }
 560
 561         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR) ||
 562             !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 563                 D_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 564                 return;
 565         }
 566
 567
 568
 569         /* Convert 3945's rssi indicator to dBm */
 570         rx_status.signal = rx_stats->rssi - IL39_RSSI_OFFSET;
 571
 572         D_STATS("Rssi %d sig_avg %d noise_diff %d\n",
 573                         rx_status.signal, rx_stats_sig_avg,
 574                         rx_stats_noise_diff);
 575
 576         header = (struct ieee80211_hdr *)IL_RX_DATA(pkt);
 577
 578         network_packet = il3945_is_network_packet(il, header);
 579
 580         D_STATS("[%c] %d RSSI:%d Signal:%u, Rate:%u\n",
 581                               network_packet ? '*' : ' ',
 582                               le16_to_cpu(rx_hdr->channel),
 583                               rx_status.signal, rx_status.signal,
 584                               rx_status.rate_idx);
 585
 586         il_dbg_log_rx_data_frame(il, le16_to_cpu(rx_hdr->len),
 587                                                 header);
 588
 589         if (network_packet) {
 590                 il->_3945.last_beacon_time =
 591                         le32_to_cpu(rx_end->beacon_timestamp);
 592                 il->_3945.last_tsf = le64_to_cpu(rx_end->timestamp);
 593                 il->_3945.last_rx_rssi = rx_status.signal;
 594         }
 595
 596         il3945_pass_packet_to_mac80211(il, rxb, &rx_status);
 597 }
 598
 599 int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il,
 600                                      struct il_tx_queue *txq,
 601                                      dma_addr_t addr, u16 len, u8 reset, u8 pad)
 602 {
 603         int count;
 604         struct il_queue *q;
 605         struct il3945_tfd *tfd, *tfd_tmp;
 606
 607         q = &txq->q;
 608         tfd_tmp = (struct il3945_tfd *)txq->tfds;
 609         tfd = &tfd_tmp[q->write_ptr];
 610
 611         if (reset)
 612                 memset(tfd, 0, sizeof(*tfd));
 613
 614         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 615
 616         if (count >= NUM_TFD_CHUNKS || count < 0) {
 617                 IL_ERR("Error can not send more than %d chunks\n",
 618                           NUM_TFD_CHUNKS);
 619                 return -EINVAL;
 620         }
 621
 622         tfd->tbs[count].addr = cpu_to_le32(addr);
 623         tfd->tbs[count].len = cpu_to_le32(len);
 624
 625         count++;
 626
 627         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 628                                          TFD_CTL_PAD_SET(pad));
 629
 630         return 0;
 631 }
 632
 633 /**
 634  * il3945_hw_txq_free_tfd - Free one TFD, those at idx [txq->q.read_ptr]
 635  *
 636  * Does NOT advance any idxes
 637  */
 638 void il3945_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
 639 {
 640         struct il3945_tfd *tfd_tmp = (struct il3945_tfd *)txq->tfds;
 641         int idx = txq->q.read_ptr;
 642         struct il3945_tfd *tfd = &tfd_tmp[idx];
 643         struct pci_dev *dev = il->pci_dev;
 644         int i;
 645         int counter;
 646
 647         /* sanity check */
 648         counter = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 649         if (counter > NUM_TFD_CHUNKS) {
 650                 IL_ERR("Too many chunks: %i\n", counter);
 651                 /* @todo issue fatal error, it is quite serious situation */
 652                 return;
 653         }
 654
 655         /* Unmap tx_cmd */
 656         if (counter)
 657                 pci_unmap_single(dev,
 658                                 dma_unmap_addr(&txq->meta[idx], mapping),
 659                                 dma_unmap_len(&txq->meta[idx], len),
 660                                 PCI_DMA_TODEVICE);
 661
 662         /* unmap chunks if any */
 663
 664         for (i = 1; i < counter; i++)
 665                 pci_unmap_single(dev, le32_to_cpu(tfd->tbs[i].addr),
 666                          le32_to_cpu(tfd->tbs[i].len), PCI_DMA_TODEVICE);
 667
 668         /* free SKB */
 669         if (txq->txb) {
 670                 struct sk_buff *skb;
 671
 672                 skb = txq->txb[txq->q.read_ptr].skb;
 673
 674                 /* can be called from irqs-disabled context */
 675                 if (skb) {
 676                         dev_kfree_skb_any(skb);
 677                         txq->txb[txq->q.read_ptr].skb = NULL;
 678                 }
 679         }
 680 }
 681
 682 /**
 683  * il3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 684  *
 685 */
 686 void il3945_hw_build_tx_cmd_rate(struct il_priv *il,
 687                                   struct il_device_cmd *cmd,
 688                                   struct ieee80211_tx_info *info,
 689                                   struct ieee80211_hdr *hdr,
 690                                   int sta_id, int tx_id)
 691 {
 692         u16 hw_value = ieee80211_get_tx_rate(il->hw, info)->hw_value;
 693         u16 rate_idx = min(hw_value & 0xffff, RATE_COUNT_3945);
 694         u16 rate_mask;
 695         int rate;
 696         u8 rts_retry_limit;
 697         u8 data_retry_limit;
 698         __le32 tx_flags;
 699         __le16 fc = hdr->frame_control;
 700         struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
 701
 702         rate = il3945_rates[rate_idx].plcp;
 703         tx_flags = tx_cmd->tx_flags;
 704
 705         /* We need to figure out how to get the sta->supp_rates while
 706          * in this running context */
 707         rate_mask = RATES_MASK_3945;
 708
 709         /* Set retry limit on DATA packets and Probe Responses*/
 710         if (ieee80211_is_probe_resp(fc))
 711                 data_retry_limit = 3;
 712         else
 713                 data_retry_limit = IL_DEFAULT_TX_RETRY;
 714         tx_cmd->data_retry_limit = data_retry_limit;
 715
 716         if (tx_id >= IL39_CMD_QUEUE_NUM)
 717                 rts_retry_limit = 3;
 718         else
 719                 rts_retry_limit = 7;
 720
 721         if (data_retry_limit < rts_retry_limit)
 722                 rts_retry_limit = data_retry_limit;
 723         tx_cmd->rts_retry_limit = rts_retry_limit;
 724
 725         tx_cmd->rate = rate;
 726         tx_cmd->tx_flags = tx_flags;
 727
 728         /* OFDM */
 729         tx_cmd->supp_rates[0] =
 730            ((rate_mask & IL_OFDM_RATES_MASK) >> IL_FIRST_OFDM_RATE) & 0xFF;
 731
 732         /* CCK */
 733         tx_cmd->supp_rates[1] = (rate_mask & 0xF);
 734
 735         D_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 736                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 737                        tx_cmd->rate, le32_to_cpu(tx_cmd->tx_flags),
 738                        tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]);
 739 }
 740
 741 static u8 il3945_sync_sta(struct il_priv *il, int sta_id, u16 tx_rate)
 742 {
 743         unsigned long flags_spin;
 744         struct il_station_entry *station;
 745
 746         if (sta_id == IL_INVALID_STATION)
 747                 return IL_INVALID_STATION;
 748
 749         spin_lock_irqsave(&il->sta_lock, flags_spin);
 750         station = &il->stations[sta_id];
 751
 752         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 753         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 754         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 755         il_send_add_sta(il, &station->sta, CMD_ASYNC);
 756         spin_unlock_irqrestore(&il->sta_lock, flags_spin);
 757
 758         D_RATE("SCALE sync station %d to rate %d\n",
 759                         sta_id, tx_rate);
 760         return sta_id;
 761 }
 762
 763 static void il3945_set_pwr_vmain(struct il_priv *il)
 764 {
 765 /*
 766  * (for documentation purposes)
 767  * to set power to V_AUX, do
 768
 769                 if (pci_pme_capable(il->pci_dev, PCI_D3cold)) {
 770                         il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
 771                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 772                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 773
 774                         _il_poll_bit(il, CSR_GPIO_IN,
 775                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 776                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 777                 }
 778  */
 779
 780         il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
 781                         APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 782                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 783
 784         _il_poll_bit(il, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 785                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 786 }
 787
 788 static int il3945_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
 789 {
 790         il_wr(il, FH39_RCSR_RBD_BASE(0), rxq->bd_dma);
 791         il_wr(il, FH39_RCSR_RPTR_ADDR(0),
 792                                         rxq->rb_stts_dma);
 793         il_wr(il, FH39_RCSR_WPTR(0), 0);
 794         il_wr(il, FH39_RCSR_CONFIG(0),
 795                 FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 796                 FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 797                 FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 798                 FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 799                 (RX_QUEUE_SIZE_LOG << FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 800                 FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 801                 (1 << FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
 802                 FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 803
 804         /* fake read to flush all prev I/O */
 805         il_rd(il, FH39_RSSR_CTRL);
 806
 807         return 0;
 808 }
 809
 810 static int il3945_tx_reset(struct il_priv *il)
 811 {
 812
 813         /* bypass mode */
 814         il_wr_prph(il, ALM_SCD_MODE_REG, 0x2);
 815
 816         /* RA 0 is active */
 817         il_wr_prph(il, ALM_SCD_ARASTAT_REG, 0x01);
 818
 819         /* all 6 fifo are active */
 820         il_wr_prph(il, ALM_SCD_TXFACT_REG, 0x3f);
 821
 822         il_wr_prph(il, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
 823         il_wr_prph(il, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
 824         il_wr_prph(il, ALM_SCD_TXF4MF_REG, 0x000004);
 825         il_wr_prph(il, ALM_SCD_TXF5MF_REG, 0x000005);
 826
 827         il_wr(il, FH39_TSSR_CBB_BASE,
 828                              il->_3945.shared_phys);
 829
 830         il_wr(il, FH39_TSSR_MSG_CONFIG,
 831                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
 832                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
 833                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
 834                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
 835                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
 836                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
 837                 FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
 838
 839
 840         return 0;
 841 }
 842
 843 /**
 844  * il3945_txq_ctx_reset - Reset TX queue context
 845  *
 846  * Destroys all DMA structures and initialize them again
 847  */
 848 static int il3945_txq_ctx_reset(struct il_priv *il)
 849 {
 850         int rc;
 851         int txq_id, slots_num;
 852
 853         il3945_hw_txq_ctx_free(il);
 854
 855         /* allocate tx queue structure */
 856         rc = il_alloc_txq_mem(il);
 857         if (rc)
 858                 return rc;
 859
 860         /* Tx CMD queue */
 861         rc = il3945_tx_reset(il);
 862         if (rc)
 863                 goto error;
 864
 865         /* Tx queue(s) */
 866         for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
 867                 slots_num = (txq_id == IL39_CMD_QUEUE_NUM) ?
 868                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
 869                 rc = il_tx_queue_init(il, &il->txq[txq_id],
 870                                                 slots_num, txq_id);
 871                 if (rc) {
 872                         IL_ERR("Tx %d queue init failed\n", txq_id);
 873                         goto error;
 874                 }
 875         }
 876
 877         return rc;
 878
 879  error:
 880         il3945_hw_txq_ctx_free(il);
 881         return rc;
 882 }
 883
 884
 885 /*
 886  * Start up 3945's basic functionality after it has been reset
 887  * (e.g. after platform boot, or shutdown via il_apm_stop())
 888  * NOTE:  This does not load uCode nor start the embedded processor
 889  */
 890 static int il3945_apm_init(struct il_priv *il)
 891 {
 892         int ret = il_apm_init(il);
 893
 894         /* Clear APMG (NIC's internal power management) interrupts */
 895         il_wr_prph(il, APMG_RTC_INT_MSK_REG, 0x0);
 896         il_wr_prph(il, APMG_RTC_INT_STT_REG, 0xFFFFFFFF);
 897
 898         /* Reset radio chip */
 899         il_set_bits_prph(il, APMG_PS_CTRL_REG,
 900                                 APMG_PS_CTRL_VAL_RESET_REQ);
 901         udelay(5);
 902         il_clear_bits_prph(il, APMG_PS_CTRL_REG,
 903                                 APMG_PS_CTRL_VAL_RESET_REQ);
 904
 905         return ret;
 906 }
 907
 908 static void il3945_nic_config(struct il_priv *il)
 909 {
 910         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
 911         unsigned long flags;
 912         u8 rev_id = il->pci_dev->revision;
 913
 914         spin_lock_irqsave(&il->lock, flags);
 915
 916         /* Determine HW type */
 917         D_INFO("HW Revision ID = 0x%X\n", rev_id);
 918
 919         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
 920                 D_INFO("RTP type\n");
 921         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
 922                 D_INFO("3945 RADIO-MB type\n");
 923                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 924                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
 925         } else {
 926                 D_INFO("3945 RADIO-MM type\n");
 927                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 928                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
 929         }
 930
 931         if (EEPROM_SKU_CAP_OP_MODE_MRC == eeprom->sku_cap) {
 932                 D_INFO("SKU OP mode is mrc\n");
 933                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 934                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
 935         } else
 936                 D_INFO("SKU OP mode is basic\n");
 937
 938         if ((eeprom->board_revision & 0xF0) == 0xD0) {
 939                 D_INFO("3945ABG revision is 0x%X\n",
 940                                eeprom->board_revision);
 941                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 942                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 943         } else {
 944                 D_INFO("3945ABG revision is 0x%X\n",
 945                                eeprom->board_revision);
 946                 il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
 947                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 948         }
 949
 950         if (eeprom->almgor_m_version <= 1) {
 951                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 952                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
 953                 D_INFO("Card M type A version is 0x%X\n",
 954                                eeprom->almgor_m_version);
 955         } else {
 956                 D_INFO("Card M type B version is 0x%X\n",
 957                                eeprom->almgor_m_version);
 958                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 959                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
 960         }
 961         spin_unlock_irqrestore(&il->lock, flags);
 962
 963         if (eeprom->sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
 964                 D_RF_KILL("SW RF KILL supported in EEPROM.\n");
 965
 966         if (eeprom->sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
 967                 D_RF_KILL("HW RF KILL supported in EEPROM.\n");
 968 }
 969
 970 int il3945_hw_nic_init(struct il_priv *il)
 971 {
 972         int rc;
 973         unsigned long flags;
 974         struct il_rx_queue *rxq = &il->rxq;
 975
 976         spin_lock_irqsave(&il->lock, flags);
 977         il->cfg->ops->lib->apm_ops.init(il);
 978         spin_unlock_irqrestore(&il->lock, flags);
 979
 980         il3945_set_pwr_vmain(il);
 981
 982         il->cfg->ops->lib->apm_ops.config(il);
 983
 984         /* Allocate the RX queue, or reset if it is already allocated */
 985         if (!rxq->bd) {
 986                 rc = il_rx_queue_alloc(il);
 987                 if (rc) {
 988                         IL_ERR("Unable to initialize Rx queue\n");
 989                         return -ENOMEM;
 990                 }
 991         } else
 992                 il3945_rx_queue_reset(il, rxq);
 993
 994         il3945_rx_replenish(il);
 995
 996         il3945_rx_init(il, rxq);
 997
 998
 999         /* Look at using this instead:
1000         rxq->need_update = 1;
1001         il_rx_queue_update_write_ptr(il, rxq);
1002         */
1003
1004         il_wr(il, FH39_RCSR_WPTR(0), rxq->write & ~7);
1005
1006         rc = il3945_txq_ctx_reset(il);
1007         if (rc)
1008                 return rc;
1009
1010         set_bit(S_INIT, &il->status);
1011
1012         return 0;
1013 }
1014
1015 /**
1016  * il3945_hw_txq_ctx_free - Free TXQ Context
1017  *
1018  * Destroy all TX DMA queues and structures
1019  */
1020 void il3945_hw_txq_ctx_free(struct il_priv *il)
1021 {
1022         int txq_id;
1023
1024         /* Tx queues */
1025         if (il->txq)
1026                 for (txq_id = 0; txq_id < il->hw_params.max_txq_num;
1027                      txq_id++)
1028                         if (txq_id == IL39_CMD_QUEUE_NUM)
1029                                 il_cmd_queue_free(il);
1030                         else
1031                                 il_tx_queue_free(il, txq_id);
1032
1033         /* free tx queue structure */
1034         il_txq_mem(il);
1035 }
1036
1037 void il3945_hw_txq_ctx_stop(struct il_priv *il)
1038 {
1039         int txq_id;
1040
1041         /* stop SCD */
1042         il_wr_prph(il, ALM_SCD_MODE_REG, 0);
1043         il_wr_prph(il, ALM_SCD_TXFACT_REG, 0);
1044
1045         /* reset TFD queues */
1046         for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
1047                 il_wr(il, FH39_TCSR_CONFIG(txq_id), 0x0);
1048                 il_poll_bit(il, FH39_TSSR_TX_STATUS,
1049                                 FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(txq_id),
1050                                 1000);
1051         }
1052
1053         il3945_hw_txq_ctx_free(il);
1054 }
1055
1056 /**
1057  * il3945_hw_reg_adjust_power_by_temp
1058  * return idx delta into power gain settings table
1059 */
1060 static int il3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1061 {
1062         return (new_reading - old_reading) * (-11) / 100;
1063 }
1064
1065 /**
1066  * il3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1067  */
1068 static inline int il3945_hw_reg_temp_out_of_range(int temperature)
1069 {
1070         return (temperature < -260 || temperature > 25) ? 1 : 0;
1071 }
1072
1073 int il3945_hw_get_temperature(struct il_priv *il)
1074 {
1075         return _il_rd(il, CSR_UCODE_DRV_GP2);
1076 }
1077
1078 /**
1079  * il3945_hw_reg_txpower_get_temperature
1080  * get the current temperature by reading from NIC
1081 */
1082 static int il3945_hw_reg_txpower_get_temperature(struct il_priv *il)
1083 {
1084         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1085         int temperature;
1086
1087         temperature = il3945_hw_get_temperature(il);
1088
1089         /* driver's okay range is -260 to +25.
1090          *   human readable okay range is 0 to +285 */
1091         D_INFO("Temperature: %d\n", temperature + IL_TEMP_CONVERT);
1092
1093         /* handle insane temp reading */
1094         if (il3945_hw_reg_temp_out_of_range(temperature)) {
1095                 IL_ERR("Error bad temperature value  %d\n", temperature);
1096
1097                 /* if really really hot(?),
1098                  *   substitute the 3rd band/group's temp measured at factory */
1099                 if (il->last_temperature > 100)
1100                         temperature = eeprom->groups[2].temperature;
1101                 else /* else use most recent "sane" value from driver */
1102                         temperature = il->last_temperature;
1103         }
1104
1105         return temperature;     /* raw, not "human readable" */
1106 }
1107
1108 /* Adjust Txpower only if temperature variance is greater than threshold.
1109  *
1110  * Both are lower than older versions' 9 degrees */
1111 #define IL_TEMPERATURE_LIMIT_TIMER   6
1112
1113 /**
1114  * il3945_is_temp_calib_needed - determines if new calibration is needed
1115  *
1116  * records new temperature in tx_mgr->temperature.
1117  * replaces tx_mgr->last_temperature *only* if calib needed
1118  *    (assumes caller will actually do the calibration!). */
1119 static int il3945_is_temp_calib_needed(struct il_priv *il)
1120 {
1121         int temp_diff;
1122
1123         il->temperature = il3945_hw_reg_txpower_get_temperature(il);
1124         temp_diff = il->temperature - il->last_temperature;
1125
1126         /* get absolute value */
1127         if (temp_diff < 0) {
1128                 D_POWER("Getting cooler, delta %d,\n", temp_diff);
1129                 temp_diff = -temp_diff;
1130         } else if (temp_diff == 0)
1131                 D_POWER("Same temp,\n");
1132         else
1133                 D_POWER("Getting warmer, delta %d,\n", temp_diff);
1134
1135         /* if we don't need calibration, *don't* update last_temperature */
1136         if (temp_diff < IL_TEMPERATURE_LIMIT_TIMER) {
1137                 D_POWER("Timed thermal calib not needed\n");
1138                 return 0;
1139         }
1140
1141         D_POWER("Timed thermal calib needed\n");
1142
1143         /* assume that caller will actually do calib ...
1144          *   update the "last temperature" value */
1145         il->last_temperature = il->temperature;
1146         return 1;
1147 }
1148
1149 #define IL_MAX_GAIN_ENTRIES 78
1150 #define IL_CCK_FROM_OFDM_POWER_DIFF  -5
1151 #define IL_CCK_FROM_OFDM_IDX_DIFF (10)
1152
1153 /* radio and DSP power table, each step is 1/2 dB.
1154  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1155 static struct il3945_tx_power power_gain_table[2][IL_MAX_GAIN_ENTRIES] = {
1156         {
1157          {251, 127},            /* 2.4 GHz, highest power */
1158          {251, 127},
1159          {251, 127},
1160          {251, 127},
1161          {251, 125},
1162          {251, 110},
1163          {251, 105},
1164          {251, 98},
1165          {187, 125},
1166          {187, 115},
1167          {187, 108},
1168          {187, 99},
1169          {243, 119},
1170          {243, 111},
1171          {243, 105},
1172          {243, 97},
1173          {243, 92},
1174          {211, 106},
1175          {211, 100},
1176          {179, 120},
1177          {179, 113},
1178          {179, 107},
1179          {147, 125},
1180          {147, 119},
1181          {147, 112},
1182          {147, 106},
1183          {147, 101},
1184          {147, 97},
1185          {147, 91},
1186          {115, 107},
1187          {235, 121},
1188          {235, 115},
1189          {235, 109},
1190          {203, 127},
1191          {203, 121},
1192          {203, 115},
1193          {203, 108},
1194          {203, 102},
1195          {203, 96},
1196          {203, 92},
1197          {171, 110},
1198          {171, 104},
1199          {171, 98},
1200          {139, 116},
1201          {227, 125},
1202          {227, 119},
1203          {227, 113},
1204          {227, 107},
1205          {227, 101},
1206          {227, 96},
1207          {195, 113},
1208          {195, 106},
1209          {195, 102},
1210          {195, 95},
1211          {163, 113},
1212          {163, 106},
1213          {163, 102},
1214          {163, 95},
1215          {131, 113},
1216          {131, 106},
1217          {131, 102},
1218          {131, 95},
1219          {99, 113},
1220          {99, 106},
1221          {99, 102},
1222          {99, 95},
1223          {67, 113},
1224          {67, 106},
1225          {67, 102},
1226          {67, 95},
1227          {35, 113},
1228          {35, 106},
1229          {35, 102},
1230          {35, 95},
1231          {3, 113},
1232          {3, 106},
1233          {3, 102},
1234          {3, 95} },             /* 2.4 GHz, lowest power */
1235         {
1236          {251, 127},            /* 5.x GHz, highest power */
1237          {251, 120},
1238          {251, 114},
1239          {219, 119},
1240          {219, 101},
1241          {187, 113},
1242          {187, 102},
1243          {155, 114},
1244          {155, 103},
1245          {123, 117},
1246          {123, 107},
1247          {123, 99},
1248          {123, 92},
1249          {91, 108},
1250          {59, 125},
1251          {59, 118},
1252          {59, 109},
1253          {59, 102},
1254          {59, 96},
1255          {59, 90},
1256          {27, 104},
1257          {27, 98},
1258          {27, 92},
1259          {115, 118},
1260          {115, 111},
1261          {115, 104},
1262          {83, 126},
1263          {83, 121},
1264          {83, 113},
1265          {83, 105},
1266          {83, 99},
1267          {51, 118},
1268          {51, 111},
1269          {51, 104},
1270          {51, 98},
1271          {19, 116},
1272          {19, 109},
1273          {19, 102},
1274          {19, 98},
1275          {19, 93},
1276          {171, 113},
1277          {171, 107},
1278          {171, 99},
1279          {139, 120},
1280          {139, 113},
1281          {139, 107},
1282          {139, 99},
1283          {107, 120},
1284          {107, 113},
1285          {107, 107},
1286          {107, 99},
1287          {75, 120},
1288          {75, 113},
1289          {75, 107},
1290          {75, 99},
1291          {43, 120},
1292          {43, 113},
1293          {43, 107},
1294          {43, 99},
1295          {11, 120},
1296          {11, 113},
1297          {11, 107},
1298          {11, 99},
1299          {131, 107},
1300          {131, 99},
1301          {99, 120},
1302          {99, 113},
1303          {99, 107},
1304          {99, 99},
1305          {67, 120},
1306          {67, 113},
1307          {67, 107},
1308          {67, 99},
1309          {35, 120},
1310          {35, 113},
1311          {35, 107},
1312          {35, 99},
1313          {3, 120} }             /* 5.x GHz, lowest power */
1314 };
1315
1316 static inline u8 il3945_hw_reg_fix_power_idx(int idx)
1317 {
1318         if (idx < 0)
1319                 return 0;
1320         if (idx >= IL_MAX_GAIN_ENTRIES)
1321                 return IL_MAX_GAIN_ENTRIES - 1;
1322         return (u8) idx;
1323 }
1324
1325 /* Kick off thermal recalibration check every 60 seconds */
1326 #define REG_RECALIB_PERIOD (60)
1327
1328 /**
1329  * il3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1330  *
1331  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1332  * or 6 Mbit (OFDM) rates.
1333  */
1334 static void il3945_hw_reg_set_scan_power(struct il_priv *il, u32 scan_tbl_idx,
1335                                s32 rate_idx, const s8 *clip_pwrs,
1336                                struct il_channel_info *ch_info,
1337                                int band_idx)
1338 {
1339         struct il3945_scan_power_info *scan_power_info;
1340         s8 power;
1341         u8 power_idx;
1342
1343         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_idx];
1344
1345         /* use this channel group's 6Mbit clipping/saturation pwr,
1346          *   but cap at regulatory scan power restriction (set during init
1347          *   based on eeprom channel data) for this channel.  */
1348         power = min(ch_info->scan_power, clip_pwrs[RATE_6M_IDX_TBL]);
1349
1350         power = min(power, il->tx_power_user_lmt);
1351         scan_power_info->requested_power = power;
1352
1353         /* find difference between new scan *power* and current "normal"
1354          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1355          *   current "normal" temperature-compensated Tx power *idx* for
1356          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1357          *   *idx*. */
1358         power_idx = ch_info->power_info[rate_idx].power_table_idx
1359             - (power - ch_info->power_info
1360                [RATE_6M_IDX_TBL].requested_power) * 2;
1361
1362         /* store reference idx that we use when adjusting *all* scan
1363          *   powers.  So we can accommodate user (all channel) or spectrum
1364          *   management (single channel) power changes "between" temperature
1365          *   feedback compensation procedures.
1366          * don't force fit this reference idx into gain table; it may be a
1367          *   negative number.  This will help avoid errors when we're at
1368          *   the lower bounds (highest gains, for warmest temperatures)
1369          *   of the table. */
1370
1371         /* don't exceed table bounds for "real" setting */
1372         power_idx = il3945_hw_reg_fix_power_idx(power_idx);
1373
1374         scan_power_info->power_table_idx = power_idx;
1375         scan_power_info->tpc.tx_gain =
1376             power_gain_table[band_idx][power_idx].tx_gain;
1377         scan_power_info->tpc.dsp_atten =
1378             power_gain_table[band_idx][power_idx].dsp_atten;
1379 }
1380
1381 /**
1382  * il3945_send_tx_power - fill in Tx Power command with gain settings
1383  *
1384  * Configures power settings for all rates for the current channel,
1385  * using values from channel info struct, and send to NIC
1386  */
1387 static int il3945_send_tx_power(struct il_priv *il)
1388 {
1389         int rate_idx, i;
1390         const struct il_channel_info *ch_info = NULL;
1391         struct il3945_txpowertable_cmd txpower = {
1392                 .channel = il->ctx.active.channel,
1393         };
1394         u16 chan;
1395
1396         if (WARN_ONCE(test_bit(S_SCAN_HW, &il->status),
1397                       "TX Power requested while scanning!\n"))
1398                 return -EAGAIN;
1399
1400         chan = le16_to_cpu(il->ctx.active.channel);
1401
1402         txpower.band = (il->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1403         ch_info = il_get_channel_info(il, il->band, chan);
1404         if (!ch_info) {
1405                 IL_ERR(
1406                         "Failed to get channel info for channel %d [%d]\n",
1407                         chan, il->band);
1408                 return -EINVAL;
1409         }
1410
1411         if (!il_is_channel_valid(ch_info)) {
1412                 D_POWER("Not calling TX_PWR_TBL_CMD on "
1413                                 "non-Tx channel.\n");
1414                 return 0;
1415         }
1416
1417         /* fill cmd with power settings for all rates for current channel */
1418         /* Fill OFDM rate */
1419         for (rate_idx = IL_FIRST_OFDM_RATE, i = 0;
1420              rate_idx <= IL39_LAST_OFDM_RATE; rate_idx++, i++) {
1421
1422                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1423                 txpower.power[i].rate = il3945_rates[rate_idx].plcp;
1424
1425                 D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1426                                 le16_to_cpu(txpower.channel),
1427                                 txpower.band,
1428                                 txpower.power[i].tpc.tx_gain,
1429                                 txpower.power[i].tpc.dsp_atten,
1430                                 txpower.power[i].rate);
1431         }
1432         /* Fill CCK rates */
1433         for (rate_idx = IL_FIRST_CCK_RATE;
1434              rate_idx <= IL_LAST_CCK_RATE; rate_idx++, i++) {
1435                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1436                 txpower.power[i].rate = il3945_rates[rate_idx].plcp;
1437
1438                 D_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1439                                 le16_to_cpu(txpower.channel),
1440                                 txpower.band,
1441                                 txpower.power[i].tpc.tx_gain,
1442                                 txpower.power[i].tpc.dsp_atten,
1443                                 txpower.power[i].rate);
1444         }
1445
1446         return il_send_cmd_pdu(il, C_TX_PWR_TBL,
1447                                 sizeof(struct il3945_txpowertable_cmd),
1448                                 &txpower);
1449
1450 }
1451
1452 /**
1453  * il3945_hw_reg_set_new_power - Configures power tables at new levels
1454  * @ch_info: Channel to update.  Uses power_info.requested_power.
1455  *
1456  * Replace requested_power and base_power_idx ch_info fields for
1457  * one channel.
1458  *
1459  * Called if user or spectrum management changes power preferences.
1460  * Takes into account h/w and modulation limitations (clip power).
1461  *
1462  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1463  *
1464  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1465  *       properly fill out the scan powers, and actual h/w gain settings,
1466  *       and send changes to NIC
1467  */
1468 static int il3945_hw_reg_set_new_power(struct il_priv *il,
1469                              struct il_channel_info *ch_info)
1470 {
1471         struct il3945_channel_power_info *power_info;
1472         int power_changed = 0;
1473         int i;
1474         const s8 *clip_pwrs;
1475         int power;
1476
1477         /* Get this chnlgrp's rate-to-max/clip-powers table */
1478         clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers;
1479
1480         /* Get this channel's rate-to-current-power settings table */
1481         power_info = ch_info->power_info;
1482
1483         /* update OFDM Txpower settings */
1484         for (i = RATE_6M_IDX_TBL; i <= RATE_54M_IDX_TBL;
1485              i++, ++power_info) {
1486                 int delta_idx;
1487
1488                 /* limit new power to be no more than h/w capability */
1489                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1490                 if (power == power_info->requested_power)
1491                         continue;
1492
1493                 /* find difference between old and new requested powers,
1494                  *    update base (non-temp-compensated) power idx */
1495                 delta_idx = (power - power_info->requested_power) * 2;
1496                 power_info->base_power_idx -= delta_idx;
1497
1498                 /* save new requested power value */
1499                 power_info->requested_power = power;
1500
1501                 power_changed = 1;
1502         }
1503
1504         /* update CCK Txpower settings, based on OFDM 12M setting ...
1505          *    ... all CCK power settings for a given channel are the *same*. */
1506         if (power_changed) {
1507                 power =
1508                     ch_info->power_info[RATE_12M_IDX_TBL].
1509                     requested_power + IL_CCK_FROM_OFDM_POWER_DIFF;
1510
1511                 /* do all CCK rates' il3945_channel_power_info structures */
1512                 for (i = RATE_1M_IDX_TBL; i <= RATE_11M_IDX_TBL; i++) {
1513                         power_info->requested_power = power;
1514                         power_info->base_power_idx =
1515                             ch_info->power_info[RATE_12M_IDX_TBL].
1516                             base_power_idx + IL_CCK_FROM_OFDM_IDX_DIFF;
1517                         ++power_info;
1518                 }
1519         }
1520
1521         return 0;
1522 }
1523
1524 /**
1525  * il3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1526  *
1527  * NOTE: Returned power limit may be less (but not more) than requested,
1528  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1529  *       (no consideration for h/w clipping limitations).
1530  */
1531 static int il3945_hw_reg_get_ch_txpower_limit(struct il_channel_info *ch_info)
1532 {
1533         s8 max_power;
1534
1535 #if 0
1536         /* if we're using TGd limits, use lower of TGd or EEPROM */
1537         if (ch_info->tgd_data.max_power != 0)
1538                 max_power = min(ch_info->tgd_data.max_power,
1539                                 ch_info->eeprom.max_power_avg);
1540
1541         /* else just use EEPROM limits */
1542         else
1543 #endif
1544                 max_power = ch_info->eeprom.max_power_avg;
1545
1546         return min(max_power, ch_info->max_power_avg);
1547 }
1548
1549 /**
1550  * il3945_hw_reg_comp_txpower_temp - Compensate for temperature
1551  *
1552  * Compensate txpower settings of *all* channels for temperature.
1553  * This only accounts for the difference between current temperature
1554  *   and the factory calibration temperatures, and bases the new settings
1555  *   on the channel's base_power_idx.
1556  *
1557  * If RxOn is "associated", this sends the new Txpower to NIC!
1558  */
1559 static int il3945_hw_reg_comp_txpower_temp(struct il_priv *il)
1560 {
1561         struct il_channel_info *ch_info = NULL;
1562         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1563         int delta_idx;
1564         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1565         u8 a_band;
1566         u8 rate_idx;
1567         u8 scan_tbl_idx;
1568         u8 i;
1569         int ref_temp;
1570         int temperature = il->temperature;
1571
1572         if (il->disable_tx_power_cal ||
1573             test_bit(S_SCANNING, &il->status)) {
1574                 /* do not perform tx power calibration */
1575                 return 0;
1576         }
1577         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1578         for (i = 0; i < il->channel_count; i++) {
1579                 ch_info = &il->channel_info[i];
1580                 a_band = il_is_channel_a_band(ch_info);
1581
1582                 /* Get this chnlgrp's factory calibration temperature */
1583                 ref_temp = (s16)eeprom->groups[ch_info->group_idx].
1584                     temperature;
1585
1586                 /* get power idx adjustment based on current and factory
1587                  * temps */
1588                 delta_idx = il3945_hw_reg_adjust_power_by_temp(temperature,
1589                                                               ref_temp);
1590
1591                 /* set tx power value for all rates, OFDM and CCK */
1592                 for (rate_idx = 0; rate_idx < RATE_COUNT_3945;
1593                      rate_idx++) {
1594                         int power_idx =
1595                             ch_info->power_info[rate_idx].base_power_idx;
1596
1597                         /* temperature compensate */
1598                         power_idx += delta_idx;
1599
1600                         /* stay within table range */
1601                         power_idx = il3945_hw_reg_fix_power_idx(power_idx);
1602                         ch_info->power_info[rate_idx].
1603                             power_table_idx = (u8) power_idx;
1604                         ch_info->power_info[rate_idx].tpc =
1605                             power_gain_table[a_band][power_idx];
1606                 }
1607
1608                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1609                 clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers;
1610
1611                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1612                 for (scan_tbl_idx = 0;
1613                      scan_tbl_idx < IL_NUM_SCAN_RATES; scan_tbl_idx++) {
1614                         s32 actual_idx = (scan_tbl_idx == 0) ?
1615                             RATE_1M_IDX_TBL : RATE_6M_IDX_TBL;
1616                         il3945_hw_reg_set_scan_power(il, scan_tbl_idx,
1617                                            actual_idx, clip_pwrs,
1618                                            ch_info, a_band);
1619                 }
1620         }
1621
1622         /* send Txpower command for current channel to ucode */
1623         return il->cfg->ops->lib->send_tx_power(il);
1624 }
1625
1626 int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power)
1627 {
1628         struct il_channel_info *ch_info;
1629         s8 max_power;
1630         u8 a_band;
1631         u8 i;
1632
1633         if (il->tx_power_user_lmt == power) {
1634                 D_POWER("Requested Tx power same as current "
1635                                 "limit: %ddBm.\n", power);
1636                 return 0;
1637         }
1638
1639         D_POWER("Setting upper limit clamp to %ddBm.\n", power);
1640         il->tx_power_user_lmt = power;
1641
1642         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1643
1644         for (i = 0; i < il->channel_count; i++) {
1645                 ch_info = &il->channel_info[i];
1646                 a_band = il_is_channel_a_band(ch_info);
1647
1648                 /* find minimum power of all user and regulatory constraints
1649                  *    (does not consider h/w clipping limitations) */
1650                 max_power = il3945_hw_reg_get_ch_txpower_limit(ch_info);
1651                 max_power = min(power, max_power);
1652                 if (max_power != ch_info->curr_txpow) {
1653                         ch_info->curr_txpow = max_power;
1654
1655                         /* this considers the h/w clipping limitations */
1656                         il3945_hw_reg_set_new_power(il, ch_info);
1657                 }
1658         }
1659
1660         /* update txpower settings for all channels,
1661          *   send to NIC if associated. */
1662         il3945_is_temp_calib_needed(il);
1663         il3945_hw_reg_comp_txpower_temp(il);
1664
1665         return 0;
1666 }
1667
1668 static int il3945_send_rxon_assoc(struct il_priv *il,
1669                                    struct il_rxon_context *ctx)
1670 {
1671         int rc = 0;
1672         struct il_rx_pkt *pkt;
1673         struct il3945_rxon_assoc_cmd rxon_assoc;
1674         struct il_host_cmd cmd = {
1675                 .id = C_RXON_ASSOC,
1676                 .len = sizeof(rxon_assoc),
1677                 .flags = CMD_WANT_SKB,
1678                 .data = &rxon_assoc,
1679         };
1680         const struct il_rxon_cmd *rxon1 = &ctx->staging;
1681         const struct il_rxon_cmd *rxon2 = &ctx->active;
1682
1683         if (rxon1->flags == rxon2->flags &&
1684             rxon1->filter_flags == rxon2->filter_flags &&
1685             rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
1686             rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
1687                 D_INFO("Using current RXON_ASSOC.  Not resending.\n");
1688                 return 0;
1689         }
1690
1691         rxon_assoc.flags = ctx->staging.flags;
1692         rxon_assoc.filter_flags = ctx->staging.filter_flags;
1693         rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
1694         rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
1695         rxon_assoc.reserved = 0;
1696
1697         rc = il_send_cmd_sync(il, &cmd);
1698         if (rc)
1699                 return rc;
1700
1701         pkt = (struct il_rx_pkt *)cmd.reply_page;
1702         if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1703                 IL_ERR("Bad return from C_RXON_ASSOC command\n");
1704                 rc = -EIO;
1705         }
1706
1707         il_free_pages(il, cmd.reply_page);
1708
1709         return rc;
1710 }
1711
1712 /**
1713  * il3945_commit_rxon - commit staging_rxon to hardware
1714  *
1715  * The RXON command in staging_rxon is committed to the hardware and
1716  * the active_rxon structure is updated with the new data.  This
1717  * function correctly transitions out of the RXON_ASSOC_MSK state if
1718  * a HW tune is required based on the RXON structure changes.
1719  */
1720 int il3945_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx)
1721 {
1722         /* cast away the const for active_rxon in this function */
1723         struct il3945_rxon_cmd *active_rxon = (void *)&ctx->active;
1724         struct il3945_rxon_cmd *staging_rxon = (void *)&ctx->staging;
1725         int rc = 0;
1726         bool new_assoc = !!(staging_rxon->filter_flags & RXON_FILTER_ASSOC_MSK);
1727
1728         if (test_bit(S_EXIT_PENDING, &il->status))
1729                 return -EINVAL;
1730
1731         if (!il_is_alive(il))
1732                 return -1;
1733
1734         /* always get timestamp with Rx frame */
1735         staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
1736
1737         /* select antenna */
1738         staging_rxon->flags &=
1739             ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1740         staging_rxon->flags |= il3945_get_antenna_flags(il);
1741
1742         rc = il_check_rxon_cmd(il, ctx);
1743         if (rc) {
1744                 IL_ERR("Invalid RXON configuration.  Not committing.\n");
1745                 return -EINVAL;
1746         }
1747
1748         /* If we don't need to send a full RXON, we can use
1749          * il3945_rxon_assoc_cmd which is used to reconfigure filter
1750          * and other flags for the current radio configuration. */
1751         if (!il_full_rxon_required(il,
1752                         &il->ctx)) {
1753                 rc = il_send_rxon_assoc(il,
1754                                          &il->ctx);
1755                 if (rc) {
1756                         IL_ERR("Error setting RXON_ASSOC "
1757                                   "configuration (%d).\n", rc);
1758                         return rc;
1759                 }
1760
1761                 memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1762                 /*
1763                  * We do not commit tx power settings while channel changing,
1764                  * do it now if tx power changed.
1765                  */
1766                 il_set_tx_power(il, il->tx_power_next, false);
1767                 return 0;
1768         }
1769
1770         /* If we are currently associated and the new config requires
1771          * an RXON_ASSOC and the new config wants the associated mask enabled,
1772          * we must clear the associated from the active configuration
1773          * before we apply the new config */
1774         if (il_is_associated(il) && new_assoc) {
1775                 D_INFO("Toggling associated bit on current RXON\n");
1776                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1777
1778                 /*
1779                  * reserved4 and 5 could have been filled by the iwlcore code.
1780                  * Let's clear them before pushing to the 3945.
1781                  */
1782                 active_rxon->reserved4 = 0;
1783                 active_rxon->reserved5 = 0;
1784                 rc = il_send_cmd_pdu(il, C_RXON,
1785                                       sizeof(struct il3945_rxon_cmd),
1786                                       &il->ctx.active);
1787
1788                 /* If the mask clearing failed then we set
1789                  * active_rxon back to what it was previously */
1790                 if (rc) {
1791                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1792                         IL_ERR("Error clearing ASSOC_MSK on current "
1793                                   "configuration (%d).\n", rc);
1794                         return rc;
1795                 }
1796                 il_clear_ucode_stations(il,
1797                                          &il->ctx);
1798                 il_restore_stations(il,
1799                                          &il->ctx);
1800         }
1801
1802         D_INFO("Sending RXON\n"
1803                        "* with%s RXON_FILTER_ASSOC_MSK\n"
1804                        "* channel = %d\n"
1805                        "* bssid = %pM\n",
1806                        (new_assoc ? "" : "out"),
1807                        le16_to_cpu(staging_rxon->channel),
1808                        staging_rxon->bssid_addr);
1809
1810         /*
1811          * reserved4 and 5 could have been filled by the iwlcore code.
1812          * Let's clear them before pushing to the 3945.
1813          */
1814         staging_rxon->reserved4 = 0;
1815         staging_rxon->reserved5 = 0;
1816
1817         il_set_rxon_hwcrypto(il, ctx, !il3945_mod_params.sw_crypto);
1818
1819         /* Apply the new configuration */
1820         rc = il_send_cmd_pdu(il, C_RXON,
1821                               sizeof(struct il3945_rxon_cmd),
1822                               staging_rxon);
1823         if (rc) {
1824                 IL_ERR("Error setting new configuration (%d).\n", rc);
1825                 return rc;
1826         }
1827
1828         memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
1829
1830         if (!new_assoc) {
1831                 il_clear_ucode_stations(il,
1832                                          &il->ctx);
1833                 il_restore_stations(il,
1834                                         &il->ctx);
1835         }
1836
1837         /* If we issue a new RXON command which required a tune then we must
1838          * send a new TXPOWER command or we won't be able to Tx any frames */
1839         rc = il_set_tx_power(il, il->tx_power_next, true);
1840         if (rc) {
1841                 IL_ERR("Error setting Tx power (%d).\n", rc);
1842                 return rc;
1843         }
1844
1845         /* Init the hardware's rate fallback order based on the band */
1846         rc = il3945_init_hw_rate_table(il);
1847         if (rc) {
1848                 IL_ERR("Error setting HW rate table: %02X\n", rc);
1849                 return -EIO;
1850         }
1851
1852         return 0;
1853 }
1854
1855 /**
1856  * il3945_reg_txpower_periodic -  called when time to check our temperature.
1857  *
1858  * -- reset periodic timer
1859  * -- see if temp has changed enough to warrant re-calibration ... if so:
1860  *     -- correct coeffs for temp (can reset temp timer)
1861  *     -- save this temp as "last",
1862  *     -- send new set of gain settings to NIC
1863  * NOTE:  This should continue working, even when we're not associated,
1864  *   so we can keep our internal table of scan powers current. */
1865 void il3945_reg_txpower_periodic(struct il_priv *il)
1866 {
1867         /* This will kick in the "brute force"
1868          * il3945_hw_reg_comp_txpower_temp() below */
1869         if (!il3945_is_temp_calib_needed(il))
1870                 goto reschedule;
1871
1872         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1873          * This is based *only* on current temperature,
1874          * ignoring any previous power measurements */
1875         il3945_hw_reg_comp_txpower_temp(il);
1876
1877  reschedule:
1878         queue_delayed_work(il->workqueue,
1879                            &il->_3945.thermal_periodic, REG_RECALIB_PERIOD * HZ);
1880 }
1881
1882 static void il3945_bg_reg_txpower_periodic(struct work_struct *work)
1883 {
1884         struct il_priv *il = container_of(work, struct il_priv,
1885                                              _3945.thermal_periodic.work);
1886
1887         if (test_bit(S_EXIT_PENDING, &il->status))
1888                 return;
1889
1890         mutex_lock(&il->mutex);
1891         il3945_reg_txpower_periodic(il);
1892         mutex_unlock(&il->mutex);
1893 }
1894
1895 /**
1896  * il3945_hw_reg_get_ch_grp_idx - find the channel-group idx (0-4)
1897  *                                 for the channel.
1898  *
1899  * This function is used when initializing channel-info structs.
1900  *
1901  * NOTE: These channel groups do *NOT* match the bands above!
1902  *       These channel groups are based on factory-tested channels;
1903  *       on A-band, EEPROM's "group frequency" entries represent the top
1904  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1905  */
1906 static u16 il3945_hw_reg_get_ch_grp_idx(struct il_priv *il,
1907                                        const struct il_channel_info *ch_info)
1908 {
1909         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1910         struct il3945_eeprom_txpower_group *ch_grp = &eeprom->groups[0];
1911         u8 group;
1912         u16 group_idx = 0;      /* based on factory calib frequencies */
1913         u8 grp_channel;
1914
1915         /* Find the group idx for the channel ... don't use idx 1(?) */
1916         if (il_is_channel_a_band(ch_info)) {
1917                 for (group = 1; group < 5; group++) {
1918                         grp_channel = ch_grp[group].group_channel;
1919                         if (ch_info->channel <= grp_channel) {
1920                                 group_idx = group;
1921                                 break;
1922                         }
1923                 }
1924                 /* group 4 has a few channels *above* its factory cal freq */
1925                 if (group == 5)
1926                         group_idx = 4;
1927         } else
1928                 group_idx = 0;  /* 2.4 GHz, group 0 */
1929
1930         D_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1931                         group_idx);
1932         return group_idx;
1933 }
1934
1935 /**
1936  * il3945_hw_reg_get_matched_power_idx - Interpolate to get nominal idx
1937  *
1938  * Interpolate to get nominal (i.e. at factory calibration temperature) idx
1939  *   into radio/DSP gain settings table for requested power.
1940  */
1941 static int il3945_hw_reg_get_matched_power_idx(struct il_priv *il,
1942                                        s8 requested_power,
1943                                        s32 setting_idx, s32 *new_idx)
1944 {
1945         const struct il3945_eeprom_txpower_group *chnl_grp = NULL;
1946         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1947         s32 idx0, idx1;
1948         s32 power = 2 * requested_power;
1949         s32 i;
1950         const struct il3945_eeprom_txpower_sample *samples;
1951         s32 gains0, gains1;
1952         s32 res;
1953         s32 denominator;
1954
1955         chnl_grp = &eeprom->groups[setting_idx];
1956         samples = chnl_grp->samples;
1957         for (i = 0; i < 5; i++) {
1958                 if (power == samples[i].power) {
1959                         *new_idx = samples[i].gain_idx;
1960                         return 0;
1961                 }
1962         }
1963
1964         if (power > samples[1].power) {
1965                 idx0 = 0;
1966                 idx1 = 1;
1967         } else if (power > samples[2].power) {
1968                 idx0 = 1;
1969                 idx1 = 2;
1970         } else if (power > samples[3].power) {
1971                 idx0 = 2;
1972                 idx1 = 3;
1973         } else {
1974                 idx0 = 3;
1975                 idx1 = 4;
1976         }
1977
1978         denominator = (s32) samples[idx1].power - (s32) samples[idx0].power;
1979         if (denominator == 0)
1980                 return -EINVAL;
1981         gains0 = (s32) samples[idx0].gain_idx * (1 << 19);
1982         gains1 = (s32) samples[idx1].gain_idx * (1 << 19);
1983         res = gains0 + (gains1 - gains0) *
1984             ((s32) power - (s32) samples[idx0].power) / denominator +
1985             (1 << 18);
1986         *new_idx = res >> 19;
1987         return 0;
1988 }
1989
1990 static void il3945_hw_reg_init_channel_groups(struct il_priv *il)
1991 {
1992         u32 i;
1993         s32 rate_idx;
1994         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
1995         const struct il3945_eeprom_txpower_group *group;
1996
1997         D_POWER("Initializing factory calib info from EEPROM\n");
1998
1999         for (i = 0; i < IL_NUM_TX_CALIB_GROUPS; i++) {
2000                 s8 *clip_pwrs;  /* table of power levels for each rate */
2001                 s8 satur_pwr;   /* saturation power for each chnl group */
2002                 group = &eeprom->groups[i];
2003
2004                 /* sanity check on factory saturation power value */
2005                 if (group->saturation_power < 40) {
2006                         IL_WARN("Error: saturation power is %d, "
2007                                     "less than minimum expected 40\n",
2008                                     group->saturation_power);
2009                         return;
2010                 }
2011
2012                 /*
2013                  * Derive requested power levels for each rate, based on
2014                  *   hardware capabilities (saturation power for band).
2015                  * Basic value is 3dB down from saturation, with further
2016                  *   power reductions for highest 3 data rates.  These
2017                  *   backoffs provide headroom for high rate modulation
2018                  *   power peaks, without too much distortion (clipping).
2019                  */
2020                 /* we'll fill in this array with h/w max power levels */
2021                 clip_pwrs = (s8 *) il->_3945.clip_groups[i].clip_powers;
2022
2023                 /* divide factory saturation power by 2 to find -3dB level */
2024                 satur_pwr = (s8) (group->saturation_power >> 1);
2025
2026                 /* fill in channel group's nominal powers for each rate */
2027                 for (rate_idx = 0;
2028                      rate_idx < RATE_COUNT_3945; rate_idx++, clip_pwrs++) {
2029                         switch (rate_idx) {
2030                         case RATE_36M_IDX_TBL:
2031                                 if (i == 0)     /* B/G */
2032                                         *clip_pwrs = satur_pwr;
2033                                 else    /* A */
2034                                         *clip_pwrs = satur_pwr - 5;
2035                                 break;
2036                         case RATE_48M_IDX_TBL:
2037                                 if (i == 0)
2038                                         *clip_pwrs = satur_pwr - 7;
2039                                 else
2040                                         *clip_pwrs = satur_pwr - 10;
2041                                 break;
2042                         case RATE_54M_IDX_TBL:
2043                                 if (i == 0)
2044                                         *clip_pwrs = satur_pwr - 9;
2045                                 else
2046                                         *clip_pwrs = satur_pwr - 12;
2047                                 break;
2048                         default:
2049                                 *clip_pwrs = satur_pwr;
2050                                 break;
2051                         }
2052                 }
2053         }
2054 }
2055
2056 /**
2057  * il3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2058  *
2059  * Second pass (during init) to set up il->channel_info
2060  *
2061  * Set up Tx-power settings in our channel info database for each VALID
2062  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2063  * and current temperature.
2064  *
2065  * Since this is based on current temperature (at init time), these values may
2066  * not be valid for very long, but it gives us a starting/default point,
2067  * and allows us to active (i.e. using Tx) scan.
2068  *
2069  * This does *not* write values to NIC, just sets up our internal table.
2070  */
2071 int il3945_txpower_set_from_eeprom(struct il_priv *il)
2072 {
2073         struct il_channel_info *ch_info = NULL;
2074         struct il3945_channel_power_info *pwr_info;
2075         struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
2076         int delta_idx;
2077         u8 rate_idx;
2078         u8 scan_tbl_idx;
2079         const s8 *clip_pwrs;    /* array of power levels for each rate */
2080         u8 gain, dsp_atten;
2081         s8 power;
2082         u8 pwr_idx, base_pwr_idx, a_band;
2083         u8 i;
2084         int temperature;
2085
2086         /* save temperature reference,
2087          *   so we can determine next time to calibrate */
2088         temperature = il3945_hw_reg_txpower_get_temperature(il);
2089         il->last_temperature = temperature;
2090
2091         il3945_hw_reg_init_channel_groups(il);
2092
2093         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2094         for (i = 0, ch_info = il->channel_info; i < il->channel_count;
2095              i++, ch_info++) {
2096                 a_band = il_is_channel_a_band(ch_info);
2097                 if (!il_is_channel_valid(ch_info))
2098                         continue;
2099
2100                 /* find this channel's channel group (*not* "band") idx */
2101                 ch_info->group_idx =
2102                         il3945_hw_reg_get_ch_grp_idx(il, ch_info);
2103
2104                 /* Get this chnlgrp's rate->max/clip-powers table */
2105                 clip_pwrs = il->_3945.clip_groups[ch_info->group_idx].clip_powers;
2106
2107                 /* calculate power idx *adjustment* value according to
2108                  *  diff between current temperature and factory temperature */
2109                 delta_idx = il3945_hw_reg_adjust_power_by_temp(temperature,
2110                                 eeprom->groups[ch_info->group_idx].
2111                                 temperature);
2112
2113                 D_POWER("Delta idx for channel %d: %d [%d]\n",
2114                                 ch_info->channel, delta_idx, temperature +
2115                                 IL_TEMP_CONVERT);
2116
2117                 /* set tx power value for all OFDM rates */
2118                 for (rate_idx = 0; rate_idx < IL_OFDM_RATES;
2119                      rate_idx++) {
2120                         s32 uninitialized_var(power_idx);
2121                         int rc;
2122
2123                         /* use channel group's clip-power table,
2124                          *   but don't exceed channel's max power */
2125                         s8 pwr = min(ch_info->max_power_avg,
2126                                      clip_pwrs[rate_idx]);
2127
2128                         pwr_info = &ch_info->power_info[rate_idx];
2129
2130                         /* get base (i.e. at factory-measured temperature)
2131                          *    power table idx for this rate's power */
2132                         rc = il3945_hw_reg_get_matched_power_idx(il, pwr,
2133                                                          ch_info->group_idx,
2134                                                          &power_idx);
2135                         if (rc) {
2136                                 IL_ERR("Invalid power idx\n");
2137                                 return rc;
2138                         }
2139                         pwr_info->base_power_idx = (u8) power_idx;
2140
2141                         /* temperature compensate */
2142                         power_idx += delta_idx;
2143
2144                         /* stay within range of gain table */
2145                         power_idx = il3945_hw_reg_fix_power_idx(power_idx);
2146
2147                         /* fill 1 OFDM rate's il3945_channel_power_info struct */
2148                         pwr_info->requested_power = pwr;
2149                         pwr_info->power_table_idx = (u8) power_idx;
2150                         pwr_info->tpc.tx_gain =
2151                             power_gain_table[a_band][power_idx].tx_gain;
2152                         pwr_info->tpc.dsp_atten =
2153                             power_gain_table[a_band][power_idx].dsp_atten;
2154                 }
2155
2156                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2157                 pwr_info = &ch_info->power_info[RATE_12M_IDX_TBL];
2158                 power = pwr_info->requested_power +
2159                         IL_CCK_FROM_OFDM_POWER_DIFF;
2160                 pwr_idx = pwr_info->power_table_idx +
2161                         IL_CCK_FROM_OFDM_IDX_DIFF;
2162                 base_pwr_idx = pwr_info->base_power_idx +
2163                         IL_CCK_FROM_OFDM_IDX_DIFF;
2164
2165                 /* stay within table range */
2166                 pwr_idx = il3945_hw_reg_fix_power_idx(pwr_idx);
2167                 gain = power_gain_table[a_band][pwr_idx].tx_gain;
2168                 dsp_atten = power_gain_table[a_band][pwr_idx].dsp_atten;
2169
2170                 /* fill each CCK rate's il3945_channel_power_info structure
2171                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2172                  * NOTE:  CCK rates start at end of OFDM rates! */
2173                 for (rate_idx = 0;
2174                      rate_idx < IL_CCK_RATES; rate_idx++) {
2175                         pwr_info = &ch_info->power_info[rate_idx+IL_OFDM_RATES];
2176                         pwr_info->requested_power = power;
2177                         pwr_info->power_table_idx = pwr_idx;
2178                         pwr_info->base_power_idx = base_pwr_idx;
2179                         pwr_info->tpc.tx_gain = gain;
2180                         pwr_info->tpc.dsp_atten = dsp_atten;
2181                 }
2182
2183                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2184                 for (scan_tbl_idx = 0;
2185                      scan_tbl_idx < IL_NUM_SCAN_RATES; scan_tbl_idx++) {
2186                         s32 actual_idx = (scan_tbl_idx == 0) ?
2187                                 RATE_1M_IDX_TBL : RATE_6M_IDX_TBL;
2188                         il3945_hw_reg_set_scan_power(il, scan_tbl_idx,
2189                                 actual_idx, clip_pwrs, ch_info, a_band);
2190                 }
2191         }
2192
2193         return 0;
2194 }
2195
2196 int il3945_hw_rxq_stop(struct il_priv *il)
2197 {
2198         int rc;
2199
2200         il_wr(il, FH39_RCSR_CONFIG(0), 0);
2201         rc = il_poll_bit(il, FH39_RSSR_STATUS,
2202                         FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
2203         if (rc < 0)
2204                 IL_ERR("Can't stop Rx DMA.\n");
2205
2206         return 0;
2207 }
2208
2209 int il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq)
2210 {
2211         int txq_id = txq->q.id;
2212
2213         struct il3945_shared *shared_data = il->_3945.shared_virt;
2214
2215         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2216
2217         il_wr(il, FH39_CBCC_CTRL(txq_id), 0);
2218         il_wr(il, FH39_CBCC_BASE(txq_id), 0);
2219
2220         il_wr(il, FH39_TCSR_CONFIG(txq_id),
2221                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2222                 FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2223                 FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2224                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2225                 FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2226
2227         /* fake read to flush all prev. writes */
2228         _il_rd(il, FH39_TSSR_CBB_BASE);
2229
2230         return 0;
2231 }
2232
2233 /*
2234  * HCMD utils
2235  */
2236 static u16 il3945_get_hcmd_size(u8 cmd_id, u16 len)
2237 {
2238         switch (cmd_id) {
2239         case C_RXON:
2240                 return sizeof(struct il3945_rxon_cmd);
2241         case C_POWER_TBL:
2242                 return sizeof(struct il3945_powertable_cmd);
2243         default:
2244                 return len;
2245         }
2246 }
2247
2248
2249 static u16 il3945_build_addsta_hcmd(const struct il_addsta_cmd *cmd,
2250                                                                 u8 *data)
2251 {
2252         struct il3945_addsta_cmd *addsta = (struct il3945_addsta_cmd *)data;
2253         addsta->mode = cmd->mode;
2254         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
2255         memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
2256         addsta->station_flags = cmd->station_flags;
2257         addsta->station_flags_msk = cmd->station_flags_msk;
2258         addsta->tid_disable_tx = cpu_to_le16(0);
2259         addsta->rate_n_flags = cmd->rate_n_flags;
2260         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2261         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2262         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2263
2264         return (u16)sizeof(struct il3945_addsta_cmd);
2265 }
2266
2267 static int il3945_add_bssid_station(struct il_priv *il,
2268                                      const u8 *addr, u8 *sta_id_r)
2269 {
2270         struct il_rxon_context *ctx = &il->ctx;
2271         int ret;
2272         u8 sta_id;
2273         unsigned long flags;
2274
2275         if (sta_id_r)
2276                 *sta_id_r = IL_INVALID_STATION;
2277
2278         ret = il_add_station_common(il, ctx, addr, 0, NULL, &sta_id);
2279         if (ret) {
2280                 IL_ERR("Unable to add station %pM\n", addr);
2281                 return ret;
2282         }
2283
2284         if (sta_id_r)
2285                 *sta_id_r = sta_id;
2286
2287         spin_lock_irqsave(&il->sta_lock, flags);
2288         il->stations[sta_id].used |= IL_STA_LOCAL;
2289         spin_unlock_irqrestore(&il->sta_lock, flags);
2290
2291         return 0;
2292 }
2293 static int il3945_manage_ibss_station(struct il_priv *il,
2294                                        struct ieee80211_vif *vif, bool add)
2295 {
2296         struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
2297         int ret;
2298
2299         if (add) {
2300                 ret = il3945_add_bssid_station(il, vif->bss_conf.bssid,
2301                                                 &vif_priv->ibss_bssid_sta_id);
2302                 if (ret)
2303                         return ret;
2304
2305                 il3945_sync_sta(il, vif_priv->ibss_bssid_sta_id,
2306                                  (il->band == IEEE80211_BAND_5GHZ) ?
2307                                  RATE_6M_PLCP : RATE_1M_PLCP);
2308                 il3945_rate_scale_init(il->hw, vif_priv->ibss_bssid_sta_id);
2309
2310                 return 0;
2311         }
2312
2313         return il_remove_station(il, vif_priv->ibss_bssid_sta_id,
2314                                   vif->bss_conf.bssid);
2315 }
2316
2317 /**
2318  * il3945_init_hw_rate_table - Initialize the hardware rate fallback table
2319  */
2320 int il3945_init_hw_rate_table(struct il_priv *il)
2321 {
2322         int rc, i, idx, prev_idx;
2323         struct il3945_rate_scaling_cmd rate_cmd = {
2324                 .reserved = {0, 0, 0},
2325         };
2326         struct il3945_rate_scaling_info *table = rate_cmd.table;
2327
2328         for (i = 0; i < ARRAY_SIZE(il3945_rates); i++) {
2329                 idx = il3945_rates[i].table_rs_idx;
2330
2331                 table[idx].rate_n_flags =
2332                         il3945_hw_set_rate_n_flags(il3945_rates[i].plcp, 0);
2333                 table[idx].try_cnt = il->retry_rate;
2334                 prev_idx = il3945_get_prev_ieee_rate(i);
2335                 table[idx].next_rate_idx =
2336                                 il3945_rates[prev_idx].table_rs_idx;
2337         }
2338
2339         switch (il->band) {
2340         case IEEE80211_BAND_5GHZ:
2341                 D_RATE("Select A mode rate scale\n");
2342                 /* If one of the following CCK rates is used,
2343                  * have it fall back to the 6M OFDM rate */
2344                 for (i = RATE_1M_IDX_TBL;
2345                         i <= RATE_11M_IDX_TBL; i++)
2346                         table[i].next_rate_idx =
2347                           il3945_rates[IL_FIRST_OFDM_RATE].table_rs_idx;
2348
2349                 /* Don't fall back to CCK rates */
2350                 table[RATE_12M_IDX_TBL].next_rate_idx =
2351                                                 RATE_9M_IDX_TBL;
2352
2353                 /* Don't drop out of OFDM rates */
2354                 table[RATE_6M_IDX_TBL].next_rate_idx =
2355                     il3945_rates[IL_FIRST_OFDM_RATE].table_rs_idx;
2356                 break;
2357
2358         case IEEE80211_BAND_2GHZ:
2359                 D_RATE("Select B/G mode rate scale\n");
2360                 /* If an OFDM rate is used, have it fall back to the
2361                  * 1M CCK rates */
2362
2363                 if (!(il->_3945.sta_supp_rates & IL_OFDM_RATES_MASK) &&
2364                     il_is_associated(il)) {
2365
2366                         idx = IL_FIRST_CCK_RATE;
2367                         for (i = RATE_6M_IDX_TBL;
2368                              i <= RATE_54M_IDX_TBL; i++)
2369                                 table[i].next_rate_idx =
2370                                         il3945_rates[idx].table_rs_idx;
2371
2372                         idx = RATE_11M_IDX_TBL;
2373                         /* CCK shouldn't fall back to OFDM... */
2374                         table[idx].next_rate_idx = RATE_5M_IDX_TBL;
2375                 }
2376                 break;
2377
2378         default:
2379                 WARN_ON(1);
2380                 break;
2381         }
2382
2383         /* Update the rate scaling for control frame Tx */
2384         rate_cmd.table_id = 0;
2385         rc = il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd),
2386                               &rate_cmd);
2387         if (rc)
2388                 return rc;
2389
2390         /* Update the rate scaling for data frame Tx */
2391         rate_cmd.table_id = 1;
2392         return il_send_cmd_pdu(il, C_RATE_SCALE, sizeof(rate_cmd),
2393                                 &rate_cmd);
2394 }
2395
2396 /* Called when initializing driver */
2397 int il3945_hw_set_hw_params(struct il_priv *il)
2398 {
2399         memset((void *)&il->hw_params, 0,
2400                sizeof(struct il_hw_params));
2401
2402         il->_3945.shared_virt =
2403                 dma_alloc_coherent(&il->pci_dev->dev,
2404                                    sizeof(struct il3945_shared),
2405                                    &il->_3945.shared_phys, GFP_KERNEL);
2406         if (!il->_3945.shared_virt) {
2407                 IL_ERR("failed to allocate pci memory\n");
2408                 return -ENOMEM;
2409         }
2410
2411         /* Assign number of Usable TX queues */
2412         il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues;
2413
2414         il->hw_params.tfd_size = sizeof(struct il3945_tfd);
2415         il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_3K);
2416         il->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2417         il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2418         il->hw_params.max_stations = IL3945_STATION_COUNT;
2419         il->ctx.bcast_sta_id = IL3945_BROADCAST_ID;
2420
2421         il->sta_key_max_num = STA_KEY_MAX_NUM;
2422
2423         il->hw_params.rx_wrt_ptr_reg = FH39_RSCSR_CHNL0_WPTR;
2424         il->hw_params.max_beacon_itrvl = IL39_MAX_UCODE_BEACON_INTERVAL;
2425         il->hw_params.beacon_time_tsf_bits = IL3945_EXT_BEACON_TIME_POS;
2426
2427         return 0;
2428 }
2429
2430 unsigned int il3945_hw_get_beacon_cmd(struct il_priv *il,
2431                           struct il3945_frame *frame, u8 rate)
2432 {
2433         struct il3945_tx_beacon_cmd *tx_beacon_cmd;
2434         unsigned int frame_size;
2435
2436         tx_beacon_cmd = (struct il3945_tx_beacon_cmd *)&frame->u;
2437         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2438
2439         tx_beacon_cmd->tx.sta_id =
2440                 il->ctx.bcast_sta_id;
2441         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2442
2443         frame_size = il3945_fill_beacon_frame(il,
2444                                 tx_beacon_cmd->frame,
2445                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2446
2447         BUG_ON(frame_size > MAX_MPDU_SIZE);
2448         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2449
2450         tx_beacon_cmd->tx.rate = rate;
2451         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2452                                       TX_CMD_FLG_TSF_MSK);
2453
2454         /* supp_rates[0] == OFDM start at IL_FIRST_OFDM_RATE*/
2455         tx_beacon_cmd->tx.supp_rates[0] =
2456                 (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
2457
2458         tx_beacon_cmd->tx.supp_rates[1] =
2459                 (IL_CCK_BASIC_RATES_MASK & 0xF);
2460
2461         return sizeof(struct il3945_tx_beacon_cmd) + frame_size;
2462 }
2463
2464 void il3945_hw_handler_setup(struct il_priv *il)
2465 {
2466         il->handlers[C_TX] = il3945_hdl_tx;
2467         il->handlers[N_3945_RX] = il3945_hdl_rx;
2468 }
2469
2470 void il3945_hw_setup_deferred_work(struct il_priv *il)
2471 {
2472         INIT_DELAYED_WORK(&il->_3945.thermal_periodic,
2473                           il3945_bg_reg_txpower_periodic);
2474 }
2475
2476 void il3945_hw_cancel_deferred_work(struct il_priv *il)
2477 {
2478         cancel_delayed_work(&il->_3945.thermal_periodic);
2479 }
2480
2481 /* check contents of special bootstrap uCode SRAM */
2482 static int il3945_verify_bsm(struct il_priv *il)
2483  {
2484         __le32 *image = il->ucode_boot.v_addr;
2485         u32 len = il->ucode_boot.len;
2486         u32 reg;
2487         u32 val;
2488
2489         D_INFO("Begin verify bsm\n");
2490
2491         /* verify BSM SRAM contents */
2492         val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
2493         for (reg = BSM_SRAM_LOWER_BOUND;
2494              reg < BSM_SRAM_LOWER_BOUND + len;
2495              reg += sizeof(u32), image++) {
2496                 val = il_rd_prph(il, reg);
2497                 if (val != le32_to_cpu(*image)) {
2498                         IL_ERR("BSM uCode verification failed at "
2499                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
2500                                   BSM_SRAM_LOWER_BOUND,
2501                                   reg - BSM_SRAM_LOWER_BOUND, len,
2502                                   val, le32_to_cpu(*image));
2503                         return -EIO;
2504                 }
2505         }
2506
2507         D_INFO("BSM bootstrap uCode image OK\n");
2508
2509         return 0;
2510 }
2511
2512
2513 /******************************************************************************
2514  *
2515  * EEPROM related functions
2516  *
2517  ******************************************************************************/
2518
2519 /*
2520  * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2521  * embedded controller) as EEPROM reader; each read is a series of pulses
2522  * to/from the EEPROM chip, not a single event, so even reads could conflict
2523  * if they weren't arbitrated by some ownership mechanism.  Here, the driver
2524  * simply claims ownership, which should be safe when this function is called
2525  * (i.e. before loading uCode!).
2526  */
2527 static int il3945_eeprom_acquire_semaphore(struct il_priv *il)
2528 {
2529         _il_clear_bit(il, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2530         return 0;
2531 }
2532
2533
2534 static void il3945_eeprom_release_semaphore(struct il_priv *il)
2535 {
2536         return;
2537 }
2538
2539  /**
2540   * il3945_load_bsm - Load bootstrap instructions
2541   *
2542   * BSM operation:
2543   *
2544   * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
2545   * in special SRAM that does not power down during RFKILL.  When powering back
2546   * up after power-saving sleeps (or during initial uCode load), the BSM loads
2547   * the bootstrap program into the on-board processor, and starts it.
2548   *
2549   * The bootstrap program loads (via DMA) instructions and data for a new
2550   * program from host DRAM locations indicated by the host driver in the
2551   * BSM_DRAM_* registers.  Once the new program is loaded, it starts
2552   * automatically.
2553   *
2554   * When initializing the NIC, the host driver points the BSM to the
2555   * "initialize" uCode image.  This uCode sets up some internal data, then
2556   * notifies host via "initialize alive" that it is complete.
2557   *
2558   * The host then replaces the BSM_DRAM_* pointer values to point to the
2559   * normal runtime uCode instructions and a backup uCode data cache buffer
2560   * (filled initially with starting data values for the on-board processor),
2561   * then triggers the "initialize" uCode to load and launch the runtime uCode,
2562   * which begins normal operation.
2563   *
2564   * When doing a power-save shutdown, runtime uCode saves data SRAM into
2565   * the backup data cache in DRAM before SRAM is powered down.
2566   *
2567   * When powering back up, the BSM loads the bootstrap program.  This reloads
2568   * the runtime uCode instructions and the backup data cache into SRAM,
2569   * and re-launches the runtime uCode from where it left off.
2570   */
2571 static int il3945_load_bsm(struct il_priv *il)
2572 {
2573         __le32 *image = il->ucode_boot.v_addr;
2574         u32 len = il->ucode_boot.len;
2575         dma_addr_t pinst;
2576         dma_addr_t pdata;
2577         u32 inst_len;
2578         u32 data_len;
2579         int rc;
2580         int i;
2581         u32 done;
2582         u32 reg_offset;
2583
2584         D_INFO("Begin load bsm\n");
2585
2586         /* make sure bootstrap program is no larger than BSM's SRAM size */
2587         if (len > IL39_MAX_BSM_SIZE)
2588                 return -EINVAL;
2589
2590         /* Tell bootstrap uCode where to find the "Initialize" uCode
2591         *   in host DRAM ... host DRAM physical address bits 31:0 for 3945.
2592         * NOTE:  il3945_initialize_alive_start() will replace these values,
2593         *        after the "initialize" uCode has run, to point to
2594         *        runtime/protocol instructions and backup data cache. */
2595         pinst = il->ucode_init.p_addr;
2596         pdata = il->ucode_init_data.p_addr;
2597         inst_len = il->ucode_init.len;
2598         data_len = il->ucode_init_data.len;
2599
2600         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2601         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2602         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
2603         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
2604
2605         /* Fill BSM memory with bootstrap instructions */
2606         for (reg_offset = BSM_SRAM_LOWER_BOUND;
2607              reg_offset < BSM_SRAM_LOWER_BOUND + len;
2608              reg_offset += sizeof(u32), image++)
2609                 _il_wr_prph(il, reg_offset,
2610                                           le32_to_cpu(*image));
2611
2612         rc = il3945_verify_bsm(il);
2613         if (rc)
2614                 return rc;
2615
2616         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
2617         il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
2618         il_wr_prph(il, BSM_WR_MEM_DST_REG,
2619                                  IL39_RTC_INST_LOWER_BOUND);
2620         il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
2621
2622         /* Load bootstrap code into instruction SRAM now,
2623          *   to prepare to load "initialize" uCode */
2624         il_wr_prph(il, BSM_WR_CTRL_REG,
2625                 BSM_WR_CTRL_REG_BIT_START);
2626
2627         /* Wait for load of bootstrap uCode to finish */
2628         for (i = 0; i < 100; i++) {
2629                 done = il_rd_prph(il, BSM_WR_CTRL_REG);
2630                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
2631                         break;
2632                 udelay(10);
2633         }
2634         if (i < 100)
2635                 D_INFO("BSM write complete, poll %d iterations\n", i);
2636         else {
2637                 IL_ERR("BSM write did not complete!\n");
2638                 return -EIO;
2639         }
2640
2641         /* Enable future boot loads whenever power management unit triggers it
2642          *   (e.g. when powering back up after power-save shutdown) */
2643         il_wr_prph(il, BSM_WR_CTRL_REG,
2644                 BSM_WR_CTRL_REG_BIT_START_EN);
2645
2646         return 0;
2647 }
2648
2649 static struct il_hcmd_ops il3945_hcmd = {
2650         .rxon_assoc = il3945_send_rxon_assoc,
2651         .commit_rxon = il3945_commit_rxon,
2652 };
2653
2654 static struct il_lib_ops il3945_lib = {
2655         .txq_attach_buf_to_tfd = il3945_hw_txq_attach_buf_to_tfd,
2656         .txq_free_tfd = il3945_hw_txq_free_tfd,
2657         .txq_init = il3945_hw_tx_queue_init,
2658         .load_ucode = il3945_load_bsm,
2659         .dump_nic_error_log = il3945_dump_nic_error_log,
2660         .apm_ops = {
2661                 .init = il3945_apm_init,
2662                 .config = il3945_nic_config,
2663         },
2664         .eeprom_ops = {
2665                 .regulatory_bands = {
2666                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2667                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2668                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2669                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2670                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2671                         EEPROM_REGULATORY_BAND_NO_HT40,
2672                         EEPROM_REGULATORY_BAND_NO_HT40,
2673                 },
2674                 .acquire_semaphore = il3945_eeprom_acquire_semaphore,
2675                 .release_semaphore = il3945_eeprom_release_semaphore,
2676         },
2677         .send_tx_power  = il3945_send_tx_power,
2678         .is_valid_rtc_data_addr = il3945_hw_valid_rtc_data_addr,
2679
2680         .debugfs_ops = {
2681                 .rx_stats_read = il3945_ucode_rx_stats_read,
2682                 .tx_stats_read = il3945_ucode_tx_stats_read,
2683                 .general_stats_read = il3945_ucode_general_stats_read,
2684         },
2685 };
2686
2687 static const struct il_legacy_ops il3945_legacy_ops = {
2688         .post_associate = il3945_post_associate,
2689         .config_ap = il3945_config_ap,
2690         .manage_ibss_station = il3945_manage_ibss_station,
2691 };
2692
2693 static struct il_hcmd_utils_ops il3945_hcmd_utils = {
2694         .get_hcmd_size = il3945_get_hcmd_size,
2695         .build_addsta_hcmd = il3945_build_addsta_hcmd,
2696         .request_scan = il3945_request_scan,
2697         .post_scan = il3945_post_scan,
2698 };
2699
2700 static const struct il_ops il3945_ops = {
2701         .lib = &il3945_lib,
2702         .hcmd = &il3945_hcmd,
2703         .utils = &il3945_hcmd_utils,
2704         .led = &il3945_led_ops,
2705         .legacy = &il3945_legacy_ops,
2706         .ieee80211_ops = &il3945_hw_ops,
2707 };
2708
2709 static struct il_base_params il3945_base_params = {
2710         .eeprom_size = IL3945_EEPROM_IMG_SIZE,
2711         .num_of_queues = IL39_NUM_QUEUES,
2712         .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
2713         .set_l0s = false,
2714         .use_bsm = true,
2715         .led_compensation = 64,
2716         .wd_timeout = IL_DEF_WD_TIMEOUT,
2717 };
2718
2719 static struct il_cfg il3945_bg_cfg = {
2720         .name = "3945BG",
2721         .fw_name_pre = IL3945_FW_PRE,
2722         .ucode_api_max = IL3945_UCODE_API_MAX,
2723         .ucode_api_min = IL3945_UCODE_API_MIN,
2724         .sku = IL_SKU_G,
2725         .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2726         .ops = &il3945_ops,
2727         .mod_params = &il3945_mod_params,
2728         .base_params = &il3945_base_params,
2729         .led_mode = IL_LED_BLINK,
2730 };
2731
2732 static struct il_cfg il3945_abg_cfg = {
2733         .name = "3945ABG",
2734         .fw_name_pre = IL3945_FW_PRE,
2735         .ucode_api_max = IL3945_UCODE_API_MAX,
2736         .ucode_api_min = IL3945_UCODE_API_MIN,
2737         .sku = IL_SKU_A|IL_SKU_G,
2738         .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2739         .ops = &il3945_ops,
2740         .mod_params = &il3945_mod_params,
2741         .base_params = &il3945_base_params,
2742         .led_mode = IL_LED_BLINK,
2743 };
2744
2745 DEFINE_PCI_DEVICE_TABLE(il3945_hw_card_ids) = {
2746         {IL_PCI_DEVICE(0x4222, 0x1005, il3945_bg_cfg)},
2747         {IL_PCI_DEVICE(0x4222, 0x1034, il3945_bg_cfg)},
2748         {IL_PCI_DEVICE(0x4222, 0x1044, il3945_bg_cfg)},
2749         {IL_PCI_DEVICE(0x4227, 0x1014, il3945_bg_cfg)},
2750         {IL_PCI_DEVICE(0x4222, PCI_ANY_ID, il3945_abg_cfg)},
2751         {IL_PCI_DEVICE(0x4227, PCI_ANY_ID, il3945_abg_cfg)},
2752         {0}
2753 };
2754
2755 MODULE_DEVICE_TABLE(pci, il3945_hw_card_ids);