1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
30 #include <linux/pci.h> /* for struct pci_device_id */
31 #include <linux/kernel.h>
32 #include <net/ieee80211_radiotap.h>
34 /* Hardware specific file defines the PCI IDs table for that hardware module */
35 extern const struct pci_device_id il3945_hw_card_ids[];
39 #include "iwl-debug.h"
40 #include "iwl-power.h"
42 #include "iwl-eeprom.h"
44 /* Highest firmware API version supported */
45 #define IL3945_UCODE_API_MAX 2
47 /* Lowest firmware API version supported */
48 #define IL3945_UCODE_API_MIN 1
50 #define IL3945_FW_PRE "iwlwifi-3945-"
51 #define _IL3945_MODULE_FIRMWARE(api) IL3945_FW_PRE #api ".ucode"
52 #define IL3945_MODULE_FIRMWARE(api) _IL3945_MODULE_FIRMWARE(api)
54 /* Default noise level to report when noise measurement is not available.
55 * This may be because we're:
56 * 1) Not associated (4965, no beacon stats being sent to driver)
57 * 2) Scanning (noise measurement does not apply to associated channel)
58 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
59 * Use default noise value of -127 ... this is below the range of measurable
60 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
61 * Also, -127 works better than 0 when averaging frames with/without
62 * noise info (e.g. averaging might be done in app); measured dBm values are
63 * always negative ... using a negative value as the default keeps all
64 * averages within an s8's (used in some apps) range of negative values. */
65 #define IL_NOISE_MEAS_NOT_AVAILABLE (-127)
67 /* Module parameters accessible from iwl-*.c */
68 extern struct il_mod_params il3945_mod_params;
70 struct il3945_rate_scale_data {
79 struct il3945_rs_sta {
83 unsigned long last_partial_flush;
84 unsigned long last_flush;
91 struct timer_list rate_scale_flush;
92 struct il3945_rate_scale_data win[RATE_COUNT_3945];
93 #ifdef CONFIG_MAC80211_DEBUGFS
94 struct dentry *rs_sta_dbgfs_stats_table_file;
97 /* used to be in sta_info */
103 * The common struct MUST be first because it is shared between
106 struct il3945_sta_priv {
107 struct il_station_priv_common common;
108 struct il3945_rs_sta rs_sta;
111 enum il3945_antenna {
112 IL_ANTENNA_DIVERSITY,
118 * RTS threshold here is total size [2347] minus 4 FCS bytes
120 * a value of 0 means RTS on all data/management packets
121 * a value > max MSDU size means no RTS
122 * else RTS for data/management frames where MPDU is larger
125 #define DEFAULT_RTS_THRESHOLD 2347U
126 #define MIN_RTS_THRESHOLD 0U
127 #define MAX_RTS_THRESHOLD 2347U
128 #define MAX_MSDU_SIZE 2304U
129 #define MAX_MPDU_SIZE 2346U
130 #define DEFAULT_BEACON_INTERVAL 100U
131 #define DEFAULT_SHORT_RETRY_LIMIT 7U
132 #define DEFAULT_LONG_RETRY_LIMIT 4U
134 #define IL_TX_FIFO_AC0 0
135 #define IL_TX_FIFO_AC1 1
136 #define IL_TX_FIFO_AC2 2
137 #define IL_TX_FIFO_AC3 3
138 #define IL_TX_FIFO_HCCA_1 5
139 #define IL_TX_FIFO_HCCA_2 6
140 #define IL_TX_FIFO_NONE 7
142 #define IEEE80211_DATA_LEN 2304
143 #define IEEE80211_4ADDR_LEN 30
144 #define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
145 #define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
147 struct il3945_frame {
149 struct ieee80211_hdr frame;
150 struct il3945_tx_beacon_cmd beacon;
151 u8 raw[IEEE80211_FRAME_LEN];
154 struct list_head list;
157 #define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
158 #define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
159 #define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
161 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
162 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
163 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
165 #define IL_SUPPORTED_RATES_IE_LEN 8
167 #define SCAN_INTERVAL 100
169 #define MAX_TID_COUNT 9
171 #define IL_INVALID_RATE 0xFF
172 #define IL_INVALID_VALUE -1
174 #define STA_PS_STATUS_WAKE 0
175 #define STA_PS_STATUS_SLEEP 1
177 struct il3945_ibss_seq {
181 unsigned long packet_time;
182 struct list_head list;
185 #define IL_RX_HDR(x) ((struct il3945_rx_frame_hdr *)(\
186 x->u.rx_frame.stats.payload + \
187 x->u.rx_frame.stats.phy_count))
188 #define IL_RX_END(x) ((struct il3945_rx_frame_end *)(\
189 IL_RX_HDR(x)->payload + \
190 le16_to_cpu(IL_RX_HDR(x)->len)))
191 #define IL_RX_STATS(x) (&x->u.rx_frame.stats)
192 #define IL_RX_DATA(x) (IL_RX_HDR(x)->payload)
195 /******************************************************************************
197 * Functions implemented in iwl3945-base.c which are forward declared here
200 *****************************************************************************/
201 extern int il3945_calc_db_from_ratio(int sig_ratio);
202 extern void il3945_rx_replenish(void *data);
203 extern void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq);
204 extern unsigned int il3945_fill_beacon_frame(struct il_priv *il,
205 struct ieee80211_hdr *hdr, int left);
206 extern int il3945_dump_nic_event_log(struct il_priv *il, bool full_log,
207 char **buf, bool display);
208 extern void il3945_dump_nic_error_log(struct il_priv *il);
210 /******************************************************************************
212 * Functions implemented in iwl-[34]*.c which are forward declared here
213 * for use by iwl3945-base.c
215 * NOTE: The implementation of these functions are hardware specific
216 * which is why they are in the hardware specific files (vs. iwl-base.c)
218 * Naming convention --
219 * il3945_ <-- Its part of iwlwifi (should be changed to il3945_)
220 * il3945_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW)
221 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
222 * il3945_bg_ <-- Called from work queue context
223 * il3945_mac_ <-- mac80211 callback
225 ****************************************************************************/
226 extern void il3945_hw_handler_setup(struct il_priv *il);
227 extern void il3945_hw_setup_deferred_work(struct il_priv *il);
228 extern void il3945_hw_cancel_deferred_work(struct il_priv *il);
229 extern int il3945_hw_rxq_stop(struct il_priv *il);
230 extern int il3945_hw_set_hw_params(struct il_priv *il);
231 extern int il3945_hw_nic_init(struct il_priv *il);
232 extern int il3945_hw_nic_stop_master(struct il_priv *il);
233 extern void il3945_hw_txq_ctx_free(struct il_priv *il);
234 extern void il3945_hw_txq_ctx_stop(struct il_priv *il);
235 extern int il3945_hw_nic_reset(struct il_priv *il);
236 extern int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il,
237 struct il_tx_queue *txq,
238 dma_addr_t addr, u16 len,
240 extern void il3945_hw_txq_free_tfd(struct il_priv *il,
241 struct il_tx_queue *txq);
242 extern int il3945_hw_get_temperature(struct il_priv *il);
243 extern int il3945_hw_tx_queue_init(struct il_priv *il,
244 struct il_tx_queue *txq);
245 extern unsigned int il3945_hw_get_beacon_cmd(struct il_priv *il,
246 struct il3945_frame *frame, u8 rate);
247 void il3945_hw_build_tx_cmd_rate(struct il_priv *il,
248 struct il_device_cmd *cmd,
249 struct ieee80211_tx_info *info,
250 struct ieee80211_hdr *hdr,
251 int sta_id, int tx_id);
252 extern int il3945_hw_reg_send_txpower(struct il_priv *il);
253 extern int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power);
254 extern void il3945_hdl_stats(struct il_priv *il,
255 struct il_rx_buf *rxb);
256 void il3945_hdl_c_stats(struct il_priv *il,
257 struct il_rx_buf *rxb);
258 extern void il3945_disable_events(struct il_priv *il);
259 extern int il4965_get_temperature(const struct il_priv *il);
260 extern void il3945_post_associate(struct il_priv *il);
261 extern void il3945_config_ap(struct il_priv *il);
263 extern int il3945_commit_rxon(struct il_priv *il,
264 struct il_rxon_context *ctx);
267 * il3945_hw_find_station - Find station id for a given BSSID
268 * @bssid: MAC address of station ID to find
270 * NOTE: This should not be hardware specific but the code has
271 * not yet been merged into a single common layer for managing the
274 extern u8 il3945_hw_find_station(struct il_priv *il, const u8 *bssid);
276 extern struct ieee80211_ops il3945_hw_ops;
278 extern __le32 il3945_get_antenna_flags(const struct il_priv *il);
279 extern int il3945_init_hw_rate_table(struct il_priv *il);
280 extern void il3945_reg_txpower_periodic(struct il_priv *il);
281 extern int il3945_txpower_set_from_eeprom(struct il_priv *il);
283 extern const struct il_channel_info *il3945_get_channel_info(
284 const struct il_priv *il, enum ieee80211_band band, u16 channel);
286 extern int il3945_rs_next_rate(struct il_priv *il, int rate);
289 int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif);
290 void il3945_post_scan(struct il_priv *il);
293 extern const struct il3945_rate_info il3945_rates[RATE_COUNT_3945];
298 #define IL39_RSSI_OFFSET 95
301 * EEPROM related constants, enums, and structures.
303 #define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7)
306 * Mapping of a Tx power level, at factory calibration temperature,
307 * to a radio/DSP gain table idx.
308 * One for each of 5 "sample" power levels in each band.
309 * v_det is measured at the factory, using the 3945's built-in power amplifier
310 * (PA) output voltage detector. This same detector is used during Tx of
311 * long packets in normal operation to provide feedback as to proper output
313 * Data copied from EEPROM.
314 * DO NOT ALTER THIS STRUCTURE!!!
316 struct il3945_eeprom_txpower_sample {
317 u8 gain_idx; /* idx into power (gain) setup table ... */
318 s8 power; /* ... for this pwr level for this chnl group */
319 u16 v_det; /* PA output voltage */
323 * Mappings of Tx power levels -> nominal radio/DSP gain table idxes.
324 * One for each channel group (a.k.a. "band") (1 for BG, 4 for A).
325 * Tx power setup code interpolates between the 5 "sample" power levels
326 * to determine the nominal setup for a requested power level.
327 * Data copied from EEPROM.
328 * DO NOT ALTER THIS STRUCTURE!!!
330 struct il3945_eeprom_txpower_group {
331 struct il3945_eeprom_txpower_sample samples[5]; /* 5 power levels */
332 s32 a, b, c, d, e; /* coefficients for voltage->power
333 * formula (signed) */
334 s32 Fa, Fb, Fc, Fd, Fe; /* these modify coeffs based on
335 * frequency (signed) */
336 s8 saturation_power; /* highest power possible by h/w in this
338 u8 group_channel; /* "representative" channel # in this band */
339 s16 temperature; /* h/w temperature at factory calib this band
344 * Temperature-based Tx-power compensation data, not band-specific.
345 * These coefficients are use to modify a/b/c/d/e coeffs based on
346 * difference between current temperature and factory calib temperature.
347 * Data copied from EEPROM.
349 struct il3945_eeprom_temperature_corr {
360 struct il3945_eeprom {
362 u16 device_id; /* abs.ofs: 16 */
364 u16 pmc; /* abs.ofs: 20 */
366 u8 mac_address[6]; /* abs.ofs: 42 */
368 u16 board_revision; /* abs.ofs: 106 */
370 u8 board_pba_number[9]; /* abs.ofs: 119 */
372 u16 version; /* abs.ofs: 136 */
373 u8 sku_cap; /* abs.ofs: 138 */
374 u8 leds_mode; /* abs.ofs: 139 */
376 u16 wowlan_mode; /* abs.ofs: 142 */
377 u16 leds_time_interval; /* abs.ofs: 144 */
378 u8 leds_off_time; /* abs.ofs: 146 */
379 u8 leds_on_time; /* abs.ofs: 147 */
380 u8 almgor_m_version; /* abs.ofs: 148 */
381 u8 antenna_switch_type; /* abs.ofs: 149 */
383 u8 sku_id[4]; /* abs.ofs: 192 */
386 * Per-channel regulatory data.
388 * Each channel that *might* be supported by 3945 has a fixed location
389 * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
392 * Entries immediately below are for 20 MHz channel width.
394 * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
396 u16 band_1_count; /* abs.ofs: 196 */
397 struct il_eeprom_channel band_1_channels[14]; /* abs.ofs: 198 */
400 * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
401 * 5.0 GHz channels 7, 8, 11, 12, 16
402 * (4915-5080MHz) (none of these is ever supported)
404 u16 band_2_count; /* abs.ofs: 226 */
405 struct il_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */
408 * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
411 u16 band_3_count; /* abs.ofs: 254 */
412 struct il_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */
415 * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
418 u16 band_4_count; /* abs.ofs: 280 */
419 struct il_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */
422 * 5.7 GHz channels 145, 149, 153, 157, 161, 165
425 u16 band_5_count; /* abs.ofs: 304 */
426 struct il_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */
431 * 3945 Txpower calibration data.
433 #define IL_NUM_TX_CALIB_GROUPS 5
434 struct il3945_eeprom_txpower_group groups[IL_NUM_TX_CALIB_GROUPS];
436 struct il3945_eeprom_temperature_corr corrections; /* abs.ofs: 832 */
437 u8 reserved16[172]; /* fill out to full 1024 byte block */
440 #define IL3945_EEPROM_IMG_SIZE 1024
444 #define PCI_CFG_REV_ID_BIT_BASIC_SKU (0x40) /* bit 6 */
445 #define PCI_CFG_REV_ID_BIT_RTP (0x80) /* bit 7 */
447 /* 4 DATA + 1 CMD. There are 2 HCCA queues that are not used. */
448 #define IL39_NUM_QUEUES 5
449 #define IL39_CMD_QUEUE_NUM 4
451 #define IL_DEFAULT_TX_RETRY 15
453 /*********************************************/
456 #define NUM_TFD_CHUNKS 4
458 #define TFD_CTL_COUNT_SET(n) (n << 24)
459 #define TFD_CTL_COUNT_GET(ctl) ((ctl >> 24) & 7)
460 #define TFD_CTL_PAD_SET(n) (n << 28)
461 #define TFD_CTL_PAD_GET(ctl) (ctl >> 28)
463 /* Sizes and addresses for instruction and data memory (SRAM) in
464 * 3945's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */
465 #define IL39_RTC_INST_LOWER_BOUND (0x000000)
466 #define IL39_RTC_INST_UPPER_BOUND (0x014000)
468 #define IL39_RTC_DATA_LOWER_BOUND (0x800000)
469 #define IL39_RTC_DATA_UPPER_BOUND (0x808000)
471 #define IL39_RTC_INST_SIZE (IL39_RTC_INST_UPPER_BOUND - \
472 IL39_RTC_INST_LOWER_BOUND)
473 #define IL39_RTC_DATA_SIZE (IL39_RTC_DATA_UPPER_BOUND - \
474 IL39_RTC_DATA_LOWER_BOUND)
476 #define IL39_MAX_INST_SIZE IL39_RTC_INST_SIZE
477 #define IL39_MAX_DATA_SIZE IL39_RTC_DATA_SIZE
479 /* Size of uCode instruction memory in bootstrap state machine */
480 #define IL39_MAX_BSM_SIZE IL39_RTC_INST_SIZE
482 static inline int il3945_hw_valid_rtc_data_addr(u32 addr)
484 return (addr >= IL39_RTC_DATA_LOWER_BOUND &&
485 addr < IL39_RTC_DATA_UPPER_BOUND);
488 /* Base physical address of il3945_shared is provided to FH_TSSR_CBB_BASE
489 * and &il3945_shared.rx_read_ptr[0] is provided to FH_RCSR_RPTR_ADDR(0) */
490 struct il3945_shared {
491 __le32 tx_base_ptr[8];
494 static inline u8 il3945_hw_get_rate(__le16 rate_n_flags)
496 return le16_to_cpu(rate_n_flags) & 0xFF;
499 static inline u16 il3945_hw_get_rate_n_flags(__le16 rate_n_flags)
501 return le16_to_cpu(rate_n_flags);
504 static inline __le16 il3945_hw_set_rate_n_flags(u8 rate, u16 flags)
506 return cpu_to_le16((u16)rate|flags);
509 /************************************/
510 /* iwl3945 Flow Handler Definitions */
511 /************************************/
514 * This I/O area is directly read/writable by driver (e.g. Linux uses writel())
515 * Addresses are offsets from device's PCI hardware base address.
517 #define FH39_MEM_LOWER_BOUND (0x0800)
518 #define FH39_MEM_UPPER_BOUND (0x1000)
520 #define FH39_CBCC_TBL (FH39_MEM_LOWER_BOUND + 0x140)
521 #define FH39_TFDB_TBL (FH39_MEM_LOWER_BOUND + 0x180)
522 #define FH39_RCSR_TBL (FH39_MEM_LOWER_BOUND + 0x400)
523 #define FH39_RSSR_TBL (FH39_MEM_LOWER_BOUND + 0x4c0)
524 #define FH39_TCSR_TBL (FH39_MEM_LOWER_BOUND + 0x500)
525 #define FH39_TSSR_TBL (FH39_MEM_LOWER_BOUND + 0x680)
527 /* TFDB (Transmit Frame Buffer Descriptor) */
528 #define FH39_TFDB(_ch, buf) (FH39_TFDB_TBL + \
529 ((_ch) * 2 + (buf)) * 0x28)
530 #define FH39_TFDB_CHNL_BUF_CTRL_REG(_ch) (FH39_TFDB_TBL + 0x50 * (_ch))
532 /* CBCC channel is [0,2] */
533 #define FH39_CBCC(_ch) (FH39_CBCC_TBL + (_ch) * 0x8)
534 #define FH39_CBCC_CTRL(_ch) (FH39_CBCC(_ch) + 0x00)
535 #define FH39_CBCC_BASE(_ch) (FH39_CBCC(_ch) + 0x04)
537 /* RCSR channel is [0,2] */
538 #define FH39_RCSR(_ch) (FH39_RCSR_TBL + (_ch) * 0x40)
539 #define FH39_RCSR_CONFIG(_ch) (FH39_RCSR(_ch) + 0x00)
540 #define FH39_RCSR_RBD_BASE(_ch) (FH39_RCSR(_ch) + 0x04)
541 #define FH39_RCSR_WPTR(_ch) (FH39_RCSR(_ch) + 0x20)
542 #define FH39_RCSR_RPTR_ADDR(_ch) (FH39_RCSR(_ch) + 0x24)
544 #define FH39_RSCSR_CHNL0_WPTR (FH39_RCSR_WPTR(0))
547 #define FH39_RSSR_CTRL (FH39_RSSR_TBL + 0x000)
548 #define FH39_RSSR_STATUS (FH39_RSSR_TBL + 0x004)
551 #define FH39_TCSR(_ch) (FH39_TCSR_TBL + (_ch) * 0x20)
552 #define FH39_TCSR_CONFIG(_ch) (FH39_TCSR(_ch) + 0x00)
553 #define FH39_TCSR_CREDIT(_ch) (FH39_TCSR(_ch) + 0x04)
554 #define FH39_TCSR_BUFF_STTS(_ch) (FH39_TCSR(_ch) + 0x08)
557 #define FH39_TSSR_CBB_BASE (FH39_TSSR_TBL + 0x000)
558 #define FH39_TSSR_MSG_CONFIG (FH39_TSSR_TBL + 0x008)
559 #define FH39_TSSR_TX_STATUS (FH39_TSSR_TBL + 0x010)
564 #define FH39_SRVC_CHNL (6)
566 #define FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE (20)
567 #define FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH (4)
569 #define FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN (0x08000000)
571 #define FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE (0x80000000)
573 #define FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE (0x20000000)
575 #define FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 (0x01000000)
577 #define FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST (0x00001000)
579 #define FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH (0x00000000)
581 #define FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF (0x00000000)
582 #define FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_DRIVER (0x00000001)
584 #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE_VAL (0x00000000)
585 #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL (0x00000008)
587 #define FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD (0x00200000)
589 #define FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT (0x00000000)
591 #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE (0x00000000)
592 #define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE (0x80000000)
594 #define FH39_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID (0x00004000)
596 #define FH39_TCSR_CHNL_TX_BUF_STS_REG_BIT_TFDB_WPTR (0x00000001)
598 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON (0xFF000000)
599 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON (0x00FF0000)
601 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B (0x00000400)
603 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON (0x00000100)
604 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON (0x00000080)
606 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH (0x00000020)
607 #define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH (0x00000005)
609 #define FH39_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_ch) (BIT(_ch) << 24)
610 #define FH39_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_ch) (BIT(_ch) << 16)
612 #define FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(_ch) \
613 (FH39_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_ch) | \
614 FH39_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_ch))
616 #define FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE (0x01000000)
618 struct il3945_tfd_tb {
624 __le32 control_flags;
625 struct il3945_tfd_tb tbs[4];
629 #ifdef CONFIG_IWLEGACY_DEBUGFS
630 ssize_t il3945_ucode_rx_stats_read(struct file *file, char __user *user_buf,
631 size_t count, loff_t *ppos);
632 ssize_t il3945_ucode_tx_stats_read(struct file *file, char __user *user_buf,
633 size_t count, loff_t *ppos);
634 ssize_t il3945_ucode_general_stats_read(struct file *file,
635 char __user *user_buf, size_t count,
638 static ssize_t il3945_ucode_rx_stats_read(struct file *file,
639 char __user *user_buf, size_t count,
644 static ssize_t il3945_ucode_tx_stats_read(struct file *file,
645 char __user *user_buf, size_t count,
650 static ssize_t il3945_ucode_general_stats_read(struct file *file,
651 char __user *user_buf,
652 size_t count, loff_t *ppos)