1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/firmware.h>
44 #include <linux/etherdevice.h>
45 #include <linux/if_arp.h>
47 #include <net/mac80211.h>
49 #include <asm/div64.h>
51 #define DRV_NAME "iwl4965"
56 /******************************************************************************
60 ******************************************************************************/
63 * module name, copyright, version, etc.
65 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi 4965 driver for Linux"
67 #ifdef CONFIG_IWLEGACY_DEBUG
73 #define DRV_VERSION IWLWIFI_VERSION VD
75 MODULE_DESCRIPTION(DRV_DESCRIPTION);
76 MODULE_VERSION(DRV_VERSION);
77 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
78 MODULE_LICENSE("GPL");
79 MODULE_ALIAS("iwl4965");
82 il4965_check_abort_status(struct il_priv *il, u8 frame_count, u32 status)
84 if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) {
85 IL_ERR("Tx flush command to flush out all frames\n");
86 if (!test_bit(S_EXIT_PENDING, &il->status))
87 queue_work(il->workqueue, &il->tx_flush);
94 struct il_mod_params il4965_mod_params = {
97 /* the rest are 0 by default */
101 il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
105 spin_lock_irqsave(&rxq->lock, flags);
106 INIT_LIST_HEAD(&rxq->rx_free);
107 INIT_LIST_HEAD(&rxq->rx_used);
108 /* Fill the rx_used queue with _all_ of the Rx buffers */
109 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
110 /* In the reset function, these buffers may have been allocated
111 * to an SKB, so we need to unmap and free potential storage */
112 if (rxq->pool[i].page != NULL) {
113 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
114 PAGE_SIZE << il->hw_params.rx_page_order,
116 __il_free_pages(il, rxq->pool[i].page);
117 rxq->pool[i].page = NULL;
119 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
122 for (i = 0; i < RX_QUEUE_SIZE; i++)
123 rxq->queue[i] = NULL;
125 /* Set us so that we have processed and used all buffers, but have
126 * not restocked the Rx queue with fresh buffers */
127 rxq->read = rxq->write = 0;
128 rxq->write_actual = 0;
130 spin_unlock_irqrestore(&rxq->lock, flags);
134 il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
137 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
140 if (il->cfg->mod_params->amsdu_size_8K)
141 rb_size = FH49_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
143 rb_size = FH49_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
146 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0);
148 /* Reset driver's Rx queue write idx */
149 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
151 /* Tell device where to find RBD circular buffer in DRAM */
152 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_BASE_REG, (u32) (rxq->bd_dma >> 8));
154 /* Tell device where in DRAM to update its Rx status */
155 il_wr(il, FH49_RSCSR_CHNL0_STTS_WPTR_REG, rxq->rb_stts_dma >> 4);
158 * Direct rx interrupts to hosts
159 * Rx buffer size 4 or 8k
163 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG,
164 FH49_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
165 FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
166 FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
168 (rb_timeout << FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS) |
169 (rfdnlog << FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
171 /* Set interrupt coalescing timer to default (2048 usecs) */
172 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF);
178 il4965_set_pwr_vmain(struct il_priv *il)
181 * (for documentation purposes)
182 * to set power to V_AUX, do:
184 if (pci_pme_capable(il->pci_dev, PCI_D3cold))
185 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
186 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
187 ~APMG_PS_CTRL_MSK_PWR_SRC);
190 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
191 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
192 ~APMG_PS_CTRL_MSK_PWR_SRC);
196 il4965_hw_nic_init(struct il_priv *il)
199 struct il_rx_queue *rxq = &il->rxq;
202 spin_lock_irqsave(&il->lock, flags);
204 /* Set interrupt coalescing calibration timer to default (512 usecs) */
205 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_CALIB_TIMEOUT_DEF);
206 spin_unlock_irqrestore(&il->lock, flags);
208 il4965_set_pwr_vmain(il);
209 il4965_nic_config(il);
211 /* Allocate the RX queue, or reset if it is already allocated */
213 ret = il_rx_queue_alloc(il);
215 IL_ERR("Unable to initialize Rx queue\n");
219 il4965_rx_queue_reset(il, rxq);
221 il4965_rx_replenish(il);
223 il4965_rx_init(il, rxq);
225 spin_lock_irqsave(&il->lock, flags);
227 rxq->need_update = 1;
228 il_rx_queue_update_write_ptr(il, rxq);
230 spin_unlock_irqrestore(&il->lock, flags);
232 /* Allocate or reset and init all Tx and Command queues */
234 ret = il4965_txq_ctx_alloc(il);
238 il4965_txq_ctx_reset(il);
240 set_bit(S_INIT, &il->status);
246 * il4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
249 il4965_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
251 return cpu_to_le32((u32) (dma_addr >> 8));
255 * il4965_rx_queue_restock - refill RX queue from pre-allocated pool
257 * If there are slots in the RX queue that need to be restocked,
258 * and we have free pre-allocated buffers, fill the ranks as much
259 * as we can, pulling from rx_free.
261 * This moves the 'write' idx forward to catch up with 'processed', and
262 * also updates the memory address in the firmware to reference the new
266 il4965_rx_queue_restock(struct il_priv *il)
268 struct il_rx_queue *rxq = &il->rxq;
269 struct list_head *element;
270 struct il_rx_buf *rxb;
273 spin_lock_irqsave(&rxq->lock, flags);
274 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
275 /* The overwritten rxb must be a used one */
276 rxb = rxq->queue[rxq->write];
277 BUG_ON(rxb && rxb->page);
279 /* Get next free Rx buffer, remove from free list */
280 element = rxq->rx_free.next;
281 rxb = list_entry(element, struct il_rx_buf, list);
284 /* Point to Rx buffer via next RBD in circular buffer */
285 rxq->bd[rxq->write] =
286 il4965_dma_addr2rbd_ptr(il, rxb->page_dma);
287 rxq->queue[rxq->write] = rxb;
288 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
291 spin_unlock_irqrestore(&rxq->lock, flags);
292 /* If the pre-allocated buffer pool is dropping low, schedule to
294 if (rxq->free_count <= RX_LOW_WATERMARK)
295 queue_work(il->workqueue, &il->rx_replenish);
297 /* If we've added more space for the firmware to place data, tell it.
298 * Increment device's write pointer in multiples of 8. */
299 if (rxq->write_actual != (rxq->write & ~0x7)) {
300 spin_lock_irqsave(&rxq->lock, flags);
301 rxq->need_update = 1;
302 spin_unlock_irqrestore(&rxq->lock, flags);
303 il_rx_queue_update_write_ptr(il, rxq);
308 * il4965_rx_replenish - Move all used packet from rx_used to rx_free
310 * When moving to rx_free an SKB is allocated for the slot.
312 * Also restock the Rx queue via il_rx_queue_restock.
313 * This is called as a scheduled work item (except for during initialization)
316 il4965_rx_allocate(struct il_priv *il, gfp_t priority)
318 struct il_rx_queue *rxq = &il->rxq;
319 struct list_head *element;
320 struct il_rx_buf *rxb;
324 gfp_t gfp_mask = priority;
327 spin_lock_irqsave(&rxq->lock, flags);
328 if (list_empty(&rxq->rx_used)) {
329 spin_unlock_irqrestore(&rxq->lock, flags);
332 spin_unlock_irqrestore(&rxq->lock, flags);
334 if (rxq->free_count > RX_LOW_WATERMARK)
335 gfp_mask |= __GFP_NOWARN;
337 if (il->hw_params.rx_page_order > 0)
338 gfp_mask |= __GFP_COMP;
340 /* Alloc a new receive buffer */
341 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
344 D_INFO("alloc_pages failed, " "order: %d\n",
345 il->hw_params.rx_page_order);
347 if (rxq->free_count <= RX_LOW_WATERMARK &&
349 IL_ERR("Failed to alloc_pages with %s. "
350 "Only %u free buffers remaining.\n",
352 GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
354 /* We don't reschedule replenish work here -- we will
355 * call the restock method and if it still needs
356 * more buffers it will schedule replenish */
360 /* Get physical address of the RB */
362 pci_map_page(il->pci_dev, page, 0,
363 PAGE_SIZE << il->hw_params.rx_page_order,
365 if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) {
366 __free_pages(page, il->hw_params.rx_page_order);
370 spin_lock_irqsave(&rxq->lock, flags);
372 if (list_empty(&rxq->rx_used)) {
373 spin_unlock_irqrestore(&rxq->lock, flags);
374 pci_unmap_page(il->pci_dev, page_dma,
375 PAGE_SIZE << il->hw_params.rx_page_order,
377 __free_pages(page, il->hw_params.rx_page_order);
381 element = rxq->rx_used.next;
382 rxb = list_entry(element, struct il_rx_buf, list);
388 rxb->page_dma = page_dma;
389 list_add_tail(&rxb->list, &rxq->rx_free);
391 il->alloc_rxb_page++;
393 spin_unlock_irqrestore(&rxq->lock, flags);
398 il4965_rx_replenish(struct il_priv *il)
402 il4965_rx_allocate(il, GFP_KERNEL);
404 spin_lock_irqsave(&il->lock, flags);
405 il4965_rx_queue_restock(il);
406 spin_unlock_irqrestore(&il->lock, flags);
410 il4965_rx_replenish_now(struct il_priv *il)
412 il4965_rx_allocate(il, GFP_ATOMIC);
414 il4965_rx_queue_restock(il);
417 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
418 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
419 * This free routine walks the list of POOL entries and if SKB is set to
420 * non NULL it is unmapped and freed
423 il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
426 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
427 if (rxq->pool[i].page != NULL) {
428 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
429 PAGE_SIZE << il->hw_params.rx_page_order,
431 __il_free_pages(il, rxq->pool[i].page);
432 rxq->pool[i].page = NULL;
436 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
438 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
439 rxq->rb_stts, rxq->rb_stts_dma);
445 il4965_rxq_stop(struct il_priv *il)
449 _il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0);
450 ret = _il_poll_bit(il, FH49_MEM_RSSR_RX_STATUS_REG,
451 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
452 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
455 IL_ERR("Can't stop Rx DMA.\n");
461 il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
466 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
467 if (rate_n_flags & RATE_MCS_HT_MSK) {
468 idx = (rate_n_flags & 0xff);
470 /* Legacy rate format, search for match in table */
472 if (band == IEEE80211_BAND_5GHZ)
473 band_offset = IL_FIRST_OFDM_RATE;
474 for (idx = band_offset; idx < RATE_COUNT_LEGACY; idx++)
475 if (il_rates[idx].plcp == (rate_n_flags & 0xFF))
476 return idx - band_offset;
483 il4965_calc_rssi(struct il_priv *il, struct il_rx_phy_res *rx_resp)
485 /* data from PHY/DSP regarding signal strength, etc.,
486 * contents are always there, not configurable by host. */
487 struct il4965_rx_non_cfg_phy *ncphy =
488 (struct il4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
490 (le16_to_cpu(ncphy->agc_info) & IL49_AGC_DB_MASK) >>
494 (le16_to_cpu(rx_resp->phy_flags) & IL49_RX_PHY_FLAGS_ANTENNAE_MASK)
495 >> IL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
499 /* Find max rssi among 3 possible receivers.
500 * These values are measured by the digital signal processor (DSP).
501 * They should stay fairly constant even as the signal strength varies,
502 * if the radio's automatic gain control (AGC) is working right.
503 * AGC value (see below) will provide the "interesting" info. */
504 for (i = 0; i < 3; i++)
505 if (valid_antennae & (1 << i))
506 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
508 D_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
509 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
512 /* dBm = max_rssi dB - agc dB - constant.
513 * Higher AGC (higher radio gain) means lower signal. */
514 return max_rssi - agc - IL4965_RSSI_OFFSET;
518 il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in)
522 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
523 RX_RES_STATUS_STATION_FOUND)
525 (RX_RES_STATUS_STATION_FOUND |
526 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
528 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
530 /* packet was not encrypted */
531 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
532 RX_RES_STATUS_SEC_TYPE_NONE)
535 /* packet was encrypted with unknown alg */
536 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
537 RX_RES_STATUS_SEC_TYPE_ERR)
540 /* decryption was not done in HW */
541 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
542 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
545 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
547 case RX_RES_STATUS_SEC_TYPE_CCMP:
548 /* alg is CCM: check MIC only */
549 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
551 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
553 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
557 case RX_RES_STATUS_SEC_TYPE_TKIP:
558 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
560 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
563 /* fall through if TTAK OK */
565 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
566 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
568 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
572 D_RX("decrypt_in:0x%x decrypt_out = 0x%x\n", decrypt_in, decrypt_out);
577 #define SMALL_PACKET_SIZE 256
580 il4965_pass_packet_to_mac80211(struct il_priv *il, struct ieee80211_hdr *hdr,
581 u32 len, u32 ampdu_status, struct il_rx_buf *rxb,
582 struct ieee80211_rx_status *stats)
585 __le16 fc = hdr->frame_control;
587 /* We only process data packets if the interface is open */
588 if (unlikely(!il->is_open)) {
589 D_DROP("Dropping packet while interface is not open.\n");
593 if (unlikely(test_bit(IL_STOP_REASON_PASSIVE, &il->stop_reason))) {
594 il_wake_queues_by_reason(il, IL_STOP_REASON_PASSIVE);
595 D_INFO("Woke queues - frame received on passive channel\n");
598 /* In case of HW accelerated crypto and bad decryption, drop */
599 if (!il->cfg->mod_params->sw_crypto &&
600 il_set_decrypted_flag(il, hdr, ampdu_status, stats))
603 skb = dev_alloc_skb(SMALL_PACKET_SIZE);
605 IL_ERR("dev_alloc_skb failed\n");
609 if (len <= SMALL_PACKET_SIZE) {
610 memcpy(skb_put(skb, len), hdr, len);
612 skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb),
613 len, PAGE_SIZE << il->hw_params.rx_page_order);
614 il->alloc_rxb_page--;
618 il_update_stats(il, false, fc, len);
619 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
621 ieee80211_rx(il->hw, skb);
624 /* Called for N_RX (legacy ABG frames), or
625 * N_RX_MPDU (HT high-throughput N frames). */
627 il4965_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb)
629 struct ieee80211_hdr *header;
630 struct ieee80211_rx_status rx_status = {};
631 struct il_rx_pkt *pkt = rxb_addr(rxb);
632 struct il_rx_phy_res *phy_res;
633 __le32 rx_pkt_status;
634 struct il_rx_mpdu_res_start *amsdu;
640 * N_RX and N_RX_MPDU are handled differently.
641 * N_RX: physical layer info is in this buffer
642 * N_RX_MPDU: physical layer info was sent in separate
643 * command and cached in il->last_phy_res
645 * Here we set up local variables depending on which command is
648 if (pkt->hdr.cmd == N_RX) {
649 phy_res = (struct il_rx_phy_res *)pkt->u.raw;
651 (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res) +
652 phy_res->cfg_phy_cnt);
654 len = le16_to_cpu(phy_res->byte_count);
656 *(__le32 *) (pkt->u.raw + sizeof(*phy_res) +
657 phy_res->cfg_phy_cnt + len);
658 ampdu_status = le32_to_cpu(rx_pkt_status);
660 if (!il->_4965.last_phy_res_valid) {
661 IL_ERR("MPDU frame without cached PHY data\n");
664 phy_res = &il->_4965.last_phy_res;
665 amsdu = (struct il_rx_mpdu_res_start *)pkt->u.raw;
666 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
667 len = le16_to_cpu(amsdu->byte_count);
668 rx_pkt_status = *(__le32 *) (pkt->u.raw + sizeof(*amsdu) + len);
670 il4965_translate_rx_status(il, le32_to_cpu(rx_pkt_status));
673 if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
674 D_DROP("dsp size out of range [0,20]: %d/n",
675 phy_res->cfg_phy_cnt);
679 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
680 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
681 D_RX("Bad CRC or FIFO: 0x%08X.\n", le32_to_cpu(rx_pkt_status));
685 /* This will be used in several places later */
686 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
688 /* rx_status carries information about the packet to mac80211 */
689 rx_status.mactime = le64_to_cpu(phy_res->timestamp);
692 phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? IEEE80211_BAND_2GHZ :
695 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel),
698 il4965_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
701 /* TSF isn't reliable. In order to allow smooth user experience,
702 * this W/A doesn't propagate it to the mac80211 */
703 /*rx_status.flag |= RX_FLAG_MACTIME_START; */
705 il->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
707 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
708 rx_status.signal = il4965_calc_rssi(il, phy_res);
710 D_STATS("Rssi %d, TSF %llu\n", rx_status.signal,
711 (unsigned long long)rx_status.mactime);
716 * It seems that the antenna field in the phy flags value
717 * is actually a bit field. This is undefined by radiotap,
718 * it wants an actual antenna number but I always get "7"
719 * for most legacy frames I receive indicating that the
720 * same frame was received on all three RX chains.
722 * I think this field should be removed in favor of a
723 * new 802.11n radiotap field "RX chains" that is defined
727 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK) >>
728 RX_RES_PHY_FLAGS_ANTENNA_POS;
730 /* set the preamble flag if appropriate */
731 if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
732 rx_status.flag |= RX_FLAG_SHORTPRE;
734 /* Set up the HT phy flags */
735 if (rate_n_flags & RATE_MCS_HT_MSK)
736 rx_status.flag |= RX_FLAG_HT;
737 if (rate_n_flags & RATE_MCS_HT40_MSK)
738 rx_status.flag |= RX_FLAG_40MHZ;
739 if (rate_n_flags & RATE_MCS_SGI_MSK)
740 rx_status.flag |= RX_FLAG_SHORT_GI;
742 if (phy_res->phy_flags & RX_RES_PHY_FLAGS_AGG_MSK) {
743 /* We know which subframes of an A-MPDU belong
744 * together since we get a single PHY response
745 * from the firmware for all of them.
748 rx_status.flag |= RX_FLAG_AMPDU_DETAILS;
749 rx_status.ampdu_reference = il->_4965.ampdu_ref;
752 il4965_pass_packet_to_mac80211(il, header, len, ampdu_status, rxb,
756 /* Cache phy data (Rx signal strength, etc) for HT frame (N_RX_PHY).
757 * This will be used later in il_hdl_rx() for N_RX_MPDU. */
759 il4965_hdl_rx_phy(struct il_priv *il, struct il_rx_buf *rxb)
761 struct il_rx_pkt *pkt = rxb_addr(rxb);
762 il->_4965.last_phy_res_valid = true;
763 il->_4965.ampdu_ref++;
764 memcpy(&il->_4965.last_phy_res, pkt->u.raw,
765 sizeof(struct il_rx_phy_res));
769 il4965_get_channels_for_scan(struct il_priv *il, struct ieee80211_vif *vif,
770 enum ieee80211_band band, u8 is_active,
771 u8 n_probes, struct il_scan_channel *scan_ch)
773 struct ieee80211_channel *chan;
774 const struct ieee80211_supported_band *sband;
775 const struct il_channel_info *ch_info;
776 u16 passive_dwell = 0;
777 u16 active_dwell = 0;
781 sband = il_get_hw_mode(il, band);
785 active_dwell = il_get_active_dwell_time(il, band, n_probes);
786 passive_dwell = il_get_passive_dwell_time(il, band, vif);
788 if (passive_dwell <= active_dwell)
789 passive_dwell = active_dwell + 1;
791 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
792 chan = il->scan_request->channels[i];
794 if (chan->band != band)
797 channel = chan->hw_value;
798 scan_ch->channel = cpu_to_le16(channel);
800 ch_info = il_get_channel_info(il, band, channel);
801 if (!il_is_channel_valid(ch_info)) {
802 D_SCAN("Channel %d is INVALID for this band.\n",
807 if (!is_active || il_is_channel_passive(ch_info) ||
808 (chan->flags & IEEE80211_CHAN_NO_IR))
809 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
811 scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
814 scan_ch->type |= IL_SCAN_PROBE_MASK(n_probes);
816 scan_ch->active_dwell = cpu_to_le16(active_dwell);
817 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
819 /* Set txpower levels to defaults */
820 scan_ch->dsp_atten = 110;
822 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
824 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
826 if (band == IEEE80211_BAND_5GHZ)
827 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
829 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
831 D_SCAN("Scanning ch=%d prob=0x%X [%s %d]\n", channel,
832 le32_to_cpu(scan_ch->type),
834 type & SCAN_CHANNEL_TYPE_ACTIVE) ? "ACTIVE" : "PASSIVE",
836 type & SCAN_CHANNEL_TYPE_ACTIVE) ? active_dwell :
843 D_SCAN("total channels to scan %d\n", added);
848 il4965_toggle_tx_ant(struct il_priv *il, u8 *ant, u8 valid)
853 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
854 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
855 if (valid & BIT(ind)) {
863 il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
865 struct il_host_cmd cmd = {
867 .len = sizeof(struct il_scan_cmd),
868 .flags = CMD_SIZE_HUGE,
870 struct il_scan_cmd *scan;
874 enum ieee80211_band band;
876 u8 rx_ant = il->hw_params.valid_rx_ant;
878 bool is_active = false;
881 u8 scan_tx_antennas = il->hw_params.valid_tx_ant;
884 lockdep_assert_held(&il->mutex);
888 kmalloc(sizeof(struct il_scan_cmd) + IL_MAX_SCAN_SIZE,
891 D_SCAN("fail to allocate memory for scan\n");
896 memset(scan, 0, sizeof(struct il_scan_cmd) + IL_MAX_SCAN_SIZE);
898 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
899 scan->quiet_time = IL_ACTIVE_QUIET_TIME;
901 if (il_is_any_associated(il)) {
904 u32 suspend_time = 100;
905 u32 scan_suspend_time = 100;
907 D_INFO("Scanning while associated...\n");
908 interval = vif->bss_conf.beacon_int;
910 scan->suspend_time = 0;
911 scan->max_out_time = cpu_to_le32(200 * 1024);
913 interval = suspend_time;
915 extra = (suspend_time / interval) << 22;
917 (extra | ((suspend_time % interval) * 1024));
918 scan->suspend_time = cpu_to_le32(scan_suspend_time);
919 D_SCAN("suspend_time 0x%X beacon interval %d\n",
920 scan_suspend_time, interval);
923 if (il->scan_request->n_ssids) {
925 D_SCAN("Kicking off active scan\n");
926 for (i = 0; i < il->scan_request->n_ssids; i++) {
927 /* always does wildcard anyway */
928 if (!il->scan_request->ssids[i].ssid_len)
930 scan->direct_scan[p].id = WLAN_EID_SSID;
931 scan->direct_scan[p].len =
932 il->scan_request->ssids[i].ssid_len;
933 memcpy(scan->direct_scan[p].ssid,
934 il->scan_request->ssids[i].ssid,
935 il->scan_request->ssids[i].ssid_len);
941 D_SCAN("Start passive scan.\n");
943 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
944 scan->tx_cmd.sta_id = il->hw_params.bcast_id;
945 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
947 switch (il->scan_band) {
948 case IEEE80211_BAND_2GHZ:
949 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
951 le32_to_cpu(il->active.flags & RXON_FLG_CHANNEL_MODE_MSK) >>
952 RXON_FLG_CHANNEL_MODE_POS;
953 if (chan_mod == CHANNEL_MODE_PURE_40) {
957 rate_flags = RATE_MCS_CCK_MSK;
960 case IEEE80211_BAND_5GHZ:
964 IL_WARN("Invalid scan band\n");
969 * If active scanning is requested but a certain channel is
970 * marked passive, we can do active scanning if we detect
973 * There is an issue with some firmware versions that triggers
974 * a sysassert on a "good CRC threshold" of zero (== disabled),
975 * on a radar channel even though this means that we should NOT
978 * The "good CRC threshold" is the number of frames that we
979 * need to receive during our dwell time on a channel before
980 * sending out probes -- setting this to a huge value will
981 * mean we never reach it, but at the same time work around
982 * the aforementioned issue. Thus use IL_GOOD_CRC_TH_NEVER
983 * here instead of IL_GOOD_CRC_TH_DISABLED.
986 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
988 band = il->scan_band;
990 if (il->cfg->scan_rx_antennas[band])
991 rx_ant = il->cfg->scan_rx_antennas[band];
993 il4965_toggle_tx_ant(il, &il->scan_tx_ant[band], scan_tx_antennas);
994 rate_flags |= BIT(il->scan_tx_ant[band]) << RATE_MCS_ANT_POS;
995 scan->tx_cmd.rate_n_flags = cpu_to_le32(rate | rate_flags);
997 /* In power save mode use one chain, otherwise use all chains */
998 if (test_bit(S_POWER_PMI, &il->status)) {
999 /* rx_ant has been set to all valid chains previously */
1001 rx_ant & ((u8) (il->chain_noise_data.active_chains));
1003 active_chains = rx_ant;
1005 D_SCAN("chain_noise_data.active_chains: %u\n",
1006 il->chain_noise_data.active_chains);
1008 rx_ant = il4965_first_antenna(active_chains);
1011 /* MIMO is not used here, but value is required */
1012 rx_chain |= il->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
1013 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1014 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
1015 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1016 scan->rx_chain = cpu_to_le16(rx_chain);
1019 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
1020 vif->addr, il->scan_request->ie,
1021 il->scan_request->ie_len,
1022 IL_MAX_SCAN_SIZE - sizeof(*scan));
1023 scan->tx_cmd.len = cpu_to_le16(cmd_len);
1025 scan->filter_flags |=
1026 (RXON_FILTER_ACCEPT_GRP_MSK | RXON_FILTER_BCON_AWARE_MSK);
1028 scan->channel_count =
1029 il4965_get_channels_for_scan(il, vif, band, is_active, n_probes,
1030 (void *)&scan->data[cmd_len]);
1031 if (scan->channel_count == 0) {
1032 D_SCAN("channel count %d\n", scan->channel_count);
1037 le16_to_cpu(scan->tx_cmd.len) +
1038 scan->channel_count * sizeof(struct il_scan_channel);
1040 scan->len = cpu_to_le16(cmd.len);
1042 set_bit(S_SCAN_HW, &il->status);
1044 ret = il_send_cmd_sync(il, &cmd);
1046 clear_bit(S_SCAN_HW, &il->status);
1052 il4965_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif,
1055 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
1058 return il4965_add_bssid_station(il, vif->bss_conf.bssid,
1059 &vif_priv->ibss_bssid_sta_id);
1060 return il_remove_station(il, vif_priv->ibss_bssid_sta_id,
1061 vif->bss_conf.bssid);
1065 il4965_free_tfds_in_queue(struct il_priv *il, int sta_id, int tid, int freed)
1067 lockdep_assert_held(&il->sta_lock);
1069 if (il->stations[sta_id].tid[tid].tfds_in_queue >= freed)
1070 il->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1072 D_TX("free more than tfds_in_queue (%u:%d)\n",
1073 il->stations[sta_id].tid[tid].tfds_in_queue, freed);
1074 il->stations[sta_id].tid[tid].tfds_in_queue = 0;
1078 #define IL_TX_QUEUE_MSK 0xfffff
1081 il4965_is_single_rx_stream(struct il_priv *il)
1083 return il->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
1084 il->current_ht_config.single_chain_sufficient;
1087 #define IL_NUM_RX_CHAINS_MULTIPLE 3
1088 #define IL_NUM_RX_CHAINS_SINGLE 2
1089 #define IL_NUM_IDLE_CHAINS_DUAL 2
1090 #define IL_NUM_IDLE_CHAINS_SINGLE 1
1093 * Determine how many receiver/antenna chains to use.
1095 * More provides better reception via diversity. Fewer saves power
1096 * at the expense of throughput, but only when not in powersave to
1099 * MIMO (dual stream) requires at least 2, but works better with 3.
1100 * This does not determine *which* chains to use, just how many.
1103 il4965_get_active_rx_chain_count(struct il_priv *il)
1105 /* # of Rx chains to use when expecting MIMO. */
1106 if (il4965_is_single_rx_stream(il))
1107 return IL_NUM_RX_CHAINS_SINGLE;
1109 return IL_NUM_RX_CHAINS_MULTIPLE;
1113 * When we are in power saving mode, unless device support spatial
1114 * multiplexing power save, use the active count for rx chain count.
1117 il4965_get_idle_rx_chain_count(struct il_priv *il, int active_cnt)
1119 /* # Rx chains when idling, depending on SMPS mode */
1120 switch (il->current_ht_config.smps) {
1121 case IEEE80211_SMPS_STATIC:
1122 case IEEE80211_SMPS_DYNAMIC:
1123 return IL_NUM_IDLE_CHAINS_SINGLE;
1124 case IEEE80211_SMPS_OFF:
1127 WARN(1, "invalid SMPS mode %d", il->current_ht_config.smps);
1132 /* up to 4 chains */
1134 il4965_count_chain_bitmap(u32 chain_bitmap)
1137 res = (chain_bitmap & BIT(0)) >> 0;
1138 res += (chain_bitmap & BIT(1)) >> 1;
1139 res += (chain_bitmap & BIT(2)) >> 2;
1140 res += (chain_bitmap & BIT(3)) >> 3;
1145 * il4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1147 * Selects how many and which Rx receivers/antennas/chains to use.
1148 * This should not be used for scan command ... it puts data in wrong place.
1151 il4965_set_rxon_chain(struct il_priv *il)
1153 bool is_single = il4965_is_single_rx_stream(il);
1154 bool is_cam = !test_bit(S_POWER_PMI, &il->status);
1155 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1159 /* Tell uCode which antennas are actually connected.
1160 * Before first association, we assume all antennas are connected.
1161 * Just after first association, il4965_chain_noise_calibration()
1162 * checks which antennas actually *are* connected. */
1163 if (il->chain_noise_data.active_chains)
1164 active_chains = il->chain_noise_data.active_chains;
1166 active_chains = il->hw_params.valid_rx_ant;
1168 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1170 /* How many receivers should we use? */
1171 active_rx_cnt = il4965_get_active_rx_chain_count(il);
1172 idle_rx_cnt = il4965_get_idle_rx_chain_count(il, active_rx_cnt);
1174 /* correct rx chain count according hw settings
1175 * and chain noise calibration
1177 valid_rx_cnt = il4965_count_chain_bitmap(active_chains);
1178 if (valid_rx_cnt < active_rx_cnt)
1179 active_rx_cnt = valid_rx_cnt;
1181 if (valid_rx_cnt < idle_rx_cnt)
1182 idle_rx_cnt = valid_rx_cnt;
1184 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1185 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1187 il->staging.rx_chain = cpu_to_le16(rx_chain);
1189 if (!is_single && active_rx_cnt >= IL_NUM_RX_CHAINS_SINGLE && is_cam)
1190 il->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1192 il->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1194 D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", il->staging.rx_chain,
1195 active_rx_cnt, idle_rx_cnt);
1197 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1198 active_rx_cnt < idle_rx_cnt);
1202 il4965_get_fh_string(int cmd)
1205 IL_CMD(FH49_RSCSR_CHNL0_STTS_WPTR_REG);
1206 IL_CMD(FH49_RSCSR_CHNL0_RBDCB_BASE_REG);
1207 IL_CMD(FH49_RSCSR_CHNL0_WPTR);
1208 IL_CMD(FH49_MEM_RCSR_CHNL0_CONFIG_REG);
1209 IL_CMD(FH49_MEM_RSSR_SHARED_CTRL_REG);
1210 IL_CMD(FH49_MEM_RSSR_RX_STATUS_REG);
1211 IL_CMD(FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
1212 IL_CMD(FH49_TSSR_TX_STATUS_REG);
1213 IL_CMD(FH49_TSSR_TX_ERROR_REG);
1220 il4965_dump_fh(struct il_priv *il, char **buf, bool display)
1223 #ifdef CONFIG_IWLEGACY_DEBUG
1227 static const u32 fh_tbl[] = {
1228 FH49_RSCSR_CHNL0_STTS_WPTR_REG,
1229 FH49_RSCSR_CHNL0_RBDCB_BASE_REG,
1230 FH49_RSCSR_CHNL0_WPTR,
1231 FH49_MEM_RCSR_CHNL0_CONFIG_REG,
1232 FH49_MEM_RSSR_SHARED_CTRL_REG,
1233 FH49_MEM_RSSR_RX_STATUS_REG,
1234 FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
1235 FH49_TSSR_TX_STATUS_REG,
1236 FH49_TSSR_TX_ERROR_REG
1238 #ifdef CONFIG_IWLEGACY_DEBUG
1240 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
1241 *buf = kmalloc(bufsz, GFP_KERNEL);
1245 scnprintf(*buf + pos, bufsz - pos, "FH register values:\n");
1246 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1248 scnprintf(*buf + pos, bufsz - pos,
1250 il4965_get_fh_string(fh_tbl[i]),
1251 il_rd(il, fh_tbl[i]));
1256 IL_ERR("FH register values:\n");
1257 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1258 IL_ERR(" %34s: 0X%08x\n", il4965_get_fh_string(fh_tbl[i]),
1259 il_rd(il, fh_tbl[i]));
1265 il4965_hdl_missed_beacon(struct il_priv *il, struct il_rx_buf *rxb)
1267 struct il_rx_pkt *pkt = rxb_addr(rxb);
1268 struct il_missed_beacon_notif *missed_beacon;
1270 missed_beacon = &pkt->u.missed_beacon;
1271 if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
1272 il->missed_beacon_threshold) {
1273 D_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
1274 le32_to_cpu(missed_beacon->consecutive_missed_beacons),
1275 le32_to_cpu(missed_beacon->total_missed_becons),
1276 le32_to_cpu(missed_beacon->num_recvd_beacons),
1277 le32_to_cpu(missed_beacon->num_expected_beacons));
1278 if (!test_bit(S_SCANNING, &il->status))
1279 il4965_init_sensitivity(il);
1283 /* Calculate noise level, based on measurements during network silence just
1284 * before arriving beacon. This measurement can be done only if we know
1285 * exactly when to expect beacons, therefore only when we're associated. */
1287 il4965_rx_calc_noise(struct il_priv *il)
1289 struct stats_rx_non_phy *rx_info;
1290 int num_active_rx = 0;
1291 int total_silence = 0;
1292 int bcn_silence_a, bcn_silence_b, bcn_silence_c;
1295 rx_info = &(il->_4965.stats.rx.general);
1297 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
1299 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
1301 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
1303 if (bcn_silence_a) {
1304 total_silence += bcn_silence_a;
1307 if (bcn_silence_b) {
1308 total_silence += bcn_silence_b;
1311 if (bcn_silence_c) {
1312 total_silence += bcn_silence_c;
1316 /* Average among active antennas */
1318 last_rx_noise = (total_silence / num_active_rx) - 107;
1320 last_rx_noise = IL_NOISE_MEAS_NOT_AVAILABLE;
1322 D_CALIB("inband silence a %u, b %u, c %u, dBm %d\n", bcn_silence_a,
1323 bcn_silence_b, bcn_silence_c, last_rx_noise);
1326 #ifdef CONFIG_IWLEGACY_DEBUGFS
1328 * based on the assumption of all stats counter are in DWORD
1329 * FIXME: This function is for debugging, do not deal with
1330 * the case of counters roll-over.
1333 il4965_accumulative_stats(struct il_priv *il, __le32 * stats)
1338 u32 *delta, *max_delta;
1339 struct stats_general_common *general, *accum_general;
1340 struct stats_tx *tx, *accum_tx;
1342 prev_stats = (__le32 *) &il->_4965.stats;
1343 accum_stats = (u32 *) &il->_4965.accum_stats;
1344 size = sizeof(struct il_notif_stats);
1345 general = &il->_4965.stats.general.common;
1346 accum_general = &il->_4965.accum_stats.general.common;
1347 tx = &il->_4965.stats.tx;
1348 accum_tx = &il->_4965.accum_stats.tx;
1349 delta = (u32 *) &il->_4965.delta_stats;
1350 max_delta = (u32 *) &il->_4965.max_delta;
1352 for (i = sizeof(__le32); i < size;
1354 sizeof(__le32), stats++, prev_stats++, delta++, max_delta++,
1356 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
1358 (le32_to_cpu(*stats) - le32_to_cpu(*prev_stats));
1359 *accum_stats += *delta;
1360 if (*delta > *max_delta)
1361 *max_delta = *delta;
1365 /* reset accumulative stats for "no-counter" type stats */
1366 accum_general->temperature = general->temperature;
1367 accum_general->ttl_timestamp = general->ttl_timestamp;
1372 il4965_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb)
1374 const int recalib_seconds = 60;
1376 struct il_rx_pkt *pkt = rxb_addr(rxb);
1378 D_RX("Statistics notification received (%d vs %d).\n",
1379 (int)sizeof(struct il_notif_stats),
1380 le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK);
1383 ((il->_4965.stats.general.common.temperature !=
1384 pkt->u.stats.general.common.temperature) ||
1385 ((il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK) !=
1386 (pkt->u.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)));
1387 #ifdef CONFIG_IWLEGACY_DEBUGFS
1388 il4965_accumulative_stats(il, (__le32 *) &pkt->u.stats);
1391 /* TODO: reading some of stats is unneeded */
1392 memcpy(&il->_4965.stats, &pkt->u.stats, sizeof(il->_4965.stats));
1394 set_bit(S_STATS, &il->status);
1397 * Reschedule the stats timer to occur in recalib_seconds to ensure
1398 * we get a thermal update even if the uCode doesn't give us one
1400 mod_timer(&il->stats_periodic,
1401 jiffies + msecs_to_jiffies(recalib_seconds * 1000));
1403 if (unlikely(!test_bit(S_SCANNING, &il->status)) &&
1404 (pkt->hdr.cmd == N_STATS)) {
1405 il4965_rx_calc_noise(il);
1406 queue_work(il->workqueue, &il->run_time_calib_work);
1410 il4965_temperature_calib(il);
1414 il4965_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb)
1416 struct il_rx_pkt *pkt = rxb_addr(rxb);
1418 if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATS_CLEAR_MSK) {
1419 #ifdef CONFIG_IWLEGACY_DEBUGFS
1420 memset(&il->_4965.accum_stats, 0,
1421 sizeof(struct il_notif_stats));
1422 memset(&il->_4965.delta_stats, 0,
1423 sizeof(struct il_notif_stats));
1424 memset(&il->_4965.max_delta, 0, sizeof(struct il_notif_stats));
1426 D_RX("Statistics have been cleared\n");
1428 il4965_hdl_stats(il, rxb);
1433 * mac80211 queues, ACs, hardware queues, FIFOs.
1435 * Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues
1437 * Mac80211 uses the following numbers, which we get as from it
1438 * by way of skb_get_queue_mapping(skb):
1446 * Regular (not A-MPDU) frames are put into hardware queues corresponding
1447 * to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their
1448 * own queue per aggregation session (RA/TID combination), such queues are
1449 * set up to map into FIFOs too, for which we need an AC->FIFO mapping. In
1450 * order to map frames to the right queue, we also need an AC->hw queue
1451 * mapping. This is implemented here.
1453 * Due to the way hw queues are set up (by the hw specific modules like
1454 * 4965.c), the AC->hw queue mapping is the identity
1458 static const u8 tid_to_ac[] = {
1470 il4965_get_ac_from_tid(u16 tid)
1472 if (likely(tid < ARRAY_SIZE(tid_to_ac)))
1473 return tid_to_ac[tid];
1475 /* no support for TIDs 8-15 yet */
1480 il4965_get_fifo_from_tid(u16 tid)
1482 const u8 ac_to_fifo[] = {
1489 if (likely(tid < ARRAY_SIZE(tid_to_ac)))
1490 return ac_to_fifo[tid_to_ac[tid]];
1492 /* no support for TIDs 8-15 yet */
1497 * handle build C_TX command notification.
1500 il4965_tx_cmd_build_basic(struct il_priv *il, struct sk_buff *skb,
1501 struct il_tx_cmd *tx_cmd,
1502 struct ieee80211_tx_info *info,
1503 struct ieee80211_hdr *hdr, u8 std_id)
1505 __le16 fc = hdr->frame_control;
1506 __le32 tx_flags = tx_cmd->tx_flags;
1508 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1509 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
1510 tx_flags |= TX_CMD_FLG_ACK_MSK;
1511 if (ieee80211_is_mgmt(fc))
1512 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1513 if (ieee80211_is_probe_resp(fc) &&
1514 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
1515 tx_flags |= TX_CMD_FLG_TSF_MSK;
1517 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
1518 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1521 if (ieee80211_is_back_req(fc))
1522 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
1524 tx_cmd->sta_id = std_id;
1525 if (ieee80211_has_morefrags(fc))
1526 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
1528 if (ieee80211_is_data_qos(fc)) {
1529 u8 *qc = ieee80211_get_qos_ctl(hdr);
1530 tx_cmd->tid_tspec = qc[0] & 0xf;
1531 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
1533 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1536 il_tx_cmd_protection(il, info, fc, &tx_flags);
1538 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
1539 if (ieee80211_is_mgmt(fc)) {
1540 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
1541 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
1543 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
1545 tx_cmd->timeout.pm_frame_timeout = 0;
1548 tx_cmd->driver_txop = 0;
1549 tx_cmd->tx_flags = tx_flags;
1550 tx_cmd->next_frame_len = 0;
1554 il4965_tx_cmd_build_rate(struct il_priv *il,
1555 struct il_tx_cmd *tx_cmd,
1556 struct ieee80211_tx_info *info,
1557 struct ieee80211_sta *sta,
1560 const u8 rts_retry_limit = 60;
1563 u8 data_retry_limit;
1566 /* Set retry limit on DATA packets and Probe Responses */
1567 if (ieee80211_is_probe_resp(fc))
1568 data_retry_limit = 3;
1570 data_retry_limit = IL4965_DEFAULT_TX_RETRY;
1571 tx_cmd->data_retry_limit = data_retry_limit;
1572 /* Set retry limit on RTS packets */
1573 tx_cmd->rts_retry_limit = min(data_retry_limit, rts_retry_limit);
1575 /* DATA packets will use the uCode station table for rate/antenna
1577 if (ieee80211_is_data(fc)) {
1578 tx_cmd->initial_rate_idx = 0;
1579 tx_cmd->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
1584 * If the current TX rate stored in mac80211 has the MCS bit set, it's
1585 * not really a TX rate. Thus, we use the lowest supported rate for
1586 * this band. Also use the lowest supported rate if the stored rate
1589 rate_idx = info->control.rates[0].idx;
1590 if ((info->control.rates[0].flags & IEEE80211_TX_RC_MCS) || rate_idx < 0
1591 || rate_idx > RATE_COUNT_LEGACY)
1592 rate_idx = rate_lowest_index(&il->bands[info->band], sta);
1593 /* For 5 GHZ band, remap mac80211 rate indices into driver indices */
1594 if (info->band == IEEE80211_BAND_5GHZ)
1595 rate_idx += IL_FIRST_OFDM_RATE;
1596 /* Get PLCP rate for tx_cmd->rate_n_flags */
1597 rate_plcp = il_rates[rate_idx].plcp;
1598 /* Zero out flags for this packet */
1601 /* Set CCK flag as needed */
1602 if (rate_idx >= IL_FIRST_CCK_RATE && rate_idx <= IL_LAST_CCK_RATE)
1603 rate_flags |= RATE_MCS_CCK_MSK;
1605 /* Set up antennas */
1606 il4965_toggle_tx_ant(il, &il->mgmt_tx_ant, il->hw_params.valid_tx_ant);
1607 rate_flags |= BIT(il->mgmt_tx_ant) << RATE_MCS_ANT_POS;
1609 /* Set the rate in the TX cmd */
1610 tx_cmd->rate_n_flags = cpu_to_le32(rate_plcp | rate_flags);
1614 il4965_tx_cmd_build_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
1615 struct il_tx_cmd *tx_cmd, struct sk_buff *skb_frag,
1618 struct ieee80211_key_conf *keyconf = info->control.hw_key;
1620 switch (keyconf->cipher) {
1621 case WLAN_CIPHER_SUITE_CCMP:
1622 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
1623 memcpy(tx_cmd->key, keyconf->key, keyconf->keylen);
1624 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1625 tx_cmd->tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
1626 D_TX("tx_cmd with AES hwcrypto\n");
1629 case WLAN_CIPHER_SUITE_TKIP:
1630 tx_cmd->sec_ctl = TX_CMD_SEC_TKIP;
1631 ieee80211_get_tkip_p2k(keyconf, skb_frag, tx_cmd->key);
1632 D_TX("tx_cmd with tkip hwcrypto\n");
1635 case WLAN_CIPHER_SUITE_WEP104:
1636 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
1638 case WLAN_CIPHER_SUITE_WEP40:
1640 (TX_CMD_SEC_WEP | (keyconf->keyidx & TX_CMD_SEC_MSK) <<
1643 memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen);
1645 D_TX("Configuring packet for WEP encryption " "with key %d\n",
1650 IL_ERR("Unknown encode cipher %x\n", keyconf->cipher);
1656 * start C_TX command process
1659 il4965_tx_skb(struct il_priv *il,
1660 struct ieee80211_sta *sta,
1661 struct sk_buff *skb)
1663 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1664 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1665 struct il_station_priv *sta_priv = NULL;
1666 struct il_tx_queue *txq;
1668 struct il_device_cmd *out_cmd;
1669 struct il_cmd_meta *out_meta;
1670 struct il_tx_cmd *tx_cmd;
1672 dma_addr_t phys_addr;
1673 dma_addr_t txcmd_phys;
1674 dma_addr_t scratch_phys;
1675 u16 len, firstlen, secondlen;
1680 u8 wait_write_ptr = 0;
1683 unsigned long flags;
1684 bool is_agg = false;
1686 spin_lock_irqsave(&il->lock, flags);
1687 if (il_is_rfkill(il)) {
1688 D_DROP("Dropping - RF KILL\n");
1692 fc = hdr->frame_control;
1694 #ifdef CONFIG_IWLEGACY_DEBUG
1695 if (ieee80211_is_auth(fc))
1696 D_TX("Sending AUTH frame\n");
1697 else if (ieee80211_is_assoc_req(fc))
1698 D_TX("Sending ASSOC frame\n");
1699 else if (ieee80211_is_reassoc_req(fc))
1700 D_TX("Sending REASSOC frame\n");
1703 hdr_len = ieee80211_hdrlen(fc);
1705 /* For management frames use broadcast id to do not break aggregation */
1706 if (!ieee80211_is_data(fc))
1707 sta_id = il->hw_params.bcast_id;
1709 /* Find idx into station table for destination station */
1710 sta_id = il_sta_id_or_broadcast(il, sta);
1712 if (sta_id == IL_INVALID_STATION) {
1713 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
1718 D_TX("station Id %d\n", sta_id);
1721 sta_priv = (void *)sta->drv_priv;
1723 if (sta_priv && sta_priv->asleep &&
1724 (info->flags & IEEE80211_TX_CTL_NO_PS_BUFFER)) {
1726 * This sends an asynchronous command to the device,
1727 * but we can rely on it being processed before the
1728 * next frame is processed -- and the next frame to
1729 * this station is the one that will consume this
1731 * For now set the counter to just 1 since we do not
1732 * support uAPSD yet.
1734 il4965_sta_modify_sleep_tx_count(il, sta_id, 1);
1737 /* FIXME: remove me ? */
1738 WARN_ON_ONCE(info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM);
1740 /* Access category (AC) is also the queue number */
1741 txq_id = skb_get_queue_mapping(skb);
1743 /* irqs already disabled/saved above when locking il->lock */
1744 spin_lock(&il->sta_lock);
1746 if (ieee80211_is_data_qos(fc)) {
1747 qc = ieee80211_get_qos_ctl(hdr);
1748 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
1749 if (WARN_ON_ONCE(tid >= MAX_TID_COUNT)) {
1750 spin_unlock(&il->sta_lock);
1753 seq_number = il->stations[sta_id].tid[tid].seq_number;
1754 seq_number &= IEEE80211_SCTL_SEQ;
1756 hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG);
1757 hdr->seq_ctrl |= cpu_to_le16(seq_number);
1759 /* aggregation is on for this <sta,tid> */
1760 if (info->flags & IEEE80211_TX_CTL_AMPDU &&
1761 il->stations[sta_id].tid[tid].agg.state == IL_AGG_ON) {
1762 txq_id = il->stations[sta_id].tid[tid].agg.txq_id;
1767 txq = &il->txq[txq_id];
1770 if (unlikely(il_queue_space(q) < q->high_mark)) {
1771 spin_unlock(&il->sta_lock);
1775 if (ieee80211_is_data_qos(fc)) {
1776 il->stations[sta_id].tid[tid].tfds_in_queue++;
1777 if (!ieee80211_has_morefrags(fc))
1778 il->stations[sta_id].tid[tid].seq_number = seq_number;
1781 spin_unlock(&il->sta_lock);
1783 txq->skbs[q->write_ptr] = skb;
1785 /* Set up first empty entry in queue's array of Tx/cmd buffers */
1786 out_cmd = txq->cmd[q->write_ptr];
1787 out_meta = &txq->meta[q->write_ptr];
1788 tx_cmd = &out_cmd->cmd.tx;
1789 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
1790 memset(tx_cmd, 0, sizeof(struct il_tx_cmd));
1793 * Set up the Tx-command (not MAC!) header.
1794 * Store the chosen Tx queue and TFD idx within the sequence field;
1795 * after Tx, uCode's Tx response will return this value so driver can
1796 * locate the frame within the tx queue and do post-tx processing.
1798 out_cmd->hdr.cmd = C_TX;
1799 out_cmd->hdr.sequence =
1801 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
1803 /* Copy MAC header from skb into command buffer */
1804 memcpy(tx_cmd->hdr, hdr, hdr_len);
1806 /* Total # bytes to be transmitted */
1807 tx_cmd->len = cpu_to_le16((u16) skb->len);
1809 if (info->control.hw_key)
1810 il4965_tx_cmd_build_hwcrypto(il, info, tx_cmd, skb, sta_id);
1812 /* TODO need this for burst mode later on */
1813 il4965_tx_cmd_build_basic(il, skb, tx_cmd, info, hdr, sta_id);
1815 il4965_tx_cmd_build_rate(il, tx_cmd, info, sta, fc);
1818 * Use the first empty entry in this queue's command buffer array
1819 * to contain the Tx command and MAC header concatenated together
1820 * (payload data will be in another buffer).
1821 * Size of this varies, due to varying MAC header length.
1822 * If end is not dword aligned, we'll have 2 extra bytes at the end
1823 * of the MAC header (device reads on dword boundaries).
1824 * We'll tell device about this padding later.
1826 len = sizeof(struct il_tx_cmd) + sizeof(struct il_cmd_header) + hdr_len;
1827 firstlen = (len + 3) & ~3;
1829 /* Tell NIC about any 2-byte padding after MAC header */
1830 if (firstlen != len)
1831 tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
1833 /* Physical address of this Tx command's header (not MAC header!),
1834 * within command buffer array. */
1836 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
1837 PCI_DMA_BIDIRECTIONAL);
1838 if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys)))
1841 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1842 * if any (802.11 null frames have no payload). */
1843 secondlen = skb->len - hdr_len;
1844 if (secondlen > 0) {
1846 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
1848 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr)))
1852 /* Add buffer containing Tx command and MAC(!) header to TFD's
1854 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
1855 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
1856 dma_unmap_len_set(out_meta, len, firstlen);
1858 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen,
1861 if (!ieee80211_has_morefrags(hdr->frame_control)) {
1862 txq->need_update = 1;
1865 txq->need_update = 0;
1869 txcmd_phys + sizeof(struct il_cmd_header) +
1870 offsetof(struct il_tx_cmd, scratch);
1872 /* take back ownership of DMA buffer to enable update */
1873 pci_dma_sync_single_for_cpu(il->pci_dev, txcmd_phys, firstlen,
1874 PCI_DMA_BIDIRECTIONAL);
1875 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
1876 tx_cmd->dram_msb_ptr = il_get_dma_hi_addr(scratch_phys);
1878 il_update_stats(il, true, fc, skb->len);
1880 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
1881 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
1882 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd, sizeof(*tx_cmd));
1883 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, hdr_len);
1885 /* Set up entry for this TFD in Tx byte-count array */
1886 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1887 il->ops->txq_update_byte_cnt_tbl(il, txq, le16_to_cpu(tx_cmd->len));
1889 pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys, firstlen,
1890 PCI_DMA_BIDIRECTIONAL);
1892 /* Tell device the write idx *just past* this latest filled TFD */
1893 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
1894 il_txq_update_write_ptr(il, txq);
1895 spin_unlock_irqrestore(&il->lock, flags);
1898 * At this point the frame is "transmitted" successfully
1899 * and we will get a TX status notification eventually,
1900 * regardless of the value of ret. "ret" only indicates
1901 * whether or not we should update the write pointer.
1905 * Avoid atomic ops if it isn't an associated client.
1906 * Also, if this is a packet for aggregation, don't
1907 * increase the counter because the ucode will stop
1908 * aggregation queues when their respective station
1911 if (sta_priv && sta_priv->client && !is_agg)
1912 atomic_inc(&sta_priv->pending_frames);
1914 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
1915 if (wait_write_ptr) {
1916 spin_lock_irqsave(&il->lock, flags);
1917 txq->need_update = 1;
1918 il_txq_update_write_ptr(il, txq);
1919 spin_unlock_irqrestore(&il->lock, flags);
1921 il_stop_queue(il, txq);
1928 spin_unlock_irqrestore(&il->lock, flags);
1933 il4965_alloc_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr, size_t size)
1935 ptr->addr = dma_alloc_coherent(&il->pci_dev->dev, size, &ptr->dma,
1944 il4965_free_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr)
1946 if (unlikely(!ptr->addr))
1949 dma_free_coherent(&il->pci_dev->dev, ptr->size, ptr->addr, ptr->dma);
1950 memset(ptr, 0, sizeof(*ptr));
1954 * il4965_hw_txq_ctx_free - Free TXQ Context
1956 * Destroy all TX DMA queues and structures
1959 il4965_hw_txq_ctx_free(struct il_priv *il)
1965 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
1966 if (txq_id == il->cmd_queue)
1967 il_cmd_queue_free(il);
1969 il_tx_queue_free(il, txq_id);
1971 il4965_free_dma_ptr(il, &il->kw);
1973 il4965_free_dma_ptr(il, &il->scd_bc_tbls);
1975 /* free tx queue structure */
1976 il_free_txq_mem(il);
1980 * il4965_txq_ctx_alloc - allocate TX queue context
1981 * Allocate all Tx DMA structures and initialize them
1984 * @return error code
1987 il4965_txq_ctx_alloc(struct il_priv *il)
1990 unsigned long flags;
1992 /* Free all tx/cmd queues and keep-warm buffer */
1993 il4965_hw_txq_ctx_free(il);
1996 il4965_alloc_dma_ptr(il, &il->scd_bc_tbls,
1997 il->hw_params.scd_bc_tbls_size);
1999 IL_ERR("Scheduler BC Table allocation failed\n");
2002 /* Alloc keep-warm buffer */
2003 ret = il4965_alloc_dma_ptr(il, &il->kw, IL_KW_SIZE);
2005 IL_ERR("Keep Warm allocation failed\n");
2009 /* allocate tx queue structure */
2010 ret = il_alloc_txq_mem(il);
2014 spin_lock_irqsave(&il->lock, flags);
2016 /* Turn off all Tx DMA fifos */
2017 il4965_txq_set_sched(il, 0);
2019 /* Tell NIC where to find the "keep warm" buffer */
2020 il_wr(il, FH49_KW_MEM_ADDR_REG, il->kw.dma >> 4);
2022 spin_unlock_irqrestore(&il->lock, flags);
2024 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
2025 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
2026 ret = il_tx_queue_init(il, txq_id);
2028 IL_ERR("Tx %d queue init failed\n", txq_id);
2036 il4965_hw_txq_ctx_free(il);
2037 il4965_free_dma_ptr(il, &il->kw);
2039 il4965_free_dma_ptr(il, &il->scd_bc_tbls);
2045 il4965_txq_ctx_reset(struct il_priv *il)
2048 unsigned long flags;
2050 spin_lock_irqsave(&il->lock, flags);
2052 /* Turn off all Tx DMA fifos */
2053 il4965_txq_set_sched(il, 0);
2054 /* Tell NIC where to find the "keep warm" buffer */
2055 il_wr(il, FH49_KW_MEM_ADDR_REG, il->kw.dma >> 4);
2057 spin_unlock_irqrestore(&il->lock, flags);
2059 /* Alloc and init all Tx queues, including the command queue (#4) */
2060 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
2061 il_tx_queue_reset(il, txq_id);
2065 il4965_txq_ctx_unmap(struct il_priv *il)
2072 /* Unmap DMA from host system and free skb's */
2073 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
2074 if (txq_id == il->cmd_queue)
2075 il_cmd_queue_unmap(il);
2077 il_tx_queue_unmap(il, txq_id);
2081 * il4965_txq_ctx_stop - Stop all Tx DMA channels
2084 il4965_txq_ctx_stop(struct il_priv *il)
2088 _il_wr_prph(il, IL49_SCD_TXFACT, 0);
2090 /* Stop each Tx DMA channel, and wait for it to be idle */
2091 for (ch = 0; ch < il->hw_params.dma_chnl_num; ch++) {
2092 _il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
2094 _il_poll_bit(il, FH49_TSSR_TX_STATUS_REG,
2095 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
2096 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
2099 IL_ERR("Timeout stopping DMA channel %d [0x%08x]",
2100 ch, _il_rd(il, FH49_TSSR_TX_STATUS_REG));
2105 * Find first available (lowest unused) Tx Queue, mark it "active".
2106 * Called only when finding queue for aggregation.
2107 * Should never return anything < 7, because they should already
2108 * be in use as EDCA AC (0-3), Command (4), reserved (5, 6)
2111 il4965_txq_ctx_activate_free(struct il_priv *il)
2115 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
2116 if (!test_and_set_bit(txq_id, &il->txq_ctx_active_msk))
2122 * il4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2125 il4965_tx_queue_stop_scheduler(struct il_priv *il, u16 txq_id)
2127 /* Simply stop the queue, but don't change any configuration;
2128 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
2129 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id),
2130 (0 << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
2131 (1 << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
2135 * il4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
2138 il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, u16 txq_id)
2144 scd_q2ratid = ra_tid & IL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
2147 il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
2149 tbl_dw = il_read_targ_mem(il, tbl_dw_addr);
2152 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
2154 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
2156 il_write_targ_mem(il, tbl_dw_addr, tbl_dw);
2162 * il4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
2164 * NOTE: txq_id must be greater than IL49_FIRST_AMPDU_QUEUE,
2165 * i.e. it must be one of the higher queues used for aggregation
2168 il4965_txq_agg_enable(struct il_priv *il, int txq_id, int tx_fifo, int sta_id,
2169 int tid, u16 ssn_idx)
2171 unsigned long flags;
2175 if ((IL49_FIRST_AMPDU_QUEUE > txq_id) ||
2176 (IL49_FIRST_AMPDU_QUEUE +
2177 il->cfg->num_of_ampdu_queues <= txq_id)) {
2178 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2179 txq_id, IL49_FIRST_AMPDU_QUEUE,
2180 IL49_FIRST_AMPDU_QUEUE +
2181 il->cfg->num_of_ampdu_queues - 1);
2185 ra_tid = BUILD_RAxTID(sta_id, tid);
2187 /* Modify device's station table to Tx this TID */
2188 ret = il4965_sta_tx_modify_enable_tid(il, sta_id, tid);
2192 spin_lock_irqsave(&il->lock, flags);
2194 /* Stop this Tx queue before configuring it */
2195 il4965_tx_queue_stop_scheduler(il, txq_id);
2197 /* Map receiver-address / traffic-ID to this queue */
2198 il4965_tx_queue_set_q2ratid(il, ra_tid, txq_id);
2200 /* Set this queue as a chain-building queue */
2201 il_set_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2203 /* Place first TFD at idx corresponding to start sequence number.
2204 * Assumes that ssn_idx is valid (!= 0xFFF) */
2205 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2206 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2207 il4965_set_wr_ptrs(il, txq_id, ssn_idx);
2209 /* Set up Tx win size and frame limit for this queue */
2210 il_write_targ_mem(il,
2212 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
2213 (SCD_WIN_SIZE << IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS)
2214 & IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
2216 il_write_targ_mem(il,
2218 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
2220 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
2221 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
2223 il_set_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2225 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
2226 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 1);
2228 spin_unlock_irqrestore(&il->lock, flags);
2234 il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif,
2235 struct ieee80211_sta *sta, u16 tid, u16 * ssn)
2241 unsigned long flags;
2242 struct il_tid_data *tid_data;
2244 /* FIXME: warning if tx fifo not found ? */
2245 tx_fifo = il4965_get_fifo_from_tid(tid);
2246 if (unlikely(tx_fifo < 0))
2249 D_HT("%s on ra = %pM tid = %d\n", __func__, sta->addr, tid);
2251 sta_id = il_sta_id(sta);
2252 if (sta_id == IL_INVALID_STATION) {
2253 IL_ERR("Start AGG on invalid station\n");
2256 if (unlikely(tid >= MAX_TID_COUNT))
2259 if (il->stations[sta_id].tid[tid].agg.state != IL_AGG_OFF) {
2260 IL_ERR("Start AGG when state is not IL_AGG_OFF !\n");
2264 txq_id = il4965_txq_ctx_activate_free(il);
2266 IL_ERR("No free aggregation queue available\n");
2270 spin_lock_irqsave(&il->sta_lock, flags);
2271 tid_data = &il->stations[sta_id].tid[tid];
2272 *ssn = IEEE80211_SEQ_TO_SN(tid_data->seq_number);
2273 tid_data->agg.txq_id = txq_id;
2274 il_set_swq_id(&il->txq[txq_id], il4965_get_ac_from_tid(tid), txq_id);
2275 spin_unlock_irqrestore(&il->sta_lock, flags);
2277 ret = il4965_txq_agg_enable(il, txq_id, tx_fifo, sta_id, tid, *ssn);
2281 spin_lock_irqsave(&il->sta_lock, flags);
2282 tid_data = &il->stations[sta_id].tid[tid];
2283 if (tid_data->tfds_in_queue == 0) {
2284 D_HT("HW queue is empty\n");
2285 tid_data->agg.state = IL_AGG_ON;
2286 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2288 D_HT("HW queue is NOT empty: %d packets in HW queue\n",
2289 tid_data->tfds_in_queue);
2290 tid_data->agg.state = IL_EMPTYING_HW_QUEUE_ADDBA;
2292 spin_unlock_irqrestore(&il->sta_lock, flags);
2297 * txq_id must be greater than IL49_FIRST_AMPDU_QUEUE
2298 * il->lock must be held by the caller
2301 il4965_txq_agg_disable(struct il_priv *il, u16 txq_id, u16 ssn_idx, u8 tx_fifo)
2303 if ((IL49_FIRST_AMPDU_QUEUE > txq_id) ||
2304 (IL49_FIRST_AMPDU_QUEUE +
2305 il->cfg->num_of_ampdu_queues <= txq_id)) {
2306 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2307 txq_id, IL49_FIRST_AMPDU_QUEUE,
2308 IL49_FIRST_AMPDU_QUEUE +
2309 il->cfg->num_of_ampdu_queues - 1);
2313 il4965_tx_queue_stop_scheduler(il, txq_id);
2315 il_clear_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2317 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2318 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2319 /* supposes that ssn_idx is valid (!= 0xFFF) */
2320 il4965_set_wr_ptrs(il, txq_id, ssn_idx);
2322 il_clear_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2323 il_txq_ctx_deactivate(il, txq_id);
2324 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 0);
2330 il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif,
2331 struct ieee80211_sta *sta, u16 tid)
2333 int tx_fifo_id, txq_id, sta_id, ssn;
2334 struct il_tid_data *tid_data;
2335 int write_ptr, read_ptr;
2336 unsigned long flags;
2338 /* FIXME: warning if tx_fifo_id not found ? */
2339 tx_fifo_id = il4965_get_fifo_from_tid(tid);
2340 if (unlikely(tx_fifo_id < 0))
2343 sta_id = il_sta_id(sta);
2345 if (sta_id == IL_INVALID_STATION) {
2346 IL_ERR("Invalid station for AGG tid %d\n", tid);
2350 spin_lock_irqsave(&il->sta_lock, flags);
2352 tid_data = &il->stations[sta_id].tid[tid];
2353 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
2354 txq_id = tid_data->agg.txq_id;
2356 switch (il->stations[sta_id].tid[tid].agg.state) {
2357 case IL_EMPTYING_HW_QUEUE_ADDBA:
2359 * This can happen if the peer stops aggregation
2360 * again before we've had a chance to drain the
2361 * queue we selected previously, i.e. before the
2362 * session was really started completely.
2364 D_HT("AGG stop before setup done\n");
2369 IL_WARN("Stopping AGG while state not ON or starting\n");
2372 write_ptr = il->txq[txq_id].q.write_ptr;
2373 read_ptr = il->txq[txq_id].q.read_ptr;
2375 /* The queue is not empty */
2376 if (write_ptr != read_ptr) {
2377 D_HT("Stopping a non empty AGG HW QUEUE\n");
2378 il->stations[sta_id].tid[tid].agg.state =
2379 IL_EMPTYING_HW_QUEUE_DELBA;
2380 spin_unlock_irqrestore(&il->sta_lock, flags);
2384 D_HT("HW queue is empty\n");
2386 il->stations[sta_id].tid[tid].agg.state = IL_AGG_OFF;
2388 /* do not restore/save irqs */
2389 spin_unlock(&il->sta_lock);
2390 spin_lock(&il->lock);
2393 * the only reason this call can fail is queue number out of range,
2394 * which can happen if uCode is reloaded and all the station
2395 * information are lost. if it is outside the range, there is no need
2396 * to deactivate the uCode queue, just return "success" to allow
2397 * mac80211 to clean up it own data.
2399 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo_id);
2400 spin_unlock_irqrestore(&il->lock, flags);
2402 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2408 il4965_txq_check_empty(struct il_priv *il, int sta_id, u8 tid, int txq_id)
2410 struct il_queue *q = &il->txq[txq_id].q;
2411 u8 *addr = il->stations[sta_id].sta.sta.addr;
2412 struct il_tid_data *tid_data = &il->stations[sta_id].tid[tid];
2414 lockdep_assert_held(&il->sta_lock);
2416 switch (il->stations[sta_id].tid[tid].agg.state) {
2417 case IL_EMPTYING_HW_QUEUE_DELBA:
2418 /* We are reclaiming the last packet of the */
2419 /* aggregated HW queue */
2420 if (txq_id == tid_data->agg.txq_id &&
2421 q->read_ptr == q->write_ptr) {
2422 u16 ssn = IEEE80211_SEQ_TO_SN(tid_data->seq_number);
2423 int tx_fifo = il4965_get_fifo_from_tid(tid);
2424 D_HT("HW queue empty: continue DELBA flow\n");
2425 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo);
2426 tid_data->agg.state = IL_AGG_OFF;
2427 ieee80211_stop_tx_ba_cb_irqsafe(il->vif, addr, tid);
2430 case IL_EMPTYING_HW_QUEUE_ADDBA:
2431 /* We are reclaiming the last packet of the queue */
2432 if (tid_data->tfds_in_queue == 0) {
2433 D_HT("HW queue empty: continue ADDBA flow\n");
2434 tid_data->agg.state = IL_AGG_ON;
2435 ieee80211_start_tx_ba_cb_irqsafe(il->vif, addr, tid);
2444 il4965_non_agg_tx_status(struct il_priv *il, const u8 *addr1)
2446 struct ieee80211_sta *sta;
2447 struct il_station_priv *sta_priv;
2450 sta = ieee80211_find_sta(il->vif, addr1);
2452 sta_priv = (void *)sta->drv_priv;
2453 /* avoid atomic ops if this isn't a client */
2454 if (sta_priv->client &&
2455 atomic_dec_return(&sta_priv->pending_frames) == 0)
2456 ieee80211_sta_block_awake(il->hw, sta, false);
2462 il4965_tx_status(struct il_priv *il, struct sk_buff *skb, bool is_agg)
2464 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2467 il4965_non_agg_tx_status(il, hdr->addr1);
2469 ieee80211_tx_status_irqsafe(il->hw, skb);
2473 il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx)
2475 struct il_tx_queue *txq = &il->txq[txq_id];
2476 struct il_queue *q = &txq->q;
2478 struct ieee80211_hdr *hdr;
2479 struct sk_buff *skb;
2481 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
2482 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
2483 "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
2484 q->write_ptr, q->read_ptr);
2488 for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
2489 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
2491 skb = txq->skbs[txq->q.read_ptr];
2493 if (WARN_ON_ONCE(skb == NULL))
2496 hdr = (struct ieee80211_hdr *) skb->data;
2497 if (ieee80211_is_data_qos(hdr->frame_control))
2500 il4965_tx_status(il, skb, txq_id >= IL4965_FIRST_AMPDU_QUEUE);
2502 txq->skbs[txq->q.read_ptr] = NULL;
2503 il->ops->txq_free_tfd(il, txq);
2509 * il4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2511 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2512 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
2515 il4965_tx_status_reply_compressed_ba(struct il_priv *il, struct il_ht_agg *agg,
2516 struct il_compressed_ba_resp *ba_resp)
2519 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
2520 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2522 struct ieee80211_tx_info *info;
2523 u64 bitmap, sent_bitmap;
2525 if (unlikely(!agg->wait_for_ba)) {
2526 if (unlikely(ba_resp->bitmap))
2527 IL_ERR("Received BA when not expected\n");
2531 /* Mark that the expected block-ack response arrived */
2532 agg->wait_for_ba = 0;
2533 D_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
2535 /* Calculate shift to align block-ack bits with our Tx win bits */
2536 sh = agg->start_idx - SEQ_TO_IDX(seq_ctl >> 4);
2537 if (sh < 0) /* tbw something is wrong with indices */
2540 if (agg->frame_count > (64 - sh)) {
2541 D_TX_REPLY("more frames than bitmap size");
2545 /* don't use 64-bit values for now */
2546 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
2548 /* check for success or failure according to the
2549 * transmitted bitmap and block-ack bitmap */
2550 sent_bitmap = bitmap & agg->bitmap;
2552 /* For each frame attempted in aggregation,
2553 * update driver's record of tx frame's status. */
2555 while (sent_bitmap) {
2556 ack = sent_bitmap & 1ULL;
2558 D_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", ack ? "ACK" : "NACK",
2559 i, (agg->start_idx + i) & 0xff, agg->start_idx + i);
2564 D_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
2566 info = IEEE80211_SKB_CB(il->txq[scd_flow].skbs[agg->start_idx]);
2567 memset(&info->status, 0, sizeof(info->status));
2568 info->flags |= IEEE80211_TX_STAT_ACK;
2569 info->flags |= IEEE80211_TX_STAT_AMPDU;
2570 info->status.ampdu_ack_len = successes;
2571 info->status.ampdu_len = agg->frame_count;
2572 il4965_hwrate_to_tx_control(il, agg->rate_n_flags, info);
2578 il4965_is_tx_success(u32 status)
2580 status &= TX_STATUS_MSK;
2581 return (status == TX_STATUS_SUCCESS || status == TX_STATUS_DIRECT_DONE);
2585 il4965_find_station(struct il_priv *il, const u8 *addr)
2589 int ret = IL_INVALID_STATION;
2590 unsigned long flags;
2592 if (il->iw_mode == NL80211_IFTYPE_ADHOC)
2595 if (is_broadcast_ether_addr(addr))
2596 return il->hw_params.bcast_id;
2598 spin_lock_irqsave(&il->sta_lock, flags);
2599 for (i = start; i < il->hw_params.max_stations; i++)
2600 if (il->stations[i].used &&
2601 ether_addr_equal(il->stations[i].sta.sta.addr, addr)) {
2606 D_ASSOC("can not find STA %pM total %d\n", addr, il->num_stations);
2610 * It may be possible that more commands interacting with stations
2611 * arrive before we completed processing the adding of
2614 if (ret != IL_INVALID_STATION &&
2615 (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) ||
2616 ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) &&
2617 (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) {
2618 IL_ERR("Requested station info for sta %d before ready.\n",
2620 ret = IL_INVALID_STATION;
2622 spin_unlock_irqrestore(&il->sta_lock, flags);
2627 il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr)
2629 if (il->iw_mode == NL80211_IFTYPE_STATION)
2632 u8 *da = ieee80211_get_DA(hdr);
2634 return il4965_find_station(il, da);
2639 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp)
2641 return le32_to_cpup(&tx_resp->u.status +
2642 tx_resp->frame_count) & IEEE80211_MAX_SN;
2646 il4965_tx_status_to_mac80211(u32 status)
2648 status &= TX_STATUS_MSK;
2651 case TX_STATUS_SUCCESS:
2652 case TX_STATUS_DIRECT_DONE:
2653 return IEEE80211_TX_STAT_ACK;
2654 case TX_STATUS_FAIL_DEST_PS:
2655 return IEEE80211_TX_STAT_TX_FILTERED;
2662 * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2665 il4965_tx_status_reply_tx(struct il_priv *il, struct il_ht_agg *agg,
2666 struct il4965_tx_resp *tx_resp, int txq_id,
2670 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2671 struct ieee80211_tx_info *info = NULL;
2672 struct ieee80211_hdr *hdr = NULL;
2673 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2676 if (agg->wait_for_ba)
2677 D_TX_REPLY("got tx response w/o block-ack\n");
2679 agg->frame_count = tx_resp->frame_count;
2680 agg->start_idx = start_idx;
2681 agg->rate_n_flags = rate_n_flags;
2684 /* num frames attempted by Tx command */
2685 if (agg->frame_count == 1) {
2686 /* Only one frame was attempted; no block-ack will arrive */
2687 status = le16_to_cpu(frame_status[0].status);
2690 D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2691 agg->frame_count, agg->start_idx, idx);
2693 info = IEEE80211_SKB_CB(il->txq[txq_id].skbs[idx]);
2694 info->status.rates[0].count = tx_resp->failure_frame + 1;
2695 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2696 info->flags |= il4965_tx_status_to_mac80211(status);
2697 il4965_hwrate_to_tx_control(il, rate_n_flags, info);
2699 D_TX_REPLY("1 Frame 0x%x failure :%d\n", status & 0xff,
2700 tx_resp->failure_frame);
2701 D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2703 agg->wait_for_ba = 0;
2705 /* Two or more frames were attempted; expect block-ack */
2707 int start = agg->start_idx;
2708 struct sk_buff *skb;
2710 /* Construct bit-map of pending frames within Tx win */
2711 for (i = 0; i < agg->frame_count; i++) {
2713 status = le16_to_cpu(frame_status[i].status);
2714 seq = le16_to_cpu(frame_status[i].sequence);
2715 idx = SEQ_TO_IDX(seq);
2716 txq_id = SEQ_TO_QUEUE(seq);
2719 (AGG_TX_STATE_FEW_BYTES_MSK |
2720 AGG_TX_STATE_ABORT_MSK))
2723 D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2724 agg->frame_count, txq_id, idx);
2726 skb = il->txq[txq_id].skbs[idx];
2727 if (WARN_ON_ONCE(skb == NULL))
2729 hdr = (struct ieee80211_hdr *) skb->data;
2731 sc = le16_to_cpu(hdr->seq_ctrl);
2732 if (idx != (IEEE80211_SEQ_TO_SN(sc) & 0xff)) {
2733 IL_ERR("BUG_ON idx doesn't match seq control"
2734 " idx=%d, seq_idx=%d, seq=%d\n", idx,
2735 IEEE80211_SEQ_TO_SN(sc), hdr->seq_ctrl);
2739 D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", i, idx,
2740 IEEE80211_SEQ_TO_SN(sc));
2744 sh = (start - idx) + 0xff;
2745 bitmap = bitmap << sh;
2748 } else if (sh < -64)
2749 sh = 0xff - (start - idx);
2753 bitmap = bitmap << sh;
2756 bitmap |= 1ULL << sh;
2757 D_TX_REPLY("start=%d bitmap=0x%llx\n", start,
2758 (unsigned long long)bitmap);
2761 agg->bitmap = bitmap;
2762 agg->start_idx = start;
2763 D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2764 agg->frame_count, agg->start_idx,
2765 (unsigned long long)agg->bitmap);
2768 agg->wait_for_ba = 1;
2774 * il4965_hdl_tx - Handle standard (non-aggregation) Tx response
2777 il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb)
2779 struct il_rx_pkt *pkt = rxb_addr(rxb);
2780 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2781 int txq_id = SEQ_TO_QUEUE(sequence);
2782 int idx = SEQ_TO_IDX(sequence);
2783 struct il_tx_queue *txq = &il->txq[txq_id];
2784 struct sk_buff *skb;
2785 struct ieee80211_hdr *hdr;
2786 struct ieee80211_tx_info *info;
2787 struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2788 u32 status = le32_to_cpu(tx_resp->u.status);
2789 int uninitialized_var(tid);
2793 unsigned long flags;
2795 if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
2796 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
2797 "is out of range [0-%d] %d %d\n", txq_id, idx,
2798 txq->q.n_bd, txq->q.write_ptr, txq->q.read_ptr);
2802 txq->time_stamp = jiffies;
2804 skb = txq->skbs[txq->q.read_ptr];
2805 info = IEEE80211_SKB_CB(skb);
2806 memset(&info->status, 0, sizeof(info->status));
2808 hdr = (struct ieee80211_hdr *) skb->data;
2809 if (ieee80211_is_data_qos(hdr->frame_control)) {
2810 qc = ieee80211_get_qos_ctl(hdr);
2814 sta_id = il4965_get_ra_sta_id(il, hdr);
2815 if (txq->sched_retry && unlikely(sta_id == IL_INVALID_STATION)) {
2816 IL_ERR("Station not known\n");
2821 * Firmware will not transmit frame on passive channel, if it not yet
2822 * received some valid frame on that channel. When this error happen
2823 * we have to wait until firmware will unblock itself i.e. when we
2824 * note received beacon or other frame. We unblock queues in
2825 * il4965_pass_packet_to_mac80211 or in il_mac_bss_info_changed.
2827 if (unlikely((status & TX_STATUS_MSK) == TX_STATUS_FAIL_PASSIVE_NO_RX) &&
2828 il->iw_mode == NL80211_IFTYPE_STATION) {
2829 il_stop_queues_by_reason(il, IL_STOP_REASON_PASSIVE);
2830 D_INFO("Stopped queues - RX waiting on passive channel\n");
2833 spin_lock_irqsave(&il->sta_lock, flags);
2834 if (txq->sched_retry) {
2835 const u32 scd_ssn = il4965_get_scd_ssn(tx_resp);
2836 struct il_ht_agg *agg = NULL;
2839 agg = &il->stations[sta_id].tid[tid].agg;
2841 il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
2843 /* check if BAR is needed */
2844 if (tx_resp->frame_count == 1 &&
2845 !il4965_is_tx_success(status))
2846 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2848 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2849 idx = il_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2850 D_TX_REPLY("Retry scheduler reclaim scd_ssn "
2851 "%d idx %d\n", scd_ssn, idx);
2852 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2854 il4965_free_tfds_in_queue(il, sta_id, tid,
2857 if (il->mac80211_registered &&
2858 il_queue_space(&txq->q) > txq->q.low_mark &&
2859 agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2860 il_wake_queue(il, txq);
2863 info->status.rates[0].count = tx_resp->failure_frame + 1;
2864 info->flags |= il4965_tx_status_to_mac80211(status);
2865 il4965_hwrate_to_tx_control(il,
2866 le32_to_cpu(tx_resp->rate_n_flags),
2869 D_TX_REPLY("TXQ %d status %s (0x%08x) "
2870 "rate_n_flags 0x%x retries %d\n", txq_id,
2871 il4965_get_tx_fail_reason(status), status,
2872 le32_to_cpu(tx_resp->rate_n_flags),
2873 tx_resp->failure_frame);
2875 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2876 if (qc && likely(sta_id != IL_INVALID_STATION))
2877 il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2878 else if (sta_id == IL_INVALID_STATION)
2879 D_TX_REPLY("Station not known\n");
2881 if (il->mac80211_registered &&
2882 il_queue_space(&txq->q) > txq->q.low_mark)
2883 il_wake_queue(il, txq);
2885 if (qc && likely(sta_id != IL_INVALID_STATION))
2886 il4965_txq_check_empty(il, sta_id, tid, txq_id);
2888 il4965_check_abort_status(il, tx_resp->frame_count, status);
2890 spin_unlock_irqrestore(&il->sta_lock, flags);
2894 * translate ucode response to mac80211 tx status control values
2897 il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags,
2898 struct ieee80211_tx_info *info)
2900 struct ieee80211_tx_rate *r = &info->status.rates[0];
2902 info->status.antenna =
2903 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
2904 if (rate_n_flags & RATE_MCS_HT_MSK)
2905 r->flags |= IEEE80211_TX_RC_MCS;
2906 if (rate_n_flags & RATE_MCS_GF_MSK)
2907 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
2908 if (rate_n_flags & RATE_MCS_HT40_MSK)
2909 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
2910 if (rate_n_flags & RATE_MCS_DUP_MSK)
2911 r->flags |= IEEE80211_TX_RC_DUP_DATA;
2912 if (rate_n_flags & RATE_MCS_SGI_MSK)
2913 r->flags |= IEEE80211_TX_RC_SHORT_GI;
2914 r->idx = il4965_hwrate_to_mac80211_idx(rate_n_flags, info->band);
2918 * il4965_hdl_compressed_ba - Handler for N_COMPRESSED_BA
2920 * Handles block-acknowledge notification from device, which reports success
2921 * of frames sent via aggregation.
2924 il4965_hdl_compressed_ba(struct il_priv *il, struct il_rx_buf *rxb)
2926 struct il_rx_pkt *pkt = rxb_addr(rxb);
2927 struct il_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
2928 struct il_tx_queue *txq = NULL;
2929 struct il_ht_agg *agg;
2933 unsigned long flags;
2935 /* "flow" corresponds to Tx queue */
2936 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2938 /* "ssn" is start of block-ack Tx win, corresponds to idx
2939 * (in Tx queue's circular buffer) of first TFD/frame in win */
2940 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
2942 if (scd_flow >= il->hw_params.max_txq_num) {
2943 IL_ERR("BUG_ON scd_flow is bigger than number of queues\n");
2947 txq = &il->txq[scd_flow];
2948 sta_id = ba_resp->sta_id;
2950 agg = &il->stations[sta_id].tid[tid].agg;
2951 if (unlikely(agg->txq_id != scd_flow)) {
2953 * FIXME: this is a uCode bug which need to be addressed,
2954 * log the information and return for now!
2955 * since it is possible happen very often and in order
2956 * not to fill the syslog, don't enable the logging by default
2958 D_TX_REPLY("BA scd_flow %d does not match txq_id %d\n",
2959 scd_flow, agg->txq_id);
2963 /* Find idx just before block-ack win */
2964 idx = il_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
2966 spin_lock_irqsave(&il->sta_lock, flags);
2968 D_TX_REPLY("N_COMPRESSED_BA [%d] Received from %pM, " "sta_id = %d\n",
2969 agg->wait_for_ba, (u8 *) &ba_resp->sta_addr_lo32,
2971 D_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx," "scd_flow = "
2972 "%d, scd_ssn = %d\n", ba_resp->tid, ba_resp->seq_ctl,
2973 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
2974 ba_resp->scd_flow, ba_resp->scd_ssn);
2975 D_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx\n", agg->start_idx,
2976 (unsigned long long)agg->bitmap);
2978 /* Update driver's record of ACK vs. not for each frame in win */
2979 il4965_tx_status_reply_compressed_ba(il, agg, ba_resp);
2981 /* Release all TFDs before the SSN, i.e. all TFDs in front of
2982 * block-ack win (we assume that they've been successfully
2983 * transmitted ... if not, it's too late anyway). */
2984 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
2985 /* calculate mac80211 ampdu sw queue to wake */
2986 int freed = il4965_tx_queue_reclaim(il, scd_flow, idx);
2987 il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2989 if (il_queue_space(&txq->q) > txq->q.low_mark &&
2990 il->mac80211_registered &&
2991 agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2992 il_wake_queue(il, txq);
2994 il4965_txq_check_empty(il, sta_id, tid, scd_flow);
2997 spin_unlock_irqrestore(&il->sta_lock, flags);
3000 #ifdef CONFIG_IWLEGACY_DEBUG
3002 il4965_get_tx_fail_reason(u32 status)
3004 #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x
3005 #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x
3007 switch (status & TX_STATUS_MSK) {
3008 case TX_STATUS_SUCCESS:
3010 TX_STATUS_POSTPONE(DELAY);
3011 TX_STATUS_POSTPONE(FEW_BYTES);
3012 TX_STATUS_POSTPONE(QUIET_PERIOD);
3013 TX_STATUS_POSTPONE(CALC_TTAK);
3014 TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY);
3015 TX_STATUS_FAIL(SHORT_LIMIT);
3016 TX_STATUS_FAIL(LONG_LIMIT);
3017 TX_STATUS_FAIL(FIFO_UNDERRUN);
3018 TX_STATUS_FAIL(DRAIN_FLOW);
3019 TX_STATUS_FAIL(RFKILL_FLUSH);
3020 TX_STATUS_FAIL(LIFE_EXPIRE);
3021 TX_STATUS_FAIL(DEST_PS);
3022 TX_STATUS_FAIL(HOST_ABORTED);
3023 TX_STATUS_FAIL(BT_RETRY);
3024 TX_STATUS_FAIL(STA_INVALID);
3025 TX_STATUS_FAIL(FRAG_DROPPED);
3026 TX_STATUS_FAIL(TID_DISABLE);
3027 TX_STATUS_FAIL(FIFO_FLUSHED);
3028 TX_STATUS_FAIL(INSUFFICIENT_CF_POLL);
3029 TX_STATUS_FAIL(PASSIVE_NO_RX);
3030 TX_STATUS_FAIL(NO_BEACON_ON_RADAR);
3035 #undef TX_STATUS_FAIL
3036 #undef TX_STATUS_POSTPONE
3038 #endif /* CONFIG_IWLEGACY_DEBUG */
3040 static struct il_link_quality_cmd *
3041 il4965_sta_alloc_lq(struct il_priv *il, u8 sta_id)
3044 struct il_link_quality_cmd *link_cmd;
3046 __le32 rate_n_flags;
3048 link_cmd = kzalloc(sizeof(struct il_link_quality_cmd), GFP_KERNEL);
3050 IL_ERR("Unable to allocate memory for LQ cmd.\n");
3053 /* Set up the rate scaling to start at selected rate, fall back
3054 * all the way down to 1M in IEEE order, and then spin on 1M */
3055 if (il->band == IEEE80211_BAND_5GHZ)
3060 if (r >= IL_FIRST_CCK_RATE && r <= IL_LAST_CCK_RATE)
3061 rate_flags |= RATE_MCS_CCK_MSK;
3064 il4965_first_antenna(il->hw_params.
3065 valid_tx_ant) << RATE_MCS_ANT_POS;
3066 rate_n_flags = cpu_to_le32(il_rates[r].plcp | rate_flags);
3067 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
3068 link_cmd->rs_table[i].rate_n_flags = rate_n_flags;
3070 link_cmd->general_params.single_stream_ant_msk =
3071 il4965_first_antenna(il->hw_params.valid_tx_ant);
3073 link_cmd->general_params.dual_stream_ant_msk =
3074 il->hw_params.valid_tx_ant & ~il4965_first_antenna(il->hw_params.
3076 if (!link_cmd->general_params.dual_stream_ant_msk) {
3077 link_cmd->general_params.dual_stream_ant_msk = ANT_AB;
3078 } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) {
3079 link_cmd->general_params.dual_stream_ant_msk =
3080 il->hw_params.valid_tx_ant;
3083 link_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF;
3084 link_cmd->agg_params.agg_time_limit =
3085 cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF);
3087 link_cmd->sta_id = sta_id;
3093 * il4965_add_bssid_station - Add the special IBSS BSSID station
3098 il4965_add_bssid_station(struct il_priv *il, const u8 *addr, u8 *sta_id_r)
3102 struct il_link_quality_cmd *link_cmd;
3103 unsigned long flags;
3106 *sta_id_r = IL_INVALID_STATION;
3108 ret = il_add_station_common(il, addr, 0, NULL, &sta_id);
3110 IL_ERR("Unable to add station %pM\n", addr);
3117 spin_lock_irqsave(&il->sta_lock, flags);
3118 il->stations[sta_id].used |= IL_STA_LOCAL;
3119 spin_unlock_irqrestore(&il->sta_lock, flags);
3121 /* Set up default rate scaling table in device's station table */
3122 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3124 IL_ERR("Unable to initialize rate scaling for station %pM.\n",
3129 ret = il_send_lq_cmd(il, link_cmd, CMD_SYNC, true);
3131 IL_ERR("Link quality command failed (%d)\n", ret);
3133 spin_lock_irqsave(&il->sta_lock, flags);
3134 il->stations[sta_id].lq = link_cmd;
3135 spin_unlock_irqrestore(&il->sta_lock, flags);
3141 il4965_static_wepkey_cmd(struct il_priv *il, bool send_if_empty)
3144 u8 buff[sizeof(struct il_wep_cmd) +
3145 sizeof(struct il_wep_key) * WEP_KEYS_MAX];
3146 struct il_wep_cmd *wep_cmd = (struct il_wep_cmd *)buff;
3147 size_t cmd_size = sizeof(struct il_wep_cmd);
3148 struct il_host_cmd cmd = {
3153 bool not_empty = false;
3158 cmd_size + (sizeof(struct il_wep_key) * WEP_KEYS_MAX));
3160 for (i = 0; i < WEP_KEYS_MAX; i++) {
3161 u8 key_size = il->_4965.wep_keys[i].key_size;
3163 wep_cmd->key[i].key_idx = i;
3165 wep_cmd->key[i].key_offset = i;
3168 wep_cmd->key[i].key_offset = WEP_INVALID_OFFSET;
3170 wep_cmd->key[i].key_size = key_size;
3171 memcpy(&wep_cmd->key[i].key[3], il->_4965.wep_keys[i].key, key_size);
3174 wep_cmd->global_key_type = WEP_KEY_WEP_TYPE;
3175 wep_cmd->num_keys = WEP_KEYS_MAX;
3177 cmd_size += sizeof(struct il_wep_key) * WEP_KEYS_MAX;
3180 if (not_empty || send_if_empty)
3181 return il_send_cmd(il, &cmd);
3187 il4965_restore_default_wep_keys(struct il_priv *il)
3189 lockdep_assert_held(&il->mutex);
3191 return il4965_static_wepkey_cmd(il, false);
3195 il4965_remove_default_wep_key(struct il_priv *il,
3196 struct ieee80211_key_conf *keyconf)
3199 int idx = keyconf->keyidx;
3201 lockdep_assert_held(&il->mutex);
3203 D_WEP("Removing default WEP key: idx=%d\n", idx);
3205 memset(&il->_4965.wep_keys[idx], 0, sizeof(struct il_wep_key));
3206 if (il_is_rfkill(il)) {
3207 D_WEP("Not sending C_WEPKEY command due to RFKILL.\n");
3208 /* but keys in device are clear anyway so return success */
3211 ret = il4965_static_wepkey_cmd(il, 1);
3212 D_WEP("Remove default WEP key: idx=%d ret=%d\n", idx, ret);
3218 il4965_set_default_wep_key(struct il_priv *il,
3219 struct ieee80211_key_conf *keyconf)
3222 int len = keyconf->keylen;
3223 int idx = keyconf->keyidx;
3225 lockdep_assert_held(&il->mutex);
3227 if (len != WEP_KEY_LEN_128 && len != WEP_KEY_LEN_64) {
3228 D_WEP("Bad WEP key length %d\n", keyconf->keylen);
3232 keyconf->flags &= ~IEEE80211_KEY_FLAG_GENERATE_IV;
3233 keyconf->hw_key_idx = HW_KEY_DEFAULT;
3234 il->stations[IL_AP_ID].keyinfo.cipher = keyconf->cipher;
3236 il->_4965.wep_keys[idx].key_size = len;
3237 memcpy(&il->_4965.wep_keys[idx].key, &keyconf->key, len);
3239 ret = il4965_static_wepkey_cmd(il, false);
3241 D_WEP("Set default WEP key: len=%d idx=%d ret=%d\n", len, idx, ret);
3246 il4965_set_wep_dynamic_key_info(struct il_priv *il,
3247 struct ieee80211_key_conf *keyconf, u8 sta_id)
3249 unsigned long flags;
3250 __le16 key_flags = 0;
3251 struct il_addsta_cmd sta_cmd;
3253 lockdep_assert_held(&il->mutex);
3255 keyconf->flags &= ~IEEE80211_KEY_FLAG_GENERATE_IV;
3257 key_flags |= (STA_KEY_FLG_WEP | STA_KEY_FLG_MAP_KEY_MSK);
3258 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3259 key_flags &= ~STA_KEY_FLG_INVALID;
3261 if (keyconf->keylen == WEP_KEY_LEN_128)
3262 key_flags |= STA_KEY_FLG_KEY_SIZE_MSK;
3264 if (sta_id == il->hw_params.bcast_id)
3265 key_flags |= STA_KEY_MULTICAST_MSK;
3267 spin_lock_irqsave(&il->sta_lock, flags);
3269 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3270 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
3271 il->stations[sta_id].keyinfo.keyidx = keyconf->keyidx;
3273 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
3275 memcpy(&il->stations[sta_id].sta.key.key[3], keyconf->key,
3278 if ((il->stations[sta_id].sta.key.
3279 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3280 il->stations[sta_id].sta.key.key_offset =
3281 il_get_free_ucode_key_idx(il);
3282 /* else, we are overriding an existing key => no need to allocated room
3285 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3286 "no space for a new key");
3288 il->stations[sta_id].sta.key.key_flags = key_flags;
3289 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3290 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3292 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3293 sizeof(struct il_addsta_cmd));
3294 spin_unlock_irqrestore(&il->sta_lock, flags);
3296 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3300 il4965_set_ccmp_dynamic_key_info(struct il_priv *il,
3301 struct ieee80211_key_conf *keyconf, u8 sta_id)
3303 unsigned long flags;
3304 __le16 key_flags = 0;
3305 struct il_addsta_cmd sta_cmd;
3307 lockdep_assert_held(&il->mutex);
3309 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
3310 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3311 key_flags &= ~STA_KEY_FLG_INVALID;
3313 if (sta_id == il->hw_params.bcast_id)
3314 key_flags |= STA_KEY_MULTICAST_MSK;
3316 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
3318 spin_lock_irqsave(&il->sta_lock, flags);
3319 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3320 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
3322 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
3324 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
3326 if ((il->stations[sta_id].sta.key.
3327 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3328 il->stations[sta_id].sta.key.key_offset =
3329 il_get_free_ucode_key_idx(il);
3330 /* else, we are overriding an existing key => no need to allocated room
3333 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3334 "no space for a new key");
3336 il->stations[sta_id].sta.key.key_flags = key_flags;
3337 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3338 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3340 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3341 sizeof(struct il_addsta_cmd));
3342 spin_unlock_irqrestore(&il->sta_lock, flags);
3344 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3348 il4965_set_tkip_dynamic_key_info(struct il_priv *il,
3349 struct ieee80211_key_conf *keyconf, u8 sta_id)
3351 unsigned long flags;
3353 __le16 key_flags = 0;
3355 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
3356 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3357 key_flags &= ~STA_KEY_FLG_INVALID;
3359 if (sta_id == il->hw_params.bcast_id)
3360 key_flags |= STA_KEY_MULTICAST_MSK;
3362 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
3363 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
3365 spin_lock_irqsave(&il->sta_lock, flags);
3367 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3368 il->stations[sta_id].keyinfo.keylen = 16;
3370 if ((il->stations[sta_id].sta.key.
3371 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3372 il->stations[sta_id].sta.key.key_offset =
3373 il_get_free_ucode_key_idx(il);
3374 /* else, we are overriding an existing key => no need to allocated room
3377 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3378 "no space for a new key");
3380 il->stations[sta_id].sta.key.key_flags = key_flags;
3382 /* This copy is acutally not needed: we get the key with each TX */
3383 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, 16);
3385 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, 16);
3387 spin_unlock_irqrestore(&il->sta_lock, flags);
3393 il4965_update_tkip_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
3394 struct ieee80211_sta *sta, u32 iv32, u16 *phase1key)
3397 unsigned long flags;
3400 if (il_scan_cancel(il)) {
3401 /* cancel scan failed, just live w/ bad key and rely
3402 briefly on SW decryption */
3406 sta_id = il_sta_id_or_broadcast(il, sta);
3407 if (sta_id == IL_INVALID_STATION)
3410 spin_lock_irqsave(&il->sta_lock, flags);
3412 il->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
3414 for (i = 0; i < 5; i++)
3415 il->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3416 cpu_to_le16(phase1key[i]);
3418 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3419 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3421 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
3423 spin_unlock_irqrestore(&il->sta_lock, flags);
3427 il4965_remove_dynamic_key(struct il_priv *il,
3428 struct ieee80211_key_conf *keyconf, u8 sta_id)
3430 unsigned long flags;
3433 struct il_addsta_cmd sta_cmd;
3435 lockdep_assert_held(&il->mutex);
3437 il->_4965.key_mapping_keys--;
3439 spin_lock_irqsave(&il->sta_lock, flags);
3440 key_flags = le16_to_cpu(il->stations[sta_id].sta.key.key_flags);
3441 keyidx = (key_flags >> STA_KEY_FLG_KEYID_POS) & 0x3;
3443 D_WEP("Remove dynamic key: idx=%d sta=%d\n", keyconf->keyidx, sta_id);
3445 if (keyconf->keyidx != keyidx) {
3446 /* We need to remove a key with idx different that the one
3447 * in the uCode. This means that the key we need to remove has
3448 * been replaced by another one with different idx.
3449 * Don't do anything and return ok
3451 spin_unlock_irqrestore(&il->sta_lock, flags);
3455 if (il->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_INVALID) {
3456 IL_WARN("Removing wrong key %d 0x%x\n", keyconf->keyidx,
3458 spin_unlock_irqrestore(&il->sta_lock, flags);
3462 if (!test_and_clear_bit
3463 (il->stations[sta_id].sta.key.key_offset, &il->ucode_key_table))
3464 IL_ERR("idx %d not used in uCode key table.\n",
3465 il->stations[sta_id].sta.key.key_offset);
3466 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
3467 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
3468 il->stations[sta_id].sta.key.key_flags =
3469 STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID;
3470 il->stations[sta_id].sta.key.key_offset = keyconf->hw_key_idx;
3471 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3472 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3474 if (il_is_rfkill(il)) {
3476 ("Not sending C_ADD_STA command because RFKILL enabled.\n");
3477 spin_unlock_irqrestore(&il->sta_lock, flags);
3480 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3481 sizeof(struct il_addsta_cmd));
3482 spin_unlock_irqrestore(&il->sta_lock, flags);
3484 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3488 il4965_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
3493 lockdep_assert_held(&il->mutex);
3495 il->_4965.key_mapping_keys++;
3496 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
3498 switch (keyconf->cipher) {
3499 case WLAN_CIPHER_SUITE_CCMP:
3501 il4965_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
3503 case WLAN_CIPHER_SUITE_TKIP:
3505 il4965_set_tkip_dynamic_key_info(il, keyconf, sta_id);
3507 case WLAN_CIPHER_SUITE_WEP40:
3508 case WLAN_CIPHER_SUITE_WEP104:
3509 ret = il4965_set_wep_dynamic_key_info(il, keyconf, sta_id);
3512 IL_ERR("Unknown alg: %s cipher = %x\n", __func__,
3517 D_WEP("Set dynamic key: cipher=%x len=%d idx=%d sta=%d ret=%d\n",
3518 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
3524 * il4965_alloc_bcast_station - add broadcast station into driver's station table.
3526 * This adds the broadcast station into the driver's station table
3527 * and marks it driver active, so that it will be restored to the
3528 * device at the next best time.
3531 il4965_alloc_bcast_station(struct il_priv *il)
3533 struct il_link_quality_cmd *link_cmd;
3534 unsigned long flags;
3537 spin_lock_irqsave(&il->sta_lock, flags);
3538 sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
3539 if (sta_id == IL_INVALID_STATION) {
3540 IL_ERR("Unable to prepare broadcast station\n");
3541 spin_unlock_irqrestore(&il->sta_lock, flags);
3546 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
3547 il->stations[sta_id].used |= IL_STA_BCAST;
3548 spin_unlock_irqrestore(&il->sta_lock, flags);
3550 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3553 ("Unable to initialize rate scaling for bcast station.\n");
3557 spin_lock_irqsave(&il->sta_lock, flags);
3558 il->stations[sta_id].lq = link_cmd;
3559 spin_unlock_irqrestore(&il->sta_lock, flags);
3565 * il4965_update_bcast_station - update broadcast station's LQ command
3567 * Only used by iwl4965. Placed here to have all bcast station management
3571 il4965_update_bcast_station(struct il_priv *il)
3573 unsigned long flags;
3574 struct il_link_quality_cmd *link_cmd;
3575 u8 sta_id = il->hw_params.bcast_id;
3577 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3579 IL_ERR("Unable to initialize rate scaling for bcast sta.\n");
3583 spin_lock_irqsave(&il->sta_lock, flags);
3584 if (il->stations[sta_id].lq)
3585 kfree(il->stations[sta_id].lq);
3587 D_INFO("Bcast sta rate scaling has not been initialized.\n");
3588 il->stations[sta_id].lq = link_cmd;
3589 spin_unlock_irqrestore(&il->sta_lock, flags);
3595 il4965_update_bcast_stations(struct il_priv *il)
3597 return il4965_update_bcast_station(il);
3601 * il4965_sta_tx_modify_enable_tid - Enable Tx for this TID in station table
3604 il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid)
3606 unsigned long flags;
3607 struct il_addsta_cmd sta_cmd;
3609 lockdep_assert_held(&il->mutex);
3611 /* Remove "disable" flag, to enable Tx for this TID */
3612 spin_lock_irqsave(&il->sta_lock, flags);
3613 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
3614 il->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
3615 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3616 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3617 sizeof(struct il_addsta_cmd));
3618 spin_unlock_irqrestore(&il->sta_lock, flags);
3620 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3624 il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, int tid,
3627 unsigned long flags;
3629 struct il_addsta_cmd sta_cmd;
3631 lockdep_assert_held(&il->mutex);
3633 sta_id = il_sta_id(sta);
3634 if (sta_id == IL_INVALID_STATION)
3637 spin_lock_irqsave(&il->sta_lock, flags);
3638 il->stations[sta_id].sta.station_flags_msk = 0;
3639 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3640 il->stations[sta_id].sta.add_immediate_ba_tid = (u8) tid;
3641 il->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3642 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3643 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3644 sizeof(struct il_addsta_cmd));
3645 spin_unlock_irqrestore(&il->sta_lock, flags);
3647 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3651 il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, int tid)
3653 unsigned long flags;
3655 struct il_addsta_cmd sta_cmd;
3657 lockdep_assert_held(&il->mutex);
3659 sta_id = il_sta_id(sta);
3660 if (sta_id == IL_INVALID_STATION) {
3661 IL_ERR("Invalid station for AGG tid %d\n", tid);
3665 spin_lock_irqsave(&il->sta_lock, flags);
3666 il->stations[sta_id].sta.station_flags_msk = 0;
3667 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3668 il->stations[sta_id].sta.remove_immediate_ba_tid = (u8) tid;
3669 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3670 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3671 sizeof(struct il_addsta_cmd));
3672 spin_unlock_irqrestore(&il->sta_lock, flags);
3674 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3678 il4965_sta_modify_sleep_tx_count(struct il_priv *il, int sta_id, int cnt)
3680 unsigned long flags;
3682 spin_lock_irqsave(&il->sta_lock, flags);
3683 il->stations[sta_id].sta.station_flags |= STA_FLG_PWR_SAVE_MSK;
3684 il->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
3685 il->stations[sta_id].sta.sta.modify_mask =
3686 STA_MODIFY_SLEEP_TX_COUNT_MSK;
3687 il->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt);
3688 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3689 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
3690 spin_unlock_irqrestore(&il->sta_lock, flags);
3695 il4965_update_chain_flags(struct il_priv *il)
3697 if (il->ops->set_rxon_chain) {
3698 il->ops->set_rxon_chain(il);
3699 if (il->active.rx_chain != il->staging.rx_chain)
3705 il4965_clear_free_frames(struct il_priv *il)
3707 struct list_head *element;
3709 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
3711 while (!list_empty(&il->free_frames)) {
3712 element = il->free_frames.next;
3714 kfree(list_entry(element, struct il_frame, list));
3718 if (il->frames_count) {
3719 IL_WARN("%d frames still in use. Did we lose one?\n",
3721 il->frames_count = 0;
3725 static struct il_frame *
3726 il4965_get_free_frame(struct il_priv *il)
3728 struct il_frame *frame;
3729 struct list_head *element;
3730 if (list_empty(&il->free_frames)) {
3731 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
3733 IL_ERR("Could not allocate frame!\n");
3741 element = il->free_frames.next;
3743 return list_entry(element, struct il_frame, list);
3747 il4965_free_frame(struct il_priv *il, struct il_frame *frame)
3749 memset(frame, 0, sizeof(*frame));
3750 list_add(&frame->list, &il->free_frames);
3754 il4965_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
3757 lockdep_assert_held(&il->mutex);
3759 if (!il->beacon_skb)
3762 if (il->beacon_skb->len > left)
3765 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
3767 return il->beacon_skb->len;
3770 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
3772 il4965_set_beacon_tim(struct il_priv *il,
3773 struct il_tx_beacon_cmd *tx_beacon_cmd, u8 * beacon,
3777 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
3780 * The idx is relative to frame start but we start looking at the
3781 * variable-length part of the beacon.
3783 tim_idx = mgmt->u.beacon.variable - beacon;
3785 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
3786 while ((tim_idx < (frame_size - 2)) &&
3787 (beacon[tim_idx] != WLAN_EID_TIM))
3788 tim_idx += beacon[tim_idx + 1] + 2;
3790 /* If TIM field was found, set variables */
3791 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
3792 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
3793 tx_beacon_cmd->tim_size = beacon[tim_idx + 1];
3795 IL_WARN("Unable to find TIM Element in beacon\n");
3799 il4965_hw_get_beacon_cmd(struct il_priv *il, struct il_frame *frame)
3801 struct il_tx_beacon_cmd *tx_beacon_cmd;
3806 * We have to set up the TX command, the TX Beacon command, and the
3810 lockdep_assert_held(&il->mutex);
3812 if (!il->beacon_enabled) {
3813 IL_ERR("Trying to build beacon without beaconing enabled\n");
3817 /* Initialize memory */
3818 tx_beacon_cmd = &frame->u.beacon;
3819 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
3821 /* Set up TX beacon contents */
3823 il4965_fill_beacon_frame(il, tx_beacon_cmd->frame,
3824 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
3825 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
3830 /* Set up TX command fields */
3831 tx_beacon_cmd->tx.len = cpu_to_le16((u16) frame_size);
3832 tx_beacon_cmd->tx.sta_id = il->hw_params.bcast_id;
3833 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3834 tx_beacon_cmd->tx.tx_flags =
3835 TX_CMD_FLG_SEQ_CTL_MSK | TX_CMD_FLG_TSF_MSK |
3836 TX_CMD_FLG_STA_RATE_MSK;
3838 /* Set up TX beacon command fields */
3839 il4965_set_beacon_tim(il, tx_beacon_cmd, (u8 *) tx_beacon_cmd->frame,
3842 /* Set up packet rate and flags */
3843 rate = il_get_lowest_plcp(il);
3844 il4965_toggle_tx_ant(il, &il->mgmt_tx_ant, il->hw_params.valid_tx_ant);
3845 rate_flags = BIT(il->mgmt_tx_ant) << RATE_MCS_ANT_POS;
3846 if ((rate >= IL_FIRST_CCK_RATE) && (rate <= IL_LAST_CCK_RATE))
3847 rate_flags |= RATE_MCS_CCK_MSK;
3848 tx_beacon_cmd->tx.rate_n_flags = cpu_to_le32(rate | rate_flags);
3850 return sizeof(*tx_beacon_cmd) + frame_size;
3854 il4965_send_beacon_cmd(struct il_priv *il)
3856 struct il_frame *frame;
3857 unsigned int frame_size;
3860 frame = il4965_get_free_frame(il);
3862 IL_ERR("Could not obtain free frame buffer for beacon "
3867 frame_size = il4965_hw_get_beacon_cmd(il, frame);
3869 IL_ERR("Error configuring the beacon command\n");
3870 il4965_free_frame(il, frame);
3874 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
3876 il4965_free_frame(il, frame);
3881 static inline dma_addr_t
3882 il4965_tfd_tb_get_addr(struct il_tfd *tfd, u8 idx)
3884 struct il_tfd_tb *tb = &tfd->tbs[idx];
3886 dma_addr_t addr = get_unaligned_le32(&tb->lo);
3887 if (sizeof(dma_addr_t) > sizeof(u32))
3889 ((dma_addr_t) (le16_to_cpu(tb->hi_n_len) & 0xF) << 16) <<
3896 il4965_tfd_tb_get_len(struct il_tfd *tfd, u8 idx)
3898 struct il_tfd_tb *tb = &tfd->tbs[idx];
3900 return le16_to_cpu(tb->hi_n_len) >> 4;
3904 il4965_tfd_set_tb(struct il_tfd *tfd, u8 idx, dma_addr_t addr, u16 len)
3906 struct il_tfd_tb *tb = &tfd->tbs[idx];
3907 u16 hi_n_len = len << 4;
3909 put_unaligned_le32(addr, &tb->lo);
3910 if (sizeof(dma_addr_t) > sizeof(u32))
3911 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
3913 tb->hi_n_len = cpu_to_le16(hi_n_len);
3915 tfd->num_tbs = idx + 1;
3919 il4965_tfd_get_num_tbs(struct il_tfd *tfd)
3921 return tfd->num_tbs & 0x1f;
3925 * il4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
3926 * @il - driver ilate data
3929 * Does NOT advance any TFD circular buffer read/write idxes
3930 * Does NOT free the TFD itself (which is within circular buffer)
3933 il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
3935 struct il_tfd *tfd_tmp = (struct il_tfd *)txq->tfds;
3937 struct pci_dev *dev = il->pci_dev;
3938 int idx = txq->q.read_ptr;
3942 tfd = &tfd_tmp[idx];
3944 /* Sanity check on number of chunks */
3945 num_tbs = il4965_tfd_get_num_tbs(tfd);
3947 if (num_tbs >= IL_NUM_OF_TBS) {
3948 IL_ERR("Too many chunks: %i\n", num_tbs);
3949 /* @todo issue fatal error, it is quite serious situation */
3955 pci_unmap_single(dev, dma_unmap_addr(&txq->meta[idx], mapping),
3956 dma_unmap_len(&txq->meta[idx], len),
3957 PCI_DMA_BIDIRECTIONAL);
3959 /* Unmap chunks, if any. */
3960 for (i = 1; i < num_tbs; i++)
3961 pci_unmap_single(dev, il4965_tfd_tb_get_addr(tfd, i),
3962 il4965_tfd_tb_get_len(tfd, i),
3967 struct sk_buff *skb = txq->skbs[txq->q.read_ptr];
3969 /* can be called from irqs-disabled context */
3971 dev_kfree_skb_any(skb);
3972 txq->skbs[txq->q.read_ptr] = NULL;
3978 il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq,
3979 dma_addr_t addr, u16 len, u8 reset, u8 pad)
3982 struct il_tfd *tfd, *tfd_tmp;
3986 tfd_tmp = (struct il_tfd *)txq->tfds;
3987 tfd = &tfd_tmp[q->write_ptr];
3990 memset(tfd, 0, sizeof(*tfd));
3992 num_tbs = il4965_tfd_get_num_tbs(tfd);
3994 /* Each TFD can point to a maximum 20 Tx buffers */
3995 if (num_tbs >= IL_NUM_OF_TBS) {
3996 IL_ERR("Error can not send more than %d chunks\n",
4001 BUG_ON(addr & ~DMA_BIT_MASK(36));
4002 if (unlikely(addr & ~IL_TX_DMA_MASK))
4003 IL_ERR("Unaligned address = %llx\n", (unsigned long long)addr);
4005 il4965_tfd_set_tb(tfd, num_tbs, addr, len);
4011 * Tell nic where to find circular buffer of Tx Frame Descriptors for
4012 * given Tx queue, and enable the DMA channel used for that queue.
4014 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
4015 * channels supported in hardware.
4018 il4965_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq)
4020 int txq_id = txq->q.id;
4022 /* Circular buffer (TFD queue in DRAM) physical base address */
4023 il_wr(il, FH49_MEM_CBBC_QUEUE(txq_id), txq->q.dma_addr >> 8);
4028 /******************************************************************************
4030 * Generic RX handler implementations
4032 ******************************************************************************/
4034 il4965_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
4036 struct il_rx_pkt *pkt = rxb_addr(rxb);
4037 struct il_alive_resp *palive;
4038 struct delayed_work *pwork;
4040 palive = &pkt->u.alive_frame;
4042 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
4043 palive->is_valid, palive->ver_type, palive->ver_subtype);
4045 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
4046 D_INFO("Initialization Alive received.\n");
4047 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
4048 sizeof(struct il_init_alive_resp));
4049 pwork = &il->init_alive_start;
4051 D_INFO("Runtime Alive received.\n");
4052 memcpy(&il->card_alive, &pkt->u.alive_frame,
4053 sizeof(struct il_alive_resp));
4054 pwork = &il->alive_start;
4057 /* We delay the ALIVE response by 5ms to
4058 * give the HW RF Kill time to activate... */
4059 if (palive->is_valid == UCODE_VALID_OK)
4060 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
4062 IL_WARN("uCode did not respond OK.\n");
4066 * il4965_bg_stats_periodic - Timer callback to queue stats
4068 * This callback is provided in order to send a stats request.
4070 * This timer function is continually reset to execute within
4071 * 60 seconds since the last N_STATS was received. We need to
4072 * ensure we receive the stats in order to update the temperature
4073 * used for calibrating the TXPOWER.
4076 il4965_bg_stats_periodic(unsigned long data)
4078 struct il_priv *il = (struct il_priv *)data;
4080 if (test_bit(S_EXIT_PENDING, &il->status))
4083 /* dont send host command if rf-kill is on */
4084 if (!il_is_ready_rf(il))
4087 il_send_stats_request(il, CMD_ASYNC, false);
4091 il4965_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
4093 struct il_rx_pkt *pkt = rxb_addr(rxb);
4094 struct il4965_beacon_notif *beacon =
4095 (struct il4965_beacon_notif *)pkt->u.raw;
4096 #ifdef CONFIG_IWLEGACY_DEBUG
4097 u8 rate = il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
4099 D_RX("beacon status %x retries %d iss %d tsf:0x%.8x%.8x rate %d\n",
4100 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
4101 beacon->beacon_notify_hdr.failure_frame,
4102 le32_to_cpu(beacon->ibss_mgr_status),
4103 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
4105 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
4109 il4965_perform_ct_kill_task(struct il_priv *il)
4111 unsigned long flags;
4113 D_POWER("Stop all queues\n");
4115 if (il->mac80211_registered)
4116 ieee80211_stop_queues(il->hw);
4118 _il_wr(il, CSR_UCODE_DRV_GP1_SET,
4119 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
4120 _il_rd(il, CSR_UCODE_DRV_GP1);
4122 spin_lock_irqsave(&il->reg_lock, flags);
4123 if (likely(_il_grab_nic_access(il)))
4124 _il_release_nic_access(il);
4125 spin_unlock_irqrestore(&il->reg_lock, flags);
4128 /* Handle notification from uCode that card's power state is changing
4129 * due to software, hardware, or critical temperature RFKILL */
4131 il4965_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
4133 struct il_rx_pkt *pkt = rxb_addr(rxb);
4134 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4135 unsigned long status = il->status;
4137 D_RF_KILL("Card state received: HW:%s SW:%s CT:%s\n",
4138 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4139 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
4140 (flags & CT_CARD_DISABLED) ? "Reached" : "Not reached");
4142 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | CT_CARD_DISABLED)) {
4144 _il_wr(il, CSR_UCODE_DRV_GP1_SET,
4145 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4147 il_wr(il, HBUS_TARG_MBX_C, HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4149 if (!(flags & RXON_CARD_DISABLED)) {
4150 _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
4151 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4152 il_wr(il, HBUS_TARG_MBX_C,
4153 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4157 if (flags & CT_CARD_DISABLED)
4158 il4965_perform_ct_kill_task(il);
4160 if (flags & HW_CARD_DISABLED)
4161 set_bit(S_RFKILL, &il->status);
4163 clear_bit(S_RFKILL, &il->status);
4165 if (!(flags & RXON_CARD_DISABLED))
4168 if ((test_bit(S_RFKILL, &status) !=
4169 test_bit(S_RFKILL, &il->status)))
4170 wiphy_rfkill_set_hw_state(il->hw->wiphy,
4171 test_bit(S_RFKILL, &il->status));
4173 wake_up(&il->wait_command_queue);
4177 * il4965_setup_handlers - Initialize Rx handler callbacks
4179 * Setup the RX handlers for each of the reply types sent from the uCode
4182 * This function chains into the hardware specific files for them to setup
4183 * any hardware specific handlers as well.
4186 il4965_setup_handlers(struct il_priv *il)
4188 il->handlers[N_ALIVE] = il4965_hdl_alive;
4189 il->handlers[N_ERROR] = il_hdl_error;
4190 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
4191 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
4192 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
4193 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
4194 il->handlers[N_BEACON] = il4965_hdl_beacon;
4197 * The same handler is used for both the REPLY to a discrete
4198 * stats request from the host as well as for the periodic
4199 * stats notifications (after received beacons) from the uCode.
4201 il->handlers[C_STATS] = il4965_hdl_c_stats;
4202 il->handlers[N_STATS] = il4965_hdl_stats;
4204 il_setup_rx_scan_handlers(il);
4206 /* status change handler */
4207 il->handlers[N_CARD_STATE] = il4965_hdl_card_state;
4209 il->handlers[N_MISSED_BEACONS] = il4965_hdl_missed_beacon;
4211 il->handlers[N_RX_PHY] = il4965_hdl_rx_phy;
4212 il->handlers[N_RX_MPDU] = il4965_hdl_rx;
4213 il->handlers[N_RX] = il4965_hdl_rx;
4215 il->handlers[N_COMPRESSED_BA] = il4965_hdl_compressed_ba;
4217 il->handlers[C_TX] = il4965_hdl_tx;
4221 * il4965_rx_handle - Main entry function for receiving responses from uCode
4223 * Uses the il->handlers callback function array to invoke
4224 * the appropriate handlers, including command responses,
4225 * frame-received notifications, and other notifications.
4228 il4965_rx_handle(struct il_priv *il)
4230 struct il_rx_buf *rxb;
4231 struct il_rx_pkt *pkt;
4232 struct il_rx_queue *rxq = &il->rxq;
4235 unsigned long flags;
4240 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
4241 * buffer that the driver may process (last buffer filled by ucode). */
4242 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
4245 /* Rx interrupt, but nothing sent from uCode */
4247 D_RX("r = %d, i = %d\n", r, i);
4249 /* calculate total frames need to be restock after handling RX */
4250 total_empty = r - rxq->write_actual;
4251 if (total_empty < 0)
4252 total_empty += RX_QUEUE_SIZE;
4254 if (total_empty > (RX_QUEUE_SIZE / 2))
4260 rxb = rxq->queue[i];
4262 /* If an RXB doesn't have a Rx queue slot associated with it,
4263 * then a bug has been introduced in the queue refilling
4264 * routines -- catch it here */
4265 BUG_ON(rxb == NULL);
4267 rxq->queue[i] = NULL;
4269 pci_unmap_page(il->pci_dev, rxb->page_dma,
4270 PAGE_SIZE << il->hw_params.rx_page_order,
4271 PCI_DMA_FROMDEVICE);
4272 pkt = rxb_addr(rxb);
4274 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
4275 len += sizeof(u32); /* account for status word */
4277 reclaim = il_need_reclaim(il, pkt);
4279 /* Based on type of command response or notification,
4280 * handle those that need handling via function in
4281 * handlers table. See il4965_setup_handlers() */
4282 if (il->handlers[pkt->hdr.cmd]) {
4283 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
4284 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4285 il->isr_stats.handlers[pkt->hdr.cmd]++;
4286 il->handlers[pkt->hdr.cmd] (il, rxb);
4288 /* No handling needed */
4289 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
4290 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4294 * XXX: After here, we should always check rxb->page
4295 * against NULL before touching it or its virtual
4296 * memory (pkt). Because some handler might have
4297 * already taken or freed the pages.
4301 /* Invoke any callbacks, transfer the buffer to caller,
4302 * and fire off the (possibly) blocking il_send_cmd()
4303 * as we reclaim the driver command queue */
4305 il_tx_cmd_complete(il, rxb);
4307 IL_WARN("Claim null rxb?\n");
4310 /* Reuse the page if possible. For notification packets and
4311 * SKBs that fail to Rx correctly, add them back into the
4312 * rx_free list for reuse later. */
4313 spin_lock_irqsave(&rxq->lock, flags);
4314 if (rxb->page != NULL) {
4316 pci_map_page(il->pci_dev, rxb->page, 0,
4317 PAGE_SIZE << il->hw_params.
4318 rx_page_order, PCI_DMA_FROMDEVICE);
4320 if (unlikely(pci_dma_mapping_error(il->pci_dev,
4322 __il_free_pages(il, rxb->page);
4324 list_add_tail(&rxb->list, &rxq->rx_used);
4326 list_add_tail(&rxb->list, &rxq->rx_free);
4330 list_add_tail(&rxb->list, &rxq->rx_used);
4332 spin_unlock_irqrestore(&rxq->lock, flags);
4334 i = (i + 1) & RX_QUEUE_MASK;
4335 /* If there are a lot of unused frames,
4336 * restock the Rx queue so ucode wont assert. */
4341 il4965_rx_replenish_now(il);
4347 /* Backtrack one entry */
4350 il4965_rx_replenish_now(il);
4352 il4965_rx_queue_restock(il);
4355 /* call this function to flush any scheduled tasklet */
4357 il4965_synchronize_irq(struct il_priv *il)
4359 /* wait to make sure we flush pending tasklet */
4360 synchronize_irq(il->pci_dev->irq);
4361 tasklet_kill(&il->irq_tasklet);
4365 il4965_irq_tasklet(struct il_priv *il)
4367 u32 inta, handled = 0;
4369 unsigned long flags;
4371 #ifdef CONFIG_IWLEGACY_DEBUG
4375 spin_lock_irqsave(&il->lock, flags);
4377 /* Ack/clear/reset pending uCode interrupts.
4378 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4379 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4380 inta = _il_rd(il, CSR_INT);
4381 _il_wr(il, CSR_INT, inta);
4383 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4384 * Any new interrupts that happen after this, either while we're
4385 * in this tasklet, or later, will show up in next ISR/tasklet. */
4386 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
4387 _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
4389 #ifdef CONFIG_IWLEGACY_DEBUG
4390 if (il_get_debug_level(il) & IL_DL_ISR) {
4391 /* just for debug */
4392 inta_mask = _il_rd(il, CSR_INT_MASK);
4393 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
4394 inta_mask, inta_fh);
4398 spin_unlock_irqrestore(&il->lock, flags);
4400 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4401 * atomic, make sure that inta covers all the interrupts that
4402 * we've discovered, even if FH interrupt came in just after
4403 * reading CSR_INT. */
4404 if (inta_fh & CSR49_FH_INT_RX_MASK)
4405 inta |= CSR_INT_BIT_FH_RX;
4406 if (inta_fh & CSR49_FH_INT_TX_MASK)
4407 inta |= CSR_INT_BIT_FH_TX;
4409 /* Now service all interrupt bits discovered above. */
4410 if (inta & CSR_INT_BIT_HW_ERR) {
4411 IL_ERR("Hardware error detected. Restarting.\n");
4413 /* Tell the device to stop sending interrupts */
4414 il_disable_interrupts(il);
4417 il_irq_handle_error(il);
4419 handled |= CSR_INT_BIT_HW_ERR;
4423 #ifdef CONFIG_IWLEGACY_DEBUG
4424 if (il_get_debug_level(il) & (IL_DL_ISR)) {
4425 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4426 if (inta & CSR_INT_BIT_SCD) {
4427 D_ISR("Scheduler finished to transmit "
4428 "the frame/frames.\n");
4429 il->isr_stats.sch++;
4432 /* Alive notification via Rx interrupt will do the real work */
4433 if (inta & CSR_INT_BIT_ALIVE) {
4434 D_ISR("Alive interrupt\n");
4435 il->isr_stats.alive++;
4439 /* Safely ignore these bits for debug checks below */
4440 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4442 /* HW RF KILL switch toggled */
4443 if (inta & CSR_INT_BIT_RF_KILL) {
4446 if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4449 IL_WARN("RF_KILL bit toggled to %s.\n",
4450 hw_rf_kill ? "disable radio" : "enable radio");
4452 il->isr_stats.rfkill++;
4454 /* driver only loads ucode once setting the interface up.
4455 * the driver allows loading the ucode even if the radio
4456 * is killed. Hence update the killswitch state here. The
4457 * rfkill handler will care about restarting if needed.
4460 set_bit(S_RFKILL, &il->status);
4462 clear_bit(S_RFKILL, &il->status);
4463 il_force_reset(il, true);
4465 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rf_kill);
4467 handled |= CSR_INT_BIT_RF_KILL;
4470 /* Chip got too hot and stopped itself */
4471 if (inta & CSR_INT_BIT_CT_KILL) {
4472 IL_ERR("Microcode CT kill error detected.\n");
4473 il->isr_stats.ctkill++;
4474 handled |= CSR_INT_BIT_CT_KILL;
4477 /* Error detected by uCode */
4478 if (inta & CSR_INT_BIT_SW_ERR) {
4479 IL_ERR("Microcode SW error detected. " " Restarting 0x%X.\n",
4482 il_irq_handle_error(il);
4483 handled |= CSR_INT_BIT_SW_ERR;
4487 * uCode wakes up after power-down sleep.
4488 * Tell device about any new tx or host commands enqueued,
4489 * and about any Rx buffers made available while asleep.
4491 if (inta & CSR_INT_BIT_WAKEUP) {
4492 D_ISR("Wakeup interrupt\n");
4493 il_rx_queue_update_write_ptr(il, &il->rxq);
4494 for (i = 0; i < il->hw_params.max_txq_num; i++)
4495 il_txq_update_write_ptr(il, &il->txq[i]);
4496 il->isr_stats.wakeup++;
4497 handled |= CSR_INT_BIT_WAKEUP;
4500 /* All uCode command responses, including Tx command responses,
4501 * Rx "responses" (frame-received notification), and other
4502 * notifications from uCode come through here*/
4503 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4504 il4965_rx_handle(il);
4506 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4509 /* This "Tx" DMA channel is used only for loading uCode */
4510 if (inta & CSR_INT_BIT_FH_TX) {
4511 D_ISR("uCode load interrupt\n");
4513 handled |= CSR_INT_BIT_FH_TX;
4514 /* Wake up uCode load routine, now that load is complete */
4515 il->ucode_write_complete = 1;
4516 wake_up(&il->wait_command_queue);
4519 if (inta & ~handled) {
4520 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4521 il->isr_stats.unhandled++;
4524 if (inta & ~(il->inta_mask)) {
4525 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
4526 inta & ~il->inta_mask);
4527 IL_WARN(" with FH49_INT = 0x%08x\n", inta_fh);
4530 /* Re-enable all interrupts */
4531 /* only Re-enable if disabled by irq */
4532 if (test_bit(S_INT_ENABLED, &il->status))
4533 il_enable_interrupts(il);
4534 /* Re-enable RF_KILL if it occurred */
4535 else if (handled & CSR_INT_BIT_RF_KILL)
4536 il_enable_rfkill_int(il);
4538 #ifdef CONFIG_IWLEGACY_DEBUG
4539 if (il_get_debug_level(il) & (IL_DL_ISR)) {
4540 inta = _il_rd(il, CSR_INT);
4541 inta_mask = _il_rd(il, CSR_INT_MASK);
4542 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
4543 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4544 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4549 /*****************************************************************************
4553 *****************************************************************************/
4555 #ifdef CONFIG_IWLEGACY_DEBUG
4558 * The following adds a new attribute to the sysfs representation
4559 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
4560 * used for controlling the debug level.
4562 * See the level definitions in iwl for details.
4564 * The debug_level being managed using sysfs below is a per device debug
4565 * level that is used instead of the global debug level if it (the per
4566 * device debug level) is set.
4569 il4965_show_debug_level(struct device *d, struct device_attribute *attr,
4572 struct il_priv *il = dev_get_drvdata(d);
4573 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
4577 il4965_store_debug_level(struct device *d, struct device_attribute *attr,
4578 const char *buf, size_t count)
4580 struct il_priv *il = dev_get_drvdata(d);
4584 ret = kstrtoul(buf, 0, &val);
4586 IL_ERR("%s is not in hex or decimal form.\n", buf);
4588 il->debug_level = val;
4590 return strnlen(buf, count);
4593 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il4965_show_debug_level,
4594 il4965_store_debug_level);
4596 #endif /* CONFIG_IWLEGACY_DEBUG */
4599 il4965_show_temperature(struct device *d, struct device_attribute *attr,
4602 struct il_priv *il = dev_get_drvdata(d);
4604 if (!il_is_alive(il))
4607 return sprintf(buf, "%d\n", il->temperature);
4610 static DEVICE_ATTR(temperature, S_IRUGO, il4965_show_temperature, NULL);
4613 il4965_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
4615 struct il_priv *il = dev_get_drvdata(d);
4617 if (!il_is_ready_rf(il))
4618 return sprintf(buf, "off\n");
4620 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
4624 il4965_store_tx_power(struct device *d, struct device_attribute *attr,
4625 const char *buf, size_t count)
4627 struct il_priv *il = dev_get_drvdata(d);
4631 ret = kstrtoul(buf, 10, &val);
4633 IL_INFO("%s is not in decimal form.\n", buf);
4635 ret = il_set_tx_power(il, val, false);
4637 IL_ERR("failed setting tx power (0x%d).\n", ret);
4644 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il4965_show_tx_power,
4645 il4965_store_tx_power);
4647 static struct attribute *il_sysfs_entries[] = {
4648 &dev_attr_temperature.attr,
4649 &dev_attr_tx_power.attr,
4650 #ifdef CONFIG_IWLEGACY_DEBUG
4651 &dev_attr_debug_level.attr,
4656 static struct attribute_group il_attribute_group = {
4657 .name = NULL, /* put in device directory */
4658 .attrs = il_sysfs_entries,
4661 /******************************************************************************
4663 * uCode download functions
4665 ******************************************************************************/
4668 il4965_dealloc_ucode_pci(struct il_priv *il)
4670 il_free_fw_desc(il->pci_dev, &il->ucode_code);
4671 il_free_fw_desc(il->pci_dev, &il->ucode_data);
4672 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
4673 il_free_fw_desc(il->pci_dev, &il->ucode_init);
4674 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
4675 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
4679 il4965_nic_start(struct il_priv *il)
4681 /* Remove all resets to allow NIC to operate */
4682 _il_wr(il, CSR_RESET, 0);
4685 static void il4965_ucode_callback(const struct firmware *ucode_raw,
4687 static int il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length);
4689 static int __must_check
4690 il4965_request_firmware(struct il_priv *il, bool first)
4692 const char *name_pre = il->cfg->fw_name_pre;
4696 il->fw_idx = il->cfg->ucode_api_max;
4697 sprintf(tag, "%d", il->fw_idx);
4700 sprintf(tag, "%d", il->fw_idx);
4703 if (il->fw_idx < il->cfg->ucode_api_min) {
4704 IL_ERR("no suitable firmware found!\n");
4708 sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
4710 D_INFO("attempting to load firmware '%s'\n", il->firmware_name);
4712 return request_firmware_nowait(THIS_MODULE, 1, il->firmware_name,
4713 &il->pci_dev->dev, GFP_KERNEL, il,
4714 il4965_ucode_callback);
4717 struct il4965_firmware_pieces {
4718 const void *inst, *data, *init, *init_data, *boot;
4719 size_t inst_size, data_size, init_size, init_data_size, boot_size;
4723 il4965_load_firmware(struct il_priv *il, const struct firmware *ucode_raw,
4724 struct il4965_firmware_pieces *pieces)
4726 struct il_ucode_header *ucode = (void *)ucode_raw->data;
4727 u32 api_ver, hdr_size;
4730 il->ucode_ver = le32_to_cpu(ucode->ver);
4731 api_ver = IL_UCODE_API(il->ucode_ver);
4739 if (ucode_raw->size < hdr_size) {
4740 IL_ERR("File size too small!\n");
4743 pieces->inst_size = le32_to_cpu(ucode->v1.inst_size);
4744 pieces->data_size = le32_to_cpu(ucode->v1.data_size);
4745 pieces->init_size = le32_to_cpu(ucode->v1.init_size);
4746 pieces->init_data_size = le32_to_cpu(ucode->v1.init_data_size);
4747 pieces->boot_size = le32_to_cpu(ucode->v1.boot_size);
4748 src = ucode->v1.data;
4752 /* Verify size of file vs. image size info in file's header */
4753 if (ucode_raw->size !=
4754 hdr_size + pieces->inst_size + pieces->data_size +
4755 pieces->init_size + pieces->init_data_size + pieces->boot_size) {
4757 IL_ERR("uCode file size %d does not match expected size\n",
4758 (int)ucode_raw->size);
4763 src += pieces->inst_size;
4765 src += pieces->data_size;
4767 src += pieces->init_size;
4768 pieces->init_data = src;
4769 src += pieces->init_data_size;
4771 src += pieces->boot_size;
4777 * il4965_ucode_callback - callback when firmware was loaded
4779 * If loaded successfully, copies the firmware into buffers
4780 * for the card to fetch (via DMA).
4783 il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
4785 struct il_priv *il = context;
4786 struct il_ucode_header *ucode;
4788 struct il4965_firmware_pieces pieces;
4789 const unsigned int api_max = il->cfg->ucode_api_max;
4790 const unsigned int api_min = il->cfg->ucode_api_min;
4793 u32 max_probe_length = 200;
4794 u32 standard_phy_calibration_size =
4795 IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE;
4797 memset(&pieces, 0, sizeof(pieces));
4800 if (il->fw_idx <= il->cfg->ucode_api_max)
4801 IL_ERR("request for firmware file '%s' failed.\n",
4806 D_INFO("Loaded firmware file '%s' (%zd bytes).\n", il->firmware_name,
4809 /* Make sure that we got at least the API version number */
4810 if (ucode_raw->size < 4) {
4811 IL_ERR("File size way too small!\n");
4815 /* Data from ucode file: header followed by uCode images */
4816 ucode = (struct il_ucode_header *)ucode_raw->data;
4818 err = il4965_load_firmware(il, ucode_raw, &pieces);
4823 api_ver = IL_UCODE_API(il->ucode_ver);
4826 * api_ver should match the api version forming part of the
4827 * firmware filename ... but we don't check for that and only rely
4828 * on the API version read from firmware header from here on forward
4830 if (api_ver < api_min || api_ver > api_max) {
4831 IL_ERR("Driver unable to support your firmware API. "
4832 "Driver supports v%u, firmware is v%u.\n", api_max,
4837 if (api_ver != api_max)
4838 IL_ERR("Firmware has old API version. Expected v%u, "
4839 "got v%u. New firmware can be obtained "
4840 "from http://www.intellinuxwireless.org.\n", api_max,
4843 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
4844 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
4845 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
4847 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
4848 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
4849 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
4850 IL_UCODE_SERIAL(il->ucode_ver));
4853 * For any of the failures below (before allocating pci memory)
4854 * we will try to load a version with a smaller API -- maybe the
4855 * user just got a corrupted version of the latest API.
4858 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
4859 D_INFO("f/w package hdr runtime inst size = %Zd\n", pieces.inst_size);
4860 D_INFO("f/w package hdr runtime data size = %Zd\n", pieces.data_size);
4861 D_INFO("f/w package hdr init inst size = %Zd\n", pieces.init_size);
4862 D_INFO("f/w package hdr init data size = %Zd\n", pieces.init_data_size);
4863 D_INFO("f/w package hdr boot inst size = %Zd\n", pieces.boot_size);
4865 /* Verify that uCode images will fit in card's SRAM */
4866 if (pieces.inst_size > il->hw_params.max_inst_size) {
4867 IL_ERR("uCode instr len %Zd too large to fit in\n",
4872 if (pieces.data_size > il->hw_params.max_data_size) {
4873 IL_ERR("uCode data len %Zd too large to fit in\n",
4878 if (pieces.init_size > il->hw_params.max_inst_size) {
4879 IL_ERR("uCode init instr len %Zd too large to fit in\n",
4884 if (pieces.init_data_size > il->hw_params.max_data_size) {
4885 IL_ERR("uCode init data len %Zd too large to fit in\n",
4886 pieces.init_data_size);
4890 if (pieces.boot_size > il->hw_params.max_bsm_size) {
4891 IL_ERR("uCode boot instr len %Zd too large to fit in\n",
4896 /* Allocate ucode buffers for card's bus-master loading ... */
4898 /* Runtime instructions and 2 copies of data:
4899 * 1) unmodified from disk
4900 * 2) backup cache for save/restore during power-downs */
4901 il->ucode_code.len = pieces.inst_size;
4902 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
4904 il->ucode_data.len = pieces.data_size;
4905 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
4907 il->ucode_data_backup.len = pieces.data_size;
4908 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
4910 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
4911 !il->ucode_data_backup.v_addr)
4914 /* Initialization instructions and data */
4915 if (pieces.init_size && pieces.init_data_size) {
4916 il->ucode_init.len = pieces.init_size;
4917 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
4919 il->ucode_init_data.len = pieces.init_data_size;
4920 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
4922 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
4926 /* Bootstrap (instructions only, no data) */
4927 if (pieces.boot_size) {
4928 il->ucode_boot.len = pieces.boot_size;
4929 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
4931 if (!il->ucode_boot.v_addr)
4935 /* Now that we can no longer fail, copy information */
4937 il->sta_key_max_num = STA_KEY_MAX_NUM;
4939 /* Copy images into buffers for card's bus-master reads ... */
4941 /* Runtime instructions (first block of data in file) */
4942 D_INFO("Copying (but not loading) uCode instr len %Zd\n",
4944 memcpy(il->ucode_code.v_addr, pieces.inst, pieces.inst_size);
4946 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4947 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
4951 * NOTE: Copy into backup buffer will be done in il_up()
4953 D_INFO("Copying (but not loading) uCode data len %Zd\n",
4955 memcpy(il->ucode_data.v_addr, pieces.data, pieces.data_size);
4956 memcpy(il->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
4958 /* Initialization instructions */
4959 if (pieces.init_size) {
4960 D_INFO("Copying (but not loading) init instr len %Zd\n",
4962 memcpy(il->ucode_init.v_addr, pieces.init, pieces.init_size);
4965 /* Initialization data */
4966 if (pieces.init_data_size) {
4967 D_INFO("Copying (but not loading) init data len %Zd\n",
4968 pieces.init_data_size);
4969 memcpy(il->ucode_init_data.v_addr, pieces.init_data,
4970 pieces.init_data_size);
4973 /* Bootstrap instructions */
4974 D_INFO("Copying (but not loading) boot instr len %Zd\n",
4976 memcpy(il->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
4979 * figure out the offset of chain noise reset and gain commands
4980 * base on the size of standard phy calibration commands table size
4982 il->_4965.phy_calib_chain_noise_reset_cmd =
4983 standard_phy_calibration_size;
4984 il->_4965.phy_calib_chain_noise_gain_cmd =
4985 standard_phy_calibration_size + 1;
4987 /**************************************************
4988 * This is still part of probe() in a sense...
4990 * 9. Setup and register with mac80211 and debugfs
4991 **************************************************/
4992 err = il4965_mac_setup_register(il, max_probe_length);
4996 err = il_dbgfs_register(il, DRV_NAME);
4998 IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
5001 err = sysfs_create_group(&il->pci_dev->dev.kobj, &il_attribute_group);
5003 IL_ERR("failed to create sysfs device attributes\n");
5007 /* We have our copies now, allow OS release its copies */
5008 release_firmware(ucode_raw);
5009 complete(&il->_4965.firmware_loading_complete);
5013 /* try next, if any */
5014 if (il4965_request_firmware(il, false))
5016 release_firmware(ucode_raw);
5020 IL_ERR("failed to allocate pci memory\n");
5021 il4965_dealloc_ucode_pci(il);
5023 complete(&il->_4965.firmware_loading_complete);
5024 device_release_driver(&il->pci_dev->dev);
5025 release_firmware(ucode_raw);
5028 static const char *const desc_lookup_text[] = {
5033 "NMI_INTERRUPT_WDG",
5037 "HW_ERROR_TUNE_LOCK",
5038 "HW_ERROR_TEMPERATURE",
5039 "ILLEGAL_CHAN_FREQ",
5042 "NMI_INTERRUPT_HOST",
5043 "NMI_INTERRUPT_ACTION_PT",
5044 "NMI_INTERRUPT_UNKNOWN",
5045 "UCODE_VERSION_MISMATCH",
5046 "HW_ERROR_ABS_LOCK",
5047 "HW_ERROR_CAL_LOCK_FAIL",
5048 "NMI_INTERRUPT_INST_ACTION_PT",
5049 "NMI_INTERRUPT_DATA_ACTION_PT",
5051 "NMI_INTERRUPT_TRM",
5052 "NMI_INTERRUPT_BREAK_POINT",
5062 } advanced_lookup[] = {
5064 "NMI_INTERRUPT_WDG", 0x34}, {
5065 "SYSASSERT", 0x35}, {
5066 "UCODE_VERSION_MISMATCH", 0x37}, {
5067 "BAD_COMMAND", 0x38}, {
5068 "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C}, {
5069 "FATAL_ERROR", 0x3D}, {
5070 "NMI_TRM_HW_ERR", 0x46}, {
5071 "NMI_INTERRUPT_TRM", 0x4C}, {
5072 "NMI_INTERRUPT_BREAK_POINT", 0x54}, {
5073 "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C}, {
5074 "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64}, {
5075 "NMI_INTERRUPT_HOST", 0x66}, {
5076 "NMI_INTERRUPT_ACTION_PT", 0x7C}, {
5077 "NMI_INTERRUPT_UNKNOWN", 0x84}, {
5078 "NMI_INTERRUPT_INST_ACTION_PT", 0x86}, {
5079 "ADVANCED_SYSASSERT", 0},};
5082 il4965_desc_lookup(u32 num)
5085 int max = ARRAY_SIZE(desc_lookup_text);
5088 return desc_lookup_text[num];
5090 max = ARRAY_SIZE(advanced_lookup) - 1;
5091 for (i = 0; i < max; i++) {
5092 if (advanced_lookup[i].num == num)
5095 return advanced_lookup[i].name;
5098 #define ERROR_START_OFFSET (1 * sizeof(u32))
5099 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
5102 il4965_dump_nic_error_log(struct il_priv *il)
5105 u32 desc, time, count, base, data1;
5106 u32 blink1, blink2, ilink1, ilink2;
5109 if (il->ucode_type == UCODE_INIT)
5110 base = le32_to_cpu(il->card_alive_init.error_event_table_ptr);
5112 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
5114 if (!il->ops->is_valid_rtc_data_addr(base)) {
5115 IL_ERR("Not valid error log pointer 0x%08X for %s uCode\n",
5116 base, (il->ucode_type == UCODE_INIT) ? "Init" : "RT");
5120 count = il_read_targ_mem(il, base);
5122 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
5123 IL_ERR("Start IWL Error Log Dump:\n");
5124 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
5127 desc = il_read_targ_mem(il, base + 1 * sizeof(u32));
5128 il->isr_stats.err_code = desc;
5129 pc = il_read_targ_mem(il, base + 2 * sizeof(u32));
5130 blink1 = il_read_targ_mem(il, base + 3 * sizeof(u32));
5131 blink2 = il_read_targ_mem(il, base + 4 * sizeof(u32));
5132 ilink1 = il_read_targ_mem(il, base + 5 * sizeof(u32));
5133 ilink2 = il_read_targ_mem(il, base + 6 * sizeof(u32));
5134 data1 = il_read_targ_mem(il, base + 7 * sizeof(u32));
5135 data2 = il_read_targ_mem(il, base + 8 * sizeof(u32));
5136 line = il_read_targ_mem(il, base + 9 * sizeof(u32));
5137 time = il_read_targ_mem(il, base + 11 * sizeof(u32));
5138 hcmd = il_read_targ_mem(il, base + 22 * sizeof(u32));
5141 "data1 data2 line\n");
5142 IL_ERR("%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
5143 il4965_desc_lookup(desc), desc, time, data1, data2, line);
5144 IL_ERR("pc blink1 blink2 ilink1 ilink2 hcmd\n");
5145 IL_ERR("0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", pc, blink1,
5146 blink2, ilink1, ilink2, hcmd);
5150 il4965_rf_kill_ct_config(struct il_priv *il)
5152 struct il_ct_kill_config cmd;
5153 unsigned long flags;
5156 spin_lock_irqsave(&il->lock, flags);
5157 _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
5158 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
5159 spin_unlock_irqrestore(&il->lock, flags);
5161 cmd.critical_temperature_R =
5162 cpu_to_le32(il->hw_params.ct_kill_threshold);
5164 ret = il_send_cmd_pdu(il, C_CT_KILL_CONFIG, sizeof(cmd), &cmd);
5166 IL_ERR("C_CT_KILL_CONFIG failed\n");
5168 D_INFO("C_CT_KILL_CONFIG " "succeeded, "
5169 "critical temperature is %d\n",
5170 il->hw_params.ct_kill_threshold);
5173 static const s8 default_queue_to_tx_fifo[] = {
5183 #define IL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
5186 il4965_alive_notify(struct il_priv *il)
5189 unsigned long flags;
5193 spin_lock_irqsave(&il->lock, flags);
5195 /* Clear 4965's internal Tx Scheduler data base */
5196 il->scd_base_addr = il_rd_prph(il, IL49_SCD_SRAM_BASE_ADDR);
5197 a = il->scd_base_addr + IL49_SCD_CONTEXT_DATA_OFFSET;
5198 for (; a < il->scd_base_addr + IL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
5199 il_write_targ_mem(il, a, 0);
5200 for (; a < il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
5201 il_write_targ_mem(il, a, 0);
5205 IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il->hw_params.max_txq_num);
5207 il_write_targ_mem(il, a, 0);
5209 /* Tel 4965 where to find Tx byte count tables */
5210 il_wr_prph(il, IL49_SCD_DRAM_BASE_ADDR, il->scd_bc_tbls.dma >> 10);
5212 /* Enable DMA channel */
5213 for (chan = 0; chan < FH49_TCSR_CHNL_NUM; chan++)
5214 il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(chan),
5215 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
5216 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
5218 /* Update FH chicken bits */
5219 reg_val = il_rd(il, FH49_TX_CHICKEN_BITS_REG);
5220 il_wr(il, FH49_TX_CHICKEN_BITS_REG,
5221 reg_val | FH49_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
5223 /* Disable chain mode for all queues */
5224 il_wr_prph(il, IL49_SCD_QUEUECHAIN_SEL, 0);
5226 /* Initialize each Tx queue (including the command queue) */
5227 for (i = 0; i < il->hw_params.max_txq_num; i++) {
5229 /* TFD circular buffer read/write idxes */
5230 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(i), 0);
5231 il_wr(il, HBUS_TARG_WRPTR, 0 | (i << 8));
5233 /* Max Tx Window size for Scheduler-ACK mode */
5234 il_write_targ_mem(il,
5236 IL49_SCD_CONTEXT_QUEUE_OFFSET(i),
5238 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
5239 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
5242 il_write_targ_mem(il,
5244 IL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
5247 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
5248 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
5251 il_wr_prph(il, IL49_SCD_INTERRUPT_MASK,
5252 (1 << il->hw_params.max_txq_num) - 1);
5254 /* Activate all Tx DMA/FIFO channels */
5255 il4965_txq_set_sched(il, IL_MASK(0, 6));
5257 il4965_set_wr_ptrs(il, IL_DEFAULT_CMD_QUEUE_NUM, 0);
5259 /* make sure all queue are not stopped */
5260 memset(&il->queue_stopped[0], 0, sizeof(il->queue_stopped));
5261 for (i = 0; i < 4; i++)
5262 atomic_set(&il->queue_stop_count[i], 0);
5264 /* reset to 0 to enable all the queue first */
5265 il->txq_ctx_active_msk = 0;
5266 /* Map each Tx/cmd queue to its corresponding fifo */
5267 BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo) != 7);
5269 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
5270 int ac = default_queue_to_tx_fifo[i];
5272 il_txq_ctx_activate(il, i);
5274 if (ac == IL_TX_FIFO_UNUSED)
5277 il4965_tx_queue_set_status(il, &il->txq[i], ac, 0);
5280 spin_unlock_irqrestore(&il->lock, flags);
5286 * il4965_alive_start - called after N_ALIVE notification received
5287 * from protocol/runtime uCode (initialization uCode's
5288 * Alive gets handled by il_init_alive_start()).
5291 il4965_alive_start(struct il_priv *il)
5295 D_INFO("Runtime Alive received.\n");
5297 if (il->card_alive.is_valid != UCODE_VALID_OK) {
5298 /* We had an error bringing up the hardware, so take it
5299 * all the way back down so we can try again */
5300 D_INFO("Alive failed.\n");
5304 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5305 * This is a paranoid check, because we would not have gotten the
5306 * "runtime" alive if code weren't properly loaded. */
5307 if (il4965_verify_ucode(il)) {
5308 /* Runtime instruction load was bad;
5309 * take it all the way back down so we can try again */
5310 D_INFO("Bad runtime uCode load.\n");
5314 ret = il4965_alive_notify(il);
5316 IL_WARN("Could not complete ALIVE transition [ntf]: %d\n", ret);
5320 /* After the ALIVE response, we can send host commands to the uCode */
5321 set_bit(S_ALIVE, &il->status);
5323 /* Enable watchdog to monitor the driver tx queues */
5324 il_setup_watchdog(il);
5326 if (il_is_rfkill(il))
5329 ieee80211_wake_queues(il->hw);
5331 il->active_rate = RATES_MASK;
5333 il_power_update_mode(il, true);
5334 D_INFO("Updated power mode\n");
5336 if (il_is_associated(il)) {
5337 struct il_rxon_cmd *active_rxon =
5338 (struct il_rxon_cmd *)&il->active;
5339 /* apply any changes in staging */
5340 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
5341 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5343 /* Initialize our rx_config data */
5344 il_connection_init_rx_config(il);
5346 if (il->ops->set_rxon_chain)
5347 il->ops->set_rxon_chain(il);
5350 /* Configure bluetooth coexistence if enabled */
5351 il_send_bt_config(il);
5353 il4965_reset_run_time_calib(il);
5355 set_bit(S_READY, &il->status);
5357 /* Configure the adapter for unassociated operation */
5360 /* At this point, the NIC is initialized and operational */
5361 il4965_rf_kill_ct_config(il);
5363 D_INFO("ALIVE processing complete.\n");
5364 wake_up(&il->wait_command_queue);
5369 queue_work(il->workqueue, &il->restart);
5372 static void il4965_cancel_deferred_work(struct il_priv *il);
5375 __il4965_down(struct il_priv *il)
5377 unsigned long flags;
5380 D_INFO(DRV_NAME " is going down\n");
5382 il_scan_cancel_timeout(il, 200);
5384 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
5386 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
5387 * to prevent rearm timer */
5388 del_timer_sync(&il->watchdog);
5390 il_clear_ucode_stations(il);
5392 /* FIXME: race conditions ? */
5393 spin_lock_irq(&il->sta_lock);
5395 * Remove all key information that is not stored as part
5396 * of station information since mac80211 may not have had
5397 * a chance to remove all the keys. When device is
5398 * reconfigured by mac80211 after an error all keys will
5401 memset(il->_4965.wep_keys, 0, sizeof(il->_4965.wep_keys));
5402 il->_4965.key_mapping_keys = 0;
5403 spin_unlock_irq(&il->sta_lock);
5405 il_dealloc_bcast_stations(il);
5406 il_clear_driver_stations(il);
5408 /* Unblock any waiting calls */
5409 wake_up_all(&il->wait_command_queue);
5411 /* Wipe out the EXIT_PENDING status bit if we are not actually
5412 * exiting the module */
5414 clear_bit(S_EXIT_PENDING, &il->status);
5416 /* stop and reset the on-board processor */
5417 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5419 /* tell the device to stop sending interrupts */
5420 spin_lock_irqsave(&il->lock, flags);
5421 il_disable_interrupts(il);
5422 spin_unlock_irqrestore(&il->lock, flags);
5423 il4965_synchronize_irq(il);
5425 if (il->mac80211_registered)
5426 ieee80211_stop_queues(il->hw);
5428 /* If we have not previously called il_init() then
5429 * clear all bits but the RF Kill bit and return */
5430 if (!il_is_init(il)) {
5432 test_bit(S_RFKILL, &il->status) << S_RFKILL |
5433 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
5434 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
5438 /* ...otherwise clear out all the status bits but the RF Kill
5439 * bit and continue taking the NIC down. */
5441 test_bit(S_RFKILL, &il->status) << S_RFKILL |
5442 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
5443 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
5444 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
5447 * We disabled and synchronized interrupt, and priv->mutex is taken, so
5448 * here is the only thread which will program device registers, but
5449 * still have lockdep assertions, so we are taking reg_lock.
5451 spin_lock_irq(&il->reg_lock);
5452 /* FIXME: il_grab_nic_access if rfkill is off ? */
5454 il4965_txq_ctx_stop(il);
5455 il4965_rxq_stop(il);
5456 /* Power-down device's busmaster DMA clocks */
5457 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
5459 /* Make sure (redundant) we've released our request to stay awake */
5460 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5461 /* Stop the device, and put it in low power state */
5464 spin_unlock_irq(&il->reg_lock);
5466 il4965_txq_ctx_unmap(il);
5468 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
5470 dev_kfree_skb(il->beacon_skb);
5471 il->beacon_skb = NULL;
5473 /* clear out any free frames */
5474 il4965_clear_free_frames(il);
5478 il4965_down(struct il_priv *il)
5480 mutex_lock(&il->mutex);
5482 mutex_unlock(&il->mutex);
5484 il4965_cancel_deferred_work(il);
5489 il4965_set_hw_ready(struct il_priv *il)
5493 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
5494 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
5496 /* See if we got it */
5497 ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
5498 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
5499 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
5502 il->hw_ready = true;
5504 D_INFO("hardware %s ready\n", (il->hw_ready) ? "" : "not");
5508 il4965_prepare_card_hw(struct il_priv *il)
5512 il->hw_ready = false;
5514 il4965_set_hw_ready(il);
5518 /* If HW is not ready, prepare the conditions to check again */
5519 il_set_bit(il, CSR_HW_IF_CONFIG_REG, CSR_HW_IF_CONFIG_REG_PREPARE);
5522 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
5523 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
5524 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
5526 /* HW should be ready by now, check again. */
5527 if (ret != -ETIMEDOUT)
5528 il4965_set_hw_ready(il);
5531 #define MAX_HW_RESTARTS 5
5534 __il4965_up(struct il_priv *il)
5539 if (test_bit(S_EXIT_PENDING, &il->status)) {
5540 IL_WARN("Exit pending; will not bring the NIC up\n");
5544 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
5545 IL_ERR("ucode not available for device bringup\n");
5549 ret = il4965_alloc_bcast_station(il);
5551 il_dealloc_bcast_stations(il);
5555 il4965_prepare_card_hw(il);
5556 if (!il->hw_ready) {
5557 IL_ERR("HW not ready\n");
5561 /* If platform's RF_KILL switch is NOT set to KILL */
5562 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5563 clear_bit(S_RFKILL, &il->status);
5565 set_bit(S_RFKILL, &il->status);
5566 wiphy_rfkill_set_hw_state(il->hw->wiphy, true);
5568 il_enable_rfkill_int(il);
5569 IL_WARN("Radio disabled by HW RF Kill switch\n");
5573 _il_wr(il, CSR_INT, 0xFFFFFFFF);
5575 /* must be initialised before il_hw_nic_init */
5576 il->cmd_queue = IL_DEFAULT_CMD_QUEUE_NUM;
5578 ret = il4965_hw_nic_init(il);
5580 IL_ERR("Unable to init nic\n");
5584 /* make sure rfkill handshake bits are cleared */
5585 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5586 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5588 /* clear (again), then enable host interrupts */
5589 _il_wr(il, CSR_INT, 0xFFFFFFFF);
5590 il_enable_interrupts(il);
5592 /* really make sure rfkill handshake bits are cleared */
5593 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5594 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5596 /* Copy original ucode data image from disk into backup cache.
5597 * This will be used to initialize the on-board processor's
5598 * data SRAM for a clean start when the runtime program first loads. */
5599 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
5600 il->ucode_data.len);
5602 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5604 /* load bootstrap state machine,
5605 * load bootstrap program into processor's memory,
5606 * prepare to load the "initialize" uCode */
5607 ret = il->ops->load_ucode(il);
5610 IL_ERR("Unable to set up bootstrap uCode: %d\n", ret);
5614 /* start card; "initialize" will load runtime ucode */
5615 il4965_nic_start(il);
5617 D_INFO(DRV_NAME " is coming up\n");
5622 set_bit(S_EXIT_PENDING, &il->status);
5624 clear_bit(S_EXIT_PENDING, &il->status);
5626 /* tried to restart and config the device for as long as our
5627 * patience could withstand */
5628 IL_ERR("Unable to initialize device after %d attempts.\n", i);
5632 /*****************************************************************************
5634 * Workqueue callbacks
5636 *****************************************************************************/
5639 il4965_bg_init_alive_start(struct work_struct *data)
5641 struct il_priv *il =
5642 container_of(data, struct il_priv, init_alive_start.work);
5644 mutex_lock(&il->mutex);
5645 if (test_bit(S_EXIT_PENDING, &il->status))
5648 il->ops->init_alive_start(il);
5650 mutex_unlock(&il->mutex);
5654 il4965_bg_alive_start(struct work_struct *data)
5656 struct il_priv *il =
5657 container_of(data, struct il_priv, alive_start.work);
5659 mutex_lock(&il->mutex);
5660 if (test_bit(S_EXIT_PENDING, &il->status))
5663 il4965_alive_start(il);
5665 mutex_unlock(&il->mutex);
5669 il4965_bg_run_time_calib_work(struct work_struct *work)
5671 struct il_priv *il = container_of(work, struct il_priv,
5672 run_time_calib_work);
5674 mutex_lock(&il->mutex);
5676 if (test_bit(S_EXIT_PENDING, &il->status) ||
5677 test_bit(S_SCANNING, &il->status)) {
5678 mutex_unlock(&il->mutex);
5682 if (il->start_calib) {
5683 il4965_chain_noise_calibration(il, (void *)&il->_4965.stats);
5684 il4965_sensitivity_calibration(il, (void *)&il->_4965.stats);
5687 mutex_unlock(&il->mutex);
5691 il4965_bg_restart(struct work_struct *data)
5693 struct il_priv *il = container_of(data, struct il_priv, restart);
5695 if (test_bit(S_EXIT_PENDING, &il->status))
5698 if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
5699 mutex_lock(&il->mutex);
5704 mutex_unlock(&il->mutex);
5705 il4965_cancel_deferred_work(il);
5706 ieee80211_restart_hw(il->hw);
5710 mutex_lock(&il->mutex);
5711 if (test_bit(S_EXIT_PENDING, &il->status)) {
5712 mutex_unlock(&il->mutex);
5717 mutex_unlock(&il->mutex);
5722 il4965_bg_rx_replenish(struct work_struct *data)
5724 struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
5726 if (test_bit(S_EXIT_PENDING, &il->status))
5729 mutex_lock(&il->mutex);
5730 il4965_rx_replenish(il);
5731 mutex_unlock(&il->mutex);
5734 /*****************************************************************************
5736 * mac80211 entry point functions
5738 *****************************************************************************/
5740 #define UCODE_READY_TIMEOUT (4 * HZ)
5743 * Not a mac80211 entry point function, but it fits in with all the
5744 * other mac80211 functions grouped here.
5747 il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length)
5750 struct ieee80211_hw *hw = il->hw;
5752 hw->rate_control_algorithm = "iwl-4965-rs";
5754 /* Tell mac80211 our characteristics */
5756 IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_AMPDU_AGGREGATION |
5757 IEEE80211_HW_NEED_DTIM_BEFORE_ASSOC | IEEE80211_HW_SPECTRUM_MGMT |
5758 IEEE80211_HW_REPORTS_TX_ACK_STATUS | IEEE80211_HW_SUPPORTS_PS |
5759 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
5760 if (il->cfg->sku & IL_SKU_N)
5762 IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
5763 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
5765 hw->sta_data_size = sizeof(struct il_station_priv);
5766 hw->vif_data_size = sizeof(struct il_vif_priv);
5768 hw->wiphy->interface_modes =
5769 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
5771 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
5772 hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
5773 REGULATORY_DISABLE_BEACON_HINTS;
5776 * For now, disable PS by default because it affects
5777 * RX performance significantly.
5779 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
5781 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
5782 /* we create the 802.11 header and a zero-length SSID element */
5783 hw->wiphy->max_scan_ie_len = max_probe_length - 24 - 2;
5785 /* Default value; 4 EDCA QOS priorities */
5788 hw->max_listen_interval = IL_CONN_MAX_LISTEN_INTERVAL;
5790 if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
5791 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5792 &il->bands[IEEE80211_BAND_2GHZ];
5793 if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
5794 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5795 &il->bands[IEEE80211_BAND_5GHZ];
5799 ret = ieee80211_register_hw(il->hw);
5801 IL_ERR("Failed to register hw (error %d)\n", ret);
5804 il->mac80211_registered = 1;
5810 il4965_mac_start(struct ieee80211_hw *hw)
5812 struct il_priv *il = hw->priv;
5815 D_MAC80211("enter\n");
5817 /* we should be verifying the device is ready to be opened */
5818 mutex_lock(&il->mutex);
5819 ret = __il4965_up(il);
5820 mutex_unlock(&il->mutex);
5825 if (il_is_rfkill(il))
5828 D_INFO("Start UP work done.\n");
5830 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5831 * mac80211 will not be run successfully. */
5832 ret = wait_event_timeout(il->wait_command_queue,
5833 test_bit(S_READY, &il->status),
5834 UCODE_READY_TIMEOUT);
5836 if (!test_bit(S_READY, &il->status)) {
5837 IL_ERR("START_ALIVE timeout after %dms.\n",
5838 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5843 il4965_led_enable(il);
5847 D_MAC80211("leave\n");
5852 il4965_mac_stop(struct ieee80211_hw *hw)
5854 struct il_priv *il = hw->priv;
5856 D_MAC80211("enter\n");
5865 flush_workqueue(il->workqueue);
5867 /* User space software may expect getting rfkill changes
5868 * even if interface is down */
5869 _il_wr(il, CSR_INT, 0xFFFFFFFF);
5870 il_enable_rfkill_int(il);
5872 D_MAC80211("leave\n");
5876 il4965_mac_tx(struct ieee80211_hw *hw,
5877 struct ieee80211_tx_control *control,
5878 struct sk_buff *skb)
5880 struct il_priv *il = hw->priv;
5882 D_MACDUMP("enter\n");
5884 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
5885 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
5887 if (il4965_tx_skb(il, control->sta, skb))
5888 dev_kfree_skb_any(skb);
5890 D_MACDUMP("leave\n");
5894 il4965_mac_update_tkip_key(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5895 struct ieee80211_key_conf *keyconf,
5896 struct ieee80211_sta *sta, u32 iv32, u16 * phase1key)
5898 struct il_priv *il = hw->priv;
5900 D_MAC80211("enter\n");
5902 il4965_update_tkip_key(il, keyconf, sta, iv32, phase1key);
5904 D_MAC80211("leave\n");
5908 il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
5909 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
5910 struct ieee80211_key_conf *key)
5912 struct il_priv *il = hw->priv;
5915 bool is_default_wep_key = false;
5917 D_MAC80211("enter\n");
5919 if (il->cfg->mod_params->sw_crypto) {
5920 D_MAC80211("leave - hwcrypto disabled\n");
5925 * To support IBSS RSN, don't program group keys in IBSS, the
5926 * hardware will then not attempt to decrypt the frames.
5928 if (vif->type == NL80211_IFTYPE_ADHOC &&
5929 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
5930 D_MAC80211("leave - ad-hoc group key\n");
5934 sta_id = il_sta_id_or_broadcast(il, sta);
5935 if (sta_id == IL_INVALID_STATION)
5938 mutex_lock(&il->mutex);
5939 il_scan_cancel_timeout(il, 100);
5942 * If we are getting WEP group key and we didn't receive any key mapping
5943 * so far, we are in legacy wep mode (group key only), otherwise we are
5945 * In legacy wep mode, we use another host command to the uCode.
5947 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
5948 key->cipher == WLAN_CIPHER_SUITE_WEP104) && !sta) {
5950 is_default_wep_key = !il->_4965.key_mapping_keys;
5952 is_default_wep_key =
5953 (key->hw_key_idx == HW_KEY_DEFAULT);
5958 if (is_default_wep_key)
5959 ret = il4965_set_default_wep_key(il, key);
5961 ret = il4965_set_dynamic_key(il, key, sta_id);
5963 D_MAC80211("enable hwcrypto key\n");
5966 if (is_default_wep_key)
5967 ret = il4965_remove_default_wep_key(il, key);
5969 ret = il4965_remove_dynamic_key(il, key, sta_id);
5971 D_MAC80211("disable hwcrypto key\n");
5977 mutex_unlock(&il->mutex);
5978 D_MAC80211("leave\n");
5984 il4965_mac_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5985 enum ieee80211_ampdu_mlme_action action,
5986 struct ieee80211_sta *sta, u16 tid, u16 * ssn,
5989 struct il_priv *il = hw->priv;
5992 D_HT("A-MPDU action on addr %pM tid %d\n", sta->addr, tid);
5994 if (!(il->cfg->sku & IL_SKU_N))
5997 mutex_lock(&il->mutex);
6000 case IEEE80211_AMPDU_RX_START:
6002 ret = il4965_sta_rx_agg_start(il, sta, tid, *ssn);
6004 case IEEE80211_AMPDU_RX_STOP:
6006 ret = il4965_sta_rx_agg_stop(il, sta, tid);
6007 if (test_bit(S_EXIT_PENDING, &il->status))
6010 case IEEE80211_AMPDU_TX_START:
6012 ret = il4965_tx_agg_start(il, vif, sta, tid, ssn);
6014 case IEEE80211_AMPDU_TX_STOP_CONT:
6015 case IEEE80211_AMPDU_TX_STOP_FLUSH:
6016 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
6018 ret = il4965_tx_agg_stop(il, vif, sta, tid);
6019 if (test_bit(S_EXIT_PENDING, &il->status))
6022 case IEEE80211_AMPDU_TX_OPERATIONAL:
6026 mutex_unlock(&il->mutex);
6032 il4965_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
6033 struct ieee80211_sta *sta)
6035 struct il_priv *il = hw->priv;
6036 struct il_station_priv *sta_priv = (void *)sta->drv_priv;
6037 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
6041 D_INFO("received request to add station %pM\n", sta->addr);
6042 mutex_lock(&il->mutex);
6043 D_INFO("proceeding to add station %pM\n", sta->addr);
6044 sta_priv->common.sta_id = IL_INVALID_STATION;
6046 atomic_set(&sta_priv->pending_frames, 0);
6049 il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
6051 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
6052 /* Should we return success if return code is EEXIST ? */
6053 mutex_unlock(&il->mutex);
6057 sta_priv->common.sta_id = sta_id;
6059 /* Initialize rate scaling */
6060 D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
6061 il4965_rs_rate_init(il, sta, sta_id);
6062 mutex_unlock(&il->mutex);
6068 il4965_mac_channel_switch(struct ieee80211_hw *hw,
6069 struct ieee80211_channel_switch *ch_switch)
6071 struct il_priv *il = hw->priv;
6072 const struct il_channel_info *ch_info;
6073 struct ieee80211_conf *conf = &hw->conf;
6074 struct ieee80211_channel *channel = ch_switch->chandef.chan;
6075 struct il_ht_config *ht_conf = &il->current_ht_config;
6078 D_MAC80211("enter\n");
6080 mutex_lock(&il->mutex);
6082 if (il_is_rfkill(il))
6085 if (test_bit(S_EXIT_PENDING, &il->status) ||
6086 test_bit(S_SCANNING, &il->status) ||
6087 test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
6090 if (!il_is_associated(il))
6093 if (!il->ops->set_channel_switch)
6096 ch = channel->hw_value;
6097 if (le16_to_cpu(il->active.channel) == ch)
6100 ch_info = il_get_channel_info(il, channel->band, ch);
6101 if (!il_is_channel_valid(ch_info)) {
6102 D_MAC80211("invalid channel\n");
6106 spin_lock_irq(&il->lock);
6108 il->current_ht_config.smps = conf->smps_mode;
6110 /* Configure HT40 channels */
6111 switch (cfg80211_get_chandef_type(&ch_switch->chandef)) {
6112 case NL80211_CHAN_NO_HT:
6113 case NL80211_CHAN_HT20:
6114 il->ht.is_40mhz = false;
6115 il->ht.extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
6117 case NL80211_CHAN_HT40MINUS:
6118 il->ht.extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
6119 il->ht.is_40mhz = true;
6121 case NL80211_CHAN_HT40PLUS:
6122 il->ht.extension_chan_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
6123 il->ht.is_40mhz = true;
6127 if ((le16_to_cpu(il->staging.channel) != ch))
6128 il->staging.flags = 0;
6130 il_set_rxon_channel(il, channel);
6131 il_set_rxon_ht(il, ht_conf);
6132 il_set_flags_for_band(il, channel->band, il->vif);
6134 spin_unlock_irq(&il->lock);
6138 * at this point, staging_rxon has the
6139 * configuration for channel switch
6141 set_bit(S_CHANNEL_SWITCH_PENDING, &il->status);
6142 il->switch_channel = cpu_to_le16(ch);
6143 if (il->ops->set_channel_switch(il, ch_switch)) {
6144 clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status);
6145 il->switch_channel = 0;
6146 ieee80211_chswitch_done(il->vif, false);
6150 mutex_unlock(&il->mutex);
6151 D_MAC80211("leave\n");
6155 il4965_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
6156 unsigned int *total_flags, u64 multicast)
6158 struct il_priv *il = hw->priv;
6159 __le32 filter_or = 0, filter_nand = 0;
6161 #define CHK(test, flag) do { \
6162 if (*total_flags & (test)) \
6163 filter_or |= (flag); \
6165 filter_nand |= (flag); \
6168 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
6171 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
6172 /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
6173 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
6174 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
6178 mutex_lock(&il->mutex);
6180 il->staging.filter_flags &= ~filter_nand;
6181 il->staging.filter_flags |= filter_or;
6184 * Not committing directly because hardware can perform a scan,
6185 * but we'll eventually commit the filter flags change anyway.
6188 mutex_unlock(&il->mutex);
6191 * Receiving all multicast frames is always enabled by the
6192 * default flags setup in il_connection_init_rx_config()
6193 * since we currently do not support programming multicast
6194 * filters into the device.
6197 FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6198 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6201 /*****************************************************************************
6203 * driver setup and teardown
6205 *****************************************************************************/
6208 il4965_bg_txpower_work(struct work_struct *work)
6210 struct il_priv *il = container_of(work, struct il_priv,
6213 mutex_lock(&il->mutex);
6215 /* If a scan happened to start before we got here
6216 * then just return; the stats notification will
6217 * kick off another scheduled work to compensate for
6218 * any temperature delta we missed here. */
6219 if (test_bit(S_EXIT_PENDING, &il->status) ||
6220 test_bit(S_SCANNING, &il->status))
6223 /* Regardless of if we are associated, we must reconfigure the
6224 * TX power since frames can be sent on non-radar channels while
6226 il->ops->send_tx_power(il);
6228 /* Update last_temperature to keep is_calib_needed from running
6229 * when it isn't needed... */
6230 il->last_temperature = il->temperature;
6232 mutex_unlock(&il->mutex);
6236 il4965_setup_deferred_work(struct il_priv *il)
6238 il->workqueue = create_singlethread_workqueue(DRV_NAME);
6240 init_waitqueue_head(&il->wait_command_queue);
6242 INIT_WORK(&il->restart, il4965_bg_restart);
6243 INIT_WORK(&il->rx_replenish, il4965_bg_rx_replenish);
6244 INIT_WORK(&il->run_time_calib_work, il4965_bg_run_time_calib_work);
6245 INIT_DELAYED_WORK(&il->init_alive_start, il4965_bg_init_alive_start);
6246 INIT_DELAYED_WORK(&il->alive_start, il4965_bg_alive_start);
6248 il_setup_scan_deferred_work(il);
6250 INIT_WORK(&il->txpower_work, il4965_bg_txpower_work);
6252 init_timer(&il->stats_periodic);
6253 il->stats_periodic.data = (unsigned long)il;
6254 il->stats_periodic.function = il4965_bg_stats_periodic;
6256 init_timer(&il->watchdog);
6257 il->watchdog.data = (unsigned long)il;
6258 il->watchdog.function = il_bg_watchdog;
6260 tasklet_init(&il->irq_tasklet,
6261 (void (*)(unsigned long))il4965_irq_tasklet,
6266 il4965_cancel_deferred_work(struct il_priv *il)
6268 cancel_work_sync(&il->txpower_work);
6269 cancel_delayed_work_sync(&il->init_alive_start);
6270 cancel_delayed_work(&il->alive_start);
6271 cancel_work_sync(&il->run_time_calib_work);
6273 il_cancel_scan_deferred_work(il);
6275 del_timer_sync(&il->stats_periodic);
6279 il4965_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
6283 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
6284 rates[i].bitrate = il_rates[i].ieee * 5;
6285 rates[i].hw_value = i; /* Rate scaling will work on idxes */
6286 rates[i].hw_value_short = i;
6288 if ((i >= IL_FIRST_CCK_RATE) && (i <= IL_LAST_CCK_RATE)) {
6290 * If CCK != 1M then set short preamble rate flag.
6293 (il_rates[i].plcp ==
6294 RATE_1M_PLCP) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
6300 * Acquire il->lock before calling this function !
6303 il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx)
6305 il_wr(il, HBUS_TARG_WRPTR, (idx & 0xff) | (txq_id << 8));
6306 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), idx);
6310 il4965_tx_queue_set_status(struct il_priv *il, struct il_tx_queue *txq,
6311 int tx_fifo_id, int scd_retry)
6313 int txq_id = txq->q.id;
6315 /* Find out whether to activate Tx queue */
6316 int active = test_bit(txq_id, &il->txq_ctx_active_msk) ? 1 : 0;
6318 /* Set up and activate */
6319 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id),
6320 (active << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
6321 (tx_fifo_id << IL49_SCD_QUEUE_STTS_REG_POS_TXF) |
6322 (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_WSL) |
6323 (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
6324 IL49_SCD_QUEUE_STTS_REG_MSK);
6326 txq->sched_retry = scd_retry;
6328 D_INFO("%s %s Queue %d on AC %d\n", active ? "Activate" : "Deactivate",
6329 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
6332 static const struct ieee80211_ops il4965_mac_ops = {
6333 .tx = il4965_mac_tx,
6334 .start = il4965_mac_start,
6335 .stop = il4965_mac_stop,
6336 .add_interface = il_mac_add_interface,
6337 .remove_interface = il_mac_remove_interface,
6338 .change_interface = il_mac_change_interface,
6339 .config = il_mac_config,
6340 .configure_filter = il4965_configure_filter,
6341 .set_key = il4965_mac_set_key,
6342 .update_tkip_key = il4965_mac_update_tkip_key,
6343 .conf_tx = il_mac_conf_tx,
6344 .reset_tsf = il_mac_reset_tsf,
6345 .bss_info_changed = il_mac_bss_info_changed,
6346 .ampdu_action = il4965_mac_ampdu_action,
6347 .hw_scan = il_mac_hw_scan,
6348 .sta_add = il4965_mac_sta_add,
6349 .sta_remove = il_mac_sta_remove,
6350 .channel_switch = il4965_mac_channel_switch,
6351 .tx_last_beacon = il_mac_tx_last_beacon,
6352 .flush = il_mac_flush,
6356 il4965_init_drv(struct il_priv *il)
6360 spin_lock_init(&il->sta_lock);
6361 spin_lock_init(&il->hcmd_lock);
6363 INIT_LIST_HEAD(&il->free_frames);
6365 mutex_init(&il->mutex);
6367 il->ieee_channels = NULL;
6368 il->ieee_rates = NULL;
6369 il->band = IEEE80211_BAND_2GHZ;
6371 il->iw_mode = NL80211_IFTYPE_STATION;
6372 il->current_ht_config.smps = IEEE80211_SMPS_STATIC;
6373 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
6375 /* initialize force reset */
6376 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
6378 /* Choose which receivers/antennas to use */
6379 if (il->ops->set_rxon_chain)
6380 il->ops->set_rxon_chain(il);
6382 il_init_scan_params(il);
6384 ret = il_init_channel_map(il);
6386 IL_ERR("initializing regulatory failed: %d\n", ret);
6390 ret = il_init_geos(il);
6392 IL_ERR("initializing geos failed: %d\n", ret);
6393 goto err_free_channel_map;
6395 il4965_init_hw_rates(il, il->ieee_rates);
6399 err_free_channel_map:
6400 il_free_channel_map(il);
6406 il4965_uninit_drv(struct il_priv *il)
6409 il_free_channel_map(il);
6410 kfree(il->scan_cmd);
6414 il4965_hw_detect(struct il_priv *il)
6416 il->hw_rev = _il_rd(il, CSR_HW_REV);
6417 il->hw_wa_rev = _il_rd(il, CSR_HW_REV_WA_REG);
6418 il->rev_id = il->pci_dev->revision;
6419 D_INFO("HW Revision ID = 0x%X\n", il->rev_id);
6422 static struct il_sensitivity_ranges il4965_sensitivity = {
6424 .max_nrg_cck = 0, /* not used, set to 0 */
6426 .auto_corr_min_ofdm = 85,
6427 .auto_corr_min_ofdm_mrc = 170,
6428 .auto_corr_min_ofdm_x1 = 105,
6429 .auto_corr_min_ofdm_mrc_x1 = 220,
6431 .auto_corr_max_ofdm = 120,
6432 .auto_corr_max_ofdm_mrc = 210,
6433 .auto_corr_max_ofdm_x1 = 140,
6434 .auto_corr_max_ofdm_mrc_x1 = 270,
6436 .auto_corr_min_cck = 125,
6437 .auto_corr_max_cck = 200,
6438 .auto_corr_min_cck_mrc = 200,
6439 .auto_corr_max_cck_mrc = 400,
6444 .barker_corr_th_min = 190,
6445 .barker_corr_th_min_mrc = 390,
6450 il4965_set_hw_params(struct il_priv *il)
6452 il->hw_params.bcast_id = IL4965_BROADCAST_ID;
6453 il->hw_params.max_rxq_size = RX_QUEUE_SIZE;
6454 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
6455 if (il->cfg->mod_params->amsdu_size_8K)
6456 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_8K);
6458 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_4K);
6460 il->hw_params.max_beacon_itrvl = IL_MAX_UCODE_BEACON_INTERVAL;
6462 if (il->cfg->mod_params->disable_11n)
6463 il->cfg->sku &= ~IL_SKU_N;
6465 if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES &&
6466 il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES)
6467 il->cfg->num_of_queues =
6468 il->cfg->mod_params->num_of_queues;
6470 il->hw_params.max_txq_num = il->cfg->num_of_queues;
6471 il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
6472 il->hw_params.scd_bc_tbls_size =
6473 il->cfg->num_of_queues *
6474 sizeof(struct il4965_scd_bc_tbl);
6476 il->hw_params.tfd_size = sizeof(struct il_tfd);
6477 il->hw_params.max_stations = IL4965_STATION_COUNT;
6478 il->hw_params.max_data_size = IL49_RTC_DATA_SIZE;
6479 il->hw_params.max_inst_size = IL49_RTC_INST_SIZE;
6480 il->hw_params.max_bsm_size = BSM_SRAM_SIZE;
6481 il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
6483 il->hw_params.rx_wrt_ptr_reg = FH49_RSCSR_CHNL0_WPTR;
6485 il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant);
6486 il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant);
6487 il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant;
6488 il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant;
6490 il->hw_params.ct_kill_threshold =
6491 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
6493 il->hw_params.sens = &il4965_sensitivity;
6494 il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS;
6498 il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6502 struct ieee80211_hw *hw;
6503 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
6504 unsigned long flags;
6507 /************************
6508 * 1. Allocating HW data
6509 ************************/
6511 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il4965_mac_ops);
6518 SET_IEEE80211_DEV(hw, &pdev->dev);
6520 D_INFO("*** LOAD DRIVER ***\n");
6522 il->ops = &il4965_ops;
6523 #ifdef CONFIG_IWLEGACY_DEBUGFS
6524 il->debugfs_ops = &il4965_debugfs_ops;
6527 il->inta_mask = CSR_INI_SET_MASK;
6529 /**************************
6530 * 2. Initializing PCI bus
6531 **************************/
6532 pci_disable_link_state(pdev,
6533 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
6534 PCIE_LINK_STATE_CLKPM);
6536 if (pci_enable_device(pdev)) {
6538 goto out_ieee80211_free_hw;
6541 pci_set_master(pdev);
6543 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
6545 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
6547 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6550 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6551 /* both attempts failed: */
6553 IL_WARN("No suitable DMA available.\n");
6554 goto out_pci_disable_device;
6558 err = pci_request_regions(pdev, DRV_NAME);
6560 goto out_pci_disable_device;
6562 pci_set_drvdata(pdev, il);
6564 /***********************
6565 * 3. Read REV register
6566 ***********************/
6567 il->hw_base = pci_ioremap_bar(pdev, 0);
6570 goto out_pci_release_regions;
6573 D_INFO("pci_resource_len = 0x%08llx\n",
6574 (unsigned long long)pci_resource_len(pdev, 0));
6575 D_INFO("pci_resource_base = %p\n", il->hw_base);
6577 /* these spin locks will be used in apm_ops.init and EEPROM access
6578 * we should init now
6580 spin_lock_init(&il->reg_lock);
6581 spin_lock_init(&il->lock);
6584 * stop and reset the on-board processor just in case it is in a
6585 * strange state ... like being left stranded by a primary kernel
6586 * and this is now the kdump kernel trying to start up
6588 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6590 il4965_hw_detect(il);
6591 IL_INFO("Detected %s, REV=0x%X\n", il->cfg->name, il->hw_rev);
6593 /* We disable the RETRY_TIMEOUT register (0x41) to keep
6594 * PCI Tx retries from interfering with C3 CPU state */
6595 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
6597 il4965_prepare_card_hw(il);
6598 if (!il->hw_ready) {
6599 IL_WARN("Failed, HW not ready\n");
6607 /* Read the EEPROM */
6608 err = il_eeprom_init(il);
6610 IL_ERR("Unable to init EEPROM\n");
6613 err = il4965_eeprom_check_version(il);
6615 goto out_free_eeprom;
6617 /* extract MAC Address */
6618 il4965_eeprom_get_mac(il, il->addresses[0].addr);
6619 D_INFO("MAC address: %pM\n", il->addresses[0].addr);
6620 il->hw->wiphy->addresses = il->addresses;
6621 il->hw->wiphy->n_addresses = 1;
6623 /************************
6624 * 5. Setup HW constants
6625 ************************/
6626 il4965_set_hw_params(il);
6628 /*******************
6630 *******************/
6632 err = il4965_init_drv(il);
6634 goto out_free_eeprom;
6635 /* At this point both hw and il are initialized. */
6637 /********************
6639 ********************/
6640 spin_lock_irqsave(&il->lock, flags);
6641 il_disable_interrupts(il);
6642 spin_unlock_irqrestore(&il->lock, flags);
6644 pci_enable_msi(il->pci_dev);
6646 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
6648 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
6649 goto out_disable_msi;
6652 il4965_setup_deferred_work(il);
6653 il4965_setup_handlers(il);
6655 /*********************************************
6656 * 8. Enable interrupts and read RFKILL state
6657 *********************************************/
6659 /* enable rfkill interrupt: hw bug w/a */
6660 pci_read_config_word(il->pci_dev, PCI_COMMAND, &pci_cmd);
6661 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
6662 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
6663 pci_write_config_word(il->pci_dev, PCI_COMMAND, pci_cmd);
6666 il_enable_rfkill_int(il);
6668 /* If platform's RF_KILL switch is NOT set to KILL */
6669 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6670 clear_bit(S_RFKILL, &il->status);
6672 set_bit(S_RFKILL, &il->status);
6674 wiphy_rfkill_set_hw_state(il->hw->wiphy,
6675 test_bit(S_RFKILL, &il->status));
6677 il_power_initialize(il);
6679 init_completion(&il->_4965.firmware_loading_complete);
6681 err = il4965_request_firmware(il, true);
6683 goto out_destroy_workqueue;
6687 out_destroy_workqueue:
6688 destroy_workqueue(il->workqueue);
6689 il->workqueue = NULL;
6690 free_irq(il->pci_dev->irq, il);
6692 pci_disable_msi(il->pci_dev);
6693 il4965_uninit_drv(il);
6697 iounmap(il->hw_base);
6698 out_pci_release_regions:
6699 pci_release_regions(pdev);
6700 out_pci_disable_device:
6701 pci_disable_device(pdev);
6702 out_ieee80211_free_hw:
6703 ieee80211_free_hw(il->hw);
6709 il4965_pci_remove(struct pci_dev *pdev)
6711 struct il_priv *il = pci_get_drvdata(pdev);
6712 unsigned long flags;
6717 wait_for_completion(&il->_4965.firmware_loading_complete);
6719 D_INFO("*** UNLOAD DRIVER ***\n");
6721 il_dbgfs_unregister(il);
6722 sysfs_remove_group(&pdev->dev.kobj, &il_attribute_group);
6724 /* ieee80211_unregister_hw call wil cause il_mac_stop to
6725 * to be called and il4965_down since we are removing the device
6726 * we need to set S_EXIT_PENDING bit.
6728 set_bit(S_EXIT_PENDING, &il->status);
6732 if (il->mac80211_registered) {
6733 ieee80211_unregister_hw(il->hw);
6734 il->mac80211_registered = 0;
6740 * Make sure device is reset to low power before unloading driver.
6741 * This may be redundant with il4965_down(), but there are paths to
6742 * run il4965_down() without calling apm_ops.stop(), and there are
6743 * paths to avoid running il4965_down() at all before leaving driver.
6744 * This (inexpensive) call *makes sure* device is reset.
6748 /* make sure we flush any pending irq or
6749 * tasklet for the driver
6751 spin_lock_irqsave(&il->lock, flags);
6752 il_disable_interrupts(il);
6753 spin_unlock_irqrestore(&il->lock, flags);
6755 il4965_synchronize_irq(il);
6757 il4965_dealloc_ucode_pci(il);
6760 il4965_rx_queue_free(il, &il->rxq);
6761 il4965_hw_txq_ctx_free(il);
6765 /*netif_stop_queue(dev); */
6766 flush_workqueue(il->workqueue);
6768 /* ieee80211_unregister_hw calls il_mac_stop, which flushes
6769 * il->workqueue... so we can't take down the workqueue
6771 destroy_workqueue(il->workqueue);
6772 il->workqueue = NULL;
6774 free_irq(il->pci_dev->irq, il);
6775 pci_disable_msi(il->pci_dev);
6776 iounmap(il->hw_base);
6777 pci_release_regions(pdev);
6778 pci_disable_device(pdev);
6780 il4965_uninit_drv(il);
6782 dev_kfree_skb(il->beacon_skb);
6784 ieee80211_free_hw(il->hw);
6788 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
6789 * must be called under il->lock and mac access
6792 il4965_txq_set_sched(struct il_priv *il, u32 mask)
6794 il_wr_prph(il, IL49_SCD_TXFACT, mask);
6797 /*****************************************************************************
6799 * driver and module entry point
6801 *****************************************************************************/
6803 /* Hardware specific file defines the PCI IDs table for that hardware module */
6804 static DEFINE_PCI_DEVICE_TABLE(il4965_hw_card_ids) = {
6805 {IL_PCI_DEVICE(0x4229, PCI_ANY_ID, il4965_cfg)},
6806 {IL_PCI_DEVICE(0x4230, PCI_ANY_ID, il4965_cfg)},
6809 MODULE_DEVICE_TABLE(pci, il4965_hw_card_ids);
6811 static struct pci_driver il4965_driver = {
6813 .id_table = il4965_hw_card_ids,
6814 .probe = il4965_pci_probe,
6815 .remove = il4965_pci_remove,
6816 .driver.pm = IL_LEGACY_PM_OPS,
6824 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
6825 pr_info(DRV_COPYRIGHT "\n");
6827 ret = il4965_rate_control_register();
6829 pr_err("Unable to register rate control algorithm: %d\n", ret);
6833 ret = pci_register_driver(&il4965_driver);
6835 pr_err("Unable to initialize PCI module\n");
6836 goto error_register;
6842 il4965_rate_control_unregister();
6849 pci_unregister_driver(&il4965_driver);
6850 il4965_rate_control_unregister();
6853 module_exit(il4965_exit);
6854 module_init(il4965_init);
6856 #ifdef CONFIG_IWLEGACY_DEBUG
6857 module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
6858 MODULE_PARM_DESC(debug, "debug output mask");
6861 module_param_named(swcrypto, il4965_mod_params.sw_crypto, int, S_IRUGO);
6862 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
6863 module_param_named(queues_num, il4965_mod_params.num_of_queues, int, S_IRUGO);
6864 MODULE_PARM_DESC(queues_num, "number of hw queues.");
6865 module_param_named(11n_disable, il4965_mod_params.disable_11n, int, S_IRUGO);
6866 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
6867 module_param_named(amsdu_size_8K, il4965_mod_params.amsdu_size_8K, int,
6869 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
6870 module_param_named(fw_restart, il4965_mod_params.restart_fw, int, S_IRUGO);
6871 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");