drivers/net/wireless/iwlegacy/4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/sched.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "common.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-sta.h"
  46 #include "4965.h"
  47
  48 #define IL_AC_UNSET -1
  49
  50 /**
  51  * il_verify_inst_sparse - verify runtime uCode image in card vs. host,
  52  *   using sample data 100 bytes apart.  If these sample points are good,
  53  *   it's a pretty good bet that everything between them is good, too.
  54  */
  55 static int
  56 il4965_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len)
  57 {
  58         u32 val;
  59         int ret = 0;
  60         u32 errcnt = 0;
  61         u32 i;
  62
  63         D_INFO("ucode inst image size is %u\n", len);
  64
  65         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  66                 /* read data comes through single port, auto-incr addr */
  67                 /* NOTE: Use the debugless read so we don't flood kernel log
  68                  * if IL_DL_IO is set */
  69                 il_wr(il, HBUS_TARG_MEM_RADDR,
  70                         i + IL4965_RTC_INST_LOWER_BOUND);
  71                 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  72                 if (val != le32_to_cpu(*image)) {
  73                         ret = -EIO;
  74                         errcnt++;
  75                         if (errcnt >= 3)
  76                                 break;
  77                 }
  78         }
  79
  80         return ret;
  81 }
  82
  83 /**
  84  * il4965_verify_inst_full - verify runtime uCode image in card vs. host,
  85  *     looking at all data.
  86  */
  87 static int il4965_verify_inst_full(struct il_priv *il, __le32 *image,
  88                                  u32 len)
  89 {
  90         u32 val;
  91         u32 save_len = len;
  92         int ret = 0;
  93         u32 errcnt;
  94
  95         D_INFO("ucode inst image size is %u\n", len);
  96
  97         il_wr(il, HBUS_TARG_MEM_RADDR,
  98                            IL4965_RTC_INST_LOWER_BOUND);
  99
 100         errcnt = 0;
 101         for (; len > 0; len -= sizeof(u32), image++) {
 102                 /* read data comes through single port, auto-incr addr */
 103                 /* NOTE: Use the debugless read so we don't flood kernel log
 104                  * if IL_DL_IO is set */
 105                 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
 106                 if (val != le32_to_cpu(*image)) {
 107                         IL_ERR("uCode INST section is invalid at "
 108                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
 109                                   save_len - len, val, le32_to_cpu(*image));
 110                         ret = -EIO;
 111                         errcnt++;
 112                         if (errcnt >= 20)
 113                                 break;
 114                 }
 115         }
 116
 117         if (!errcnt)
 118                 D_INFO(
 119                     "ucode image in INSTRUCTION memory is good\n");
 120
 121         return ret;
 122 }
 123
 124 /**
 125  * il4965_verify_ucode - determine which instruction image is in SRAM,
 126  *    and verify its contents
 127  */
 128 int il4965_verify_ucode(struct il_priv *il)
 129 {
 130         __le32 *image;
 131         u32 len;
 132         int ret;
 133
 134         /* Try bootstrap */
 135         image = (__le32 *)il->ucode_boot.v_addr;
 136         len = il->ucode_boot.len;
 137         ret = il4965_verify_inst_sparse(il, image, len);
 138         if (!ret) {
 139                 D_INFO("Bootstrap uCode is good in inst SRAM\n");
 140                 return 0;
 141         }
 142
 143         /* Try initialize */
 144         image = (__le32 *)il->ucode_init.v_addr;
 145         len = il->ucode_init.len;
 146         ret = il4965_verify_inst_sparse(il, image, len);
 147         if (!ret) {
 148                 D_INFO("Initialize uCode is good in inst SRAM\n");
 149                 return 0;
 150         }
 151
 152         /* Try runtime/protocol */
 153         image = (__le32 *)il->ucode_code.v_addr;
 154         len = il->ucode_code.len;
 155         ret = il4965_verify_inst_sparse(il, image, len);
 156         if (!ret) {
 157                 D_INFO("Runtime uCode is good in inst SRAM\n");
 158                 return 0;
 159         }
 160
 161         IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
 162
 163         /* Since nothing seems to match, show first several data entries in
 164          * instruction SRAM, so maybe visual inspection will give a clue.
 165          * Selection of bootstrap image (vs. other images) is arbitrary. */
 166         image = (__le32 *)il->ucode_boot.v_addr;
 167         len = il->ucode_boot.len;
 168         ret = il4965_verify_inst_full(il, image, len);
 169
 170         return ret;
 171 }
 172
 173 /******************************************************************************
 174  *
 175  * EEPROM related functions
 176  *
 177 ******************************************************************************/
 178
 179 /*
 180  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 181  * when accessing the EEPROM; each access is a series of pulses to/from the
 182  * EEPROM chip, not a single event, so even reads could conflict if they
 183  * weren't arbitrated by the semaphore.
 184  */
 185 int il4965_eeprom_acquire_semaphore(struct il_priv *il)
 186 {
 187         u16 count;
 188         int ret;
 189
 190         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 191                 /* Request semaphore */
 192                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 193                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 194
 195                 /* See if we got it */
 196                 ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
 197                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 198                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 199                                 EEPROM_SEM_TIMEOUT);
 200                 if (ret >= 0)
 201                         return ret;
 202         }
 203
 204         return ret;
 205 }
 206
 207 void il4965_eeprom_release_semaphore(struct il_priv *il)
 208 {
 209         il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
 210                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 211
 212 }
 213
 214 int il4965_eeprom_check_version(struct il_priv *il)
 215 {
 216         u16 eeprom_ver;
 217         u16 calib_ver;
 218
 219         eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION);
 220         calib_ver = il_eeprom_query16(il,
 221                         EEPROM_4965_CALIB_VERSION_OFFSET);
 222
 223         if (eeprom_ver < il->cfg->eeprom_ver ||
 224             calib_ver < il->cfg->eeprom_calib_ver)
 225                 goto err;
 226
 227         IL_INFO("device EEPROM VER=0x%x, CALIB=0x%x\n",
 228                  eeprom_ver, calib_ver);
 229
 230         return 0;
 231 err:
 232         IL_ERR("Unsupported (too old) EEPROM VER=0x%x < 0x%x "
 233                   "CALIB=0x%x < 0x%x\n",
 234                   eeprom_ver, il->cfg->eeprom_ver,
 235                   calib_ver,  il->cfg->eeprom_calib_ver);
 236         return -EINVAL;
 237
 238 }
 239
 240 void il4965_eeprom_get_mac(const struct il_priv *il, u8 *mac)
 241 {
 242         const u8 *addr = il_eeprom_query_addr(il,
 243                                         EEPROM_MAC_ADDRESS);
 244         memcpy(mac, addr, ETH_ALEN);
 245 }
 246
 247 /* Send led command */
 248 static int
 249 il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
 250 {
 251         struct il_host_cmd cmd = {
 252                 .id = C_LEDS,
 253                 .len = sizeof(struct il_led_cmd),
 254                 .data = led_cmd,
 255                 .flags = CMD_ASYNC,
 256                 .callback = NULL,
 257         };
 258         u32 reg;
 259
 260         reg = _il_rd(il, CSR_LED_REG);
 261         if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
 262                 _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
 263
 264         return il_send_cmd(il, &cmd);
 265 }
 266
 267 /* Set led register off */
 268 void il4965_led_enable(struct il_priv *il)
 269 {
 270         _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
 271 }
 272
 273 const struct il_led_ops il4965_led_ops = {
 274         .cmd = il4965_send_led_cmd,
 275 };
 276
 277 static int il4965_send_tx_power(struct il_priv *il);
 278 static int il4965_hw_get_temperature(struct il_priv *il);
 279
 280 /* Highest firmware API version supported */
 281 #define IL4965_UCODE_API_MAX 2
 282
 283 /* Lowest firmware API version supported */
 284 #define IL4965_UCODE_API_MIN 2
 285
 286 #define IL4965_FW_PRE "iwlwifi-4965-"
 287 #define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode"
 288 #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api)
 289
 290 /* check contents of special bootstrap uCode SRAM */
 291 static int il4965_verify_bsm(struct il_priv *il)
 292 {
 293         __le32 *image = il->ucode_boot.v_addr;
 294         u32 len = il->ucode_boot.len;
 295         u32 reg;
 296         u32 val;
 297
 298         D_INFO("Begin verify bsm\n");
 299
 300         /* verify BSM SRAM contents */
 301         val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
 302         for (reg = BSM_SRAM_LOWER_BOUND;
 303              reg < BSM_SRAM_LOWER_BOUND + len;
 304              reg += sizeof(u32), image++) {
 305                 val = il_rd_prph(il, reg);
 306                 if (val != le32_to_cpu(*image)) {
 307                         IL_ERR("BSM uCode verification failed at "
 308                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
 309                                   BSM_SRAM_LOWER_BOUND,
 310                                   reg - BSM_SRAM_LOWER_BOUND, len,
 311                                   val, le32_to_cpu(*image));
 312                         return -EIO;
 313                 }
 314         }
 315
 316         D_INFO("BSM bootstrap uCode image OK\n");
 317
 318         return 0;
 319 }
 320
 321 /**
 322  * il4965_load_bsm - Load bootstrap instructions
 323  *
 324  * BSM operation:
 325  *
 326  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 327  * in special SRAM that does not power down during RFKILL.  When powering back
 328  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 329  * the bootstrap program into the on-board processor, and starts it.
 330  *
 331  * The bootstrap program loads (via DMA) instructions and data for a new
 332  * program from host DRAM locations indicated by the host driver in the
 333  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 334  * automatically.
 335  *
 336  * When initializing the NIC, the host driver points the BSM to the
 337  * "initialize" uCode image.  This uCode sets up some internal data, then
 338  * notifies host via "initialize alive" that it is complete.
 339  *
 340  * The host then replaces the BSM_DRAM_* pointer values to point to the
 341  * normal runtime uCode instructions and a backup uCode data cache buffer
 342  * (filled initially with starting data values for the on-board processor),
 343  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 344  * which begins normal operation.
 345  *
 346  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 347  * the backup data cache in DRAM before SRAM is powered down.
 348  *
 349  * When powering back up, the BSM loads the bootstrap program.  This reloads
 350  * the runtime uCode instructions and the backup data cache into SRAM,
 351  * and re-launches the runtime uCode from where it left off.
 352  */
 353 static int il4965_load_bsm(struct il_priv *il)
 354 {
 355         __le32 *image = il->ucode_boot.v_addr;
 356         u32 len = il->ucode_boot.len;
 357         dma_addr_t pinst;
 358         dma_addr_t pdata;
 359         u32 inst_len;
 360         u32 data_len;
 361         int i;
 362         u32 done;
 363         u32 reg_offset;
 364         int ret;
 365
 366         D_INFO("Begin load bsm\n");
 367
 368         il->ucode_type = UCODE_RT;
 369
 370         /* make sure bootstrap program is no larger than BSM's SRAM size */
 371         if (len > IL49_MAX_BSM_SIZE)
 372                 return -EINVAL;
 373
 374         /* Tell bootstrap uCode where to find the "Initialize" uCode
 375          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 376          * NOTE:  il_init_alive_start() will replace these values,
 377          *        after the "initialize" uCode has run, to point to
 378          *        runtime/protocol instructions and backup data cache.
 379          */
 380         pinst = il->ucode_init.p_addr >> 4;
 381         pdata = il->ucode_init_data.p_addr >> 4;
 382         inst_len = il->ucode_init.len;
 383         data_len = il->ucode_init_data.len;
 384
 385         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
 386         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
 387         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 388         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 389
 390         /* Fill BSM memory with bootstrap instructions */
 391         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 392              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 393              reg_offset += sizeof(u32), image++)
 394                 _il_wr_prph(il, reg_offset, le32_to_cpu(*image));
 395
 396         ret = il4965_verify_bsm(il);
 397         if (ret)
 398                 return ret;
 399
 400         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 401         il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
 402         il_wr_prph(il,
 403                         BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND);
 404         il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 405
 406         /* Load bootstrap code into instruction SRAM now,
 407          *   to prepare to load "initialize" uCode */
 408         il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 409
 410         /* Wait for load of bootstrap uCode to finish */
 411         for (i = 0; i < 100; i++) {
 412                 done = il_rd_prph(il, BSM_WR_CTRL_REG);
 413                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 414                         break;
 415                 udelay(10);
 416         }
 417         if (i < 100)
 418                 D_INFO("BSM write complete, poll %d iterations\n", i);
 419         else {
 420                 IL_ERR("BSM write did not complete!\n");
 421                 return -EIO;
 422         }
 423
 424         /* Enable future boot loads whenever power management unit triggers it
 425          *   (e.g. when powering back up after power-save shutdown) */
 426         il_wr_prph(il,
 427                         BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 428
 429
 430         return 0;
 431 }
 432
 433 /**
 434  * il4965_set_ucode_ptrs - Set uCode address location
 435  *
 436  * Tell initialization uCode where to find runtime uCode.
 437  *
 438  * BSM registers initially contain pointers to initialization uCode.
 439  * We need to replace them to load runtime uCode inst and data,
 440  * and to save runtime data when powering down.
 441  */
 442 static int il4965_set_ucode_ptrs(struct il_priv *il)
 443 {
 444         dma_addr_t pinst;
 445         dma_addr_t pdata;
 446         int ret = 0;
 447
 448         /* bits 35:4 for 4965 */
 449         pinst = il->ucode_code.p_addr >> 4;
 450         pdata = il->ucode_data_backup.p_addr >> 4;
 451
 452         /* Tell bootstrap uCode where to find image to load */
 453         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
 454         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
 455         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG,
 456                                  il->ucode_data.len);
 457
 458         /* Inst byte count must be last to set up, bit 31 signals uCode
 459          *   that all new ptr/size info is in place */
 460         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
 461                                  il->ucode_code.len | BSM_DRAM_INST_LOAD);
 462         D_INFO("Runtime uCode pointers are set.\n");
 463
 464         return ret;
 465 }
 466
 467 /**
 468  * il4965_init_alive_start - Called after N_ALIVE notification received
 469  *
 470  * Called after N_ALIVE notification received from "initialize" uCode.
 471  *
 472  * The 4965 "initialize" ALIVE reply contains calibration data for:
 473  *   Voltage, temperature, and MIMO tx gain correction, now stored in il
 474  *   (3945 does not contain this data).
 475  *
 476  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 477 */
 478 static void il4965_init_alive_start(struct il_priv *il)
 479 {
 480         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 481          * This is a paranoid check, because we would not have gotten the
 482          * "initialize" alive if code weren't properly loaded.  */
 483         if (il4965_verify_ucode(il)) {
 484                 /* Runtime instruction load was bad;
 485                  * take it all the way back down so we can try again */
 486                 D_INFO("Bad \"initialize\" uCode load.\n");
 487                 goto restart;
 488         }
 489
 490         /* Calculate temperature */
 491         il->temperature = il4965_hw_get_temperature(il);
 492
 493         /* Send pointers to protocol/runtime uCode image ... init code will
 494          * load and launch runtime uCode, which will send us another "Alive"
 495          * notification. */
 496         D_INFO("Initialization Alive received.\n");
 497         if (il4965_set_ucode_ptrs(il)) {
 498                 /* Runtime instruction load won't happen;
 499                  * take it all the way back down so we can try again */
 500                 D_INFO("Couldn't set up uCode pointers.\n");
 501                 goto restart;
 502         }
 503         return;
 504
 505 restart:
 506         queue_work(il->workqueue, &il->restart);
 507 }
 508
 509 static bool iw4965_is_ht40_channel(__le32 rxon_flags)
 510 {
 511         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
 512                                     >> RXON_FLG_CHANNEL_MODE_POS;
 513         return (chan_mod == CHANNEL_MODE_PURE_40 ||
 514                 chan_mod == CHANNEL_MODE_MIXED);
 515 }
 516
 517 static void il4965_nic_config(struct il_priv *il)
 518 {
 519         unsigned long flags;
 520         u16 radio_cfg;
 521
 522         spin_lock_irqsave(&il->lock, flags);
 523
 524         radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG);
 525
 526         /* write radio config values to register */
 527         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 528                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 529                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 530                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 531                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 532
 533         /* set CSR_HW_CONFIG_REG for uCode use */
 534         il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 535                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 536                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 537
 538         il->calib_info = (struct il_eeprom_calib_info *)
 539                 il_eeprom_query_addr(il,
 540                                 EEPROM_4965_CALIB_TXPOWER_OFFSET);
 541
 542         spin_unlock_irqrestore(&il->lock, flags);
 543 }
 544
 545 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 546  * Called after every association, but this runs only once!
 547  *  ... once chain noise is calibrated the first time, it's good forever.  */
 548 static void il4965_chain_noise_reset(struct il_priv *il)
 549 {
 550         struct il_chain_noise_data *data = &(il->chain_noise_data);
 551
 552         if (data->state == IL_CHAIN_NOISE_ALIVE &&
 553             il_is_any_associated(il)) {
 554                 struct il_calib_diff_gain_cmd cmd;
 555
 556                 /* clear data for chain noise calibration algorithm */
 557                 data->chain_noise_a = 0;
 558                 data->chain_noise_b = 0;
 559                 data->chain_noise_c = 0;
 560                 data->chain_signal_a = 0;
 561                 data->chain_signal_b = 0;
 562                 data->chain_signal_c = 0;
 563                 data->beacon_count = 0;
 564
 565                 memset(&cmd, 0, sizeof(cmd));
 566                 cmd.hdr.op_code = IL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 567                 cmd.diff_gain_a = 0;
 568                 cmd.diff_gain_b = 0;
 569                 cmd.diff_gain_c = 0;
 570                 if (il_send_cmd_pdu(il, C_PHY_CALIBRATION,
 571                                  sizeof(cmd), &cmd))
 572                         IL_ERR(
 573                                 "Could not send C_PHY_CALIBRATION\n");
 574                 data->state = IL_CHAIN_NOISE_ACCUMULATE;
 575                 D_CALIB("Run chain_noise_calibrate\n");
 576         }
 577 }
 578
 579 static struct il_sensitivity_ranges il4965_sensitivity = {
 580         .min_nrg_cck = 97,
 581         .max_nrg_cck = 0, /* not used, set to 0 */
 582
 583         .auto_corr_min_ofdm = 85,
 584         .auto_corr_min_ofdm_mrc = 170,
 585         .auto_corr_min_ofdm_x1 = 105,
 586         .auto_corr_min_ofdm_mrc_x1 = 220,
 587
 588         .auto_corr_max_ofdm = 120,
 589         .auto_corr_max_ofdm_mrc = 210,
 590         .auto_corr_max_ofdm_x1 = 140,
 591         .auto_corr_max_ofdm_mrc_x1 = 270,
 592
 593         .auto_corr_min_cck = 125,
 594         .auto_corr_max_cck = 200,
 595         .auto_corr_min_cck_mrc = 200,
 596         .auto_corr_max_cck_mrc = 400,
 597
 598         .nrg_th_cck = 100,
 599         .nrg_th_ofdm = 100,
 600
 601         .barker_corr_th_min = 190,
 602         .barker_corr_th_min_mrc = 390,
 603         .nrg_th_cca = 62,
 604 };
 605
 606 static void il4965_set_ct_threshold(struct il_priv *il)
 607 {
 608         /* want Kelvin */
 609         il->hw_params.ct_kill_threshold =
 610                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
 611 }
 612
 613 /**
 614  * il4965_hw_set_hw_params
 615  *
 616  * Called when initializing driver
 617  */
 618 static int il4965_hw_set_hw_params(struct il_priv *il)
 619 {
 620         if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES &&
 621             il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES)
 622                 il->cfg->base_params->num_of_queues =
 623                         il->cfg->mod_params->num_of_queues;
 624
 625         il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues;
 626         il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 627         il->hw_params.scd_bc_tbls_size =
 628                         il->cfg->base_params->num_of_queues *
 629                         sizeof(struct il4965_scd_bc_tbl);
 630         il->hw_params.tfd_size = sizeof(struct il_tfd);
 631         il->hw_params.max_stations = IL4965_STATION_COUNT;
 632         il->ctx.bcast_sta_id = IL4965_BROADCAST_ID;
 633         il->hw_params.max_data_size = IL49_RTC_DATA_SIZE;
 634         il->hw_params.max_inst_size = IL49_RTC_INST_SIZE;
 635         il->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 636         il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
 637
 638         il->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 639
 640         il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant);
 641         il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant);
 642         il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant;
 643         il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant;
 644
 645         il4965_set_ct_threshold(il);
 646
 647         il->hw_params.sens = &il4965_sensitivity;
 648         il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS;
 649
 650         return 0;
 651 }
 652
 653 static s32 il4965_math_div_round(s32 num, s32 denom, s32 *res)
 654 {
 655         s32 sign = 1;
 656
 657         if (num < 0) {
 658                 sign = -sign;
 659                 num = -num;
 660         }
 661         if (denom < 0) {
 662                 sign = -sign;
 663                 denom = -denom;
 664         }
 665         *res = 1;
 666         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 667
 668         return 1;
 669 }
 670
 671 /**
 672  * il4965_get_voltage_compensation - Power supply voltage comp for txpower
 673  *
 674  * Determines power supply voltage compensation for txpower calculations.
 675  * Returns number of 1/2-dB steps to subtract from gain table idx,
 676  * to compensate for difference between power supply voltage during
 677  * factory measurements, vs. current power supply voltage.
 678  *
 679  * Voltage indication is higher for lower voltage.
 680  * Lower voltage requires more gain (lower gain table idx).
 681  */
 682 static s32 il4965_get_voltage_compensation(s32 eeprom_voltage,
 683                                             s32 current_voltage)
 684 {
 685         s32 comp = 0;
 686
 687         if (TX_POWER_IL_ILLEGAL_VOLTAGE == eeprom_voltage ||
 688             TX_POWER_IL_ILLEGAL_VOLTAGE == current_voltage)
 689                 return 0;
 690
 691         il4965_math_div_round(current_voltage - eeprom_voltage,
 692                                TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp);
 693
 694         if (current_voltage > eeprom_voltage)
 695                 comp *= 2;
 696         if ((comp < -2) || (comp > 2))
 697                 comp = 0;
 698
 699         return comp;
 700 }
 701
 702 static s32 il4965_get_tx_atten_grp(u16 channel)
 703 {
 704         if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH &&
 705             channel <= CALIB_IL_TX_ATTEN_GR5_LCH)
 706                 return CALIB_CH_GROUP_5;
 707
 708         if (channel >= CALIB_IL_TX_ATTEN_GR1_FCH &&
 709             channel <= CALIB_IL_TX_ATTEN_GR1_LCH)
 710                 return CALIB_CH_GROUP_1;
 711
 712         if (channel >= CALIB_IL_TX_ATTEN_GR2_FCH &&
 713             channel <= CALIB_IL_TX_ATTEN_GR2_LCH)
 714                 return CALIB_CH_GROUP_2;
 715
 716         if (channel >= CALIB_IL_TX_ATTEN_GR3_FCH &&
 717             channel <= CALIB_IL_TX_ATTEN_GR3_LCH)
 718                 return CALIB_CH_GROUP_3;
 719
 720         if (channel >= CALIB_IL_TX_ATTEN_GR4_FCH &&
 721             channel <= CALIB_IL_TX_ATTEN_GR4_LCH)
 722                 return CALIB_CH_GROUP_4;
 723
 724         return -EINVAL;
 725 }
 726
 727 static u32 il4965_get_sub_band(const struct il_priv *il, u32 channel)
 728 {
 729         s32 b = -1;
 730
 731         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 732                 if (il->calib_info->band_info[b].ch_from == 0)
 733                         continue;
 734
 735                 if (channel >= il->calib_info->band_info[b].ch_from &&
 736                     channel <= il->calib_info->band_info[b].ch_to)
 737                         break;
 738         }
 739
 740         return b;
 741 }
 742
 743 static s32 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 744 {
 745         s32 val;
 746
 747         if (x2 == x1)
 748                 return y1;
 749         else {
 750                 il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 751                 return val + y2;
 752         }
 753 }
 754
 755 /**
 756  * il4965_interpolate_chan - Interpolate factory measurements for one channel
 757  *
 758  * Interpolates factory measurements from the two sample channels within a
 759  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 760  * differences in channel frequencies, which is proportional to differences
 761  * in channel number.
 762  */
 763 static int il4965_interpolate_chan(struct il_priv *il, u32 channel,
 764                                     struct il_eeprom_calib_ch_info *chan_info)
 765 {
 766         s32 s = -1;
 767         u32 c;
 768         u32 m;
 769         const struct il_eeprom_calib_measure *m1;
 770         const struct il_eeprom_calib_measure *m2;
 771         struct il_eeprom_calib_measure *omeas;
 772         u32 ch_i1;
 773         u32 ch_i2;
 774
 775         s = il4965_get_sub_band(il, channel);
 776         if (s >= EEPROM_TX_POWER_BANDS) {
 777                 IL_ERR("Tx Power can not find channel %d\n", channel);
 778                 return -1;
 779         }
 780
 781         ch_i1 = il->calib_info->band_info[s].ch1.ch_num;
 782         ch_i2 = il->calib_info->band_info[s].ch2.ch_num;
 783         chan_info->ch_num = (u8) channel;
 784
 785         D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
 786                           channel, s, ch_i1, ch_i2);
 787
 788         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 789                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 790                         m1 = &(il->calib_info->band_info[s].ch1.
 791                                measurements[c][m]);
 792                         m2 = &(il->calib_info->band_info[s].ch2.
 793                                measurements[c][m]);
 794                         omeas = &(chan_info->measurements[c][m]);
 795
 796                         omeas->actual_pow =
 797                             (u8) il4965_interpolate_value(channel, ch_i1,
 798                                                            m1->actual_pow,
 799                                                            ch_i2,
 800                                                            m2->actual_pow);
 801                         omeas->gain_idx =
 802                             (u8) il4965_interpolate_value(channel, ch_i1,
 803                                                            m1->gain_idx, ch_i2,
 804                                                            m2->gain_idx);
 805                         omeas->temperature =
 806                             (u8) il4965_interpolate_value(channel, ch_i1,
 807                                                            m1->temperature,
 808                                                            ch_i2,
 809                                                            m2->temperature);
 810                         omeas->pa_det =
 811                             (s8) il4965_interpolate_value(channel, ch_i1,
 812                                                            m1->pa_det, ch_i2,
 813                                                            m2->pa_det);
 814
 815                         D_TXPOWER(
 816                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 817                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 818                         D_TXPOWER(
 819                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 820                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 821                         D_TXPOWER(
 822                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 823                                 m1->pa_det, m2->pa_det, omeas->pa_det);
 824                         D_TXPOWER(
 825                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 826                                 m1->temperature, m2->temperature,
 827                                 omeas->temperature);
 828                 }
 829         }
 830
 831         return 0;
 832 }
 833
 834 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
 835  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
 836 static s32 back_off_table[] = {
 837         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
 838         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
 839         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
 840         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
 841         10                      /* CCK */
 842 };
 843
 844 /* Thermal compensation values for txpower for various frequency ranges ...
 845  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
 846 static struct il4965_txpower_comp_entry {
 847         s32 degrees_per_05db_a;
 848         s32 degrees_per_05db_a_denom;
 849 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
 850         {9, 2},                 /* group 0 5.2, ch  34-43 */
 851         {4, 1},                 /* group 1 5.2, ch  44-70 */
 852         {4, 1},                 /* group 2 5.2, ch  71-124 */
 853         {4, 1},                 /* group 3 5.2, ch 125-200 */
 854         {3, 1}                  /* group 4 2.4, ch   all */
 855 };
 856
 857 static s32 get_min_power_idx(s32 rate_power_idx, u32 band)
 858 {
 859         if (!band) {
 860                 if ((rate_power_idx & 7) <= 4)
 861                         return MIN_TX_GAIN_IDX_52GHZ_EXT;
 862         }
 863         return MIN_TX_GAIN_IDX;
 864 }
 865
 866 struct gain_entry {
 867         u8 dsp;
 868         u8 radio;
 869 };
 870
 871 static const struct gain_entry gain_table[2][108] = {
 872         /* 5.2GHz power gain idx table */
 873         {
 874          {123, 0x3F},           /* highest txpower */
 875          {117, 0x3F},
 876          {110, 0x3F},
 877          {104, 0x3F},
 878          {98, 0x3F},
 879          {110, 0x3E},
 880          {104, 0x3E},
 881          {98, 0x3E},
 882          {110, 0x3D},
 883          {104, 0x3D},
 884          {98, 0x3D},
 885          {110, 0x3C},
 886          {104, 0x3C},
 887          {98, 0x3C},
 888          {110, 0x3B},
 889          {104, 0x3B},
 890          {98, 0x3B},
 891          {110, 0x3A},
 892          {104, 0x3A},
 893          {98, 0x3A},
 894          {110, 0x39},
 895          {104, 0x39},
 896          {98, 0x39},
 897          {110, 0x38},
 898          {104, 0x38},
 899          {98, 0x38},
 900          {110, 0x37},
 901          {104, 0x37},
 902          {98, 0x37},
 903          {110, 0x36},
 904          {104, 0x36},
 905          {98, 0x36},
 906          {110, 0x35},
 907          {104, 0x35},
 908          {98, 0x35},
 909          {110, 0x34},
 910          {104, 0x34},
 911          {98, 0x34},
 912          {110, 0x33},
 913          {104, 0x33},
 914          {98, 0x33},
 915          {110, 0x32},
 916          {104, 0x32},
 917          {98, 0x32},
 918          {110, 0x31},
 919          {104, 0x31},
 920          {98, 0x31},
 921          {110, 0x30},
 922          {104, 0x30},
 923          {98, 0x30},
 924          {110, 0x25},
 925          {104, 0x25},
 926          {98, 0x25},
 927          {110, 0x24},
 928          {104, 0x24},
 929          {98, 0x24},
 930          {110, 0x23},
 931          {104, 0x23},
 932          {98, 0x23},
 933          {110, 0x22},
 934          {104, 0x18},
 935          {98, 0x18},
 936          {110, 0x17},
 937          {104, 0x17},
 938          {98, 0x17},
 939          {110, 0x16},
 940          {104, 0x16},
 941          {98, 0x16},
 942          {110, 0x15},
 943          {104, 0x15},
 944          {98, 0x15},
 945          {110, 0x14},
 946          {104, 0x14},
 947          {98, 0x14},
 948          {110, 0x13},
 949          {104, 0x13},
 950          {98, 0x13},
 951          {110, 0x12},
 952          {104, 0x08},
 953          {98, 0x08},
 954          {110, 0x07},
 955          {104, 0x07},
 956          {98, 0x07},
 957          {110, 0x06},
 958          {104, 0x06},
 959          {98, 0x06},
 960          {110, 0x05},
 961          {104, 0x05},
 962          {98, 0x05},
 963          {110, 0x04},
 964          {104, 0x04},
 965          {98, 0x04},
 966          {110, 0x03},
 967          {104, 0x03},
 968          {98, 0x03},
 969          {110, 0x02},
 970          {104, 0x02},
 971          {98, 0x02},
 972          {110, 0x01},
 973          {104, 0x01},
 974          {98, 0x01},
 975          {110, 0x00},
 976          {104, 0x00},
 977          {98, 0x00},
 978          {93, 0x00},
 979          {88, 0x00},
 980          {83, 0x00},
 981          {78, 0x00},
 982          },
 983         /* 2.4GHz power gain idx table */
 984         {
 985          {110, 0x3f},           /* highest txpower */
 986          {104, 0x3f},
 987          {98, 0x3f},
 988          {110, 0x3e},
 989          {104, 0x3e},
 990          {98, 0x3e},
 991          {110, 0x3d},
 992          {104, 0x3d},
 993          {98, 0x3d},
 994          {110, 0x3c},
 995          {104, 0x3c},
 996          {98, 0x3c},
 997          {110, 0x3b},
 998          {104, 0x3b},
 999          {98, 0x3b},
1000          {110, 0x3a},
1001          {104, 0x3a},
1002          {98, 0x3a},
1003          {110, 0x39},
1004          {104, 0x39},
1005          {98, 0x39},
1006          {110, 0x38},
1007          {104, 0x38},
1008          {98, 0x38},
1009          {110, 0x37},
1010          {104, 0x37},
1011          {98, 0x37},
1012          {110, 0x36},
1013          {104, 0x36},
1014          {98, 0x36},
1015          {110, 0x35},
1016          {104, 0x35},
1017          {98, 0x35},
1018          {110, 0x34},
1019          {104, 0x34},
1020          {98, 0x34},
1021          {110, 0x33},
1022          {104, 0x33},
1023          {98, 0x33},
1024          {110, 0x32},
1025          {104, 0x32},
1026          {98, 0x32},
1027          {110, 0x31},
1028          {104, 0x31},
1029          {98, 0x31},
1030          {110, 0x30},
1031          {104, 0x30},
1032          {98, 0x30},
1033          {110, 0x6},
1034          {104, 0x6},
1035          {98, 0x6},
1036          {110, 0x5},
1037          {104, 0x5},
1038          {98, 0x5},
1039          {110, 0x4},
1040          {104, 0x4},
1041          {98, 0x4},
1042          {110, 0x3},
1043          {104, 0x3},
1044          {98, 0x3},
1045          {110, 0x2},
1046          {104, 0x2},
1047          {98, 0x2},
1048          {110, 0x1},
1049          {104, 0x1},
1050          {98, 0x1},
1051          {110, 0x0},
1052          {104, 0x0},
1053          {98, 0x0},
1054          {97, 0},
1055          {96, 0},
1056          {95, 0},
1057          {94, 0},
1058          {93, 0},
1059          {92, 0},
1060          {91, 0},
1061          {90, 0},
1062          {89, 0},
1063          {88, 0},
1064          {87, 0},
1065          {86, 0},
1066          {85, 0},
1067          {84, 0},
1068          {83, 0},
1069          {82, 0},
1070          {81, 0},
1071          {80, 0},
1072          {79, 0},
1073          {78, 0},
1074          {77, 0},
1075          {76, 0},
1076          {75, 0},
1077          {74, 0},
1078          {73, 0},
1079          {72, 0},
1080          {71, 0},
1081          {70, 0},
1082          {69, 0},
1083          {68, 0},
1084          {67, 0},
1085          {66, 0},
1086          {65, 0},
1087          {64, 0},
1088          {63, 0},
1089          {62, 0},
1090          {61, 0},
1091          {60, 0},
1092          {59, 0},
1093          }
1094 };
1095
1096 static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel,
1097                                     u8 is_ht40, u8 ctrl_chan_high,
1098                                     struct il4965_tx_power_db *tx_power_tbl)
1099 {
1100         u8 saturation_power;
1101         s32 target_power;
1102         s32 user_target_power;
1103         s32 power_limit;
1104         s32 current_temp;
1105         s32 reg_limit;
1106         s32 current_regulatory;
1107         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1108         int i;
1109         int c;
1110         const struct il_channel_info *ch_info = NULL;
1111         struct il_eeprom_calib_ch_info ch_eeprom_info;
1112         const struct il_eeprom_calib_measure *measurement;
1113         s16 voltage;
1114         s32 init_voltage;
1115         s32 voltage_compensation;
1116         s32 degrees_per_05db_num;
1117         s32 degrees_per_05db_denom;
1118         s32 factory_temp;
1119         s32 temperature_comp[2];
1120         s32 factory_gain_idx[2];
1121         s32 factory_actual_pwr[2];
1122         s32 power_idx;
1123
1124         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1125          *   are used for idxing into txpower table) */
1126         user_target_power = 2 * il->tx_power_user_lmt;
1127
1128         /* Get current (RXON) channel, band, width */
1129         D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band,
1130                           is_ht40);
1131
1132         ch_info = il_get_channel_info(il, il->band, channel);
1133
1134         if (!il_is_channel_valid(ch_info))
1135                 return -EINVAL;
1136
1137         /* get txatten group, used to select 1) thermal txpower adjustment
1138          *   and 2) mimo txpower balance between Tx chains. */
1139         txatten_grp = il4965_get_tx_atten_grp(channel);
1140         if (txatten_grp < 0) {
1141                 IL_ERR("Can't find txatten group for channel %d.\n",
1142                           channel);
1143                 return txatten_grp;
1144         }
1145
1146         D_TXPOWER("channel %d belongs to txatten group %d\n",
1147                           channel, txatten_grp);
1148
1149         if (is_ht40) {
1150                 if (ctrl_chan_high)
1151                         channel -= 2;
1152                 else
1153                         channel += 2;
1154         }
1155
1156         /* hardware txpower limits ...
1157          * saturation (clipping distortion) txpowers are in half-dBm */
1158         if (band)
1159                 saturation_power = il->calib_info->saturation_power24;
1160         else
1161                 saturation_power = il->calib_info->saturation_power52;
1162
1163         if (saturation_power < IL_TX_POWER_SATURATION_MIN ||
1164             saturation_power > IL_TX_POWER_SATURATION_MAX) {
1165                 if (band)
1166                         saturation_power = IL_TX_POWER_DEFAULT_SATURATION_24;
1167                 else
1168                         saturation_power = IL_TX_POWER_DEFAULT_SATURATION_52;
1169         }
1170
1171         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1172          *   max_power_avg values are in dBm, convert * 2 */
1173         if (is_ht40)
1174                 reg_limit = ch_info->ht40_max_power_avg * 2;
1175         else
1176                 reg_limit = ch_info->max_power_avg * 2;
1177
1178         if ((reg_limit < IL_TX_POWER_REGULATORY_MIN) ||
1179             (reg_limit > IL_TX_POWER_REGULATORY_MAX)) {
1180                 if (band)
1181                         reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_24;
1182                 else
1183                         reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_52;
1184         }
1185
1186         /* Interpolate txpower calibration values for this channel,
1187          *   based on factory calibration tests on spaced channels. */
1188         il4965_interpolate_chan(il, channel, &ch_eeprom_info);
1189
1190         /* calculate tx gain adjustment based on power supply voltage */
1191         voltage = le16_to_cpu(il->calib_info->voltage);
1192         init_voltage = (s32)le32_to_cpu(il->card_alive_init.voltage);
1193         voltage_compensation =
1194             il4965_get_voltage_compensation(voltage, init_voltage);
1195
1196         D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1197                           init_voltage,
1198                           voltage, voltage_compensation);
1199
1200         /* get current temperature (Celsius) */
1201         current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN);
1202         current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX);
1203         current_temp = KELVIN_TO_CELSIUS(current_temp);
1204
1205         /* select thermal txpower adjustment params, based on channel group
1206          *   (same frequency group used for mimo txatten adjustment) */
1207         degrees_per_05db_num =
1208             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1209         degrees_per_05db_denom =
1210             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1211
1212         /* get per-chain txpower values from factory measurements */
1213         for (c = 0; c < 2; c++) {
1214                 measurement = &ch_eeprom_info.measurements[c][1];
1215
1216                 /* txgain adjustment (in half-dB steps) based on difference
1217                  *   between factory and current temperature */
1218                 factory_temp = measurement->temperature;
1219                 il4965_math_div_round((current_temp - factory_temp) *
1220                                        degrees_per_05db_denom,
1221                                        degrees_per_05db_num,
1222                                        &temperature_comp[c]);
1223
1224                 factory_gain_idx[c] = measurement->gain_idx;
1225                 factory_actual_pwr[c] = measurement->actual_pow;
1226
1227                 D_TXPOWER("chain = %d\n", c);
1228                 D_TXPOWER("fctry tmp %d, "
1229                                   "curr tmp %d, comp %d steps\n",
1230                                   factory_temp, current_temp,
1231                                   temperature_comp[c]);
1232
1233                 D_TXPOWER("fctry idx %d, fctry pwr %d\n",
1234                                   factory_gain_idx[c],
1235                                   factory_actual_pwr[c]);
1236         }
1237
1238         /* for each of 33 bit-rates (including 1 for CCK) */
1239         for (i = 0; i < POWER_TBL_NUM_ENTRIES; i++) {
1240                 u8 is_mimo_rate;
1241                 union il4965_tx_power_dual_stream tx_power;
1242
1243                 /* for mimo, reduce each chain's txpower by half
1244                  * (3dB, 6 steps), so total output power is regulatory
1245                  * compliant. */
1246                 if (i & 0x8) {
1247                         current_regulatory = reg_limit -
1248                             IL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1249                         is_mimo_rate = 1;
1250                 } else {
1251                         current_regulatory = reg_limit;
1252                         is_mimo_rate = 0;
1253                 }
1254
1255                 /* find txpower limit, either hardware or regulatory */
1256                 power_limit = saturation_power - back_off_table[i];
1257                 if (power_limit > current_regulatory)
1258                         power_limit = current_regulatory;
1259
1260                 /* reduce user's txpower request if necessary
1261                  * for this rate on this channel */
1262                 target_power = user_target_power;
1263                 if (target_power > power_limit)
1264                         target_power = power_limit;
1265
1266                 D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1267                                   i, saturation_power - back_off_table[i],
1268                                   current_regulatory, user_target_power,
1269                                   target_power);
1270
1271                 /* for each of 2 Tx chains (radio transmitters) */
1272                 for (c = 0; c < 2; c++) {
1273                         s32 atten_value;
1274
1275                         if (is_mimo_rate)
1276                                 atten_value =
1277                                     (s32)le32_to_cpu(il->card_alive_init.
1278                                     tx_atten[txatten_grp][c]);
1279                         else
1280                                 atten_value = 0;
1281
1282                         /* calculate idx; higher idx means lower txpower */
1283                         power_idx = (u8) (factory_gain_idx[c] -
1284                                             (target_power -
1285                                              factory_actual_pwr[c]) -
1286                                             temperature_comp[c] -
1287                                             voltage_compensation +
1288                                             atten_value);
1289
1290 /*                      D_TXPOWER("calculated txpower idx %d\n",
1291                                                 power_idx); */
1292
1293                         if (power_idx < get_min_power_idx(i, band))
1294                                 power_idx = get_min_power_idx(i, band);
1295
1296                         /* adjust 5 GHz idx to support negative idxes */
1297                         if (!band)
1298                                 power_idx += 9;
1299
1300                         /* CCK, rate 32, reduce txpower for CCK */
1301                         if (i == POWER_TBL_CCK_ENTRY)
1302                                 power_idx +=
1303                                     IL_TX_POWER_CCK_COMPENSATION_C_STEP;
1304
1305                         /* stay within the table! */
1306                         if (power_idx > 107) {
1307                                 IL_WARN("txpower idx %d > 107\n",
1308                                             power_idx);
1309                                 power_idx = 107;
1310                         }
1311                         if (power_idx < 0) {
1312                                 IL_WARN("txpower idx %d < 0\n",
1313                                             power_idx);
1314                                 power_idx = 0;
1315                         }
1316
1317                         /* fill txpower command for this rate/chain */
1318                         tx_power.s.radio_tx_gain[c] =
1319                                 gain_table[band][power_idx].radio;
1320                         tx_power.s.dsp_predis_atten[c] =
1321                                 gain_table[band][power_idx].dsp;
1322
1323                         D_TXPOWER("chain %d mimo %d idx %d "
1324                                           "gain 0x%02x dsp %d\n",
1325                                           c, atten_value, power_idx,
1326                                         tx_power.s.radio_tx_gain[c],
1327                                         tx_power.s.dsp_predis_atten[c]);
1328                 } /* for each chain */
1329
1330                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1331
1332         } /* for each rate */
1333
1334         return 0;
1335 }
1336
1337 /**
1338  * il4965_send_tx_power - Configure the TXPOWER level user limit
1339  *
1340  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1341  * The power limit is taken from il->tx_power_user_lmt.
1342  */
1343 static int il4965_send_tx_power(struct il_priv *il)
1344 {
1345         struct il4965_txpowertable_cmd cmd = { 0 };
1346         int ret;
1347         u8 band = 0;
1348         bool is_ht40 = false;
1349         u8 ctrl_chan_high = 0;
1350         struct il_rxon_context *ctx = &il->ctx;
1351
1352         if (WARN_ONCE(test_bit(S_SCAN_HW, &il->status),
1353                       "TX Power requested while scanning!\n"))
1354                 return -EAGAIN;
1355
1356         band = il->band == IEEE80211_BAND_2GHZ;
1357
1358         is_ht40 = iw4965_is_ht40_channel(ctx->active.flags);
1359
1360         if (is_ht40 && (ctx->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1361                 ctrl_chan_high = 1;
1362
1363         cmd.band = band;
1364         cmd.channel = ctx->active.channel;
1365
1366         ret = il4965_fill_txpower_tbl(il, band,
1367                                 le16_to_cpu(ctx->active.channel),
1368                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1369         if (ret)
1370                 goto out;
1371
1372         ret = il_send_cmd_pdu(il,
1373                          C_TX_PWR_TBL, sizeof(cmd), &cmd);
1374
1375 out:
1376         return ret;
1377 }
1378
1379 static int il4965_send_rxon_assoc(struct il_priv *il,
1380                                    struct il_rxon_context *ctx)
1381 {
1382         int ret = 0;
1383         struct il4965_rxon_assoc_cmd rxon_assoc;
1384         const struct il_rxon_cmd *rxon1 = &ctx->staging;
1385         const struct il_rxon_cmd *rxon2 = &ctx->active;
1386
1387         if (rxon1->flags == rxon2->flags &&
1388             rxon1->filter_flags == rxon2->filter_flags &&
1389             rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
1390             rxon1->ofdm_ht_single_stream_basic_rates ==
1391                 rxon2->ofdm_ht_single_stream_basic_rates &&
1392             rxon1->ofdm_ht_dual_stream_basic_rates ==
1393                 rxon2->ofdm_ht_dual_stream_basic_rates &&
1394             rxon1->rx_chain == rxon2->rx_chain &&
1395             rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
1396                 D_INFO("Using current RXON_ASSOC.  Not resending.\n");
1397                 return 0;
1398         }
1399
1400         rxon_assoc.flags = ctx->staging.flags;
1401         rxon_assoc.filter_flags = ctx->staging.filter_flags;
1402         rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
1403         rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
1404         rxon_assoc.reserved = 0;
1405         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1406             ctx->staging.ofdm_ht_single_stream_basic_rates;
1407         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1408             ctx->staging.ofdm_ht_dual_stream_basic_rates;
1409         rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain;
1410
1411         ret = il_send_cmd_pdu_async(il, C_RXON_ASSOC,
1412                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1413
1414         return ret;
1415 }
1416
1417 static int il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx)
1418 {
1419         /* cast away the const for active_rxon in this function */
1420         struct il_rxon_cmd *active_rxon = (void *)&ctx->active;
1421         int ret;
1422         bool new_assoc =
1423                 !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1424
1425         if (!il_is_alive(il))
1426                 return -EBUSY;
1427
1428         if (!ctx->is_active)
1429                 return 0;
1430
1431         /* always get timestamp with Rx frame */
1432         ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1433
1434         ret = il_check_rxon_cmd(il, ctx);
1435         if (ret) {
1436                 IL_ERR("Invalid RXON configuration.  Not committing.\n");
1437                 return -EINVAL;
1438         }
1439
1440         /*
1441          * receive commit_rxon request
1442          * abort any previous channel switch if still in process
1443          */
1444         if (test_bit(S_CHANNEL_SWITCH_PENDING, &il->status) &&
1445             il->switch_channel != ctx->staging.channel) {
1446                 D_11H("abort channel switch on %d\n",
1447                       le16_to_cpu(il->switch_channel));
1448                 il_chswitch_done(il, false);
1449         }
1450
1451         /* If we don't need to send a full RXON, we can use
1452          * il_rxon_assoc_cmd which is used to reconfigure filter
1453          * and other flags for the current radio configuration. */
1454         if (!il_full_rxon_required(il, ctx)) {
1455                 ret = il_send_rxon_assoc(il, ctx);
1456                 if (ret) {
1457                         IL_ERR("Error setting RXON_ASSOC (%d)\n", ret);
1458                         return ret;
1459                 }
1460
1461                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1462                 il_print_rx_config_cmd(il, ctx);
1463                 /*
1464                  * We do not commit tx power settings while channel changing,
1465                  * do it now if tx power changed.
1466                  */
1467                 il_set_tx_power(il, il->tx_power_next, false);
1468                 return 0;
1469         }
1470
1471         /* If we are currently associated and the new config requires
1472          * an RXON_ASSOC and the new config wants the associated mask enabled,
1473          * we must clear the associated from the active configuration
1474          * before we apply the new config */
1475         if (il_is_associated_ctx(ctx) && new_assoc) {
1476                 D_INFO("Toggling associated bit on current RXON\n");
1477                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1478
1479                 ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
1480                                        sizeof(struct il_rxon_cmd),
1481                                        active_rxon);
1482
1483                 /* If the mask clearing failed then we set
1484                  * active_rxon back to what it was previously */
1485                 if (ret) {
1486                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1487                         IL_ERR("Error clearing ASSOC_MSK (%d)\n", ret);
1488                         return ret;
1489                 }
1490                 il_clear_ucode_stations(il, ctx);
1491                 il_restore_stations(il, ctx);
1492                 ret = il4965_restore_default_wep_keys(il, ctx);
1493                 if (ret) {
1494                         IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1495                         return ret;
1496                 }
1497         }
1498
1499         D_INFO("Sending RXON\n"
1500                        "* with%s RXON_FILTER_ASSOC_MSK\n"
1501                        "* channel = %d\n"
1502                        "* bssid = %pM\n",
1503                        (new_assoc ? "" : "out"),
1504                        le16_to_cpu(ctx->staging.channel),
1505                        ctx->staging.bssid_addr);
1506
1507         il_set_rxon_hwcrypto(il, ctx,
1508                                 !il->cfg->mod_params->sw_crypto);
1509
1510         /* Apply the new configuration
1511          * RXON unassoc clears the station table in uCode so restoration of
1512          * stations is needed after it (the RXON command) completes
1513          */
1514         if (!new_assoc) {
1515                 ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
1516                               sizeof(struct il_rxon_cmd), &ctx->staging);
1517                 if (ret) {
1518                         IL_ERR("Error setting new RXON (%d)\n", ret);
1519                         return ret;
1520                 }
1521                 D_INFO("Return from !new_assoc RXON.\n");
1522                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1523                 il_clear_ucode_stations(il, ctx);
1524                 il_restore_stations(il, ctx);
1525                 ret = il4965_restore_default_wep_keys(il, ctx);
1526                 if (ret) {
1527                         IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1528                         return ret;
1529                 }
1530         }
1531         if (new_assoc) {
1532                 il->start_calib = 0;
1533                 /* Apply the new configuration
1534                  * RXON assoc doesn't clear the station table in uCode,
1535                  */
1536                 ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
1537                               sizeof(struct il_rxon_cmd), &ctx->staging);
1538                 if (ret) {
1539                         IL_ERR("Error setting new RXON (%d)\n", ret);
1540                         return ret;
1541                 }
1542                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1543         }
1544         il_print_rx_config_cmd(il, ctx);
1545
1546         il4965_init_sensitivity(il);
1547
1548         /* If we issue a new RXON command which required a tune then we must
1549          * send a new TXPOWER command or we won't be able to Tx any frames */
1550         ret = il_set_tx_power(il, il->tx_power_next, true);
1551         if (ret) {
1552                 IL_ERR("Error sending TX power (%d)\n", ret);
1553                 return ret;
1554         }
1555
1556         return 0;
1557 }
1558
1559 static int il4965_hw_channel_switch(struct il_priv *il,
1560                                      struct ieee80211_channel_switch *ch_switch)
1561 {
1562         struct il_rxon_context *ctx = &il->ctx;
1563         int rc;
1564         u8 band = 0;
1565         bool is_ht40 = false;
1566         u8 ctrl_chan_high = 0;
1567         struct il4965_channel_switch_cmd cmd;
1568         const struct il_channel_info *ch_info;
1569         u32 switch_time_in_usec, ucode_switch_time;
1570         u16 ch;
1571         u32 tsf_low;
1572         u8 switch_count;
1573         u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
1574         struct ieee80211_vif *vif = ctx->vif;
1575         band = il->band == IEEE80211_BAND_2GHZ;
1576
1577         is_ht40 = iw4965_is_ht40_channel(ctx->staging.flags);
1578
1579         if (is_ht40 &&
1580             (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1581                 ctrl_chan_high = 1;
1582
1583         cmd.band = band;
1584         cmd.expect_beacon = 0;
1585         ch = ch_switch->channel->hw_value;
1586         cmd.channel = cpu_to_le16(ch);
1587         cmd.rxon_flags = ctx->staging.flags;
1588         cmd.rxon_filter_flags = ctx->staging.filter_flags;
1589         switch_count = ch_switch->count;
1590         tsf_low = ch_switch->timestamp & 0x0ffffffff;
1591         /*
1592          * calculate the ucode channel switch time
1593          * adding TSF as one of the factor for when to switch
1594          */
1595         if (il->ucode_beacon_time > tsf_low && beacon_interval) {
1596                 if (switch_count > ((il->ucode_beacon_time - tsf_low) /
1597                     beacon_interval)) {
1598                         switch_count -= (il->ucode_beacon_time -
1599                                 tsf_low) / beacon_interval;
1600                 } else
1601                         switch_count = 0;
1602         }
1603         if (switch_count <= 1)
1604                 cmd.switch_time = cpu_to_le32(il->ucode_beacon_time);
1605         else {
1606                 switch_time_in_usec =
1607                         vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
1608                 ucode_switch_time = il_usecs_to_beacons(il,
1609                                                          switch_time_in_usec,
1610                                                          beacon_interval);
1611                 cmd.switch_time = il_add_beacon_time(il,
1612                                                       il->ucode_beacon_time,
1613                                                       ucode_switch_time,
1614                                                       beacon_interval);
1615         }
1616         D_11H("uCode time for the switch is 0x%x\n",
1617                       cmd.switch_time);
1618         ch_info = il_get_channel_info(il, il->band, ch);
1619         if (ch_info)
1620                 cmd.expect_beacon = il_is_channel_radar(ch_info);
1621         else {
1622                 IL_ERR("invalid channel switch from %u to %u\n",
1623                         ctx->active.channel, ch);
1624                 return -EFAULT;
1625         }
1626
1627         rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40,
1628                                       ctrl_chan_high, &cmd.tx_power);
1629         if (rc) {
1630                 D_11H("error:%d  fill txpower_tbl\n", rc);
1631                 return rc;
1632         }
1633
1634         return il_send_cmd_pdu(il,
1635                          C_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1636 }
1637
1638 /**
1639  * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1640  */
1641 static void il4965_txq_update_byte_cnt_tbl(struct il_priv *il,
1642                                             struct il_tx_queue *txq,
1643                                             u16 byte_cnt)
1644 {
1645         struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr;
1646         int txq_id = txq->q.id;
1647         int write_ptr = txq->q.write_ptr;
1648         int len = byte_cnt + IL_TX_CRC_SIZE + IL_TX_DELIMITER_SIZE;
1649         __le16 bc_ent;
1650
1651         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1652
1653         bc_ent = cpu_to_le16(len & 0xFFF);
1654         /* Set up byte count within first 256 entries */
1655         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1656
1657         /* If within first 64 entries, duplicate at end */
1658         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1659                 scd_bc_tbl[txq_id].
1660                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1661 }
1662
1663 /**
1664  * il4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1665  * @stats: Provides the temperature reading from the uCode
1666  *
1667  * A return of <0 indicates bogus data in the stats
1668  */
1669 static int il4965_hw_get_temperature(struct il_priv *il)
1670 {
1671         s32 temperature;
1672         s32 vt;
1673         s32 R1, R2, R3;
1674         u32 R4;
1675
1676         if (test_bit(S_TEMPERATURE, &il->status) &&
1677             (il->_4965.stats.flag &
1678                         STATS_REPLY_FLG_HT40_MODE_MSK)) {
1679                 D_TEMP("Running HT40 temperature calibration\n");
1680                 R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[1]);
1681                 R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[1]);
1682                 R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[1]);
1683                 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]);
1684         } else {
1685                 D_TEMP("Running temperature calibration\n");
1686                 R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[0]);
1687                 R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[0]);
1688                 R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[0]);
1689                 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]);
1690         }
1691
1692         /*
1693          * Temperature is only 23 bits, so sign extend out to 32.
1694          *
1695          * NOTE If we haven't received a stats notification yet
1696          * with an updated temperature, use R4 provided to us in the
1697          * "initialize" ALIVE response.
1698          */
1699         if (!test_bit(S_TEMPERATURE, &il->status))
1700                 vt = sign_extend32(R4, 23);
1701         else
1702                 vt = sign_extend32(le32_to_cpu(il->_4965.stats.
1703                                  general.common.temperature), 23);
1704
1705         D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1706
1707         if (R3 == R1) {
1708                 IL_ERR("Calibration conflict R1 == R3\n");
1709                 return -1;
1710         }
1711
1712         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1713          * Add offset to center the adjustment around 0 degrees Centigrade. */
1714         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1715         temperature /= (R3 - R1);
1716         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1717
1718         D_TEMP("Calibrated temperature: %dK, %dC\n",
1719                         temperature, KELVIN_TO_CELSIUS(temperature));
1720
1721         return temperature;
1722 }
1723
1724 /* Adjust Txpower only if temperature variance is greater than threshold. */
1725 #define IL_TEMPERATURE_THRESHOLD   3
1726
1727 /**
1728  * il4965_is_temp_calib_needed - determines if new calibration is needed
1729  *
1730  * If the temperature changed has changed sufficiently, then a recalibration
1731  * is needed.
1732  *
1733  * Assumes caller will replace il->last_temperature once calibration
1734  * executed.
1735  */
1736 static int il4965_is_temp_calib_needed(struct il_priv *il)
1737 {
1738         int temp_diff;
1739
1740         if (!test_bit(S_STATS, &il->status)) {
1741                 D_TEMP("Temperature not updated -- no stats.\n");
1742                 return 0;
1743         }
1744
1745         temp_diff = il->temperature - il->last_temperature;
1746
1747         /* get absolute value */
1748         if (temp_diff < 0) {
1749                 D_POWER("Getting cooler, delta %d\n", temp_diff);
1750                 temp_diff = -temp_diff;
1751         } else if (temp_diff == 0)
1752                 D_POWER("Temperature unchanged\n");
1753         else
1754                 D_POWER("Getting warmer, delta %d\n", temp_diff);
1755
1756         if (temp_diff < IL_TEMPERATURE_THRESHOLD) {
1757                 D_POWER(" => thermal txpower calib not needed\n");
1758                 return 0;
1759         }
1760
1761         D_POWER(" => thermal txpower calib needed\n");
1762
1763         return 1;
1764 }
1765
1766 static void il4965_temperature_calib(struct il_priv *il)
1767 {
1768         s32 temp;
1769
1770         temp = il4965_hw_get_temperature(il);
1771         if (IL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp))
1772                 return;
1773
1774         if (il->temperature != temp) {
1775                 if (il->temperature)
1776                         D_TEMP("Temperature changed "
1777                                        "from %dC to %dC\n",
1778                                        KELVIN_TO_CELSIUS(il->temperature),
1779                                        KELVIN_TO_CELSIUS(temp));
1780                 else
1781                         D_TEMP("Temperature "
1782                                        "initialized to %dC\n",
1783                                        KELVIN_TO_CELSIUS(temp));
1784         }
1785
1786         il->temperature = temp;
1787         set_bit(S_TEMPERATURE, &il->status);
1788
1789         if (!il->disable_tx_power_cal &&
1790              unlikely(!test_bit(S_SCANNING, &il->status)) &&
1791              il4965_is_temp_calib_needed(il))
1792                 queue_work(il->workqueue, &il->txpower_work);
1793 }
1794
1795 static u16 il4965_get_hcmd_size(u8 cmd_id, u16 len)
1796 {
1797         switch (cmd_id) {
1798         case C_RXON:
1799                 return (u16) sizeof(struct il4965_rxon_cmd);
1800         default:
1801                 return len;
1802         }
1803 }
1804
1805 static u16 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd,
1806                                                                 u8 *data)
1807 {
1808         struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data;
1809         addsta->mode = cmd->mode;
1810         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1811         memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
1812         addsta->station_flags = cmd->station_flags;
1813         addsta->station_flags_msk = cmd->station_flags_msk;
1814         addsta->tid_disable_tx = cmd->tid_disable_tx;
1815         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1816         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1817         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1818         addsta->sleep_tx_count = cmd->sleep_tx_count;
1819         addsta->reserved1 = cpu_to_le16(0);
1820         addsta->reserved2 = cpu_to_le16(0);
1821
1822         return (u16)sizeof(struct il4965_addsta_cmd);
1823 }
1824
1825 static inline u32 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp)
1826 {
1827         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1828 }
1829
1830 static inline u32 il4965_tx_status_to_mac80211(u32 status)
1831 {
1832         status &= TX_STATUS_MSK;
1833
1834         switch (status) {
1835         case TX_STATUS_SUCCESS:
1836         case TX_STATUS_DIRECT_DONE:
1837                 return IEEE80211_TX_STAT_ACK;
1838         case TX_STATUS_FAIL_DEST_PS:
1839                 return IEEE80211_TX_STAT_TX_FILTERED;
1840         default:
1841                 return 0;
1842         }
1843 }
1844
1845 static inline bool il4965_is_tx_success(u32 status)
1846 {
1847         status &= TX_STATUS_MSK;
1848         return (status == TX_STATUS_SUCCESS ||
1849                 status == TX_STATUS_DIRECT_DONE);
1850 }
1851
1852 /**
1853  * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1854  */
1855 static int il4965_tx_status_reply_tx(struct il_priv *il,
1856                                       struct il_ht_agg *agg,
1857                                       struct il4965_tx_resp *tx_resp,
1858                                       int txq_id, u16 start_idx)
1859 {
1860         u16 status;
1861         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1862         struct ieee80211_tx_info *info = NULL;
1863         struct ieee80211_hdr *hdr = NULL;
1864         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1865         int i, sh, idx;
1866         u16 seq;
1867         if (agg->wait_for_ba)
1868                 D_TX_REPLY("got tx response w/o block-ack\n");
1869
1870         agg->frame_count = tx_resp->frame_count;
1871         agg->start_idx = start_idx;
1872         agg->rate_n_flags = rate_n_flags;
1873         agg->bitmap = 0;
1874
1875         /* num frames attempted by Tx command */
1876         if (agg->frame_count == 1) {
1877                 /* Only one frame was attempted; no block-ack will arrive */
1878                 status = le16_to_cpu(frame_status[0].status);
1879                 idx = start_idx;
1880
1881                 D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
1882                                    agg->frame_count, agg->start_idx, idx);
1883
1884                 info = IEEE80211_SKB_CB(il->txq[txq_id].txb[idx].skb);
1885                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1886                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1887                 info->flags |= il4965_tx_status_to_mac80211(status);
1888                 il4965_hwrate_to_tx_control(il, rate_n_flags, info);
1889
1890                 D_TX_REPLY("1 Frame 0x%x failure :%d\n",
1891                                     status & 0xff, tx_resp->failure_frame);
1892                 D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
1893
1894                 agg->wait_for_ba = 0;
1895         } else {
1896                 /* Two or more frames were attempted; expect block-ack */
1897                 u64 bitmap = 0;
1898                 int start = agg->start_idx;
1899
1900                 /* Construct bit-map of pending frames within Tx win */
1901                 for (i = 0; i < agg->frame_count; i++) {
1902                         u16 sc;
1903                         status = le16_to_cpu(frame_status[i].status);
1904                         seq  = le16_to_cpu(frame_status[i].sequence);
1905                         idx = SEQ_TO_IDX(seq);
1906                         txq_id = SEQ_TO_QUEUE(seq);
1907
1908                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1909                                       AGG_TX_STATE_ABORT_MSK))
1910                                 continue;
1911
1912                         D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
1913                                            agg->frame_count, txq_id, idx);
1914
1915                         hdr = il_tx_queue_get_hdr(il, txq_id, idx);
1916                         if (!hdr) {
1917                                 IL_ERR(
1918                                         "BUG_ON idx doesn't point to valid skb"
1919                                         " idx=%d, txq_id=%d\n", idx, txq_id);
1920                                 return -1;
1921                         }
1922
1923                         sc = le16_to_cpu(hdr->seq_ctrl);
1924                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1925                                 IL_ERR(
1926                                         "BUG_ON idx doesn't match seq control"
1927                                         " idx=%d, seq_idx=%d, seq=%d\n",
1928                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
1929                                 return -1;
1930                         }
1931
1932                         D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
1933                                            i, idx, SEQ_TO_SN(sc));
1934
1935                         sh = idx - start;
1936                         if (sh > 64) {
1937                                 sh = (start - idx) + 0xff;
1938                                 bitmap = bitmap << sh;
1939                                 sh = 0;
1940                                 start = idx;
1941                         } else if (sh < -64)
1942                                 sh  = 0xff - (start - idx);
1943                         else if (sh < 0) {
1944                                 sh = start - idx;
1945                                 start = idx;
1946                                 bitmap = bitmap << sh;
1947                                 sh = 0;
1948                         }
1949                         bitmap |= 1ULL << sh;
1950                         D_TX_REPLY("start=%d bitmap=0x%llx\n",
1951                                            start, (unsigned long long)bitmap);
1952                 }
1953
1954                 agg->bitmap = bitmap;
1955                 agg->start_idx = start;
1956                 D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
1957                                    agg->frame_count, agg->start_idx,
1958                                    (unsigned long long)agg->bitmap);
1959
1960                 if (bitmap)
1961                         agg->wait_for_ba = 1;
1962         }
1963         return 0;
1964 }
1965
1966 static u8 il4965_find_station(struct il_priv *il, const u8 *addr)
1967 {
1968         int i;
1969         int start = 0;
1970         int ret = IL_INVALID_STATION;
1971         unsigned long flags;
1972
1973         if ((il->iw_mode == NL80211_IFTYPE_ADHOC))
1974                 start = IL_STA_ID;
1975
1976         if (is_broadcast_ether_addr(addr))
1977                 return il->ctx.bcast_sta_id;
1978
1979         spin_lock_irqsave(&il->sta_lock, flags);
1980         for (i = start; i < il->hw_params.max_stations; i++)
1981                 if (il->stations[i].used &&
1982                     (!compare_ether_addr(il->stations[i].sta.sta.addr,
1983                                          addr))) {
1984                         ret = i;
1985                         goto out;
1986                 }
1987
1988         D_ASSOC("can not find STA %pM total %d\n",
1989                               addr, il->num_stations);
1990
1991  out:
1992         /*
1993          * It may be possible that more commands interacting with stations
1994          * arrive before we completed processing the adding of
1995          * station
1996          */
1997         if (ret != IL_INVALID_STATION &&
1998             (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) ||
1999              ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) &&
2000               (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) {
2001                 IL_ERR("Requested station info for sta %d before ready.\n",
2002                         ret);
2003                 ret = IL_INVALID_STATION;
2004         }
2005         spin_unlock_irqrestore(&il->sta_lock, flags);
2006         return ret;
2007 }
2008
2009 static int il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr)
2010 {
2011         if (il->iw_mode == NL80211_IFTYPE_STATION) {
2012                 return IL_AP_ID;
2013         } else {
2014                 u8 *da = ieee80211_get_DA(hdr);
2015                 return il4965_find_station(il, da);
2016         }
2017 }
2018
2019 /**
2020  * il4965_hdl_tx - Handle standard (non-aggregation) Tx response
2021  */
2022 static void il4965_hdl_tx(struct il_priv *il,
2023                                 struct il_rx_buf *rxb)
2024 {
2025         struct il_rx_pkt *pkt = rxb_addr(rxb);
2026         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2027         int txq_id = SEQ_TO_QUEUE(sequence);
2028         int idx = SEQ_TO_IDX(sequence);
2029         struct il_tx_queue *txq = &il->txq[txq_id];
2030         struct ieee80211_hdr *hdr;
2031         struct ieee80211_tx_info *info;
2032         struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2033         u32  status = le32_to_cpu(tx_resp->u.status);
2034         int uninitialized_var(tid);
2035         int sta_id;
2036         int freed;
2037         u8 *qc = NULL;
2038         unsigned long flags;
2039
2040         if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
2041                 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
2042                           "is out of range [0-%d] %d %d\n", txq_id,
2043                           idx, txq->q.n_bd, txq->q.write_ptr,
2044                           txq->q.read_ptr);
2045                 return;
2046         }
2047
2048         txq->time_stamp = jiffies;
2049         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
2050         memset(&info->status, 0, sizeof(info->status));
2051
2052         hdr = il_tx_queue_get_hdr(il, txq_id, idx);
2053         if (ieee80211_is_data_qos(hdr->frame_control)) {
2054                 qc = ieee80211_get_qos_ctl(hdr);
2055                 tid = qc[0] & 0xf;
2056         }
2057
2058         sta_id = il4965_get_ra_sta_id(il, hdr);
2059         if (txq->sched_retry && unlikely(sta_id == IL_INVALID_STATION)) {
2060                 IL_ERR("Station not known\n");
2061                 return;
2062         }
2063
2064         spin_lock_irqsave(&il->sta_lock, flags);
2065         if (txq->sched_retry) {
2066                 const u32 scd_ssn = il4965_get_scd_ssn(tx_resp);
2067                 struct il_ht_agg *agg = NULL;
2068                 WARN_ON(!qc);
2069
2070                 agg = &il->stations[sta_id].tid[tid].agg;
2071
2072                 il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
2073
2074                 /* check if BAR is needed */
2075                 if ((tx_resp->frame_count == 1) && !il4965_is_tx_success(status))
2076                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2077
2078                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2079                         idx = il_queue_dec_wrap(scd_ssn & 0xff,
2080                                                                 txq->q.n_bd);
2081                         D_TX_REPLY("Retry scheduler reclaim scd_ssn "
2082                                            "%d idx %d\n", scd_ssn , idx);
2083                         freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2084                         if (qc)
2085                                 il4965_free_tfds_in_queue(il, sta_id,
2086                                                        tid, freed);
2087
2088                         if (il->mac80211_registered &&
2089                             il_queue_space(&txq->q) > txq->q.low_mark &&
2090                             agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2091                                 il_wake_queue(il, txq);
2092                 }
2093         } else {
2094                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2095                 info->flags |= il4965_tx_status_to_mac80211(status);
2096                 il4965_hwrate_to_tx_control(il,
2097                                         le32_to_cpu(tx_resp->rate_n_flags),
2098                                         info);
2099
2100                 D_TX_REPLY("TXQ %d status %s (0x%08x) "
2101                                    "rate_n_flags 0x%x retries %d\n",
2102                                    txq_id,
2103                                    il4965_get_tx_fail_reason(status), status,
2104                                    le32_to_cpu(tx_resp->rate_n_flags),
2105                                    tx_resp->failure_frame);
2106
2107                 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2108                 if (qc && likely(sta_id != IL_INVALID_STATION))
2109                         il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2110                 else if (sta_id == IL_INVALID_STATION)
2111                         D_TX_REPLY("Station not known\n");
2112
2113                 if (il->mac80211_registered &&
2114                     il_queue_space(&txq->q) > txq->q.low_mark)
2115                         il_wake_queue(il, txq);
2116         }
2117         if (qc && likely(sta_id != IL_INVALID_STATION))
2118                 il4965_txq_check_empty(il, sta_id, tid, txq_id);
2119
2120         il4965_check_abort_status(il, tx_resp->frame_count, status);
2121
2122         spin_unlock_irqrestore(&il->sta_lock, flags);
2123 }
2124
2125 static void il4965_hdl_beacon(struct il_priv *il,
2126                                     struct il_rx_buf *rxb)
2127 {
2128         struct il_rx_pkt *pkt = rxb_addr(rxb);
2129         struct il4965_beacon_notif *beacon = (void *)pkt->u.raw;
2130         u8 rate __maybe_unused =
2131                 il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
2132
2133         D_RX("beacon status %#x, retries:%d ibssmgr:%d "
2134                 "tsf:0x%.8x%.8x rate:%d\n",
2135                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
2136                 beacon->beacon_notify_hdr.failure_frame,
2137                 le32_to_cpu(beacon->ibss_mgr_status),
2138                 le32_to_cpu(beacon->high_tsf),
2139                 le32_to_cpu(beacon->low_tsf), rate);
2140
2141         il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
2142 }
2143
2144 /* Set up 4965-specific Rx frame reply handlers */
2145 static void il4965_handler_setup(struct il_priv *il)
2146 {
2147         /* Legacy Rx frames */
2148         il->handlers[N_RX] = il4965_hdl_rx;
2149         /* Tx response */
2150         il->handlers[C_TX] = il4965_hdl_tx;
2151         il->handlers[N_BEACON] = il4965_hdl_beacon;
2152 }
2153
2154 static struct il_hcmd_ops il4965_hcmd = {
2155         .rxon_assoc = il4965_send_rxon_assoc,
2156         .commit_rxon = il4965_commit_rxon,
2157         .set_rxon_chain = il4965_set_rxon_chain,
2158 };
2159
2160 static void il4965_post_scan(struct il_priv *il)
2161 {
2162         struct il_rxon_context *ctx = &il->ctx;
2163
2164         /*
2165          * Since setting the RXON may have been deferred while
2166          * performing the scan, fire one off if needed
2167          */
2168         if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
2169                 il_commit_rxon(il, ctx);
2170 }
2171
2172 static void il4965_post_associate(struct il_priv *il)
2173 {
2174         struct il_rxon_context *ctx = &il->ctx;
2175         struct ieee80211_vif *vif = ctx->vif;
2176         struct ieee80211_conf *conf = NULL;
2177         int ret = 0;
2178
2179         if (!vif || !il->is_open)
2180                 return;
2181
2182         if (test_bit(S_EXIT_PENDING, &il->status))
2183                 return;
2184
2185         il_scan_cancel_timeout(il, 200);
2186
2187         conf = &il->hw->conf;
2188
2189         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2190         il_commit_rxon(il, ctx);
2191
2192         ret = il_send_rxon_timing(il, ctx);
2193         if (ret)
2194                 IL_WARN("RXON timing - "
2195                             "Attempting to continue.\n");
2196
2197         ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2198
2199         il_set_rxon_ht(il, &il->current_ht_config);
2200
2201         if (il->cfg->ops->hcmd->set_rxon_chain)
2202                 il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
2203
2204         ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
2205
2206         D_ASSOC("assoc id %d beacon interval %d\n",
2207                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
2208
2209         if (vif->bss_conf.use_short_preamble)
2210                 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2211         else
2212                 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2213
2214         if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2215                 if (vif->bss_conf.use_short_slot)
2216                         ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2217                 else
2218                         ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2219         }
2220
2221         il_commit_rxon(il, ctx);
2222
2223         D_ASSOC("Associated as %d to: %pM\n",
2224                         vif->bss_conf.aid, ctx->active.bssid_addr);
2225
2226         switch (vif->type) {
2227         case NL80211_IFTYPE_STATION:
2228                 break;
2229         case NL80211_IFTYPE_ADHOC:
2230                 il4965_send_beacon_cmd(il);
2231                 break;
2232         default:
2233                 IL_ERR("%s Should not be called in %d mode\n",
2234                           __func__, vif->type);
2235                 break;
2236         }
2237
2238         /* the chain noise calibration will enabled PM upon completion
2239          * If chain noise has already been run, then we need to enable
2240          * power management here */
2241         if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE)
2242                 il_power_update_mode(il, false);
2243
2244         /* Enable Rx differential gain and sensitivity calibrations */
2245         il4965_chain_noise_reset(il);
2246         il->start_calib = 1;
2247 }
2248
2249 static void il4965_config_ap(struct il_priv *il)
2250 {
2251         struct il_rxon_context *ctx = &il->ctx;
2252         struct ieee80211_vif *vif = ctx->vif;
2253         int ret = 0;
2254
2255         lockdep_assert_held(&il->mutex);
2256
2257         if (test_bit(S_EXIT_PENDING, &il->status))
2258                 return;
2259
2260         /* The following should be done only at AP bring up */
2261         if (!il_is_associated_ctx(ctx)) {
2262
2263                 /* RXON - unassoc (to set timing command) */
2264                 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2265                 il_commit_rxon(il, ctx);
2266
2267                 /* RXON Timing */
2268                 ret = il_send_rxon_timing(il, ctx);
2269                 if (ret)
2270                         IL_WARN("RXON timing failed - "
2271                                         "Attempting to continue.\n");
2272
2273                 /* AP has all antennas */
2274                 il->chain_noise_data.active_chains =
2275                         il->hw_params.valid_rx_ant;
2276                 il_set_rxon_ht(il, &il->current_ht_config);
2277                 if (il->cfg->ops->hcmd->set_rxon_chain)
2278                         il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
2279
2280                 ctx->staging.assoc_id = 0;
2281
2282                 if (vif->bss_conf.use_short_preamble)
2283                         ctx->staging.flags |=
2284                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2285                 else
2286                         ctx->staging.flags &=
2287                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2288
2289                 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2290                         if (vif->bss_conf.use_short_slot)
2291                                 ctx->staging.flags |=
2292                                         RXON_FLG_SHORT_SLOT_MSK;
2293                         else
2294                                 ctx->staging.flags &=
2295                                         ~RXON_FLG_SHORT_SLOT_MSK;
2296                 }
2297                 /* need to send beacon cmd before committing assoc RXON! */
2298                 il4965_send_beacon_cmd(il);
2299                 /* restore RXON assoc */
2300                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2301                 il_commit_rxon(il, ctx);
2302         }
2303         il4965_send_beacon_cmd(il);
2304 }
2305
2306 static struct il_hcmd_utils_ops il4965_hcmd_utils = {
2307         .get_hcmd_size = il4965_get_hcmd_size,
2308         .build_addsta_hcmd = il4965_build_addsta_hcmd,
2309         .request_scan = il4965_request_scan,
2310         .post_scan = il4965_post_scan,
2311 };
2312
2313 static struct il_lib_ops il4965_lib = {
2314         .set_hw_params = il4965_hw_set_hw_params,
2315         .txq_update_byte_cnt_tbl = il4965_txq_update_byte_cnt_tbl,
2316         .txq_attach_buf_to_tfd = il4965_hw_txq_attach_buf_to_tfd,
2317         .txq_free_tfd = il4965_hw_txq_free_tfd,
2318         .txq_init = il4965_hw_tx_queue_init,
2319         .handler_setup = il4965_handler_setup,
2320         .is_valid_rtc_data_addr = il4965_hw_valid_rtc_data_addr,
2321         .init_alive_start = il4965_init_alive_start,
2322         .load_ucode = il4965_load_bsm,
2323         .dump_nic_error_log = il4965_dump_nic_error_log,
2324         .dump_fh = il4965_dump_fh,
2325         .set_channel_switch = il4965_hw_channel_switch,
2326         .apm_ops = {
2327                 .init = il_apm_init,
2328                 .config = il4965_nic_config,
2329         },
2330         .eeprom_ops = {
2331                 .regulatory_bands = {
2332                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2333                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2334                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2335                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2336                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2337                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2338                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2339                 },
2340                 .acquire_semaphore = il4965_eeprom_acquire_semaphore,
2341                 .release_semaphore = il4965_eeprom_release_semaphore,
2342         },
2343         .send_tx_power  = il4965_send_tx_power,
2344         .update_chain_flags = il4965_update_chain_flags,
2345         .temp_ops = {
2346                 .temperature = il4965_temperature_calib,
2347         },
2348         .debugfs_ops = {
2349                 .rx_stats_read = il4965_ucode_rx_stats_read,
2350                 .tx_stats_read = il4965_ucode_tx_stats_read,
2351                 .general_stats_read = il4965_ucode_general_stats_read,
2352         },
2353 };
2354
2355 static const struct il_legacy_ops il4965_legacy_ops = {
2356         .post_associate = il4965_post_associate,
2357         .config_ap = il4965_config_ap,
2358         .manage_ibss_station = il4965_manage_ibss_station,
2359         .update_bcast_stations = il4965_update_bcast_stations,
2360 };
2361
2362 struct ieee80211_ops il4965_hw_ops = {
2363         .tx = il4965_mac_tx,
2364         .start = il4965_mac_start,
2365         .stop = il4965_mac_stop,
2366         .add_interface = il_mac_add_interface,
2367         .remove_interface = il_mac_remove_interface,
2368         .change_interface = il_mac_change_interface,
2369         .config = il_mac_config,
2370         .configure_filter = il4965_configure_filter,
2371         .set_key = il4965_mac_set_key,
2372         .update_tkip_key = il4965_mac_update_tkip_key,
2373         .conf_tx = il_mac_conf_tx,
2374         .reset_tsf = il_mac_reset_tsf,
2375         .bss_info_changed = il_mac_bss_info_changed,
2376         .ampdu_action = il4965_mac_ampdu_action,
2377         .hw_scan = il_mac_hw_scan,
2378         .sta_add = il4965_mac_sta_add,
2379         .sta_remove = il_mac_sta_remove,
2380         .channel_switch = il4965_mac_channel_switch,
2381         .tx_last_beacon = il_mac_tx_last_beacon,
2382 };
2383
2384 static const struct il_ops il4965_ops = {
2385         .lib = &il4965_lib,
2386         .hcmd = &il4965_hcmd,
2387         .utils = &il4965_hcmd_utils,
2388         .led = &il4965_led_ops,
2389         .legacy = &il4965_legacy_ops,
2390         .ieee80211_ops = &il4965_hw_ops,
2391 };
2392
2393 static struct il_base_params il4965_base_params = {
2394         .eeprom_size = IL4965_EEPROM_IMG_SIZE,
2395         .num_of_queues = IL49_NUM_QUEUES,
2396         .num_of_ampdu_queues = IL49_NUM_AMPDU_QUEUES,
2397         .pll_cfg_val = 0,
2398         .set_l0s = true,
2399         .use_bsm = true,
2400         .led_compensation = 61,
2401         .chain_noise_num_beacons = IL4965_CAL_NUM_BEACONS,
2402         .wd_timeout = IL_DEF_WD_TIMEOUT,
2403         .temperature_kelvin = true,
2404         .ucode_tracing = true,
2405         .sensitivity_calib_by_driver = true,
2406         .chain_noise_calib_by_driver = true,
2407 };
2408
2409 struct il_cfg il4965_cfg = {
2410         .name = "Intel(R) Wireless WiFi Link 4965AGN",
2411         .fw_name_pre = IL4965_FW_PRE,
2412         .ucode_api_max = IL4965_UCODE_API_MAX,
2413         .ucode_api_min = IL4965_UCODE_API_MIN,
2414         .sku = IL_SKU_A|IL_SKU_G|IL_SKU_N,
2415         .valid_tx_ant = ANT_AB,
2416         .valid_rx_ant = ANT_ABC,
2417         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2418         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2419         .ops = &il4965_ops,
2420         .mod_params = &il4965_mod_params,
2421         .base_params = &il4965_base_params,
2422         .led_mode = IL_LED_BLINK,
2423         /*
2424          * Force use of chains B and C for scan RX on 5 GHz band
2425          * because the device has off-channel reception on chain A.
2426          */
2427         .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC,
2428 };
2429
2430 /* Module firmware */
2431 MODULE_FIRMWARE(IL4965_MODULE_FIRMWARE(IL4965_UCODE_API_MAX));