drivers/net/wireless/iwlegacy/4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/sched.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "common.h"
  41 #include "4965.h"
  42
  43 #define IL_AC_UNSET -1
  44
  45 /**
  46  * il_verify_inst_sparse - verify runtime uCode image in card vs. host,
  47  *   using sample data 100 bytes apart.  If these sample points are good,
  48  *   it's a pretty good bet that everything between them is good, too.
  49  */
  50 static int
  51 il4965_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len)
  52 {
  53         u32 val;
  54         int ret = 0;
  55         u32 errcnt = 0;
  56         u32 i;
  57
  58         D_INFO("ucode inst image size is %u\n", len);
  59
  60         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  61                 /* read data comes through single port, auto-incr addr */
  62                 /* NOTE: Use the debugless read so we don't flood kernel log
  63                  * if IL_DL_IO is set */
  64                 il_wr(il, HBUS_TARG_MEM_RADDR,
  65                         i + IL4965_RTC_INST_LOWER_BOUND);
  66                 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  67                 if (val != le32_to_cpu(*image)) {
  68                         ret = -EIO;
  69                         errcnt++;
  70                         if (errcnt >= 3)
  71                                 break;
  72                 }
  73         }
  74
  75         return ret;
  76 }
  77
  78 /**
  79  * il4965_verify_inst_full - verify runtime uCode image in card vs. host,
  80  *     looking at all data.
  81  */
  82 static int il4965_verify_inst_full(struct il_priv *il, __le32 *image,
  83                                  u32 len)
  84 {
  85         u32 val;
  86         u32 save_len = len;
  87         int ret = 0;
  88         u32 errcnt;
  89
  90         D_INFO("ucode inst image size is %u\n", len);
  91
  92         il_wr(il, HBUS_TARG_MEM_RADDR,
  93                            IL4965_RTC_INST_LOWER_BOUND);
  94
  95         errcnt = 0;
  96         for (; len > 0; len -= sizeof(u32), image++) {
  97                 /* read data comes through single port, auto-incr addr */
  98                 /* NOTE: Use the debugless read so we don't flood kernel log
  99                  * if IL_DL_IO is set */
 100                 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
 101                 if (val != le32_to_cpu(*image)) {
 102                         IL_ERR("uCode INST section is invalid at "
 103                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
 104                                   save_len - len, val, le32_to_cpu(*image));
 105                         ret = -EIO;
 106                         errcnt++;
 107                         if (errcnt >= 20)
 108                                 break;
 109                 }
 110         }
 111
 112         if (!errcnt)
 113                 D_INFO(
 114                     "ucode image in INSTRUCTION memory is good\n");
 115
 116         return ret;
 117 }
 118
 119 /**
 120  * il4965_verify_ucode - determine which instruction image is in SRAM,
 121  *    and verify its contents
 122  */
 123 int il4965_verify_ucode(struct il_priv *il)
 124 {
 125         __le32 *image;
 126         u32 len;
 127         int ret;
 128
 129         /* Try bootstrap */
 130         image = (__le32 *)il->ucode_boot.v_addr;
 131         len = il->ucode_boot.len;
 132         ret = il4965_verify_inst_sparse(il, image, len);
 133         if (!ret) {
 134                 D_INFO("Bootstrap uCode is good in inst SRAM\n");
 135                 return 0;
 136         }
 137
 138         /* Try initialize */
 139         image = (__le32 *)il->ucode_init.v_addr;
 140         len = il->ucode_init.len;
 141         ret = il4965_verify_inst_sparse(il, image, len);
 142         if (!ret) {
 143                 D_INFO("Initialize uCode is good in inst SRAM\n");
 144                 return 0;
 145         }
 146
 147         /* Try runtime/protocol */
 148         image = (__le32 *)il->ucode_code.v_addr;
 149         len = il->ucode_code.len;
 150         ret = il4965_verify_inst_sparse(il, image, len);
 151         if (!ret) {
 152                 D_INFO("Runtime uCode is good in inst SRAM\n");
 153                 return 0;
 154         }
 155
 156         IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
 157
 158         /* Since nothing seems to match, show first several data entries in
 159          * instruction SRAM, so maybe visual inspection will give a clue.
 160          * Selection of bootstrap image (vs. other images) is arbitrary. */
 161         image = (__le32 *)il->ucode_boot.v_addr;
 162         len = il->ucode_boot.len;
 163         ret = il4965_verify_inst_full(il, image, len);
 164
 165         return ret;
 166 }
 167
 168 /******************************************************************************
 169  *
 170  * EEPROM related functions
 171  *
 172 ******************************************************************************/
 173
 174 /*
 175  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 176  * when accessing the EEPROM; each access is a series of pulses to/from the
 177  * EEPROM chip, not a single event, so even reads could conflict if they
 178  * weren't arbitrated by the semaphore.
 179  */
 180 int il4965_eeprom_acquire_semaphore(struct il_priv *il)
 181 {
 182         u16 count;
 183         int ret;
 184
 185         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 186                 /* Request semaphore */
 187                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 188                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 189
 190                 /* See if we got it */
 191                 ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
 192                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 193                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 194                                 EEPROM_SEM_TIMEOUT);
 195                 if (ret >= 0)
 196                         return ret;
 197         }
 198
 199         return ret;
 200 }
 201
 202 void il4965_eeprom_release_semaphore(struct il_priv *il)
 203 {
 204         il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
 205                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 206
 207 }
 208
 209 int il4965_eeprom_check_version(struct il_priv *il)
 210 {
 211         u16 eeprom_ver;
 212         u16 calib_ver;
 213
 214         eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION);
 215         calib_ver = il_eeprom_query16(il,
 216                         EEPROM_4965_CALIB_VERSION_OFFSET);
 217
 218         if (eeprom_ver < il->cfg->eeprom_ver ||
 219             calib_ver < il->cfg->eeprom_calib_ver)
 220                 goto err;
 221
 222         IL_INFO("device EEPROM VER=0x%x, CALIB=0x%x\n",
 223                  eeprom_ver, calib_ver);
 224
 225         return 0;
 226 err:
 227         IL_ERR("Unsupported (too old) EEPROM VER=0x%x < 0x%x "
 228                   "CALIB=0x%x < 0x%x\n",
 229                   eeprom_ver, il->cfg->eeprom_ver,
 230                   calib_ver,  il->cfg->eeprom_calib_ver);
 231         return -EINVAL;
 232
 233 }
 234
 235 void il4965_eeprom_get_mac(const struct il_priv *il, u8 *mac)
 236 {
 237         const u8 *addr = il_eeprom_query_addr(il,
 238                                         EEPROM_MAC_ADDRESS);
 239         memcpy(mac, addr, ETH_ALEN);
 240 }
 241
 242 /* Send led command */
 243 static int
 244 il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
 245 {
 246         struct il_host_cmd cmd = {
 247                 .id = C_LEDS,
 248                 .len = sizeof(struct il_led_cmd),
 249                 .data = led_cmd,
 250                 .flags = CMD_ASYNC,
 251                 .callback = NULL,
 252         };
 253         u32 reg;
 254
 255         reg = _il_rd(il, CSR_LED_REG);
 256         if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
 257                 _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
 258
 259         return il_send_cmd(il, &cmd);
 260 }
 261
 262 /* Set led register off */
 263 void il4965_led_enable(struct il_priv *il)
 264 {
 265         _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
 266 }
 267
 268 const struct il_led_ops il4965_led_ops = {
 269         .cmd = il4965_send_led_cmd,
 270 };
 271
 272 static int il4965_send_tx_power(struct il_priv *il);
 273 static int il4965_hw_get_temperature(struct il_priv *il);
 274
 275 /* Highest firmware API version supported */
 276 #define IL4965_UCODE_API_MAX 2
 277
 278 /* Lowest firmware API version supported */
 279 #define IL4965_UCODE_API_MIN 2
 280
 281 #define IL4965_FW_PRE "iwlwifi-4965-"
 282 #define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode"
 283 #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api)
 284
 285 /* check contents of special bootstrap uCode SRAM */
 286 static int il4965_verify_bsm(struct il_priv *il)
 287 {
 288         __le32 *image = il->ucode_boot.v_addr;
 289         u32 len = il->ucode_boot.len;
 290         u32 reg;
 291         u32 val;
 292
 293         D_INFO("Begin verify bsm\n");
 294
 295         /* verify BSM SRAM contents */
 296         val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
 297         for (reg = BSM_SRAM_LOWER_BOUND;
 298              reg < BSM_SRAM_LOWER_BOUND + len;
 299              reg += sizeof(u32), image++) {
 300                 val = il_rd_prph(il, reg);
 301                 if (val != le32_to_cpu(*image)) {
 302                         IL_ERR("BSM uCode verification failed at "
 303                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
 304                                   BSM_SRAM_LOWER_BOUND,
 305                                   reg - BSM_SRAM_LOWER_BOUND, len,
 306                                   val, le32_to_cpu(*image));
 307                         return -EIO;
 308                 }
 309         }
 310
 311         D_INFO("BSM bootstrap uCode image OK\n");
 312
 313         return 0;
 314 }
 315
 316 /**
 317  * il4965_load_bsm - Load bootstrap instructions
 318  *
 319  * BSM operation:
 320  *
 321  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 322  * in special SRAM that does not power down during RFKILL.  When powering back
 323  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 324  * the bootstrap program into the on-board processor, and starts it.
 325  *
 326  * The bootstrap program loads (via DMA) instructions and data for a new
 327  * program from host DRAM locations indicated by the host driver in the
 328  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 329  * automatically.
 330  *
 331  * When initializing the NIC, the host driver points the BSM to the
 332  * "initialize" uCode image.  This uCode sets up some internal data, then
 333  * notifies host via "initialize alive" that it is complete.
 334  *
 335  * The host then replaces the BSM_DRAM_* pointer values to point to the
 336  * normal runtime uCode instructions and a backup uCode data cache buffer
 337  * (filled initially with starting data values for the on-board processor),
 338  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 339  * which begins normal operation.
 340  *
 341  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 342  * the backup data cache in DRAM before SRAM is powered down.
 343  *
 344  * When powering back up, the BSM loads the bootstrap program.  This reloads
 345  * the runtime uCode instructions and the backup data cache into SRAM,
 346  * and re-launches the runtime uCode from where it left off.
 347  */
 348 static int il4965_load_bsm(struct il_priv *il)
 349 {
 350         __le32 *image = il->ucode_boot.v_addr;
 351         u32 len = il->ucode_boot.len;
 352         dma_addr_t pinst;
 353         dma_addr_t pdata;
 354         u32 inst_len;
 355         u32 data_len;
 356         int i;
 357         u32 done;
 358         u32 reg_offset;
 359         int ret;
 360
 361         D_INFO("Begin load bsm\n");
 362
 363         il->ucode_type = UCODE_RT;
 364
 365         /* make sure bootstrap program is no larger than BSM's SRAM size */
 366         if (len > IL49_MAX_BSM_SIZE)
 367                 return -EINVAL;
 368
 369         /* Tell bootstrap uCode where to find the "Initialize" uCode
 370          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 371          * NOTE:  il_init_alive_start() will replace these values,
 372          *        after the "initialize" uCode has run, to point to
 373          *        runtime/protocol instructions and backup data cache.
 374          */
 375         pinst = il->ucode_init.p_addr >> 4;
 376         pdata = il->ucode_init_data.p_addr >> 4;
 377         inst_len = il->ucode_init.len;
 378         data_len = il->ucode_init_data.len;
 379
 380         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
 381         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
 382         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 383         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 384
 385         /* Fill BSM memory with bootstrap instructions */
 386         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 387              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 388              reg_offset += sizeof(u32), image++)
 389                 _il_wr_prph(il, reg_offset, le32_to_cpu(*image));
 390
 391         ret = il4965_verify_bsm(il);
 392         if (ret)
 393                 return ret;
 394
 395         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 396         il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
 397         il_wr_prph(il,
 398                         BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND);
 399         il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 400
 401         /* Load bootstrap code into instruction SRAM now,
 402          *   to prepare to load "initialize" uCode */
 403         il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 404
 405         /* Wait for load of bootstrap uCode to finish */
 406         for (i = 0; i < 100; i++) {
 407                 done = il_rd_prph(il, BSM_WR_CTRL_REG);
 408                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 409                         break;
 410                 udelay(10);
 411         }
 412         if (i < 100)
 413                 D_INFO("BSM write complete, poll %d iterations\n", i);
 414         else {
 415                 IL_ERR("BSM write did not complete!\n");
 416                 return -EIO;
 417         }
 418
 419         /* Enable future boot loads whenever power management unit triggers it
 420          *   (e.g. when powering back up after power-save shutdown) */
 421         il_wr_prph(il,
 422                         BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 423
 424
 425         return 0;
 426 }
 427
 428 /**
 429  * il4965_set_ucode_ptrs - Set uCode address location
 430  *
 431  * Tell initialization uCode where to find runtime uCode.
 432  *
 433  * BSM registers initially contain pointers to initialization uCode.
 434  * We need to replace them to load runtime uCode inst and data,
 435  * and to save runtime data when powering down.
 436  */
 437 static int il4965_set_ucode_ptrs(struct il_priv *il)
 438 {
 439         dma_addr_t pinst;
 440         dma_addr_t pdata;
 441         int ret = 0;
 442
 443         /* bits 35:4 for 4965 */
 444         pinst = il->ucode_code.p_addr >> 4;
 445         pdata = il->ucode_data_backup.p_addr >> 4;
 446
 447         /* Tell bootstrap uCode where to find image to load */
 448         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
 449         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
 450         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG,
 451                                  il->ucode_data.len);
 452
 453         /* Inst byte count must be last to set up, bit 31 signals uCode
 454          *   that all new ptr/size info is in place */
 455         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
 456                                  il->ucode_code.len | BSM_DRAM_INST_LOAD);
 457         D_INFO("Runtime uCode pointers are set.\n");
 458
 459         return ret;
 460 }
 461
 462 /**
 463  * il4965_init_alive_start - Called after N_ALIVE notification received
 464  *
 465  * Called after N_ALIVE notification received from "initialize" uCode.
 466  *
 467  * The 4965 "initialize" ALIVE reply contains calibration data for:
 468  *   Voltage, temperature, and MIMO tx gain correction, now stored in il
 469  *   (3945 does not contain this data).
 470  *
 471  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 472 */
 473 static void il4965_init_alive_start(struct il_priv *il)
 474 {
 475         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 476          * This is a paranoid check, because we would not have gotten the
 477          * "initialize" alive if code weren't properly loaded.  */
 478         if (il4965_verify_ucode(il)) {
 479                 /* Runtime instruction load was bad;
 480                  * take it all the way back down so we can try again */
 481                 D_INFO("Bad \"initialize\" uCode load.\n");
 482                 goto restart;
 483         }
 484
 485         /* Calculate temperature */
 486         il->temperature = il4965_hw_get_temperature(il);
 487
 488         /* Send pointers to protocol/runtime uCode image ... init code will
 489          * load and launch runtime uCode, which will send us another "Alive"
 490          * notification. */
 491         D_INFO("Initialization Alive received.\n");
 492         if (il4965_set_ucode_ptrs(il)) {
 493                 /* Runtime instruction load won't happen;
 494                  * take it all the way back down so we can try again */
 495                 D_INFO("Couldn't set up uCode pointers.\n");
 496                 goto restart;
 497         }
 498         return;
 499
 500 restart:
 501         queue_work(il->workqueue, &il->restart);
 502 }
 503
 504 static bool iw4965_is_ht40_channel(__le32 rxon_flags)
 505 {
 506         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
 507                                     >> RXON_FLG_CHANNEL_MODE_POS;
 508         return (chan_mod == CHANNEL_MODE_PURE_40 ||
 509                 chan_mod == CHANNEL_MODE_MIXED);
 510 }
 511
 512 static void il4965_nic_config(struct il_priv *il)
 513 {
 514         unsigned long flags;
 515         u16 radio_cfg;
 516
 517         spin_lock_irqsave(&il->lock, flags);
 518
 519         radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG);
 520
 521         /* write radio config values to register */
 522         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 523                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 524                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 525                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 526                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 527
 528         /* set CSR_HW_CONFIG_REG for uCode use */
 529         il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 530                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 531                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 532
 533         il->calib_info = (struct il_eeprom_calib_info *)
 534                 il_eeprom_query_addr(il,
 535                                 EEPROM_4965_CALIB_TXPOWER_OFFSET);
 536
 537         spin_unlock_irqrestore(&il->lock, flags);
 538 }
 539
 540 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 541  * Called after every association, but this runs only once!
 542  *  ... once chain noise is calibrated the first time, it's good forever.  */
 543 static void il4965_chain_noise_reset(struct il_priv *il)
 544 {
 545         struct il_chain_noise_data *data = &(il->chain_noise_data);
 546
 547         if (data->state == IL_CHAIN_NOISE_ALIVE &&
 548             il_is_any_associated(il)) {
 549                 struct il_calib_diff_gain_cmd cmd;
 550
 551                 /* clear data for chain noise calibration algorithm */
 552                 data->chain_noise_a = 0;
 553                 data->chain_noise_b = 0;
 554                 data->chain_noise_c = 0;
 555                 data->chain_signal_a = 0;
 556                 data->chain_signal_b = 0;
 557                 data->chain_signal_c = 0;
 558                 data->beacon_count = 0;
 559
 560                 memset(&cmd, 0, sizeof(cmd));
 561                 cmd.hdr.op_code = IL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 562                 cmd.diff_gain_a = 0;
 563                 cmd.diff_gain_b = 0;
 564                 cmd.diff_gain_c = 0;
 565                 if (il_send_cmd_pdu(il, C_PHY_CALIBRATION,
 566                                  sizeof(cmd), &cmd))
 567                         IL_ERR(
 568                                 "Could not send C_PHY_CALIBRATION\n");
 569                 data->state = IL_CHAIN_NOISE_ACCUMULATE;
 570                 D_CALIB("Run chain_noise_calibrate\n");
 571         }
 572 }
 573
 574 static struct il_sensitivity_ranges il4965_sensitivity = {
 575         .min_nrg_cck = 97,
 576         .max_nrg_cck = 0, /* not used, set to 0 */
 577
 578         .auto_corr_min_ofdm = 85,
 579         .auto_corr_min_ofdm_mrc = 170,
 580         .auto_corr_min_ofdm_x1 = 105,
 581         .auto_corr_min_ofdm_mrc_x1 = 220,
 582
 583         .auto_corr_max_ofdm = 120,
 584         .auto_corr_max_ofdm_mrc = 210,
 585         .auto_corr_max_ofdm_x1 = 140,
 586         .auto_corr_max_ofdm_mrc_x1 = 270,
 587
 588         .auto_corr_min_cck = 125,
 589         .auto_corr_max_cck = 200,
 590         .auto_corr_min_cck_mrc = 200,
 591         .auto_corr_max_cck_mrc = 400,
 592
 593         .nrg_th_cck = 100,
 594         .nrg_th_ofdm = 100,
 595
 596         .barker_corr_th_min = 190,
 597         .barker_corr_th_min_mrc = 390,
 598         .nrg_th_cca = 62,
 599 };
 600
 601 static void il4965_set_ct_threshold(struct il_priv *il)
 602 {
 603         /* want Kelvin */
 604         il->hw_params.ct_kill_threshold =
 605                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
 606 }
 607
 608 /**
 609  * il4965_hw_set_hw_params
 610  *
 611  * Called when initializing driver
 612  */
 613 static int il4965_hw_set_hw_params(struct il_priv *il)
 614 {
 615         if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES &&
 616             il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES)
 617                 il->cfg->base_params->num_of_queues =
 618                         il->cfg->mod_params->num_of_queues;
 619
 620         il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues;
 621         il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 622         il->hw_params.scd_bc_tbls_size =
 623                         il->cfg->base_params->num_of_queues *
 624                         sizeof(struct il4965_scd_bc_tbl);
 625         il->hw_params.tfd_size = sizeof(struct il_tfd);
 626         il->hw_params.max_stations = IL4965_STATION_COUNT;
 627         il->ctx.bcast_sta_id = IL4965_BROADCAST_ID;
 628         il->hw_params.max_data_size = IL49_RTC_DATA_SIZE;
 629         il->hw_params.max_inst_size = IL49_RTC_INST_SIZE;
 630         il->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 631         il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
 632
 633         il->hw_params.rx_wrt_ptr_reg = FH49_RSCSR_CHNL0_WPTR;
 634
 635         il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant);
 636         il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant);
 637         il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant;
 638         il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant;
 639
 640         il4965_set_ct_threshold(il);
 641
 642         il->hw_params.sens = &il4965_sensitivity;
 643         il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS;
 644
 645         return 0;
 646 }
 647
 648 static s32 il4965_math_div_round(s32 num, s32 denom, s32 *res)
 649 {
 650         s32 sign = 1;
 651
 652         if (num < 0) {
 653                 sign = -sign;
 654                 num = -num;
 655         }
 656         if (denom < 0) {
 657                 sign = -sign;
 658                 denom = -denom;
 659         }
 660         *res = 1;
 661         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 662
 663         return 1;
 664 }
 665
 666 /**
 667  * il4965_get_voltage_compensation - Power supply voltage comp for txpower
 668  *
 669  * Determines power supply voltage compensation for txpower calculations.
 670  * Returns number of 1/2-dB steps to subtract from gain table idx,
 671  * to compensate for difference between power supply voltage during
 672  * factory measurements, vs. current power supply voltage.
 673  *
 674  * Voltage indication is higher for lower voltage.
 675  * Lower voltage requires more gain (lower gain table idx).
 676  */
 677 static s32 il4965_get_voltage_compensation(s32 eeprom_voltage,
 678                                             s32 current_voltage)
 679 {
 680         s32 comp = 0;
 681
 682         if (TX_POWER_IL_ILLEGAL_VOLTAGE == eeprom_voltage ||
 683             TX_POWER_IL_ILLEGAL_VOLTAGE == current_voltage)
 684                 return 0;
 685
 686         il4965_math_div_round(current_voltage - eeprom_voltage,
 687                                TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp);
 688
 689         if (current_voltage > eeprom_voltage)
 690                 comp *= 2;
 691         if ((comp < -2) || (comp > 2))
 692                 comp = 0;
 693
 694         return comp;
 695 }
 696
 697 static s32 il4965_get_tx_atten_grp(u16 channel)
 698 {
 699         if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH &&
 700             channel <= CALIB_IL_TX_ATTEN_GR5_LCH)
 701                 return CALIB_CH_GROUP_5;
 702
 703         if (channel >= CALIB_IL_TX_ATTEN_GR1_FCH &&
 704             channel <= CALIB_IL_TX_ATTEN_GR1_LCH)
 705                 return CALIB_CH_GROUP_1;
 706
 707         if (channel >= CALIB_IL_TX_ATTEN_GR2_FCH &&
 708             channel <= CALIB_IL_TX_ATTEN_GR2_LCH)
 709                 return CALIB_CH_GROUP_2;
 710
 711         if (channel >= CALIB_IL_TX_ATTEN_GR3_FCH &&
 712             channel <= CALIB_IL_TX_ATTEN_GR3_LCH)
 713                 return CALIB_CH_GROUP_3;
 714
 715         if (channel >= CALIB_IL_TX_ATTEN_GR4_FCH &&
 716             channel <= CALIB_IL_TX_ATTEN_GR4_LCH)
 717                 return CALIB_CH_GROUP_4;
 718
 719         return -EINVAL;
 720 }
 721
 722 static u32 il4965_get_sub_band(const struct il_priv *il, u32 channel)
 723 {
 724         s32 b = -1;
 725
 726         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 727                 if (il->calib_info->band_info[b].ch_from == 0)
 728                         continue;
 729
 730                 if (channel >= il->calib_info->band_info[b].ch_from &&
 731                     channel <= il->calib_info->band_info[b].ch_to)
 732                         break;
 733         }
 734
 735         return b;
 736 }
 737
 738 static s32 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 739 {
 740         s32 val;
 741
 742         if (x2 == x1)
 743                 return y1;
 744         else {
 745                 il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 746                 return val + y2;
 747         }
 748 }
 749
 750 /**
 751  * il4965_interpolate_chan - Interpolate factory measurements for one channel
 752  *
 753  * Interpolates factory measurements from the two sample channels within a
 754  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 755  * differences in channel frequencies, which is proportional to differences
 756  * in channel number.
 757  */
 758 static int il4965_interpolate_chan(struct il_priv *il, u32 channel,
 759                                     struct il_eeprom_calib_ch_info *chan_info)
 760 {
 761         s32 s = -1;
 762         u32 c;
 763         u32 m;
 764         const struct il_eeprom_calib_measure *m1;
 765         const struct il_eeprom_calib_measure *m2;
 766         struct il_eeprom_calib_measure *omeas;
 767         u32 ch_i1;
 768         u32 ch_i2;
 769
 770         s = il4965_get_sub_band(il, channel);
 771         if (s >= EEPROM_TX_POWER_BANDS) {
 772                 IL_ERR("Tx Power can not find channel %d\n", channel);
 773                 return -1;
 774         }
 775
 776         ch_i1 = il->calib_info->band_info[s].ch1.ch_num;
 777         ch_i2 = il->calib_info->band_info[s].ch2.ch_num;
 778         chan_info->ch_num = (u8) channel;
 779
 780         D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
 781                           channel, s, ch_i1, ch_i2);
 782
 783         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 784                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 785                         m1 = &(il->calib_info->band_info[s].ch1.
 786                                measurements[c][m]);
 787                         m2 = &(il->calib_info->band_info[s].ch2.
 788                                measurements[c][m]);
 789                         omeas = &(chan_info->measurements[c][m]);
 790
 791                         omeas->actual_pow =
 792                             (u8) il4965_interpolate_value(channel, ch_i1,
 793                                                            m1->actual_pow,
 794                                                            ch_i2,
 795                                                            m2->actual_pow);
 796                         omeas->gain_idx =
 797                             (u8) il4965_interpolate_value(channel, ch_i1,
 798                                                            m1->gain_idx, ch_i2,
 799                                                            m2->gain_idx);
 800                         omeas->temperature =
 801                             (u8) il4965_interpolate_value(channel, ch_i1,
 802                                                            m1->temperature,
 803                                                            ch_i2,
 804                                                            m2->temperature);
 805                         omeas->pa_det =
 806                             (s8) il4965_interpolate_value(channel, ch_i1,
 807                                                            m1->pa_det, ch_i2,
 808                                                            m2->pa_det);
 809
 810                         D_TXPOWER(
 811                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 812                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 813                         D_TXPOWER(
 814                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 815                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 816                         D_TXPOWER(
 817                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 818                                 m1->pa_det, m2->pa_det, omeas->pa_det);
 819                         D_TXPOWER(
 820                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 821                                 m1->temperature, m2->temperature,
 822                                 omeas->temperature);
 823                 }
 824         }
 825
 826         return 0;
 827 }
 828
 829 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
 830  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
 831 static s32 back_off_table[] = {
 832         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
 833         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
 834         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
 835         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
 836         10                      /* CCK */
 837 };
 838
 839 /* Thermal compensation values for txpower for various frequency ranges ...
 840  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
 841 static struct il4965_txpower_comp_entry {
 842         s32 degrees_per_05db_a;
 843         s32 degrees_per_05db_a_denom;
 844 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
 845         {9, 2},                 /* group 0 5.2, ch  34-43 */
 846         {4, 1},                 /* group 1 5.2, ch  44-70 */
 847         {4, 1},                 /* group 2 5.2, ch  71-124 */
 848         {4, 1},                 /* group 3 5.2, ch 125-200 */
 849         {3, 1}                  /* group 4 2.4, ch   all */
 850 };
 851
 852 static s32 get_min_power_idx(s32 rate_power_idx, u32 band)
 853 {
 854         if (!band) {
 855                 if ((rate_power_idx & 7) <= 4)
 856                         return MIN_TX_GAIN_IDX_52GHZ_EXT;
 857         }
 858         return MIN_TX_GAIN_IDX;
 859 }
 860
 861 struct gain_entry {
 862         u8 dsp;
 863         u8 radio;
 864 };
 865
 866 static const struct gain_entry gain_table[2][108] = {
 867         /* 5.2GHz power gain idx table */
 868         {
 869          {123, 0x3F},           /* highest txpower */
 870          {117, 0x3F},
 871          {110, 0x3F},
 872          {104, 0x3F},
 873          {98, 0x3F},
 874          {110, 0x3E},
 875          {104, 0x3E},
 876          {98, 0x3E},
 877          {110, 0x3D},
 878          {104, 0x3D},
 879          {98, 0x3D},
 880          {110, 0x3C},
 881          {104, 0x3C},
 882          {98, 0x3C},
 883          {110, 0x3B},
 884          {104, 0x3B},
 885          {98, 0x3B},
 886          {110, 0x3A},
 887          {104, 0x3A},
 888          {98, 0x3A},
 889          {110, 0x39},
 890          {104, 0x39},
 891          {98, 0x39},
 892          {110, 0x38},
 893          {104, 0x38},
 894          {98, 0x38},
 895          {110, 0x37},
 896          {104, 0x37},
 897          {98, 0x37},
 898          {110, 0x36},
 899          {104, 0x36},
 900          {98, 0x36},
 901          {110, 0x35},
 902          {104, 0x35},
 903          {98, 0x35},
 904          {110, 0x34},
 905          {104, 0x34},
 906          {98, 0x34},
 907          {110, 0x33},
 908          {104, 0x33},
 909          {98, 0x33},
 910          {110, 0x32},
 911          {104, 0x32},
 912          {98, 0x32},
 913          {110, 0x31},
 914          {104, 0x31},
 915          {98, 0x31},
 916          {110, 0x30},
 917          {104, 0x30},
 918          {98, 0x30},
 919          {110, 0x25},
 920          {104, 0x25},
 921          {98, 0x25},
 922          {110, 0x24},
 923          {104, 0x24},
 924          {98, 0x24},
 925          {110, 0x23},
 926          {104, 0x23},
 927          {98, 0x23},
 928          {110, 0x22},
 929          {104, 0x18},
 930          {98, 0x18},
 931          {110, 0x17},
 932          {104, 0x17},
 933          {98, 0x17},
 934          {110, 0x16},
 935          {104, 0x16},
 936          {98, 0x16},
 937          {110, 0x15},
 938          {104, 0x15},
 939          {98, 0x15},
 940          {110, 0x14},
 941          {104, 0x14},
 942          {98, 0x14},
 943          {110, 0x13},
 944          {104, 0x13},
 945          {98, 0x13},
 946          {110, 0x12},
 947          {104, 0x08},
 948          {98, 0x08},
 949          {110, 0x07},
 950          {104, 0x07},
 951          {98, 0x07},
 952          {110, 0x06},
 953          {104, 0x06},
 954          {98, 0x06},
 955          {110, 0x05},
 956          {104, 0x05},
 957          {98, 0x05},
 958          {110, 0x04},
 959          {104, 0x04},
 960          {98, 0x04},
 961          {110, 0x03},
 962          {104, 0x03},
 963          {98, 0x03},
 964          {110, 0x02},
 965          {104, 0x02},
 966          {98, 0x02},
 967          {110, 0x01},
 968          {104, 0x01},
 969          {98, 0x01},
 970          {110, 0x00},
 971          {104, 0x00},
 972          {98, 0x00},
 973          {93, 0x00},
 974          {88, 0x00},
 975          {83, 0x00},
 976          {78, 0x00},
 977          },
 978         /* 2.4GHz power gain idx table */
 979         {
 980          {110, 0x3f},           /* highest txpower */
 981          {104, 0x3f},
 982          {98, 0x3f},
 983          {110, 0x3e},
 984          {104, 0x3e},
 985          {98, 0x3e},
 986          {110, 0x3d},
 987          {104, 0x3d},
 988          {98, 0x3d},
 989          {110, 0x3c},
 990          {104, 0x3c},
 991          {98, 0x3c},
 992          {110, 0x3b},
 993          {104, 0x3b},
 994          {98, 0x3b},
 995          {110, 0x3a},
 996          {104, 0x3a},
 997          {98, 0x3a},
 998          {110, 0x39},
 999          {104, 0x39},
1000          {98, 0x39},
1001          {110, 0x38},
1002          {104, 0x38},
1003          {98, 0x38},
1004          {110, 0x37},
1005          {104, 0x37},
1006          {98, 0x37},
1007          {110, 0x36},
1008          {104, 0x36},
1009          {98, 0x36},
1010          {110, 0x35},
1011          {104, 0x35},
1012          {98, 0x35},
1013          {110, 0x34},
1014          {104, 0x34},
1015          {98, 0x34},
1016          {110, 0x33},
1017          {104, 0x33},
1018          {98, 0x33},
1019          {110, 0x32},
1020          {104, 0x32},
1021          {98, 0x32},
1022          {110, 0x31},
1023          {104, 0x31},
1024          {98, 0x31},
1025          {110, 0x30},
1026          {104, 0x30},
1027          {98, 0x30},
1028          {110, 0x6},
1029          {104, 0x6},
1030          {98, 0x6},
1031          {110, 0x5},
1032          {104, 0x5},
1033          {98, 0x5},
1034          {110, 0x4},
1035          {104, 0x4},
1036          {98, 0x4},
1037          {110, 0x3},
1038          {104, 0x3},
1039          {98, 0x3},
1040          {110, 0x2},
1041          {104, 0x2},
1042          {98, 0x2},
1043          {110, 0x1},
1044          {104, 0x1},
1045          {98, 0x1},
1046          {110, 0x0},
1047          {104, 0x0},
1048          {98, 0x0},
1049          {97, 0},
1050          {96, 0},
1051          {95, 0},
1052          {94, 0},
1053          {93, 0},
1054          {92, 0},
1055          {91, 0},
1056          {90, 0},
1057          {89, 0},
1058          {88, 0},
1059          {87, 0},
1060          {86, 0},
1061          {85, 0},
1062          {84, 0},
1063          {83, 0},
1064          {82, 0},
1065          {81, 0},
1066          {80, 0},
1067          {79, 0},
1068          {78, 0},
1069          {77, 0},
1070          {76, 0},
1071          {75, 0},
1072          {74, 0},
1073          {73, 0},
1074          {72, 0},
1075          {71, 0},
1076          {70, 0},
1077          {69, 0},
1078          {68, 0},
1079          {67, 0},
1080          {66, 0},
1081          {65, 0},
1082          {64, 0},
1083          {63, 0},
1084          {62, 0},
1085          {61, 0},
1086          {60, 0},
1087          {59, 0},
1088          }
1089 };
1090
1091 static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel,
1092                                     u8 is_ht40, u8 ctrl_chan_high,
1093                                     struct il4965_tx_power_db *tx_power_tbl)
1094 {
1095         u8 saturation_power;
1096         s32 target_power;
1097         s32 user_target_power;
1098         s32 power_limit;
1099         s32 current_temp;
1100         s32 reg_limit;
1101         s32 current_regulatory;
1102         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1103         int i;
1104         int c;
1105         const struct il_channel_info *ch_info = NULL;
1106         struct il_eeprom_calib_ch_info ch_eeprom_info;
1107         const struct il_eeprom_calib_measure *measurement;
1108         s16 voltage;
1109         s32 init_voltage;
1110         s32 voltage_compensation;
1111         s32 degrees_per_05db_num;
1112         s32 degrees_per_05db_denom;
1113         s32 factory_temp;
1114         s32 temperature_comp[2];
1115         s32 factory_gain_idx[2];
1116         s32 factory_actual_pwr[2];
1117         s32 power_idx;
1118
1119         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1120          *   are used for idxing into txpower table) */
1121         user_target_power = 2 * il->tx_power_user_lmt;
1122
1123         /* Get current (RXON) channel, band, width */
1124         D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band,
1125                           is_ht40);
1126
1127         ch_info = il_get_channel_info(il, il->band, channel);
1128
1129         if (!il_is_channel_valid(ch_info))
1130                 return -EINVAL;
1131
1132         /* get txatten group, used to select 1) thermal txpower adjustment
1133          *   and 2) mimo txpower balance between Tx chains. */
1134         txatten_grp = il4965_get_tx_atten_grp(channel);
1135         if (txatten_grp < 0) {
1136                 IL_ERR("Can't find txatten group for channel %d.\n",
1137                           channel);
1138                 return txatten_grp;
1139         }
1140
1141         D_TXPOWER("channel %d belongs to txatten group %d\n",
1142                           channel, txatten_grp);
1143
1144         if (is_ht40) {
1145                 if (ctrl_chan_high)
1146                         channel -= 2;
1147                 else
1148                         channel += 2;
1149         }
1150
1151         /* hardware txpower limits ...
1152          * saturation (clipping distortion) txpowers are in half-dBm */
1153         if (band)
1154                 saturation_power = il->calib_info->saturation_power24;
1155         else
1156                 saturation_power = il->calib_info->saturation_power52;
1157
1158         if (saturation_power < IL_TX_POWER_SATURATION_MIN ||
1159             saturation_power > IL_TX_POWER_SATURATION_MAX) {
1160                 if (band)
1161                         saturation_power = IL_TX_POWER_DEFAULT_SATURATION_24;
1162                 else
1163                         saturation_power = IL_TX_POWER_DEFAULT_SATURATION_52;
1164         }
1165
1166         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1167          *   max_power_avg values are in dBm, convert * 2 */
1168         if (is_ht40)
1169                 reg_limit = ch_info->ht40_max_power_avg * 2;
1170         else
1171                 reg_limit = ch_info->max_power_avg * 2;
1172
1173         if ((reg_limit < IL_TX_POWER_REGULATORY_MIN) ||
1174             (reg_limit > IL_TX_POWER_REGULATORY_MAX)) {
1175                 if (band)
1176                         reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_24;
1177                 else
1178                         reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_52;
1179         }
1180
1181         /* Interpolate txpower calibration values for this channel,
1182          *   based on factory calibration tests on spaced channels. */
1183         il4965_interpolate_chan(il, channel, &ch_eeprom_info);
1184
1185         /* calculate tx gain adjustment based on power supply voltage */
1186         voltage = le16_to_cpu(il->calib_info->voltage);
1187         init_voltage = (s32)le32_to_cpu(il->card_alive_init.voltage);
1188         voltage_compensation =
1189             il4965_get_voltage_compensation(voltage, init_voltage);
1190
1191         D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1192                           init_voltage,
1193                           voltage, voltage_compensation);
1194
1195         /* get current temperature (Celsius) */
1196         current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN);
1197         current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX);
1198         current_temp = KELVIN_TO_CELSIUS(current_temp);
1199
1200         /* select thermal txpower adjustment params, based on channel group
1201          *   (same frequency group used for mimo txatten adjustment) */
1202         degrees_per_05db_num =
1203             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1204         degrees_per_05db_denom =
1205             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1206
1207         /* get per-chain txpower values from factory measurements */
1208         for (c = 0; c < 2; c++) {
1209                 measurement = &ch_eeprom_info.measurements[c][1];
1210
1211                 /* txgain adjustment (in half-dB steps) based on difference
1212                  *   between factory and current temperature */
1213                 factory_temp = measurement->temperature;
1214                 il4965_math_div_round((current_temp - factory_temp) *
1215                                        degrees_per_05db_denom,
1216                                        degrees_per_05db_num,
1217                                        &temperature_comp[c]);
1218
1219                 factory_gain_idx[c] = measurement->gain_idx;
1220                 factory_actual_pwr[c] = measurement->actual_pow;
1221
1222                 D_TXPOWER("chain = %d\n", c);
1223                 D_TXPOWER("fctry tmp %d, "
1224                                   "curr tmp %d, comp %d steps\n",
1225                                   factory_temp, current_temp,
1226                                   temperature_comp[c]);
1227
1228                 D_TXPOWER("fctry idx %d, fctry pwr %d\n",
1229                                   factory_gain_idx[c],
1230                                   factory_actual_pwr[c]);
1231         }
1232
1233         /* for each of 33 bit-rates (including 1 for CCK) */
1234         for (i = 0; i < POWER_TBL_NUM_ENTRIES; i++) {
1235                 u8 is_mimo_rate;
1236                 union il4965_tx_power_dual_stream tx_power;
1237
1238                 /* for mimo, reduce each chain's txpower by half
1239                  * (3dB, 6 steps), so total output power is regulatory
1240                  * compliant. */
1241                 if (i & 0x8) {
1242                         current_regulatory = reg_limit -
1243                             IL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1244                         is_mimo_rate = 1;
1245                 } else {
1246                         current_regulatory = reg_limit;
1247                         is_mimo_rate = 0;
1248                 }
1249
1250                 /* find txpower limit, either hardware or regulatory */
1251                 power_limit = saturation_power - back_off_table[i];
1252                 if (power_limit > current_regulatory)
1253                         power_limit = current_regulatory;
1254
1255                 /* reduce user's txpower request if necessary
1256                  * for this rate on this channel */
1257                 target_power = user_target_power;
1258                 if (target_power > power_limit)
1259                         target_power = power_limit;
1260
1261                 D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1262                                   i, saturation_power - back_off_table[i],
1263                                   current_regulatory, user_target_power,
1264                                   target_power);
1265
1266                 /* for each of 2 Tx chains (radio transmitters) */
1267                 for (c = 0; c < 2; c++) {
1268                         s32 atten_value;
1269
1270                         if (is_mimo_rate)
1271                                 atten_value =
1272                                     (s32)le32_to_cpu(il->card_alive_init.
1273                                     tx_atten[txatten_grp][c]);
1274                         else
1275                                 atten_value = 0;
1276
1277                         /* calculate idx; higher idx means lower txpower */
1278                         power_idx = (u8) (factory_gain_idx[c] -
1279                                             (target_power -
1280                                              factory_actual_pwr[c]) -
1281                                             temperature_comp[c] -
1282                                             voltage_compensation +
1283                                             atten_value);
1284
1285 /*                      D_TXPOWER("calculated txpower idx %d\n",
1286                                                 power_idx); */
1287
1288                         if (power_idx < get_min_power_idx(i, band))
1289                                 power_idx = get_min_power_idx(i, band);
1290
1291                         /* adjust 5 GHz idx to support negative idxes */
1292                         if (!band)
1293                                 power_idx += 9;
1294
1295                         /* CCK, rate 32, reduce txpower for CCK */
1296                         if (i == POWER_TBL_CCK_ENTRY)
1297                                 power_idx +=
1298                                     IL_TX_POWER_CCK_COMPENSATION_C_STEP;
1299
1300                         /* stay within the table! */
1301                         if (power_idx > 107) {
1302                                 IL_WARN("txpower idx %d > 107\n",
1303                                             power_idx);
1304                                 power_idx = 107;
1305                         }
1306                         if (power_idx < 0) {
1307                                 IL_WARN("txpower idx %d < 0\n",
1308                                             power_idx);
1309                                 power_idx = 0;
1310                         }
1311
1312                         /* fill txpower command for this rate/chain */
1313                         tx_power.s.radio_tx_gain[c] =
1314                                 gain_table[band][power_idx].radio;
1315                         tx_power.s.dsp_predis_atten[c] =
1316                                 gain_table[band][power_idx].dsp;
1317
1318                         D_TXPOWER("chain %d mimo %d idx %d "
1319                                           "gain 0x%02x dsp %d\n",
1320                                           c, atten_value, power_idx,
1321                                         tx_power.s.radio_tx_gain[c],
1322                                         tx_power.s.dsp_predis_atten[c]);
1323                 } /* for each chain */
1324
1325                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1326
1327         } /* for each rate */
1328
1329         return 0;
1330 }
1331
1332 /**
1333  * il4965_send_tx_power - Configure the TXPOWER level user limit
1334  *
1335  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1336  * The power limit is taken from il->tx_power_user_lmt.
1337  */
1338 static int il4965_send_tx_power(struct il_priv *il)
1339 {
1340         struct il4965_txpowertable_cmd cmd = { 0 };
1341         int ret;
1342         u8 band = 0;
1343         bool is_ht40 = false;
1344         u8 ctrl_chan_high = 0;
1345         struct il_rxon_context *ctx = &il->ctx;
1346
1347         if (WARN_ONCE(test_bit(S_SCAN_HW, &il->status),
1348                       "TX Power requested while scanning!\n"))
1349                 return -EAGAIN;
1350
1351         band = il->band == IEEE80211_BAND_2GHZ;
1352
1353         is_ht40 = iw4965_is_ht40_channel(ctx->active.flags);
1354
1355         if (is_ht40 && (ctx->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1356                 ctrl_chan_high = 1;
1357
1358         cmd.band = band;
1359         cmd.channel = ctx->active.channel;
1360
1361         ret = il4965_fill_txpower_tbl(il, band,
1362                                 le16_to_cpu(ctx->active.channel),
1363                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1364         if (ret)
1365                 goto out;
1366
1367         ret = il_send_cmd_pdu(il,
1368                          C_TX_PWR_TBL, sizeof(cmd), &cmd);
1369
1370 out:
1371         return ret;
1372 }
1373
1374 static int il4965_send_rxon_assoc(struct il_priv *il,
1375                                    struct il_rxon_context *ctx)
1376 {
1377         int ret = 0;
1378         struct il4965_rxon_assoc_cmd rxon_assoc;
1379         const struct il_rxon_cmd *rxon1 = &ctx->staging;
1380         const struct il_rxon_cmd *rxon2 = &ctx->active;
1381
1382         if (rxon1->flags == rxon2->flags &&
1383             rxon1->filter_flags == rxon2->filter_flags &&
1384             rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
1385             rxon1->ofdm_ht_single_stream_basic_rates ==
1386                 rxon2->ofdm_ht_single_stream_basic_rates &&
1387             rxon1->ofdm_ht_dual_stream_basic_rates ==
1388                 rxon2->ofdm_ht_dual_stream_basic_rates &&
1389             rxon1->rx_chain == rxon2->rx_chain &&
1390             rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
1391                 D_INFO("Using current RXON_ASSOC.  Not resending.\n");
1392                 return 0;
1393         }
1394
1395         rxon_assoc.flags = ctx->staging.flags;
1396         rxon_assoc.filter_flags = ctx->staging.filter_flags;
1397         rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
1398         rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
1399         rxon_assoc.reserved = 0;
1400         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1401             ctx->staging.ofdm_ht_single_stream_basic_rates;
1402         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1403             ctx->staging.ofdm_ht_dual_stream_basic_rates;
1404         rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain;
1405
1406         ret = il_send_cmd_pdu_async(il, C_RXON_ASSOC,
1407                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1408
1409         return ret;
1410 }
1411
1412 static int il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx)
1413 {
1414         /* cast away the const for active_rxon in this function */
1415         struct il_rxon_cmd *active_rxon = (void *)&ctx->active;
1416         int ret;
1417         bool new_assoc =
1418                 !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1419
1420         if (!il_is_alive(il))
1421                 return -EBUSY;
1422
1423         if (!ctx->is_active)
1424                 return 0;
1425
1426         /* always get timestamp with Rx frame */
1427         ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1428
1429         ret = il_check_rxon_cmd(il, ctx);
1430         if (ret) {
1431                 IL_ERR("Invalid RXON configuration.  Not committing.\n");
1432                 return -EINVAL;
1433         }
1434
1435         /*
1436          * receive commit_rxon request
1437          * abort any previous channel switch if still in process
1438          */
1439         if (test_bit(S_CHANNEL_SWITCH_PENDING, &il->status) &&
1440             il->switch_channel != ctx->staging.channel) {
1441                 D_11H("abort channel switch on %d\n",
1442                       le16_to_cpu(il->switch_channel));
1443                 il_chswitch_done(il, false);
1444         }
1445
1446         /* If we don't need to send a full RXON, we can use
1447          * il_rxon_assoc_cmd which is used to reconfigure filter
1448          * and other flags for the current radio configuration. */
1449         if (!il_full_rxon_required(il, ctx)) {
1450                 ret = il_send_rxon_assoc(il, ctx);
1451                 if (ret) {
1452                         IL_ERR("Error setting RXON_ASSOC (%d)\n", ret);
1453                         return ret;
1454                 }
1455
1456                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1457                 il_print_rx_config_cmd(il, ctx);
1458                 /*
1459                  * We do not commit tx power settings while channel changing,
1460                  * do it now if tx power changed.
1461                  */
1462                 il_set_tx_power(il, il->tx_power_next, false);
1463                 return 0;
1464         }
1465
1466         /* If we are currently associated and the new config requires
1467          * an RXON_ASSOC and the new config wants the associated mask enabled,
1468          * we must clear the associated from the active configuration
1469          * before we apply the new config */
1470         if (il_is_associated_ctx(ctx) && new_assoc) {
1471                 D_INFO("Toggling associated bit on current RXON\n");
1472                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1473
1474                 ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
1475                                        sizeof(struct il_rxon_cmd),
1476                                        active_rxon);
1477
1478                 /* If the mask clearing failed then we set
1479                  * active_rxon back to what it was previously */
1480                 if (ret) {
1481                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1482                         IL_ERR("Error clearing ASSOC_MSK (%d)\n", ret);
1483                         return ret;
1484                 }
1485                 il_clear_ucode_stations(il, ctx);
1486                 il_restore_stations(il, ctx);
1487                 ret = il4965_restore_default_wep_keys(il, ctx);
1488                 if (ret) {
1489                         IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1490                         return ret;
1491                 }
1492         }
1493
1494         D_INFO("Sending RXON\n"
1495                        "* with%s RXON_FILTER_ASSOC_MSK\n"
1496                        "* channel = %d\n"
1497                        "* bssid = %pM\n",
1498                        (new_assoc ? "" : "out"),
1499                        le16_to_cpu(ctx->staging.channel),
1500                        ctx->staging.bssid_addr);
1501
1502         il_set_rxon_hwcrypto(il, ctx,
1503                                 !il->cfg->mod_params->sw_crypto);
1504
1505         /* Apply the new configuration
1506          * RXON unassoc clears the station table in uCode so restoration of
1507          * stations is needed after it (the RXON command) completes
1508          */
1509         if (!new_assoc) {
1510                 ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
1511                               sizeof(struct il_rxon_cmd), &ctx->staging);
1512                 if (ret) {
1513                         IL_ERR("Error setting new RXON (%d)\n", ret);
1514                         return ret;
1515                 }
1516                 D_INFO("Return from !new_assoc RXON.\n");
1517                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1518                 il_clear_ucode_stations(il, ctx);
1519                 il_restore_stations(il, ctx);
1520                 ret = il4965_restore_default_wep_keys(il, ctx);
1521                 if (ret) {
1522                         IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1523                         return ret;
1524                 }
1525         }
1526         if (new_assoc) {
1527                 il->start_calib = 0;
1528                 /* Apply the new configuration
1529                  * RXON assoc doesn't clear the station table in uCode,
1530                  */
1531                 ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
1532                               sizeof(struct il_rxon_cmd), &ctx->staging);
1533                 if (ret) {
1534                         IL_ERR("Error setting new RXON (%d)\n", ret);
1535                         return ret;
1536                 }
1537                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1538         }
1539         il_print_rx_config_cmd(il, ctx);
1540
1541         il4965_init_sensitivity(il);
1542
1543         /* If we issue a new RXON command which required a tune then we must
1544          * send a new TXPOWER command or we won't be able to Tx any frames */
1545         ret = il_set_tx_power(il, il->tx_power_next, true);
1546         if (ret) {
1547                 IL_ERR("Error sending TX power (%d)\n", ret);
1548                 return ret;
1549         }
1550
1551         return 0;
1552 }
1553
1554 static int il4965_hw_channel_switch(struct il_priv *il,
1555                                      struct ieee80211_channel_switch *ch_switch)
1556 {
1557         struct il_rxon_context *ctx = &il->ctx;
1558         int rc;
1559         u8 band = 0;
1560         bool is_ht40 = false;
1561         u8 ctrl_chan_high = 0;
1562         struct il4965_channel_switch_cmd cmd;
1563         const struct il_channel_info *ch_info;
1564         u32 switch_time_in_usec, ucode_switch_time;
1565         u16 ch;
1566         u32 tsf_low;
1567         u8 switch_count;
1568         u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
1569         struct ieee80211_vif *vif = ctx->vif;
1570         band = il->band == IEEE80211_BAND_2GHZ;
1571
1572         is_ht40 = iw4965_is_ht40_channel(ctx->staging.flags);
1573
1574         if (is_ht40 &&
1575             (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1576                 ctrl_chan_high = 1;
1577
1578         cmd.band = band;
1579         cmd.expect_beacon = 0;
1580         ch = ch_switch->channel->hw_value;
1581         cmd.channel = cpu_to_le16(ch);
1582         cmd.rxon_flags = ctx->staging.flags;
1583         cmd.rxon_filter_flags = ctx->staging.filter_flags;
1584         switch_count = ch_switch->count;
1585         tsf_low = ch_switch->timestamp & 0x0ffffffff;
1586         /*
1587          * calculate the ucode channel switch time
1588          * adding TSF as one of the factor for when to switch
1589          */
1590         if (il->ucode_beacon_time > tsf_low && beacon_interval) {
1591                 if (switch_count > ((il->ucode_beacon_time - tsf_low) /
1592                     beacon_interval)) {
1593                         switch_count -= (il->ucode_beacon_time -
1594                                 tsf_low) / beacon_interval;
1595                 } else
1596                         switch_count = 0;
1597         }
1598         if (switch_count <= 1)
1599                 cmd.switch_time = cpu_to_le32(il->ucode_beacon_time);
1600         else {
1601                 switch_time_in_usec =
1602                         vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
1603                 ucode_switch_time = il_usecs_to_beacons(il,
1604                                                          switch_time_in_usec,
1605                                                          beacon_interval);
1606                 cmd.switch_time = il_add_beacon_time(il,
1607                                                       il->ucode_beacon_time,
1608                                                       ucode_switch_time,
1609                                                       beacon_interval);
1610         }
1611         D_11H("uCode time for the switch is 0x%x\n",
1612                       cmd.switch_time);
1613         ch_info = il_get_channel_info(il, il->band, ch);
1614         if (ch_info)
1615                 cmd.expect_beacon = il_is_channel_radar(ch_info);
1616         else {
1617                 IL_ERR("invalid channel switch from %u to %u\n",
1618                         ctx->active.channel, ch);
1619                 return -EFAULT;
1620         }
1621
1622         rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40,
1623                                       ctrl_chan_high, &cmd.tx_power);
1624         if (rc) {
1625                 D_11H("error:%d  fill txpower_tbl\n", rc);
1626                 return rc;
1627         }
1628
1629         return il_send_cmd_pdu(il,
1630                          C_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1631 }
1632
1633 /**
1634  * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1635  */
1636 static void il4965_txq_update_byte_cnt_tbl(struct il_priv *il,
1637                                             struct il_tx_queue *txq,
1638                                             u16 byte_cnt)
1639 {
1640         struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr;
1641         int txq_id = txq->q.id;
1642         int write_ptr = txq->q.write_ptr;
1643         int len = byte_cnt + IL_TX_CRC_SIZE + IL_TX_DELIMITER_SIZE;
1644         __le16 bc_ent;
1645
1646         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1647
1648         bc_ent = cpu_to_le16(len & 0xFFF);
1649         /* Set up byte count within first 256 entries */
1650         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1651
1652         /* If within first 64 entries, duplicate at end */
1653         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1654                 scd_bc_tbl[txq_id].
1655                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1656 }
1657
1658 /**
1659  * il4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1660  * @stats: Provides the temperature reading from the uCode
1661  *
1662  * A return of <0 indicates bogus data in the stats
1663  */
1664 static int il4965_hw_get_temperature(struct il_priv *il)
1665 {
1666         s32 temperature;
1667         s32 vt;
1668         s32 R1, R2, R3;
1669         u32 R4;
1670
1671         if (test_bit(S_TEMPERATURE, &il->status) &&
1672             (il->_4965.stats.flag &
1673                         STATS_REPLY_FLG_HT40_MODE_MSK)) {
1674                 D_TEMP("Running HT40 temperature calibration\n");
1675                 R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[1]);
1676                 R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[1]);
1677                 R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[1]);
1678                 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]);
1679         } else {
1680                 D_TEMP("Running temperature calibration\n");
1681                 R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[0]);
1682                 R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[0]);
1683                 R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[0]);
1684                 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]);
1685         }
1686
1687         /*
1688          * Temperature is only 23 bits, so sign extend out to 32.
1689          *
1690          * NOTE If we haven't received a stats notification yet
1691          * with an updated temperature, use R4 provided to us in the
1692          * "initialize" ALIVE response.
1693          */
1694         if (!test_bit(S_TEMPERATURE, &il->status))
1695                 vt = sign_extend32(R4, 23);
1696         else
1697                 vt = sign_extend32(le32_to_cpu(il->_4965.stats.
1698                                  general.common.temperature), 23);
1699
1700         D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1701
1702         if (R3 == R1) {
1703                 IL_ERR("Calibration conflict R1 == R3\n");
1704                 return -1;
1705         }
1706
1707         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1708          * Add offset to center the adjustment around 0 degrees Centigrade. */
1709         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1710         temperature /= (R3 - R1);
1711         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1712
1713         D_TEMP("Calibrated temperature: %dK, %dC\n",
1714                         temperature, KELVIN_TO_CELSIUS(temperature));
1715
1716         return temperature;
1717 }
1718
1719 /* Adjust Txpower only if temperature variance is greater than threshold. */
1720 #define IL_TEMPERATURE_THRESHOLD   3
1721
1722 /**
1723  * il4965_is_temp_calib_needed - determines if new calibration is needed
1724  *
1725  * If the temperature changed has changed sufficiently, then a recalibration
1726  * is needed.
1727  *
1728  * Assumes caller will replace il->last_temperature once calibration
1729  * executed.
1730  */
1731 static int il4965_is_temp_calib_needed(struct il_priv *il)
1732 {
1733         int temp_diff;
1734
1735         if (!test_bit(S_STATS, &il->status)) {
1736                 D_TEMP("Temperature not updated -- no stats.\n");
1737                 return 0;
1738         }
1739
1740         temp_diff = il->temperature - il->last_temperature;
1741
1742         /* get absolute value */
1743         if (temp_diff < 0) {
1744                 D_POWER("Getting cooler, delta %d\n", temp_diff);
1745                 temp_diff = -temp_diff;
1746         } else if (temp_diff == 0)
1747                 D_POWER("Temperature unchanged\n");
1748         else
1749                 D_POWER("Getting warmer, delta %d\n", temp_diff);
1750
1751         if (temp_diff < IL_TEMPERATURE_THRESHOLD) {
1752                 D_POWER(" => thermal txpower calib not needed\n");
1753                 return 0;
1754         }
1755
1756         D_POWER(" => thermal txpower calib needed\n");
1757
1758         return 1;
1759 }
1760
1761 static void il4965_temperature_calib(struct il_priv *il)
1762 {
1763         s32 temp;
1764
1765         temp = il4965_hw_get_temperature(il);
1766         if (IL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp))
1767                 return;
1768
1769         if (il->temperature != temp) {
1770                 if (il->temperature)
1771                         D_TEMP("Temperature changed "
1772                                        "from %dC to %dC\n",
1773                                        KELVIN_TO_CELSIUS(il->temperature),
1774                                        KELVIN_TO_CELSIUS(temp));
1775                 else
1776                         D_TEMP("Temperature "
1777                                        "initialized to %dC\n",
1778                                        KELVIN_TO_CELSIUS(temp));
1779         }
1780
1781         il->temperature = temp;
1782         set_bit(S_TEMPERATURE, &il->status);
1783
1784         if (!il->disable_tx_power_cal &&
1785              unlikely(!test_bit(S_SCANNING, &il->status)) &&
1786              il4965_is_temp_calib_needed(il))
1787                 queue_work(il->workqueue, &il->txpower_work);
1788 }
1789
1790 static u16 il4965_get_hcmd_size(u8 cmd_id, u16 len)
1791 {
1792         switch (cmd_id) {
1793         case C_RXON:
1794                 return (u16) sizeof(struct il4965_rxon_cmd);
1795         default:
1796                 return len;
1797         }
1798 }
1799
1800 static u16 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd,
1801                                                                 u8 *data)
1802 {
1803         struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data;
1804         addsta->mode = cmd->mode;
1805         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1806         memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
1807         addsta->station_flags = cmd->station_flags;
1808         addsta->station_flags_msk = cmd->station_flags_msk;
1809         addsta->tid_disable_tx = cmd->tid_disable_tx;
1810         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1811         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1812         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1813         addsta->sleep_tx_count = cmd->sleep_tx_count;
1814         addsta->reserved1 = cpu_to_le16(0);
1815         addsta->reserved2 = cpu_to_le16(0);
1816
1817         return (u16)sizeof(struct il4965_addsta_cmd);
1818 }
1819
1820 static inline u32 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp)
1821 {
1822         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1823 }
1824
1825 static inline u32 il4965_tx_status_to_mac80211(u32 status)
1826 {
1827         status &= TX_STATUS_MSK;
1828
1829         switch (status) {
1830         case TX_STATUS_SUCCESS:
1831         case TX_STATUS_DIRECT_DONE:
1832                 return IEEE80211_TX_STAT_ACK;
1833         case TX_STATUS_FAIL_DEST_PS:
1834                 return IEEE80211_TX_STAT_TX_FILTERED;
1835         default:
1836                 return 0;
1837         }
1838 }
1839
1840 static inline bool il4965_is_tx_success(u32 status)
1841 {
1842         status &= TX_STATUS_MSK;
1843         return (status == TX_STATUS_SUCCESS ||
1844                 status == TX_STATUS_DIRECT_DONE);
1845 }
1846
1847 /**
1848  * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1849  */
1850 static int il4965_tx_status_reply_tx(struct il_priv *il,
1851                                       struct il_ht_agg *agg,
1852                                       struct il4965_tx_resp *tx_resp,
1853                                       int txq_id, u16 start_idx)
1854 {
1855         u16 status;
1856         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1857         struct ieee80211_tx_info *info = NULL;
1858         struct ieee80211_hdr *hdr = NULL;
1859         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1860         int i, sh, idx;
1861         u16 seq;
1862         if (agg->wait_for_ba)
1863                 D_TX_REPLY("got tx response w/o block-ack\n");
1864
1865         agg->frame_count = tx_resp->frame_count;
1866         agg->start_idx = start_idx;
1867         agg->rate_n_flags = rate_n_flags;
1868         agg->bitmap = 0;
1869
1870         /* num frames attempted by Tx command */
1871         if (agg->frame_count == 1) {
1872                 /* Only one frame was attempted; no block-ack will arrive */
1873                 status = le16_to_cpu(frame_status[0].status);
1874                 idx = start_idx;
1875
1876                 D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
1877                                    agg->frame_count, agg->start_idx, idx);
1878
1879                 info = IEEE80211_SKB_CB(il->txq[txq_id].txb[idx].skb);
1880                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1881                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1882                 info->flags |= il4965_tx_status_to_mac80211(status);
1883                 il4965_hwrate_to_tx_control(il, rate_n_flags, info);
1884
1885                 D_TX_REPLY("1 Frame 0x%x failure :%d\n",
1886                                     status & 0xff, tx_resp->failure_frame);
1887                 D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
1888
1889                 agg->wait_for_ba = 0;
1890         } else {
1891                 /* Two or more frames were attempted; expect block-ack */
1892                 u64 bitmap = 0;
1893                 int start = agg->start_idx;
1894
1895                 /* Construct bit-map of pending frames within Tx win */
1896                 for (i = 0; i < agg->frame_count; i++) {
1897                         u16 sc;
1898                         status = le16_to_cpu(frame_status[i].status);
1899                         seq  = le16_to_cpu(frame_status[i].sequence);
1900                         idx = SEQ_TO_IDX(seq);
1901                         txq_id = SEQ_TO_QUEUE(seq);
1902
1903                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1904                                       AGG_TX_STATE_ABORT_MSK))
1905                                 continue;
1906
1907                         D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
1908                                            agg->frame_count, txq_id, idx);
1909
1910                         hdr = il_tx_queue_get_hdr(il, txq_id, idx);
1911                         if (!hdr) {
1912                                 IL_ERR(
1913                                         "BUG_ON idx doesn't point to valid skb"
1914                                         " idx=%d, txq_id=%d\n", idx, txq_id);
1915                                 return -1;
1916                         }
1917
1918                         sc = le16_to_cpu(hdr->seq_ctrl);
1919                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1920                                 IL_ERR(
1921                                         "BUG_ON idx doesn't match seq control"
1922                                         " idx=%d, seq_idx=%d, seq=%d\n",
1923                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
1924                                 return -1;
1925                         }
1926
1927                         D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
1928                                            i, idx, SEQ_TO_SN(sc));
1929
1930                         sh = idx - start;
1931                         if (sh > 64) {
1932                                 sh = (start - idx) + 0xff;
1933                                 bitmap = bitmap << sh;
1934                                 sh = 0;
1935                                 start = idx;
1936                         } else if (sh < -64)
1937                                 sh  = 0xff - (start - idx);
1938                         else if (sh < 0) {
1939                                 sh = start - idx;
1940                                 start = idx;
1941                                 bitmap = bitmap << sh;
1942                                 sh = 0;
1943                         }
1944                         bitmap |= 1ULL << sh;
1945                         D_TX_REPLY("start=%d bitmap=0x%llx\n",
1946                                            start, (unsigned long long)bitmap);
1947                 }
1948
1949                 agg->bitmap = bitmap;
1950                 agg->start_idx = start;
1951                 D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
1952                                    agg->frame_count, agg->start_idx,
1953                                    (unsigned long long)agg->bitmap);
1954
1955                 if (bitmap)
1956                         agg->wait_for_ba = 1;
1957         }
1958         return 0;
1959 }
1960
1961 static u8 il4965_find_station(struct il_priv *il, const u8 *addr)
1962 {
1963         int i;
1964         int start = 0;
1965         int ret = IL_INVALID_STATION;
1966         unsigned long flags;
1967
1968         if ((il->iw_mode == NL80211_IFTYPE_ADHOC))
1969                 start = IL_STA_ID;
1970
1971         if (is_broadcast_ether_addr(addr))
1972                 return il->ctx.bcast_sta_id;
1973
1974         spin_lock_irqsave(&il->sta_lock, flags);
1975         for (i = start; i < il->hw_params.max_stations; i++)
1976                 if (il->stations[i].used &&
1977                     (!compare_ether_addr(il->stations[i].sta.sta.addr,
1978                                          addr))) {
1979                         ret = i;
1980                         goto out;
1981                 }
1982
1983         D_ASSOC("can not find STA %pM total %d\n",
1984                               addr, il->num_stations);
1985
1986  out:
1987         /*
1988          * It may be possible that more commands interacting with stations
1989          * arrive before we completed processing the adding of
1990          * station
1991          */
1992         if (ret != IL_INVALID_STATION &&
1993             (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) ||
1994              ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) &&
1995               (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) {
1996                 IL_ERR("Requested station info for sta %d before ready.\n",
1997                         ret);
1998                 ret = IL_INVALID_STATION;
1999         }
2000         spin_unlock_irqrestore(&il->sta_lock, flags);
2001         return ret;
2002 }
2003
2004 static int il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr)
2005 {
2006         if (il->iw_mode == NL80211_IFTYPE_STATION) {
2007                 return IL_AP_ID;
2008         } else {
2009                 u8 *da = ieee80211_get_DA(hdr);
2010                 return il4965_find_station(il, da);
2011         }
2012 }
2013
2014 /**
2015  * il4965_hdl_tx - Handle standard (non-aggregation) Tx response
2016  */
2017 static void il4965_hdl_tx(struct il_priv *il,
2018                                 struct il_rx_buf *rxb)
2019 {
2020         struct il_rx_pkt *pkt = rxb_addr(rxb);
2021         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2022         int txq_id = SEQ_TO_QUEUE(sequence);
2023         int idx = SEQ_TO_IDX(sequence);
2024         struct il_tx_queue *txq = &il->txq[txq_id];
2025         struct ieee80211_hdr *hdr;
2026         struct ieee80211_tx_info *info;
2027         struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2028         u32  status = le32_to_cpu(tx_resp->u.status);
2029         int uninitialized_var(tid);
2030         int sta_id;
2031         int freed;
2032         u8 *qc = NULL;
2033         unsigned long flags;
2034
2035         if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
2036                 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
2037                           "is out of range [0-%d] %d %d\n", txq_id,
2038                           idx, txq->q.n_bd, txq->q.write_ptr,
2039                           txq->q.read_ptr);
2040                 return;
2041         }
2042
2043         txq->time_stamp = jiffies;
2044         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
2045         memset(&info->status, 0, sizeof(info->status));
2046
2047         hdr = il_tx_queue_get_hdr(il, txq_id, idx);
2048         if (ieee80211_is_data_qos(hdr->frame_control)) {
2049                 qc = ieee80211_get_qos_ctl(hdr);
2050                 tid = qc[0] & 0xf;
2051         }
2052
2053         sta_id = il4965_get_ra_sta_id(il, hdr);
2054         if (txq->sched_retry && unlikely(sta_id == IL_INVALID_STATION)) {
2055                 IL_ERR("Station not known\n");
2056                 return;
2057         }
2058
2059         spin_lock_irqsave(&il->sta_lock, flags);
2060         if (txq->sched_retry) {
2061                 const u32 scd_ssn = il4965_get_scd_ssn(tx_resp);
2062                 struct il_ht_agg *agg = NULL;
2063                 WARN_ON(!qc);
2064
2065                 agg = &il->stations[sta_id].tid[tid].agg;
2066
2067                 il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
2068
2069                 /* check if BAR is needed */
2070                 if ((tx_resp->frame_count == 1) && !il4965_is_tx_success(status))
2071                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2072
2073                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2074                         idx = il_queue_dec_wrap(scd_ssn & 0xff,
2075                                                                 txq->q.n_bd);
2076                         D_TX_REPLY("Retry scheduler reclaim scd_ssn "
2077                                            "%d idx %d\n", scd_ssn , idx);
2078                         freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2079                         if (qc)
2080                                 il4965_free_tfds_in_queue(il, sta_id,
2081                                                        tid, freed);
2082
2083                         if (il->mac80211_registered &&
2084                             il_queue_space(&txq->q) > txq->q.low_mark &&
2085                             agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2086                                 il_wake_queue(il, txq);
2087                 }
2088         } else {
2089                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2090                 info->flags |= il4965_tx_status_to_mac80211(status);
2091                 il4965_hwrate_to_tx_control(il,
2092                                         le32_to_cpu(tx_resp->rate_n_flags),
2093                                         info);
2094
2095                 D_TX_REPLY("TXQ %d status %s (0x%08x) "
2096                                    "rate_n_flags 0x%x retries %d\n",
2097                                    txq_id,
2098                                    il4965_get_tx_fail_reason(status), status,
2099                                    le32_to_cpu(tx_resp->rate_n_flags),
2100                                    tx_resp->failure_frame);
2101
2102                 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2103                 if (qc && likely(sta_id != IL_INVALID_STATION))
2104                         il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2105                 else if (sta_id == IL_INVALID_STATION)
2106                         D_TX_REPLY("Station not known\n");
2107
2108                 if (il->mac80211_registered &&
2109                     il_queue_space(&txq->q) > txq->q.low_mark)
2110                         il_wake_queue(il, txq);
2111         }
2112         if (qc && likely(sta_id != IL_INVALID_STATION))
2113                 il4965_txq_check_empty(il, sta_id, tid, txq_id);
2114
2115         il4965_check_abort_status(il, tx_resp->frame_count, status);
2116
2117         spin_unlock_irqrestore(&il->sta_lock, flags);
2118 }
2119
2120 static void il4965_hdl_beacon(struct il_priv *il,
2121                                     struct il_rx_buf *rxb)
2122 {
2123         struct il_rx_pkt *pkt = rxb_addr(rxb);
2124         struct il4965_beacon_notif *beacon = (void *)pkt->u.raw;
2125         u8 rate __maybe_unused =
2126                 il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
2127
2128         D_RX("beacon status %#x, retries:%d ibssmgr:%d "
2129                 "tsf:0x%.8x%.8x rate:%d\n",
2130                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
2131                 beacon->beacon_notify_hdr.failure_frame,
2132                 le32_to_cpu(beacon->ibss_mgr_status),
2133                 le32_to_cpu(beacon->high_tsf),
2134                 le32_to_cpu(beacon->low_tsf), rate);
2135
2136         il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
2137 }
2138
2139 /* Set up 4965-specific Rx frame reply handlers */
2140 static void il4965_handler_setup(struct il_priv *il)
2141 {
2142         /* Legacy Rx frames */
2143         il->handlers[N_RX] = il4965_hdl_rx;
2144         /* Tx response */
2145         il->handlers[C_TX] = il4965_hdl_tx;
2146         il->handlers[N_BEACON] = il4965_hdl_beacon;
2147 }
2148
2149 static struct il_hcmd_ops il4965_hcmd = {
2150         .rxon_assoc = il4965_send_rxon_assoc,
2151         .commit_rxon = il4965_commit_rxon,
2152         .set_rxon_chain = il4965_set_rxon_chain,
2153 };
2154
2155 static void il4965_post_scan(struct il_priv *il)
2156 {
2157         struct il_rxon_context *ctx = &il->ctx;
2158
2159         /*
2160          * Since setting the RXON may have been deferred while
2161          * performing the scan, fire one off if needed
2162          */
2163         if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
2164                 il_commit_rxon(il, ctx);
2165 }
2166
2167 static void il4965_post_associate(struct il_priv *il)
2168 {
2169         struct il_rxon_context *ctx = &il->ctx;
2170         struct ieee80211_vif *vif = ctx->vif;
2171         struct ieee80211_conf *conf = NULL;
2172         int ret = 0;
2173
2174         if (!vif || !il->is_open)
2175                 return;
2176
2177         if (test_bit(S_EXIT_PENDING, &il->status))
2178                 return;
2179
2180         il_scan_cancel_timeout(il, 200);
2181
2182         conf = &il->hw->conf;
2183
2184         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2185         il_commit_rxon(il, ctx);
2186
2187         ret = il_send_rxon_timing(il, ctx);
2188         if (ret)
2189                 IL_WARN("RXON timing - "
2190                             "Attempting to continue.\n");
2191
2192         ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2193
2194         il_set_rxon_ht(il, &il->current_ht_config);
2195
2196         if (il->cfg->ops->hcmd->set_rxon_chain)
2197                 il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
2198
2199         ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
2200
2201         D_ASSOC("assoc id %d beacon interval %d\n",
2202                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
2203
2204         if (vif->bss_conf.use_short_preamble)
2205                 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2206         else
2207                 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2208
2209         if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2210                 if (vif->bss_conf.use_short_slot)
2211                         ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2212                 else
2213                         ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2214         }
2215
2216         il_commit_rxon(il, ctx);
2217
2218         D_ASSOC("Associated as %d to: %pM\n",
2219                         vif->bss_conf.aid, ctx->active.bssid_addr);
2220
2221         switch (vif->type) {
2222         case NL80211_IFTYPE_STATION:
2223                 break;
2224         case NL80211_IFTYPE_ADHOC:
2225                 il4965_send_beacon_cmd(il);
2226                 break;
2227         default:
2228                 IL_ERR("%s Should not be called in %d mode\n",
2229                           __func__, vif->type);
2230                 break;
2231         }
2232
2233         /* the chain noise calibration will enabled PM upon completion
2234          * If chain noise has already been run, then we need to enable
2235          * power management here */
2236         if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE)
2237                 il_power_update_mode(il, false);
2238
2239         /* Enable Rx differential gain and sensitivity calibrations */
2240         il4965_chain_noise_reset(il);
2241         il->start_calib = 1;
2242 }
2243
2244 static void il4965_config_ap(struct il_priv *il)
2245 {
2246         struct il_rxon_context *ctx = &il->ctx;
2247         struct ieee80211_vif *vif = ctx->vif;
2248         int ret = 0;
2249
2250         lockdep_assert_held(&il->mutex);
2251
2252         if (test_bit(S_EXIT_PENDING, &il->status))
2253                 return;
2254
2255         /* The following should be done only at AP bring up */
2256         if (!il_is_associated_ctx(ctx)) {
2257
2258                 /* RXON - unassoc (to set timing command) */
2259                 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2260                 il_commit_rxon(il, ctx);
2261
2262                 /* RXON Timing */
2263                 ret = il_send_rxon_timing(il, ctx);
2264                 if (ret)
2265                         IL_WARN("RXON timing failed - "
2266                                         "Attempting to continue.\n");
2267
2268                 /* AP has all antennas */
2269                 il->chain_noise_data.active_chains =
2270                         il->hw_params.valid_rx_ant;
2271                 il_set_rxon_ht(il, &il->current_ht_config);
2272                 if (il->cfg->ops->hcmd->set_rxon_chain)
2273                         il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
2274
2275                 ctx->staging.assoc_id = 0;
2276
2277                 if (vif->bss_conf.use_short_preamble)
2278                         ctx->staging.flags |=
2279                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2280                 else
2281                         ctx->staging.flags &=
2282                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2283
2284                 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2285                         if (vif->bss_conf.use_short_slot)
2286                                 ctx->staging.flags |=
2287                                         RXON_FLG_SHORT_SLOT_MSK;
2288                         else
2289                                 ctx->staging.flags &=
2290                                         ~RXON_FLG_SHORT_SLOT_MSK;
2291                 }
2292                 /* need to send beacon cmd before committing assoc RXON! */
2293                 il4965_send_beacon_cmd(il);
2294                 /* restore RXON assoc */
2295                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2296                 il_commit_rxon(il, ctx);
2297         }
2298         il4965_send_beacon_cmd(il);
2299 }
2300
2301 static struct il_hcmd_utils_ops il4965_hcmd_utils = {
2302         .get_hcmd_size = il4965_get_hcmd_size,
2303         .build_addsta_hcmd = il4965_build_addsta_hcmd,
2304         .request_scan = il4965_request_scan,
2305         .post_scan = il4965_post_scan,
2306 };
2307
2308 static struct il_lib_ops il4965_lib = {
2309         .set_hw_params = il4965_hw_set_hw_params,
2310         .txq_update_byte_cnt_tbl = il4965_txq_update_byte_cnt_tbl,
2311         .txq_attach_buf_to_tfd = il4965_hw_txq_attach_buf_to_tfd,
2312         .txq_free_tfd = il4965_hw_txq_free_tfd,
2313         .txq_init = il4965_hw_tx_queue_init,
2314         .handler_setup = il4965_handler_setup,
2315         .is_valid_rtc_data_addr = il4965_hw_valid_rtc_data_addr,
2316         .init_alive_start = il4965_init_alive_start,
2317         .load_ucode = il4965_load_bsm,
2318         .dump_nic_error_log = il4965_dump_nic_error_log,
2319         .dump_fh = il4965_dump_fh,
2320         .set_channel_switch = il4965_hw_channel_switch,
2321         .apm_ops = {
2322                 .init = il_apm_init,
2323                 .config = il4965_nic_config,
2324         },
2325         .eeprom_ops = {
2326                 .regulatory_bands = {
2327                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2328                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2329                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2330                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2331                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2332                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2333                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2334                 },
2335                 .acquire_semaphore = il4965_eeprom_acquire_semaphore,
2336                 .release_semaphore = il4965_eeprom_release_semaphore,
2337         },
2338         .send_tx_power  = il4965_send_tx_power,
2339         .update_chain_flags = il4965_update_chain_flags,
2340         .temp_ops = {
2341                 .temperature = il4965_temperature_calib,
2342         },
2343         .debugfs_ops = {
2344                 .rx_stats_read = il4965_ucode_rx_stats_read,
2345                 .tx_stats_read = il4965_ucode_tx_stats_read,
2346                 .general_stats_read = il4965_ucode_general_stats_read,
2347         },
2348 };
2349
2350 static const struct il_legacy_ops il4965_legacy_ops = {
2351         .post_associate = il4965_post_associate,
2352         .config_ap = il4965_config_ap,
2353         .manage_ibss_station = il4965_manage_ibss_station,
2354         .update_bcast_stations = il4965_update_bcast_stations,
2355 };
2356
2357 struct ieee80211_ops il4965_hw_ops = {
2358         .tx = il4965_mac_tx,
2359         .start = il4965_mac_start,
2360         .stop = il4965_mac_stop,
2361         .add_interface = il_mac_add_interface,
2362         .remove_interface = il_mac_remove_interface,
2363         .change_interface = il_mac_change_interface,
2364         .config = il_mac_config,
2365         .configure_filter = il4965_configure_filter,
2366         .set_key = il4965_mac_set_key,
2367         .update_tkip_key = il4965_mac_update_tkip_key,
2368         .conf_tx = il_mac_conf_tx,
2369         .reset_tsf = il_mac_reset_tsf,
2370         .bss_info_changed = il_mac_bss_info_changed,
2371         .ampdu_action = il4965_mac_ampdu_action,
2372         .hw_scan = il_mac_hw_scan,
2373         .sta_add = il4965_mac_sta_add,
2374         .sta_remove = il_mac_sta_remove,
2375         .channel_switch = il4965_mac_channel_switch,
2376         .tx_last_beacon = il_mac_tx_last_beacon,
2377 };
2378
2379 static const struct il_ops il4965_ops = {
2380         .lib = &il4965_lib,
2381         .hcmd = &il4965_hcmd,
2382         .utils = &il4965_hcmd_utils,
2383         .led = &il4965_led_ops,
2384         .legacy = &il4965_legacy_ops,
2385         .ieee80211_ops = &il4965_hw_ops,
2386 };
2387
2388 static struct il_base_params il4965_base_params = {
2389         .eeprom_size = IL4965_EEPROM_IMG_SIZE,
2390         .num_of_queues = IL49_NUM_QUEUES,
2391         .num_of_ampdu_queues = IL49_NUM_AMPDU_QUEUES,
2392         .pll_cfg_val = 0,
2393         .set_l0s = true,
2394         .use_bsm = true,
2395         .led_compensation = 61,
2396         .chain_noise_num_beacons = IL4965_CAL_NUM_BEACONS,
2397         .wd_timeout = IL_DEF_WD_TIMEOUT,
2398         .temperature_kelvin = true,
2399         .ucode_tracing = true,
2400         .sensitivity_calib_by_driver = true,
2401         .chain_noise_calib_by_driver = true,
2402 };
2403
2404 struct il_cfg il4965_cfg = {
2405         .name = "Intel(R) Wireless WiFi Link 4965AGN",
2406         .fw_name_pre = IL4965_FW_PRE,
2407         .ucode_api_max = IL4965_UCODE_API_MAX,
2408         .ucode_api_min = IL4965_UCODE_API_MIN,
2409         .sku = IL_SKU_A|IL_SKU_G|IL_SKU_N,
2410         .valid_tx_ant = ANT_AB,
2411         .valid_rx_ant = ANT_ABC,
2412         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2413         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2414         .ops = &il4965_ops,
2415         .mod_params = &il4965_mod_params,
2416         .base_params = &il4965_base_params,
2417         .led_mode = IL_LED_BLINK,
2418         /*
2419          * Force use of chains B and C for scan RX on 5 GHz band
2420          * because the device has off-channel reception on chain A.
2421          */
2422         .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC,
2423 };
2424
2425 /* Module firmware */
2426 MODULE_FIRMWARE(IL4965_MODULE_FIRMWARE(IL4965_UCODE_API_MAX));