drivers/net/wireless/iwlegacy/4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/sched.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "common.h"
  41 #include "iwl-eeprom.h"
  42 #include "4965.h"
  43
  44 #define IL_AC_UNSET -1
  45
  46 /**
  47  * il_verify_inst_sparse - verify runtime uCode image in card vs. host,
  48  *   using sample data 100 bytes apart.  If these sample points are good,
  49  *   it's a pretty good bet that everything between them is good, too.
  50  */
  51 static int
  52 il4965_verify_inst_sparse(struct il_priv *il, __le32 *image, u32 len)
  53 {
  54         u32 val;
  55         int ret = 0;
  56         u32 errcnt = 0;
  57         u32 i;
  58
  59         D_INFO("ucode inst image size is %u\n", len);
  60
  61         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  62                 /* read data comes through single port, auto-incr addr */
  63                 /* NOTE: Use the debugless read so we don't flood kernel log
  64                  * if IL_DL_IO is set */
  65                 il_wr(il, HBUS_TARG_MEM_RADDR,
  66                         i + IL4965_RTC_INST_LOWER_BOUND);
  67                 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  68                 if (val != le32_to_cpu(*image)) {
  69                         ret = -EIO;
  70                         errcnt++;
  71                         if (errcnt >= 3)
  72                                 break;
  73                 }
  74         }
  75
  76         return ret;
  77 }
  78
  79 /**
  80  * il4965_verify_inst_full - verify runtime uCode image in card vs. host,
  81  *     looking at all data.
  82  */
  83 static int il4965_verify_inst_full(struct il_priv *il, __le32 *image,
  84                                  u32 len)
  85 {
  86         u32 val;
  87         u32 save_len = len;
  88         int ret = 0;
  89         u32 errcnt;
  90
  91         D_INFO("ucode inst image size is %u\n", len);
  92
  93         il_wr(il, HBUS_TARG_MEM_RADDR,
  94                            IL4965_RTC_INST_LOWER_BOUND);
  95
  96         errcnt = 0;
  97         for (; len > 0; len -= sizeof(u32), image++) {
  98                 /* read data comes through single port, auto-incr addr */
  99                 /* NOTE: Use the debugless read so we don't flood kernel log
 100                  * if IL_DL_IO is set */
 101                 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
 102                 if (val != le32_to_cpu(*image)) {
 103                         IL_ERR("uCode INST section is invalid at "
 104                                   "offset 0x%x, is 0x%x, s/b 0x%x\n",
 105                                   save_len - len, val, le32_to_cpu(*image));
 106                         ret = -EIO;
 107                         errcnt++;
 108                         if (errcnt >= 20)
 109                                 break;
 110                 }
 111         }
 112
 113         if (!errcnt)
 114                 D_INFO(
 115                     "ucode image in INSTRUCTION memory is good\n");
 116
 117         return ret;
 118 }
 119
 120 /**
 121  * il4965_verify_ucode - determine which instruction image is in SRAM,
 122  *    and verify its contents
 123  */
 124 int il4965_verify_ucode(struct il_priv *il)
 125 {
 126         __le32 *image;
 127         u32 len;
 128         int ret;
 129
 130         /* Try bootstrap */
 131         image = (__le32 *)il->ucode_boot.v_addr;
 132         len = il->ucode_boot.len;
 133         ret = il4965_verify_inst_sparse(il, image, len);
 134         if (!ret) {
 135                 D_INFO("Bootstrap uCode is good in inst SRAM\n");
 136                 return 0;
 137         }
 138
 139         /* Try initialize */
 140         image = (__le32 *)il->ucode_init.v_addr;
 141         len = il->ucode_init.len;
 142         ret = il4965_verify_inst_sparse(il, image, len);
 143         if (!ret) {
 144                 D_INFO("Initialize uCode is good in inst SRAM\n");
 145                 return 0;
 146         }
 147
 148         /* Try runtime/protocol */
 149         image = (__le32 *)il->ucode_code.v_addr;
 150         len = il->ucode_code.len;
 151         ret = il4965_verify_inst_sparse(il, image, len);
 152         if (!ret) {
 153                 D_INFO("Runtime uCode is good in inst SRAM\n");
 154                 return 0;
 155         }
 156
 157         IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
 158
 159         /* Since nothing seems to match, show first several data entries in
 160          * instruction SRAM, so maybe visual inspection will give a clue.
 161          * Selection of bootstrap image (vs. other images) is arbitrary. */
 162         image = (__le32 *)il->ucode_boot.v_addr;
 163         len = il->ucode_boot.len;
 164         ret = il4965_verify_inst_full(il, image, len);
 165
 166         return ret;
 167 }
 168
 169 /******************************************************************************
 170  *
 171  * EEPROM related functions
 172  *
 173 ******************************************************************************/
 174
 175 /*
 176  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 177  * when accessing the EEPROM; each access is a series of pulses to/from the
 178  * EEPROM chip, not a single event, so even reads could conflict if they
 179  * weren't arbitrated by the semaphore.
 180  */
 181 int il4965_eeprom_acquire_semaphore(struct il_priv *il)
 182 {
 183         u16 count;
 184         int ret;
 185
 186         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 187                 /* Request semaphore */
 188                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 189                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 190
 191                 /* See if we got it */
 192                 ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
 193                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 194                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 195                                 EEPROM_SEM_TIMEOUT);
 196                 if (ret >= 0)
 197                         return ret;
 198         }
 199
 200         return ret;
 201 }
 202
 203 void il4965_eeprom_release_semaphore(struct il_priv *il)
 204 {
 205         il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
 206                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 207
 208 }
 209
 210 int il4965_eeprom_check_version(struct il_priv *il)
 211 {
 212         u16 eeprom_ver;
 213         u16 calib_ver;
 214
 215         eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION);
 216         calib_ver = il_eeprom_query16(il,
 217                         EEPROM_4965_CALIB_VERSION_OFFSET);
 218
 219         if (eeprom_ver < il->cfg->eeprom_ver ||
 220             calib_ver < il->cfg->eeprom_calib_ver)
 221                 goto err;
 222
 223         IL_INFO("device EEPROM VER=0x%x, CALIB=0x%x\n",
 224                  eeprom_ver, calib_ver);
 225
 226         return 0;
 227 err:
 228         IL_ERR("Unsupported (too old) EEPROM VER=0x%x < 0x%x "
 229                   "CALIB=0x%x < 0x%x\n",
 230                   eeprom_ver, il->cfg->eeprom_ver,
 231                   calib_ver,  il->cfg->eeprom_calib_ver);
 232         return -EINVAL;
 233
 234 }
 235
 236 void il4965_eeprom_get_mac(const struct il_priv *il, u8 *mac)
 237 {
 238         const u8 *addr = il_eeprom_query_addr(il,
 239                                         EEPROM_MAC_ADDRESS);
 240         memcpy(mac, addr, ETH_ALEN);
 241 }
 242
 243 /* Send led command */
 244 static int
 245 il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
 246 {
 247         struct il_host_cmd cmd = {
 248                 .id = C_LEDS,
 249                 .len = sizeof(struct il_led_cmd),
 250                 .data = led_cmd,
 251                 .flags = CMD_ASYNC,
 252                 .callback = NULL,
 253         };
 254         u32 reg;
 255
 256         reg = _il_rd(il, CSR_LED_REG);
 257         if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
 258                 _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
 259
 260         return il_send_cmd(il, &cmd);
 261 }
 262
 263 /* Set led register off */
 264 void il4965_led_enable(struct il_priv *il)
 265 {
 266         _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
 267 }
 268
 269 const struct il_led_ops il4965_led_ops = {
 270         .cmd = il4965_send_led_cmd,
 271 };
 272
 273 static int il4965_send_tx_power(struct il_priv *il);
 274 static int il4965_hw_get_temperature(struct il_priv *il);
 275
 276 /* Highest firmware API version supported */
 277 #define IL4965_UCODE_API_MAX 2
 278
 279 /* Lowest firmware API version supported */
 280 #define IL4965_UCODE_API_MIN 2
 281
 282 #define IL4965_FW_PRE "iwlwifi-4965-"
 283 #define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode"
 284 #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api)
 285
 286 /* check contents of special bootstrap uCode SRAM */
 287 static int il4965_verify_bsm(struct il_priv *il)
 288 {
 289         __le32 *image = il->ucode_boot.v_addr;
 290         u32 len = il->ucode_boot.len;
 291         u32 reg;
 292         u32 val;
 293
 294         D_INFO("Begin verify bsm\n");
 295
 296         /* verify BSM SRAM contents */
 297         val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
 298         for (reg = BSM_SRAM_LOWER_BOUND;
 299              reg < BSM_SRAM_LOWER_BOUND + len;
 300              reg += sizeof(u32), image++) {
 301                 val = il_rd_prph(il, reg);
 302                 if (val != le32_to_cpu(*image)) {
 303                         IL_ERR("BSM uCode verification failed at "
 304                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
 305                                   BSM_SRAM_LOWER_BOUND,
 306                                   reg - BSM_SRAM_LOWER_BOUND, len,
 307                                   val, le32_to_cpu(*image));
 308                         return -EIO;
 309                 }
 310         }
 311
 312         D_INFO("BSM bootstrap uCode image OK\n");
 313
 314         return 0;
 315 }
 316
 317 /**
 318  * il4965_load_bsm - Load bootstrap instructions
 319  *
 320  * BSM operation:
 321  *
 322  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 323  * in special SRAM that does not power down during RFKILL.  When powering back
 324  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 325  * the bootstrap program into the on-board processor, and starts it.
 326  *
 327  * The bootstrap program loads (via DMA) instructions and data for a new
 328  * program from host DRAM locations indicated by the host driver in the
 329  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 330  * automatically.
 331  *
 332  * When initializing the NIC, the host driver points the BSM to the
 333  * "initialize" uCode image.  This uCode sets up some internal data, then
 334  * notifies host via "initialize alive" that it is complete.
 335  *
 336  * The host then replaces the BSM_DRAM_* pointer values to point to the
 337  * normal runtime uCode instructions and a backup uCode data cache buffer
 338  * (filled initially with starting data values for the on-board processor),
 339  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 340  * which begins normal operation.
 341  *
 342  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 343  * the backup data cache in DRAM before SRAM is powered down.
 344  *
 345  * When powering back up, the BSM loads the bootstrap program.  This reloads
 346  * the runtime uCode instructions and the backup data cache into SRAM,
 347  * and re-launches the runtime uCode from where it left off.
 348  */
 349 static int il4965_load_bsm(struct il_priv *il)
 350 {
 351         __le32 *image = il->ucode_boot.v_addr;
 352         u32 len = il->ucode_boot.len;
 353         dma_addr_t pinst;
 354         dma_addr_t pdata;
 355         u32 inst_len;
 356         u32 data_len;
 357         int i;
 358         u32 done;
 359         u32 reg_offset;
 360         int ret;
 361
 362         D_INFO("Begin load bsm\n");
 363
 364         il->ucode_type = UCODE_RT;
 365
 366         /* make sure bootstrap program is no larger than BSM's SRAM size */
 367         if (len > IL49_MAX_BSM_SIZE)
 368                 return -EINVAL;
 369
 370         /* Tell bootstrap uCode where to find the "Initialize" uCode
 371          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 372          * NOTE:  il_init_alive_start() will replace these values,
 373          *        after the "initialize" uCode has run, to point to
 374          *        runtime/protocol instructions and backup data cache.
 375          */
 376         pinst = il->ucode_init.p_addr >> 4;
 377         pdata = il->ucode_init_data.p_addr >> 4;
 378         inst_len = il->ucode_init.len;
 379         data_len = il->ucode_init_data.len;
 380
 381         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
 382         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
 383         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 384         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 385
 386         /* Fill BSM memory with bootstrap instructions */
 387         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 388              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 389              reg_offset += sizeof(u32), image++)
 390                 _il_wr_prph(il, reg_offset, le32_to_cpu(*image));
 391
 392         ret = il4965_verify_bsm(il);
 393         if (ret)
 394                 return ret;
 395
 396         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 397         il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
 398         il_wr_prph(il,
 399                         BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND);
 400         il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 401
 402         /* Load bootstrap code into instruction SRAM now,
 403          *   to prepare to load "initialize" uCode */
 404         il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 405
 406         /* Wait for load of bootstrap uCode to finish */
 407         for (i = 0; i < 100; i++) {
 408                 done = il_rd_prph(il, BSM_WR_CTRL_REG);
 409                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 410                         break;
 411                 udelay(10);
 412         }
 413         if (i < 100)
 414                 D_INFO("BSM write complete, poll %d iterations\n", i);
 415         else {
 416                 IL_ERR("BSM write did not complete!\n");
 417                 return -EIO;
 418         }
 419
 420         /* Enable future boot loads whenever power management unit triggers it
 421          *   (e.g. when powering back up after power-save shutdown) */
 422         il_wr_prph(il,
 423                         BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 424
 425
 426         return 0;
 427 }
 428
 429 /**
 430  * il4965_set_ucode_ptrs - Set uCode address location
 431  *
 432  * Tell initialization uCode where to find runtime uCode.
 433  *
 434  * BSM registers initially contain pointers to initialization uCode.
 435  * We need to replace them to load runtime uCode inst and data,
 436  * and to save runtime data when powering down.
 437  */
 438 static int il4965_set_ucode_ptrs(struct il_priv *il)
 439 {
 440         dma_addr_t pinst;
 441         dma_addr_t pdata;
 442         int ret = 0;
 443
 444         /* bits 35:4 for 4965 */
 445         pinst = il->ucode_code.p_addr >> 4;
 446         pdata = il->ucode_data_backup.p_addr >> 4;
 447
 448         /* Tell bootstrap uCode where to find image to load */
 449         il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
 450         il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
 451         il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG,
 452                                  il->ucode_data.len);
 453
 454         /* Inst byte count must be last to set up, bit 31 signals uCode
 455          *   that all new ptr/size info is in place */
 456         il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
 457                                  il->ucode_code.len | BSM_DRAM_INST_LOAD);
 458         D_INFO("Runtime uCode pointers are set.\n");
 459
 460         return ret;
 461 }
 462
 463 /**
 464  * il4965_init_alive_start - Called after N_ALIVE notification received
 465  *
 466  * Called after N_ALIVE notification received from "initialize" uCode.
 467  *
 468  * The 4965 "initialize" ALIVE reply contains calibration data for:
 469  *   Voltage, temperature, and MIMO tx gain correction, now stored in il
 470  *   (3945 does not contain this data).
 471  *
 472  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 473 */
 474 static void il4965_init_alive_start(struct il_priv *il)
 475 {
 476         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 477          * This is a paranoid check, because we would not have gotten the
 478          * "initialize" alive if code weren't properly loaded.  */
 479         if (il4965_verify_ucode(il)) {
 480                 /* Runtime instruction load was bad;
 481                  * take it all the way back down so we can try again */
 482                 D_INFO("Bad \"initialize\" uCode load.\n");
 483                 goto restart;
 484         }
 485
 486         /* Calculate temperature */
 487         il->temperature = il4965_hw_get_temperature(il);
 488
 489         /* Send pointers to protocol/runtime uCode image ... init code will
 490          * load and launch runtime uCode, which will send us another "Alive"
 491          * notification. */
 492         D_INFO("Initialization Alive received.\n");
 493         if (il4965_set_ucode_ptrs(il)) {
 494                 /* Runtime instruction load won't happen;
 495                  * take it all the way back down so we can try again */
 496                 D_INFO("Couldn't set up uCode pointers.\n");
 497                 goto restart;
 498         }
 499         return;
 500
 501 restart:
 502         queue_work(il->workqueue, &il->restart);
 503 }
 504
 505 static bool iw4965_is_ht40_channel(__le32 rxon_flags)
 506 {
 507         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
 508                                     >> RXON_FLG_CHANNEL_MODE_POS;
 509         return (chan_mod == CHANNEL_MODE_PURE_40 ||
 510                 chan_mod == CHANNEL_MODE_MIXED);
 511 }
 512
 513 static void il4965_nic_config(struct il_priv *il)
 514 {
 515         unsigned long flags;
 516         u16 radio_cfg;
 517
 518         spin_lock_irqsave(&il->lock, flags);
 519
 520         radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG);
 521
 522         /* write radio config values to register */
 523         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 524                 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 525                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 526                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 527                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 528
 529         /* set CSR_HW_CONFIG_REG for uCode use */
 530         il_set_bit(il, CSR_HW_IF_CONFIG_REG,
 531                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 532                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 533
 534         il->calib_info = (struct il_eeprom_calib_info *)
 535                 il_eeprom_query_addr(il,
 536                                 EEPROM_4965_CALIB_TXPOWER_OFFSET);
 537
 538         spin_unlock_irqrestore(&il->lock, flags);
 539 }
 540
 541 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 542  * Called after every association, but this runs only once!
 543  *  ... once chain noise is calibrated the first time, it's good forever.  */
 544 static void il4965_chain_noise_reset(struct il_priv *il)
 545 {
 546         struct il_chain_noise_data *data = &(il->chain_noise_data);
 547
 548         if (data->state == IL_CHAIN_NOISE_ALIVE &&
 549             il_is_any_associated(il)) {
 550                 struct il_calib_diff_gain_cmd cmd;
 551
 552                 /* clear data for chain noise calibration algorithm */
 553                 data->chain_noise_a = 0;
 554                 data->chain_noise_b = 0;
 555                 data->chain_noise_c = 0;
 556                 data->chain_signal_a = 0;
 557                 data->chain_signal_b = 0;
 558                 data->chain_signal_c = 0;
 559                 data->beacon_count = 0;
 560
 561                 memset(&cmd, 0, sizeof(cmd));
 562                 cmd.hdr.op_code = IL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 563                 cmd.diff_gain_a = 0;
 564                 cmd.diff_gain_b = 0;
 565                 cmd.diff_gain_c = 0;
 566                 if (il_send_cmd_pdu(il, C_PHY_CALIBRATION,
 567                                  sizeof(cmd), &cmd))
 568                         IL_ERR(
 569                                 "Could not send C_PHY_CALIBRATION\n");
 570                 data->state = IL_CHAIN_NOISE_ACCUMULATE;
 571                 D_CALIB("Run chain_noise_calibrate\n");
 572         }
 573 }
 574
 575 static struct il_sensitivity_ranges il4965_sensitivity = {
 576         .min_nrg_cck = 97,
 577         .max_nrg_cck = 0, /* not used, set to 0 */
 578
 579         .auto_corr_min_ofdm = 85,
 580         .auto_corr_min_ofdm_mrc = 170,
 581         .auto_corr_min_ofdm_x1 = 105,
 582         .auto_corr_min_ofdm_mrc_x1 = 220,
 583
 584         .auto_corr_max_ofdm = 120,
 585         .auto_corr_max_ofdm_mrc = 210,
 586         .auto_corr_max_ofdm_x1 = 140,
 587         .auto_corr_max_ofdm_mrc_x1 = 270,
 588
 589         .auto_corr_min_cck = 125,
 590         .auto_corr_max_cck = 200,
 591         .auto_corr_min_cck_mrc = 200,
 592         .auto_corr_max_cck_mrc = 400,
 593
 594         .nrg_th_cck = 100,
 595         .nrg_th_ofdm = 100,
 596
 597         .barker_corr_th_min = 190,
 598         .barker_corr_th_min_mrc = 390,
 599         .nrg_th_cca = 62,
 600 };
 601
 602 static void il4965_set_ct_threshold(struct il_priv *il)
 603 {
 604         /* want Kelvin */
 605         il->hw_params.ct_kill_threshold =
 606                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
 607 }
 608
 609 /**
 610  * il4965_hw_set_hw_params
 611  *
 612  * Called when initializing driver
 613  */
 614 static int il4965_hw_set_hw_params(struct il_priv *il)
 615 {
 616         if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES &&
 617             il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES)
 618                 il->cfg->base_params->num_of_queues =
 619                         il->cfg->mod_params->num_of_queues;
 620
 621         il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues;
 622         il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 623         il->hw_params.scd_bc_tbls_size =
 624                         il->cfg->base_params->num_of_queues *
 625                         sizeof(struct il4965_scd_bc_tbl);
 626         il->hw_params.tfd_size = sizeof(struct il_tfd);
 627         il->hw_params.max_stations = IL4965_STATION_COUNT;
 628         il->ctx.bcast_sta_id = IL4965_BROADCAST_ID;
 629         il->hw_params.max_data_size = IL49_RTC_DATA_SIZE;
 630         il->hw_params.max_inst_size = IL49_RTC_INST_SIZE;
 631         il->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 632         il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
 633
 634         il->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 635
 636         il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant);
 637         il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant);
 638         il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant;
 639         il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant;
 640
 641         il4965_set_ct_threshold(il);
 642
 643         il->hw_params.sens = &il4965_sensitivity;
 644         il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS;
 645
 646         return 0;
 647 }
 648
 649 static s32 il4965_math_div_round(s32 num, s32 denom, s32 *res)
 650 {
 651         s32 sign = 1;
 652
 653         if (num < 0) {
 654                 sign = -sign;
 655                 num = -num;
 656         }
 657         if (denom < 0) {
 658                 sign = -sign;
 659                 denom = -denom;
 660         }
 661         *res = 1;
 662         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 663
 664         return 1;
 665 }
 666
 667 /**
 668  * il4965_get_voltage_compensation - Power supply voltage comp for txpower
 669  *
 670  * Determines power supply voltage compensation for txpower calculations.
 671  * Returns number of 1/2-dB steps to subtract from gain table idx,
 672  * to compensate for difference between power supply voltage during
 673  * factory measurements, vs. current power supply voltage.
 674  *
 675  * Voltage indication is higher for lower voltage.
 676  * Lower voltage requires more gain (lower gain table idx).
 677  */
 678 static s32 il4965_get_voltage_compensation(s32 eeprom_voltage,
 679                                             s32 current_voltage)
 680 {
 681         s32 comp = 0;
 682
 683         if (TX_POWER_IL_ILLEGAL_VOLTAGE == eeprom_voltage ||
 684             TX_POWER_IL_ILLEGAL_VOLTAGE == current_voltage)
 685                 return 0;
 686
 687         il4965_math_div_round(current_voltage - eeprom_voltage,
 688                                TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp);
 689
 690         if (current_voltage > eeprom_voltage)
 691                 comp *= 2;
 692         if ((comp < -2) || (comp > 2))
 693                 comp = 0;
 694
 695         return comp;
 696 }
 697
 698 static s32 il4965_get_tx_atten_grp(u16 channel)
 699 {
 700         if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH &&
 701             channel <= CALIB_IL_TX_ATTEN_GR5_LCH)
 702                 return CALIB_CH_GROUP_5;
 703
 704         if (channel >= CALIB_IL_TX_ATTEN_GR1_FCH &&
 705             channel <= CALIB_IL_TX_ATTEN_GR1_LCH)
 706                 return CALIB_CH_GROUP_1;
 707
 708         if (channel >= CALIB_IL_TX_ATTEN_GR2_FCH &&
 709             channel <= CALIB_IL_TX_ATTEN_GR2_LCH)
 710                 return CALIB_CH_GROUP_2;
 711
 712         if (channel >= CALIB_IL_TX_ATTEN_GR3_FCH &&
 713             channel <= CALIB_IL_TX_ATTEN_GR3_LCH)
 714                 return CALIB_CH_GROUP_3;
 715
 716         if (channel >= CALIB_IL_TX_ATTEN_GR4_FCH &&
 717             channel <= CALIB_IL_TX_ATTEN_GR4_LCH)
 718                 return CALIB_CH_GROUP_4;
 719
 720         return -EINVAL;
 721 }
 722
 723 static u32 il4965_get_sub_band(const struct il_priv *il, u32 channel)
 724 {
 725         s32 b = -1;
 726
 727         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 728                 if (il->calib_info->band_info[b].ch_from == 0)
 729                         continue;
 730
 731                 if (channel >= il->calib_info->band_info[b].ch_from &&
 732                     channel <= il->calib_info->band_info[b].ch_to)
 733                         break;
 734         }
 735
 736         return b;
 737 }
 738
 739 static s32 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 740 {
 741         s32 val;
 742
 743         if (x2 == x1)
 744                 return y1;
 745         else {
 746                 il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 747                 return val + y2;
 748         }
 749 }
 750
 751 /**
 752  * il4965_interpolate_chan - Interpolate factory measurements for one channel
 753  *
 754  * Interpolates factory measurements from the two sample channels within a
 755  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 756  * differences in channel frequencies, which is proportional to differences
 757  * in channel number.
 758  */
 759 static int il4965_interpolate_chan(struct il_priv *il, u32 channel,
 760                                     struct il_eeprom_calib_ch_info *chan_info)
 761 {
 762         s32 s = -1;
 763         u32 c;
 764         u32 m;
 765         const struct il_eeprom_calib_measure *m1;
 766         const struct il_eeprom_calib_measure *m2;
 767         struct il_eeprom_calib_measure *omeas;
 768         u32 ch_i1;
 769         u32 ch_i2;
 770
 771         s = il4965_get_sub_band(il, channel);
 772         if (s >= EEPROM_TX_POWER_BANDS) {
 773                 IL_ERR("Tx Power can not find channel %d\n", channel);
 774                 return -1;
 775         }
 776
 777         ch_i1 = il->calib_info->band_info[s].ch1.ch_num;
 778         ch_i2 = il->calib_info->band_info[s].ch2.ch_num;
 779         chan_info->ch_num = (u8) channel;
 780
 781         D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
 782                           channel, s, ch_i1, ch_i2);
 783
 784         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 785                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 786                         m1 = &(il->calib_info->band_info[s].ch1.
 787                                measurements[c][m]);
 788                         m2 = &(il->calib_info->band_info[s].ch2.
 789                                measurements[c][m]);
 790                         omeas = &(chan_info->measurements[c][m]);
 791
 792                         omeas->actual_pow =
 793                             (u8) il4965_interpolate_value(channel, ch_i1,
 794                                                            m1->actual_pow,
 795                                                            ch_i2,
 796                                                            m2->actual_pow);
 797                         omeas->gain_idx =
 798                             (u8) il4965_interpolate_value(channel, ch_i1,
 799                                                            m1->gain_idx, ch_i2,
 800                                                            m2->gain_idx);
 801                         omeas->temperature =
 802                             (u8) il4965_interpolate_value(channel, ch_i1,
 803                                                            m1->temperature,
 804                                                            ch_i2,
 805                                                            m2->temperature);
 806                         omeas->pa_det =
 807                             (s8) il4965_interpolate_value(channel, ch_i1,
 808                                                            m1->pa_det, ch_i2,
 809                                                            m2->pa_det);
 810
 811                         D_TXPOWER(
 812                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 813                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 814                         D_TXPOWER(
 815                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 816                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 817                         D_TXPOWER(
 818                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 819                                 m1->pa_det, m2->pa_det, omeas->pa_det);
 820                         D_TXPOWER(
 821                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 822                                 m1->temperature, m2->temperature,
 823                                 omeas->temperature);
 824                 }
 825         }
 826
 827         return 0;
 828 }
 829
 830 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
 831  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
 832 static s32 back_off_table[] = {
 833         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
 834         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
 835         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
 836         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
 837         10                      /* CCK */
 838 };
 839
 840 /* Thermal compensation values for txpower for various frequency ranges ...
 841  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
 842 static struct il4965_txpower_comp_entry {
 843         s32 degrees_per_05db_a;
 844         s32 degrees_per_05db_a_denom;
 845 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
 846         {9, 2},                 /* group 0 5.2, ch  34-43 */
 847         {4, 1},                 /* group 1 5.2, ch  44-70 */
 848         {4, 1},                 /* group 2 5.2, ch  71-124 */
 849         {4, 1},                 /* group 3 5.2, ch 125-200 */
 850         {3, 1}                  /* group 4 2.4, ch   all */
 851 };
 852
 853 static s32 get_min_power_idx(s32 rate_power_idx, u32 band)
 854 {
 855         if (!band) {
 856                 if ((rate_power_idx & 7) <= 4)
 857                         return MIN_TX_GAIN_IDX_52GHZ_EXT;
 858         }
 859         return MIN_TX_GAIN_IDX;
 860 }
 861
 862 struct gain_entry {
 863         u8 dsp;
 864         u8 radio;
 865 };
 866
 867 static const struct gain_entry gain_table[2][108] = {
 868         /* 5.2GHz power gain idx table */
 869         {
 870          {123, 0x3F},           /* highest txpower */
 871          {117, 0x3F},
 872          {110, 0x3F},
 873          {104, 0x3F},
 874          {98, 0x3F},
 875          {110, 0x3E},
 876          {104, 0x3E},
 877          {98, 0x3E},
 878          {110, 0x3D},
 879          {104, 0x3D},
 880          {98, 0x3D},
 881          {110, 0x3C},
 882          {104, 0x3C},
 883          {98, 0x3C},
 884          {110, 0x3B},
 885          {104, 0x3B},
 886          {98, 0x3B},
 887          {110, 0x3A},
 888          {104, 0x3A},
 889          {98, 0x3A},
 890          {110, 0x39},
 891          {104, 0x39},
 892          {98, 0x39},
 893          {110, 0x38},
 894          {104, 0x38},
 895          {98, 0x38},
 896          {110, 0x37},
 897          {104, 0x37},
 898          {98, 0x37},
 899          {110, 0x36},
 900          {104, 0x36},
 901          {98, 0x36},
 902          {110, 0x35},
 903          {104, 0x35},
 904          {98, 0x35},
 905          {110, 0x34},
 906          {104, 0x34},
 907          {98, 0x34},
 908          {110, 0x33},
 909          {104, 0x33},
 910          {98, 0x33},
 911          {110, 0x32},
 912          {104, 0x32},
 913          {98, 0x32},
 914          {110, 0x31},
 915          {104, 0x31},
 916          {98, 0x31},
 917          {110, 0x30},
 918          {104, 0x30},
 919          {98, 0x30},
 920          {110, 0x25},
 921          {104, 0x25},
 922          {98, 0x25},
 923          {110, 0x24},
 924          {104, 0x24},
 925          {98, 0x24},
 926          {110, 0x23},
 927          {104, 0x23},
 928          {98, 0x23},
 929          {110, 0x22},
 930          {104, 0x18},
 931          {98, 0x18},
 932          {110, 0x17},
 933          {104, 0x17},
 934          {98, 0x17},
 935          {110, 0x16},
 936          {104, 0x16},
 937          {98, 0x16},
 938          {110, 0x15},
 939          {104, 0x15},
 940          {98, 0x15},
 941          {110, 0x14},
 942          {104, 0x14},
 943          {98, 0x14},
 944          {110, 0x13},
 945          {104, 0x13},
 946          {98, 0x13},
 947          {110, 0x12},
 948          {104, 0x08},
 949          {98, 0x08},
 950          {110, 0x07},
 951          {104, 0x07},
 952          {98, 0x07},
 953          {110, 0x06},
 954          {104, 0x06},
 955          {98, 0x06},
 956          {110, 0x05},
 957          {104, 0x05},
 958          {98, 0x05},
 959          {110, 0x04},
 960          {104, 0x04},
 961          {98, 0x04},
 962          {110, 0x03},
 963          {104, 0x03},
 964          {98, 0x03},
 965          {110, 0x02},
 966          {104, 0x02},
 967          {98, 0x02},
 968          {110, 0x01},
 969          {104, 0x01},
 970          {98, 0x01},
 971          {110, 0x00},
 972          {104, 0x00},
 973          {98, 0x00},
 974          {93, 0x00},
 975          {88, 0x00},
 976          {83, 0x00},
 977          {78, 0x00},
 978          },
 979         /* 2.4GHz power gain idx table */
 980         {
 981          {110, 0x3f},           /* highest txpower */
 982          {104, 0x3f},
 983          {98, 0x3f},
 984          {110, 0x3e},
 985          {104, 0x3e},
 986          {98, 0x3e},
 987          {110, 0x3d},
 988          {104, 0x3d},
 989          {98, 0x3d},
 990          {110, 0x3c},
 991          {104, 0x3c},
 992          {98, 0x3c},
 993          {110, 0x3b},
 994          {104, 0x3b},
 995          {98, 0x3b},
 996          {110, 0x3a},
 997          {104, 0x3a},
 998          {98, 0x3a},
 999          {110, 0x39},
1000          {104, 0x39},
1001          {98, 0x39},
1002          {110, 0x38},
1003          {104, 0x38},
1004          {98, 0x38},
1005          {110, 0x37},
1006          {104, 0x37},
1007          {98, 0x37},
1008          {110, 0x36},
1009          {104, 0x36},
1010          {98, 0x36},
1011          {110, 0x35},
1012          {104, 0x35},
1013          {98, 0x35},
1014          {110, 0x34},
1015          {104, 0x34},
1016          {98, 0x34},
1017          {110, 0x33},
1018          {104, 0x33},
1019          {98, 0x33},
1020          {110, 0x32},
1021          {104, 0x32},
1022          {98, 0x32},
1023          {110, 0x31},
1024          {104, 0x31},
1025          {98, 0x31},
1026          {110, 0x30},
1027          {104, 0x30},
1028          {98, 0x30},
1029          {110, 0x6},
1030          {104, 0x6},
1031          {98, 0x6},
1032          {110, 0x5},
1033          {104, 0x5},
1034          {98, 0x5},
1035          {110, 0x4},
1036          {104, 0x4},
1037          {98, 0x4},
1038          {110, 0x3},
1039          {104, 0x3},
1040          {98, 0x3},
1041          {110, 0x2},
1042          {104, 0x2},
1043          {98, 0x2},
1044          {110, 0x1},
1045          {104, 0x1},
1046          {98, 0x1},
1047          {110, 0x0},
1048          {104, 0x0},
1049          {98, 0x0},
1050          {97, 0},
1051          {96, 0},
1052          {95, 0},
1053          {94, 0},
1054          {93, 0},
1055          {92, 0},
1056          {91, 0},
1057          {90, 0},
1058          {89, 0},
1059          {88, 0},
1060          {87, 0},
1061          {86, 0},
1062          {85, 0},
1063          {84, 0},
1064          {83, 0},
1065          {82, 0},
1066          {81, 0},
1067          {80, 0},
1068          {79, 0},
1069          {78, 0},
1070          {77, 0},
1071          {76, 0},
1072          {75, 0},
1073          {74, 0},
1074          {73, 0},
1075          {72, 0},
1076          {71, 0},
1077          {70, 0},
1078          {69, 0},
1079          {68, 0},
1080          {67, 0},
1081          {66, 0},
1082          {65, 0},
1083          {64, 0},
1084          {63, 0},
1085          {62, 0},
1086          {61, 0},
1087          {60, 0},
1088          {59, 0},
1089          }
1090 };
1091
1092 static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel,
1093                                     u8 is_ht40, u8 ctrl_chan_high,
1094                                     struct il4965_tx_power_db *tx_power_tbl)
1095 {
1096         u8 saturation_power;
1097         s32 target_power;
1098         s32 user_target_power;
1099         s32 power_limit;
1100         s32 current_temp;
1101         s32 reg_limit;
1102         s32 current_regulatory;
1103         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1104         int i;
1105         int c;
1106         const struct il_channel_info *ch_info = NULL;
1107         struct il_eeprom_calib_ch_info ch_eeprom_info;
1108         const struct il_eeprom_calib_measure *measurement;
1109         s16 voltage;
1110         s32 init_voltage;
1111         s32 voltage_compensation;
1112         s32 degrees_per_05db_num;
1113         s32 degrees_per_05db_denom;
1114         s32 factory_temp;
1115         s32 temperature_comp[2];
1116         s32 factory_gain_idx[2];
1117         s32 factory_actual_pwr[2];
1118         s32 power_idx;
1119
1120         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1121          *   are used for idxing into txpower table) */
1122         user_target_power = 2 * il->tx_power_user_lmt;
1123
1124         /* Get current (RXON) channel, band, width */
1125         D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band,
1126                           is_ht40);
1127
1128         ch_info = il_get_channel_info(il, il->band, channel);
1129
1130         if (!il_is_channel_valid(ch_info))
1131                 return -EINVAL;
1132
1133         /* get txatten group, used to select 1) thermal txpower adjustment
1134          *   and 2) mimo txpower balance between Tx chains. */
1135         txatten_grp = il4965_get_tx_atten_grp(channel);
1136         if (txatten_grp < 0) {
1137                 IL_ERR("Can't find txatten group for channel %d.\n",
1138                           channel);
1139                 return txatten_grp;
1140         }
1141
1142         D_TXPOWER("channel %d belongs to txatten group %d\n",
1143                           channel, txatten_grp);
1144
1145         if (is_ht40) {
1146                 if (ctrl_chan_high)
1147                         channel -= 2;
1148                 else
1149                         channel += 2;
1150         }
1151
1152         /* hardware txpower limits ...
1153          * saturation (clipping distortion) txpowers are in half-dBm */
1154         if (band)
1155                 saturation_power = il->calib_info->saturation_power24;
1156         else
1157                 saturation_power = il->calib_info->saturation_power52;
1158
1159         if (saturation_power < IL_TX_POWER_SATURATION_MIN ||
1160             saturation_power > IL_TX_POWER_SATURATION_MAX) {
1161                 if (band)
1162                         saturation_power = IL_TX_POWER_DEFAULT_SATURATION_24;
1163                 else
1164                         saturation_power = IL_TX_POWER_DEFAULT_SATURATION_52;
1165         }
1166
1167         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1168          *   max_power_avg values are in dBm, convert * 2 */
1169         if (is_ht40)
1170                 reg_limit = ch_info->ht40_max_power_avg * 2;
1171         else
1172                 reg_limit = ch_info->max_power_avg * 2;
1173
1174         if ((reg_limit < IL_TX_POWER_REGULATORY_MIN) ||
1175             (reg_limit > IL_TX_POWER_REGULATORY_MAX)) {
1176                 if (band)
1177                         reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_24;
1178                 else
1179                         reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_52;
1180         }
1181
1182         /* Interpolate txpower calibration values for this channel,
1183          *   based on factory calibration tests on spaced channels. */
1184         il4965_interpolate_chan(il, channel, &ch_eeprom_info);
1185
1186         /* calculate tx gain adjustment based on power supply voltage */
1187         voltage = le16_to_cpu(il->calib_info->voltage);
1188         init_voltage = (s32)le32_to_cpu(il->card_alive_init.voltage);
1189         voltage_compensation =
1190             il4965_get_voltage_compensation(voltage, init_voltage);
1191
1192         D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1193                           init_voltage,
1194                           voltage, voltage_compensation);
1195
1196         /* get current temperature (Celsius) */
1197         current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN);
1198         current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX);
1199         current_temp = KELVIN_TO_CELSIUS(current_temp);
1200
1201         /* select thermal txpower adjustment params, based on channel group
1202          *   (same frequency group used for mimo txatten adjustment) */
1203         degrees_per_05db_num =
1204             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1205         degrees_per_05db_denom =
1206             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1207
1208         /* get per-chain txpower values from factory measurements */
1209         for (c = 0; c < 2; c++) {
1210                 measurement = &ch_eeprom_info.measurements[c][1];
1211
1212                 /* txgain adjustment (in half-dB steps) based on difference
1213                  *   between factory and current temperature */
1214                 factory_temp = measurement->temperature;
1215                 il4965_math_div_round((current_temp - factory_temp) *
1216                                        degrees_per_05db_denom,
1217                                        degrees_per_05db_num,
1218                                        &temperature_comp[c]);
1219
1220                 factory_gain_idx[c] = measurement->gain_idx;
1221                 factory_actual_pwr[c] = measurement->actual_pow;
1222
1223                 D_TXPOWER("chain = %d\n", c);
1224                 D_TXPOWER("fctry tmp %d, "
1225                                   "curr tmp %d, comp %d steps\n",
1226                                   factory_temp, current_temp,
1227                                   temperature_comp[c]);
1228
1229                 D_TXPOWER("fctry idx %d, fctry pwr %d\n",
1230                                   factory_gain_idx[c],
1231                                   factory_actual_pwr[c]);
1232         }
1233
1234         /* for each of 33 bit-rates (including 1 for CCK) */
1235         for (i = 0; i < POWER_TBL_NUM_ENTRIES; i++) {
1236                 u8 is_mimo_rate;
1237                 union il4965_tx_power_dual_stream tx_power;
1238
1239                 /* for mimo, reduce each chain's txpower by half
1240                  * (3dB, 6 steps), so total output power is regulatory
1241                  * compliant. */
1242                 if (i & 0x8) {
1243                         current_regulatory = reg_limit -
1244                             IL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1245                         is_mimo_rate = 1;
1246                 } else {
1247                         current_regulatory = reg_limit;
1248                         is_mimo_rate = 0;
1249                 }
1250
1251                 /* find txpower limit, either hardware or regulatory */
1252                 power_limit = saturation_power - back_off_table[i];
1253                 if (power_limit > current_regulatory)
1254                         power_limit = current_regulatory;
1255
1256                 /* reduce user's txpower request if necessary
1257                  * for this rate on this channel */
1258                 target_power = user_target_power;
1259                 if (target_power > power_limit)
1260                         target_power = power_limit;
1261
1262                 D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1263                                   i, saturation_power - back_off_table[i],
1264                                   current_regulatory, user_target_power,
1265                                   target_power);
1266
1267                 /* for each of 2 Tx chains (radio transmitters) */
1268                 for (c = 0; c < 2; c++) {
1269                         s32 atten_value;
1270
1271                         if (is_mimo_rate)
1272                                 atten_value =
1273                                     (s32)le32_to_cpu(il->card_alive_init.
1274                                     tx_atten[txatten_grp][c]);
1275                         else
1276                                 atten_value = 0;
1277
1278                         /* calculate idx; higher idx means lower txpower */
1279                         power_idx = (u8) (factory_gain_idx[c] -
1280                                             (target_power -
1281                                              factory_actual_pwr[c]) -
1282                                             temperature_comp[c] -
1283                                             voltage_compensation +
1284                                             atten_value);
1285
1286 /*                      D_TXPOWER("calculated txpower idx %d\n",
1287                                                 power_idx); */
1288
1289                         if (power_idx < get_min_power_idx(i, band))
1290                                 power_idx = get_min_power_idx(i, band);
1291
1292                         /* adjust 5 GHz idx to support negative idxes */
1293                         if (!band)
1294                                 power_idx += 9;
1295
1296                         /* CCK, rate 32, reduce txpower for CCK */
1297                         if (i == POWER_TBL_CCK_ENTRY)
1298                                 power_idx +=
1299                                     IL_TX_POWER_CCK_COMPENSATION_C_STEP;
1300
1301                         /* stay within the table! */
1302                         if (power_idx > 107) {
1303                                 IL_WARN("txpower idx %d > 107\n",
1304                                             power_idx);
1305                                 power_idx = 107;
1306                         }
1307                         if (power_idx < 0) {
1308                                 IL_WARN("txpower idx %d < 0\n",
1309                                             power_idx);
1310                                 power_idx = 0;
1311                         }
1312
1313                         /* fill txpower command for this rate/chain */
1314                         tx_power.s.radio_tx_gain[c] =
1315                                 gain_table[band][power_idx].radio;
1316                         tx_power.s.dsp_predis_atten[c] =
1317                                 gain_table[band][power_idx].dsp;
1318
1319                         D_TXPOWER("chain %d mimo %d idx %d "
1320                                           "gain 0x%02x dsp %d\n",
1321                                           c, atten_value, power_idx,
1322                                         tx_power.s.radio_tx_gain[c],
1323                                         tx_power.s.dsp_predis_atten[c]);
1324                 } /* for each chain */
1325
1326                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1327
1328         } /* for each rate */
1329
1330         return 0;
1331 }
1332
1333 /**
1334  * il4965_send_tx_power - Configure the TXPOWER level user limit
1335  *
1336  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1337  * The power limit is taken from il->tx_power_user_lmt.
1338  */
1339 static int il4965_send_tx_power(struct il_priv *il)
1340 {
1341         struct il4965_txpowertable_cmd cmd = { 0 };
1342         int ret;
1343         u8 band = 0;
1344         bool is_ht40 = false;
1345         u8 ctrl_chan_high = 0;
1346         struct il_rxon_context *ctx = &il->ctx;
1347
1348         if (WARN_ONCE(test_bit(S_SCAN_HW, &il->status),
1349                       "TX Power requested while scanning!\n"))
1350                 return -EAGAIN;
1351
1352         band = il->band == IEEE80211_BAND_2GHZ;
1353
1354         is_ht40 = iw4965_is_ht40_channel(ctx->active.flags);
1355
1356         if (is_ht40 && (ctx->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1357                 ctrl_chan_high = 1;
1358
1359         cmd.band = band;
1360         cmd.channel = ctx->active.channel;
1361
1362         ret = il4965_fill_txpower_tbl(il, band,
1363                                 le16_to_cpu(ctx->active.channel),
1364                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1365         if (ret)
1366                 goto out;
1367
1368         ret = il_send_cmd_pdu(il,
1369                          C_TX_PWR_TBL, sizeof(cmd), &cmd);
1370
1371 out:
1372         return ret;
1373 }
1374
1375 static int il4965_send_rxon_assoc(struct il_priv *il,
1376                                    struct il_rxon_context *ctx)
1377 {
1378         int ret = 0;
1379         struct il4965_rxon_assoc_cmd rxon_assoc;
1380         const struct il_rxon_cmd *rxon1 = &ctx->staging;
1381         const struct il_rxon_cmd *rxon2 = &ctx->active;
1382
1383         if (rxon1->flags == rxon2->flags &&
1384             rxon1->filter_flags == rxon2->filter_flags &&
1385             rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
1386             rxon1->ofdm_ht_single_stream_basic_rates ==
1387                 rxon2->ofdm_ht_single_stream_basic_rates &&
1388             rxon1->ofdm_ht_dual_stream_basic_rates ==
1389                 rxon2->ofdm_ht_dual_stream_basic_rates &&
1390             rxon1->rx_chain == rxon2->rx_chain &&
1391             rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
1392                 D_INFO("Using current RXON_ASSOC.  Not resending.\n");
1393                 return 0;
1394         }
1395
1396         rxon_assoc.flags = ctx->staging.flags;
1397         rxon_assoc.filter_flags = ctx->staging.filter_flags;
1398         rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
1399         rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
1400         rxon_assoc.reserved = 0;
1401         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1402             ctx->staging.ofdm_ht_single_stream_basic_rates;
1403         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1404             ctx->staging.ofdm_ht_dual_stream_basic_rates;
1405         rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain;
1406
1407         ret = il_send_cmd_pdu_async(il, C_RXON_ASSOC,
1408                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1409
1410         return ret;
1411 }
1412
1413 static int il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx)
1414 {
1415         /* cast away the const for active_rxon in this function */
1416         struct il_rxon_cmd *active_rxon = (void *)&ctx->active;
1417         int ret;
1418         bool new_assoc =
1419                 !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1420
1421         if (!il_is_alive(il))
1422                 return -EBUSY;
1423
1424         if (!ctx->is_active)
1425                 return 0;
1426
1427         /* always get timestamp with Rx frame */
1428         ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1429
1430         ret = il_check_rxon_cmd(il, ctx);
1431         if (ret) {
1432                 IL_ERR("Invalid RXON configuration.  Not committing.\n");
1433                 return -EINVAL;
1434         }
1435
1436         /*
1437          * receive commit_rxon request
1438          * abort any previous channel switch if still in process
1439          */
1440         if (test_bit(S_CHANNEL_SWITCH_PENDING, &il->status) &&
1441             il->switch_channel != ctx->staging.channel) {
1442                 D_11H("abort channel switch on %d\n",
1443                       le16_to_cpu(il->switch_channel));
1444                 il_chswitch_done(il, false);
1445         }
1446
1447         /* If we don't need to send a full RXON, we can use
1448          * il_rxon_assoc_cmd which is used to reconfigure filter
1449          * and other flags for the current radio configuration. */
1450         if (!il_full_rxon_required(il, ctx)) {
1451                 ret = il_send_rxon_assoc(il, ctx);
1452                 if (ret) {
1453                         IL_ERR("Error setting RXON_ASSOC (%d)\n", ret);
1454                         return ret;
1455                 }
1456
1457                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1458                 il_print_rx_config_cmd(il, ctx);
1459                 /*
1460                  * We do not commit tx power settings while channel changing,
1461                  * do it now if tx power changed.
1462                  */
1463                 il_set_tx_power(il, il->tx_power_next, false);
1464                 return 0;
1465         }
1466
1467         /* If we are currently associated and the new config requires
1468          * an RXON_ASSOC and the new config wants the associated mask enabled,
1469          * we must clear the associated from the active configuration
1470          * before we apply the new config */
1471         if (il_is_associated_ctx(ctx) && new_assoc) {
1472                 D_INFO("Toggling associated bit on current RXON\n");
1473                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1474
1475                 ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
1476                                        sizeof(struct il_rxon_cmd),
1477                                        active_rxon);
1478
1479                 /* If the mask clearing failed then we set
1480                  * active_rxon back to what it was previously */
1481                 if (ret) {
1482                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1483                         IL_ERR("Error clearing ASSOC_MSK (%d)\n", ret);
1484                         return ret;
1485                 }
1486                 il_clear_ucode_stations(il, ctx);
1487                 il_restore_stations(il, ctx);
1488                 ret = il4965_restore_default_wep_keys(il, ctx);
1489                 if (ret) {
1490                         IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1491                         return ret;
1492                 }
1493         }
1494
1495         D_INFO("Sending RXON\n"
1496                        "* with%s RXON_FILTER_ASSOC_MSK\n"
1497                        "* channel = %d\n"
1498                        "* bssid = %pM\n",
1499                        (new_assoc ? "" : "out"),
1500                        le16_to_cpu(ctx->staging.channel),
1501                        ctx->staging.bssid_addr);
1502
1503         il_set_rxon_hwcrypto(il, ctx,
1504                                 !il->cfg->mod_params->sw_crypto);
1505
1506         /* Apply the new configuration
1507          * RXON unassoc clears the station table in uCode so restoration of
1508          * stations is needed after it (the RXON command) completes
1509          */
1510         if (!new_assoc) {
1511                 ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
1512                               sizeof(struct il_rxon_cmd), &ctx->staging);
1513                 if (ret) {
1514                         IL_ERR("Error setting new RXON (%d)\n", ret);
1515                         return ret;
1516                 }
1517                 D_INFO("Return from !new_assoc RXON.\n");
1518                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1519                 il_clear_ucode_stations(il, ctx);
1520                 il_restore_stations(il, ctx);
1521                 ret = il4965_restore_default_wep_keys(il, ctx);
1522                 if (ret) {
1523                         IL_ERR("Failed to restore WEP keys (%d)\n", ret);
1524                         return ret;
1525                 }
1526         }
1527         if (new_assoc) {
1528                 il->start_calib = 0;
1529                 /* Apply the new configuration
1530                  * RXON assoc doesn't clear the station table in uCode,
1531                  */
1532                 ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
1533                               sizeof(struct il_rxon_cmd), &ctx->staging);
1534                 if (ret) {
1535                         IL_ERR("Error setting new RXON (%d)\n", ret);
1536                         return ret;
1537                 }
1538                 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
1539         }
1540         il_print_rx_config_cmd(il, ctx);
1541
1542         il4965_init_sensitivity(il);
1543
1544         /* If we issue a new RXON command which required a tune then we must
1545          * send a new TXPOWER command or we won't be able to Tx any frames */
1546         ret = il_set_tx_power(il, il->tx_power_next, true);
1547         if (ret) {
1548                 IL_ERR("Error sending TX power (%d)\n", ret);
1549                 return ret;
1550         }
1551
1552         return 0;
1553 }
1554
1555 static int il4965_hw_channel_switch(struct il_priv *il,
1556                                      struct ieee80211_channel_switch *ch_switch)
1557 {
1558         struct il_rxon_context *ctx = &il->ctx;
1559         int rc;
1560         u8 band = 0;
1561         bool is_ht40 = false;
1562         u8 ctrl_chan_high = 0;
1563         struct il4965_channel_switch_cmd cmd;
1564         const struct il_channel_info *ch_info;
1565         u32 switch_time_in_usec, ucode_switch_time;
1566         u16 ch;
1567         u32 tsf_low;
1568         u8 switch_count;
1569         u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
1570         struct ieee80211_vif *vif = ctx->vif;
1571         band = il->band == IEEE80211_BAND_2GHZ;
1572
1573         is_ht40 = iw4965_is_ht40_channel(ctx->staging.flags);
1574
1575         if (is_ht40 &&
1576             (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1577                 ctrl_chan_high = 1;
1578
1579         cmd.band = band;
1580         cmd.expect_beacon = 0;
1581         ch = ch_switch->channel->hw_value;
1582         cmd.channel = cpu_to_le16(ch);
1583         cmd.rxon_flags = ctx->staging.flags;
1584         cmd.rxon_filter_flags = ctx->staging.filter_flags;
1585         switch_count = ch_switch->count;
1586         tsf_low = ch_switch->timestamp & 0x0ffffffff;
1587         /*
1588          * calculate the ucode channel switch time
1589          * adding TSF as one of the factor for when to switch
1590          */
1591         if (il->ucode_beacon_time > tsf_low && beacon_interval) {
1592                 if (switch_count > ((il->ucode_beacon_time - tsf_low) /
1593                     beacon_interval)) {
1594                         switch_count -= (il->ucode_beacon_time -
1595                                 tsf_low) / beacon_interval;
1596                 } else
1597                         switch_count = 0;
1598         }
1599         if (switch_count <= 1)
1600                 cmd.switch_time = cpu_to_le32(il->ucode_beacon_time);
1601         else {
1602                 switch_time_in_usec =
1603                         vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
1604                 ucode_switch_time = il_usecs_to_beacons(il,
1605                                                          switch_time_in_usec,
1606                                                          beacon_interval);
1607                 cmd.switch_time = il_add_beacon_time(il,
1608                                                       il->ucode_beacon_time,
1609                                                       ucode_switch_time,
1610                                                       beacon_interval);
1611         }
1612         D_11H("uCode time for the switch is 0x%x\n",
1613                       cmd.switch_time);
1614         ch_info = il_get_channel_info(il, il->band, ch);
1615         if (ch_info)
1616                 cmd.expect_beacon = il_is_channel_radar(ch_info);
1617         else {
1618                 IL_ERR("invalid channel switch from %u to %u\n",
1619                         ctx->active.channel, ch);
1620                 return -EFAULT;
1621         }
1622
1623         rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40,
1624                                       ctrl_chan_high, &cmd.tx_power);
1625         if (rc) {
1626                 D_11H("error:%d  fill txpower_tbl\n", rc);
1627                 return rc;
1628         }
1629
1630         return il_send_cmd_pdu(il,
1631                          C_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1632 }
1633
1634 /**
1635  * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1636  */
1637 static void il4965_txq_update_byte_cnt_tbl(struct il_priv *il,
1638                                             struct il_tx_queue *txq,
1639                                             u16 byte_cnt)
1640 {
1641         struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr;
1642         int txq_id = txq->q.id;
1643         int write_ptr = txq->q.write_ptr;
1644         int len = byte_cnt + IL_TX_CRC_SIZE + IL_TX_DELIMITER_SIZE;
1645         __le16 bc_ent;
1646
1647         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1648
1649         bc_ent = cpu_to_le16(len & 0xFFF);
1650         /* Set up byte count within first 256 entries */
1651         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1652
1653         /* If within first 64 entries, duplicate at end */
1654         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1655                 scd_bc_tbl[txq_id].
1656                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1657 }
1658
1659 /**
1660  * il4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1661  * @stats: Provides the temperature reading from the uCode
1662  *
1663  * A return of <0 indicates bogus data in the stats
1664  */
1665 static int il4965_hw_get_temperature(struct il_priv *il)
1666 {
1667         s32 temperature;
1668         s32 vt;
1669         s32 R1, R2, R3;
1670         u32 R4;
1671
1672         if (test_bit(S_TEMPERATURE, &il->status) &&
1673             (il->_4965.stats.flag &
1674                         STATS_REPLY_FLG_HT40_MODE_MSK)) {
1675                 D_TEMP("Running HT40 temperature calibration\n");
1676                 R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[1]);
1677                 R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[1]);
1678                 R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[1]);
1679                 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]);
1680         } else {
1681                 D_TEMP("Running temperature calibration\n");
1682                 R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[0]);
1683                 R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[0]);
1684                 R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[0]);
1685                 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]);
1686         }
1687
1688         /*
1689          * Temperature is only 23 bits, so sign extend out to 32.
1690          *
1691          * NOTE If we haven't received a stats notification yet
1692          * with an updated temperature, use R4 provided to us in the
1693          * "initialize" ALIVE response.
1694          */
1695         if (!test_bit(S_TEMPERATURE, &il->status))
1696                 vt = sign_extend32(R4, 23);
1697         else
1698                 vt = sign_extend32(le32_to_cpu(il->_4965.stats.
1699                                  general.common.temperature), 23);
1700
1701         D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1702
1703         if (R3 == R1) {
1704                 IL_ERR("Calibration conflict R1 == R3\n");
1705                 return -1;
1706         }
1707
1708         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1709          * Add offset to center the adjustment around 0 degrees Centigrade. */
1710         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1711         temperature /= (R3 - R1);
1712         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1713
1714         D_TEMP("Calibrated temperature: %dK, %dC\n",
1715                         temperature, KELVIN_TO_CELSIUS(temperature));
1716
1717         return temperature;
1718 }
1719
1720 /* Adjust Txpower only if temperature variance is greater than threshold. */
1721 #define IL_TEMPERATURE_THRESHOLD   3
1722
1723 /**
1724  * il4965_is_temp_calib_needed - determines if new calibration is needed
1725  *
1726  * If the temperature changed has changed sufficiently, then a recalibration
1727  * is needed.
1728  *
1729  * Assumes caller will replace il->last_temperature once calibration
1730  * executed.
1731  */
1732 static int il4965_is_temp_calib_needed(struct il_priv *il)
1733 {
1734         int temp_diff;
1735
1736         if (!test_bit(S_STATS, &il->status)) {
1737                 D_TEMP("Temperature not updated -- no stats.\n");
1738                 return 0;
1739         }
1740
1741         temp_diff = il->temperature - il->last_temperature;
1742
1743         /* get absolute value */
1744         if (temp_diff < 0) {
1745                 D_POWER("Getting cooler, delta %d\n", temp_diff);
1746                 temp_diff = -temp_diff;
1747         } else if (temp_diff == 0)
1748                 D_POWER("Temperature unchanged\n");
1749         else
1750                 D_POWER("Getting warmer, delta %d\n", temp_diff);
1751
1752         if (temp_diff < IL_TEMPERATURE_THRESHOLD) {
1753                 D_POWER(" => thermal txpower calib not needed\n");
1754                 return 0;
1755         }
1756
1757         D_POWER(" => thermal txpower calib needed\n");
1758
1759         return 1;
1760 }
1761
1762 static void il4965_temperature_calib(struct il_priv *il)
1763 {
1764         s32 temp;
1765
1766         temp = il4965_hw_get_temperature(il);
1767         if (IL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp))
1768                 return;
1769
1770         if (il->temperature != temp) {
1771                 if (il->temperature)
1772                         D_TEMP("Temperature changed "
1773                                        "from %dC to %dC\n",
1774                                        KELVIN_TO_CELSIUS(il->temperature),
1775                                        KELVIN_TO_CELSIUS(temp));
1776                 else
1777                         D_TEMP("Temperature "
1778                                        "initialized to %dC\n",
1779                                        KELVIN_TO_CELSIUS(temp));
1780         }
1781
1782         il->temperature = temp;
1783         set_bit(S_TEMPERATURE, &il->status);
1784
1785         if (!il->disable_tx_power_cal &&
1786              unlikely(!test_bit(S_SCANNING, &il->status)) &&
1787              il4965_is_temp_calib_needed(il))
1788                 queue_work(il->workqueue, &il->txpower_work);
1789 }
1790
1791 static u16 il4965_get_hcmd_size(u8 cmd_id, u16 len)
1792 {
1793         switch (cmd_id) {
1794         case C_RXON:
1795                 return (u16) sizeof(struct il4965_rxon_cmd);
1796         default:
1797                 return len;
1798         }
1799 }
1800
1801 static u16 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd,
1802                                                                 u8 *data)
1803 {
1804         struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data;
1805         addsta->mode = cmd->mode;
1806         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1807         memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
1808         addsta->station_flags = cmd->station_flags;
1809         addsta->station_flags_msk = cmd->station_flags_msk;
1810         addsta->tid_disable_tx = cmd->tid_disable_tx;
1811         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1812         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1813         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1814         addsta->sleep_tx_count = cmd->sleep_tx_count;
1815         addsta->reserved1 = cpu_to_le16(0);
1816         addsta->reserved2 = cpu_to_le16(0);
1817
1818         return (u16)sizeof(struct il4965_addsta_cmd);
1819 }
1820
1821 static inline u32 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp)
1822 {
1823         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1824 }
1825
1826 static inline u32 il4965_tx_status_to_mac80211(u32 status)
1827 {
1828         status &= TX_STATUS_MSK;
1829
1830         switch (status) {
1831         case TX_STATUS_SUCCESS:
1832         case TX_STATUS_DIRECT_DONE:
1833                 return IEEE80211_TX_STAT_ACK;
1834         case TX_STATUS_FAIL_DEST_PS:
1835                 return IEEE80211_TX_STAT_TX_FILTERED;
1836         default:
1837                 return 0;
1838         }
1839 }
1840
1841 static inline bool il4965_is_tx_success(u32 status)
1842 {
1843         status &= TX_STATUS_MSK;
1844         return (status == TX_STATUS_SUCCESS ||
1845                 status == TX_STATUS_DIRECT_DONE);
1846 }
1847
1848 /**
1849  * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1850  */
1851 static int il4965_tx_status_reply_tx(struct il_priv *il,
1852                                       struct il_ht_agg *agg,
1853                                       struct il4965_tx_resp *tx_resp,
1854                                       int txq_id, u16 start_idx)
1855 {
1856         u16 status;
1857         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1858         struct ieee80211_tx_info *info = NULL;
1859         struct ieee80211_hdr *hdr = NULL;
1860         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1861         int i, sh, idx;
1862         u16 seq;
1863         if (agg->wait_for_ba)
1864                 D_TX_REPLY("got tx response w/o block-ack\n");
1865
1866         agg->frame_count = tx_resp->frame_count;
1867         agg->start_idx = start_idx;
1868         agg->rate_n_flags = rate_n_flags;
1869         agg->bitmap = 0;
1870
1871         /* num frames attempted by Tx command */
1872         if (agg->frame_count == 1) {
1873                 /* Only one frame was attempted; no block-ack will arrive */
1874                 status = le16_to_cpu(frame_status[0].status);
1875                 idx = start_idx;
1876
1877                 D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
1878                                    agg->frame_count, agg->start_idx, idx);
1879
1880                 info = IEEE80211_SKB_CB(il->txq[txq_id].txb[idx].skb);
1881                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1882                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1883                 info->flags |= il4965_tx_status_to_mac80211(status);
1884                 il4965_hwrate_to_tx_control(il, rate_n_flags, info);
1885
1886                 D_TX_REPLY("1 Frame 0x%x failure :%d\n",
1887                                     status & 0xff, tx_resp->failure_frame);
1888                 D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
1889
1890                 agg->wait_for_ba = 0;
1891         } else {
1892                 /* Two or more frames were attempted; expect block-ack */
1893                 u64 bitmap = 0;
1894                 int start = agg->start_idx;
1895
1896                 /* Construct bit-map of pending frames within Tx win */
1897                 for (i = 0; i < agg->frame_count; i++) {
1898                         u16 sc;
1899                         status = le16_to_cpu(frame_status[i].status);
1900                         seq  = le16_to_cpu(frame_status[i].sequence);
1901                         idx = SEQ_TO_IDX(seq);
1902                         txq_id = SEQ_TO_QUEUE(seq);
1903
1904                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1905                                       AGG_TX_STATE_ABORT_MSK))
1906                                 continue;
1907
1908                         D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
1909                                            agg->frame_count, txq_id, idx);
1910
1911                         hdr = il_tx_queue_get_hdr(il, txq_id, idx);
1912                         if (!hdr) {
1913                                 IL_ERR(
1914                                         "BUG_ON idx doesn't point to valid skb"
1915                                         " idx=%d, txq_id=%d\n", idx, txq_id);
1916                                 return -1;
1917                         }
1918
1919                         sc = le16_to_cpu(hdr->seq_ctrl);
1920                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1921                                 IL_ERR(
1922                                         "BUG_ON idx doesn't match seq control"
1923                                         " idx=%d, seq_idx=%d, seq=%d\n",
1924                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
1925                                 return -1;
1926                         }
1927
1928                         D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
1929                                            i, idx, SEQ_TO_SN(sc));
1930
1931                         sh = idx - start;
1932                         if (sh > 64) {
1933                                 sh = (start - idx) + 0xff;
1934                                 bitmap = bitmap << sh;
1935                                 sh = 0;
1936                                 start = idx;
1937                         } else if (sh < -64)
1938                                 sh  = 0xff - (start - idx);
1939                         else if (sh < 0) {
1940                                 sh = start - idx;
1941                                 start = idx;
1942                                 bitmap = bitmap << sh;
1943                                 sh = 0;
1944                         }
1945                         bitmap |= 1ULL << sh;
1946                         D_TX_REPLY("start=%d bitmap=0x%llx\n",
1947                                            start, (unsigned long long)bitmap);
1948                 }
1949
1950                 agg->bitmap = bitmap;
1951                 agg->start_idx = start;
1952                 D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
1953                                    agg->frame_count, agg->start_idx,
1954                                    (unsigned long long)agg->bitmap);
1955
1956                 if (bitmap)
1957                         agg->wait_for_ba = 1;
1958         }
1959         return 0;
1960 }
1961
1962 static u8 il4965_find_station(struct il_priv *il, const u8 *addr)
1963 {
1964         int i;
1965         int start = 0;
1966         int ret = IL_INVALID_STATION;
1967         unsigned long flags;
1968
1969         if ((il->iw_mode == NL80211_IFTYPE_ADHOC))
1970                 start = IL_STA_ID;
1971
1972         if (is_broadcast_ether_addr(addr))
1973                 return il->ctx.bcast_sta_id;
1974
1975         spin_lock_irqsave(&il->sta_lock, flags);
1976         for (i = start; i < il->hw_params.max_stations; i++)
1977                 if (il->stations[i].used &&
1978                     (!compare_ether_addr(il->stations[i].sta.sta.addr,
1979                                          addr))) {
1980                         ret = i;
1981                         goto out;
1982                 }
1983
1984         D_ASSOC("can not find STA %pM total %d\n",
1985                               addr, il->num_stations);
1986
1987  out:
1988         /*
1989          * It may be possible that more commands interacting with stations
1990          * arrive before we completed processing the adding of
1991          * station
1992          */
1993         if (ret != IL_INVALID_STATION &&
1994             (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) ||
1995              ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) &&
1996               (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) {
1997                 IL_ERR("Requested station info for sta %d before ready.\n",
1998                         ret);
1999                 ret = IL_INVALID_STATION;
2000         }
2001         spin_unlock_irqrestore(&il->sta_lock, flags);
2002         return ret;
2003 }
2004
2005 static int il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr)
2006 {
2007         if (il->iw_mode == NL80211_IFTYPE_STATION) {
2008                 return IL_AP_ID;
2009         } else {
2010                 u8 *da = ieee80211_get_DA(hdr);
2011                 return il4965_find_station(il, da);
2012         }
2013 }
2014
2015 /**
2016  * il4965_hdl_tx - Handle standard (non-aggregation) Tx response
2017  */
2018 static void il4965_hdl_tx(struct il_priv *il,
2019                                 struct il_rx_buf *rxb)
2020 {
2021         struct il_rx_pkt *pkt = rxb_addr(rxb);
2022         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2023         int txq_id = SEQ_TO_QUEUE(sequence);
2024         int idx = SEQ_TO_IDX(sequence);
2025         struct il_tx_queue *txq = &il->txq[txq_id];
2026         struct ieee80211_hdr *hdr;
2027         struct ieee80211_tx_info *info;
2028         struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2029         u32  status = le32_to_cpu(tx_resp->u.status);
2030         int uninitialized_var(tid);
2031         int sta_id;
2032         int freed;
2033         u8 *qc = NULL;
2034         unsigned long flags;
2035
2036         if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
2037                 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
2038                           "is out of range [0-%d] %d %d\n", txq_id,
2039                           idx, txq->q.n_bd, txq->q.write_ptr,
2040                           txq->q.read_ptr);
2041                 return;
2042         }
2043
2044         txq->time_stamp = jiffies;
2045         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
2046         memset(&info->status, 0, sizeof(info->status));
2047
2048         hdr = il_tx_queue_get_hdr(il, txq_id, idx);
2049         if (ieee80211_is_data_qos(hdr->frame_control)) {
2050                 qc = ieee80211_get_qos_ctl(hdr);
2051                 tid = qc[0] & 0xf;
2052         }
2053
2054         sta_id = il4965_get_ra_sta_id(il, hdr);
2055         if (txq->sched_retry && unlikely(sta_id == IL_INVALID_STATION)) {
2056                 IL_ERR("Station not known\n");
2057                 return;
2058         }
2059
2060         spin_lock_irqsave(&il->sta_lock, flags);
2061         if (txq->sched_retry) {
2062                 const u32 scd_ssn = il4965_get_scd_ssn(tx_resp);
2063                 struct il_ht_agg *agg = NULL;
2064                 WARN_ON(!qc);
2065
2066                 agg = &il->stations[sta_id].tid[tid].agg;
2067
2068                 il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
2069
2070                 /* check if BAR is needed */
2071                 if ((tx_resp->frame_count == 1) && !il4965_is_tx_success(status))
2072                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2073
2074                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2075                         idx = il_queue_dec_wrap(scd_ssn & 0xff,
2076                                                                 txq->q.n_bd);
2077                         D_TX_REPLY("Retry scheduler reclaim scd_ssn "
2078                                            "%d idx %d\n", scd_ssn , idx);
2079                         freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2080                         if (qc)
2081                                 il4965_free_tfds_in_queue(il, sta_id,
2082                                                        tid, freed);
2083
2084                         if (il->mac80211_registered &&
2085                             il_queue_space(&txq->q) > txq->q.low_mark &&
2086                             agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2087                                 il_wake_queue(il, txq);
2088                 }
2089         } else {
2090                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2091                 info->flags |= il4965_tx_status_to_mac80211(status);
2092                 il4965_hwrate_to_tx_control(il,
2093                                         le32_to_cpu(tx_resp->rate_n_flags),
2094                                         info);
2095
2096                 D_TX_REPLY("TXQ %d status %s (0x%08x) "
2097                                    "rate_n_flags 0x%x retries %d\n",
2098                                    txq_id,
2099                                    il4965_get_tx_fail_reason(status), status,
2100                                    le32_to_cpu(tx_resp->rate_n_flags),
2101                                    tx_resp->failure_frame);
2102
2103                 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2104                 if (qc && likely(sta_id != IL_INVALID_STATION))
2105                         il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2106                 else if (sta_id == IL_INVALID_STATION)
2107                         D_TX_REPLY("Station not known\n");
2108
2109                 if (il->mac80211_registered &&
2110                     il_queue_space(&txq->q) > txq->q.low_mark)
2111                         il_wake_queue(il, txq);
2112         }
2113         if (qc && likely(sta_id != IL_INVALID_STATION))
2114                 il4965_txq_check_empty(il, sta_id, tid, txq_id);
2115
2116         il4965_check_abort_status(il, tx_resp->frame_count, status);
2117
2118         spin_unlock_irqrestore(&il->sta_lock, flags);
2119 }
2120
2121 static void il4965_hdl_beacon(struct il_priv *il,
2122                                     struct il_rx_buf *rxb)
2123 {
2124         struct il_rx_pkt *pkt = rxb_addr(rxb);
2125         struct il4965_beacon_notif *beacon = (void *)pkt->u.raw;
2126         u8 rate __maybe_unused =
2127                 il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
2128
2129         D_RX("beacon status %#x, retries:%d ibssmgr:%d "
2130                 "tsf:0x%.8x%.8x rate:%d\n",
2131                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
2132                 beacon->beacon_notify_hdr.failure_frame,
2133                 le32_to_cpu(beacon->ibss_mgr_status),
2134                 le32_to_cpu(beacon->high_tsf),
2135                 le32_to_cpu(beacon->low_tsf), rate);
2136
2137         il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
2138 }
2139
2140 /* Set up 4965-specific Rx frame reply handlers */
2141 static void il4965_handler_setup(struct il_priv *il)
2142 {
2143         /* Legacy Rx frames */
2144         il->handlers[N_RX] = il4965_hdl_rx;
2145         /* Tx response */
2146         il->handlers[C_TX] = il4965_hdl_tx;
2147         il->handlers[N_BEACON] = il4965_hdl_beacon;
2148 }
2149
2150 static struct il_hcmd_ops il4965_hcmd = {
2151         .rxon_assoc = il4965_send_rxon_assoc,
2152         .commit_rxon = il4965_commit_rxon,
2153         .set_rxon_chain = il4965_set_rxon_chain,
2154 };
2155
2156 static void il4965_post_scan(struct il_priv *il)
2157 {
2158         struct il_rxon_context *ctx = &il->ctx;
2159
2160         /*
2161          * Since setting the RXON may have been deferred while
2162          * performing the scan, fire one off if needed
2163          */
2164         if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
2165                 il_commit_rxon(il, ctx);
2166 }
2167
2168 static void il4965_post_associate(struct il_priv *il)
2169 {
2170         struct il_rxon_context *ctx = &il->ctx;
2171         struct ieee80211_vif *vif = ctx->vif;
2172         struct ieee80211_conf *conf = NULL;
2173         int ret = 0;
2174
2175         if (!vif || !il->is_open)
2176                 return;
2177
2178         if (test_bit(S_EXIT_PENDING, &il->status))
2179                 return;
2180
2181         il_scan_cancel_timeout(il, 200);
2182
2183         conf = &il->hw->conf;
2184
2185         ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2186         il_commit_rxon(il, ctx);
2187
2188         ret = il_send_rxon_timing(il, ctx);
2189         if (ret)
2190                 IL_WARN("RXON timing - "
2191                             "Attempting to continue.\n");
2192
2193         ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2194
2195         il_set_rxon_ht(il, &il->current_ht_config);
2196
2197         if (il->cfg->ops->hcmd->set_rxon_chain)
2198                 il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
2199
2200         ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
2201
2202         D_ASSOC("assoc id %d beacon interval %d\n",
2203                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
2204
2205         if (vif->bss_conf.use_short_preamble)
2206                 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2207         else
2208                 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2209
2210         if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2211                 if (vif->bss_conf.use_short_slot)
2212                         ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2213                 else
2214                         ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2215         }
2216
2217         il_commit_rxon(il, ctx);
2218
2219         D_ASSOC("Associated as %d to: %pM\n",
2220                         vif->bss_conf.aid, ctx->active.bssid_addr);
2221
2222         switch (vif->type) {
2223         case NL80211_IFTYPE_STATION:
2224                 break;
2225         case NL80211_IFTYPE_ADHOC:
2226                 il4965_send_beacon_cmd(il);
2227                 break;
2228         default:
2229                 IL_ERR("%s Should not be called in %d mode\n",
2230                           __func__, vif->type);
2231                 break;
2232         }
2233
2234         /* the chain noise calibration will enabled PM upon completion
2235          * If chain noise has already been run, then we need to enable
2236          * power management here */
2237         if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE)
2238                 il_power_update_mode(il, false);
2239
2240         /* Enable Rx differential gain and sensitivity calibrations */
2241         il4965_chain_noise_reset(il);
2242         il->start_calib = 1;
2243 }
2244
2245 static void il4965_config_ap(struct il_priv *il)
2246 {
2247         struct il_rxon_context *ctx = &il->ctx;
2248         struct ieee80211_vif *vif = ctx->vif;
2249         int ret = 0;
2250
2251         lockdep_assert_held(&il->mutex);
2252
2253         if (test_bit(S_EXIT_PENDING, &il->status))
2254                 return;
2255
2256         /* The following should be done only at AP bring up */
2257         if (!il_is_associated_ctx(ctx)) {
2258
2259                 /* RXON - unassoc (to set timing command) */
2260                 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2261                 il_commit_rxon(il, ctx);
2262
2263                 /* RXON Timing */
2264                 ret = il_send_rxon_timing(il, ctx);
2265                 if (ret)
2266                         IL_WARN("RXON timing failed - "
2267                                         "Attempting to continue.\n");
2268
2269                 /* AP has all antennas */
2270                 il->chain_noise_data.active_chains =
2271                         il->hw_params.valid_rx_ant;
2272                 il_set_rxon_ht(il, &il->current_ht_config);
2273                 if (il->cfg->ops->hcmd->set_rxon_chain)
2274                         il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
2275
2276                 ctx->staging.assoc_id = 0;
2277
2278                 if (vif->bss_conf.use_short_preamble)
2279                         ctx->staging.flags |=
2280                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2281                 else
2282                         ctx->staging.flags &=
2283                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2284
2285                 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2286                         if (vif->bss_conf.use_short_slot)
2287                                 ctx->staging.flags |=
2288                                         RXON_FLG_SHORT_SLOT_MSK;
2289                         else
2290                                 ctx->staging.flags &=
2291                                         ~RXON_FLG_SHORT_SLOT_MSK;
2292                 }
2293                 /* need to send beacon cmd before committing assoc RXON! */
2294                 il4965_send_beacon_cmd(il);
2295                 /* restore RXON assoc */
2296                 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2297                 il_commit_rxon(il, ctx);
2298         }
2299         il4965_send_beacon_cmd(il);
2300 }
2301
2302 static struct il_hcmd_utils_ops il4965_hcmd_utils = {
2303         .get_hcmd_size = il4965_get_hcmd_size,
2304         .build_addsta_hcmd = il4965_build_addsta_hcmd,
2305         .request_scan = il4965_request_scan,
2306         .post_scan = il4965_post_scan,
2307 };
2308
2309 static struct il_lib_ops il4965_lib = {
2310         .set_hw_params = il4965_hw_set_hw_params,
2311         .txq_update_byte_cnt_tbl = il4965_txq_update_byte_cnt_tbl,
2312         .txq_attach_buf_to_tfd = il4965_hw_txq_attach_buf_to_tfd,
2313         .txq_free_tfd = il4965_hw_txq_free_tfd,
2314         .txq_init = il4965_hw_tx_queue_init,
2315         .handler_setup = il4965_handler_setup,
2316         .is_valid_rtc_data_addr = il4965_hw_valid_rtc_data_addr,
2317         .init_alive_start = il4965_init_alive_start,
2318         .load_ucode = il4965_load_bsm,
2319         .dump_nic_error_log = il4965_dump_nic_error_log,
2320         .dump_fh = il4965_dump_fh,
2321         .set_channel_switch = il4965_hw_channel_switch,
2322         .apm_ops = {
2323                 .init = il_apm_init,
2324                 .config = il4965_nic_config,
2325         },
2326         .eeprom_ops = {
2327                 .regulatory_bands = {
2328                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2329                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2330                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2331                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2332                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2333                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2334                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2335                 },
2336                 .acquire_semaphore = il4965_eeprom_acquire_semaphore,
2337                 .release_semaphore = il4965_eeprom_release_semaphore,
2338         },
2339         .send_tx_power  = il4965_send_tx_power,
2340         .update_chain_flags = il4965_update_chain_flags,
2341         .temp_ops = {
2342                 .temperature = il4965_temperature_calib,
2343         },
2344         .debugfs_ops = {
2345                 .rx_stats_read = il4965_ucode_rx_stats_read,
2346                 .tx_stats_read = il4965_ucode_tx_stats_read,
2347                 .general_stats_read = il4965_ucode_general_stats_read,
2348         },
2349 };
2350
2351 static const struct il_legacy_ops il4965_legacy_ops = {
2352         .post_associate = il4965_post_associate,
2353         .config_ap = il4965_config_ap,
2354         .manage_ibss_station = il4965_manage_ibss_station,
2355         .update_bcast_stations = il4965_update_bcast_stations,
2356 };
2357
2358 struct ieee80211_ops il4965_hw_ops = {
2359         .tx = il4965_mac_tx,
2360         .start = il4965_mac_start,
2361         .stop = il4965_mac_stop,
2362         .add_interface = il_mac_add_interface,
2363         .remove_interface = il_mac_remove_interface,
2364         .change_interface = il_mac_change_interface,
2365         .config = il_mac_config,
2366         .configure_filter = il4965_configure_filter,
2367         .set_key = il4965_mac_set_key,
2368         .update_tkip_key = il4965_mac_update_tkip_key,
2369         .conf_tx = il_mac_conf_tx,
2370         .reset_tsf = il_mac_reset_tsf,
2371         .bss_info_changed = il_mac_bss_info_changed,
2372         .ampdu_action = il4965_mac_ampdu_action,
2373         .hw_scan = il_mac_hw_scan,
2374         .sta_add = il4965_mac_sta_add,
2375         .sta_remove = il_mac_sta_remove,
2376         .channel_switch = il4965_mac_channel_switch,
2377         .tx_last_beacon = il_mac_tx_last_beacon,
2378 };
2379
2380 static const struct il_ops il4965_ops = {
2381         .lib = &il4965_lib,
2382         .hcmd = &il4965_hcmd,
2383         .utils = &il4965_hcmd_utils,
2384         .led = &il4965_led_ops,
2385         .legacy = &il4965_legacy_ops,
2386         .ieee80211_ops = &il4965_hw_ops,
2387 };
2388
2389 static struct il_base_params il4965_base_params = {
2390         .eeprom_size = IL4965_EEPROM_IMG_SIZE,
2391         .num_of_queues = IL49_NUM_QUEUES,
2392         .num_of_ampdu_queues = IL49_NUM_AMPDU_QUEUES,
2393         .pll_cfg_val = 0,
2394         .set_l0s = true,
2395         .use_bsm = true,
2396         .led_compensation = 61,
2397         .chain_noise_num_beacons = IL4965_CAL_NUM_BEACONS,
2398         .wd_timeout = IL_DEF_WD_TIMEOUT,
2399         .temperature_kelvin = true,
2400         .ucode_tracing = true,
2401         .sensitivity_calib_by_driver = true,
2402         .chain_noise_calib_by_driver = true,
2403 };
2404
2405 struct il_cfg il4965_cfg = {
2406         .name = "Intel(R) Wireless WiFi Link 4965AGN",
2407         .fw_name_pre = IL4965_FW_PRE,
2408         .ucode_api_max = IL4965_UCODE_API_MAX,
2409         .ucode_api_min = IL4965_UCODE_API_MIN,
2410         .sku = IL_SKU_A|IL_SKU_G|IL_SKU_N,
2411         .valid_tx_ant = ANT_AB,
2412         .valid_rx_ant = ANT_ABC,
2413         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2414         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2415         .ops = &il4965_ops,
2416         .mod_params = &il4965_mod_params,
2417         .base_params = &il4965_base_params,
2418         .led_mode = IL_LED_BLINK,
2419         /*
2420          * Force use of chains B and C for scan RX on 5 GHz band
2421          * because the device has off-channel reception on chain A.
2422          */
2423         .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC,
2424 };
2425
2426 /* Module firmware */
2427 MODULE_FIRMWARE(IL4965_MODULE_FIRMWARE(IL4965_UCODE_API_MAX));