1 /******************************************************************************
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *****************************************************************************/
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
41 #include "iwl-eeprom.h"
45 #include "iwl-helpers.h"
46 #include "iwl-calib.h"
48 /* module parameters */
49 static struct iwl_mod_params iwl4965_mod_params = {
50 .num_of_queues = IWL4965_MAX_NUM_QUEUES,
53 /* the rest are 0 by default */
56 static void iwl4965_hw_card_show_info(struct iwl_priv *priv);
58 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
59 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
60 IWL_RATE_SISO_##s##M_PLCP, \
61 IWL_RATE_MIMO_##s##M_PLCP, \
62 IWL_RATE_##r##M_IEEE, \
63 IWL_RATE_##ip##M_INDEX, \
64 IWL_RATE_##in##M_INDEX, \
65 IWL_RATE_##rp##M_INDEX, \
66 IWL_RATE_##rn##M_INDEX, \
67 IWL_RATE_##pp##M_INDEX, \
68 IWL_RATE_##np##M_INDEX }
72 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
74 * If there isn't a valid next or previous rate then INV is used which
75 * maps to IWL_RATE_INVALID
78 const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
79 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
80 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
81 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
82 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
83 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
84 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
85 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
86 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
87 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
88 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
89 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
90 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
91 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
94 #ifdef CONFIG_IWL4965_HT
96 static const u16 default_tid_to_tx_fifo[] = {
116 #endif /*CONFIG_IWL4965_HT */
118 /* check contents of special bootstrap uCode SRAM */
119 static int iwl4965_verify_bsm(struct iwl_priv *priv)
121 __le32 *image = priv->ucode_boot.v_addr;
122 u32 len = priv->ucode_boot.len;
126 IWL_DEBUG_INFO("Begin verify bsm\n");
128 /* verify BSM SRAM contents */
129 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
130 for (reg = BSM_SRAM_LOWER_BOUND;
131 reg < BSM_SRAM_LOWER_BOUND + len;
132 reg += sizeof(u32), image++) {
133 val = iwl_read_prph(priv, reg);
134 if (val != le32_to_cpu(*image)) {
135 IWL_ERROR("BSM uCode verification failed at "
136 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
137 BSM_SRAM_LOWER_BOUND,
138 reg - BSM_SRAM_LOWER_BOUND, len,
139 val, le32_to_cpu(*image));
144 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
150 * iwl4965_load_bsm - Load bootstrap instructions
154 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
155 * in special SRAM that does not power down during RFKILL. When powering back
156 * up after power-saving sleeps (or during initial uCode load), the BSM loads
157 * the bootstrap program into the on-board processor, and starts it.
159 * The bootstrap program loads (via DMA) instructions and data for a new
160 * program from host DRAM locations indicated by the host driver in the
161 * BSM_DRAM_* registers. Once the new program is loaded, it starts
164 * When initializing the NIC, the host driver points the BSM to the
165 * "initialize" uCode image. This uCode sets up some internal data, then
166 * notifies host via "initialize alive" that it is complete.
168 * The host then replaces the BSM_DRAM_* pointer values to point to the
169 * normal runtime uCode instructions and a backup uCode data cache buffer
170 * (filled initially with starting data values for the on-board processor),
171 * then triggers the "initialize" uCode to load and launch the runtime uCode,
172 * which begins normal operation.
174 * When doing a power-save shutdown, runtime uCode saves data SRAM into
175 * the backup data cache in DRAM before SRAM is powered down.
177 * When powering back up, the BSM loads the bootstrap program. This reloads
178 * the runtime uCode instructions and the backup data cache into SRAM,
179 * and re-launches the runtime uCode from where it left off.
181 static int iwl4965_load_bsm(struct iwl_priv *priv)
183 __le32 *image = priv->ucode_boot.v_addr;
184 u32 len = priv->ucode_boot.len;
194 IWL_DEBUG_INFO("Begin load bsm\n");
196 /* make sure bootstrap program is no larger than BSM's SRAM size */
197 if (len > IWL_MAX_BSM_SIZE)
200 /* Tell bootstrap uCode where to find the "Initialize" uCode
201 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
202 * NOTE: iwl4965_initialize_alive_start() will replace these values,
203 * after the "initialize" uCode has run, to point to
204 * runtime/protocol instructions and backup data cache. */
205 pinst = priv->ucode_init.p_addr >> 4;
206 pdata = priv->ucode_init_data.p_addr >> 4;
207 inst_len = priv->ucode_init.len;
208 data_len = priv->ucode_init_data.len;
210 ret = iwl_grab_nic_access(priv);
214 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
215 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
216 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
217 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
219 /* Fill BSM memory with bootstrap instructions */
220 for (reg_offset = BSM_SRAM_LOWER_BOUND;
221 reg_offset < BSM_SRAM_LOWER_BOUND + len;
222 reg_offset += sizeof(u32), image++)
223 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
225 ret = iwl4965_verify_bsm(priv);
227 iwl_release_nic_access(priv);
231 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
232 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
233 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
234 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
236 /* Load bootstrap code into instruction SRAM now,
237 * to prepare to load "initialize" uCode */
238 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
240 /* Wait for load of bootstrap uCode to finish */
241 for (i = 0; i < 100; i++) {
242 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
243 if (!(done & BSM_WR_CTRL_REG_BIT_START))
248 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
250 IWL_ERROR("BSM write did not complete!\n");
254 /* Enable future boot loads whenever power management unit triggers it
255 * (e.g. when powering back up after power-save shutdown) */
256 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
258 iwl_release_nic_access(priv);
263 static int iwl4965_init_drv(struct iwl_priv *priv)
268 priv->antenna = (enum iwl4965_antenna)priv->cfg->mod_params->antenna;
269 priv->retry_rate = 1;
270 priv->ibss_beacon = NULL;
272 spin_lock_init(&priv->lock);
273 spin_lock_init(&priv->power_data.lock);
274 spin_lock_init(&priv->sta_lock);
275 spin_lock_init(&priv->hcmd_lock);
276 spin_lock_init(&priv->lq_mngr.lock);
278 priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
279 sizeof(struct iwl4965_shared),
282 if (!priv->shared_virt) {
287 memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
290 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
291 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
293 INIT_LIST_HEAD(&priv->free_frames);
295 mutex_init(&priv->mutex);
297 /* Clear the driver's (not device's) station table */
298 iwlcore_clear_stations_table(priv);
300 priv->data_retry_limit = -1;
301 priv->ieee_channels = NULL;
302 priv->ieee_rates = NULL;
303 priv->band = IEEE80211_BAND_2GHZ;
305 priv->iw_mode = IEEE80211_IF_TYPE_STA;
307 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
308 priv->valid_antenna = 0x7; /* assume all 3 connected */
309 priv->ps_mode = IWL_MIMO_PS_NONE;
311 /* Choose which receivers/antennas to use */
312 iwl4965_set_rxon_chain(priv);
314 iwlcore_reset_qos(priv);
316 priv->qos_data.qos_active = 0;
317 priv->qos_data.qos_cap.val = 0;
319 iwlcore_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
321 priv->rates_mask = IWL_RATES_MASK;
322 /* If power management is turned on, default to AC mode */
323 priv->power_mode = IWL_POWER_AC;
324 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
326 ret = iwl_init_channel_map(priv);
328 IWL_ERROR("initializing regulatory failed: %d\n", ret);
332 ret = iwl4965_init_geos(priv);
334 IWL_ERROR("initializing geos failed: %d\n", ret);
335 goto err_free_channel_map;
338 ret = ieee80211_register_hw(priv->hw);
340 IWL_ERROR("Failed to register network device (error %d)\n",
345 priv->hw->conf.beacon_int = 100;
346 priv->mac80211_registered = 1;
351 iwl4965_free_geos(priv);
352 err_free_channel_map:
353 iwl_free_channel_map(priv);
358 static int is_fat_channel(__le32 rxon_flags)
360 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
361 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
364 static u8 is_single_stream(struct iwl_priv *priv)
366 #ifdef CONFIG_IWL4965_HT
367 if (!priv->current_ht_config.is_ht ||
368 (priv->current_ht_config.supp_mcs_set[1] == 0) ||
369 (priv->ps_mode == IWL_MIMO_PS_STATIC))
373 #endif /*CONFIG_IWL4965_HT */
377 int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
381 /* 4965 HT rate format */
382 if (rate_n_flags & RATE_MCS_HT_MSK) {
383 idx = (rate_n_flags & 0xff);
385 if (idx >= IWL_RATE_MIMO_6M_PLCP)
386 idx = idx - IWL_RATE_MIMO_6M_PLCP;
388 idx += IWL_FIRST_OFDM_RATE;
389 /* skip 9M not supported in ht*/
390 if (idx >= IWL_RATE_9M_INDEX)
392 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
395 /* 4965 legacy rate format, search for match in table */
397 for (idx = 0; idx < ARRAY_SIZE(iwl4965_rates); idx++)
398 if (iwl4965_rates[idx].plcp == (rate_n_flags & 0xFF))
406 * translate ucode response to mac80211 tx status control values
408 void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
409 struct ieee80211_tx_control *control)
413 control->antenna_sel_tx =
414 ((rate_n_flags & RATE_MCS_ANT_AB_MSK) >> RATE_MCS_ANT_POS);
415 if (rate_n_flags & RATE_MCS_HT_MSK)
416 control->flags |= IEEE80211_TXCTL_OFDM_HT;
417 if (rate_n_flags & RATE_MCS_GF_MSK)
418 control->flags |= IEEE80211_TXCTL_GREEN_FIELD;
419 if (rate_n_flags & RATE_MCS_FAT_MSK)
420 control->flags |= IEEE80211_TXCTL_40_MHZ_WIDTH;
421 if (rate_n_flags & RATE_MCS_DUP_MSK)
422 control->flags |= IEEE80211_TXCTL_DUP_DATA;
423 if (rate_n_flags & RATE_MCS_SGI_MSK)
424 control->flags |= IEEE80211_TXCTL_SHORT_GI;
425 /* since iwl4965_hwrate_to_plcp_idx is band indifferent, we always use
426 * IEEE80211_BAND_2GHZ band as it contains all the rates */
427 rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
428 if (rate_index == -1)
429 control->tx_rate = NULL;
432 &priv->bands[IEEE80211_BAND_2GHZ].bitrates[rate_index];
436 * Determine how many receiver/antenna chains to use.
437 * More provides better reception via diversity. Fewer saves power.
438 * MIMO (dual stream) requires at least 2, but works better with 3.
439 * This does not determine *which* chains to use, just how many.
441 static int iwl4965_get_rx_chain_counter(struct iwl_priv *priv,
442 u8 *idle_state, u8 *rx_state)
444 u8 is_single = is_single_stream(priv);
445 u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
447 /* # of Rx chains to use when expecting MIMO. */
448 if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
453 /* # Rx chains when idling and maybe trying to save power */
454 switch (priv->ps_mode) {
455 case IWL_MIMO_PS_STATIC:
456 case IWL_MIMO_PS_DYNAMIC:
457 *idle_state = (is_cam) ? 2 : 1;
459 case IWL_MIMO_PS_NONE:
460 *idle_state = (is_cam) ? *rx_state : 1;
470 int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
475 spin_lock_irqsave(&priv->lock, flags);
476 rc = iwl_grab_nic_access(priv);
478 spin_unlock_irqrestore(&priv->lock, flags);
483 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
484 rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
487 IWL_ERROR("Can't stop Rx DMA.\n");
489 iwl_release_nic_access(priv);
490 spin_unlock_irqrestore(&priv->lock, flags);
495 static int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
500 spin_lock_irqsave(&priv->lock, flags);
501 ret = iwl_grab_nic_access(priv);
503 spin_unlock_irqrestore(&priv->lock, flags);
507 if (src == IWL_PWR_SRC_VAUX) {
509 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
512 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
513 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
514 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
515 ~APMG_PS_CTRL_MSK_PWR_SRC);
518 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
519 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
520 ~APMG_PS_CTRL_MSK_PWR_SRC);
523 iwl_release_nic_access(priv);
524 spin_unlock_irqrestore(&priv->lock, flags);
529 static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
533 unsigned int rb_size;
535 spin_lock_irqsave(&priv->lock, flags);
536 ret = iwl_grab_nic_access(priv);
538 spin_unlock_irqrestore(&priv->lock, flags);
542 if (priv->cfg->mod_params->amsdu_size_8K)
543 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
545 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
548 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
550 /* Reset driver's Rx queue write index */
551 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
553 /* Tell device where to find RBD circular buffer in DRAM */
554 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
557 /* Tell device where in DRAM to update its Rx status */
558 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
560 offsetof(struct iwl4965_shared, rb_closed)) >> 4);
562 /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
563 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
564 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
565 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
568 (RX_QUEUE_SIZE_LOG <<
569 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
572 * iwl_write32(priv,CSR_INT_COAL_REG,0);
575 iwl_release_nic_access(priv);
576 spin_unlock_irqrestore(&priv->lock, flags);
581 /* Tell 4965 where to find the "keep warm" buffer */
582 static int iwl4965_kw_init(struct iwl_priv *priv)
587 spin_lock_irqsave(&priv->lock, flags);
588 rc = iwl_grab_nic_access(priv);
592 iwl_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
593 priv->kw.dma_addr >> 4);
594 iwl_release_nic_access(priv);
596 spin_unlock_irqrestore(&priv->lock, flags);
600 static int iwl4965_kw_alloc(struct iwl_priv *priv)
602 struct pci_dev *dev = priv->pci_dev;
603 struct iwl4965_kw *kw = &priv->kw;
605 kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
606 kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
614 * iwl4965_kw_free - Free the "keep warm" buffer
616 static void iwl4965_kw_free(struct iwl_priv *priv)
618 struct pci_dev *dev = priv->pci_dev;
619 struct iwl4965_kw *kw = &priv->kw;
622 pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
623 memset(kw, 0, sizeof(*kw));
628 * iwl4965_txq_ctx_reset - Reset TX queue context
629 * Destroys all DMA structures and initialise them again
634 static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
637 int txq_id, slots_num;
640 iwl4965_kw_free(priv);
642 /* Free all tx/cmd queues and keep-warm buffer */
643 iwl4965_hw_txq_ctx_free(priv);
645 /* Alloc keep-warm buffer */
646 rc = iwl4965_kw_alloc(priv);
648 IWL_ERROR("Keep Warm allocation failed");
652 spin_lock_irqsave(&priv->lock, flags);
654 rc = iwl_grab_nic_access(priv);
656 IWL_ERROR("TX reset failed");
657 spin_unlock_irqrestore(&priv->lock, flags);
661 /* Turn off all Tx DMA channels */
662 iwl_write_prph(priv, IWL49_SCD_TXFACT, 0);
663 iwl_release_nic_access(priv);
664 spin_unlock_irqrestore(&priv->lock, flags);
666 /* Tell 4965 where to find the keep-warm buffer */
667 rc = iwl4965_kw_init(priv);
669 IWL_ERROR("kw_init failed\n");
673 /* Alloc and init all (default 16) Tx queues,
674 * including the command queue (#4) */
675 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
676 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
677 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
678 rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
681 IWL_ERROR("Tx %d queue init failed\n", txq_id);
689 iwl4965_hw_txq_ctx_free(priv);
691 iwl4965_kw_free(priv);
696 int iwl4965_hw_nic_init(struct iwl_priv *priv)
700 struct iwl4965_rx_queue *rxq = &priv->rxq;
705 iwl4965_power_init_handle(priv);
708 spin_lock_irqsave(&priv->lock, flags);
710 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
711 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
713 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
714 rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
715 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
716 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
718 spin_unlock_irqrestore(&priv->lock, flags);
719 IWL_DEBUG_INFO("Failed to init the card\n");
723 rc = iwl_grab_nic_access(priv);
725 spin_unlock_irqrestore(&priv->lock, flags);
729 iwl_read_prph(priv, APMG_CLK_CTRL_REG);
731 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
732 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
733 iwl_read_prph(priv, APMG_CLK_CTRL_REG);
737 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
738 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
740 iwl_release_nic_access(priv);
741 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
742 spin_unlock_irqrestore(&priv->lock, flags);
744 /* Determine HW type */
745 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
749 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
751 rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
753 spin_lock_irqsave(&priv->lock, flags);
755 if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
756 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
757 /* Enable No Snoop field */
758 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
762 spin_unlock_irqrestore(&priv->lock, flags);
764 if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
765 IWL_ERROR("Older EEPROM detected! Aborting.\n");
769 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
771 /* disable L1 entry -- workaround for pre-B1 */
772 pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
774 spin_lock_irqsave(&priv->lock, flags);
776 /* set CSR_HW_CONFIG_REG for uCode use */
778 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
779 CSR49_HW_IF_CONFIG_REG_BIT_4965_R |
780 CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI |
781 CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI);
783 rc = iwl_grab_nic_access(priv);
785 spin_unlock_irqrestore(&priv->lock, flags);
786 IWL_DEBUG_INFO("Failed to init the card\n");
790 iwl_read_prph(priv, APMG_PS_CTRL_REG);
791 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
793 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
795 iwl_release_nic_access(priv);
796 spin_unlock_irqrestore(&priv->lock, flags);
798 iwl4965_hw_card_show_info(priv);
802 /* Allocate the RX queue, or reset if it is already allocated */
804 rc = iwl4965_rx_queue_alloc(priv);
806 IWL_ERROR("Unable to initialize Rx queue\n");
810 iwl4965_rx_queue_reset(priv, rxq);
812 iwl4965_rx_replenish(priv);
814 iwl4965_rx_init(priv, rxq);
816 spin_lock_irqsave(&priv->lock, flags);
818 rxq->need_update = 1;
819 iwl4965_rx_queue_update_write_ptr(priv, rxq);
821 spin_unlock_irqrestore(&priv->lock, flags);
823 /* Allocate and init all Tx and Command queues */
824 rc = iwl4965_txq_ctx_reset(priv);
828 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
829 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
831 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
832 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
834 set_bit(STATUS_INIT, &priv->status);
839 int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
845 spin_lock_irqsave(&priv->lock, flags);
847 /* set stop master bit */
848 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
850 reg_val = iwl_read32(priv, CSR_GP_CNTRL);
852 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
853 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
854 IWL_DEBUG_INFO("Card in power save, master is already "
857 rc = iwl_poll_bit(priv, CSR_RESET,
858 CSR_RESET_REG_FLAG_MASTER_DISABLED,
859 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
861 spin_unlock_irqrestore(&priv->lock, flags);
866 spin_unlock_irqrestore(&priv->lock, flags);
867 IWL_DEBUG_INFO("stop master\n");
873 * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
875 void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
881 /* Stop each Tx DMA channel, and wait for it to be idle */
882 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
883 spin_lock_irqsave(&priv->lock, flags);
884 if (iwl_grab_nic_access(priv)) {
885 spin_unlock_irqrestore(&priv->lock, flags);
889 iwl_write_direct32(priv,
890 IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
891 iwl_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
892 IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
894 iwl_release_nic_access(priv);
895 spin_unlock_irqrestore(&priv->lock, flags);
898 /* Deallocate memory for all Tx queues */
899 iwl4965_hw_txq_ctx_free(priv);
902 int iwl4965_hw_nic_reset(struct iwl_priv *priv)
907 iwl4965_hw_nic_stop_master(priv);
909 spin_lock_irqsave(&priv->lock, flags);
911 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
915 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
916 rc = iwl_poll_bit(priv, CSR_RESET,
917 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
918 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
922 rc = iwl_grab_nic_access(priv);
924 iwl_write_prph(priv, APMG_CLK_EN_REG,
925 APMG_CLK_VAL_DMA_CLK_RQT |
926 APMG_CLK_VAL_BSM_CLK_RQT);
930 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
931 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
933 iwl_release_nic_access(priv);
936 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
937 wake_up_interruptible(&priv->wait_command_queue);
939 spin_unlock_irqrestore(&priv->lock, flags);
945 #define REG_RECALIB_PERIOD (60)
948 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
950 * This callback is provided in order to send a statistics request.
952 * This timer function is continually reset to execute within
953 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
954 * was received. We need to ensure we receive the statistics in order
955 * to update the temperature used for calibrating the TXPOWER.
957 static void iwl4965_bg_statistics_periodic(unsigned long data)
959 struct iwl_priv *priv = (struct iwl_priv *)data;
961 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
964 iwl_send_statistics_request(priv, CMD_ASYNC);
967 #define CT_LIMIT_CONST 259
968 #define TM_CT_KILL_THRESHOLD 110
970 void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
972 struct iwl4965_ct_kill_config cmd;
975 u32 crit_temperature;
979 spin_lock_irqsave(&priv->lock, flags);
980 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
981 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
982 spin_unlock_irqrestore(&priv->lock, flags);
984 if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
985 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
986 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
987 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
989 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
990 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
991 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
994 temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
996 crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
997 cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
998 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1001 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
1003 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
1006 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1008 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
1009 * Called after every association, but this runs only once!
1010 * ... once chain noise is calibrated the first time, it's good forever. */
1011 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
1013 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
1015 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
1016 struct iwl4965_calibration_cmd cmd;
1018 memset(&cmd, 0, sizeof(cmd));
1019 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1020 cmd.diff_gain_a = 0;
1021 cmd.diff_gain_b = 0;
1022 cmd.diff_gain_c = 0;
1023 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1025 IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
1026 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
1027 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
1031 static void iwl4965_gain_computation(struct iwl_priv *priv,
1033 u16 min_average_noise_antenna_i,
1034 u32 min_average_noise)
1037 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
1039 data->delta_gain_code[min_average_noise_antenna_i] = 0;
1041 for (i = 0; i < NUM_RX_CHAINS; i++) {
1044 if (!(data->disconn_array[i]) &&
1045 (data->delta_gain_code[i] ==
1046 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
1047 delta_g = average_noise[i] - min_average_noise;
1048 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
1049 data->delta_gain_code[i] =
1050 min(data->delta_gain_code[i],
1051 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
1053 data->delta_gain_code[i] =
1054 (data->delta_gain_code[i] | (1 << 2));
1056 data->delta_gain_code[i] = 0;
1059 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
1060 data->delta_gain_code[0],
1061 data->delta_gain_code[1],
1062 data->delta_gain_code[2]);
1064 /* Differential gain gets sent to uCode only once */
1065 if (!data->radio_write) {
1066 struct iwl4965_calibration_cmd cmd;
1067 data->radio_write = 1;
1069 memset(&cmd, 0, sizeof(cmd));
1070 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1071 cmd.diff_gain_a = data->delta_gain_code[0];
1072 cmd.diff_gain_b = data->delta_gain_code[1];
1073 cmd.diff_gain_c = data->delta_gain_code[2];
1074 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1077 IWL_DEBUG_CALIB("fail sending cmd "
1078 "REPLY_PHY_CALIBRATION_CMD \n");
1080 /* TODO we might want recalculate
1081 * rx_chain in rxon cmd */
1083 /* Mark so we run this algo only once! */
1084 data->state = IWL_CHAIN_NOISE_CALIBRATED;
1086 data->chain_noise_a = 0;
1087 data->chain_noise_b = 0;
1088 data->chain_noise_c = 0;
1089 data->chain_signal_a = 0;
1090 data->chain_signal_b = 0;
1091 data->chain_signal_c = 0;
1092 data->beacon_count = 0;
1095 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
1097 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1100 mutex_lock(&priv->mutex);
1102 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1103 test_bit(STATUS_SCANNING, &priv->status)) {
1104 mutex_unlock(&priv->mutex);
1108 if (priv->start_calib) {
1109 iwl_chain_noise_calibration(priv, &priv->statistics);
1111 iwl_sensitivity_calibration(priv, &priv->statistics);
1114 mutex_unlock(&priv->mutex);
1117 #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
1119 static void iwl4965_bg_txpower_work(struct work_struct *work)
1121 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1124 /* If a scan happened to start before we got here
1125 * then just return; the statistics notification will
1126 * kick off another scheduled work to compensate for
1127 * any temperature delta we missed here. */
1128 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1129 test_bit(STATUS_SCANNING, &priv->status))
1132 mutex_lock(&priv->mutex);
1134 /* Regardless of if we are assocaited, we must reconfigure the
1135 * TX power since frames can be sent on non-radar channels while
1137 iwl4965_hw_reg_send_txpower(priv);
1139 /* Update last_temperature to keep is_calib_needed from running
1140 * when it isn't needed... */
1141 priv->last_temperature = priv->temperature;
1143 mutex_unlock(&priv->mutex);
1147 * Acquire priv->lock before calling this function !
1149 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
1151 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
1152 (index & 0xff) | (txq_id << 8));
1153 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
1157 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
1158 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
1159 * @scd_retry: (1) Indicates queue will be used in aggregation mode
1161 * NOTE: Acquire priv->lock before calling this function !
1163 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
1164 struct iwl4965_tx_queue *txq,
1165 int tx_fifo_id, int scd_retry)
1167 int txq_id = txq->q.id;
1169 /* Find out whether to activate Tx queue */
1170 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
1172 /* Set up and activate */
1173 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1174 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
1175 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
1176 (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
1177 (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
1178 SCD_QUEUE_STTS_REG_MSK);
1180 txq->sched_retry = scd_retry;
1182 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
1183 active ? "Activate" : "Deactivate",
1184 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
1187 static const u16 default_queue_to_tx_fifo[] = {
1197 static inline void iwl4965_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1199 set_bit(txq_id, &priv->txq_ctx_active_msk);
1202 static inline void iwl4965_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1204 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1207 int iwl4965_alive_notify(struct iwl_priv *priv)
1211 unsigned long flags;
1214 spin_lock_irqsave(&priv->lock, flags);
1216 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1217 memset(&(priv->sensitivity_data), 0,
1218 sizeof(struct iwl_sensitivity_data));
1219 memset(&(priv->chain_noise_data), 0,
1220 sizeof(struct iwl_chain_noise_data));
1221 for (i = 0; i < NUM_RX_CHAINS; i++)
1222 priv->chain_noise_data.delta_gain_code[i] =
1223 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
1224 #endif /* CONFIG_IWL4965_RUN_TIME_CALIB*/
1225 ret = iwl_grab_nic_access(priv);
1227 spin_unlock_irqrestore(&priv->lock, flags);
1231 /* Clear 4965's internal Tx Scheduler data base */
1232 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
1233 a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
1234 for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1235 iwl_write_targ_mem(priv, a, 0);
1236 for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
1237 iwl_write_targ_mem(priv, a, 0);
1238 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
1239 iwl_write_targ_mem(priv, a, 0);
1241 /* Tel 4965 where to find Tx byte count tables */
1242 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
1243 (priv->shared_phys +
1244 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
1246 /* Disable chain mode for all queues */
1247 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
1249 /* Initialize each Tx queue (including the command queue) */
1250 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
1252 /* TFD circular buffer read/write indexes */
1253 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
1254 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1256 /* Max Tx Window size for Scheduler-ACK mode */
1257 iwl_write_targ_mem(priv, priv->scd_base_addr +
1258 SCD_CONTEXT_QUEUE_OFFSET(i),
1260 SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1261 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1264 iwl_write_targ_mem(priv, priv->scd_base_addr +
1265 SCD_CONTEXT_QUEUE_OFFSET(i) +
1268 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
1269 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1272 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
1273 (1 << priv->hw_params.max_txq_num) - 1);
1275 /* Activate all Tx DMA/FIFO channels */
1276 iwl_write_prph(priv, IWL49_SCD_TXFACT,
1277 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
1279 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
1281 /* Map each Tx/cmd queue to its corresponding fifo */
1282 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1283 int ac = default_queue_to_tx_fifo[i];
1284 iwl4965_txq_ctx_activate(priv, i);
1285 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1288 iwl_release_nic_access(priv);
1289 spin_unlock_irqrestore(&priv->lock, flags);
1291 /* Ask for statistics now, the uCode will send statistics notification
1292 * periodically after association */
1293 iwl_send_statistics_request(priv, CMD_ASYNC);
1297 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1298 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
1302 .auto_corr_min_ofdm = 85,
1303 .auto_corr_min_ofdm_mrc = 170,
1304 .auto_corr_min_ofdm_x1 = 105,
1305 .auto_corr_min_ofdm_mrc_x1 = 220,
1307 .auto_corr_max_ofdm = 120,
1308 .auto_corr_max_ofdm_mrc = 210,
1309 .auto_corr_max_ofdm_x1 = 140,
1310 .auto_corr_max_ofdm_mrc_x1 = 270,
1312 .auto_corr_min_cck = 125,
1313 .auto_corr_max_cck = 200,
1314 .auto_corr_min_cck_mrc = 200,
1315 .auto_corr_max_cck_mrc = 400,
1323 * iwl4965_hw_set_hw_params
1325 * Called when initializing driver
1327 int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
1330 if ((priv->cfg->mod_params->num_of_queues > IWL4965_MAX_NUM_QUEUES) ||
1331 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
1332 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
1333 IWL_MIN_NUM_QUEUES, IWL4965_MAX_NUM_QUEUES);
1337 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
1338 priv->hw_params.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
1339 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1340 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1341 if (priv->cfg->mod_params->amsdu_size_8K)
1342 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
1344 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
1345 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1346 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
1347 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
1349 priv->hw_params.tx_chains_num = 2;
1350 priv->hw_params.rx_chains_num = 2;
1351 priv->hw_params.valid_tx_ant = (IWL_ANTENNA_MAIN | IWL_ANTENNA_AUX);
1352 priv->hw_params.valid_rx_ant = (IWL_ANTENNA_MAIN | IWL_ANTENNA_AUX);
1353 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
1354 priv->hw_params.sens = &iwl4965_sensitivity;
1361 * iwl4965_hw_txq_ctx_free - Free TXQ Context
1363 * Destroy all TX DMA queues and structures
1365 void iwl4965_hw_txq_ctx_free(struct iwl_priv *priv)
1370 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
1371 iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
1373 /* Keep-warm buffer */
1374 iwl4965_kw_free(priv);
1378 * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
1380 * Does NOT advance any TFD circular buffer read/write indexes
1381 * Does NOT free the TFD itself (which is within circular buffer)
1383 int iwl4965_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
1385 struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
1386 struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
1387 struct pci_dev *dev = priv->pci_dev;
1392 /* Host command buffers stay mapped in memory, nothing to clean */
1393 if (txq->q.id == IWL_CMD_QUEUE_NUM)
1396 /* Sanity check on number of chunks */
1397 counter = IWL_GET_BITS(*bd, num_tbs);
1398 if (counter > MAX_NUM_OF_TBS) {
1399 IWL_ERROR("Too many chunks: %i\n", counter);
1400 /* @todo issue fatal error, it is quite serious situation */
1404 /* Unmap chunks, if any.
1405 * TFD info for odd chunks is different format than for even chunks. */
1406 for (i = 0; i < counter; i++) {
1413 IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
1414 (IWL_GET_BITS(bd->pa[index],
1415 tb2_addr_hi20) << 16),
1416 IWL_GET_BITS(bd->pa[index], tb2_len),
1420 pci_unmap_single(dev,
1421 le32_to_cpu(bd->pa[index].tb1_addr),
1422 IWL_GET_BITS(bd->pa[index], tb1_len),
1425 /* Free SKB, if any, for this chunk */
1426 if (txq->txb[txq->q.read_ptr].skb[i]) {
1427 struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
1430 txq->txb[txq->q.read_ptr].skb[i] = NULL;
1436 int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1438 IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
1442 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1455 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1461 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
1463 * Determines power supply voltage compensation for txpower calculations.
1464 * Returns number of 1/2-dB steps to subtract from gain table index,
1465 * to compensate for difference between power supply voltage during
1466 * factory measurements, vs. current power supply voltage.
1468 * Voltage indication is higher for lower voltage.
1469 * Lower voltage requires more gain (lower gain table index).
1471 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1472 s32 current_voltage)
1476 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1477 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1480 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1481 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1483 if (current_voltage > eeprom_voltage)
1485 if ((comp < -2) || (comp > 2))
1491 static const struct iwl_channel_info *
1492 iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
1493 enum ieee80211_band band, u16 channel)
1495 const struct iwl_channel_info *ch_info;
1497 ch_info = iwl_get_channel_info(priv, band, channel);
1499 if (!is_channel_valid(ch_info))
1505 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1507 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1508 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1509 return CALIB_CH_GROUP_5;
1511 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1512 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1513 return CALIB_CH_GROUP_1;
1515 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1516 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1517 return CALIB_CH_GROUP_2;
1519 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1520 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1521 return CALIB_CH_GROUP_3;
1523 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1524 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1525 return CALIB_CH_GROUP_4;
1527 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1531 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
1535 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
1536 if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
1539 if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
1540 && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
1547 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1554 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1560 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
1562 * Interpolates factory measurements from the two sample channels within a
1563 * sub-band, to apply to channel of interest. Interpolation is proportional to
1564 * differences in channel frequencies, which is proportional to differences
1565 * in channel number.
1567 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
1568 struct iwl4965_eeprom_calib_ch_info *chan_info)
1573 const struct iwl4965_eeprom_calib_measure *m1;
1574 const struct iwl4965_eeprom_calib_measure *m2;
1575 struct iwl4965_eeprom_calib_measure *omeas;
1579 s = iwl4965_get_sub_band(priv, channel);
1580 if (s >= EEPROM_TX_POWER_BANDS) {
1581 IWL_ERROR("Tx Power can not find channel %d ", channel);
1585 ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
1586 ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
1587 chan_info->ch_num = (u8) channel;
1589 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1590 channel, s, ch_i1, ch_i2);
1592 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1593 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1594 m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
1595 measurements[c][m]);
1596 m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
1597 measurements[c][m]);
1598 omeas = &(chan_info->measurements[c][m]);
1601 (u8) iwl4965_interpolate_value(channel, ch_i1,
1606 (u8) iwl4965_interpolate_value(channel, ch_i1,
1607 m1->gain_idx, ch_i2,
1609 omeas->temperature =
1610 (u8) iwl4965_interpolate_value(channel, ch_i1,
1615 (s8) iwl4965_interpolate_value(channel, ch_i1,
1620 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1621 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1623 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1624 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1626 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1627 m1->pa_det, m2->pa_det, omeas->pa_det);
1629 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1630 m1->temperature, m2->temperature,
1631 omeas->temperature);
1638 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1639 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1640 static s32 back_off_table[] = {
1641 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1642 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1643 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1644 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1648 /* Thermal compensation values for txpower for various frequency ranges ...
1649 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1650 static struct iwl4965_txpower_comp_entry {
1651 s32 degrees_per_05db_a;
1652 s32 degrees_per_05db_a_denom;
1653 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1654 {9, 2}, /* group 0 5.2, ch 34-43 */
1655 {4, 1}, /* group 1 5.2, ch 44-70 */
1656 {4, 1}, /* group 2 5.2, ch 71-124 */
1657 {4, 1}, /* group 3 5.2, ch 125-200 */
1658 {3, 1} /* group 4 2.4, ch all */
1661 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1664 if ((rate_power_index & 7) <= 4)
1665 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1667 return MIN_TX_GAIN_INDEX;
1675 static const struct gain_entry gain_table[2][108] = {
1676 /* 5.2GHz power gain index table */
1678 {123, 0x3F}, /* highest txpower */
1787 /* 2.4GHz power gain index table */
1789 {110, 0x3f}, /* highest txpower */
1900 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1901 u8 is_fat, u8 ctrl_chan_high,
1902 struct iwl4965_tx_power_db *tx_power_tbl)
1904 u8 saturation_power;
1906 s32 user_target_power;
1910 s32 current_regulatory;
1911 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1914 const struct iwl_channel_info *ch_info = NULL;
1915 struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
1916 const struct iwl4965_eeprom_calib_measure *measurement;
1919 s32 voltage_compensation;
1920 s32 degrees_per_05db_num;
1921 s32 degrees_per_05db_denom;
1923 s32 temperature_comp[2];
1924 s32 factory_gain_index[2];
1925 s32 factory_actual_pwr[2];
1928 /* Sanity check requested level (dBm) */
1929 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
1930 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
1931 priv->user_txpower_limit);
1934 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
1935 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
1936 priv->user_txpower_limit);
1940 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1941 * are used for indexing into txpower table) */
1942 user_target_power = 2 * priv->user_txpower_limit;
1944 /* Get current (RXON) channel, band, width */
1946 iwl4965_get_channel_txpower_info(priv, priv->band, channel);
1948 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1954 /* get txatten group, used to select 1) thermal txpower adjustment
1955 * and 2) mimo txpower balance between Tx chains. */
1956 txatten_grp = iwl4965_get_tx_atten_grp(channel);
1957 if (txatten_grp < 0)
1960 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1961 channel, txatten_grp);
1970 /* hardware txpower limits ...
1971 * saturation (clipping distortion) txpowers are in half-dBm */
1973 saturation_power = priv->eeprom.calib_info.saturation_power24;
1975 saturation_power = priv->eeprom.calib_info.saturation_power52;
1977 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1978 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1980 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1982 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1985 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1986 * max_power_avg values are in dBm, convert * 2 */
1988 reg_limit = ch_info->fat_max_power_avg * 2;
1990 reg_limit = ch_info->max_power_avg * 2;
1992 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1993 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1995 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1997 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
2000 /* Interpolate txpower calibration values for this channel,
2001 * based on factory calibration tests on spaced channels. */
2002 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
2004 /* calculate tx gain adjustment based on power supply voltage */
2005 voltage = priv->eeprom.calib_info.voltage;
2006 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
2007 voltage_compensation =
2008 iwl4965_get_voltage_compensation(voltage, init_voltage);
2010 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
2012 voltage, voltage_compensation);
2014 /* get current temperature (Celsius) */
2015 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
2016 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
2017 current_temp = KELVIN_TO_CELSIUS(current_temp);
2019 /* select thermal txpower adjustment params, based on channel group
2020 * (same frequency group used for mimo txatten adjustment) */
2021 degrees_per_05db_num =
2022 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
2023 degrees_per_05db_denom =
2024 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
2026 /* get per-chain txpower values from factory measurements */
2027 for (c = 0; c < 2; c++) {
2028 measurement = &ch_eeprom_info.measurements[c][1];
2030 /* txgain adjustment (in half-dB steps) based on difference
2031 * between factory and current temperature */
2032 factory_temp = measurement->temperature;
2033 iwl4965_math_div_round((current_temp - factory_temp) *
2034 degrees_per_05db_denom,
2035 degrees_per_05db_num,
2036 &temperature_comp[c]);
2038 factory_gain_index[c] = measurement->gain_idx;
2039 factory_actual_pwr[c] = measurement->actual_pow;
2041 IWL_DEBUG_TXPOWER("chain = %d\n", c);
2042 IWL_DEBUG_TXPOWER("fctry tmp %d, "
2043 "curr tmp %d, comp %d steps\n",
2044 factory_temp, current_temp,
2045 temperature_comp[c]);
2047 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
2048 factory_gain_index[c],
2049 factory_actual_pwr[c]);
2052 /* for each of 33 bit-rates (including 1 for CCK) */
2053 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
2055 union iwl4965_tx_power_dual_stream tx_power;
2057 /* for mimo, reduce each chain's txpower by half
2058 * (3dB, 6 steps), so total output power is regulatory
2061 current_regulatory = reg_limit -
2062 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
2065 current_regulatory = reg_limit;
2069 /* find txpower limit, either hardware or regulatory */
2070 power_limit = saturation_power - back_off_table[i];
2071 if (power_limit > current_regulatory)
2072 power_limit = current_regulatory;
2074 /* reduce user's txpower request if necessary
2075 * for this rate on this channel */
2076 target_power = user_target_power;
2077 if (target_power > power_limit)
2078 target_power = power_limit;
2080 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
2081 i, saturation_power - back_off_table[i],
2082 current_regulatory, user_target_power,
2085 /* for each of 2 Tx chains (radio transmitters) */
2086 for (c = 0; c < 2; c++) {
2091 (s32)le32_to_cpu(priv->card_alive_init.
2092 tx_atten[txatten_grp][c]);
2096 /* calculate index; higher index means lower txpower */
2097 power_index = (u8) (factory_gain_index[c] -
2099 factory_actual_pwr[c]) -
2100 temperature_comp[c] -
2101 voltage_compensation +
2104 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
2107 if (power_index < get_min_power_index(i, band))
2108 power_index = get_min_power_index(i, band);
2110 /* adjust 5 GHz index to support negative indexes */
2114 /* CCK, rate 32, reduce txpower for CCK */
2115 if (i == POWER_TABLE_CCK_ENTRY)
2117 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
2119 /* stay within the table! */
2120 if (power_index > 107) {
2121 IWL_WARNING("txpower index %d > 107\n",
2125 if (power_index < 0) {
2126 IWL_WARNING("txpower index %d < 0\n",
2131 /* fill txpower command for this rate/chain */
2132 tx_power.s.radio_tx_gain[c] =
2133 gain_table[band][power_index].radio;
2134 tx_power.s.dsp_predis_atten[c] =
2135 gain_table[band][power_index].dsp;
2137 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
2138 "gain 0x%02x dsp %d\n",
2139 c, atten_value, power_index,
2140 tx_power.s.radio_tx_gain[c],
2141 tx_power.s.dsp_predis_atten[c]);
2142 }/* for each chain */
2144 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
2146 }/* for each rate */
2152 * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
2154 * Uses the active RXON for channel, band, and characteristics (fat, high)
2155 * The power limit is taken from priv->user_txpower_limit.
2157 int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
2159 struct iwl4965_txpowertable_cmd cmd = { 0 };
2163 u8 ctrl_chan_high = 0;
2165 if (test_bit(STATUS_SCANNING, &priv->status)) {
2166 /* If this gets hit a lot, switch it to a BUG() and catch
2167 * the stack trace to find out who is calling this during
2169 IWL_WARNING("TX Power requested while scanning!\n");
2173 band = priv->band == IEEE80211_BAND_2GHZ;
2175 is_fat = is_fat_channel(priv->active_rxon.flags);
2178 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2182 cmd.channel = priv->active_rxon.channel;
2184 ret = iwl4965_fill_txpower_tbl(priv, band,
2185 le16_to_cpu(priv->active_rxon.channel),
2186 is_fat, ctrl_chan_high, &cmd.tx_power);
2190 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
2196 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
2199 struct iwl4965_rxon_assoc_cmd rxon_assoc;
2200 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
2201 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
2203 if ((rxon1->flags == rxon2->flags) &&
2204 (rxon1->filter_flags == rxon2->filter_flags) &&
2205 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
2206 (rxon1->ofdm_ht_single_stream_basic_rates ==
2207 rxon2->ofdm_ht_single_stream_basic_rates) &&
2208 (rxon1->ofdm_ht_dual_stream_basic_rates ==
2209 rxon2->ofdm_ht_dual_stream_basic_rates) &&
2210 (rxon1->rx_chain == rxon2->rx_chain) &&
2211 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
2212 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
2216 rxon_assoc.flags = priv->staging_rxon.flags;
2217 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
2218 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
2219 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
2220 rxon_assoc.reserved = 0;
2221 rxon_assoc.ofdm_ht_single_stream_basic_rates =
2222 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
2223 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
2224 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
2225 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
2227 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
2228 sizeof(rxon_assoc), &rxon_assoc, NULL);
2236 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
2241 u8 ctrl_chan_high = 0;
2242 struct iwl4965_channel_switch_cmd cmd = { 0 };
2243 const struct iwl_channel_info *ch_info;
2245 band = priv->band == IEEE80211_BAND_2GHZ;
2247 ch_info = iwl_get_channel_info(priv, priv->band, channel);
2249 is_fat = is_fat_channel(priv->staging_rxon.flags);
2252 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2256 cmd.expect_beacon = 0;
2257 cmd.channel = cpu_to_le16(channel);
2258 cmd.rxon_flags = priv->active_rxon.flags;
2259 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
2260 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
2262 cmd.expect_beacon = is_channel_radar(ch_info);
2264 cmd.expect_beacon = 1;
2266 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
2267 ctrl_chan_high, &cmd.tx_power);
2269 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
2273 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
2277 #define RTS_HCCA_RETRY_LIMIT 3
2278 #define RTS_DFAULT_RETRY_LIMIT 60
2280 void iwl4965_hw_build_tx_cmd_rate(struct iwl_priv *priv,
2281 struct iwl_cmd *cmd,
2282 struct ieee80211_tx_control *ctrl,
2283 struct ieee80211_hdr *hdr, int sta_id,
2286 struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
2287 u8 rts_retry_limit = 0;
2288 u8 data_retry_limit = 0;
2289 u16 fc = le16_to_cpu(hdr->frame_control);
2292 int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
2294 rate_plcp = iwl4965_rates[rate_idx].plcp;
2296 rts_retry_limit = (is_hcca) ?
2297 RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
2299 if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
2300 rate_flags |= RATE_MCS_CCK_MSK;
2303 if (ieee80211_is_probe_response(fc)) {
2304 data_retry_limit = 3;
2305 if (data_retry_limit < rts_retry_limit)
2306 rts_retry_limit = data_retry_limit;
2308 data_retry_limit = IWL_DEFAULT_TX_RETRY;
2310 if (priv->data_retry_limit != -1)
2311 data_retry_limit = priv->data_retry_limit;
2314 if (ieee80211_is_data(fc)) {
2315 tx->initial_rate_index = 0;
2316 tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
2318 switch (fc & IEEE80211_FCTL_STYPE) {
2319 case IEEE80211_STYPE_AUTH:
2320 case IEEE80211_STYPE_DEAUTH:
2321 case IEEE80211_STYPE_ASSOC_REQ:
2322 case IEEE80211_STYPE_REASSOC_REQ:
2323 if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
2324 tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2325 tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
2332 /* Alternate between antenna A and B for successive frames */
2333 if (priv->use_ant_b_for_management_frame) {
2334 priv->use_ant_b_for_management_frame = 0;
2335 rate_flags |= RATE_MCS_ANT_B_MSK;
2337 priv->use_ant_b_for_management_frame = 1;
2338 rate_flags |= RATE_MCS_ANT_A_MSK;
2342 tx->rts_retry_limit = rts_retry_limit;
2343 tx->data_retry_limit = data_retry_limit;
2344 tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
2347 int iwl4965_hw_get_rx_read(struct iwl_priv *priv)
2349 struct iwl4965_shared *s = priv->shared_virt;
2350 return le32_to_cpu(s->rb_closed) & 0xFFF;
2353 int iwl4965_hw_get_temperature(struct iwl_priv *priv)
2355 return priv->temperature;
2358 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
2359 struct iwl4965_frame *frame, u8 rate)
2361 struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
2362 unsigned int frame_size;
2364 tx_beacon_cmd = &frame->u.beacon;
2365 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2367 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
2368 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2370 frame_size = iwl4965_fill_beacon_frame(priv,
2371 tx_beacon_cmd->frame,
2372 iwl4965_broadcast_addr,
2373 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2375 BUG_ON(frame_size > MAX_MPDU_SIZE);
2376 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2378 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
2379 tx_beacon_cmd->tx.rate_n_flags =
2380 iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
2382 tx_beacon_cmd->tx.rate_n_flags =
2383 iwl4965_hw_set_rate_n_flags(rate, 0);
2385 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2386 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
2387 return (sizeof(*tx_beacon_cmd) + frame_size);
2391 * Tell 4965 where to find circular buffer of Tx Frame Descriptors for
2392 * given Tx queue, and enable the DMA channel used for that queue.
2394 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
2395 * channels supported in hardware.
2397 int iwl4965_hw_tx_queue_init(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
2400 unsigned long flags;
2401 int txq_id = txq->q.id;
2403 spin_lock_irqsave(&priv->lock, flags);
2404 rc = iwl_grab_nic_access(priv);
2406 spin_unlock_irqrestore(&priv->lock, flags);
2410 /* Circular buffer (TFD queue in DRAM) physical base address */
2411 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
2412 txq->q.dma_addr >> 8);
2414 /* Enable DMA channel, using same id as for TFD queue */
2416 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
2417 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
2418 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
2419 iwl_release_nic_access(priv);
2420 spin_unlock_irqrestore(&priv->lock, flags);
2425 int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
2426 dma_addr_t addr, u16 len)
2429 struct iwl4965_tfd_frame *tfd = ptr;
2430 u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
2432 /* Each TFD can point to a maximum 20 Tx buffers */
2433 if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
2434 IWL_ERROR("Error can not send more than %d chunks\n",
2439 index = num_tbs / 2;
2440 is_odd = num_tbs & 0x1;
2443 tfd->pa[index].tb1_addr = cpu_to_le32(addr);
2444 IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
2445 iwl_get_dma_hi_address(addr));
2446 IWL_SET_BITS(tfd->pa[index], tb1_len, len);
2448 IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
2449 (u32) (addr & 0xffff));
2450 IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
2451 IWL_SET_BITS(tfd->pa[index], tb2_len, len);
2454 IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
2459 static void iwl4965_hw_card_show_info(struct iwl_priv *priv)
2461 u16 hw_version = priv->eeprom.board_revision_4965;
2463 IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
2464 ((hw_version >> 8) & 0x0F),
2465 ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
2467 IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
2468 priv->eeprom.board_pba_number_4965);
2471 #define IWL_TX_CRC_SIZE 4
2472 #define IWL_TX_DELIMITER_SIZE 4
2475 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
2477 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
2478 struct iwl4965_tx_queue *txq,
2482 int txq_id = txq->q.id;
2483 struct iwl4965_shared *shared_data = priv->shared_virt;
2485 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2487 /* Set up byte count within first 256 entries */
2488 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2489 tfd_offset[txq->q.write_ptr], byte_cnt, len);
2491 /* If within first 64 entries, duplicate at end */
2492 if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
2493 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2494 tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
2499 * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
2501 * Selects how many and which Rx receivers/antennas/chains to use.
2502 * This should not be used for scan command ... it puts data in wrong place.
2504 void iwl4965_set_rxon_chain(struct iwl_priv *priv)
2506 u8 is_single = is_single_stream(priv);
2507 u8 idle_state, rx_state;
2509 priv->staging_rxon.rx_chain = 0;
2510 rx_state = idle_state = 3;
2512 /* Tell uCode which antennas are actually connected.
2513 * Before first association, we assume all antennas are connected.
2514 * Just after first association, iwl_chain_noise_calibration()
2515 * checks which antennas actually *are* connected. */
2516 priv->staging_rxon.rx_chain |=
2517 cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
2519 /* How many receivers should we use? */
2520 iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
2521 priv->staging_rxon.rx_chain |=
2522 cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
2523 priv->staging_rxon.rx_chain |=
2524 cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
2526 if (!is_single && (rx_state >= 2) &&
2527 !test_bit(STATUS_POWER_PMI, &priv->status))
2528 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
2530 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
2532 IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
2536 * sign_extend - Sign extend a value using specified bit as sign-bit
2538 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
2539 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
2541 * @param oper value to sign extend
2542 * @param index 0 based bit index (0<=index<32) to sign bit
2544 static s32 sign_extend(u32 oper, int index)
2546 u8 shift = 31 - index;
2548 return (s32)(oper << shift) >> shift;
2552 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
2553 * @statistics: Provides the temperature reading from the uCode
2555 * A return of <0 indicates bogus data in the statistics
2557 int iwl4965_get_temperature(const struct iwl_priv *priv)
2564 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
2565 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
2566 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
2567 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
2568 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
2569 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
2570 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
2572 IWL_DEBUG_TEMP("Running temperature calibration\n");
2573 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
2574 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
2575 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
2576 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
2580 * Temperature is only 23 bits, so sign extend out to 32.
2582 * NOTE If we haven't received a statistics notification yet
2583 * with an updated temperature, use R4 provided to us in the
2584 * "initialize" ALIVE response.
2586 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
2587 vt = sign_extend(R4, 23);
2590 le32_to_cpu(priv->statistics.general.temperature), 23);
2592 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
2596 IWL_ERROR("Calibration conflict R1 == R3\n");
2600 /* Calculate temperature in degrees Kelvin, adjust by 97%.
2601 * Add offset to center the adjustment around 0 degrees Centigrade. */
2602 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
2603 temperature /= (R3 - R1);
2604 temperature = (temperature * 97) / 100 +
2605 TEMPERATURE_CALIB_KELVIN_OFFSET;
2607 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
2608 KELVIN_TO_CELSIUS(temperature));
2613 /* Adjust Txpower only if temperature variance is greater than threshold. */
2614 #define IWL_TEMPERATURE_THRESHOLD 3
2617 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
2619 * If the temperature changed has changed sufficiently, then a recalibration
2622 * Assumes caller will replace priv->last_temperature once calibration
2625 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
2629 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
2630 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
2634 temp_diff = priv->temperature - priv->last_temperature;
2636 /* get absolute value */
2637 if (temp_diff < 0) {
2638 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
2639 temp_diff = -temp_diff;
2640 } else if (temp_diff == 0)
2641 IWL_DEBUG_POWER("Same temp, \n");
2643 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
2645 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
2646 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
2650 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
2655 /* Calculate noise level, based on measurements during network silence just
2656 * before arriving beacon. This measurement can be done only if we know
2657 * exactly when to expect beacons, therefore only when we're associated. */
2658 static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
2660 struct statistics_rx_non_phy *rx_info
2661 = &(priv->statistics.rx.general);
2662 int num_active_rx = 0;
2663 int total_silence = 0;
2665 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
2667 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
2669 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
2671 if (bcn_silence_a) {
2672 total_silence += bcn_silence_a;
2675 if (bcn_silence_b) {
2676 total_silence += bcn_silence_b;
2679 if (bcn_silence_c) {
2680 total_silence += bcn_silence_c;
2684 /* Average among active antennas */
2686 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
2688 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
2690 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
2691 bcn_silence_a, bcn_silence_b, bcn_silence_c,
2692 priv->last_rx_noise);
2695 void iwl4965_hw_rx_statistics(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
2697 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
2701 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
2702 (int)sizeof(priv->statistics), pkt->len);
2704 change = ((priv->statistics.general.temperature !=
2705 pkt->u.stats.general.temperature) ||
2706 ((priv->statistics.flag &
2707 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
2708 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
2710 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
2712 set_bit(STATUS_STATISTICS, &priv->status);
2714 /* Reschedule the statistics timer to occur in
2715 * REG_RECALIB_PERIOD seconds to ensure we get a
2716 * thermal update even if the uCode doesn't give
2718 mod_timer(&priv->statistics_periodic, jiffies +
2719 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
2721 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2722 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
2723 iwl4965_rx_calc_noise(priv);
2724 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
2725 queue_work(priv->workqueue, &priv->sensitivity_work);
2729 iwl_leds_background(priv);
2731 /* If the hardware hasn't reported a change in
2732 * temperature then don't bother computing a
2733 * calibrated temperature value */
2737 temp = iwl4965_get_temperature(priv);
2741 if (priv->temperature != temp) {
2742 if (priv->temperature)
2743 IWL_DEBUG_TEMP("Temperature changed "
2744 "from %dC to %dC\n",
2745 KELVIN_TO_CELSIUS(priv->temperature),
2746 KELVIN_TO_CELSIUS(temp));
2748 IWL_DEBUG_TEMP("Temperature "
2749 "initialized to %dC\n",
2750 KELVIN_TO_CELSIUS(temp));
2753 priv->temperature = temp;
2754 set_bit(STATUS_TEMPERATURE, &priv->status);
2756 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
2757 iwl4965_is_temp_calib_needed(priv))
2758 queue_work(priv->workqueue, &priv->txpower_work);
2761 static void iwl4965_add_radiotap(struct iwl_priv *priv,
2762 struct sk_buff *skb,
2763 struct iwl4965_rx_phy_res *rx_start,
2764 struct ieee80211_rx_status *stats,
2767 s8 signal = stats->ssi;
2769 int rate = stats->rate_idx;
2770 u64 tsf = stats->mactime;
2772 __le16 phy_flags_hw = rx_start->phy_flags;
2773 struct iwl4965_rt_rx_hdr {
2774 struct ieee80211_radiotap_header rt_hdr;
2775 __le64 rt_tsf; /* TSF */
2776 u8 rt_flags; /* radiotap packet flags */
2777 u8 rt_rate; /* rate in 500kb/s */
2778 __le16 rt_channelMHz; /* channel in MHz */
2779 __le16 rt_chbitmask; /* channel bitfield */
2780 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
2782 u8 rt_antenna; /* antenna number */
2783 } __attribute__ ((packed)) *iwl4965_rt;
2785 /* TODO: We won't have enough headroom for HT frames. Fix it later. */
2786 if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
2787 if (net_ratelimit())
2788 printk(KERN_ERR "not enough headroom [%d] for "
2789 "radiotap head [%zd]\n",
2790 skb_headroom(skb), sizeof(*iwl4965_rt));
2794 /* put radiotap header in front of 802.11 header and data */
2795 iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
2797 /* initialise radiotap header */
2798 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
2799 iwl4965_rt->rt_hdr.it_pad = 0;
2801 /* total header + data */
2802 put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
2803 &iwl4965_rt->rt_hdr.it_len);
2805 /* Indicate all the fields we add to the radiotap header */
2806 put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
2807 (1 << IEEE80211_RADIOTAP_FLAGS) |
2808 (1 << IEEE80211_RADIOTAP_RATE) |
2809 (1 << IEEE80211_RADIOTAP_CHANNEL) |
2810 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
2811 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
2812 (1 << IEEE80211_RADIOTAP_ANTENNA)),
2813 &iwl4965_rt->rt_hdr.it_present);
2815 /* Zero the flags, we'll add to them as we go */
2816 iwl4965_rt->rt_flags = 0;
2818 put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
2820 iwl4965_rt->rt_dbmsignal = signal;
2821 iwl4965_rt->rt_dbmnoise = noise;
2823 /* Convert the channel frequency and set the flags */
2824 put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
2825 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
2826 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2827 IEEE80211_CHAN_5GHZ),
2828 &iwl4965_rt->rt_chbitmask);
2829 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
2830 put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
2831 IEEE80211_CHAN_2GHZ),
2832 &iwl4965_rt->rt_chbitmask);
2834 put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
2835 IEEE80211_CHAN_2GHZ),
2836 &iwl4965_rt->rt_chbitmask);
2839 iwl4965_rt->rt_rate = 0;
2841 iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
2846 * It seems that the antenna field in the phy flags value
2847 * is actually a bitfield. This is undefined by radiotap,
2848 * it wants an actual antenna number but I always get "7"
2849 * for most legacy frames I receive indicating that the
2850 * same frame was received on all three RX chains.
2852 * I think this field should be removed in favour of a
2853 * new 802.11n radiotap field "RX chains" that is defined
2856 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
2857 iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
2859 /* set the preamble flag if appropriate */
2860 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
2861 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2863 stats->flag |= RX_FLAG_RADIOTAP;
2866 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2868 /* 0 - mgmt, 1 - cnt, 2 - data */
2869 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2870 priv->rx_stats[idx].cnt++;
2871 priv->rx_stats[idx].bytes += len;
2875 * returns non-zero if packet should be dropped
2877 static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
2878 struct ieee80211_hdr *hdr,
2880 struct ieee80211_rx_status *stats)
2882 u16 fc = le16_to_cpu(hdr->frame_control);
2884 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2887 if (!(fc & IEEE80211_FCTL_PROTECTED))
2890 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2891 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2892 case RX_RES_STATUS_SEC_TYPE_TKIP:
2893 /* The uCode has got a bad phase 1 Key, pushes the packet.
2894 * Decryption will be done in SW. */
2895 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2896 RX_RES_STATUS_BAD_KEY_TTAK)
2899 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2900 RX_RES_STATUS_BAD_ICV_MIC) {
2901 /* bad ICV, the packet is destroyed since the
2902 * decryption is inplace, drop it */
2903 IWL_DEBUG_RX("Packet destroyed\n");
2906 case RX_RES_STATUS_SEC_TYPE_WEP:
2907 case RX_RES_STATUS_SEC_TYPE_CCMP:
2908 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2909 RX_RES_STATUS_DECRYPT_OK) {
2910 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2911 stats->flag |= RX_FLAG_DECRYPTED;
2921 static u32 iwl4965_translate_rx_status(u32 decrypt_in)
2923 u32 decrypt_out = 0;
2925 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
2926 RX_RES_STATUS_STATION_FOUND)
2927 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
2928 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
2930 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
2932 /* packet was not encrypted */
2933 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2934 RX_RES_STATUS_SEC_TYPE_NONE)
2937 /* packet was encrypted with unknown alg */
2938 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
2939 RX_RES_STATUS_SEC_TYPE_ERR)
2942 /* decryption was not done in HW */
2943 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
2944 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
2947 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
2949 case RX_RES_STATUS_SEC_TYPE_CCMP:
2950 /* alg is CCM: check MIC only */
2951 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
2953 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2955 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2959 case RX_RES_STATUS_SEC_TYPE_TKIP:
2960 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
2962 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
2965 /* fall through if TTAK OK */
2967 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
2968 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
2970 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
2974 IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
2975 decrypt_in, decrypt_out);
2980 static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
2982 struct iwl4965_rx_mem_buffer *rxb,
2983 struct ieee80211_rx_status *stats)
2985 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
2986 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
2987 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
2988 struct ieee80211_hdr *hdr;
2991 unsigned int skblen;
2993 u32 ampdu_status_legacy;
2995 if (!include_phy && priv->last_phy_res[0])
2996 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
2999 IWL_ERROR("MPDU frame without a PHY data\n");
3003 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
3004 rx_start->cfg_phy_cnt);
3006 len = le16_to_cpu(rx_start->byte_count);
3008 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
3009 sizeof(struct iwl4965_rx_phy_res) +
3010 rx_start->cfg_phy_cnt + len);
3013 struct iwl4965_rx_mpdu_res_start *amsdu =
3014 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3016 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
3017 sizeof(struct iwl4965_rx_mpdu_res_start));
3018 len = le16_to_cpu(amsdu->byte_count);
3019 rx_start->byte_count = amsdu->byte_count;
3020 rx_end = (__le32 *) (((u8 *) hdr) + len);
3022 if (len > priv->hw_params.max_pkt_size || len < 16) {
3023 IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
3027 ampdu_status = le32_to_cpu(*rx_end);
3028 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
3031 /* New status scheme, need to translate */
3032 ampdu_status_legacy = ampdu_status;
3033 ampdu_status = iwl4965_translate_rx_status(ampdu_status);
3036 /* start from MAC */
3037 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
3038 skb_put(rxb->skb, len); /* end where data ends */
3040 /* We only process data packets if the interface is open */
3041 if (unlikely(!priv->is_open)) {
3042 IWL_DEBUG_DROP_LIMIT
3043 ("Dropping packet while interface is not open.\n");
3048 hdr = (struct ieee80211_hdr *)rxb->skb->data;
3050 /* in case of HW accelerated crypto and bad decryption, drop */
3051 if (!priv->cfg->mod_params->sw_crypto &&
3052 iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
3055 if (priv->add_radiotap)
3056 iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
3058 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
3059 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3060 priv->alloc_rxb_skb--;
3064 /* Calc max signal level (dBm) among 3 possible receivers */
3065 static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp)
3067 /* data from PHY/DSP regarding signal strength, etc.,
3068 * contents are always there, not configurable by host. */
3069 struct iwl4965_rx_non_cfg_phy *ncphy =
3070 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
3071 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
3074 u32 valid_antennae =
3075 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
3076 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
3080 /* Find max rssi among 3 possible receivers.
3081 * These values are measured by the digital signal processor (DSP).
3082 * They should stay fairly constant even as the signal strength varies,
3083 * if the radio's automatic gain control (AGC) is working right.
3084 * AGC value (see below) will provide the "interesting" info. */
3085 for (i = 0; i < 3; i++)
3086 if (valid_antennae & (1 << i))
3087 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
3089 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
3090 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
3093 /* dBm = max_rssi dB - agc dB - constant.
3094 * Higher AGC (higher radio gain) means lower signal. */
3095 return (max_rssi - agc - IWL_RSSI_OFFSET);
3098 #ifdef CONFIG_IWL4965_HT
3100 void iwl4965_init_ht_hw_capab(struct iwl_priv *priv,
3101 struct ieee80211_ht_info *ht_info,
3102 enum ieee80211_band band)
3105 memset(ht_info->supp_mcs_set, 0, 16);
3107 ht_info->ht_supported = 1;
3109 if (band == IEEE80211_BAND_5GHZ) {
3110 ht_info->cap |= (u16)IEEE80211_HT_CAP_SUP_WIDTH;
3111 ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_40;
3112 ht_info->supp_mcs_set[4] = 0x01;
3114 ht_info->cap |= (u16)IEEE80211_HT_CAP_GRN_FLD;
3115 ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_20;
3116 ht_info->cap |= (u16)(IEEE80211_HT_CAP_MIMO_PS &
3117 (IWL_MIMO_PS_NONE << 2));
3119 if (priv->cfg->mod_params->amsdu_size_8K)
3120 ht_info->cap |= (u16)IEEE80211_HT_CAP_MAX_AMSDU;
3122 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3123 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3125 ht_info->supp_mcs_set[0] = 0xFF;
3126 ht_info->supp_mcs_set[1] = 0xFF;
3128 #endif /* CONFIG_IWL4965_HT */
3130 static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
3132 unsigned long flags;
3134 spin_lock_irqsave(&priv->sta_lock, flags);
3135 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
3136 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
3137 priv->stations[sta_id].sta.sta.modify_mask = 0;
3138 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3139 spin_unlock_irqrestore(&priv->sta_lock, flags);
3141 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3144 static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
3146 /* FIXME: need locking over ps_status ??? */
3147 u8 sta_id = iwl_find_station(priv, addr);
3149 if (sta_id != IWL_INVALID_STATION) {
3150 u8 sta_awake = priv->stations[sta_id].
3151 ps_status == STA_PS_STATUS_WAKE;
3153 if (sta_awake && ps_bit)
3154 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
3155 else if (!sta_awake && !ps_bit) {
3156 iwl4965_sta_modify_ps_wake(priv, sta_id);
3157 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
3161 #ifdef CONFIG_IWLWIFI_DEBUG
3164 * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
3166 * You may hack this function to show different aspects of received frames,
3167 * including selective frame dumps.
3168 * group100 parameter selects whether to show 1 out of 100 good frames.
3170 * TODO: This was originally written for 3945, need to audit for
3171 * proper operation with 4965.
3173 static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
3174 struct iwl4965_rx_packet *pkt,
3175 struct ieee80211_hdr *header, int group100)
3178 u32 print_summary = 0;
3179 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
3196 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
3197 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
3198 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
3199 u8 *data = IWL_RX_DATA(pkt);
3201 if (likely(!(iwl_debug_level & IWL_DL_RX)))
3205 fc = le16_to_cpu(header->frame_control);
3206 seq_ctl = le16_to_cpu(header->seq_ctrl);
3209 channel = le16_to_cpu(rx_hdr->channel);
3210 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
3211 rate_sym = rx_hdr->rate;
3212 length = le16_to_cpu(rx_hdr->len);
3214 /* end-of-frame status and timestamp */
3215 status = le32_to_cpu(rx_end->status);
3216 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
3217 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
3218 tsf = le64_to_cpu(rx_end->timestamp);
3220 /* signal statistics */
3221 rssi = rx_stats->rssi;
3222 agc = rx_stats->agc;
3223 sig_avg = le16_to_cpu(rx_stats->sig_avg);
3224 noise_diff = le16_to_cpu(rx_stats->noise_diff);
3226 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
3228 /* if data frame is to us and all is good,
3229 * (optionally) print summary for only 1 out of every 100 */
3230 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
3231 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
3234 print_summary = 1; /* print each frame */
3235 else if (priv->framecnt_to_us < 100) {
3236 priv->framecnt_to_us++;
3239 priv->framecnt_to_us = 0;
3244 /* print summary for all other frames */
3248 if (print_summary) {
3254 title = "100Frames";
3255 else if (fc & IEEE80211_FCTL_RETRY)
3257 else if (ieee80211_is_assoc_response(fc))
3259 else if (ieee80211_is_reassoc_response(fc))
3261 else if (ieee80211_is_probe_response(fc)) {
3263 print_dump = 1; /* dump frame contents */
3264 } else if (ieee80211_is_beacon(fc)) {
3266 print_dump = 1; /* dump frame contents */
3267 } else if (ieee80211_is_atim(fc))
3269 else if (ieee80211_is_auth(fc))
3271 else if (ieee80211_is_deauth(fc))
3273 else if (ieee80211_is_disassoc(fc))
3278 rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
3279 if (unlikely(rate_idx == -1))
3282 bitrate = iwl4965_rates[rate_idx].ieee / 2;
3284 /* print frame summary.
3285 * MAC addresses show just the last byte (for brevity),
3286 * but you can hack it to show more, if you'd like to. */
3288 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
3289 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
3290 title, fc, header->addr1[5],
3291 length, rssi, channel, bitrate);
3293 /* src/dst addresses assume managed mode */
3294 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
3295 "src=0x%02x, rssi=%u, tim=%lu usec, "
3296 "phy=0x%02x, chnl=%d\n",
3297 title, fc, header->addr1[5],
3298 header->addr3[5], rssi,
3299 tsf_low - priv->scan_start_tsf,
3300 phy_flags, channel);
3304 iwl_print_hex_dump(IWL_DL_RX, data, length);
3307 static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
3308 struct iwl4965_rx_packet *pkt,
3309 struct ieee80211_hdr *header,
3317 /* Called for REPLY_RX (legacy ABG frames), or
3318 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
3319 static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
3320 struct iwl4965_rx_mem_buffer *rxb)
3322 struct ieee80211_hdr *header;
3323 struct ieee80211_rx_status rx_status;
3324 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3325 /* Use phy data (Rx signal strength, etc.) contained within
3326 * this rx packet for legacy frames,
3327 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
3328 int include_phy = (pkt->hdr.cmd == REPLY_RX);
3329 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3330 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
3331 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3333 unsigned int len = 0;
3337 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
3339 ieee80211_frequency_to_channel(le16_to_cpu(rx_start->channel));
3340 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
3341 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
3342 rx_status.rate_idx =
3343 iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
3344 if (rx_status.band == IEEE80211_BAND_5GHZ)
3345 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
3347 rx_status.antenna = 0;
3350 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
3351 IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
3352 rx_start->cfg_phy_cnt);
3357 if (priv->last_phy_res[0])
3358 rx_start = (struct iwl4965_rx_phy_res *)
3359 &priv->last_phy_res[1];
3365 IWL_ERROR("MPDU frame without a PHY data\n");
3370 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
3371 + rx_start->cfg_phy_cnt);
3373 len = le16_to_cpu(rx_start->byte_count);
3374 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
3375 sizeof(struct iwl4965_rx_phy_res) + len);
3377 struct iwl4965_rx_mpdu_res_start *amsdu =
3378 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3380 header = (void *)(pkt->u.raw +
3381 sizeof(struct iwl4965_rx_mpdu_res_start));
3382 len = le16_to_cpu(amsdu->byte_count);
3383 rx_end = (__le32 *) (pkt->u.raw +
3384 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
3387 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
3388 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
3389 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
3390 le32_to_cpu(*rx_end));
3394 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
3396 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
3397 rx_status.ssi = iwl4965_calc_rssi(rx_start);
3399 /* Meaningful noise values are available only from beacon statistics,
3400 * which are gathered only when associated, and indicate noise
3401 * only for the associated network channel ...
3402 * Ignore these noise values while scanning (other channels) */
3403 if (iwl_is_associated(priv) &&
3404 !test_bit(STATUS_SCANNING, &priv->status)) {
3405 rx_status.noise = priv->last_rx_noise;
3406 rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi,
3409 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3410 rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi, 0);
3413 /* Reset beacon noise level if not associated. */
3414 if (!iwl_is_associated(priv))
3415 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3417 /* Set "1" to report good data frames in groups of 100 */
3418 /* FIXME: need to optimze the call: */
3419 iwl4965_dbg_report_frame(priv, pkt, header, 1);
3421 IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
3422 rx_status.ssi, rx_status.noise, rx_status.signal,
3423 (unsigned long long)rx_status.mactime);
3425 network_packet = iwl4965_is_network_packet(priv, header);
3426 if (network_packet) {
3427 priv->last_rx_rssi = rx_status.ssi;
3428 priv->last_beacon_time = priv->ucode_beacon_time;
3429 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
3432 fc = le16_to_cpu(header->frame_control);
3433 switch (fc & IEEE80211_FCTL_FTYPE) {
3434 case IEEE80211_FTYPE_MGMT:
3435 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3436 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3438 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
3441 case IEEE80211_FTYPE_CTL:
3442 #ifdef CONFIG_IWL4965_HT
3443 switch (fc & IEEE80211_FCTL_STYPE) {
3444 case IEEE80211_STYPE_BACK_REQ:
3445 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
3446 iwl4965_handle_data_packet(priv, 0, include_phy,
3455 case IEEE80211_FTYPE_DATA: {
3456 DECLARE_MAC_BUF(mac1);
3457 DECLARE_MAC_BUF(mac2);
3458 DECLARE_MAC_BUF(mac3);
3460 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3461 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3464 if (unlikely(!network_packet))
3465 IWL_DEBUG_DROP("Dropping (non network): "
3467 print_mac(mac1, header->addr1),
3468 print_mac(mac2, header->addr2),
3469 print_mac(mac3, header->addr3));
3470 else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
3471 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
3472 print_mac(mac1, header->addr1),
3473 print_mac(mac2, header->addr2),
3474 print_mac(mac3, header->addr3));
3476 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
3486 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
3487 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
3488 static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
3489 struct iwl4965_rx_mem_buffer *rxb)
3491 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3492 priv->last_phy_res[0] = 1;
3493 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
3494 sizeof(struct iwl4965_rx_phy_res));
3496 static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
3497 struct iwl4965_rx_mem_buffer *rxb)
3500 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
3501 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3502 struct iwl4965_missed_beacon_notif *missed_beacon;
3504 missed_beacon = &pkt->u.missed_beacon;
3505 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
3506 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
3507 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
3508 le32_to_cpu(missed_beacon->total_missed_becons),
3509 le32_to_cpu(missed_beacon->num_recvd_beacons),
3510 le32_to_cpu(missed_beacon->num_expected_beacons));
3511 if (!test_bit(STATUS_SCANNING, &priv->status))
3512 iwl_init_sensitivity(priv);
3514 #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
3516 #ifdef CONFIG_IWL4965_HT
3519 * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
3521 static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv,
3522 int sta_id, int tid)
3524 unsigned long flags;
3526 /* Remove "disable" flag, to enable Tx for this TID */
3527 spin_lock_irqsave(&priv->sta_lock, flags);
3528 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
3529 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
3530 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3531 spin_unlock_irqrestore(&priv->sta_lock, flags);
3533 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3537 * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
3539 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
3540 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
3542 static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
3543 struct iwl4965_ht_agg *agg,
3544 struct iwl4965_compressed_ba_resp*
3549 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
3550 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3553 struct ieee80211_tx_status *tx_status;
3555 if (unlikely(!agg->wait_for_ba)) {
3556 IWL_ERROR("Received BA when not expected\n");
3560 /* Mark that the expected block-ack response arrived */
3561 agg->wait_for_ba = 0;
3562 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
3564 /* Calculate shift to align block-ack bits with our Tx window bits */
3565 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
3566 if (sh < 0) /* tbw something is wrong with indices */
3569 /* don't use 64-bit values for now */
3570 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
3572 if (agg->frame_count > (64 - sh)) {
3573 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
3577 /* check for success or failure according to the
3578 * transmitted bitmap and block-ack bitmap */
3579 bitmap &= agg->bitmap;
3581 /* For each frame attempted in aggregation,
3582 * update driver's record of tx frame's status. */
3583 for (i = 0; i < agg->frame_count ; i++) {
3584 ack = bitmap & (1 << i);
3586 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
3587 ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
3588 agg->start_idx + i);
3591 tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
3592 tx_status->flags = IEEE80211_TX_STATUS_ACK;
3593 tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
3594 tx_status->ampdu_ack_map = successes;
3595 tx_status->ampdu_ack_len = agg->frame_count;
3596 iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags,
3597 &tx_status->control);
3599 IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
3605 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
3607 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
3610 /* Simply stop the queue, but don't change any configuration;
3611 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
3612 iwl_write_prph(priv,
3613 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
3614 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
3615 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
3619 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
3620 * priv->lock must be held by the caller
3622 static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
3623 u16 ssn_idx, u8 tx_fifo)
3627 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
3628 IWL_WARNING("queue number too small: %d, must be > %d\n",
3629 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3633 ret = iwl_grab_nic_access(priv);
3637 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3639 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3641 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3642 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3643 /* supposes that ssn_idx is valid (!= 0xFFF) */
3644 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3646 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3647 iwl4965_txq_ctx_deactivate(priv, txq_id);
3648 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
3650 iwl_release_nic_access(priv);
3655 int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
3658 struct iwl4965_queue *q = &priv->txq[txq_id].q;
3659 u8 *addr = priv->stations[sta_id].sta.sta.addr;
3660 struct iwl4965_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
3662 switch (priv->stations[sta_id].tid[tid].agg.state) {
3663 case IWL_EMPTYING_HW_QUEUE_DELBA:
3664 /* We are reclaiming the last packet of the */
3665 /* aggregated HW queue */
3666 if (txq_id == tid_data->agg.txq_id &&
3667 q->read_ptr == q->write_ptr) {
3668 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
3669 int tx_fifo = default_tid_to_tx_fifo[tid];
3670 IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
3671 iwl4965_tx_queue_agg_disable(priv, txq_id,
3673 tid_data->agg.state = IWL_AGG_OFF;
3674 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3677 case IWL_EMPTYING_HW_QUEUE_ADDBA:
3678 /* We are reclaiming the last packet of the queue */
3679 if (tid_data->tfds_in_queue == 0) {
3680 IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
3681 tid_data->agg.state = IWL_AGG_ON;
3682 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
3690 * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
3691 * @index -- current index
3692 * @n_bd -- total number of entries in queue (s/b power of 2)
3694 static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
3696 return (index == 0) ? n_bd - 1 : index - 1;
3700 * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
3702 * Handles block-acknowledge notification from device, which reports success
3703 * of frames sent via aggregation.
3705 static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
3706 struct iwl4965_rx_mem_buffer *rxb)
3708 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3709 struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
3711 struct iwl4965_tx_queue *txq = NULL;
3712 struct iwl4965_ht_agg *agg;
3713 DECLARE_MAC_BUF(mac);
3715 /* "flow" corresponds to Tx queue */
3716 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
3718 /* "ssn" is start of block-ack Tx window, corresponds to index
3719 * (in Tx queue's circular buffer) of first TFD/frame in window */
3720 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
3722 if (scd_flow >= priv->hw_params.max_txq_num) {
3723 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
3727 txq = &priv->txq[scd_flow];
3728 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
3730 /* Find index just before block-ack window */
3731 index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
3733 /* TODO: Need to get this copy more safely - now good for debug */
3735 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
3738 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
3740 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
3741 "%d, scd_ssn = %d\n",
3744 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
3747 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
3749 (unsigned long long)agg->bitmap);
3751 /* Update driver's record of ACK vs. not for each frame in window */
3752 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
3754 /* Release all TFDs before the SSN, i.e. all TFDs in front of
3755 * block-ack window (we assume that they've been successfully
3756 * transmitted ... if not, it's too late anyway). */
3757 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
3758 int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
3759 priv->stations[ba_resp->sta_id].
3760 tid[ba_resp->tid].tfds_in_queue -= freed;
3761 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3762 priv->mac80211_registered &&
3763 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3764 ieee80211_wake_queue(priv->hw, scd_flow);
3765 iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
3766 ba_resp->tid, scd_flow);
3771 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
3773 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
3780 scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
3782 tbl_dw_addr = priv->scd_base_addr +
3783 SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
3785 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
3788 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
3790 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
3792 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
3799 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
3801 * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
3802 * i.e. it must be one of the higher queues used for aggregation
3804 static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
3805 int tx_fifo, int sta_id, int tid,
3808 unsigned long flags;
3812 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
3813 IWL_WARNING("queue number too small: %d, must be > %d\n",
3814 txq_id, IWL_BACK_QUEUE_FIRST_ID);
3816 ra_tid = BUILD_RAxTID(sta_id, tid);
3818 /* Modify device's station table to Tx this TID */
3819 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
3821 spin_lock_irqsave(&priv->lock, flags);
3822 rc = iwl_grab_nic_access(priv);
3824 spin_unlock_irqrestore(&priv->lock, flags);
3828 /* Stop this Tx queue before configuring it */
3829 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
3831 /* Map receiver-address / traffic-ID to this queue */
3832 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
3834 /* Set this queue as a chain-building queue */
3835 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
3837 /* Place first TFD at index corresponding to start sequence number.
3838 * Assumes that ssn_idx is valid (!= 0xFFF) */
3839 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
3840 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
3841 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
3843 /* Set up Tx window size and frame limit for this queue */
3844 iwl_write_targ_mem(priv,
3845 priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
3846 (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
3847 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
3849 iwl_write_targ_mem(priv, priv->scd_base_addr +
3850 SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
3851 (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
3852 & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
3854 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
3856 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
3857 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
3859 iwl_release_nic_access(priv);
3860 spin_unlock_irqrestore(&priv->lock, flags);
3865 #endif /* CONFIG_IWL4965_HT */
3868 * iwl4965_add_station - Initialize a station's hardware rate table
3870 * The uCode's station table contains a table of fallback rates
3871 * for automatic fallback during transmission.
3873 * NOTE: This sets up a default set of values. These will be replaced later
3874 * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
3877 * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
3878 * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
3879 * which requires station table entry to exist).
3881 void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
3884 struct iwl_link_quality_cmd link_cmd = {
3889 /* Set up the rate scaling to start at selected rate, fall back
3890 * all the way down to 1M in IEEE order, and then spin on 1M */
3892 r = IWL_RATE_54M_INDEX;
3893 else if (priv->band == IEEE80211_BAND_5GHZ)
3894 r = IWL_RATE_6M_INDEX;
3896 r = IWL_RATE_1M_INDEX;
3898 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
3900 if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
3901 rate_flags |= RATE_MCS_CCK_MSK;
3903 /* Use Tx antenna B only */
3904 rate_flags |= RATE_MCS_ANT_B_MSK;
3905 rate_flags &= ~RATE_MCS_ANT_A_MSK;
3907 link_cmd.rs_table[i].rate_n_flags =
3908 iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
3909 r = iwl4965_get_prev_ieee_rate(r);
3912 link_cmd.general_params.single_stream_ant_msk = 2;
3913 link_cmd.general_params.dual_stream_ant_msk = 3;
3914 link_cmd.agg_params.agg_dis_start_th = 3;
3915 link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
3917 /* Update the rate scaling for control frame Tx to AP */
3918 link_cmd.sta_id = is_ap ? IWL_AP_ID : priv->hw_params.bcast_sta_id;
3920 iwl_send_cmd_pdu_async(priv, REPLY_TX_LINK_QUALITY_CMD,
3921 sizeof(link_cmd), &link_cmd, NULL);
3924 #ifdef CONFIG_IWL4965_HT
3926 static u8 iwl4965_is_channel_extension(struct iwl_priv *priv,
3927 enum ieee80211_band band,
3928 u16 channel, u8 extension_chan_offset)
3930 const struct iwl_channel_info *ch_info;
3932 ch_info = iwl_get_channel_info(priv, band, channel);
3933 if (!is_channel_valid(ch_info))
3936 if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE)
3939 if ((ch_info->fat_extension_channel == extension_chan_offset) ||
3940 (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX))
3946 static u8 iwl4965_is_fat_tx_allowed(struct iwl_priv *priv,
3947 struct ieee80211_ht_info *sta_ht_inf)
3949 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
3951 if ((!iwl_ht_conf->is_ht) ||
3952 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
3953 (iwl_ht_conf->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE))
3957 if ((!sta_ht_inf->ht_supported) ||
3958 (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH)))
3962 return (iwl4965_is_channel_extension(priv, priv->band,
3963 iwl_ht_conf->control_channel,
3964 iwl_ht_conf->extension_chan_offset));
3967 void iwl4965_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
3969 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
3972 if (!ht_info->is_ht)
3975 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
3976 if (iwl4965_is_fat_tx_allowed(priv, NULL))
3977 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
3979 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
3980 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
3982 if (le16_to_cpu(rxon->channel) != ht_info->control_channel) {
3983 IWL_DEBUG_ASSOC("control diff than current %d %d\n",
3984 le16_to_cpu(rxon->channel),
3985 ht_info->control_channel);
3986 rxon->channel = cpu_to_le16(ht_info->control_channel);
3990 /* Note: control channel is opposite of extension channel */
3991 switch (ht_info->extension_chan_offset) {
3992 case IWL_EXT_CHANNEL_OFFSET_ABOVE:
3993 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3995 case IWL_EXT_CHANNEL_OFFSET_BELOW:
3996 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3998 case IWL_EXT_CHANNEL_OFFSET_NONE:
4000 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4004 val = ht_info->ht_protection;
4006 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
4008 iwl4965_set_rxon_chain(priv);
4010 IWL_DEBUG_ASSOC("supported HT rate 0x%X %X "
4011 "rxon flags 0x%X operation mode :0x%X "
4012 "extension channel offset 0x%x "
4013 "control chan %d\n",
4014 ht_info->supp_mcs_set[0], ht_info->supp_mcs_set[1],
4015 le32_to_cpu(rxon->flags), ht_info->ht_protection,
4016 ht_info->extension_chan_offset,
4017 ht_info->control_channel);
4021 void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index,
4022 struct ieee80211_ht_info *sta_ht_inf)
4027 if (!sta_ht_inf || !sta_ht_inf->ht_supported)
4030 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
4032 sta_flags = priv->stations[index].sta.station_flags;
4034 sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
4036 switch (mimo_ps_mode) {
4037 case WLAN_HT_CAP_MIMO_PS_STATIC:
4038 sta_flags |= STA_FLG_MIMO_DIS_MSK;
4040 case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
4041 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
4043 case WLAN_HT_CAP_MIMO_PS_DISABLED:
4046 IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
4050 sta_flags |= cpu_to_le32(
4051 (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
4053 sta_flags |= cpu_to_le32(
4054 (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
4056 if (iwl4965_is_fat_tx_allowed(priv, sta_ht_inf))
4057 sta_flags |= STA_FLG_FAT_EN_MSK;
4059 sta_flags &= ~STA_FLG_FAT_EN_MSK;
4061 priv->stations[index].sta.station_flags = sta_flags;
4066 static void iwl4965_sta_modify_add_ba_tid(struct iwl_priv *priv,
4067 int sta_id, int tid, u16 ssn)
4069 unsigned long flags;
4071 spin_lock_irqsave(&priv->sta_lock, flags);
4072 priv->stations[sta_id].sta.station_flags_msk = 0;
4073 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
4074 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
4075 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
4076 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4077 spin_unlock_irqrestore(&priv->sta_lock, flags);
4079 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4082 static void iwl4965_sta_modify_del_ba_tid(struct iwl_priv *priv,
4083 int sta_id, int tid)
4085 unsigned long flags;
4087 spin_lock_irqsave(&priv->sta_lock, flags);
4088 priv->stations[sta_id].sta.station_flags_msk = 0;
4089 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
4090 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
4091 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4092 spin_unlock_irqrestore(&priv->sta_lock, flags);
4094 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4098 * Find first available (lowest unused) Tx Queue, mark it "active".
4099 * Called only when finding queue for aggregation.
4100 * Should never return anything < 7, because they should already
4101 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
4103 static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv)
4107 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
4108 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
4113 static int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, const u8 *da,
4114 u16 tid, u16 *start_seq_num)
4116 struct iwl_priv *priv = hw->priv;
4122 unsigned long flags;
4123 struct iwl4965_tid_data *tid_data;
4124 DECLARE_MAC_BUF(mac);
4126 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4127 tx_fifo = default_tid_to_tx_fifo[tid];
4131 IWL_WARNING("%s on da = %s tid = %d\n",
4132 __func__, print_mac(mac, da), tid);
4134 sta_id = iwl_find_station(priv, da);
4135 if (sta_id == IWL_INVALID_STATION)
4138 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
4139 IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
4143 txq_id = iwl4965_txq_ctx_activate_free(priv);
4147 spin_lock_irqsave(&priv->sta_lock, flags);
4148 tid_data = &priv->stations[sta_id].tid[tid];
4149 ssn = SEQ_TO_SN(tid_data->seq_number);
4150 tid_data->agg.txq_id = txq_id;
4151 spin_unlock_irqrestore(&priv->sta_lock, flags);
4153 *start_seq_num = ssn;
4154 ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
4160 if (tid_data->tfds_in_queue == 0) {
4161 printk(KERN_ERR "HW queue is empty\n");
4162 tid_data->agg.state = IWL_AGG_ON;
4163 ieee80211_start_tx_ba_cb_irqsafe(hw, da, tid);
4165 IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
4166 tid_data->tfds_in_queue);
4167 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
4172 static int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, const u8 *da,
4176 struct iwl_priv *priv = hw->priv;
4177 int tx_fifo_id, txq_id, sta_id, ssn = -1;
4178 struct iwl4965_tid_data *tid_data;
4179 int ret, write_ptr, read_ptr;
4180 unsigned long flags;
4181 DECLARE_MAC_BUF(mac);
4184 IWL_ERROR("da = NULL\n");
4188 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4189 tx_fifo_id = default_tid_to_tx_fifo[tid];
4193 sta_id = iwl_find_station(priv, da);
4195 if (sta_id == IWL_INVALID_STATION)
4198 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
4199 IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
4201 tid_data = &priv->stations[sta_id].tid[tid];
4202 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
4203 txq_id = tid_data->agg.txq_id;
4204 write_ptr = priv->txq[txq_id].q.write_ptr;
4205 read_ptr = priv->txq[txq_id].q.read_ptr;
4207 /* The queue is not empty */
4208 if (write_ptr != read_ptr) {
4209 IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
4210 priv->stations[sta_id].tid[tid].agg.state =
4211 IWL_EMPTYING_HW_QUEUE_DELBA;
4215 IWL_DEBUG_HT("HW queue empty\n");;
4216 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
4218 spin_lock_irqsave(&priv->lock, flags);
4219 ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
4220 spin_unlock_irqrestore(&priv->lock, flags);
4225 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, da, tid);
4227 IWL_DEBUG_INFO("iwl4965_mac_ht_tx_agg_stop on da=%s tid=%d\n",
4228 print_mac(mac, da), tid);
4233 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
4234 enum ieee80211_ampdu_mlme_action action,
4235 const u8 *addr, u16 tid, u16 *ssn)
4237 struct iwl_priv *priv = hw->priv;
4239 DECLARE_MAC_BUF(mac);
4241 IWL_DEBUG_HT("A-MPDU action on da=%s tid=%d ",
4242 print_mac(mac, addr), tid);
4243 sta_id = iwl_find_station(priv, addr);
4245 case IEEE80211_AMPDU_RX_START:
4246 IWL_DEBUG_HT("start Rx\n");
4247 iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, *ssn);
4249 case IEEE80211_AMPDU_RX_STOP:
4250 IWL_DEBUG_HT("stop Rx\n");
4251 iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
4253 case IEEE80211_AMPDU_TX_START:
4254 IWL_DEBUG_HT("start Tx\n");
4255 return iwl4965_mac_ht_tx_agg_start(hw, addr, tid, ssn);
4256 case IEEE80211_AMPDU_TX_STOP:
4257 IWL_DEBUG_HT("stop Tx\n");
4258 return iwl4965_mac_ht_tx_agg_stop(hw, addr, tid);
4260 IWL_DEBUG_HT("unknown\n");
4267 #endif /* CONFIG_IWL4965_HT */
4269 /* Set up 4965-specific Rx frame reply handlers */
4270 void iwl4965_hw_rx_handler_setup(struct iwl_priv *priv)
4272 /* Legacy Rx frames */
4273 priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
4275 /* High-throughput (HT) Rx frames */
4276 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
4277 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
4279 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
4280 iwl4965_rx_missed_beacon_notif;
4282 #ifdef CONFIG_IWL4965_HT
4283 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
4284 #endif /* CONFIG_IWL4965_HT */
4287 void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
4289 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
4290 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
4291 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
4293 init_timer(&priv->statistics_periodic);
4294 priv->statistics_periodic.data = (unsigned long)priv;
4295 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
4298 void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
4300 del_timer_sync(&priv->statistics_periodic);
4302 cancel_delayed_work(&priv->init_alive_start);
4306 static struct iwl_hcmd_ops iwl4965_hcmd = {
4307 .rxon_assoc = iwl4965_send_rxon_assoc,
4310 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
4311 .enqueue_hcmd = iwl4965_enqueue_hcmd,
4312 #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
4313 .chain_noise_reset = iwl4965_chain_noise_reset,
4314 .gain_computation = iwl4965_gain_computation,
4318 static struct iwl_lib_ops iwl4965_lib = {
4319 .init_drv = iwl4965_init_drv,
4320 .set_hw_params = iwl4965_hw_set_hw_params,
4321 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
4322 .hw_nic_init = iwl4965_hw_nic_init,
4323 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
4324 .alive_notify = iwl4965_alive_notify,
4325 .load_ucode = iwl4965_load_bsm,
4327 .set_pwr_src = iwl4965_set_pwr_src,
4330 .verify_signature = iwlcore_eeprom_verify_signature,
4331 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
4332 .release_semaphore = iwlcore_eeprom_release_semaphore,
4334 .radio_kill_sw = iwl4965_radio_kill_sw,
4337 static struct iwl_ops iwl4965_ops = {
4338 .lib = &iwl4965_lib,
4339 .hcmd = &iwl4965_hcmd,
4340 .utils = &iwl4965_hcmd_utils,
4343 struct iwl_cfg iwl4965_agn_cfg = {
4345 .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
4346 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
4347 .ops = &iwl4965_ops,
4348 .mod_params = &iwl4965_mod_params,
4351 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
4352 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4353 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
4354 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
4355 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
4356 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
4357 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
4358 MODULE_PARM_DESC(debug, "debug output mask");
4360 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
4361 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4363 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
4364 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4367 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
4368 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
4369 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
4370 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");