drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-calib.h"
  46 #include "iwl-sta.h"
  47
  48 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  49 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
  50
  51 /* Change firmware file name, using "-" and incrementing number,
  52  *   *only* when uCode interface or architecture changes so that it
  53  *   is not compatible with earlier drivers.
  54  * This number will also appear in << 8 position of 1st dword of uCode file */
  55 #define IWL4965_UCODE_API "-2"
  56
  57
  58 /* module parameters */
  59 static struct iwl_mod_params iwl4965_mod_params = {
  60         .num_of_queues = IWL49_NUM_QUEUES,
  61         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
  62         .enable_qos = 1,
  63         .amsdu_size_8K = 1,
  64         .restart_fw = 1,
  65         /* the rest are 0 by default */
  66 };
  67
  68 /* check contents of special bootstrap uCode SRAM */
  69 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  70 {
  71         __le32 *image = priv->ucode_boot.v_addr;
  72         u32 len = priv->ucode_boot.len;
  73         u32 reg;
  74         u32 val;
  75
  76         IWL_DEBUG_INFO("Begin verify bsm\n");
  77
  78         /* verify BSM SRAM contents */
  79         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  80         for (reg = BSM_SRAM_LOWER_BOUND;
  81              reg < BSM_SRAM_LOWER_BOUND + len;
  82              reg += sizeof(u32), image++) {
  83                 val = iwl_read_prph(priv, reg);
  84                 if (val != le32_to_cpu(*image)) {
  85                         IWL_ERROR("BSM uCode verification failed at "
  86                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  87                                   BSM_SRAM_LOWER_BOUND,
  88                                   reg - BSM_SRAM_LOWER_BOUND, len,
  89                                   val, le32_to_cpu(*image));
  90                         return -EIO;
  91                 }
  92         }
  93
  94         IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  95
  96         return 0;
  97 }
  98
  99 /**
 100  * iwl4965_load_bsm - Load bootstrap instructions
 101  *
 102  * BSM operation:
 103  *
 104  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 105  * in special SRAM that does not power down during RFKILL.  When powering back
 106  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 107  * the bootstrap program into the on-board processor, and starts it.
 108  *
 109  * The bootstrap program loads (via DMA) instructions and data for a new
 110  * program from host DRAM locations indicated by the host driver in the
 111  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 112  * automatically.
 113  *
 114  * When initializing the NIC, the host driver points the BSM to the
 115  * "initialize" uCode image.  This uCode sets up some internal data, then
 116  * notifies host via "initialize alive" that it is complete.
 117  *
 118  * The host then replaces the BSM_DRAM_* pointer values to point to the
 119  * normal runtime uCode instructions and a backup uCode data cache buffer
 120  * (filled initially with starting data values for the on-board processor),
 121  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 122  * which begins normal operation.
 123  *
 124  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 125  * the backup data cache in DRAM before SRAM is powered down.
 126  *
 127  * When powering back up, the BSM loads the bootstrap program.  This reloads
 128  * the runtime uCode instructions and the backup data cache into SRAM,
 129  * and re-launches the runtime uCode from where it left off.
 130  */
 131 static int iwl4965_load_bsm(struct iwl_priv *priv)
 132 {
 133         __le32 *image = priv->ucode_boot.v_addr;
 134         u32 len = priv->ucode_boot.len;
 135         dma_addr_t pinst;
 136         dma_addr_t pdata;
 137         u32 inst_len;
 138         u32 data_len;
 139         int i;
 140         u32 done;
 141         u32 reg_offset;
 142         int ret;
 143
 144         IWL_DEBUG_INFO("Begin load bsm\n");
 145
 146         priv->ucode_type = UCODE_RT;
 147
 148         /* make sure bootstrap program is no larger than BSM's SRAM size */
 149         if (len > IWL_MAX_BSM_SIZE)
 150                 return -EINVAL;
 151
 152         /* Tell bootstrap uCode where to find the "Initialize" uCode
 153          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 154          * NOTE:  iwl_init_alive_start() will replace these values,
 155          *        after the "initialize" uCode has run, to point to
 156          *        runtime/protocol instructions and backup data cache.
 157          */
 158         pinst = priv->ucode_init.p_addr >> 4;
 159         pdata = priv->ucode_init_data.p_addr >> 4;
 160         inst_len = priv->ucode_init.len;
 161         data_len = priv->ucode_init_data.len;
 162
 163         ret = iwl_grab_nic_access(priv);
 164         if (ret)
 165                 return ret;
 166
 167         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 168         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 169         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 170         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 171
 172         /* Fill BSM memory with bootstrap instructions */
 173         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 174              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 175              reg_offset += sizeof(u32), image++)
 176                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 177
 178         ret = iwl4965_verify_bsm(priv);
 179         if (ret) {
 180                 iwl_release_nic_access(priv);
 181                 return ret;
 182         }
 183
 184         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 185         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 186         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
 187         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 188
 189         /* Load bootstrap code into instruction SRAM now,
 190          *   to prepare to load "initialize" uCode */
 191         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 192
 193         /* Wait for load of bootstrap uCode to finish */
 194         for (i = 0; i < 100; i++) {
 195                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 196                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 197                         break;
 198                 udelay(10);
 199         }
 200         if (i < 100)
 201                 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
 202         else {
 203                 IWL_ERROR("BSM write did not complete!\n");
 204                 return -EIO;
 205         }
 206
 207         /* Enable future boot loads whenever power management unit triggers it
 208          *   (e.g. when powering back up after power-save shutdown) */
 209         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 210
 211         iwl_release_nic_access(priv);
 212
 213         return 0;
 214 }
 215
 216 /**
 217  * iwl4965_set_ucode_ptrs - Set uCode address location
 218  *
 219  * Tell initialization uCode where to find runtime uCode.
 220  *
 221  * BSM registers initially contain pointers to initialization uCode.
 222  * We need to replace them to load runtime uCode inst and data,
 223  * and to save runtime data when powering down.
 224  */
 225 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 226 {
 227         dma_addr_t pinst;
 228         dma_addr_t pdata;
 229         unsigned long flags;
 230         int ret = 0;
 231
 232         /* bits 35:4 for 4965 */
 233         pinst = priv->ucode_code.p_addr >> 4;
 234         pdata = priv->ucode_data_backup.p_addr >> 4;
 235
 236         spin_lock_irqsave(&priv->lock, flags);
 237         ret = iwl_grab_nic_access(priv);
 238         if (ret) {
 239                 spin_unlock_irqrestore(&priv->lock, flags);
 240                 return ret;
 241         }
 242
 243         /* Tell bootstrap uCode where to find image to load */
 244         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 245         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 246         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 247                                  priv->ucode_data.len);
 248
 249         /* Inst byte count must be last to set up, bit 31 signals uCode
 250          *   that all new ptr/size info is in place */
 251         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 252                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 253         iwl_release_nic_access(priv);
 254
 255         spin_unlock_irqrestore(&priv->lock, flags);
 256
 257         IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
 258
 259         return ret;
 260 }
 261
 262 /**
 263  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 264  *
 265  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 266  *
 267  * The 4965 "initialize" ALIVE reply contains calibration data for:
 268  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 269  *   (3945 does not contain this data).
 270  *
 271  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 272 */
 273 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 274 {
 275         /* Check alive response for "valid" sign from uCode */
 276         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 277                 /* We had an error bringing up the hardware, so take it
 278                  * all the way back down so we can try again */
 279                 IWL_DEBUG_INFO("Initialize Alive failed.\n");
 280                 goto restart;
 281         }
 282
 283         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 284          * This is a paranoid check, because we would not have gotten the
 285          * "initialize" alive if code weren't properly loaded.  */
 286         if (iwl_verify_ucode(priv)) {
 287                 /* Runtime instruction load was bad;
 288                  * take it all the way back down so we can try again */
 289                 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
 290                 goto restart;
 291         }
 292
 293         /* Calculate temperature */
 294         priv->temperature = iwl4965_hw_get_temperature(priv);
 295
 296         /* Send pointers to protocol/runtime uCode image ... init code will
 297          * load and launch runtime uCode, which will send us another "Alive"
 298          * notification. */
 299         IWL_DEBUG_INFO("Initialization Alive received.\n");
 300         if (iwl4965_set_ucode_ptrs(priv)) {
 301                 /* Runtime instruction load won't happen;
 302                  * take it all the way back down so we can try again */
 303                 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
 304                 goto restart;
 305         }
 306         return;
 307
 308 restart:
 309         queue_work(priv->workqueue, &priv->restart);
 310 }
 311
 312 static int is_fat_channel(__le32 rxon_flags)
 313 {
 314         return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
 315                 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
 316 }
 317
 318 /*
 319  * EEPROM handlers
 320  */
 321 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 322 {
 323         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 324 }
 325
 326 /*
 327  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 328  * must be called under priv->lock and mac access
 329  */
 330 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 331 {
 332         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 333 }
 334
 335 static int iwl4965_apm_init(struct iwl_priv *priv)
 336 {
 337         int ret = 0;
 338
 339         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 340                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 341
 342         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 343         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 344                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 345
 346         /* set "initialization complete" bit to move adapter
 347          * D0U* --> D0A* state */
 348         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 349
 350         /* wait for clock stabilization */
 351         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 352                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 353                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 354         if (ret < 0) {
 355                 IWL_DEBUG_INFO("Failed to init the card\n");
 356                 goto out;
 357         }
 358
 359         ret = iwl_grab_nic_access(priv);
 360         if (ret)
 361                 goto out;
 362
 363         /* enable DMA */
 364         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 365                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 366
 367         udelay(20);
 368
 369         /* disable L1-Active */
 370         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 371                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 372
 373         iwl_release_nic_access(priv);
 374 out:
 375         return ret;
 376 }
 377
 378
 379 static void iwl4965_nic_config(struct iwl_priv *priv)
 380 {
 381         unsigned long flags;
 382         u32 val;
 383         u16 radio_cfg;
 384         u16 link;
 385
 386         spin_lock_irqsave(&priv->lock, flags);
 387
 388         if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
 389                 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
 390                 /* Enable No Snoop field */
 391                 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
 392                                        val & ~(1 << 11));
 393         }
 394
 395         pci_read_config_word(priv->pci_dev, PCI_CFG_LINK_CTRL, &link);
 396
 397         /* L1 is enabled by BIOS */
 398         if ((link & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
 399                 /* disable L0S disabled L1A enabled */
 400                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 401         else
 402                 /* L0S enabled L1A disabled */
 403                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 404
 405         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 406
 407         /* write radio config values to register */
 408         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 409                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 410                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 411                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 412                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 413
 414         /* set CSR_HW_CONFIG_REG for uCode use */
 415         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 416                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 417                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 418
 419         priv->calib_info = (struct iwl_eeprom_calib_info *)
 420                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 421
 422         spin_unlock_irqrestore(&priv->lock, flags);
 423 }
 424
 425 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
 426 {
 427         int ret = 0;
 428         unsigned long flags;
 429
 430         spin_lock_irqsave(&priv->lock, flags);
 431
 432         /* set stop master bit */
 433         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 434
 435         ret = iwl_poll_bit(priv, CSR_RESET,
 436                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
 437                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 438         if (ret < 0)
 439                 goto out;
 440
 441 out:
 442         spin_unlock_irqrestore(&priv->lock, flags);
 443         IWL_DEBUG_INFO("stop master\n");
 444
 445         return ret;
 446 }
 447
 448 static void iwl4965_apm_stop(struct iwl_priv *priv)
 449 {
 450         unsigned long flags;
 451
 452         iwl4965_apm_stop_master(priv);
 453
 454         spin_lock_irqsave(&priv->lock, flags);
 455
 456         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 457
 458         udelay(10);
 459         /* clear "init complete"  move adapter D0A* --> D0U state */
 460         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 461         spin_unlock_irqrestore(&priv->lock, flags);
 462 }
 463
 464 static int iwl4965_apm_reset(struct iwl_priv *priv)
 465 {
 466         int ret = 0;
 467         unsigned long flags;
 468
 469         iwl4965_apm_stop_master(priv);
 470
 471         spin_lock_irqsave(&priv->lock, flags);
 472
 473         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 474
 475         udelay(10);
 476
 477         /* FIXME: put here L1A -L0S w/a */
 478
 479         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 480
 481         ret = iwl_poll_bit(priv, CSR_RESET,
 482                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 483                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
 484
 485         if (ret)
 486                 goto out;
 487
 488         udelay(10);
 489
 490         ret = iwl_grab_nic_access(priv);
 491         if (ret)
 492                 goto out;
 493         /* Enable DMA and BSM Clock */
 494         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 495                                               APMG_CLK_VAL_BSM_CLK_RQT);
 496
 497         udelay(10);
 498
 499         /* disable L1A */
 500         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 501                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 502
 503         iwl_release_nic_access(priv);
 504
 505         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 506         wake_up_interruptible(&priv->wait_command_queue);
 507
 508 out:
 509         spin_unlock_irqrestore(&priv->lock, flags);
 510
 511         return ret;
 512 }
 513
 514 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 515  * Called after every association, but this runs only once!
 516  *  ... once chain noise is calibrated the first time, it's good forever.  */
 517 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 518 {
 519         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 520
 521         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 522                 struct iwl_calib_diff_gain_cmd cmd;
 523
 524                 memset(&cmd, 0, sizeof(cmd));
 525                 cmd.opCode = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 526                 cmd.diff_gain_a = 0;
 527                 cmd.diff_gain_b = 0;
 528                 cmd.diff_gain_c = 0;
 529                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 530                                  sizeof(cmd), &cmd))
 531                         IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
 532                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 533                 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
 534         }
 535 }
 536
 537 static void iwl4965_gain_computation(struct iwl_priv *priv,
 538                 u32 *average_noise,
 539                 u16 min_average_noise_antenna_i,
 540                 u32 min_average_noise)
 541 {
 542         int i, ret;
 543         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 544
 545         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 546
 547         for (i = 0; i < NUM_RX_CHAINS; i++) {
 548                 s32 delta_g = 0;
 549
 550                 if (!(data->disconn_array[i]) &&
 551                     (data->delta_gain_code[i] ==
 552                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 553                         delta_g = average_noise[i] - min_average_noise;
 554                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 555                         data->delta_gain_code[i] =
 556                                 min(data->delta_gain_code[i],
 557                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 558
 559                         data->delta_gain_code[i] =
 560                                 (data->delta_gain_code[i] | (1 << 2));
 561                 } else {
 562                         data->delta_gain_code[i] = 0;
 563                 }
 564         }
 565         IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
 566                      data->delta_gain_code[0],
 567                      data->delta_gain_code[1],
 568                      data->delta_gain_code[2]);
 569
 570         /* Differential gain gets sent to uCode only once */
 571         if (!data->radio_write) {
 572                 struct iwl_calib_diff_gain_cmd cmd;
 573                 data->radio_write = 1;
 574
 575                 memset(&cmd, 0, sizeof(cmd));
 576                 cmd.opCode = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 577                 cmd.diff_gain_a = data->delta_gain_code[0];
 578                 cmd.diff_gain_b = data->delta_gain_code[1];
 579                 cmd.diff_gain_c = data->delta_gain_code[2];
 580                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 581                                       sizeof(cmd), &cmd);
 582                 if (ret)
 583                         IWL_DEBUG_CALIB("fail sending cmd "
 584                                      "REPLY_PHY_CALIBRATION_CMD \n");
 585
 586                 /* TODO we might want recalculate
 587                  * rx_chain in rxon cmd */
 588
 589                 /* Mark so we run this algo only once! */
 590                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 591         }
 592         data->chain_noise_a = 0;
 593         data->chain_noise_b = 0;
 594         data->chain_noise_c = 0;
 595         data->chain_signal_a = 0;
 596         data->chain_signal_b = 0;
 597         data->chain_signal_c = 0;
 598         data->beacon_count = 0;
 599 }
 600
 601 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
 602                         __le32 *tx_flags)
 603 {
 604         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 605                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
 606                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
 607         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 608                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 609                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
 610         }
 611 }
 612
 613 static void iwl4965_bg_txpower_work(struct work_struct *work)
 614 {
 615         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 616                         txpower_work);
 617
 618         /* If a scan happened to start before we got here
 619          * then just return; the statistics notification will
 620          * kick off another scheduled work to compensate for
 621          * any temperature delta we missed here. */
 622         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 623             test_bit(STATUS_SCANNING, &priv->status))
 624                 return;
 625
 626         mutex_lock(&priv->mutex);
 627
 628         /* Regardless of if we are associated, we must reconfigure the
 629          * TX power since frames can be sent on non-radar channels while
 630          * not associated */
 631         iwl4965_send_tx_power(priv);
 632
 633         /* Update last_temperature to keep is_calib_needed from running
 634          * when it isn't needed... */
 635         priv->last_temperature = priv->temperature;
 636
 637         mutex_unlock(&priv->mutex);
 638 }
 639
 640 /*
 641  * Acquire priv->lock before calling this function !
 642  */
 643 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 644 {
 645         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 646                              (index & 0xff) | (txq_id << 8));
 647         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 648 }
 649
 650 /**
 651  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 652  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 653  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 654  *
 655  * NOTE:  Acquire priv->lock before calling this function !
 656  */
 657 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 658                                         struct iwl_tx_queue *txq,
 659                                         int tx_fifo_id, int scd_retry)
 660 {
 661         int txq_id = txq->q.id;
 662
 663         /* Find out whether to activate Tx queue */
 664         int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
 665
 666         /* Set up and activate */
 667         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 668                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 669                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 670                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 671                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 672                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 673
 674         txq->sched_retry = scd_retry;
 675
 676         IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
 677                        active ? "Activate" : "Deactivate",
 678                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 679 }
 680
 681 static const u16 default_queue_to_tx_fifo[] = {
 682         IWL_TX_FIFO_AC3,
 683         IWL_TX_FIFO_AC2,
 684         IWL_TX_FIFO_AC1,
 685         IWL_TX_FIFO_AC0,
 686         IWL49_CMD_FIFO_NUM,
 687         IWL_TX_FIFO_HCCA_1,
 688         IWL_TX_FIFO_HCCA_2
 689 };
 690
 691 static int iwl4965_alive_notify(struct iwl_priv *priv)
 692 {
 693         u32 a;
 694         int i = 0;
 695         unsigned long flags;
 696         int ret;
 697
 698         spin_lock_irqsave(&priv->lock, flags);
 699
 700         ret = iwl_grab_nic_access(priv);
 701         if (ret) {
 702                 spin_unlock_irqrestore(&priv->lock, flags);
 703                 return ret;
 704         }
 705
 706         /* Clear 4965's internal Tx Scheduler data base */
 707         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 708         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 709         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 710                 iwl_write_targ_mem(priv, a, 0);
 711         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 712                 iwl_write_targ_mem(priv, a, 0);
 713         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
 714                 iwl_write_targ_mem(priv, a, 0);
 715
 716         /* Tel 4965 where to find Tx byte count tables */
 717         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 718                 (priv->shared_phys +
 719                  offsetof(struct iwl4965_shared, queues_bc_tbls)) >> 10);
 720
 721         /* Disable chain mode for all queues */
 722         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 723
 724         /* Initialize each Tx queue (including the command queue) */
 725         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 726
 727                 /* TFD circular buffer read/write indexes */
 728                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 729                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 730
 731                 /* Max Tx Window size for Scheduler-ACK mode */
 732                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 733                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 734                                 (SCD_WIN_SIZE <<
 735                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 736                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 737
 738                 /* Frame limit */
 739                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 740                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 741                                 sizeof(u32),
 742                                 (SCD_FRAME_LIMIT <<
 743                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 744                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 745
 746         }
 747         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 748                                  (1 << priv->hw_params.max_txq_num) - 1);
 749
 750         /* Activate all Tx DMA/FIFO channels */
 751         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
 752
 753         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 754
 755         /* Map each Tx/cmd queue to its corresponding fifo */
 756         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 757                 int ac = default_queue_to_tx_fifo[i];
 758                 iwl_txq_ctx_activate(priv, i);
 759                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 760         }
 761
 762         iwl_release_nic_access(priv);
 763         spin_unlock_irqrestore(&priv->lock, flags);
 764
 765         return ret;
 766 }
 767
 768 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 769         .min_nrg_cck = 97,
 770         .max_nrg_cck = 0,
 771
 772         .auto_corr_min_ofdm = 85,
 773         .auto_corr_min_ofdm_mrc = 170,
 774         .auto_corr_min_ofdm_x1 = 105,
 775         .auto_corr_min_ofdm_mrc_x1 = 220,
 776
 777         .auto_corr_max_ofdm = 120,
 778         .auto_corr_max_ofdm_mrc = 210,
 779         .auto_corr_max_ofdm_x1 = 140,
 780         .auto_corr_max_ofdm_mrc_x1 = 270,
 781
 782         .auto_corr_min_cck = 125,
 783         .auto_corr_max_cck = 200,
 784         .auto_corr_min_cck_mrc = 200,
 785         .auto_corr_max_cck_mrc = 400,
 786
 787         .nrg_th_cck = 100,
 788         .nrg_th_ofdm = 100,
 789 };
 790
 791 /**
 792  * iwl4965_hw_set_hw_params
 793  *
 794  * Called when initializing driver
 795  */
 796 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 797 {
 798
 799         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 800             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 801                 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
 802                           IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 803                 return -EINVAL;
 804         }
 805
 806         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 807         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 808         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 809         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 810         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 811         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 812         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
 813
 814         priv->hw_params.tx_chains_num = 2;
 815         priv->hw_params.rx_chains_num = 2;
 816         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 817         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 818         priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
 819
 820         priv->hw_params.sens = &iwl4965_sensitivity;
 821
 822         return 0;
 823 }
 824
 825 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 826 {
 827         s32 sign = 1;
 828
 829         if (num < 0) {
 830                 sign = -sign;
 831                 num = -num;
 832         }
 833         if (denom < 0) {
 834                 sign = -sign;
 835                 denom = -denom;
 836         }
 837         *res = 1;
 838         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 839
 840         return 1;
 841 }
 842
 843 /**
 844  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 845  *
 846  * Determines power supply voltage compensation for txpower calculations.
 847  * Returns number of 1/2-dB steps to subtract from gain table index,
 848  * to compensate for difference between power supply voltage during
 849  * factory measurements, vs. current power supply voltage.
 850  *
 851  * Voltage indication is higher for lower voltage.
 852  * Lower voltage requires more gain (lower gain table index).
 853  */
 854 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 855                                             s32 current_voltage)
 856 {
 857         s32 comp = 0;
 858
 859         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 860             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 861                 return 0;
 862
 863         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 864                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 865
 866         if (current_voltage > eeprom_voltage)
 867                 comp *= 2;
 868         if ((comp < -2) || (comp > 2))
 869                 comp = 0;
 870
 871         return comp;
 872 }
 873
 874 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 875 {
 876         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 877             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 878                 return CALIB_CH_GROUP_5;
 879
 880         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 881             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 882                 return CALIB_CH_GROUP_1;
 883
 884         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 885             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 886                 return CALIB_CH_GROUP_2;
 887
 888         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 889             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 890                 return CALIB_CH_GROUP_3;
 891
 892         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 893             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 894                 return CALIB_CH_GROUP_4;
 895
 896         IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
 897         return -1;
 898 }
 899
 900 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 901 {
 902         s32 b = -1;
 903
 904         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 905                 if (priv->calib_info->band_info[b].ch_from == 0)
 906                         continue;
 907
 908                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 909                     && (channel <= priv->calib_info->band_info[b].ch_to))
 910                         break;
 911         }
 912
 913         return b;
 914 }
 915
 916 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 917 {
 918         s32 val;
 919
 920         if (x2 == x1)
 921                 return y1;
 922         else {
 923                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 924                 return val + y2;
 925         }
 926 }
 927
 928 /**
 929  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 930  *
 931  * Interpolates factory measurements from the two sample channels within a
 932  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 933  * differences in channel frequencies, which is proportional to differences
 934  * in channel number.
 935  */
 936 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 937                                     struct iwl_eeprom_calib_ch_info *chan_info)
 938 {
 939         s32 s = -1;
 940         u32 c;
 941         u32 m;
 942         const struct iwl_eeprom_calib_measure *m1;
 943         const struct iwl_eeprom_calib_measure *m2;
 944         struct iwl_eeprom_calib_measure *omeas;
 945         u32 ch_i1;
 946         u32 ch_i2;
 947
 948         s = iwl4965_get_sub_band(priv, channel);
 949         if (s >= EEPROM_TX_POWER_BANDS) {
 950                 IWL_ERROR("Tx Power can not find channel %d\n", channel);
 951                 return -1;
 952         }
 953
 954         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 955         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 956         chan_info->ch_num = (u8) channel;
 957
 958         IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
 959                           channel, s, ch_i1, ch_i2);
 960
 961         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 962                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 963                         m1 = &(priv->calib_info->band_info[s].ch1.
 964                                measurements[c][m]);
 965                         m2 = &(priv->calib_info->band_info[s].ch2.
 966                                measurements[c][m]);
 967                         omeas = &(chan_info->measurements[c][m]);
 968
 969                         omeas->actual_pow =
 970                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 971                                                            m1->actual_pow,
 972                                                            ch_i2,
 973                                                            m2->actual_pow);
 974                         omeas->gain_idx =
 975                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 976                                                            m1->gain_idx, ch_i2,
 977                                                            m2->gain_idx);
 978                         omeas->temperature =
 979                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 980                                                            m1->temperature,
 981                                                            ch_i2,
 982                                                            m2->temperature);
 983                         omeas->pa_det =
 984                             (s8) iwl4965_interpolate_value(channel, ch_i1,
 985                                                            m1->pa_det, ch_i2,
 986                                                            m2->pa_det);
 987
 988                         IWL_DEBUG_TXPOWER
 989                             ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 990                              m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 991                         IWL_DEBUG_TXPOWER
 992                             ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 993                              m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 994                         IWL_DEBUG_TXPOWER
 995                             ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 996                              m1->pa_det, m2->pa_det, omeas->pa_det);
 997                         IWL_DEBUG_TXPOWER
 998                             ("chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 999                              m1->temperature, m2->temperature,
1000                              omeas->temperature);
1001                 }
1002         }
1003
1004         return 0;
1005 }
1006
1007 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1008  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1009 static s32 back_off_table[] = {
1010         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1011         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1012         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1013         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1014         10                      /* CCK */
1015 };
1016
1017 /* Thermal compensation values for txpower for various frequency ranges ...
1018  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1019 static struct iwl4965_txpower_comp_entry {
1020         s32 degrees_per_05db_a;
1021         s32 degrees_per_05db_a_denom;
1022 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1023         {9, 2},                 /* group 0 5.2, ch  34-43 */
1024         {4, 1},                 /* group 1 5.2, ch  44-70 */
1025         {4, 1},                 /* group 2 5.2, ch  71-124 */
1026         {4, 1},                 /* group 3 5.2, ch 125-200 */
1027         {3, 1}                  /* group 4 2.4, ch   all */
1028 };
1029
1030 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1031 {
1032         if (!band) {
1033                 if ((rate_power_index & 7) <= 4)
1034                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1035         }
1036         return MIN_TX_GAIN_INDEX;
1037 }
1038
1039 struct gain_entry {
1040         u8 dsp;
1041         u8 radio;
1042 };
1043
1044 static const struct gain_entry gain_table[2][108] = {
1045         /* 5.2GHz power gain index table */
1046         {
1047          {123, 0x3F},           /* highest txpower */
1048          {117, 0x3F},
1049          {110, 0x3F},
1050          {104, 0x3F},
1051          {98, 0x3F},
1052          {110, 0x3E},
1053          {104, 0x3E},
1054          {98, 0x3E},
1055          {110, 0x3D},
1056          {104, 0x3D},
1057          {98, 0x3D},
1058          {110, 0x3C},
1059          {104, 0x3C},
1060          {98, 0x3C},
1061          {110, 0x3B},
1062          {104, 0x3B},
1063          {98, 0x3B},
1064          {110, 0x3A},
1065          {104, 0x3A},
1066          {98, 0x3A},
1067          {110, 0x39},
1068          {104, 0x39},
1069          {98, 0x39},
1070          {110, 0x38},
1071          {104, 0x38},
1072          {98, 0x38},
1073          {110, 0x37},
1074          {104, 0x37},
1075          {98, 0x37},
1076          {110, 0x36},
1077          {104, 0x36},
1078          {98, 0x36},
1079          {110, 0x35},
1080          {104, 0x35},
1081          {98, 0x35},
1082          {110, 0x34},
1083          {104, 0x34},
1084          {98, 0x34},
1085          {110, 0x33},
1086          {104, 0x33},
1087          {98, 0x33},
1088          {110, 0x32},
1089          {104, 0x32},
1090          {98, 0x32},
1091          {110, 0x31},
1092          {104, 0x31},
1093          {98, 0x31},
1094          {110, 0x30},
1095          {104, 0x30},
1096          {98, 0x30},
1097          {110, 0x25},
1098          {104, 0x25},
1099          {98, 0x25},
1100          {110, 0x24},
1101          {104, 0x24},
1102          {98, 0x24},
1103          {110, 0x23},
1104          {104, 0x23},
1105          {98, 0x23},
1106          {110, 0x22},
1107          {104, 0x18},
1108          {98, 0x18},
1109          {110, 0x17},
1110          {104, 0x17},
1111          {98, 0x17},
1112          {110, 0x16},
1113          {104, 0x16},
1114          {98, 0x16},
1115          {110, 0x15},
1116          {104, 0x15},
1117          {98, 0x15},
1118          {110, 0x14},
1119          {104, 0x14},
1120          {98, 0x14},
1121          {110, 0x13},
1122          {104, 0x13},
1123          {98, 0x13},
1124          {110, 0x12},
1125          {104, 0x08},
1126          {98, 0x08},
1127          {110, 0x07},
1128          {104, 0x07},
1129          {98, 0x07},
1130          {110, 0x06},
1131          {104, 0x06},
1132          {98, 0x06},
1133          {110, 0x05},
1134          {104, 0x05},
1135          {98, 0x05},
1136          {110, 0x04},
1137          {104, 0x04},
1138          {98, 0x04},
1139          {110, 0x03},
1140          {104, 0x03},
1141          {98, 0x03},
1142          {110, 0x02},
1143          {104, 0x02},
1144          {98, 0x02},
1145          {110, 0x01},
1146          {104, 0x01},
1147          {98, 0x01},
1148          {110, 0x00},
1149          {104, 0x00},
1150          {98, 0x00},
1151          {93, 0x00},
1152          {88, 0x00},
1153          {83, 0x00},
1154          {78, 0x00},
1155          },
1156         /* 2.4GHz power gain index table */
1157         {
1158          {110, 0x3f},           /* highest txpower */
1159          {104, 0x3f},
1160          {98, 0x3f},
1161          {110, 0x3e},
1162          {104, 0x3e},
1163          {98, 0x3e},
1164          {110, 0x3d},
1165          {104, 0x3d},
1166          {98, 0x3d},
1167          {110, 0x3c},
1168          {104, 0x3c},
1169          {98, 0x3c},
1170          {110, 0x3b},
1171          {104, 0x3b},
1172          {98, 0x3b},
1173          {110, 0x3a},
1174          {104, 0x3a},
1175          {98, 0x3a},
1176          {110, 0x39},
1177          {104, 0x39},
1178          {98, 0x39},
1179          {110, 0x38},
1180          {104, 0x38},
1181          {98, 0x38},
1182          {110, 0x37},
1183          {104, 0x37},
1184          {98, 0x37},
1185          {110, 0x36},
1186          {104, 0x36},
1187          {98, 0x36},
1188          {110, 0x35},
1189          {104, 0x35},
1190          {98, 0x35},
1191          {110, 0x34},
1192          {104, 0x34},
1193          {98, 0x34},
1194          {110, 0x33},
1195          {104, 0x33},
1196          {98, 0x33},
1197          {110, 0x32},
1198          {104, 0x32},
1199          {98, 0x32},
1200          {110, 0x31},
1201          {104, 0x31},
1202          {98, 0x31},
1203          {110, 0x30},
1204          {104, 0x30},
1205          {98, 0x30},
1206          {110, 0x6},
1207          {104, 0x6},
1208          {98, 0x6},
1209          {110, 0x5},
1210          {104, 0x5},
1211          {98, 0x5},
1212          {110, 0x4},
1213          {104, 0x4},
1214          {98, 0x4},
1215          {110, 0x3},
1216          {104, 0x3},
1217          {98, 0x3},
1218          {110, 0x2},
1219          {104, 0x2},
1220          {98, 0x2},
1221          {110, 0x1},
1222          {104, 0x1},
1223          {98, 0x1},
1224          {110, 0x0},
1225          {104, 0x0},
1226          {98, 0x0},
1227          {97, 0},
1228          {96, 0},
1229          {95, 0},
1230          {94, 0},
1231          {93, 0},
1232          {92, 0},
1233          {91, 0},
1234          {90, 0},
1235          {89, 0},
1236          {88, 0},
1237          {87, 0},
1238          {86, 0},
1239          {85, 0},
1240          {84, 0},
1241          {83, 0},
1242          {82, 0},
1243          {81, 0},
1244          {80, 0},
1245          {79, 0},
1246          {78, 0},
1247          {77, 0},
1248          {76, 0},
1249          {75, 0},
1250          {74, 0},
1251          {73, 0},
1252          {72, 0},
1253          {71, 0},
1254          {70, 0},
1255          {69, 0},
1256          {68, 0},
1257          {67, 0},
1258          {66, 0},
1259          {65, 0},
1260          {64, 0},
1261          {63, 0},
1262          {62, 0},
1263          {61, 0},
1264          {60, 0},
1265          {59, 0},
1266          }
1267 };
1268
1269 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1270                                     u8 is_fat, u8 ctrl_chan_high,
1271                                     struct iwl4965_tx_power_db *tx_power_tbl)
1272 {
1273         u8 saturation_power;
1274         s32 target_power;
1275         s32 user_target_power;
1276         s32 power_limit;
1277         s32 current_temp;
1278         s32 reg_limit;
1279         s32 current_regulatory;
1280         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1281         int i;
1282         int c;
1283         const struct iwl_channel_info *ch_info = NULL;
1284         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1285         const struct iwl_eeprom_calib_measure *measurement;
1286         s16 voltage;
1287         s32 init_voltage;
1288         s32 voltage_compensation;
1289         s32 degrees_per_05db_num;
1290         s32 degrees_per_05db_denom;
1291         s32 factory_temp;
1292         s32 temperature_comp[2];
1293         s32 factory_gain_index[2];
1294         s32 factory_actual_pwr[2];
1295         s32 power_index;
1296
1297         /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1298          *   are used for indexing into txpower table) */
1299         user_target_power = 2 * priv->tx_power_user_lmt;
1300
1301         /* Get current (RXON) channel, band, width */
1302         IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1303                           is_fat);
1304
1305         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1306
1307         if (!is_channel_valid(ch_info))
1308                 return -EINVAL;
1309
1310         /* get txatten group, used to select 1) thermal txpower adjustment
1311          *   and 2) mimo txpower balance between Tx chains. */
1312         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1313         if (txatten_grp < 0)
1314                 return -EINVAL;
1315
1316         IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1317                           channel, txatten_grp);
1318
1319         if (is_fat) {
1320                 if (ctrl_chan_high)
1321                         channel -= 2;
1322                 else
1323                         channel += 2;
1324         }
1325
1326         /* hardware txpower limits ...
1327          * saturation (clipping distortion) txpowers are in half-dBm */
1328         if (band)
1329                 saturation_power = priv->calib_info->saturation_power24;
1330         else
1331                 saturation_power = priv->calib_info->saturation_power52;
1332
1333         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1334             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1335                 if (band)
1336                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1337                 else
1338                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1339         }
1340
1341         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1342          *   max_power_avg values are in dBm, convert * 2 */
1343         if (is_fat)
1344                 reg_limit = ch_info->fat_max_power_avg * 2;
1345         else
1346                 reg_limit = ch_info->max_power_avg * 2;
1347
1348         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1349             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1350                 if (band)
1351                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1352                 else
1353                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1354         }
1355
1356         /* Interpolate txpower calibration values for this channel,
1357          *   based on factory calibration tests on spaced channels. */
1358         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1359
1360         /* calculate tx gain adjustment based on power supply voltage */
1361         voltage = priv->calib_info->voltage;
1362         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1363         voltage_compensation =
1364             iwl4965_get_voltage_compensation(voltage, init_voltage);
1365
1366         IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1367                           init_voltage,
1368                           voltage, voltage_compensation);
1369
1370         /* get current temperature (Celsius) */
1371         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1372         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1373         current_temp = KELVIN_TO_CELSIUS(current_temp);
1374
1375         /* select thermal txpower adjustment params, based on channel group
1376          *   (same frequency group used for mimo txatten adjustment) */
1377         degrees_per_05db_num =
1378             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1379         degrees_per_05db_denom =
1380             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1381
1382         /* get per-chain txpower values from factory measurements */
1383         for (c = 0; c < 2; c++) {
1384                 measurement = &ch_eeprom_info.measurements[c][1];
1385
1386                 /* txgain adjustment (in half-dB steps) based on difference
1387                  *   between factory and current temperature */
1388                 factory_temp = measurement->temperature;
1389                 iwl4965_math_div_round((current_temp - factory_temp) *
1390                                        degrees_per_05db_denom,
1391                                        degrees_per_05db_num,
1392                                        &temperature_comp[c]);
1393
1394                 factory_gain_index[c] = measurement->gain_idx;
1395                 factory_actual_pwr[c] = measurement->actual_pow;
1396
1397                 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1398                 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1399                                   "curr tmp %d, comp %d steps\n",
1400                                   factory_temp, current_temp,
1401                                   temperature_comp[c]);
1402
1403                 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1404                                   factory_gain_index[c],
1405                                   factory_actual_pwr[c]);
1406         }
1407
1408         /* for each of 33 bit-rates (including 1 for CCK) */
1409         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1410                 u8 is_mimo_rate;
1411                 union iwl4965_tx_power_dual_stream tx_power;
1412
1413                 /* for mimo, reduce each chain's txpower by half
1414                  * (3dB, 6 steps), so total output power is regulatory
1415                  * compliant. */
1416                 if (i & 0x8) {
1417                         current_regulatory = reg_limit -
1418                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1419                         is_mimo_rate = 1;
1420                 } else {
1421                         current_regulatory = reg_limit;
1422                         is_mimo_rate = 0;
1423                 }
1424
1425                 /* find txpower limit, either hardware or regulatory */
1426                 power_limit = saturation_power - back_off_table[i];
1427                 if (power_limit > current_regulatory)
1428                         power_limit = current_regulatory;
1429
1430                 /* reduce user's txpower request if necessary
1431                  * for this rate on this channel */
1432                 target_power = user_target_power;
1433                 if (target_power > power_limit)
1434                         target_power = power_limit;
1435
1436                 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1437                                   i, saturation_power - back_off_table[i],
1438                                   current_regulatory, user_target_power,
1439                                   target_power);
1440
1441                 /* for each of 2 Tx chains (radio transmitters) */
1442                 for (c = 0; c < 2; c++) {
1443                         s32 atten_value;
1444
1445                         if (is_mimo_rate)
1446                                 atten_value =
1447                                     (s32)le32_to_cpu(priv->card_alive_init.
1448                                     tx_atten[txatten_grp][c]);
1449                         else
1450                                 atten_value = 0;
1451
1452                         /* calculate index; higher index means lower txpower */
1453                         power_index = (u8) (factory_gain_index[c] -
1454                                             (target_power -
1455                                              factory_actual_pwr[c]) -
1456                                             temperature_comp[c] -
1457                                             voltage_compensation +
1458                                             atten_value);
1459
1460 /*                      IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1461                                                 power_index); */
1462
1463                         if (power_index < get_min_power_index(i, band))
1464                                 power_index = get_min_power_index(i, band);
1465
1466                         /* adjust 5 GHz index to support negative indexes */
1467                         if (!band)
1468                                 power_index += 9;
1469
1470                         /* CCK, rate 32, reduce txpower for CCK */
1471                         if (i == POWER_TABLE_CCK_ENTRY)
1472                                 power_index +=
1473                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1474
1475                         /* stay within the table! */
1476                         if (power_index > 107) {
1477                                 IWL_WARNING("txpower index %d > 107\n",
1478                                             power_index);
1479                                 power_index = 107;
1480                         }
1481                         if (power_index < 0) {
1482                                 IWL_WARNING("txpower index %d < 0\n",
1483                                             power_index);
1484                                 power_index = 0;
1485                         }
1486
1487                         /* fill txpower command for this rate/chain */
1488                         tx_power.s.radio_tx_gain[c] =
1489                                 gain_table[band][power_index].radio;
1490                         tx_power.s.dsp_predis_atten[c] =
1491                                 gain_table[band][power_index].dsp;
1492
1493                         IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1494                                           "gain 0x%02x dsp %d\n",
1495                                           c, atten_value, power_index,
1496                                         tx_power.s.radio_tx_gain[c],
1497                                         tx_power.s.dsp_predis_atten[c]);
1498                 } /* for each chain */
1499
1500                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1501
1502         } /* for each rate */
1503
1504         return 0;
1505 }
1506
1507 /**
1508  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1509  *
1510  * Uses the active RXON for channel, band, and characteristics (fat, high)
1511  * The power limit is taken from priv->tx_power_user_lmt.
1512  */
1513 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1514 {
1515         struct iwl4965_txpowertable_cmd cmd = { 0 };
1516         int ret;
1517         u8 band = 0;
1518         u8 is_fat = 0;
1519         u8 ctrl_chan_high = 0;
1520
1521         if (test_bit(STATUS_SCANNING, &priv->status)) {
1522                 /* If this gets hit a lot, switch it to a BUG() and catch
1523                  * the stack trace to find out who is calling this during
1524                  * a scan. */
1525                 IWL_WARNING("TX Power requested while scanning!\n");
1526                 return -EAGAIN;
1527         }
1528
1529         band = priv->band == IEEE80211_BAND_2GHZ;
1530
1531         is_fat =  is_fat_channel(priv->active_rxon.flags);
1532
1533         if (is_fat &&
1534             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1535                 ctrl_chan_high = 1;
1536
1537         cmd.band = band;
1538         cmd.channel = priv->active_rxon.channel;
1539
1540         ret = iwl4965_fill_txpower_tbl(priv, band,
1541                                 le16_to_cpu(priv->active_rxon.channel),
1542                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1543         if (ret)
1544                 goto out;
1545
1546         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1547
1548 out:
1549         return ret;
1550 }
1551
1552 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1553 {
1554         int ret = 0;
1555         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1556         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1557         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1558
1559         if ((rxon1->flags == rxon2->flags) &&
1560             (rxon1->filter_flags == rxon2->filter_flags) &&
1561             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1562             (rxon1->ofdm_ht_single_stream_basic_rates ==
1563              rxon2->ofdm_ht_single_stream_basic_rates) &&
1564             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1565              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1566             (rxon1->rx_chain == rxon2->rx_chain) &&
1567             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1568                 IWL_DEBUG_INFO("Using current RXON_ASSOC.  Not resending.\n");
1569                 return 0;
1570         }
1571
1572         rxon_assoc.flags = priv->staging_rxon.flags;
1573         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1574         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1575         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1576         rxon_assoc.reserved = 0;
1577         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1578             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1579         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1580             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1581         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1582
1583         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1584                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1585         if (ret)
1586                 return ret;
1587
1588         return ret;
1589 }
1590
1591 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1592 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1593 {
1594         int rc;
1595         u8 band = 0;
1596         u8 is_fat = 0;
1597         u8 ctrl_chan_high = 0;
1598         struct iwl4965_channel_switch_cmd cmd = { 0 };
1599         const struct iwl_channel_info *ch_info;
1600
1601         band = priv->band == IEEE80211_BAND_2GHZ;
1602
1603         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1604
1605         is_fat = is_fat_channel(priv->staging_rxon.flags);
1606
1607         if (is_fat &&
1608             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1609                 ctrl_chan_high = 1;
1610
1611         cmd.band = band;
1612         cmd.expect_beacon = 0;
1613         cmd.channel = cpu_to_le16(channel);
1614         cmd.rxon_flags = priv->active_rxon.flags;
1615         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1616         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1617         if (ch_info)
1618                 cmd.expect_beacon = is_channel_radar(ch_info);
1619         else
1620                 cmd.expect_beacon = 1;
1621
1622         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1623                                       ctrl_chan_high, &cmd.tx_power);
1624         if (rc) {
1625                 IWL_DEBUG_11H("error:%d  fill txpower_tbl\n", rc);
1626                 return rc;
1627         }
1628
1629         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1630         return rc;
1631 }
1632 #endif
1633
1634 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1635 {
1636         priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1637                                         sizeof(struct iwl4965_shared),
1638                                         &priv->shared_phys);
1639         if (!priv->shared_virt)
1640                 return -ENOMEM;
1641
1642         memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1643
1644         return 0;
1645 }
1646
1647 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1648 {
1649         if (priv->shared_virt)
1650                 pci_free_consistent(priv->pci_dev,
1651                                     sizeof(struct iwl4965_shared),
1652                                     priv->shared_virt,
1653                                     priv->shared_phys);
1654 }
1655
1656 /**
1657  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1658  */
1659 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1660                                             struct iwl_tx_queue *txq,
1661                                             u16 byte_cnt)
1662 {
1663         struct iwl4965_shared *shared_data = priv->shared_virt;
1664         int txq_id = txq->q.id;
1665         int write_ptr = txq->q.write_ptr;
1666         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1667         __le16 bc_ent;
1668
1669         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1670
1671         bc_ent = cpu_to_le16(len & 0xFFF);
1672         /* Set up byte count within first 256 entries */
1673         shared_data->queues_bc_tbls[txq_id].tfd_offset[write_ptr] = bc_ent;
1674
1675         /* If within first 64 entries, duplicate at end */
1676         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1677                 shared_data->queues_bc_tbls[txq_id].
1678                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1679 }
1680
1681 /**
1682  * sign_extend - Sign extend a value using specified bit as sign-bit
1683  *
1684  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1685  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1686  *
1687  * @param oper value to sign extend
1688  * @param index 0 based bit index (0<=index<32) to sign bit
1689  */
1690 static s32 sign_extend(u32 oper, int index)
1691 {
1692         u8 shift = 31 - index;
1693
1694         return (s32)(oper << shift) >> shift;
1695 }
1696
1697 /**
1698  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1699  * @statistics: Provides the temperature reading from the uCode
1700  *
1701  * A return of <0 indicates bogus data in the statistics
1702  */
1703 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1704 {
1705         s32 temperature;
1706         s32 vt;
1707         s32 R1, R2, R3;
1708         u32 R4;
1709
1710         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1711                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1712                 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1713                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1714                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1715                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1716                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1717         } else {
1718                 IWL_DEBUG_TEMP("Running temperature calibration\n");
1719                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1720                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1721                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1722                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1723         }
1724
1725         /*
1726          * Temperature is only 23 bits, so sign extend out to 32.
1727          *
1728          * NOTE If we haven't received a statistics notification yet
1729          * with an updated temperature, use R4 provided to us in the
1730          * "initialize" ALIVE response.
1731          */
1732         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1733                 vt = sign_extend(R4, 23);
1734         else
1735                 vt = sign_extend(
1736                         le32_to_cpu(priv->statistics.general.temperature), 23);
1737
1738         IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1739
1740         if (R3 == R1) {
1741                 IWL_ERROR("Calibration conflict R1 == R3\n");
1742                 return -1;
1743         }
1744
1745         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1746          * Add offset to center the adjustment around 0 degrees Centigrade. */
1747         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1748         temperature /= (R3 - R1);
1749         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1750
1751         IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1752                         temperature, KELVIN_TO_CELSIUS(temperature));
1753
1754         return temperature;
1755 }
1756
1757 /* Adjust Txpower only if temperature variance is greater than threshold. */
1758 #define IWL_TEMPERATURE_THRESHOLD   3
1759
1760 /**
1761  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1762  *
1763  * If the temperature changed has changed sufficiently, then a recalibration
1764  * is needed.
1765  *
1766  * Assumes caller will replace priv->last_temperature once calibration
1767  * executed.
1768  */
1769 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1770 {
1771         int temp_diff;
1772
1773         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1774                 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1775                 return 0;
1776         }
1777
1778         temp_diff = priv->temperature - priv->last_temperature;
1779
1780         /* get absolute value */
1781         if (temp_diff < 0) {
1782                 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1783                 temp_diff = -temp_diff;
1784         } else if (temp_diff == 0)
1785                 IWL_DEBUG_POWER("Same temp, \n");
1786         else
1787                 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1788
1789         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1790                 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1791                 return 0;
1792         }
1793
1794         IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1795
1796         return 1;
1797 }
1798
1799 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1800 {
1801         s32 temp;
1802
1803         temp = iwl4965_hw_get_temperature(priv);
1804         if (temp < 0)
1805                 return;
1806
1807         if (priv->temperature != temp) {
1808                 if (priv->temperature)
1809                         IWL_DEBUG_TEMP("Temperature changed "
1810                                        "from %dC to %dC\n",
1811                                        KELVIN_TO_CELSIUS(priv->temperature),
1812                                        KELVIN_TO_CELSIUS(temp));
1813                 else
1814                         IWL_DEBUG_TEMP("Temperature "
1815                                        "initialized to %dC\n",
1816                                        KELVIN_TO_CELSIUS(temp));
1817         }
1818
1819         priv->temperature = temp;
1820         set_bit(STATUS_TEMPERATURE, &priv->status);
1821
1822         if (!priv->disable_tx_power_cal &&
1823              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1824              iwl4965_is_temp_calib_needed(priv))
1825                 queue_work(priv->workqueue, &priv->txpower_work);
1826 }
1827
1828 /**
1829  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1830  */
1831 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1832                                             u16 txq_id)
1833 {
1834         /* Simply stop the queue, but don't change any configuration;
1835          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1836         iwl_write_prph(priv,
1837                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1838                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1839                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1840 }
1841
1842 /**
1843  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1844  * priv->lock must be held by the caller
1845  */
1846 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1847                                    u16 ssn_idx, u8 tx_fifo)
1848 {
1849         int ret = 0;
1850
1851         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1852             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1853                 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1854                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1855                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1856                 return -EINVAL;
1857         }
1858
1859         ret = iwl_grab_nic_access(priv);
1860         if (ret)
1861                 return ret;
1862
1863         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1864
1865         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1866
1867         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1868         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1869         /* supposes that ssn_idx is valid (!= 0xFFF) */
1870         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1871
1872         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1873         iwl_txq_ctx_deactivate(priv, txq_id);
1874         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1875
1876         iwl_release_nic_access(priv);
1877
1878         return 0;
1879 }
1880
1881 /**
1882  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1883  */
1884 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1885                                         u16 txq_id)
1886 {
1887         u32 tbl_dw_addr;
1888         u32 tbl_dw;
1889         u16 scd_q2ratid;
1890
1891         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1892
1893         tbl_dw_addr = priv->scd_base_addr +
1894                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1895
1896         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1897
1898         if (txq_id & 0x1)
1899                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1900         else
1901                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1902
1903         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1904
1905         return 0;
1906 }
1907
1908
1909 /**
1910  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1911  *
1912  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1913  *        i.e. it must be one of the higher queues used for aggregation
1914  */
1915 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1916                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1917 {
1918         unsigned long flags;
1919         int ret;
1920         u16 ra_tid;
1921
1922         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1923             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1924                 IWL_WARNING("queue number out of range: %d, must be %d to %d\n",
1925                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1926                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1927                 return -EINVAL;
1928         }
1929
1930         ra_tid = BUILD_RAxTID(sta_id, tid);
1931
1932         /* Modify device's station table to Tx this TID */
1933         iwl_sta_modify_enable_tid_tx(priv, sta_id, tid);
1934
1935         spin_lock_irqsave(&priv->lock, flags);
1936         ret = iwl_grab_nic_access(priv);
1937         if (ret) {
1938                 spin_unlock_irqrestore(&priv->lock, flags);
1939                 return ret;
1940         }
1941
1942         /* Stop this Tx queue before configuring it */
1943         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1944
1945         /* Map receiver-address / traffic-ID to this queue */
1946         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1947
1948         /* Set this queue as a chain-building queue */
1949         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1950
1951         /* Place first TFD at index corresponding to start sequence number.
1952          * Assumes that ssn_idx is valid (!= 0xFFF) */
1953         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1954         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1955         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1956
1957         /* Set up Tx window size and frame limit for this queue */
1958         iwl_write_targ_mem(priv,
1959                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1960                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1961                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1962
1963         iwl_write_targ_mem(priv, priv->scd_base_addr +
1964                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1965                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1966                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1967
1968         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1969
1970         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1971         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1972
1973         iwl_release_nic_access(priv);
1974         spin_unlock_irqrestore(&priv->lock, flags);
1975
1976         return 0;
1977 }
1978
1979
1980 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1981 {
1982         switch (cmd_id) {
1983         case REPLY_RXON:
1984                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1985         default:
1986                 return len;
1987         }
1988 }
1989
1990 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1991 {
1992         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1993         addsta->mode = cmd->mode;
1994         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1995         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1996         addsta->station_flags = cmd->station_flags;
1997         addsta->station_flags_msk = cmd->station_flags_msk;
1998         addsta->tid_disable_tx = cmd->tid_disable_tx;
1999         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2000         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2001         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2002         addsta->reserved1 = __constant_cpu_to_le16(0);
2003         addsta->reserved2 = __constant_cpu_to_le32(0);
2004
2005         return (u16)sizeof(struct iwl4965_addsta_cmd);
2006 }
2007
2008 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
2009 {
2010         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2011 }
2012
2013 /**
2014  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2015  */
2016 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2017                                       struct iwl_ht_agg *agg,
2018                                       struct iwl4965_tx_resp *tx_resp,
2019                                       int txq_id, u16 start_idx)
2020 {
2021         u16 status;
2022         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2023         struct ieee80211_tx_info *info = NULL;
2024         struct ieee80211_hdr *hdr = NULL;
2025         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2026         int i, sh, idx;
2027         u16 seq;
2028         if (agg->wait_for_ba)
2029                 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2030
2031         agg->frame_count = tx_resp->frame_count;
2032         agg->start_idx = start_idx;
2033         agg->rate_n_flags = rate_n_flags;
2034         agg->bitmap = 0;
2035
2036         /* num frames attempted by Tx command */
2037         if (agg->frame_count == 1) {
2038                 /* Only one frame was attempted; no block-ack will arrive */
2039                 status = le16_to_cpu(frame_status[0].status);
2040                 idx = start_idx;
2041
2042                 /* FIXME: code repetition */
2043                 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2044                                    agg->frame_count, agg->start_idx, idx);
2045
2046                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2047                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2048                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2049                 info->flags |= iwl_is_tx_success(status)?
2050                         IEEE80211_TX_STAT_ACK : 0;
2051                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2052                 /* FIXME: code repetition end */
2053
2054                 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2055                                     status & 0xff, tx_resp->failure_frame);
2056                 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2057
2058                 agg->wait_for_ba = 0;
2059         } else {
2060                 /* Two or more frames were attempted; expect block-ack */
2061                 u64 bitmap = 0;
2062                 int start = agg->start_idx;
2063
2064                 /* Construct bit-map of pending frames within Tx window */
2065                 for (i = 0; i < agg->frame_count; i++) {
2066                         u16 sc;
2067                         status = le16_to_cpu(frame_status[i].status);
2068                         seq  = le16_to_cpu(frame_status[i].sequence);
2069                         idx = SEQ_TO_INDEX(seq);
2070                         txq_id = SEQ_TO_QUEUE(seq);
2071
2072                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2073                                       AGG_TX_STATE_ABORT_MSK))
2074                                 continue;
2075
2076                         IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2077                                            agg->frame_count, txq_id, idx);
2078
2079                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2080
2081                         sc = le16_to_cpu(hdr->seq_ctrl);
2082                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2083                                 IWL_ERROR("BUG_ON idx doesn't match seq control"
2084                                           " idx=%d, seq_idx=%d, seq=%d\n",
2085                                           idx, SEQ_TO_SN(sc),
2086                                           hdr->seq_ctrl);
2087                                 return -1;
2088                         }
2089
2090                         IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2091                                            i, idx, SEQ_TO_SN(sc));
2092
2093                         sh = idx - start;
2094                         if (sh > 64) {
2095                                 sh = (start - idx) + 0xff;
2096                                 bitmap = bitmap << sh;
2097                                 sh = 0;
2098                                 start = idx;
2099                         } else if (sh < -64)
2100                                 sh  = 0xff - (start - idx);
2101                         else if (sh < 0) {
2102                                 sh = start - idx;
2103                                 start = idx;
2104                                 bitmap = bitmap << sh;
2105                                 sh = 0;
2106                         }
2107                         bitmap |= 1ULL << sh;
2108                         IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%llx\n",
2109                                            start, (unsigned long long)bitmap);
2110                 }
2111
2112                 agg->bitmap = bitmap;
2113                 agg->start_idx = start;
2114                 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2115                                    agg->frame_count, agg->start_idx,
2116                                    (unsigned long long)agg->bitmap);
2117
2118                 if (bitmap)
2119                         agg->wait_for_ba = 1;
2120         }
2121         return 0;
2122 }
2123
2124 /**
2125  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2126  */
2127 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2128                                 struct iwl_rx_mem_buffer *rxb)
2129 {
2130         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2131         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2132         int txq_id = SEQ_TO_QUEUE(sequence);
2133         int index = SEQ_TO_INDEX(sequence);
2134         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2135         struct ieee80211_hdr *hdr;
2136         struct ieee80211_tx_info *info;
2137         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2138         u32  status = le32_to_cpu(tx_resp->u.status);
2139         int tid = MAX_TID_COUNT;
2140         int sta_id;
2141         int freed;
2142         u8 *qc = NULL;
2143
2144         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2145                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2146                           "is out of range [0-%d] %d %d\n", txq_id,
2147                           index, txq->q.n_bd, txq->q.write_ptr,
2148                           txq->q.read_ptr);
2149                 return;
2150         }
2151
2152         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2153         memset(&info->status, 0, sizeof(info->status));
2154
2155         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2156         if (ieee80211_is_data_qos(hdr->frame_control)) {
2157                 qc = ieee80211_get_qos_ctl(hdr);
2158                 tid = qc[0] & 0xf;
2159         }
2160
2161         sta_id = iwl_get_ra_sta_id(priv, hdr);
2162         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2163                 IWL_ERROR("Station not known\n");
2164                 return;
2165         }
2166
2167         if (txq->sched_retry) {
2168                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2169                 struct iwl_ht_agg *agg = NULL;
2170
2171                 WARN_ON(!qc);
2172
2173                 agg = &priv->stations[sta_id].tid[tid].agg;
2174
2175                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2176
2177                 /* check if BAR is needed */
2178                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2179                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2180
2181                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2182                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2183                         IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2184                                            "%d index %d\n", scd_ssn , index);
2185                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2186                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2187
2188                         if (priv->mac80211_registered &&
2189                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2190                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2191                                 if (agg->state == IWL_AGG_OFF)
2192                                         ieee80211_wake_queue(priv->hw, txq_id);
2193                                 else
2194                                         ieee80211_wake_queue(priv->hw,
2195                                                              txq->swq_id);
2196                         }
2197                 }
2198         } else {
2199                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2200                 info->flags |= iwl_is_tx_success(status) ?
2201                                         IEEE80211_TX_STAT_ACK : 0;
2202                 iwl_hwrate_to_tx_control(priv,
2203                                         le32_to_cpu(tx_resp->rate_n_flags),
2204                                         info);
2205
2206                 IWL_DEBUG_TX_REPLY("TXQ %d status %s (0x%08x) "
2207                                    "rate_n_flags 0x%x retries %d\n",
2208                                    txq_id,
2209                                    iwl_get_tx_fail_reason(status), status,
2210                                    le32_to_cpu(tx_resp->rate_n_flags),
2211                                    tx_resp->failure_frame);
2212
2213                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2214                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2215                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2216
2217                 if (priv->mac80211_registered &&
2218                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2219                         ieee80211_wake_queue(priv->hw, txq_id);
2220         }
2221
2222         if (qc && likely(sta_id != IWL_INVALID_STATION))
2223                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2224
2225         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2226                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
2227 }
2228
2229 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2230                              struct iwl_rx_phy_res *rx_resp)
2231 {
2232         /* data from PHY/DSP regarding signal strength, etc.,
2233          *   contents are always there, not configurable by host.  */
2234         struct iwl4965_rx_non_cfg_phy *ncphy =
2235             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2236         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2237                         >> IWL49_AGC_DB_POS;
2238
2239         u32 valid_antennae =
2240             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2241                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2242         u8 max_rssi = 0;
2243         u32 i;
2244
2245         /* Find max rssi among 3 possible receivers.
2246          * These values are measured by the digital signal processor (DSP).
2247          * They should stay fairly constant even as the signal strength varies,
2248          *   if the radio's automatic gain control (AGC) is working right.
2249          * AGC value (see below) will provide the "interesting" info. */
2250         for (i = 0; i < 3; i++)
2251                 if (valid_antennae & (1 << i))
2252                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2253
2254         IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2255                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2256                 max_rssi, agc);
2257
2258         /* dBm = max_rssi dB - agc dB - constant.
2259          * Higher AGC (higher radio gain) means lower signal. */
2260         return max_rssi - agc - IWL_RSSI_OFFSET;
2261 }
2262
2263
2264 /* Set up 4965-specific Rx frame reply handlers */
2265 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2266 {
2267         /* Legacy Rx frames */
2268         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2269         /* Tx response */
2270         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2271 }
2272
2273 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2274 {
2275         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2276 }
2277
2278 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2279 {
2280         cancel_work_sync(&priv->txpower_work);
2281 }
2282
2283
2284 static struct iwl_hcmd_ops iwl4965_hcmd = {
2285         .rxon_assoc = iwl4965_send_rxon_assoc,
2286 };
2287
2288 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2289         .get_hcmd_size = iwl4965_get_hcmd_size,
2290         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2291         .chain_noise_reset = iwl4965_chain_noise_reset,
2292         .gain_computation = iwl4965_gain_computation,
2293         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2294         .calc_rssi = iwl4965_calc_rssi,
2295 };
2296
2297 static struct iwl_lib_ops iwl4965_lib = {
2298         .set_hw_params = iwl4965_hw_set_hw_params,
2299         .alloc_shared_mem = iwl4965_alloc_shared_mem,
2300         .free_shared_mem = iwl4965_free_shared_mem,
2301         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2302         .txq_set_sched = iwl4965_txq_set_sched,
2303         .txq_agg_enable = iwl4965_txq_agg_enable,
2304         .txq_agg_disable = iwl4965_txq_agg_disable,
2305         .rx_handler_setup = iwl4965_rx_handler_setup,
2306         .setup_deferred_work = iwl4965_setup_deferred_work,
2307         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2308         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2309         .alive_notify = iwl4965_alive_notify,
2310         .init_alive_start = iwl4965_init_alive_start,
2311         .load_ucode = iwl4965_load_bsm,
2312         .apm_ops = {
2313                 .init = iwl4965_apm_init,
2314                 .reset = iwl4965_apm_reset,
2315                 .stop = iwl4965_apm_stop,
2316                 .config = iwl4965_nic_config,
2317                 .set_pwr_src = iwl_set_pwr_src,
2318         },
2319         .eeprom_ops = {
2320                 .regulatory_bands = {
2321                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2322                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2323                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2324                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2325                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2326                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2327                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2328                 },
2329                 .verify_signature  = iwlcore_eeprom_verify_signature,
2330                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2331                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2332                 .calib_version = iwl4965_eeprom_calib_version,
2333                 .query_addr = iwlcore_eeprom_query_addr,
2334         },
2335         .send_tx_power  = iwl4965_send_tx_power,
2336         .update_chain_flags = iwl_update_chain_flags,
2337         .temperature = iwl4965_temperature_calib,
2338 };
2339
2340 static struct iwl_ops iwl4965_ops = {
2341         .lib = &iwl4965_lib,
2342         .hcmd = &iwl4965_hcmd,
2343         .utils = &iwl4965_hcmd_utils,
2344 };
2345
2346 struct iwl_cfg iwl4965_agn_cfg = {
2347         .name = "4965AGN",
2348         .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
2349         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2350         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2351         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2352         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2353         .ops = &iwl4965_ops,
2354         .mod_params = &iwl4965_mod_params,
2355 };
2356
2357 /* Module firmware */
2358 MODULE_FIRMWARE("iwlwifi-4965" IWL4965_UCODE_API ".ucode");
2359
2360 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2361 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2362 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2363 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2364 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2365 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2366 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
2367 MODULE_PARM_DESC(debug, "debug output mask");
2368 module_param_named(
2369         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2370 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2371
2372 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2373 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2374 /* QoS */
2375 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
2376 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
2377 /* 11n */
2378 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2379 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2380 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2381 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2382
2383 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2384 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");