]> git.karo-electronics.de Git - mv-sheeva.git/blob - drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
iwlagn: remove knowledge of ucode image location from upper layers
[mv-sheeva.git] / drivers / net / wireless / iwlwifi / iwl-agn-ucode.c
1 /******************************************************************************
2  *
3  * GPL LICENSE SUMMARY
4  *
5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of version 2 of the GNU General Public License as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19  * USA
20  *
21  * The full GNU General Public License is included in this distribution
22  * in the file called LICENSE.GPL.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/sched.h>
34
35 #include "iwl-dev.h"
36 #include "iwl-core.h"
37 #include "iwl-io.h"
38 #include "iwl-agn-hw.h"
39 #include "iwl-agn.h"
40 #include "iwl-agn-calib.h"
41 #include "iwl-trans.h"
42 #include "iwl-fh.h"
43
44 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
45         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
46          0, COEX_UNASSOC_IDLE_FLAGS},
47         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
48          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
49         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
50          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
51         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
52          0, COEX_CALIBRATION_FLAGS},
53         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
54          0, COEX_PERIODIC_CALIBRATION_FLAGS},
55         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
56          0, COEX_CONNECTION_ESTAB_FLAGS},
57         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
58          0, COEX_ASSOCIATED_IDLE_FLAGS},
59         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
60          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
61         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
62          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
63         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
64          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
65         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
66         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
67         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
68          0, COEX_STAND_ALONE_DEBUG_FLAGS},
69         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
70          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
71         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
72         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
73 };
74
75 /*
76  * ucode
77  */
78 static int iwlagn_load_section(struct iwl_trans *trans, const char *name,
79                                 struct fw_desc *image, u32 dst_addr)
80 {
81         struct iwl_bus *bus = bus(trans);
82         dma_addr_t phy_addr = image->p_addr;
83         u32 byte_cnt = image->len;
84         int ret;
85
86         trans->ucode_write_complete = 0;
87
88         iwl_write_direct32(bus,
89                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
90                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
91
92         iwl_write_direct32(bus,
93                 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
94
95         iwl_write_direct32(bus,
96                 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
97                 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
98
99         iwl_write_direct32(bus,
100                 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
101                 (iwl_get_dma_hi_addr(phy_addr)
102                         << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
103
104         iwl_write_direct32(bus,
105                 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
106                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
107                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
108                 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
109
110         iwl_write_direct32(bus,
111                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
112                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE       |
113                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE    |
114                 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
115
116         IWL_DEBUG_FW(bus, "%s uCode section being loaded...\n", name);
117         ret = wait_event_timeout(trans->shrd->wait_command_queue,
118                                  trans->ucode_write_complete, 5 * HZ);
119         if (!ret) {
120                 IWL_ERR(trans, "Could not load the %s uCode section\n",
121                         name);
122                 return -ETIMEDOUT;
123         }
124
125         return 0;
126 }
127
128 static inline struct fw_img *iwl_get_ucode_image(struct iwl_priv *priv,
129                                         enum iwlagn_ucode_type ucode_type)
130 {
131         switch (ucode_type) {
132         case IWL_UCODE_INIT:
133                 return &priv->ucode_init;
134         case IWL_UCODE_WOWLAN:
135                 return &priv->ucode_wowlan;
136         case IWL_UCODE_REGULAR:
137                 return &priv->ucode_rt;
138         case IWL_UCODE_NONE:
139                 break;
140         }
141         return NULL;
142 }
143
144 static int iwlagn_load_given_ucode(struct iwl_priv *priv,
145                                    struct fw_img *image)
146 {
147         int ret = 0;
148
149         ret = iwlagn_load_section(trans(priv), "INST", &image->code,
150                                    IWLAGN_RTC_INST_LOWER_BOUND);
151         if (ret)
152                 return ret;
153
154         return iwlagn_load_section(trans(priv), "DATA", &image->data,
155                                     IWLAGN_RTC_DATA_LOWER_BOUND);
156 }
157
158 /*
159  *  Calibration
160  */
161 static int iwlagn_set_Xtal_calib(struct iwl_priv *priv)
162 {
163         struct iwl_calib_xtal_freq_cmd cmd;
164         __le16 *xtal_calib =
165                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL);
166
167         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
168         cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
169         cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
170         return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
171                              (u8 *)&cmd, sizeof(cmd));
172 }
173
174 static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
175 {
176         struct iwl_calib_temperature_offset_cmd cmd;
177         __le16 *offset_calib =
178                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
179
180         memset(&cmd, 0, sizeof(cmd));
181         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
182         memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib));
183         if (!(cmd.radio_sensor_offset))
184                 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
185
186         IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
187                         le16_to_cpu(cmd.radio_sensor_offset));
188         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
189                              (u8 *)&cmd, sizeof(cmd));
190 }
191
192 static int iwlagn_set_temperature_offset_calib_v2(struct iwl_priv *priv)
193 {
194         struct iwl_calib_temperature_offset_v2_cmd cmd;
195         __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv,
196                                      EEPROM_KELVIN_TEMPERATURE);
197         __le16 *offset_calib_low =
198                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
199         struct iwl_eeprom_calib_hdr *hdr;
200
201         memset(&cmd, 0, sizeof(cmd));
202         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
203         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
204                                                         EEPROM_CALIB_ALL);
205         memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
206                 sizeof(*offset_calib_high));
207         memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
208                 sizeof(*offset_calib_low));
209         if (!(cmd.radio_sensor_offset_low)) {
210                 IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n");
211                 cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
212                 cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
213         }
214         memcpy(&cmd.burntVoltageRef, &hdr->voltage,
215                 sizeof(hdr->voltage));
216
217         IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n",
218                         le16_to_cpu(cmd.radio_sensor_offset_high));
219         IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n",
220                         le16_to_cpu(cmd.radio_sensor_offset_low));
221         IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n",
222                         le16_to_cpu(cmd.burntVoltageRef));
223
224         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
225                              (u8 *)&cmd, sizeof(cmd));
226 }
227
228 static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
229 {
230         struct iwl_calib_cfg_cmd calib_cfg_cmd;
231         struct iwl_host_cmd cmd = {
232                 .id = CALIBRATION_CFG_CMD,
233                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
234                 .data = { &calib_cfg_cmd, },
235         };
236
237         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
238         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
239         calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
240         calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
241         calib_cfg_cmd.ucd_calib_cfg.flags =
242                 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
243
244         return iwl_trans_send_cmd(trans(priv), &cmd);
245 }
246
247 int iwlagn_rx_calib_result(struct iwl_priv *priv,
248                             struct iwl_rx_mem_buffer *rxb,
249                             struct iwl_device_cmd *cmd)
250 {
251         struct iwl_rx_packet *pkt = rxb_addr(rxb);
252         struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
253         int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
254         int index;
255
256         /* reduce the size of the length field itself */
257         len -= 4;
258
259         /* Define the order in which the results will be sent to the runtime
260          * uCode. iwl_send_calib_results sends them in a row according to
261          * their index. We sort them here
262          */
263         switch (hdr->op_code) {
264         case IWL_PHY_CALIBRATE_DC_CMD:
265                 index = IWL_CALIB_DC;
266                 break;
267         case IWL_PHY_CALIBRATE_LO_CMD:
268                 index = IWL_CALIB_LO;
269                 break;
270         case IWL_PHY_CALIBRATE_TX_IQ_CMD:
271                 index = IWL_CALIB_TX_IQ;
272                 break;
273         case IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD:
274                 index = IWL_CALIB_TX_IQ_PERD;
275                 break;
276         case IWL_PHY_CALIBRATE_BASE_BAND_CMD:
277                 index = IWL_CALIB_BASE_BAND;
278                 break;
279         default:
280                 IWL_ERR(priv, "Unknown calibration notification %d\n",
281                           hdr->op_code);
282                 return -1;
283         }
284         iwl_calib_set(&priv->calib_results[index], pkt->u.raw, len);
285         return 0;
286 }
287
288 int iwlagn_init_alive_start(struct iwl_priv *priv)
289 {
290         int ret;
291
292         if (priv->cfg->bt_params &&
293             priv->cfg->bt_params->advanced_bt_coexist) {
294                 /*
295                  * Tell uCode we are ready to perform calibration
296                  * need to perform this before any calibration
297                  * no need to close the envlope since we are going
298                  * to load the runtime uCode later.
299                  */
300                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
301                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
302                 if (ret)
303                         return ret;
304
305         }
306
307         ret = iwlagn_send_calib_cfg(priv);
308         if (ret)
309                 return ret;
310
311         /**
312          * temperature offset calibration is only needed for runtime ucode,
313          * so prepare the value now.
314          */
315         if (priv->cfg->need_temp_offset_calib) {
316                 if (priv->cfg->temp_offset_v2)
317                         return iwlagn_set_temperature_offset_calib_v2(priv);
318                 else
319                         return iwlagn_set_temperature_offset_calib(priv);
320         }
321
322         return 0;
323 }
324
325 static int iwlagn_send_wimax_coex(struct iwl_priv *priv)
326 {
327         struct iwl_wimax_coex_cmd coex_cmd;
328
329         if (priv->cfg->base_params->support_wimax_coexist) {
330                 /* UnMask wake up src at associated sleep */
331                 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
332
333                 /* UnMask wake up src at unassociated sleep */
334                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
335                 memcpy(coex_cmd.sta_prio, cu_priorities,
336                         sizeof(struct iwl_wimax_coex_event_entry) *
337                          COEX_NUM_OF_EVENTS);
338
339                 /* enabling the coexistence feature */
340                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
341
342                 /* enabling the priorities tables */
343                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
344         } else {
345                 /* coexistence is disabled */
346                 memset(&coex_cmd, 0, sizeof(coex_cmd));
347         }
348         return iwl_trans_send_cmd_pdu(trans(priv),
349                                 COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
350                                 sizeof(coex_cmd), &coex_cmd);
351 }
352
353 static const u8 iwlagn_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
354         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
355                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
356         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
357                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
358         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
359                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
360         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
361                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
362         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
363                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
364         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
365                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
366         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
367                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
368         ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
369                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
370         ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
371                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
372         0, 0, 0, 0, 0, 0, 0
373 };
374
375 void iwlagn_send_prio_tbl(struct iwl_priv *priv)
376 {
377         struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
378
379         memcpy(prio_tbl_cmd.prio_tbl, iwlagn_bt_prio_tbl,
380                 sizeof(iwlagn_bt_prio_tbl));
381         if (iwl_trans_send_cmd_pdu(trans(priv),
382                                 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
383                                 sizeof(prio_tbl_cmd), &prio_tbl_cmd))
384                 IWL_ERR(priv, "failed to send BT prio tbl command\n");
385 }
386
387 int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
388 {
389         struct iwl_bt_coex_prot_env_cmd env_cmd;
390         int ret;
391
392         env_cmd.action = action;
393         env_cmd.type = type;
394         ret = iwl_trans_send_cmd_pdu(trans(priv),
395                                REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
396                                sizeof(env_cmd), &env_cmd);
397         if (ret)
398                 IWL_ERR(priv, "failed to send BT env command\n");
399         return ret;
400 }
401
402
403 static int iwlagn_alive_notify(struct iwl_priv *priv)
404 {
405         struct iwl_rxon_context *ctx;
406         int ret;
407
408         if (!priv->tx_cmd_pool)
409                 priv->tx_cmd_pool =
410                         kmem_cache_create("iwlagn_dev_cmd",
411                                           sizeof(struct iwl_device_cmd),
412                                           sizeof(void *), 0, NULL);
413
414         if (!priv->tx_cmd_pool)
415                 return -ENOMEM;
416
417         iwl_trans_tx_start(trans(priv));
418         for_each_context(priv, ctx)
419                 ctx->last_tx_rejected = false;
420
421         ret = iwlagn_send_wimax_coex(priv);
422         if (ret)
423                 return ret;
424
425         ret = iwlagn_set_Xtal_calib(priv);
426         if (ret)
427                 return ret;
428
429         return iwl_send_calib_results(priv);
430 }
431
432
433 /**
434  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
435  *   using sample data 100 bytes apart.  If these sample points are good,
436  *   it's a pretty good bet that everything between them is good, too.
437  */
438 static int iwl_verify_inst_sparse(struct iwl_priv *priv,
439                                       struct fw_desc *fw_desc)
440 {
441         __le32 *image = (__le32 *)fw_desc->v_addr;
442         u32 len = fw_desc->len;
443         u32 val;
444         u32 i;
445
446         IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
447
448         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
449                 /* read data comes through single port, auto-incr addr */
450                 /* NOTE: Use the debugless read so we don't flood kernel log
451                  * if IWL_DL_IO is set */
452                 iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
453                         i + IWLAGN_RTC_INST_LOWER_BOUND);
454                 val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
455                 if (val != le32_to_cpu(*image))
456                         return -EIO;
457         }
458
459         return 0;
460 }
461
462 static void iwl_print_mismatch_inst(struct iwl_priv *priv,
463                                     struct fw_desc *fw_desc)
464 {
465         __le32 *image = (__le32 *)fw_desc->v_addr;
466         u32 len = fw_desc->len;
467         u32 val;
468         u32 offs;
469         int errors = 0;
470
471         IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
472
473         iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
474                            IWLAGN_RTC_INST_LOWER_BOUND);
475
476         for (offs = 0;
477              offs < len && errors < 20;
478              offs += sizeof(u32), image++) {
479                 /* read data comes through single port, auto-incr addr */
480                 val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
481                 if (val != le32_to_cpu(*image)) {
482                         IWL_ERR(priv, "uCode INST section at "
483                                 "offset 0x%x, is 0x%x, s/b 0x%x\n",
484                                 offs, val, le32_to_cpu(*image));
485                         errors++;
486                 }
487         }
488 }
489
490 /**
491  * iwl_verify_ucode - determine which instruction image is in SRAM,
492  *    and verify its contents
493  */
494 static int iwl_verify_ucode(struct iwl_priv *priv, struct fw_img *img)
495 {
496         if (!iwl_verify_inst_sparse(priv, &img->code)) {
497                 IWL_DEBUG_FW(priv, "uCode is good in inst SRAM\n");
498                 return 0;
499         }
500
501         IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
502
503         iwl_print_mismatch_inst(priv, &img->code);
504         return -EIO;
505 }
506
507 struct iwlagn_alive_data {
508         bool valid;
509         u8 subtype;
510 };
511
512 static void iwlagn_alive_fn(struct iwl_priv *priv,
513                             struct iwl_rx_packet *pkt,
514                             void *data)
515 {
516         struct iwlagn_alive_data *alive_data = data;
517         struct iwl_alive_resp *palive;
518
519         palive = &pkt->u.alive_frame;
520
521         IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision "
522                        "0x%01X 0x%01X\n",
523                        palive->is_valid, palive->ver_type,
524                        palive->ver_subtype);
525
526         priv->device_pointers.error_event_table =
527                 le32_to_cpu(palive->error_event_table_ptr);
528         priv->device_pointers.log_event_table =
529                 le32_to_cpu(palive->log_event_table_ptr);
530
531         alive_data->subtype = palive->ver_subtype;
532         alive_data->valid = palive->is_valid == UCODE_VALID_OK;
533 }
534
535 #define UCODE_ALIVE_TIMEOUT     HZ
536 #define UCODE_CALIB_TIMEOUT     (2*HZ)
537
538 int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
539                                  enum iwlagn_ucode_type ucode_type)
540 {
541         struct iwl_notification_wait alive_wait;
542         struct iwlagn_alive_data alive_data;
543         int ret;
544         enum iwlagn_ucode_type old_type;
545         struct fw_img *image = iwl_get_ucode_image(priv, ucode_type);
546
547         if (!image) {
548                 IWL_ERR(priv, "Invalid ucode requested (%d)\n", ucode_type);
549                 return -EINVAL;
550         }
551
552         ret = iwl_trans_start_device(trans(priv));
553         if (ret)
554                 return ret;
555
556         iwlagn_init_notification_wait(priv, &alive_wait, REPLY_ALIVE,
557                                       iwlagn_alive_fn, &alive_data);
558
559         old_type = priv->ucode_type;
560         priv->ucode_type = ucode_type;
561
562         ret = iwlagn_load_given_ucode(priv, image);
563         if (ret) {
564                 priv->ucode_type = old_type;
565                 iwlagn_remove_notification(priv, &alive_wait);
566                 return ret;
567         }
568
569         iwl_trans_kick_nic(trans(priv));
570
571         /*
572          * Some things may run in the background now, but we
573          * just wait for the ALIVE notification here.
574          */
575         ret = iwlagn_wait_notification(priv, &alive_wait, UCODE_ALIVE_TIMEOUT);
576         if (ret) {
577                 priv->ucode_type = old_type;
578                 return ret;
579         }
580
581         if (!alive_data.valid) {
582                 IWL_ERR(priv, "Loaded ucode is not valid!\n");
583                 priv->ucode_type = old_type;
584                 return -EIO;
585         }
586
587         /*
588          * This step takes a long time (60-80ms!!) and
589          * WoWLAN image should be loaded quickly, so
590          * skip it for WoWLAN.
591          */
592         if (ucode_type != IWL_UCODE_WOWLAN) {
593                 ret = iwl_verify_ucode(priv, image);
594                 if (ret) {
595                         priv->ucode_type = old_type;
596                         return ret;
597                 }
598
599                 /* delay a bit to give rfkill time to run */
600                 msleep(5);
601         }
602
603         ret = iwlagn_alive_notify(priv);
604         if (ret) {
605                 IWL_WARN(priv,
606                         "Could not complete ALIVE transition: %d\n", ret);
607                 priv->ucode_type = old_type;
608                 return ret;
609         }
610
611         return 0;
612 }
613
614 int iwlagn_run_init_ucode(struct iwl_priv *priv)
615 {
616         struct iwl_notification_wait calib_wait;
617         int ret;
618
619         lockdep_assert_held(&priv->shrd->mutex);
620
621         /* No init ucode required? Curious, but maybe ok */
622         if (!priv->ucode_init.code.len)
623                 return 0;
624
625         if (priv->ucode_type != IWL_UCODE_NONE)
626                 return 0;
627
628         iwlagn_init_notification_wait(priv, &calib_wait,
629                                       CALIBRATION_COMPLETE_NOTIFICATION,
630                                       NULL, NULL);
631
632         /* Will also start the device */
633         ret = iwlagn_load_ucode_wait_alive(priv, IWL_UCODE_INIT);
634         if (ret)
635                 goto error;
636
637         ret = iwlagn_init_alive_start(priv);
638         if (ret)
639                 goto error;
640
641         /*
642          * Some things may run in the background now, but we
643          * just wait for the calibration complete notification.
644          */
645         ret = iwlagn_wait_notification(priv, &calib_wait, UCODE_CALIB_TIMEOUT);
646
647         goto out;
648
649  error:
650         iwlagn_remove_notification(priv, &calib_wait);
651  out:
652         /* Whatever happened, stop the device */
653         iwl_trans_stop_device(trans(priv));
654         return ret;
655 }