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iwlagn: move ucode files out of the iwl_priv structure
[karo-tx-linux.git] / drivers / net / wireless / iwlwifi / iwl-agn-ucode.c
1 /******************************************************************************
2  *
3  * GPL LICENSE SUMMARY
4  *
5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of version 2 of the GNU General Public License as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19  * USA
20  *
21  * The full GNU General Public License is included in this distribution
22  * in the file called LICENSE.GPL.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/sched.h>
34 #include <linux/dma-mapping.h>
35
36 #include "iwl-dev.h"
37 #include "iwl-core.h"
38 #include "iwl-io.h"
39 #include "iwl-agn-hw.h"
40 #include "iwl-agn.h"
41 #include "iwl-agn-calib.h"
42 #include "iwl-trans.h"
43 #include "iwl-fh.h"
44
45 static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
46         {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
47          0, COEX_UNASSOC_IDLE_FLAGS},
48         {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
49          0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
50         {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
51          0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
52         {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
53          0, COEX_CALIBRATION_FLAGS},
54         {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
55          0, COEX_PERIODIC_CALIBRATION_FLAGS},
56         {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
57          0, COEX_CONNECTION_ESTAB_FLAGS},
58         {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
59          0, COEX_ASSOCIATED_IDLE_FLAGS},
60         {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
61          0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
62         {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
63          0, COEX_ASSOC_AUTO_SCAN_FLAGS},
64         {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
65          0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
66         {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
67         {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
68         {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
69          0, COEX_STAND_ALONE_DEBUG_FLAGS},
70         {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
71          0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
72         {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
73         {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
74 };
75
76 /******************************************************************************
77  *
78  * uCode download functions
79  *
80  ******************************************************************************/
81
82 static void iwl_free_fw_desc(struct iwl_bus *bus, struct fw_desc *desc)
83 {
84         if (desc->v_addr)
85                 dma_free_coherent(bus->dev, desc->len,
86                                   desc->v_addr, desc->p_addr);
87         desc->v_addr = NULL;
88         desc->len = 0;
89 }
90
91 static void iwl_free_fw_img(struct iwl_bus *bus, struct fw_img *img)
92 {
93         iwl_free_fw_desc(bus, &img->code);
94         iwl_free_fw_desc(bus, &img->data);
95 }
96
97 void iwl_dealloc_ucode(struct iwl_trans *trans)
98 {
99         iwl_free_fw_img(bus(trans), &trans->ucode_rt);
100         iwl_free_fw_img(bus(trans), &trans->ucode_init);
101         iwl_free_fw_img(bus(trans), &trans->ucode_wowlan);
102 }
103
104 int iwl_alloc_fw_desc(struct iwl_bus *bus, struct fw_desc *desc,
105                       const void *data, size_t len)
106 {
107         if (!len) {
108                 desc->v_addr = NULL;
109                 return -EINVAL;
110         }
111
112         desc->v_addr = dma_alloc_coherent(bus->dev, len,
113                                           &desc->p_addr, GFP_KERNEL);
114         if (!desc->v_addr)
115                 return -ENOMEM;
116
117         desc->len = len;
118         memcpy(desc->v_addr, data, len);
119         return 0;
120 }
121
122 /*
123  * ucode
124  */
125 static int iwlagn_load_section(struct iwl_trans *trans, const char *name,
126                                 struct fw_desc *image, u32 dst_addr)
127 {
128         struct iwl_bus *bus = bus(trans);
129         dma_addr_t phy_addr = image->p_addr;
130         u32 byte_cnt = image->len;
131         int ret;
132
133         trans->ucode_write_complete = 0;
134
135         iwl_write_direct32(bus,
136                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
137                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
138
139         iwl_write_direct32(bus,
140                 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
141
142         iwl_write_direct32(bus,
143                 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
144                 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
145
146         iwl_write_direct32(bus,
147                 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
148                 (iwl_get_dma_hi_addr(phy_addr)
149                         << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
150
151         iwl_write_direct32(bus,
152                 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
153                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
154                 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
155                 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
156
157         iwl_write_direct32(bus,
158                 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
159                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE       |
160                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE    |
161                 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
162
163         IWL_DEBUG_FW(bus, "%s uCode section being loaded...\n", name);
164         ret = wait_event_timeout(trans->shrd->wait_command_queue,
165                                  trans->ucode_write_complete, 5 * HZ);
166         if (!ret) {
167                 IWL_ERR(trans, "Could not load the %s uCode section\n",
168                         name);
169                 return -ETIMEDOUT;
170         }
171
172         return 0;
173 }
174
175 static inline struct fw_img *iwl_get_ucode_image(struct iwl_trans *trans,
176                                         enum iwl_ucode_type ucode_type)
177 {
178         switch (ucode_type) {
179         case IWL_UCODE_INIT:
180                 return &trans->ucode_init;
181         case IWL_UCODE_WOWLAN:
182                 return &trans->ucode_wowlan;
183         case IWL_UCODE_REGULAR:
184                 return &trans->ucode_rt;
185         case IWL_UCODE_NONE:
186                 break;
187         }
188         return NULL;
189 }
190
191 static int iwlagn_load_given_ucode(struct iwl_trans *trans,
192                                    enum iwl_ucode_type ucode_type)
193 {
194         int ret = 0;
195         struct fw_img *image = iwl_get_ucode_image(trans, ucode_type);
196
197
198         if (!image) {
199                 IWL_ERR(trans, "Invalid ucode requested (%d)\n",
200                         ucode_type);
201                 return -EINVAL;
202         }
203
204         ret = iwlagn_load_section(trans, "INST", &image->code,
205                                    IWLAGN_RTC_INST_LOWER_BOUND);
206         if (ret)
207                 return ret;
208
209         return iwlagn_load_section(trans, "DATA", &image->data,
210                                     IWLAGN_RTC_DATA_LOWER_BOUND);
211 }
212
213 /*
214  *  Calibration
215  */
216 static int iwlagn_set_Xtal_calib(struct iwl_priv *priv)
217 {
218         struct iwl_calib_xtal_freq_cmd cmd;
219         __le16 *xtal_calib =
220                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL);
221
222         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
223         cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
224         cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
225         return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
226                              (u8 *)&cmd, sizeof(cmd));
227 }
228
229 static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
230 {
231         struct iwl_calib_temperature_offset_cmd cmd;
232         __le16 *offset_calib =
233                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
234
235         memset(&cmd, 0, sizeof(cmd));
236         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
237         memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib));
238         if (!(cmd.radio_sensor_offset))
239                 cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
240
241         IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
242                         le16_to_cpu(cmd.radio_sensor_offset));
243         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
244                              (u8 *)&cmd, sizeof(cmd));
245 }
246
247 static int iwlagn_set_temperature_offset_calib_v2(struct iwl_priv *priv)
248 {
249         struct iwl_calib_temperature_offset_v2_cmd cmd;
250         __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv,
251                                      EEPROM_KELVIN_TEMPERATURE);
252         __le16 *offset_calib_low =
253                 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
254         struct iwl_eeprom_calib_hdr *hdr;
255
256         memset(&cmd, 0, sizeof(cmd));
257         iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
258         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
259                                                         EEPROM_CALIB_ALL);
260         memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
261                 sizeof(*offset_calib_high));
262         memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
263                 sizeof(*offset_calib_low));
264         if (!(cmd.radio_sensor_offset_low)) {
265                 IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n");
266                 cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
267                 cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
268         }
269         memcpy(&cmd.burntVoltageRef, &hdr->voltage,
270                 sizeof(hdr->voltage));
271
272         IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n",
273                         le16_to_cpu(cmd.radio_sensor_offset_high));
274         IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n",
275                         le16_to_cpu(cmd.radio_sensor_offset_low));
276         IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n",
277                         le16_to_cpu(cmd.burntVoltageRef));
278
279         return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
280                              (u8 *)&cmd, sizeof(cmd));
281 }
282
283 static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
284 {
285         struct iwl_calib_cfg_cmd calib_cfg_cmd;
286         struct iwl_host_cmd cmd = {
287                 .id = CALIBRATION_CFG_CMD,
288                 .len = { sizeof(struct iwl_calib_cfg_cmd), },
289                 .data = { &calib_cfg_cmd, },
290         };
291
292         memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
293         calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
294         calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
295         calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
296         calib_cfg_cmd.ucd_calib_cfg.flags =
297                 IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
298
299         return iwl_trans_send_cmd(trans(priv), &cmd);
300 }
301
302 int iwlagn_rx_calib_result(struct iwl_priv *priv,
303                             struct iwl_rx_mem_buffer *rxb,
304                             struct iwl_device_cmd *cmd)
305 {
306         struct iwl_rx_packet *pkt = rxb_addr(rxb);
307         struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
308         int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
309         int index;
310
311         /* reduce the size of the length field itself */
312         len -= 4;
313
314         /* Define the order in which the results will be sent to the runtime
315          * uCode. iwl_send_calib_results sends them in a row according to
316          * their index. We sort them here
317          */
318         switch (hdr->op_code) {
319         case IWL_PHY_CALIBRATE_DC_CMD:
320                 index = IWL_CALIB_DC;
321                 break;
322         case IWL_PHY_CALIBRATE_LO_CMD:
323                 index = IWL_CALIB_LO;
324                 break;
325         case IWL_PHY_CALIBRATE_TX_IQ_CMD:
326                 index = IWL_CALIB_TX_IQ;
327                 break;
328         case IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD:
329                 index = IWL_CALIB_TX_IQ_PERD;
330                 break;
331         case IWL_PHY_CALIBRATE_BASE_BAND_CMD:
332                 index = IWL_CALIB_BASE_BAND;
333                 break;
334         default:
335                 IWL_ERR(priv, "Unknown calibration notification %d\n",
336                           hdr->op_code);
337                 return -1;
338         }
339         iwl_calib_set(&priv->calib_results[index], pkt->u.raw, len);
340         return 0;
341 }
342
343 int iwlagn_init_alive_start(struct iwl_priv *priv)
344 {
345         int ret;
346
347         if (priv->cfg->bt_params &&
348             priv->cfg->bt_params->advanced_bt_coexist) {
349                 /*
350                  * Tell uCode we are ready to perform calibration
351                  * need to perform this before any calibration
352                  * no need to close the envlope since we are going
353                  * to load the runtime uCode later.
354                  */
355                 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
356                         BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
357                 if (ret)
358                         return ret;
359
360         }
361
362         ret = iwlagn_send_calib_cfg(priv);
363         if (ret)
364                 return ret;
365
366         /**
367          * temperature offset calibration is only needed for runtime ucode,
368          * so prepare the value now.
369          */
370         if (priv->cfg->need_temp_offset_calib) {
371                 if (priv->cfg->temp_offset_v2)
372                         return iwlagn_set_temperature_offset_calib_v2(priv);
373                 else
374                         return iwlagn_set_temperature_offset_calib(priv);
375         }
376
377         return 0;
378 }
379
380 static int iwlagn_send_wimax_coex(struct iwl_priv *priv)
381 {
382         struct iwl_wimax_coex_cmd coex_cmd;
383
384         if (priv->cfg->base_params->support_wimax_coexist) {
385                 /* UnMask wake up src at associated sleep */
386                 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
387
388                 /* UnMask wake up src at unassociated sleep */
389                 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
390                 memcpy(coex_cmd.sta_prio, cu_priorities,
391                         sizeof(struct iwl_wimax_coex_event_entry) *
392                          COEX_NUM_OF_EVENTS);
393
394                 /* enabling the coexistence feature */
395                 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
396
397                 /* enabling the priorities tables */
398                 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
399         } else {
400                 /* coexistence is disabled */
401                 memset(&coex_cmd, 0, sizeof(coex_cmd));
402         }
403         return iwl_trans_send_cmd_pdu(trans(priv),
404                                 COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
405                                 sizeof(coex_cmd), &coex_cmd);
406 }
407
408 static const u8 iwlagn_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
409         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
410                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
411         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
412                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
413         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
414                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
415         ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
416                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
417         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
418                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
419         ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
420                 (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
421         ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
422                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
423         ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
424                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
425         ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
426                 (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
427         0, 0, 0, 0, 0, 0, 0
428 };
429
430 void iwlagn_send_prio_tbl(struct iwl_priv *priv)
431 {
432         struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
433
434         memcpy(prio_tbl_cmd.prio_tbl, iwlagn_bt_prio_tbl,
435                 sizeof(iwlagn_bt_prio_tbl));
436         if (iwl_trans_send_cmd_pdu(trans(priv),
437                                 REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
438                                 sizeof(prio_tbl_cmd), &prio_tbl_cmd))
439                 IWL_ERR(priv, "failed to send BT prio tbl command\n");
440 }
441
442 int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
443 {
444         struct iwl_bt_coex_prot_env_cmd env_cmd;
445         int ret;
446
447         env_cmd.action = action;
448         env_cmd.type = type;
449         ret = iwl_trans_send_cmd_pdu(trans(priv),
450                                REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
451                                sizeof(env_cmd), &env_cmd);
452         if (ret)
453                 IWL_ERR(priv, "failed to send BT env command\n");
454         return ret;
455 }
456
457
458 static int iwlagn_alive_notify(struct iwl_priv *priv)
459 {
460         struct iwl_rxon_context *ctx;
461         int ret;
462
463         if (!priv->tx_cmd_pool)
464                 priv->tx_cmd_pool =
465                         kmem_cache_create("iwlagn_dev_cmd",
466                                           sizeof(struct iwl_device_cmd),
467                                           sizeof(void *), 0, NULL);
468
469         if (!priv->tx_cmd_pool)
470                 return -ENOMEM;
471
472         iwl_trans_tx_start(trans(priv));
473         for_each_context(priv, ctx)
474                 ctx->last_tx_rejected = false;
475
476         ret = iwlagn_send_wimax_coex(priv);
477         if (ret)
478                 return ret;
479
480         ret = iwlagn_set_Xtal_calib(priv);
481         if (ret)
482                 return ret;
483
484         return iwl_send_calib_results(priv);
485 }
486
487
488 /**
489  * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
490  *   using sample data 100 bytes apart.  If these sample points are good,
491  *   it's a pretty good bet that everything between them is good, too.
492  */
493 static int iwl_verify_inst_sparse(struct iwl_bus *bus,
494                                       struct fw_desc *fw_desc)
495 {
496         __le32 *image = (__le32 *)fw_desc->v_addr;
497         u32 len = fw_desc->len;
498         u32 val;
499         u32 i;
500
501         IWL_DEBUG_FW(bus, "ucode inst image size is %u\n", len);
502
503         for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
504                 /* read data comes through single port, auto-incr addr */
505                 /* NOTE: Use the debugless read so we don't flood kernel log
506                  * if IWL_DL_IO is set */
507                 iwl_write_direct32(bus, HBUS_TARG_MEM_RADDR,
508                         i + IWLAGN_RTC_INST_LOWER_BOUND);
509                 val = iwl_read32(bus, HBUS_TARG_MEM_RDAT);
510                 if (val != le32_to_cpu(*image))
511                         return -EIO;
512         }
513
514         return 0;
515 }
516
517 static void iwl_print_mismatch_inst(struct iwl_bus *bus,
518                                     struct fw_desc *fw_desc)
519 {
520         __le32 *image = (__le32 *)fw_desc->v_addr;
521         u32 len = fw_desc->len;
522         u32 val;
523         u32 offs;
524         int errors = 0;
525
526         IWL_DEBUG_FW(bus, "ucode inst image size is %u\n", len);
527
528         iwl_write_direct32(bus, HBUS_TARG_MEM_RADDR,
529                            IWLAGN_RTC_INST_LOWER_BOUND);
530
531         for (offs = 0;
532              offs < len && errors < 20;
533              offs += sizeof(u32), image++) {
534                 /* read data comes through single port, auto-incr addr */
535                 val = iwl_read32(bus, HBUS_TARG_MEM_RDAT);
536                 if (val != le32_to_cpu(*image)) {
537                         IWL_ERR(bus, "uCode INST section at "
538                                 "offset 0x%x, is 0x%x, s/b 0x%x\n",
539                                 offs, val, le32_to_cpu(*image));
540                         errors++;
541                 }
542         }
543 }
544
545 /**
546  * iwl_verify_ucode - determine which instruction image is in SRAM,
547  *    and verify its contents
548  */
549 static int iwl_verify_ucode(struct iwl_trans *trans,
550                             enum iwl_ucode_type ucode_type)
551 {
552         struct fw_img *img = iwl_get_ucode_image(trans, ucode_type);
553
554         if (!img) {
555                 IWL_ERR(trans, "Invalid ucode requested (%d)\n", ucode_type);
556                 return -EINVAL;
557         }
558
559         if (!iwl_verify_inst_sparse(bus(trans), &img->code)) {
560                 IWL_DEBUG_FW(trans, "uCode is good in inst SRAM\n");
561                 return 0;
562         }
563
564         IWL_ERR(trans, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
565
566         iwl_print_mismatch_inst(bus(trans), &img->code);
567         return -EIO;
568 }
569
570 struct iwlagn_alive_data {
571         bool valid;
572         u8 subtype;
573 };
574
575 static void iwlagn_alive_fn(struct iwl_priv *priv,
576                             struct iwl_rx_packet *pkt,
577                             void *data)
578 {
579         struct iwlagn_alive_data *alive_data = data;
580         struct iwl_alive_resp *palive;
581
582         palive = &pkt->u.alive_frame;
583
584         IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision "
585                        "0x%01X 0x%01X\n",
586                        palive->is_valid, palive->ver_type,
587                        palive->ver_subtype);
588
589         priv->device_pointers.error_event_table =
590                 le32_to_cpu(palive->error_event_table_ptr);
591         priv->device_pointers.log_event_table =
592                 le32_to_cpu(palive->log_event_table_ptr);
593
594         alive_data->subtype = palive->ver_subtype;
595         alive_data->valid = palive->is_valid == UCODE_VALID_OK;
596 }
597
598 #define UCODE_ALIVE_TIMEOUT     HZ
599 #define UCODE_CALIB_TIMEOUT     (2*HZ)
600
601 int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
602                                  enum iwl_ucode_type ucode_type)
603 {
604         struct iwl_notification_wait alive_wait;
605         struct iwlagn_alive_data alive_data;
606         int ret;
607         enum iwl_ucode_type old_type;
608
609         ret = iwl_trans_start_device(trans(priv));
610         if (ret)
611                 return ret;
612
613         iwlagn_init_notification_wait(priv, &alive_wait, REPLY_ALIVE,
614                                       iwlagn_alive_fn, &alive_data);
615
616         old_type = priv->ucode_type;
617         priv->ucode_type = ucode_type;
618
619         ret = iwlagn_load_given_ucode(trans(priv), ucode_type);
620         if (ret) {
621                 priv->ucode_type = old_type;
622                 iwlagn_remove_notification(priv, &alive_wait);
623                 return ret;
624         }
625
626         iwl_trans_kick_nic(trans(priv));
627
628         /*
629          * Some things may run in the background now, but we
630          * just wait for the ALIVE notification here.
631          */
632         ret = iwlagn_wait_notification(priv, &alive_wait, UCODE_ALIVE_TIMEOUT);
633         if (ret) {
634                 priv->ucode_type = old_type;
635                 return ret;
636         }
637
638         if (!alive_data.valid) {
639                 IWL_ERR(priv, "Loaded ucode is not valid!\n");
640                 priv->ucode_type = old_type;
641                 return -EIO;
642         }
643
644         /*
645          * This step takes a long time (60-80ms!!) and
646          * WoWLAN image should be loaded quickly, so
647          * skip it for WoWLAN.
648          */
649         if (ucode_type != IWL_UCODE_WOWLAN) {
650                 ret = iwl_verify_ucode(trans(priv), ucode_type);
651                 if (ret) {
652                         priv->ucode_type = old_type;
653                         return ret;
654                 }
655
656                 /* delay a bit to give rfkill time to run */
657                 msleep(5);
658         }
659
660         ret = iwlagn_alive_notify(priv);
661         if (ret) {
662                 IWL_WARN(priv,
663                         "Could not complete ALIVE transition: %d\n", ret);
664                 priv->ucode_type = old_type;
665                 return ret;
666         }
667
668         return 0;
669 }
670
671 int iwlagn_run_init_ucode(struct iwl_priv *priv)
672 {
673         struct iwl_notification_wait calib_wait;
674         int ret;
675
676         lockdep_assert_held(&priv->shrd->mutex);
677
678         /* No init ucode required? Curious, but maybe ok */
679         if (!trans(priv)->ucode_init.code.len)
680                 return 0;
681
682         if (priv->ucode_type != IWL_UCODE_NONE)
683                 return 0;
684
685         iwlagn_init_notification_wait(priv, &calib_wait,
686                                       CALIBRATION_COMPLETE_NOTIFICATION,
687                                       NULL, NULL);
688
689         /* Will also start the device */
690         ret = iwlagn_load_ucode_wait_alive(priv, IWL_UCODE_INIT);
691         if (ret)
692                 goto error;
693
694         ret = iwlagn_init_alive_start(priv);
695         if (ret)
696                 goto error;
697
698         /*
699          * Some things may run in the background now, but we
700          * just wait for the calibration complete notification.
701          */
702         ret = iwlagn_wait_notification(priv, &calib_wait, UCODE_CALIB_TIMEOUT);
703
704         goto out;
705
706  error:
707         iwlagn_remove_notification(priv, &calib_wait);
708  out:
709         /* Whatever happened, stop the device */
710         iwl_trans_stop_device(trans(priv));
711         return ret;
712 }