drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/delay.h>
  36 #include <linux/sched.h>
  37 #include <linux/skbuff.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/wireless.h>
  40 #include <linux/firmware.h>
  41 #include <linux/etherdevice.h>
  42 #include <linux/if_arp.h>
  43
  44 #include <net/mac80211.h>
  45
  46 #include <asm/div64.h>
  47
  48 #define DRV_NAME        "iwlagn"
  49
  50 #include "iwl-eeprom.h"
  51 #include "iwl-dev.h"
  52 #include "iwl-core.h"
  53 #include "iwl-io.h"
  54 #include "iwl-helpers.h"
  55 #include "iwl-sta.h"
  56 #include "iwl-calib.h"
  57 #include "iwl-agn.h"
  58
  59
  60 /******************************************************************************
  61  *
  62  * module boiler plate
  63  *
  64  ******************************************************************************/
  65
  66 /*
  67  * module name, copyright, version, etc.
  68  */
  69 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  70
  71 #ifdef CONFIG_IWLWIFI_DEBUG
  72 #define VD "d"
  73 #else
  74 #define VD
  75 #endif
  76
  77 #define DRV_VERSION     IWLWIFI_VERSION VD
  78
  79
  80 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  81 MODULE_VERSION(DRV_VERSION);
  82 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  83 MODULE_LICENSE("GPL");
  84 MODULE_ALIAS("iwl4965");
  85
  86 /**
  87  * iwl_commit_rxon - commit staging_rxon to hardware
  88  *
  89  * The RXON command in staging_rxon is committed to the hardware and
  90  * the active_rxon structure is updated with the new data.  This
  91  * function correctly transitions out of the RXON_ASSOC_MSK state if
  92  * a HW tune is required based on the RXON structure changes.
  93  */
  94 int iwl_commit_rxon(struct iwl_priv *priv)
  95 {
  96         /* cast away the const for active_rxon in this function */
  97         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  98         int ret;
  99         bool new_assoc =
 100                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 101
 102         if (!iwl_is_alive(priv))
 103                 return -EBUSY;
 104
 105         /* always get timestamp with Rx frame */
 106         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 107
 108         ret = iwl_check_rxon_cmd(priv);
 109         if (ret) {
 110                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 111                 return -EINVAL;
 112         }
 113
 114         /*
 115          * receive commit_rxon request
 116          * abort any previous channel switch if still in process
 117          */
 118         if (priv->switch_rxon.switch_in_progress &&
 119             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 120                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 121                       le16_to_cpu(priv->switch_rxon.channel));
 122                 priv->switch_rxon.switch_in_progress = false;
 123         }
 124
 125         /* If we don't need to send a full RXON, we can use
 126          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 127          * and other flags for the current radio configuration. */
 128         if (!iwl_full_rxon_required(priv)) {
 129                 ret = iwl_send_rxon_assoc(priv);
 130                 if (ret) {
 131                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 132                         return ret;
 133                 }
 134
 135                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 136                 iwl_print_rx_config_cmd(priv);
 137                 return 0;
 138         }
 139
 140         /* If we are currently associated and the new config requires
 141          * an RXON_ASSOC and the new config wants the associated mask enabled,
 142          * we must clear the associated from the active configuration
 143          * before we apply the new config */
 144         if (iwl_is_associated(priv) && new_assoc) {
 145                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 146                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 147
 148                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 149                                       sizeof(struct iwl_rxon_cmd),
 150                                       &priv->active_rxon);
 151
 152                 /* If the mask clearing failed then we set
 153                  * active_rxon back to what it was previously */
 154                 if (ret) {
 155                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 156                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 157                         return ret;
 158                 }
 159                 iwl_clear_ucode_stations(priv);
 160                 iwl_restore_stations(priv);
 161                 ret = iwl_restore_default_wep_keys(priv);
 162                 if (ret) {
 163                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 164                         return ret;
 165                 }
 166         }
 167
 168         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 169                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 170                        "* channel = %d\n"
 171                        "* bssid = %pM\n",
 172                        (new_assoc ? "" : "out"),
 173                        le16_to_cpu(priv->staging_rxon.channel),
 174                        priv->staging_rxon.bssid_addr);
 175
 176         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 177
 178         /* Apply the new configuration
 179          * RXON unassoc clears the station table in uCode so restoration of
 180          * stations is needed after it (the RXON command) completes
 181          */
 182         if (!new_assoc) {
 183                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 184                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 185                 if (ret) {
 186                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 187                         return ret;
 188                 }
 189                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 190                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 191                 iwl_clear_ucode_stations(priv);
 192                 iwl_restore_stations(priv);
 193                 ret = iwl_restore_default_wep_keys(priv);
 194                 if (ret) {
 195                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 196                         return ret;
 197                 }
 198         }
 199
 200         priv->start_calib = 0;
 201         if (new_assoc) {
 202                 /*
 203                  * allow CTS-to-self if possible for new association.
 204                  * this is relevant only for 5000 series and up,
 205                  * but will not damage 4965
 206                  */
 207                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 208
 209                 /* Apply the new configuration
 210                  * RXON assoc doesn't clear the station table in uCode,
 211                  */
 212                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 213                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 214                 if (ret) {
 215                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 216                         return ret;
 217                 }
 218                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 219         }
 220         iwl_print_rx_config_cmd(priv);
 221
 222         iwl_init_sensitivity(priv);
 223
 224         /* If we issue a new RXON command which required a tune then we must
 225          * send a new TXPOWER command or we won't be able to Tx any frames */
 226         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 227         if (ret) {
 228                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 229                 return ret;
 230         }
 231
 232         return 0;
 233 }
 234
 235 void iwl_update_chain_flags(struct iwl_priv *priv)
 236 {
 237
 238         if (priv->cfg->ops->hcmd->set_rxon_chain)
 239                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 240         iwlcore_commit_rxon(priv);
 241 }
 242
 243 static void iwl_clear_free_frames(struct iwl_priv *priv)
 244 {
 245         struct list_head *element;
 246
 247         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 248                        priv->frames_count);
 249
 250         while (!list_empty(&priv->free_frames)) {
 251                 element = priv->free_frames.next;
 252                 list_del(element);
 253                 kfree(list_entry(element, struct iwl_frame, list));
 254                 priv->frames_count--;
 255         }
 256
 257         if (priv->frames_count) {
 258                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 259                             priv->frames_count);
 260                 priv->frames_count = 0;
 261         }
 262 }
 263
 264 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 265 {
 266         struct iwl_frame *frame;
 267         struct list_head *element;
 268         if (list_empty(&priv->free_frames)) {
 269                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 270                 if (!frame) {
 271                         IWL_ERR(priv, "Could not allocate frame!\n");
 272                         return NULL;
 273                 }
 274
 275                 priv->frames_count++;
 276                 return frame;
 277         }
 278
 279         element = priv->free_frames.next;
 280         list_del(element);
 281         return list_entry(element, struct iwl_frame, list);
 282 }
 283
 284 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 285 {
 286         memset(frame, 0, sizeof(*frame));
 287         list_add(&frame->list, &priv->free_frames);
 288 }
 289
 290 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 291                                           struct ieee80211_hdr *hdr,
 292                                           int left)
 293 {
 294         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 295             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 296              (priv->iw_mode != NL80211_IFTYPE_AP)))
 297                 return 0;
 298
 299         if (priv->ibss_beacon->len > left)
 300                 return 0;
 301
 302         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 303
 304         return priv->ibss_beacon->len;
 305 }
 306
 307 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 308 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 309                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 310                 u8 *beacon, u32 frame_size)
 311 {
 312         u16 tim_idx;
 313         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 314
 315         /*
 316          * The index is relative to frame start but we start looking at the
 317          * variable-length part of the beacon.
 318          */
 319         tim_idx = mgmt->u.beacon.variable - beacon;
 320
 321         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 322         while ((tim_idx < (frame_size - 2)) &&
 323                         (beacon[tim_idx] != WLAN_EID_TIM))
 324                 tim_idx += beacon[tim_idx+1] + 2;
 325
 326         /* If TIM field was found, set variables */
 327         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 328                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 329                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 330         } else
 331                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 332 }
 333
 334 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 335                                        struct iwl_frame *frame)
 336 {
 337         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 338         u32 frame_size;
 339         u32 rate_flags;
 340         u32 rate;
 341         /*
 342          * We have to set up the TX command, the TX Beacon command, and the
 343          * beacon contents.
 344          */
 345
 346         /* Initialize memory */
 347         tx_beacon_cmd = &frame->u.beacon;
 348         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 349
 350         /* Set up TX beacon contents */
 351         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 352                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 353         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 354                 return 0;
 355
 356         /* Set up TX command fields */
 357         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 358         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 359         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 360         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 361                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 362
 363         /* Set up TX beacon command fields */
 364         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 365                         frame_size);
 366
 367         /* Set up packet rate and flags */
 368         rate = iwl_rate_get_lowest_plcp(priv);
 369         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
 370         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 371         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 372                 rate_flags |= RATE_MCS_CCK_MSK;
 373         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 374                         rate_flags);
 375
 376         return sizeof(*tx_beacon_cmd) + frame_size;
 377 }
 378 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 379 {
 380         struct iwl_frame *frame;
 381         unsigned int frame_size;
 382         int rc;
 383
 384         frame = iwl_get_free_frame(priv);
 385         if (!frame) {
 386                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 387                           "command.\n");
 388                 return -ENOMEM;
 389         }
 390
 391         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 392         if (!frame_size) {
 393                 IWL_ERR(priv, "Error configuring the beacon command\n");
 394                 iwl_free_frame(priv, frame);
 395                 return -EINVAL;
 396         }
 397
 398         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 399                               &frame->u.cmd[0]);
 400
 401         iwl_free_frame(priv, frame);
 402
 403         return rc;
 404 }
 405
 406 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 407 {
 408         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 409
 410         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 411         if (sizeof(dma_addr_t) > sizeof(u32))
 412                 addr |=
 413                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 414
 415         return addr;
 416 }
 417
 418 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 419 {
 420         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 421
 422         return le16_to_cpu(tb->hi_n_len) >> 4;
 423 }
 424
 425 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 426                                   dma_addr_t addr, u16 len)
 427 {
 428         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 429         u16 hi_n_len = len << 4;
 430
 431         put_unaligned_le32(addr, &tb->lo);
 432         if (sizeof(dma_addr_t) > sizeof(u32))
 433                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 434
 435         tb->hi_n_len = cpu_to_le16(hi_n_len);
 436
 437         tfd->num_tbs = idx + 1;
 438 }
 439
 440 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 441 {
 442         return tfd->num_tbs & 0x1f;
 443 }
 444
 445 /**
 446  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 447  * @priv - driver private data
 448  * @txq - tx queue
 449  *
 450  * Does NOT advance any TFD circular buffer read/write indexes
 451  * Does NOT free the TFD itself (which is within circular buffer)
 452  */
 453 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 454 {
 455         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 456         struct iwl_tfd *tfd;
 457         struct pci_dev *dev = priv->pci_dev;
 458         int index = txq->q.read_ptr;
 459         int i;
 460         int num_tbs;
 461
 462         tfd = &tfd_tmp[index];
 463
 464         /* Sanity check on number of chunks */
 465         num_tbs = iwl_tfd_get_num_tbs(tfd);
 466
 467         if (num_tbs >= IWL_NUM_OF_TBS) {
 468                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 469                 /* @todo issue fatal error, it is quite serious situation */
 470                 return;
 471         }
 472
 473         /* Unmap tx_cmd */
 474         if (num_tbs)
 475                 pci_unmap_single(dev,
 476                                 pci_unmap_addr(&txq->meta[index], mapping),
 477                                 pci_unmap_len(&txq->meta[index], len),
 478                                 PCI_DMA_BIDIRECTIONAL);
 479
 480         /* Unmap chunks, if any. */
 481         for (i = 1; i < num_tbs; i++) {
 482                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 483                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 484
 485                 if (txq->txb) {
 486                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 487                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 488                 }
 489         }
 490 }
 491
 492 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 493                                  struct iwl_tx_queue *txq,
 494                                  dma_addr_t addr, u16 len,
 495                                  u8 reset, u8 pad)
 496 {
 497         struct iwl_queue *q;
 498         struct iwl_tfd *tfd, *tfd_tmp;
 499         u32 num_tbs;
 500
 501         q = &txq->q;
 502         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 503         tfd = &tfd_tmp[q->write_ptr];
 504
 505         if (reset)
 506                 memset(tfd, 0, sizeof(*tfd));
 507
 508         num_tbs = iwl_tfd_get_num_tbs(tfd);
 509
 510         /* Each TFD can point to a maximum 20 Tx buffers */
 511         if (num_tbs >= IWL_NUM_OF_TBS) {
 512                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 513                           IWL_NUM_OF_TBS);
 514                 return -EINVAL;
 515         }
 516
 517         BUG_ON(addr & ~DMA_BIT_MASK(36));
 518         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 519                 IWL_ERR(priv, "Unaligned address = %llx\n",
 520                           (unsigned long long)addr);
 521
 522         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 523
 524         return 0;
 525 }
 526
 527 /*
 528  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 529  * given Tx queue, and enable the DMA channel used for that queue.
 530  *
 531  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 532  * channels supported in hardware.
 533  */
 534 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 535                          struct iwl_tx_queue *txq)
 536 {
 537         int txq_id = txq->q.id;
 538
 539         /* Circular buffer (TFD queue in DRAM) physical base address */
 540         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 541                              txq->q.dma_addr >> 8);
 542
 543         return 0;
 544 }
 545
 546 /******************************************************************************
 547  *
 548  * Generic RX handler implementations
 549  *
 550  ******************************************************************************/
 551 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 552                                 struct iwl_rx_mem_buffer *rxb)
 553 {
 554         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 555         struct iwl_alive_resp *palive;
 556         struct delayed_work *pwork;
 557
 558         palive = &pkt->u.alive_frame;
 559
 560         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 561                        "0x%01X 0x%01X\n",
 562                        palive->is_valid, palive->ver_type,
 563                        palive->ver_subtype);
 564
 565         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 566                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 567                 memcpy(&priv->card_alive_init,
 568                        &pkt->u.alive_frame,
 569                        sizeof(struct iwl_init_alive_resp));
 570                 pwork = &priv->init_alive_start;
 571         } else {
 572                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 573                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 574                        sizeof(struct iwl_alive_resp));
 575                 pwork = &priv->alive_start;
 576         }
 577
 578         /* We delay the ALIVE response by 5ms to
 579          * give the HW RF Kill time to activate... */
 580         if (palive->is_valid == UCODE_VALID_OK)
 581                 queue_delayed_work(priv->workqueue, pwork,
 582                                    msecs_to_jiffies(5));
 583         else
 584                 IWL_WARN(priv, "uCode did not respond OK.\n");
 585 }
 586
 587 static void iwl_bg_beacon_update(struct work_struct *work)
 588 {
 589         struct iwl_priv *priv =
 590                 container_of(work, struct iwl_priv, beacon_update);
 591         struct sk_buff *beacon;
 592
 593         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 594         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 595
 596         if (!beacon) {
 597                 IWL_ERR(priv, "update beacon failed\n");
 598                 return;
 599         }
 600
 601         mutex_lock(&priv->mutex);
 602         /* new beacon skb is allocated every time; dispose previous.*/
 603         if (priv->ibss_beacon)
 604                 dev_kfree_skb(priv->ibss_beacon);
 605
 606         priv->ibss_beacon = beacon;
 607         mutex_unlock(&priv->mutex);
 608
 609         iwl_send_beacon_cmd(priv);
 610 }
 611
 612 /**
 613  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 614  *
 615  * This callback is provided in order to send a statistics request.
 616  *
 617  * This timer function is continually reset to execute within
 618  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 619  * was received.  We need to ensure we receive the statistics in order
 620  * to update the temperature used for calibrating the TXPOWER.
 621  */
 622 static void iwl_bg_statistics_periodic(unsigned long data)
 623 {
 624         struct iwl_priv *priv = (struct iwl_priv *)data;
 625
 626         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 627                 return;
 628
 629         /* dont send host command if rf-kill is on */
 630         if (!iwl_is_ready_rf(priv))
 631                 return;
 632
 633         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 634 }
 635
 636
 637 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 638                                         u32 start_idx, u32 num_events,
 639                                         u32 mode)
 640 {
 641         u32 i;
 642         u32 ptr;        /* SRAM byte address of log data */
 643         u32 ev, time, data; /* event log data */
 644         unsigned long reg_flags;
 645
 646         if (mode == 0)
 647                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 648         else
 649                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 650
 651         /* Make sure device is powered up for SRAM reads */
 652         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 653         if (iwl_grab_nic_access(priv)) {
 654                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 655                 return;
 656         }
 657
 658         /* Set starting address; reads will auto-increment */
 659         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 660         rmb();
 661
 662         /*
 663          * "time" is actually "data" for mode 0 (no timestamp).
 664          * place event id # at far right for easier visual parsing.
 665          */
 666         for (i = 0; i < num_events; i++) {
 667                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 668                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 669                 if (mode == 0) {
 670                         trace_iwlwifi_dev_ucode_cont_event(priv,
 671                                                         0, time, ev);
 672                 } else {
 673                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 674                         trace_iwlwifi_dev_ucode_cont_event(priv,
 675                                                 time, data, ev);
 676                 }
 677         }
 678         /* Allow device to power down */
 679         iwl_release_nic_access(priv);
 680         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 681 }
 682
 683 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 684 {
 685         u32 capacity;   /* event log capacity in # entries */
 686         u32 base;       /* SRAM byte address of event log header */
 687         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 688         u32 num_wraps;  /* # times uCode wrapped to top of log */
 689         u32 next_entry; /* index of next entry to be written by uCode */
 690
 691         if (priv->ucode_type == UCODE_INIT)
 692                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 693         else
 694                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 695         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 696                 capacity = iwl_read_targ_mem(priv, base);
 697                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 698                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 699                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 700         } else
 701                 return;
 702
 703         if (num_wraps == priv->event_log.num_wraps) {
 704                 iwl_print_cont_event_trace(priv,
 705                                        base, priv->event_log.next_entry,
 706                                        next_entry - priv->event_log.next_entry,
 707                                        mode);
 708                 priv->event_log.non_wraps_count++;
 709         } else {
 710                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 711                         priv->event_log.wraps_more_count++;
 712                 else
 713                         priv->event_log.wraps_once_count++;
 714                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 715                                 num_wraps - priv->event_log.num_wraps,
 716                                 next_entry, priv->event_log.next_entry);
 717                 if (next_entry < priv->event_log.next_entry) {
 718                         iwl_print_cont_event_trace(priv, base,
 719                                priv->event_log.next_entry,
 720                                capacity - priv->event_log.next_entry,
 721                                mode);
 722
 723                         iwl_print_cont_event_trace(priv, base, 0,
 724                                 next_entry, mode);
 725                 } else {
 726                         iwl_print_cont_event_trace(priv, base,
 727                                next_entry, capacity - next_entry,
 728                                mode);
 729
 730                         iwl_print_cont_event_trace(priv, base, 0,
 731                                 next_entry, mode);
 732                 }
 733         }
 734         priv->event_log.num_wraps = num_wraps;
 735         priv->event_log.next_entry = next_entry;
 736 }
 737
 738 /**
 739  * iwl_bg_ucode_trace - Timer callback to log ucode event
 740  *
 741  * The timer is continually set to execute every
 742  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 743  * this function is to perform continuous uCode event logging operation
 744  * if enabled
 745  */
 746 static void iwl_bg_ucode_trace(unsigned long data)
 747 {
 748         struct iwl_priv *priv = (struct iwl_priv *)data;
 749
 750         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 751                 return;
 752
 753         if (priv->event_log.ucode_trace) {
 754                 iwl_continuous_event_trace(priv);
 755                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 756                 mod_timer(&priv->ucode_trace,
 757                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 758         }
 759 }
 760
 761 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 762                                 struct iwl_rx_mem_buffer *rxb)
 763 {
 764 #ifdef CONFIG_IWLWIFI_DEBUG
 765         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 766         struct iwl4965_beacon_notif *beacon =
 767                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 768         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 769
 770         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 771                 "tsf %d %d rate %d\n",
 772                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 773                 beacon->beacon_notify_hdr.failure_frame,
 774                 le32_to_cpu(beacon->ibss_mgr_status),
 775                 le32_to_cpu(beacon->high_tsf),
 776                 le32_to_cpu(beacon->low_tsf), rate);
 777 #endif
 778
 779         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 780             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 781                 queue_work(priv->workqueue, &priv->beacon_update);
 782 }
 783
 784 /* Handle notification from uCode that card's power state is changing
 785  * due to software, hardware, or critical temperature RFKILL */
 786 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 787                                     struct iwl_rx_mem_buffer *rxb)
 788 {
 789         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 790         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 791         unsigned long status = priv->status;
 792
 793         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 794                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 795                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 796                           (flags & CT_CARD_DISABLED) ?
 797                           "Reached" : "Not reached");
 798
 799         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 800                      CT_CARD_DISABLED)) {
 801
 802                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 803                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 804
 805                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 806                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 807
 808                 if (!(flags & RXON_CARD_DISABLED)) {
 809                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 810                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 811                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 812                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 813                 }
 814                 if (flags & CT_CARD_DISABLED)
 815                         iwl_tt_enter_ct_kill(priv);
 816         }
 817         if (!(flags & CT_CARD_DISABLED))
 818                 iwl_tt_exit_ct_kill(priv);
 819
 820         if (flags & HW_CARD_DISABLED)
 821                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 822         else
 823                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 824
 825
 826         if (!(flags & RXON_CARD_DISABLED))
 827                 iwl_scan_cancel(priv);
 828
 829         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 830              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 831                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 832                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 833         else
 834                 wake_up_interruptible(&priv->wait_command_queue);
 835 }
 836
 837 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 838 {
 839         if (src == IWL_PWR_SRC_VAUX) {
 840                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 841                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 842                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 843                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 844         } else {
 845                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 846                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 847                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 848         }
 849
 850         return 0;
 851 }
 852
 853 /**
 854  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 855  *
 856  * Setup the RX handlers for each of the reply types sent from the uCode
 857  * to the host.
 858  *
 859  * This function chains into the hardware specific files for them to setup
 860  * any hardware specific handlers as well.
 861  */
 862 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 863 {
 864         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 865         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 866         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 867         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 868                         iwl_rx_spectrum_measure_notif;
 869         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 870         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 871             iwl_rx_pm_debug_statistics_notif;
 872         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 873
 874         /*
 875          * The same handler is used for both the REPLY to a discrete
 876          * statistics request from the host as well as for the periodic
 877          * statistics notifications (after received beacons) from the uCode.
 878          */
 879         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 880         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 881
 882         iwl_setup_rx_scan_handlers(priv);
 883
 884         /* status change handler */
 885         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 886
 887         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 888             iwl_rx_missed_beacon_notif;
 889         /* Rx handlers */
 890         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 891         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 892         /* block ack */
 893         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 894         /* Set up hardware specific Rx handlers */
 895         priv->cfg->ops->lib->rx_handler_setup(priv);
 896 }
 897
 898 /**
 899  * iwl_rx_handle - Main entry function for receiving responses from uCode
 900  *
 901  * Uses the priv->rx_handlers callback function array to invoke
 902  * the appropriate handlers, including command responses,
 903  * frame-received notifications, and other notifications.
 904  */
 905 void iwl_rx_handle(struct iwl_priv *priv)
 906 {
 907         struct iwl_rx_mem_buffer *rxb;
 908         struct iwl_rx_packet *pkt;
 909         struct iwl_rx_queue *rxq = &priv->rxq;
 910         u32 r, i;
 911         int reclaim;
 912         unsigned long flags;
 913         u8 fill_rx = 0;
 914         u32 count = 8;
 915         int total_empty;
 916
 917         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 918          * buffer that the driver may process (last buffer filled by ucode). */
 919         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 920         i = rxq->read;
 921
 922         /* Rx interrupt, but nothing sent from uCode */
 923         if (i == r)
 924                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 925
 926         /* calculate total frames need to be restock after handling RX */
 927         total_empty = r - rxq->write_actual;
 928         if (total_empty < 0)
 929                 total_empty += RX_QUEUE_SIZE;
 930
 931         if (total_empty > (RX_QUEUE_SIZE / 2))
 932                 fill_rx = 1;
 933
 934         while (i != r) {
 935                 rxb = rxq->queue[i];
 936
 937                 /* If an RXB doesn't have a Rx queue slot associated with it,
 938                  * then a bug has been introduced in the queue refilling
 939                  * routines -- catch it here */
 940                 BUG_ON(rxb == NULL);
 941
 942                 rxq->queue[i] = NULL;
 943
 944                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 945                                PAGE_SIZE << priv->hw_params.rx_page_order,
 946                                PCI_DMA_FROMDEVICE);
 947                 pkt = rxb_addr(rxb);
 948
 949                 trace_iwlwifi_dev_rx(priv, pkt,
 950                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 951
 952                 /* Reclaim a command buffer only if this packet is a response
 953                  *   to a (driver-originated) command.
 954                  * If the packet (e.g. Rx frame) originated from uCode,
 955                  *   there is no command buffer to reclaim.
 956                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 957                  *   but apparently a few don't get set; catch them here. */
 958                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 959                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 960                         (pkt->hdr.cmd != REPLY_RX) &&
 961                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 962                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 963                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 964                         (pkt->hdr.cmd != REPLY_TX);
 965
 966                 /* Based on type of command response or notification,
 967                  *   handle those that need handling via function in
 968                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 969                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 970                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 971                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 972                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 973                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 974                 } else {
 975                         /* No handling needed */
 976                         IWL_DEBUG_RX(priv,
 977                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 978                                 r, i, get_cmd_string(pkt->hdr.cmd),
 979                                 pkt->hdr.cmd);
 980                 }
 981
 982                 /*
 983                  * XXX: After here, we should always check rxb->page
 984                  * against NULL before touching it or its virtual
 985                  * memory (pkt). Because some rx_handler might have
 986                  * already taken or freed the pages.
 987                  */
 988
 989                 if (reclaim) {
 990                         /* Invoke any callbacks, transfer the buffer to caller,
 991                          * and fire off the (possibly) blocking iwl_send_cmd()
 992                          * as we reclaim the driver command queue */
 993                         if (rxb->page)
 994                                 iwl_tx_cmd_complete(priv, rxb);
 995                         else
 996                                 IWL_WARN(priv, "Claim null rxb?\n");
 997                 }
 998
 999                 /* Reuse the page if possible. For notification packets and
1000                  * SKBs that fail to Rx correctly, add them back into the
1001                  * rx_free list for reuse later. */
1002                 spin_lock_irqsave(&rxq->lock, flags);
1003                 if (rxb->page != NULL) {
1004                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1005                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1006                                 PCI_DMA_FROMDEVICE);
1007                         list_add_tail(&rxb->list, &rxq->rx_free);
1008                         rxq->free_count++;
1009                 } else
1010                         list_add_tail(&rxb->list, &rxq->rx_used);
1011
1012                 spin_unlock_irqrestore(&rxq->lock, flags);
1013
1014                 i = (i + 1) & RX_QUEUE_MASK;
1015                 /* If there are a lot of unused frames,
1016                  * restock the Rx queue so ucode wont assert. */
1017                 if (fill_rx) {
1018                         count++;
1019                         if (count >= 8) {
1020                                 rxq->read = i;
1021                                 iwlagn_rx_replenish_now(priv);
1022                                 count = 0;
1023                         }
1024                 }
1025         }
1026
1027         /* Backtrack one entry */
1028         rxq->read = i;
1029         if (fill_rx)
1030                 iwlagn_rx_replenish_now(priv);
1031         else
1032                 iwlagn_rx_queue_restock(priv);
1033 }
1034
1035 /* call this function to flush any scheduled tasklet */
1036 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1037 {
1038         /* wait to make sure we flush pending tasklet*/
1039         synchronize_irq(priv->pci_dev->irq);
1040         tasklet_kill(&priv->irq_tasklet);
1041 }
1042
1043 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1044 {
1045         u32 inta, handled = 0;
1046         u32 inta_fh;
1047         unsigned long flags;
1048         u32 i;
1049 #ifdef CONFIG_IWLWIFI_DEBUG
1050         u32 inta_mask;
1051 #endif
1052
1053         spin_lock_irqsave(&priv->lock, flags);
1054
1055         /* Ack/clear/reset pending uCode interrupts.
1056          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1057          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1058         inta = iwl_read32(priv, CSR_INT);
1059         iwl_write32(priv, CSR_INT, inta);
1060
1061         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1062          * Any new interrupts that happen after this, either while we're
1063          * in this tasklet, or later, will show up in next ISR/tasklet. */
1064         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1065         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1066
1067 #ifdef CONFIG_IWLWIFI_DEBUG
1068         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1069                 /* just for debug */
1070                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1071                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1072                               inta, inta_mask, inta_fh);
1073         }
1074 #endif
1075
1076         spin_unlock_irqrestore(&priv->lock, flags);
1077
1078         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1079          * atomic, make sure that inta covers all the interrupts that
1080          * we've discovered, even if FH interrupt came in just after
1081          * reading CSR_INT. */
1082         if (inta_fh & CSR49_FH_INT_RX_MASK)
1083                 inta |= CSR_INT_BIT_FH_RX;
1084         if (inta_fh & CSR49_FH_INT_TX_MASK)
1085                 inta |= CSR_INT_BIT_FH_TX;
1086
1087         /* Now service all interrupt bits discovered above. */
1088         if (inta & CSR_INT_BIT_HW_ERR) {
1089                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1090
1091                 /* Tell the device to stop sending interrupts */
1092                 iwl_disable_interrupts(priv);
1093
1094                 priv->isr_stats.hw++;
1095                 iwl_irq_handle_error(priv);
1096
1097                 handled |= CSR_INT_BIT_HW_ERR;
1098
1099                 return;
1100         }
1101
1102 #ifdef CONFIG_IWLWIFI_DEBUG
1103         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1104                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1105                 if (inta & CSR_INT_BIT_SCD) {
1106                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1107                                       "the frame/frames.\n");
1108                         priv->isr_stats.sch++;
1109                 }
1110
1111                 /* Alive notification via Rx interrupt will do the real work */
1112                 if (inta & CSR_INT_BIT_ALIVE) {
1113                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1114                         priv->isr_stats.alive++;
1115                 }
1116         }
1117 #endif
1118         /* Safely ignore these bits for debug checks below */
1119         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1120
1121         /* HW RF KILL switch toggled */
1122         if (inta & CSR_INT_BIT_RF_KILL) {
1123                 int hw_rf_kill = 0;
1124                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1125                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1126                         hw_rf_kill = 1;
1127
1128                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1129                                 hw_rf_kill ? "disable radio" : "enable radio");
1130
1131                 priv->isr_stats.rfkill++;
1132
1133                 /* driver only loads ucode once setting the interface up.
1134                  * the driver allows loading the ucode even if the radio
1135                  * is killed. Hence update the killswitch state here. The
1136                  * rfkill handler will care about restarting if needed.
1137                  */
1138                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1139                         if (hw_rf_kill)
1140                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1141                         else
1142                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1143                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1144                 }
1145
1146                 handled |= CSR_INT_BIT_RF_KILL;
1147         }
1148
1149         /* Chip got too hot and stopped itself */
1150         if (inta & CSR_INT_BIT_CT_KILL) {
1151                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1152                 priv->isr_stats.ctkill++;
1153                 handled |= CSR_INT_BIT_CT_KILL;
1154         }
1155
1156         /* Error detected by uCode */
1157         if (inta & CSR_INT_BIT_SW_ERR) {
1158                 IWL_ERR(priv, "Microcode SW error detected. "
1159                         " Restarting 0x%X.\n", inta);
1160                 priv->isr_stats.sw++;
1161                 priv->isr_stats.sw_err = inta;
1162                 iwl_irq_handle_error(priv);
1163                 handled |= CSR_INT_BIT_SW_ERR;
1164         }
1165
1166         /*
1167          * uCode wakes up after power-down sleep.
1168          * Tell device about any new tx or host commands enqueued,
1169          * and about any Rx buffers made available while asleep.
1170          */
1171         if (inta & CSR_INT_BIT_WAKEUP) {
1172                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1173                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1174                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1175                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1176                 priv->isr_stats.wakeup++;
1177                 handled |= CSR_INT_BIT_WAKEUP;
1178         }
1179
1180         /* All uCode command responses, including Tx command responses,
1181          * Rx "responses" (frame-received notification), and other
1182          * notifications from uCode come through here*/
1183         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1184                 iwl_rx_handle(priv);
1185                 priv->isr_stats.rx++;
1186                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1187         }
1188
1189         /* This "Tx" DMA channel is used only for loading uCode */
1190         if (inta & CSR_INT_BIT_FH_TX) {
1191                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1192                 priv->isr_stats.tx++;
1193                 handled |= CSR_INT_BIT_FH_TX;
1194                 /* Wake up uCode load routine, now that load is complete */
1195                 priv->ucode_write_complete = 1;
1196                 wake_up_interruptible(&priv->wait_command_queue);
1197         }
1198
1199         if (inta & ~handled) {
1200                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1201                 priv->isr_stats.unhandled++;
1202         }
1203
1204         if (inta & ~(priv->inta_mask)) {
1205                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1206                          inta & ~priv->inta_mask);
1207                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1208         }
1209
1210         /* Re-enable all interrupts */
1211         /* only Re-enable if diabled by irq */
1212         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1213                 iwl_enable_interrupts(priv);
1214
1215 #ifdef CONFIG_IWLWIFI_DEBUG
1216         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1217                 inta = iwl_read32(priv, CSR_INT);
1218                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1219                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1220                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1221                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1222         }
1223 #endif
1224 }
1225
1226 /* tasklet for iwlagn interrupt */
1227 static void iwl_irq_tasklet(struct iwl_priv *priv)
1228 {
1229         u32 inta = 0;
1230         u32 handled = 0;
1231         unsigned long flags;
1232         u32 i;
1233 #ifdef CONFIG_IWLWIFI_DEBUG
1234         u32 inta_mask;
1235 #endif
1236
1237         spin_lock_irqsave(&priv->lock, flags);
1238
1239         /* Ack/clear/reset pending uCode interrupts.
1240          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1241          */
1242         /* There is a hardware bug in the interrupt mask function that some
1243          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1244          * they are disabled in the CSR_INT_MASK register. Furthermore the
1245          * ICT interrupt handling mechanism has another bug that might cause
1246          * these unmasked interrupts fail to be detected. We workaround the
1247          * hardware bugs here by ACKing all the possible interrupts so that
1248          * interrupt coalescing can still be achieved.
1249          */
1250         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1251
1252         inta = priv->_agn.inta;
1253
1254 #ifdef CONFIG_IWLWIFI_DEBUG
1255         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1256                 /* just for debug */
1257                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1258                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1259                                 inta, inta_mask);
1260         }
1261 #endif
1262
1263         spin_unlock_irqrestore(&priv->lock, flags);
1264
1265         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1266         priv->_agn.inta = 0;
1267
1268         /* Now service all interrupt bits discovered above. */
1269         if (inta & CSR_INT_BIT_HW_ERR) {
1270                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1271
1272                 /* Tell the device to stop sending interrupts */
1273                 iwl_disable_interrupts(priv);
1274
1275                 priv->isr_stats.hw++;
1276                 iwl_irq_handle_error(priv);
1277
1278                 handled |= CSR_INT_BIT_HW_ERR;
1279
1280                 return;
1281         }
1282
1283 #ifdef CONFIG_IWLWIFI_DEBUG
1284         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1285                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1286                 if (inta & CSR_INT_BIT_SCD) {
1287                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1288                                       "the frame/frames.\n");
1289                         priv->isr_stats.sch++;
1290                 }
1291
1292                 /* Alive notification via Rx interrupt will do the real work */
1293                 if (inta & CSR_INT_BIT_ALIVE) {
1294                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1295                         priv->isr_stats.alive++;
1296                 }
1297         }
1298 #endif
1299         /* Safely ignore these bits for debug checks below */
1300         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1301
1302         /* HW RF KILL switch toggled */
1303         if (inta & CSR_INT_BIT_RF_KILL) {
1304                 int hw_rf_kill = 0;
1305                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1306                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1307                         hw_rf_kill = 1;
1308
1309                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1310                                 hw_rf_kill ? "disable radio" : "enable radio");
1311
1312                 priv->isr_stats.rfkill++;
1313
1314                 /* driver only loads ucode once setting the interface up.
1315                  * the driver allows loading the ucode even if the radio
1316                  * is killed. Hence update the killswitch state here. The
1317                  * rfkill handler will care about restarting if needed.
1318                  */
1319                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1320                         if (hw_rf_kill)
1321                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1322                         else
1323                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1324                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1325                 }
1326
1327                 handled |= CSR_INT_BIT_RF_KILL;
1328         }
1329
1330         /* Chip got too hot and stopped itself */
1331         if (inta & CSR_INT_BIT_CT_KILL) {
1332                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1333                 priv->isr_stats.ctkill++;
1334                 handled |= CSR_INT_BIT_CT_KILL;
1335         }
1336
1337         /* Error detected by uCode */
1338         if (inta & CSR_INT_BIT_SW_ERR) {
1339                 IWL_ERR(priv, "Microcode SW error detected. "
1340                         " Restarting 0x%X.\n", inta);
1341                 priv->isr_stats.sw++;
1342                 priv->isr_stats.sw_err = inta;
1343                 iwl_irq_handle_error(priv);
1344                 handled |= CSR_INT_BIT_SW_ERR;
1345         }
1346
1347         /* uCode wakes up after power-down sleep */
1348         if (inta & CSR_INT_BIT_WAKEUP) {
1349                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1350                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1351                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1352                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1353
1354                 priv->isr_stats.wakeup++;
1355
1356                 handled |= CSR_INT_BIT_WAKEUP;
1357         }
1358
1359         /* All uCode command responses, including Tx command responses,
1360          * Rx "responses" (frame-received notification), and other
1361          * notifications from uCode come through here*/
1362         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1363                         CSR_INT_BIT_RX_PERIODIC)) {
1364                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1365                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1366                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1367                         iwl_write32(priv, CSR_FH_INT_STATUS,
1368                                         CSR49_FH_INT_RX_MASK);
1369                 }
1370                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1371                         handled |= CSR_INT_BIT_RX_PERIODIC;
1372                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1373                 }
1374                 /* Sending RX interrupt require many steps to be done in the
1375                  * the device:
1376                  * 1- write interrupt to current index in ICT table.
1377                  * 2- dma RX frame.
1378                  * 3- update RX shared data to indicate last write index.
1379                  * 4- send interrupt.
1380                  * This could lead to RX race, driver could receive RX interrupt
1381                  * but the shared data changes does not reflect this;
1382                  * periodic interrupt will detect any dangling Rx activity.
1383                  */
1384
1385                 /* Disable periodic interrupt; we use it as just a one-shot. */
1386                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1387                             CSR_INT_PERIODIC_DIS);
1388                 iwl_rx_handle(priv);
1389
1390                 /*
1391                  * Enable periodic interrupt in 8 msec only if we received
1392                  * real RX interrupt (instead of just periodic int), to catch
1393                  * any dangling Rx interrupt.  If it was just the periodic
1394                  * interrupt, there was no dangling Rx activity, and no need
1395                  * to extend the periodic interrupt; one-shot is enough.
1396                  */
1397                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1398                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1399                                     CSR_INT_PERIODIC_ENA);
1400
1401                 priv->isr_stats.rx++;
1402         }
1403
1404         /* This "Tx" DMA channel is used only for loading uCode */
1405         if (inta & CSR_INT_BIT_FH_TX) {
1406                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1407                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1408                 priv->isr_stats.tx++;
1409                 handled |= CSR_INT_BIT_FH_TX;
1410                 /* Wake up uCode load routine, now that load is complete */
1411                 priv->ucode_write_complete = 1;
1412                 wake_up_interruptible(&priv->wait_command_queue);
1413         }
1414
1415         if (inta & ~handled) {
1416                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1417                 priv->isr_stats.unhandled++;
1418         }
1419
1420         if (inta & ~(priv->inta_mask)) {
1421                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1422                          inta & ~priv->inta_mask);
1423         }
1424
1425         /* Re-enable all interrupts */
1426         /* only Re-enable if diabled by irq */
1427         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1428                 iwl_enable_interrupts(priv);
1429 }
1430
1431 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1432 #define ACK_CNT_RATIO (50)
1433 #define BA_TIMEOUT_CNT (5)
1434 #define BA_TIMEOUT_MAX (16)
1435
1436 /**
1437  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1438  *
1439  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1440  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1441  * operation state.
1442  */
1443 bool iwl_good_ack_health(struct iwl_priv *priv,
1444                                 struct iwl_rx_packet *pkt)
1445 {
1446         bool rc = true;
1447         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1448         int ba_timeout_delta;
1449
1450         actual_ack_cnt_delta =
1451                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1452                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1453         expected_ack_cnt_delta =
1454                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1455                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1456         ba_timeout_delta =
1457                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1458                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1459         if ((priv->_agn.agg_tids_count > 0) &&
1460             (expected_ack_cnt_delta > 0) &&
1461             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1462                 < ACK_CNT_RATIO) &&
1463             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1464                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1465                                 " expected_ack_cnt = %d\n",
1466                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1467
1468 #ifdef CONFIG_IWLWIFI_DEBUGFS
1469                 /*
1470                  * This is ifdef'ed on DEBUGFS because otherwise the
1471                  * statistics aren't available. If DEBUGFS is set but
1472                  * DEBUG is not, these will just compile out.
1473                  */
1474                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1475                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1476                 IWL_DEBUG_RADIO(priv,
1477                                 "ack_or_ba_timeout_collision delta = %d\n",
1478                                 priv->_agn.delta_statistics.tx.
1479                                 ack_or_ba_timeout_collision);
1480 #endif
1481                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1482                                 ba_timeout_delta);
1483                 if (!actual_ack_cnt_delta &&
1484                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1485                         rc = false;
1486         }
1487         return rc;
1488 }
1489
1490
1491 /******************************************************************************
1492  *
1493  * uCode download functions
1494  *
1495  ******************************************************************************/
1496
1497 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1498 {
1499         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1500         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1501         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1502         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1503         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1504         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1505 }
1506
1507 static void iwl_nic_start(struct iwl_priv *priv)
1508 {
1509         /* Remove all resets to allow NIC to operate */
1510         iwl_write32(priv, CSR_RESET, 0);
1511 }
1512
1513 struct iwlagn_ucode_capabilities {
1514         u32 max_probe_length;
1515 };
1516
1517 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1518 static int iwl_mac_setup_register(struct iwl_priv *priv,
1519                                   struct iwlagn_ucode_capabilities *capa);
1520
1521 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1522 {
1523         const char *name_pre = priv->cfg->fw_name_pre;
1524
1525         if (first)
1526                 priv->fw_index = priv->cfg->ucode_api_max;
1527         else
1528                 priv->fw_index--;
1529
1530         if (priv->fw_index < priv->cfg->ucode_api_min) {
1531                 IWL_ERR(priv, "no suitable firmware found!\n");
1532                 return -ENOENT;
1533         }
1534
1535         sprintf(priv->firmware_name, "%s%d%s",
1536                 name_pre, priv->fw_index, ".ucode");
1537
1538         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1539                        priv->firmware_name);
1540
1541         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1542                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1543                                        iwl_ucode_callback);
1544 }
1545
1546 struct iwlagn_firmware_pieces {
1547         const void *inst, *data, *init, *init_data, *boot;
1548         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1549
1550         u32 build;
1551
1552         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1553         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1554 };
1555
1556 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1557                                        const struct firmware *ucode_raw,
1558                                        struct iwlagn_firmware_pieces *pieces)
1559 {
1560         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1561         u32 api_ver, hdr_size;
1562         const u8 *src;
1563
1564         priv->ucode_ver = le32_to_cpu(ucode->ver);
1565         api_ver = IWL_UCODE_API(priv->ucode_ver);
1566
1567         switch (api_ver) {
1568         default:
1569                 /*
1570                  * 4965 doesn't revision the firmware file format
1571                  * along with the API version, it always uses v1
1572                  * file format.
1573                  */
1574                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1575                                 CSR_HW_REV_TYPE_4965) {
1576                         hdr_size = 28;
1577                         if (ucode_raw->size < hdr_size) {
1578                                 IWL_ERR(priv, "File size too small!\n");
1579                                 return -EINVAL;
1580                         }
1581                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1582                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1583                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1584                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1585                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1586                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1587                         src = ucode->u.v2.data;
1588                         break;
1589                 }
1590                 /* fall through for 4965 */
1591         case 0:
1592         case 1:
1593         case 2:
1594                 hdr_size = 24;
1595                 if (ucode_raw->size < hdr_size) {
1596                         IWL_ERR(priv, "File size too small!\n");
1597                         return -EINVAL;
1598                 }
1599                 pieces->build = 0;
1600                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1601                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1602                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1603                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1604                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1605                 src = ucode->u.v1.data;
1606                 break;
1607         }
1608
1609         /* Verify size of file vs. image size info in file's header */
1610         if (ucode_raw->size != hdr_size + pieces->inst_size +
1611                                 pieces->data_size + pieces->init_size +
1612                                 pieces->init_data_size + pieces->boot_size) {
1613
1614                 IWL_ERR(priv,
1615                         "uCode file size %d does not match expected size\n",
1616                         (int)ucode_raw->size);
1617                 return -EINVAL;
1618         }
1619
1620         pieces->inst = src;
1621         src += pieces->inst_size;
1622         pieces->data = src;
1623         src += pieces->data_size;
1624         pieces->init = src;
1625         src += pieces->init_size;
1626         pieces->init_data = src;
1627         src += pieces->init_data_size;
1628         pieces->boot = src;
1629         src += pieces->boot_size;
1630
1631         return 0;
1632 }
1633
1634 static int iwlagn_wanted_ucode_alternative = 1;
1635
1636 static int iwlagn_load_firmware(struct iwl_priv *priv,
1637                                 const struct firmware *ucode_raw,
1638                                 struct iwlagn_firmware_pieces *pieces,
1639                                 struct iwlagn_ucode_capabilities *capa)
1640 {
1641         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1642         struct iwl_ucode_tlv *tlv;
1643         size_t len = ucode_raw->size;
1644         const u8 *data;
1645         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1646         u64 alternatives;
1647
1648         if (len < sizeof(*ucode))
1649                 return -EINVAL;
1650
1651         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC))
1652                 return -EINVAL;
1653
1654         /*
1655          * Check which alternatives are present, and "downgrade"
1656          * when the chosen alternative is not present, warning
1657          * the user when that happens. Some files may not have
1658          * any alternatives, so don't warn in that case.
1659          */
1660         alternatives = le64_to_cpu(ucode->alternatives);
1661         tmp = wanted_alternative;
1662         if (wanted_alternative > 63)
1663                 wanted_alternative = 63;
1664         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1665                 wanted_alternative--;
1666         if (wanted_alternative && wanted_alternative != tmp)
1667                 IWL_WARN(priv,
1668                          "uCode alternative %d not available, choosing %d\n",
1669                          tmp, wanted_alternative);
1670
1671         priv->ucode_ver = le32_to_cpu(ucode->ver);
1672         pieces->build = le32_to_cpu(ucode->build);
1673         data = ucode->data;
1674
1675         len -= sizeof(*ucode);
1676
1677         while (len >= sizeof(*tlv)) {
1678                 u32 tlv_len;
1679                 enum iwl_ucode_tlv_type tlv_type;
1680                 u16 tlv_alt;
1681                 const u8 *tlv_data;
1682
1683                 len -= sizeof(*tlv);
1684                 tlv = (void *)data;
1685
1686                 tlv_len = le32_to_cpu(tlv->length);
1687                 tlv_type = le16_to_cpu(tlv->type);
1688                 tlv_alt = le16_to_cpu(tlv->alternative);
1689                 tlv_data = tlv->data;
1690
1691                 if (len < tlv_len)
1692                         return -EINVAL;
1693                 len -= ALIGN(tlv_len, 4);
1694                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1695
1696                 /*
1697                  * Alternative 0 is always valid.
1698                  *
1699                  * Skip alternative TLVs that are not selected.
1700                  */
1701                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1702                         continue;
1703
1704                 switch (tlv_type) {
1705                 case IWL_UCODE_TLV_INST:
1706                         pieces->inst = tlv_data;
1707                         pieces->inst_size = tlv_len;
1708                         break;
1709                 case IWL_UCODE_TLV_DATA:
1710                         pieces->data = tlv_data;
1711                         pieces->data_size = tlv_len;
1712                         break;
1713                 case IWL_UCODE_TLV_INIT:
1714                         pieces->init = tlv_data;
1715                         pieces->init_size = tlv_len;
1716                         break;
1717                 case IWL_UCODE_TLV_INIT_DATA:
1718                         pieces->init_data = tlv_data;
1719                         pieces->init_data_size = tlv_len;
1720                         break;
1721                 case IWL_UCODE_TLV_BOOT:
1722                         pieces->boot = tlv_data;
1723                         pieces->boot_size = tlv_len;
1724                         break;
1725                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1726                         if (tlv_len != 4)
1727                                 return -EINVAL;
1728                         capa->max_probe_length =
1729                                 le32_to_cpup((__le32 *)tlv_data);
1730                         break;
1731                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1732                         if (tlv_len != 4)
1733                                 return -EINVAL;
1734                         pieces->init_evtlog_ptr =
1735                                 le32_to_cpup((__le32 *)tlv_data);
1736                         break;
1737                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1738                         if (tlv_len != 4)
1739                                 return -EINVAL;
1740                         pieces->init_evtlog_size =
1741                                 le32_to_cpup((__le32 *)tlv_data);
1742                         break;
1743                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1744                         if (tlv_len != 4)
1745                                 return -EINVAL;
1746                         pieces->init_errlog_ptr =
1747                                 le32_to_cpup((__le32 *)tlv_data);
1748                         break;
1749                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1750                         if (tlv_len != 4)
1751                                 return -EINVAL;
1752                         pieces->inst_evtlog_ptr =
1753                                 le32_to_cpup((__le32 *)tlv_data);
1754                         break;
1755                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1756                         if (tlv_len != 4)
1757                                 return -EINVAL;
1758                         pieces->inst_evtlog_size =
1759                                 le32_to_cpup((__le32 *)tlv_data);
1760                         break;
1761                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1762                         if (tlv_len != 4)
1763                                 return -EINVAL;
1764                         pieces->inst_errlog_ptr =
1765                                 le32_to_cpup((__le32 *)tlv_data);
1766                         break;
1767                 default:
1768                         break;
1769                 }
1770         }
1771
1772         if (len)
1773                 return -EINVAL;
1774
1775         return 0;
1776 }
1777
1778 /**
1779  * iwl_ucode_callback - callback when firmware was loaded
1780  *
1781  * If loaded successfully, copies the firmware into buffers
1782  * for the card to fetch (via DMA).
1783  */
1784 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1785 {
1786         struct iwl_priv *priv = context;
1787         struct iwl_ucode_header *ucode;
1788         int err;
1789         struct iwlagn_firmware_pieces pieces;
1790         const unsigned int api_max = priv->cfg->ucode_api_max;
1791         const unsigned int api_min = priv->cfg->ucode_api_min;
1792         u32 api_ver;
1793         char buildstr[25];
1794         u32 build;
1795         struct iwlagn_ucode_capabilities ucode_capa = {
1796                 .max_probe_length = 200,
1797         };
1798
1799         memset(&pieces, 0, sizeof(pieces));
1800
1801         if (!ucode_raw) {
1802                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1803                         priv->firmware_name);
1804                 goto try_again;
1805         }
1806
1807         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1808                        priv->firmware_name, ucode_raw->size);
1809
1810         /* Make sure that we got at least the API version number */
1811         if (ucode_raw->size < 4) {
1812                 IWL_ERR(priv, "File size way too small!\n");
1813                 goto try_again;
1814         }
1815
1816         /* Data from ucode file:  header followed by uCode images */
1817         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1818
1819         if (ucode->ver)
1820                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1821         else
1822                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1823                                            &ucode_capa);
1824
1825         if (err)
1826                 goto try_again;
1827
1828         api_ver = IWL_UCODE_API(priv->ucode_ver);
1829         build = pieces.build;
1830
1831         /*
1832          * api_ver should match the api version forming part of the
1833          * firmware filename ... but we don't check for that and only rely
1834          * on the API version read from firmware header from here on forward
1835          */
1836         if (api_ver < api_min || api_ver > api_max) {
1837                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1838                           "Driver supports v%u, firmware is v%u.\n",
1839                           api_max, api_ver);
1840                 goto try_again;
1841         }
1842
1843         if (api_ver != api_max)
1844                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1845                           "got v%u. New firmware can be obtained "
1846                           "from http://www.intellinuxwireless.org.\n",
1847                           api_max, api_ver);
1848
1849         if (build)
1850                 sprintf(buildstr, " build %u", build);
1851         else
1852                 buildstr[0] = '\0';
1853
1854         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1855                  IWL_UCODE_MAJOR(priv->ucode_ver),
1856                  IWL_UCODE_MINOR(priv->ucode_ver),
1857                  IWL_UCODE_API(priv->ucode_ver),
1858                  IWL_UCODE_SERIAL(priv->ucode_ver),
1859                  buildstr);
1860
1861         snprintf(priv->hw->wiphy->fw_version,
1862                  sizeof(priv->hw->wiphy->fw_version),
1863                  "%u.%u.%u.%u%s",
1864                  IWL_UCODE_MAJOR(priv->ucode_ver),
1865                  IWL_UCODE_MINOR(priv->ucode_ver),
1866                  IWL_UCODE_API(priv->ucode_ver),
1867                  IWL_UCODE_SERIAL(priv->ucode_ver),
1868                  buildstr);
1869
1870         /*
1871          * For any of the failures below (before allocating pci memory)
1872          * we will try to load a version with a smaller API -- maybe the
1873          * user just got a corrupted version of the latest API.
1874          */
1875
1876         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1877                        priv->ucode_ver);
1878         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1879                        pieces.inst_size);
1880         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1881                        pieces.data_size);
1882         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1883                        pieces.init_size);
1884         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1885                        pieces.init_data_size);
1886         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
1887                        pieces.boot_size);
1888
1889         /* Verify that uCode images will fit in card's SRAM */
1890         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1891                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1892                         pieces.inst_size);
1893                 goto try_again;
1894         }
1895
1896         if (pieces.data_size > priv->hw_params.max_data_size) {
1897                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1898                         pieces.data_size);
1899                 goto try_again;
1900         }
1901
1902         if (pieces.init_size > priv->hw_params.max_inst_size) {
1903                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1904                         pieces.init_size);
1905                 goto try_again;
1906         }
1907
1908         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1909                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1910                         pieces.init_data_size);
1911                 goto try_again;
1912         }
1913
1914         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
1915                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
1916                         pieces.boot_size);
1917                 goto try_again;
1918         }
1919
1920         /* Allocate ucode buffers for card's bus-master loading ... */
1921
1922         /* Runtime instructions and 2 copies of data:
1923          * 1) unmodified from disk
1924          * 2) backup cache for save/restore during power-downs */
1925         priv->ucode_code.len = pieces.inst_size;
1926         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1927
1928         priv->ucode_data.len = pieces.data_size;
1929         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1930
1931         priv->ucode_data_backup.len = pieces.data_size;
1932         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1933
1934         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1935             !priv->ucode_data_backup.v_addr)
1936                 goto err_pci_alloc;
1937
1938         /* Initialization instructions and data */
1939         if (pieces.init_size && pieces.init_data_size) {
1940                 priv->ucode_init.len = pieces.init_size;
1941                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1942
1943                 priv->ucode_init_data.len = pieces.init_data_size;
1944                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1945
1946                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1947                         goto err_pci_alloc;
1948         }
1949
1950         /* Bootstrap (instructions only, no data) */
1951         if (pieces.boot_size) {
1952                 priv->ucode_boot.len = pieces.boot_size;
1953                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1954
1955                 if (!priv->ucode_boot.v_addr)
1956                         goto err_pci_alloc;
1957         }
1958
1959         /* Now that we can no longer fail, copy information */
1960
1961         /*
1962          * The (size - 16) / 12 formula is based on the information recorded
1963          * for each event, which is of mode 1 (including timestamp) for all
1964          * new microcodes that include this information.
1965          */
1966         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
1967         if (pieces.init_evtlog_size)
1968                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1969         else
1970                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
1971         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
1972         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1973         if (pieces.inst_evtlog_size)
1974                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1975         else
1976                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
1977         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1978
1979         /* Copy images into buffers for card's bus-master reads ... */
1980
1981         /* Runtime instructions (first block of data in file) */
1982         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
1983                         pieces.inst_size);
1984         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1985
1986         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1987                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1988
1989         /*
1990          * Runtime data
1991          * NOTE:  Copy into backup buffer will be done in iwl_up()
1992          */
1993         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
1994                         pieces.data_size);
1995         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
1996         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
1997
1998         /* Initialization instructions */
1999         if (pieces.init_size) {
2000                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2001                                 pieces.init_size);
2002                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2003         }
2004
2005         /* Initialization data */
2006         if (pieces.init_data_size) {
2007                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2008                                pieces.init_data_size);
2009                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2010                        pieces.init_data_size);
2011         }
2012
2013         /* Bootstrap instructions */
2014         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2015                         pieces.boot_size);
2016         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2017
2018         /**************************************************
2019          * This is still part of probe() in a sense...
2020          *
2021          * 9. Setup and register with mac80211 and debugfs
2022          **************************************************/
2023         err = iwl_mac_setup_register(priv, &ucode_capa);
2024         if (err)
2025                 goto out_unbind;
2026
2027         err = iwl_dbgfs_register(priv, DRV_NAME);
2028         if (err)
2029                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2030
2031         /* We have our copies now, allow OS release its copies */
2032         release_firmware(ucode_raw);
2033         complete(&priv->_agn.firmware_loading_complete);
2034         return;
2035
2036  try_again:
2037         /* try next, if any */
2038         if (iwl_request_firmware(priv, false))
2039                 goto out_unbind;
2040         release_firmware(ucode_raw);
2041         return;
2042
2043  err_pci_alloc:
2044         IWL_ERR(priv, "failed to allocate pci memory\n");
2045         iwl_dealloc_ucode_pci(priv);
2046  out_unbind:
2047         complete(&priv->_agn.firmware_loading_complete);
2048         device_release_driver(&priv->pci_dev->dev);
2049         release_firmware(ucode_raw);
2050 }
2051
2052 static const char *desc_lookup_text[] = {
2053         "OK",
2054         "FAIL",
2055         "BAD_PARAM",
2056         "BAD_CHECKSUM",
2057         "NMI_INTERRUPT_WDG",
2058         "SYSASSERT",
2059         "FATAL_ERROR",
2060         "BAD_COMMAND",
2061         "HW_ERROR_TUNE_LOCK",
2062         "HW_ERROR_TEMPERATURE",
2063         "ILLEGAL_CHAN_FREQ",
2064         "VCC_NOT_STABLE",
2065         "FH_ERROR",
2066         "NMI_INTERRUPT_HOST",
2067         "NMI_INTERRUPT_ACTION_PT",
2068         "NMI_INTERRUPT_UNKNOWN",
2069         "UCODE_VERSION_MISMATCH",
2070         "HW_ERROR_ABS_LOCK",
2071         "HW_ERROR_CAL_LOCK_FAIL",
2072         "NMI_INTERRUPT_INST_ACTION_PT",
2073         "NMI_INTERRUPT_DATA_ACTION_PT",
2074         "NMI_TRM_HW_ER",
2075         "NMI_INTERRUPT_TRM",
2076         "NMI_INTERRUPT_BREAK_POINT"
2077         "DEBUG_0",
2078         "DEBUG_1",
2079         "DEBUG_2",
2080         "DEBUG_3",
2081         "ADVANCED SYSASSERT"
2082 };
2083
2084 static const char *desc_lookup(int i)
2085 {
2086         int max = ARRAY_SIZE(desc_lookup_text) - 1;
2087
2088         if (i < 0 || i > max)
2089                 i = max;
2090
2091         return desc_lookup_text[i];
2092 }
2093
2094 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2095 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2096
2097 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2098 {
2099         u32 data2, line;
2100         u32 desc, time, count, base, data1;
2101         u32 blink1, blink2, ilink1, ilink2;
2102         u32 pc, hcmd;
2103
2104         if (priv->ucode_type == UCODE_INIT) {
2105                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2106                 if (!base)
2107                         base = priv->_agn.init_errlog_ptr;
2108         } else {
2109                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2110                 if (!base)
2111                         base = priv->_agn.inst_errlog_ptr;
2112         }
2113
2114         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2115                 IWL_ERR(priv,
2116                         "Not valid error log pointer 0x%08X for %s uCode\n",
2117                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2118                 return;
2119         }
2120
2121         count = iwl_read_targ_mem(priv, base);
2122
2123         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2124                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2125                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2126                         priv->status, count);
2127         }
2128
2129         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2130         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2131         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2132         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2133         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2134         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2135         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2136         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2137         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2138         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2139         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2140
2141         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2142                                       blink1, blink2, ilink1, ilink2);
2143
2144         IWL_ERR(priv, "Desc                               Time       "
2145                 "data1      data2      line\n");
2146         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
2147                 desc_lookup(desc), desc, time, data1, data2, line);
2148         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2149         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2150                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2151 }
2152
2153 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2154
2155 /**
2156  * iwl_print_event_log - Dump error event log to syslog
2157  *
2158  */
2159 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2160                                u32 num_events, u32 mode,
2161                                int pos, char **buf, size_t bufsz)
2162 {
2163         u32 i;
2164         u32 base;       /* SRAM byte address of event log header */
2165         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2166         u32 ptr;        /* SRAM byte address of log data */
2167         u32 ev, time, data; /* event log data */
2168         unsigned long reg_flags;
2169
2170         if (num_events == 0)
2171                 return pos;
2172
2173         if (priv->ucode_type == UCODE_INIT) {
2174                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2175                 if (!base)
2176                         base = priv->_agn.init_evtlog_ptr;
2177         } else {
2178                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2179                 if (!base)
2180                         base = priv->_agn.inst_evtlog_ptr;
2181         }
2182
2183         if (mode == 0)
2184                 event_size = 2 * sizeof(u32);
2185         else
2186                 event_size = 3 * sizeof(u32);
2187
2188         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2189
2190         /* Make sure device is powered up for SRAM reads */
2191         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2192         iwl_grab_nic_access(priv);
2193
2194         /* Set starting address; reads will auto-increment */
2195         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2196         rmb();
2197
2198         /* "time" is actually "data" for mode 0 (no timestamp).
2199         * place event id # at far right for easier visual parsing. */
2200         for (i = 0; i < num_events; i++) {
2201                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2202                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2203                 if (mode == 0) {
2204                         /* data, ev */
2205                         if (bufsz) {
2206                                 pos += scnprintf(*buf + pos, bufsz - pos,
2207                                                 "EVT_LOG:0x%08x:%04u\n",
2208                                                 time, ev);
2209                         } else {
2210                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2211                                         time, ev);
2212                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2213                                         time, ev);
2214                         }
2215                 } else {
2216                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2217                         if (bufsz) {
2218                                 pos += scnprintf(*buf + pos, bufsz - pos,
2219                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2220                                                  time, data, ev);
2221                         } else {
2222                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2223                                         time, data, ev);
2224                                 trace_iwlwifi_dev_ucode_event(priv, time,
2225                                         data, ev);
2226                         }
2227                 }
2228         }
2229
2230         /* Allow device to power down */
2231         iwl_release_nic_access(priv);
2232         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2233         return pos;
2234 }
2235
2236 /**
2237  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2238  */
2239 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2240                                     u32 num_wraps, u32 next_entry,
2241                                     u32 size, u32 mode,
2242                                     int pos, char **buf, size_t bufsz)
2243 {
2244         /*
2245          * display the newest DEFAULT_LOG_ENTRIES entries
2246          * i.e the entries just before the next ont that uCode would fill.
2247          */
2248         if (num_wraps) {
2249                 if (next_entry < size) {
2250                         pos = iwl_print_event_log(priv,
2251                                                 capacity - (size - next_entry),
2252                                                 size - next_entry, mode,
2253                                                 pos, buf, bufsz);
2254                         pos = iwl_print_event_log(priv, 0,
2255                                                   next_entry, mode,
2256                                                   pos, buf, bufsz);
2257                 } else
2258                         pos = iwl_print_event_log(priv, next_entry - size,
2259                                                   size, mode, pos, buf, bufsz);
2260         } else {
2261                 if (next_entry < size) {
2262                         pos = iwl_print_event_log(priv, 0, next_entry,
2263                                                   mode, pos, buf, bufsz);
2264                 } else {
2265                         pos = iwl_print_event_log(priv, next_entry - size,
2266                                                   size, mode, pos, buf, bufsz);
2267                 }
2268         }
2269         return pos;
2270 }
2271
2272 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2273
2274 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2275                             char **buf, bool display)
2276 {
2277         u32 base;       /* SRAM byte address of event log header */
2278         u32 capacity;   /* event log capacity in # entries */
2279         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2280         u32 num_wraps;  /* # times uCode wrapped to top of log */
2281         u32 next_entry; /* index of next entry to be written by uCode */
2282         u32 size;       /* # entries that we'll print */
2283         u32 logsize;
2284         int pos = 0;
2285         size_t bufsz = 0;
2286
2287         if (priv->ucode_type == UCODE_INIT) {
2288                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2289                 logsize = priv->_agn.init_evtlog_size;
2290                 if (!base)
2291                         base = priv->_agn.init_evtlog_ptr;
2292         } else {
2293                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2294                 logsize = priv->_agn.inst_evtlog_size;
2295                 if (!base)
2296                         base = priv->_agn.inst_evtlog_ptr;
2297         }
2298
2299         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2300                 IWL_ERR(priv,
2301                         "Invalid event log pointer 0x%08X for %s uCode\n",
2302                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2303                 return -EINVAL;
2304         }
2305
2306         /* event log header */
2307         capacity = iwl_read_targ_mem(priv, base);
2308         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2309         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2310         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2311
2312         if (capacity > logsize) {
2313                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2314                         capacity, logsize);
2315                 capacity = logsize;
2316         }
2317
2318         if (next_entry > logsize) {
2319                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2320                         next_entry, logsize);
2321                 next_entry = logsize;
2322         }
2323
2324         size = num_wraps ? capacity : next_entry;
2325
2326         /* bail out if nothing in log */
2327         if (size == 0) {
2328                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2329                 return pos;
2330         }
2331
2332 #ifdef CONFIG_IWLWIFI_DEBUG
2333         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2334                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2335                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2336 #else
2337         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2338                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2339 #endif
2340         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2341                 size);
2342
2343 #ifdef CONFIG_IWLWIFI_DEBUG
2344         if (display) {
2345                 if (full_log)
2346                         bufsz = capacity * 48;
2347                 else
2348                         bufsz = size * 48;
2349                 *buf = kmalloc(bufsz, GFP_KERNEL);
2350                 if (!*buf)
2351                         return -ENOMEM;
2352         }
2353         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2354                 /*
2355                  * if uCode has wrapped back to top of log,
2356                  * start at the oldest entry,
2357                  * i.e the next one that uCode would fill.
2358                  */
2359                 if (num_wraps)
2360                         pos = iwl_print_event_log(priv, next_entry,
2361                                                 capacity - next_entry, mode,
2362                                                 pos, buf, bufsz);
2363                 /* (then/else) start at top of log */
2364                 pos = iwl_print_event_log(priv, 0,
2365                                           next_entry, mode, pos, buf, bufsz);
2366         } else
2367                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2368                                                 next_entry, size, mode,
2369                                                 pos, buf, bufsz);
2370 #else
2371         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2372                                         next_entry, size, mode,
2373                                         pos, buf, bufsz);
2374 #endif
2375         return pos;
2376 }
2377
2378 /**
2379  * iwl_alive_start - called after REPLY_ALIVE notification received
2380  *                   from protocol/runtime uCode (initialization uCode's
2381  *                   Alive gets handled by iwl_init_alive_start()).
2382  */
2383 static void iwl_alive_start(struct iwl_priv *priv)
2384 {
2385         int ret = 0;
2386
2387         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2388
2389         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2390                 /* We had an error bringing up the hardware, so take it
2391                  * all the way back down so we can try again */
2392                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2393                 goto restart;
2394         }
2395
2396         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2397          * This is a paranoid check, because we would not have gotten the
2398          * "runtime" alive if code weren't properly loaded.  */
2399         if (iwl_verify_ucode(priv)) {
2400                 /* Runtime instruction load was bad;
2401                  * take it all the way back down so we can try again */
2402                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2403                 goto restart;
2404         }
2405
2406         ret = priv->cfg->ops->lib->alive_notify(priv);
2407         if (ret) {
2408                 IWL_WARN(priv,
2409                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2410                 goto restart;
2411         }
2412
2413         /* After the ALIVE response, we can send host commands to the uCode */
2414         set_bit(STATUS_ALIVE, &priv->status);
2415
2416         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2417                 /* Enable timer to monitor the driver queues */
2418                 mod_timer(&priv->monitor_recover,
2419                         jiffies +
2420                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2421         }
2422
2423         if (iwl_is_rfkill(priv))
2424                 return;
2425
2426         ieee80211_wake_queues(priv->hw);
2427
2428         priv->active_rate = IWL_RATES_MASK;
2429
2430         /* Configure Tx antenna selection based on H/W config */
2431         if (priv->cfg->ops->hcmd->set_tx_ant)
2432                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2433
2434         if (iwl_is_associated(priv)) {
2435                 struct iwl_rxon_cmd *active_rxon =
2436                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2437                 /* apply any changes in staging */
2438                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2439                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2440         } else {
2441                 /* Initialize our rx_config data */
2442                 iwl_connection_init_rx_config(priv, NULL);
2443
2444                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2445                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2446
2447                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2448         }
2449
2450         /* Configure Bluetooth device coexistence support */
2451         priv->cfg->ops->hcmd->send_bt_config(priv);
2452
2453         iwl_reset_run_time_calib(priv);
2454
2455         /* Configure the adapter for unassociated operation */
2456         iwlcore_commit_rxon(priv);
2457
2458         /* At this point, the NIC is initialized and operational */
2459         iwl_rf_kill_ct_config(priv);
2460
2461         iwl_leds_init(priv);
2462
2463         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2464         set_bit(STATUS_READY, &priv->status);
2465         wake_up_interruptible(&priv->wait_command_queue);
2466
2467         iwl_power_update_mode(priv, true);
2468         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2469
2470
2471         return;
2472
2473  restart:
2474         queue_work(priv->workqueue, &priv->restart);
2475 }
2476
2477 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2478
2479 static void __iwl_down(struct iwl_priv *priv)
2480 {
2481         unsigned long flags;
2482         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2483
2484         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2485
2486         if (!exit_pending)
2487                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2488
2489         iwl_clear_ucode_stations(priv);
2490         iwl_dealloc_bcast_station(priv);
2491         iwl_clear_driver_stations(priv);
2492
2493         /* Unblock any waiting calls */
2494         wake_up_interruptible_all(&priv->wait_command_queue);
2495
2496         /* Wipe out the EXIT_PENDING status bit if we are not actually
2497          * exiting the module */
2498         if (!exit_pending)
2499                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2500
2501         /* stop and reset the on-board processor */
2502         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2503
2504         /* tell the device to stop sending interrupts */
2505         spin_lock_irqsave(&priv->lock, flags);
2506         iwl_disable_interrupts(priv);
2507         spin_unlock_irqrestore(&priv->lock, flags);
2508         iwl_synchronize_irq(priv);
2509
2510         if (priv->mac80211_registered)
2511                 ieee80211_stop_queues(priv->hw);
2512
2513         /* If we have not previously called iwl_init() then
2514          * clear all bits but the RF Kill bit and return */
2515         if (!iwl_is_init(priv)) {
2516                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2517                                         STATUS_RF_KILL_HW |
2518                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2519                                         STATUS_GEO_CONFIGURED |
2520                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2521                                         STATUS_EXIT_PENDING;
2522                 goto exit;
2523         }
2524
2525         /* ...otherwise clear out all the status bits but the RF Kill
2526          * bit and continue taking the NIC down. */
2527         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2528                                 STATUS_RF_KILL_HW |
2529                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2530                                 STATUS_GEO_CONFIGURED |
2531                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2532                                 STATUS_FW_ERROR |
2533                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2534                                 STATUS_EXIT_PENDING;
2535
2536         /* device going down, Stop using ICT table */
2537         iwl_disable_ict(priv);
2538
2539         iwlagn_txq_ctx_stop(priv);
2540         iwlagn_rxq_stop(priv);
2541
2542         /* Power-down device's busmaster DMA clocks */
2543         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2544         udelay(5);
2545
2546         /* Make sure (redundant) we've released our request to stay awake */
2547         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2548
2549         /* Stop the device, and put it in low power state */
2550         priv->cfg->ops->lib->apm_ops.stop(priv);
2551
2552  exit:
2553         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2554
2555         if (priv->ibss_beacon)
2556                 dev_kfree_skb(priv->ibss_beacon);
2557         priv->ibss_beacon = NULL;
2558
2559         /* clear out any free frames */
2560         iwl_clear_free_frames(priv);
2561 }
2562
2563 static void iwl_down(struct iwl_priv *priv)
2564 {
2565         mutex_lock(&priv->mutex);
2566         __iwl_down(priv);
2567         mutex_unlock(&priv->mutex);
2568
2569         iwl_cancel_deferred_work(priv);
2570 }
2571
2572 #define HW_READY_TIMEOUT (50)
2573
2574 static int iwl_set_hw_ready(struct iwl_priv *priv)
2575 {
2576         int ret = 0;
2577
2578         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2579                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2580
2581         /* See if we got it */
2582         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2583                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2584                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2585                                 HW_READY_TIMEOUT);
2586         if (ret != -ETIMEDOUT)
2587                 priv->hw_ready = true;
2588         else
2589                 priv->hw_ready = false;
2590
2591         IWL_DEBUG_INFO(priv, "hardware %s\n",
2592                       (priv->hw_ready == 1) ? "ready" : "not ready");
2593         return ret;
2594 }
2595
2596 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2597 {
2598         int ret = 0;
2599
2600         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2601
2602         ret = iwl_set_hw_ready(priv);
2603         if (priv->hw_ready)
2604                 return ret;
2605
2606         /* If HW is not ready, prepare the conditions to check again */
2607         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2608                         CSR_HW_IF_CONFIG_REG_PREPARE);
2609
2610         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2611                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2612                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2613
2614         /* HW should be ready by now, check again. */
2615         if (ret != -ETIMEDOUT)
2616                 iwl_set_hw_ready(priv);
2617
2618         return ret;
2619 }
2620
2621 #define MAX_HW_RESTARTS 5
2622
2623 static int __iwl_up(struct iwl_priv *priv)
2624 {
2625         int i;
2626         int ret;
2627
2628         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2629                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2630                 return -EIO;
2631         }
2632
2633         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2634                 IWL_ERR(priv, "ucode not available for device bringup\n");
2635                 return -EIO;
2636         }
2637
2638         ret = iwl_alloc_bcast_station(priv, true);
2639         if (ret)
2640                 return ret;
2641
2642         iwl_prepare_card_hw(priv);
2643
2644         if (!priv->hw_ready) {
2645                 IWL_WARN(priv, "Exit HW not ready\n");
2646                 return -EIO;
2647         }
2648
2649         /* If platform's RF_KILL switch is NOT set to KILL */
2650         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2651                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2652         else
2653                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2654
2655         if (iwl_is_rfkill(priv)) {
2656                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2657
2658                 iwl_enable_interrupts(priv);
2659                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2660                 return 0;
2661         }
2662
2663         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2664
2665         ret = iwlagn_hw_nic_init(priv);
2666         if (ret) {
2667                 IWL_ERR(priv, "Unable to init nic\n");
2668                 return ret;
2669         }
2670
2671         /* make sure rfkill handshake bits are cleared */
2672         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2673         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2674                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2675
2676         /* clear (again), then enable host interrupts */
2677         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2678         iwl_enable_interrupts(priv);
2679
2680         /* really make sure rfkill handshake bits are cleared */
2681         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2682         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2683
2684         /* Copy original ucode data image from disk into backup cache.
2685          * This will be used to initialize the on-board processor's
2686          * data SRAM for a clean start when the runtime program first loads. */
2687         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2688                priv->ucode_data.len);
2689
2690         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2691
2692                 /* load bootstrap state machine,
2693                  * load bootstrap program into processor's memory,
2694                  * prepare to load the "initialize" uCode */
2695                 ret = priv->cfg->ops->lib->load_ucode(priv);
2696
2697                 if (ret) {
2698                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2699                                 ret);
2700                         continue;
2701                 }
2702
2703                 /* start card; "initialize" will load runtime ucode */
2704                 iwl_nic_start(priv);
2705
2706                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2707
2708                 return 0;
2709         }
2710
2711         set_bit(STATUS_EXIT_PENDING, &priv->status);
2712         __iwl_down(priv);
2713         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2714
2715         /* tried to restart and config the device for as long as our
2716          * patience could withstand */
2717         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2718         return -EIO;
2719 }
2720
2721
2722 /*****************************************************************************
2723  *
2724  * Workqueue callbacks
2725  *
2726  *****************************************************************************/
2727
2728 static void iwl_bg_init_alive_start(struct work_struct *data)
2729 {
2730         struct iwl_priv *priv =
2731             container_of(data, struct iwl_priv, init_alive_start.work);
2732
2733         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2734                 return;
2735
2736         mutex_lock(&priv->mutex);
2737         priv->cfg->ops->lib->init_alive_start(priv);
2738         mutex_unlock(&priv->mutex);
2739 }
2740
2741 static void iwl_bg_alive_start(struct work_struct *data)
2742 {
2743         struct iwl_priv *priv =
2744             container_of(data, struct iwl_priv, alive_start.work);
2745
2746         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2747                 return;
2748
2749         /* enable dram interrupt */
2750         iwl_reset_ict(priv);
2751
2752         mutex_lock(&priv->mutex);
2753         iwl_alive_start(priv);
2754         mutex_unlock(&priv->mutex);
2755 }
2756
2757 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2758 {
2759         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2760                         run_time_calib_work);
2761
2762         mutex_lock(&priv->mutex);
2763
2764         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2765             test_bit(STATUS_SCANNING, &priv->status)) {
2766                 mutex_unlock(&priv->mutex);
2767                 return;
2768         }
2769
2770         if (priv->start_calib) {
2771                 iwl_chain_noise_calibration(priv, &priv->_agn.statistics);
2772
2773                 iwl_sensitivity_calibration(priv, &priv->_agn.statistics);
2774         }
2775
2776         mutex_unlock(&priv->mutex);
2777         return;
2778 }
2779
2780 static void iwl_bg_restart(struct work_struct *data)
2781 {
2782         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2783
2784         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2785                 return;
2786
2787         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2788                 mutex_lock(&priv->mutex);
2789                 priv->vif = NULL;
2790                 priv->is_open = 0;
2791                 mutex_unlock(&priv->mutex);
2792                 iwl_down(priv);
2793                 ieee80211_restart_hw(priv->hw);
2794         } else {
2795                 iwl_down(priv);
2796
2797                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2798                         return;
2799
2800                 mutex_lock(&priv->mutex);
2801                 __iwl_up(priv);
2802                 mutex_unlock(&priv->mutex);
2803         }
2804 }
2805
2806 static void iwl_bg_rx_replenish(struct work_struct *data)
2807 {
2808         struct iwl_priv *priv =
2809             container_of(data, struct iwl_priv, rx_replenish);
2810
2811         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2812                 return;
2813
2814         mutex_lock(&priv->mutex);
2815         iwlagn_rx_replenish(priv);
2816         mutex_unlock(&priv->mutex);
2817 }
2818
2819 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2820
2821 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
2822 {
2823         struct ieee80211_conf *conf = NULL;
2824         int ret = 0;
2825
2826         if (!vif || !priv->is_open)
2827                 return;
2828
2829         if (vif->type == NL80211_IFTYPE_AP) {
2830                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2831                 return;
2832         }
2833
2834         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2835                 return;
2836
2837         iwl_scan_cancel_timeout(priv, 200);
2838
2839         conf = ieee80211_get_hw_conf(priv->hw);
2840
2841         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2842         iwlcore_commit_rxon(priv);
2843
2844         iwl_setup_rxon_timing(priv, vif);
2845         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2846                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2847         if (ret)
2848                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2849                             "Attempting to continue.\n");
2850
2851         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2852
2853         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2854
2855         if (priv->cfg->ops->hcmd->set_rxon_chain)
2856                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2857
2858         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
2859
2860         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2861                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
2862
2863         if (vif->bss_conf.use_short_preamble)
2864                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2865         else
2866                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2867
2868         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2869                 if (vif->bss_conf.use_short_slot)
2870                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2871                 else
2872                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2873         }
2874
2875         iwlcore_commit_rxon(priv);
2876
2877         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2878                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
2879
2880         switch (vif->type) {
2881         case NL80211_IFTYPE_STATION:
2882                 break;
2883         case NL80211_IFTYPE_ADHOC:
2884                 iwl_send_beacon_cmd(priv);
2885                 break;
2886         default:
2887                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2888                           __func__, vif->type);
2889                 break;
2890         }
2891
2892         /* the chain noise calibration will enabled PM upon completion
2893          * If chain noise has already been run, then we need to enable
2894          * power management here */
2895         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2896                 iwl_power_update_mode(priv, false);
2897
2898         /* Enable Rx differential gain and sensitivity calibrations */
2899         iwl_chain_noise_reset(priv);
2900         priv->start_calib = 1;
2901
2902 }
2903
2904 /*****************************************************************************
2905  *
2906  * mac80211 entry point functions
2907  *
2908  *****************************************************************************/
2909
2910 #define UCODE_READY_TIMEOUT     (4 * HZ)
2911
2912 /*
2913  * Not a mac80211 entry point function, but it fits in with all the
2914  * other mac80211 functions grouped here.
2915  */
2916 static int iwl_mac_setup_register(struct iwl_priv *priv,
2917                                   struct iwlagn_ucode_capabilities *capa)
2918 {
2919         int ret;
2920         struct ieee80211_hw *hw = priv->hw;
2921         hw->rate_control_algorithm = "iwl-agn-rs";
2922
2923         /* Tell mac80211 our characteristics */
2924         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2925                     IEEE80211_HW_AMPDU_AGGREGATION |
2926                     IEEE80211_HW_SPECTRUM_MGMT;
2927
2928         if (!priv->cfg->broken_powersave)
2929                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2930                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2931
2932         if (priv->cfg->sku & IWL_SKU_N)
2933                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2934                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2935
2936         hw->sta_data_size = sizeof(struct iwl_station_priv);
2937         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2938
2939         hw->wiphy->interface_modes =
2940                 BIT(NL80211_IFTYPE_STATION) |
2941                 BIT(NL80211_IFTYPE_ADHOC);
2942
2943         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2944                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2945
2946         /*
2947          * For now, disable PS by default because it affects
2948          * RX performance significantly.
2949          */
2950         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2951
2952         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2953         /* we create the 802.11 header and a zero-length SSID element */
2954         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
2955
2956         /* Default value; 4 EDCA QOS priorities */
2957         hw->queues = 4;
2958
2959         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2960
2961         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2962                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2963                         &priv->bands[IEEE80211_BAND_2GHZ];
2964         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2965                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2966                         &priv->bands[IEEE80211_BAND_5GHZ];
2967
2968         ret = ieee80211_register_hw(priv->hw);
2969         if (ret) {
2970                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2971                 return ret;
2972         }
2973         priv->mac80211_registered = 1;
2974
2975         return 0;
2976 }
2977
2978
2979 static int iwl_mac_start(struct ieee80211_hw *hw)
2980 {
2981         struct iwl_priv *priv = hw->priv;
2982         int ret;
2983
2984         IWL_DEBUG_MAC80211(priv, "enter\n");
2985
2986         /* we should be verifying the device is ready to be opened */
2987         mutex_lock(&priv->mutex);
2988         ret = __iwl_up(priv);
2989         mutex_unlock(&priv->mutex);
2990
2991         if (ret)
2992                 return ret;
2993
2994         if (iwl_is_rfkill(priv))
2995                 goto out;
2996
2997         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2998
2999         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3000          * mac80211 will not be run successfully. */
3001         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3002                         test_bit(STATUS_READY, &priv->status),
3003                         UCODE_READY_TIMEOUT);
3004         if (!ret) {
3005                 if (!test_bit(STATUS_READY, &priv->status)) {
3006                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3007                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3008                         return -ETIMEDOUT;
3009                 }
3010         }
3011
3012         iwl_led_start(priv);
3013
3014 out:
3015         priv->is_open = 1;
3016         IWL_DEBUG_MAC80211(priv, "leave\n");
3017         return 0;
3018 }
3019
3020 static void iwl_mac_stop(struct ieee80211_hw *hw)
3021 {
3022         struct iwl_priv *priv = hw->priv;
3023
3024         IWL_DEBUG_MAC80211(priv, "enter\n");
3025
3026         if (!priv->is_open)
3027                 return;
3028
3029         priv->is_open = 0;
3030
3031         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3032                 /* stop mac, cancel any scan request and clear
3033                  * RXON_FILTER_ASSOC_MSK BIT
3034                  */
3035                 mutex_lock(&priv->mutex);
3036                 iwl_scan_cancel_timeout(priv, 100);
3037                 mutex_unlock(&priv->mutex);
3038         }
3039
3040         iwl_down(priv);
3041
3042         flush_workqueue(priv->workqueue);
3043
3044         /* enable interrupts again in order to receive rfkill changes */
3045         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3046         iwl_enable_interrupts(priv);
3047
3048         IWL_DEBUG_MAC80211(priv, "leave\n");
3049 }
3050
3051 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3052 {
3053         struct iwl_priv *priv = hw->priv;
3054
3055         IWL_DEBUG_MACDUMP(priv, "enter\n");
3056
3057         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3058                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3059
3060         if (iwlagn_tx_skb(priv, skb))
3061                 dev_kfree_skb_any(skb);
3062
3063         IWL_DEBUG_MACDUMP(priv, "leave\n");
3064         return NETDEV_TX_OK;
3065 }
3066
3067 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3068 {
3069         int ret = 0;
3070
3071         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3072                 return;
3073
3074         /* The following should be done only at AP bring up */
3075         if (!iwl_is_associated(priv)) {
3076
3077                 /* RXON - unassoc (to set timing command) */
3078                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3079                 iwlcore_commit_rxon(priv);
3080
3081                 /* RXON Timing */
3082                 iwl_setup_rxon_timing(priv, vif);
3083                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3084                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
3085                 if (ret)
3086                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3087                                         "Attempting to continue.\n");
3088
3089                 /* AP has all antennas */
3090                 priv->chain_noise_data.active_chains =
3091                         priv->hw_params.valid_rx_ant;
3092                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3093                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3094                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3095
3096                 priv->staging_rxon.assoc_id = 0;
3097
3098                 if (vif->bss_conf.use_short_preamble)
3099                         priv->staging_rxon.flags |=
3100                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3101                 else
3102                         priv->staging_rxon.flags &=
3103                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3104
3105                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3106                         if (vif->bss_conf.use_short_slot)
3107                                 priv->staging_rxon.flags |=
3108                                         RXON_FLG_SHORT_SLOT_MSK;
3109                         else
3110                                 priv->staging_rxon.flags &=
3111                                         ~RXON_FLG_SHORT_SLOT_MSK;
3112                 }
3113                 /* restore RXON assoc */
3114                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3115                 iwlcore_commit_rxon(priv);
3116         }
3117         iwl_send_beacon_cmd(priv);
3118
3119         /* FIXME - we need to add code here to detect a totally new
3120          * configuration, reset the AP, unassoc, rxon timing, assoc,
3121          * clear sta table, add BCAST sta... */
3122 }
3123
3124 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3125                                     struct ieee80211_vif *vif,
3126                                     struct ieee80211_key_conf *keyconf,
3127                                     struct ieee80211_sta *sta,
3128                                     u32 iv32, u16 *phase1key)
3129 {
3130
3131         struct iwl_priv *priv = hw->priv;
3132         IWL_DEBUG_MAC80211(priv, "enter\n");
3133
3134         iwl_update_tkip_key(priv, keyconf, sta,
3135                             iv32, phase1key);
3136
3137         IWL_DEBUG_MAC80211(priv, "leave\n");
3138 }
3139
3140 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3141                            struct ieee80211_vif *vif,
3142                            struct ieee80211_sta *sta,
3143                            struct ieee80211_key_conf *key)
3144 {
3145         struct iwl_priv *priv = hw->priv;
3146         int ret;
3147         u8 sta_id;
3148         bool is_default_wep_key = false;
3149
3150         IWL_DEBUG_MAC80211(priv, "enter\n");
3151
3152         if (priv->cfg->mod_params->sw_crypto) {
3153                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3154                 return -EOPNOTSUPP;
3155         }
3156
3157         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3158         if (sta_id == IWL_INVALID_STATION)
3159                 return -EINVAL;
3160
3161         mutex_lock(&priv->mutex);
3162         iwl_scan_cancel_timeout(priv, 100);
3163
3164         /*
3165          * If we are getting WEP group key and we didn't receive any key mapping
3166          * so far, we are in legacy wep mode (group key only), otherwise we are
3167          * in 1X mode.
3168          * In legacy wep mode, we use another host command to the uCode.
3169          */
3170         if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) {
3171                 if (cmd == SET_KEY)
3172                         is_default_wep_key = !priv->key_mapping_key;
3173                 else
3174                         is_default_wep_key =
3175                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3176         }
3177
3178         switch (cmd) {
3179         case SET_KEY:
3180                 if (is_default_wep_key)
3181                         ret = iwl_set_default_wep_key(priv, key);
3182                 else
3183                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3184
3185                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3186                 break;
3187         case DISABLE_KEY:
3188                 if (is_default_wep_key)
3189                         ret = iwl_remove_default_wep_key(priv, key);
3190                 else
3191                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3192
3193                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3194                 break;
3195         default:
3196                 ret = -EINVAL;
3197         }
3198
3199         mutex_unlock(&priv->mutex);
3200         IWL_DEBUG_MAC80211(priv, "leave\n");
3201
3202         return ret;
3203 }
3204
3205 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3206                                 struct ieee80211_vif *vif,
3207                                 enum ieee80211_ampdu_mlme_action action,
3208                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3209 {
3210         struct iwl_priv *priv = hw->priv;
3211         int ret;
3212
3213         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3214                      sta->addr, tid);
3215
3216         if (!(priv->cfg->sku & IWL_SKU_N))
3217                 return -EACCES;
3218
3219         switch (action) {
3220         case IEEE80211_AMPDU_RX_START:
3221                 IWL_DEBUG_HT(priv, "start Rx\n");
3222                 return iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3223         case IEEE80211_AMPDU_RX_STOP:
3224                 IWL_DEBUG_HT(priv, "stop Rx\n");
3225                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3226                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3227                         return 0;
3228                 else
3229                         return ret;
3230         case IEEE80211_AMPDU_TX_START:
3231                 IWL_DEBUG_HT(priv, "start Tx\n");
3232                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3233                 if (ret == 0) {
3234                         priv->_agn.agg_tids_count++;
3235                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3236                                      priv->_agn.agg_tids_count);
3237                 }
3238                 return ret;
3239         case IEEE80211_AMPDU_TX_STOP:
3240                 IWL_DEBUG_HT(priv, "stop Tx\n");
3241                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3242                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3243                         priv->_agn.agg_tids_count--;
3244                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3245                                      priv->_agn.agg_tids_count);
3246                 }
3247                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3248                         return 0;
3249                 else
3250                         return ret;
3251         case IEEE80211_AMPDU_TX_OPERATIONAL:
3252                 /* do nothing */
3253                 return -EOPNOTSUPP;
3254         default:
3255                 IWL_DEBUG_HT(priv, "unknown\n");
3256                 return -EINVAL;
3257                 break;
3258         }
3259         return 0;
3260 }
3261
3262 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3263                                struct ieee80211_vif *vif,
3264                                enum sta_notify_cmd cmd,
3265                                struct ieee80211_sta *sta)
3266 {
3267         struct iwl_priv *priv = hw->priv;
3268         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3269         int sta_id;
3270
3271         switch (cmd) {
3272         case STA_NOTIFY_SLEEP:
3273                 WARN_ON(!sta_priv->client);
3274                 sta_priv->asleep = true;
3275                 if (atomic_read(&sta_priv->pending_frames) > 0)
3276                         ieee80211_sta_block_awake(hw, sta, true);
3277                 break;
3278         case STA_NOTIFY_AWAKE:
3279                 WARN_ON(!sta_priv->client);
3280                 if (!sta_priv->asleep)
3281                         break;
3282                 sta_priv->asleep = false;
3283                 sta_id = iwl_sta_id(sta);
3284                 if (sta_id != IWL_INVALID_STATION)
3285                         iwl_sta_modify_ps_wake(priv, sta_id);
3286                 break;
3287         default:
3288                 break;
3289         }
3290 }
3291
3292 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3293                               struct ieee80211_vif *vif,
3294                               struct ieee80211_sta *sta)
3295 {
3296         struct iwl_priv *priv = hw->priv;
3297         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3298         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3299         int ret;
3300         u8 sta_id;
3301
3302         sta_priv->common.sta_id = IWL_INVALID_STATION;
3303
3304         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3305                         sta->addr);
3306
3307         atomic_set(&sta_priv->pending_frames, 0);
3308         if (vif->type == NL80211_IFTYPE_AP)
3309                 sta_priv->client = true;
3310
3311         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3312                                      &sta_id);
3313         if (ret) {
3314                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3315                         sta->addr, ret);
3316                 /* Should we return success if return code is EEXIST ? */
3317                 return ret;
3318         }
3319
3320         sta_priv->common.sta_id = sta_id;
3321
3322         /* Initialize rate scaling */
3323         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3324                        sta->addr);
3325         iwl_rs_rate_init(priv, sta, sta_id);
3326
3327         return 0;
3328 }
3329
3330 /*****************************************************************************
3331  *
3332  * sysfs attributes
3333  *
3334  *****************************************************************************/
3335
3336 #ifdef CONFIG_IWLWIFI_DEBUG
3337
3338 /*
3339  * The following adds a new attribute to the sysfs representation
3340  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3341  * used for controlling the debug level.
3342  *
3343  * See the level definitions in iwl for details.
3344  *
3345  * The debug_level being managed using sysfs below is a per device debug
3346  * level that is used instead of the global debug level if it (the per
3347  * device debug level) is set.
3348  */
3349 static ssize_t show_debug_level(struct device *d,
3350                                 struct device_attribute *attr, char *buf)
3351 {
3352         struct iwl_priv *priv = dev_get_drvdata(d);
3353         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3354 }
3355 static ssize_t store_debug_level(struct device *d,
3356                                 struct device_attribute *attr,
3357                                  const char *buf, size_t count)
3358 {
3359         struct iwl_priv *priv = dev_get_drvdata(d);
3360         unsigned long val;
3361         int ret;
3362
3363         ret = strict_strtoul(buf, 0, &val);
3364         if (ret)
3365                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3366         else {
3367                 priv->debug_level = val;
3368                 if (iwl_alloc_traffic_mem(priv))
3369                         IWL_ERR(priv,
3370                                 "Not enough memory to generate traffic log\n");
3371         }
3372         return strnlen(buf, count);
3373 }
3374
3375 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3376                         show_debug_level, store_debug_level);
3377
3378
3379 #endif /* CONFIG_IWLWIFI_DEBUG */
3380
3381
3382 static ssize_t show_temperature(struct device *d,
3383                                 struct device_attribute *attr, char *buf)
3384 {
3385         struct iwl_priv *priv = dev_get_drvdata(d);
3386
3387         if (!iwl_is_alive(priv))
3388                 return -EAGAIN;
3389
3390         return sprintf(buf, "%d\n", priv->temperature);
3391 }
3392
3393 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3394
3395 static ssize_t show_tx_power(struct device *d,
3396                              struct device_attribute *attr, char *buf)
3397 {
3398         struct iwl_priv *priv = dev_get_drvdata(d);
3399
3400         if (!iwl_is_ready_rf(priv))
3401                 return sprintf(buf, "off\n");
3402         else
3403                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3404 }
3405
3406 static ssize_t store_tx_power(struct device *d,
3407                               struct device_attribute *attr,
3408                               const char *buf, size_t count)
3409 {
3410         struct iwl_priv *priv = dev_get_drvdata(d);
3411         unsigned long val;
3412         int ret;
3413
3414         ret = strict_strtoul(buf, 10, &val);
3415         if (ret)
3416                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3417         else {
3418                 ret = iwl_set_tx_power(priv, val, false);
3419                 if (ret)
3420                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3421                                 ret);
3422                 else
3423                         ret = count;
3424         }
3425         return ret;
3426 }
3427
3428 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3429
3430 static ssize_t show_rts_ht_protection(struct device *d,
3431                              struct device_attribute *attr, char *buf)
3432 {
3433         struct iwl_priv *priv = dev_get_drvdata(d);
3434
3435         return sprintf(buf, "%s\n",
3436                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3437 }
3438
3439 static ssize_t store_rts_ht_protection(struct device *d,
3440                               struct device_attribute *attr,
3441                               const char *buf, size_t count)
3442 {
3443         struct iwl_priv *priv = dev_get_drvdata(d);
3444         unsigned long val;
3445         int ret;
3446
3447         ret = strict_strtoul(buf, 10, &val);
3448         if (ret)
3449                 IWL_INFO(priv, "Input is not in decimal form.\n");
3450         else {
3451                 if (!iwl_is_associated(priv))
3452                         priv->cfg->use_rts_for_ht = val ? true : false;
3453                 else
3454                         IWL_ERR(priv, "Sta associated with AP - "
3455                                 "Change protection mechanism is not allowed\n");
3456                 ret = count;
3457         }
3458         return ret;
3459 }
3460
3461 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3462                         show_rts_ht_protection, store_rts_ht_protection);
3463
3464
3465 /*****************************************************************************
3466  *
3467  * driver setup and teardown
3468  *
3469  *****************************************************************************/
3470
3471 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3472 {
3473         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3474
3475         init_waitqueue_head(&priv->wait_command_queue);
3476
3477         INIT_WORK(&priv->restart, iwl_bg_restart);
3478         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3479         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3480         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3481         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3482         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3483
3484         iwl_setup_scan_deferred_work(priv);
3485
3486         if (priv->cfg->ops->lib->setup_deferred_work)
3487                 priv->cfg->ops->lib->setup_deferred_work(priv);
3488
3489         init_timer(&priv->statistics_periodic);
3490         priv->statistics_periodic.data = (unsigned long)priv;
3491         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3492
3493         init_timer(&priv->ucode_trace);
3494         priv->ucode_trace.data = (unsigned long)priv;
3495         priv->ucode_trace.function = iwl_bg_ucode_trace;
3496
3497         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3498                 init_timer(&priv->monitor_recover);
3499                 priv->monitor_recover.data = (unsigned long)priv;
3500                 priv->monitor_recover.function =
3501                         priv->cfg->ops->lib->recover_from_tx_stall;
3502         }
3503
3504         if (!priv->cfg->use_isr_legacy)
3505                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3506                         iwl_irq_tasklet, (unsigned long)priv);
3507         else
3508                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3509                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3510 }
3511
3512 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3513 {
3514         if (priv->cfg->ops->lib->cancel_deferred_work)
3515                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3516
3517         cancel_delayed_work_sync(&priv->init_alive_start);
3518         cancel_delayed_work(&priv->scan_check);
3519         cancel_work_sync(&priv->start_internal_scan);
3520         cancel_delayed_work(&priv->alive_start);
3521         cancel_work_sync(&priv->beacon_update);
3522         del_timer_sync(&priv->statistics_periodic);
3523         del_timer_sync(&priv->ucode_trace);
3524         if (priv->cfg->ops->lib->recover_from_tx_stall)
3525                 del_timer_sync(&priv->monitor_recover);
3526 }
3527
3528 static void iwl_init_hw_rates(struct iwl_priv *priv,
3529                               struct ieee80211_rate *rates)
3530 {
3531         int i;
3532
3533         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3534                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3535                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3536                 rates[i].hw_value_short = i;
3537                 rates[i].flags = 0;
3538                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3539                         /*
3540                          * If CCK != 1M then set short preamble rate flag.
3541                          */
3542                         rates[i].flags |=
3543                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3544                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3545                 }
3546         }
3547 }
3548
3549 static int iwl_init_drv(struct iwl_priv *priv)
3550 {
3551         int ret;
3552
3553         priv->ibss_beacon = NULL;
3554
3555         spin_lock_init(&priv->sta_lock);
3556         spin_lock_init(&priv->hcmd_lock);
3557
3558         INIT_LIST_HEAD(&priv->free_frames);
3559
3560         mutex_init(&priv->mutex);
3561         mutex_init(&priv->sync_cmd_mutex);
3562
3563         priv->ieee_channels = NULL;
3564         priv->ieee_rates = NULL;
3565         priv->band = IEEE80211_BAND_2GHZ;
3566
3567         priv->iw_mode = NL80211_IFTYPE_STATION;
3568         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3569         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3570         priv->_agn.agg_tids_count = 0;
3571
3572         /* initialize force reset */
3573         priv->force_reset[IWL_RF_RESET].reset_duration =
3574                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3575         priv->force_reset[IWL_FW_RESET].reset_duration =
3576                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3577
3578         /* Choose which receivers/antennas to use */
3579         if (priv->cfg->ops->hcmd->set_rxon_chain)
3580                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3581
3582         iwl_init_scan_params(priv);
3583
3584         /* Set the tx_power_user_lmt to the lowest power level
3585          * this value will get overwritten by channel max power avg
3586          * from eeprom */
3587         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3588
3589         ret = iwl_init_channel_map(priv);
3590         if (ret) {
3591                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3592                 goto err;
3593         }
3594
3595         ret = iwlcore_init_geos(priv);
3596         if (ret) {
3597                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3598                 goto err_free_channel_map;
3599         }
3600         iwl_init_hw_rates(priv, priv->ieee_rates);
3601
3602         return 0;
3603
3604 err_free_channel_map:
3605         iwl_free_channel_map(priv);
3606 err:
3607         return ret;
3608 }
3609
3610 static void iwl_uninit_drv(struct iwl_priv *priv)
3611 {
3612         iwl_calib_free_results(priv);
3613         iwlcore_free_geos(priv);
3614         iwl_free_channel_map(priv);
3615         kfree(priv->scan_cmd);
3616 }
3617
3618 static struct attribute *iwl_sysfs_entries[] = {
3619         &dev_attr_temperature.attr,
3620         &dev_attr_tx_power.attr,
3621         &dev_attr_rts_ht_protection.attr,
3622 #ifdef CONFIG_IWLWIFI_DEBUG
3623         &dev_attr_debug_level.attr,
3624 #endif
3625         NULL
3626 };
3627
3628 static struct attribute_group iwl_attribute_group = {
3629         .name = NULL,           /* put in device directory */
3630         .attrs = iwl_sysfs_entries,
3631 };
3632
3633 static struct ieee80211_ops iwl_hw_ops = {
3634         .tx = iwl_mac_tx,
3635         .start = iwl_mac_start,
3636         .stop = iwl_mac_stop,
3637         .add_interface = iwl_mac_add_interface,
3638         .remove_interface = iwl_mac_remove_interface,
3639         .config = iwl_mac_config,
3640         .configure_filter = iwl_configure_filter,
3641         .set_key = iwl_mac_set_key,
3642         .update_tkip_key = iwl_mac_update_tkip_key,
3643         .conf_tx = iwl_mac_conf_tx,
3644         .reset_tsf = iwl_mac_reset_tsf,
3645         .bss_info_changed = iwl_bss_info_changed,
3646         .ampdu_action = iwl_mac_ampdu_action,
3647         .hw_scan = iwl_mac_hw_scan,
3648         .sta_notify = iwl_mac_sta_notify,
3649         .sta_add = iwlagn_mac_sta_add,
3650         .sta_remove = iwl_mac_sta_remove,
3651 };
3652
3653 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3654 {
3655         int err = 0;
3656         struct iwl_priv *priv;
3657         struct ieee80211_hw *hw;
3658         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3659         unsigned long flags;
3660         u16 pci_cmd;
3661
3662         /************************
3663          * 1. Allocating HW data
3664          ************************/
3665
3666         /* Disabling hardware scan means that mac80211 will perform scans
3667          * "the hard way", rather than using device's scan. */
3668         if (cfg->mod_params->disable_hw_scan) {
3669                 if (iwl_debug_level & IWL_DL_INFO)
3670                         dev_printk(KERN_DEBUG, &(pdev->dev),
3671                                    "Disabling hw_scan\n");
3672                 iwl_hw_ops.hw_scan = NULL;
3673         }
3674
3675         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3676         if (!hw) {
3677                 err = -ENOMEM;
3678                 goto out;
3679         }
3680         priv = hw->priv;
3681         /* At this point both hw and priv are allocated. */
3682
3683         SET_IEEE80211_DEV(hw, &pdev->dev);
3684
3685         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3686         priv->cfg = cfg;
3687         priv->pci_dev = pdev;
3688         priv->inta_mask = CSR_INI_SET_MASK;
3689
3690 #ifdef CONFIG_IWLWIFI_DEBUG
3691         atomic_set(&priv->restrict_refcnt, 0);
3692 #endif
3693         if (iwl_alloc_traffic_mem(priv))
3694                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3695
3696         /**************************
3697          * 2. Initializing PCI bus
3698          **************************/
3699         if (pci_enable_device(pdev)) {
3700                 err = -ENODEV;
3701                 goto out_ieee80211_free_hw;
3702         }
3703
3704         pci_set_master(pdev);
3705
3706         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3707         if (!err)
3708                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3709         if (err) {
3710                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3711                 if (!err)
3712                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3713                 /* both attempts failed: */
3714                 if (err) {
3715                         IWL_WARN(priv, "No suitable DMA available.\n");
3716                         goto out_pci_disable_device;
3717                 }
3718         }
3719
3720         err = pci_request_regions(pdev, DRV_NAME);
3721         if (err)
3722                 goto out_pci_disable_device;
3723
3724         pci_set_drvdata(pdev, priv);
3725
3726
3727         /***********************
3728          * 3. Read REV register
3729          ***********************/
3730         priv->hw_base = pci_iomap(pdev, 0, 0);
3731         if (!priv->hw_base) {
3732                 err = -ENODEV;
3733                 goto out_pci_release_regions;
3734         }
3735
3736         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3737                 (unsigned long long) pci_resource_len(pdev, 0));
3738         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3739
3740         /* these spin locks will be used in apm_ops.init and EEPROM access
3741          * we should init now
3742          */
3743         spin_lock_init(&priv->reg_lock);
3744         spin_lock_init(&priv->lock);
3745
3746         /*
3747          * stop and reset the on-board processor just in case it is in a
3748          * strange state ... like being left stranded by a primary kernel
3749          * and this is now the kdump kernel trying to start up
3750          */
3751         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3752
3753         iwl_hw_detect(priv);
3754         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3755                 priv->cfg->name, priv->hw_rev);
3756
3757         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3758          * PCI Tx retries from interfering with C3 CPU state */
3759         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3760
3761         iwl_prepare_card_hw(priv);
3762         if (!priv->hw_ready) {
3763                 IWL_WARN(priv, "Failed, HW not ready\n");
3764                 goto out_iounmap;
3765         }
3766
3767         /*****************
3768          * 4. Read EEPROM
3769          *****************/
3770         /* Read the EEPROM */
3771         err = iwl_eeprom_init(priv);
3772         if (err) {
3773                 IWL_ERR(priv, "Unable to init EEPROM\n");
3774                 goto out_iounmap;
3775         }
3776         err = iwl_eeprom_check_version(priv);
3777         if (err)
3778                 goto out_free_eeprom;
3779
3780         /* extract MAC Address */
3781         iwl_eeprom_get_mac(priv, priv->mac_addr);
3782         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3783         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3784
3785         /************************
3786          * 5. Setup HW constants
3787          ************************/
3788         if (iwl_set_hw_params(priv)) {
3789                 IWL_ERR(priv, "failed to set hw parameters\n");
3790                 goto out_free_eeprom;
3791         }
3792
3793         /*******************
3794          * 6. Setup priv
3795          *******************/
3796
3797         err = iwl_init_drv(priv);
3798         if (err)
3799                 goto out_free_eeprom;
3800         /* At this point both hw and priv are initialized. */
3801
3802         /********************
3803          * 7. Setup services
3804          ********************/
3805         spin_lock_irqsave(&priv->lock, flags);
3806         iwl_disable_interrupts(priv);
3807         spin_unlock_irqrestore(&priv->lock, flags);
3808
3809         pci_enable_msi(priv->pci_dev);
3810
3811         iwl_alloc_isr_ict(priv);
3812         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3813                           IRQF_SHARED, DRV_NAME, priv);
3814         if (err) {
3815                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3816                 goto out_disable_msi;
3817         }
3818         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3819         if (err) {
3820                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3821                 goto out_free_irq;
3822         }
3823
3824         iwl_setup_deferred_work(priv);
3825         iwl_setup_rx_handlers(priv);
3826
3827         /*********************************************
3828          * 8. Enable interrupts and read RFKILL state
3829          *********************************************/
3830
3831         /* enable interrupts if needed: hw bug w/a */
3832         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3833         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3834                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3835                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3836         }
3837
3838         iwl_enable_interrupts(priv);
3839
3840         /* If platform's RF_KILL switch is NOT set to KILL */
3841         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3842                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3843         else
3844                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3845
3846         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3847                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3848
3849         iwl_power_initialize(priv);
3850         iwl_tt_initialize(priv);
3851
3852         init_completion(&priv->_agn.firmware_loading_complete);
3853
3854         err = iwl_request_firmware(priv, true);
3855         if (err)
3856                 goto out_remove_sysfs;
3857
3858         return 0;
3859
3860  out_remove_sysfs:
3861         destroy_workqueue(priv->workqueue);
3862         priv->workqueue = NULL;
3863         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3864  out_free_irq:
3865         free_irq(priv->pci_dev->irq, priv);
3866         iwl_free_isr_ict(priv);
3867  out_disable_msi:
3868         pci_disable_msi(priv->pci_dev);
3869         iwl_uninit_drv(priv);
3870  out_free_eeprom:
3871         iwl_eeprom_free(priv);
3872  out_iounmap:
3873         pci_iounmap(pdev, priv->hw_base);
3874  out_pci_release_regions:
3875         pci_set_drvdata(pdev, NULL);
3876         pci_release_regions(pdev);
3877  out_pci_disable_device:
3878         pci_disable_device(pdev);
3879  out_ieee80211_free_hw:
3880         iwl_free_traffic_mem(priv);
3881         ieee80211_free_hw(priv->hw);
3882  out:
3883         return err;
3884 }
3885
3886 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3887 {
3888         struct iwl_priv *priv = pci_get_drvdata(pdev);
3889         unsigned long flags;
3890
3891         if (!priv)
3892                 return;
3893
3894         wait_for_completion(&priv->_agn.firmware_loading_complete);
3895
3896         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3897
3898         iwl_dbgfs_unregister(priv);
3899         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3900
3901         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3902          * to be called and iwl_down since we are removing the device
3903          * we need to set STATUS_EXIT_PENDING bit.
3904          */
3905         set_bit(STATUS_EXIT_PENDING, &priv->status);
3906         if (priv->mac80211_registered) {
3907                 ieee80211_unregister_hw(priv->hw);
3908                 priv->mac80211_registered = 0;
3909         } else {
3910                 iwl_down(priv);
3911         }
3912
3913         /*
3914          * Make sure device is reset to low power before unloading driver.
3915          * This may be redundant with iwl_down(), but there are paths to
3916          * run iwl_down() without calling apm_ops.stop(), and there are
3917          * paths to avoid running iwl_down() at all before leaving driver.
3918          * This (inexpensive) call *makes sure* device is reset.
3919          */
3920         priv->cfg->ops->lib->apm_ops.stop(priv);
3921
3922         iwl_tt_exit(priv);
3923
3924         /* make sure we flush any pending irq or
3925          * tasklet for the driver
3926          */
3927         spin_lock_irqsave(&priv->lock, flags);
3928         iwl_disable_interrupts(priv);
3929         spin_unlock_irqrestore(&priv->lock, flags);
3930
3931         iwl_synchronize_irq(priv);
3932
3933         iwl_dealloc_ucode_pci(priv);
3934
3935         if (priv->rxq.bd)
3936                 iwlagn_rx_queue_free(priv, &priv->rxq);
3937         iwlagn_hw_txq_ctx_free(priv);
3938
3939         iwl_eeprom_free(priv);
3940
3941
3942         /*netif_stop_queue(dev); */
3943         flush_workqueue(priv->workqueue);
3944
3945         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3946          * priv->workqueue... so we can't take down the workqueue
3947          * until now... */
3948         destroy_workqueue(priv->workqueue);
3949         priv->workqueue = NULL;
3950         iwl_free_traffic_mem(priv);
3951
3952         free_irq(priv->pci_dev->irq, priv);
3953         pci_disable_msi(priv->pci_dev);
3954         pci_iounmap(pdev, priv->hw_base);
3955         pci_release_regions(pdev);
3956         pci_disable_device(pdev);
3957         pci_set_drvdata(pdev, NULL);
3958
3959         iwl_uninit_drv(priv);
3960
3961         iwl_free_isr_ict(priv);
3962
3963         if (priv->ibss_beacon)
3964                 dev_kfree_skb(priv->ibss_beacon);
3965
3966         ieee80211_free_hw(priv->hw);
3967 }
3968
3969
3970 /*****************************************************************************
3971  *
3972  * driver and module entry point
3973  *
3974  *****************************************************************************/
3975
3976 /* Hardware specific file defines the PCI IDs table for that hardware module */
3977 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3978 #ifdef CONFIG_IWL4965
3979         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3980         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3981 #endif /* CONFIG_IWL4965 */
3982 #ifdef CONFIG_IWL5000
3983 /* 5100 Series WiFi */
3984         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3985         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3986         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3987         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3988         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3989         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3990         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3991         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3992         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3993         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3994         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3995         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3996         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3997         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3998         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3999         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4000         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4001         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4002         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4003         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4004         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4005         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4006         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4007         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4008
4009 /* 5300 Series WiFi */
4010         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4011         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4012         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4013         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4014         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4015         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4016         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4017         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4018         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4019         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4020         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4021         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4022
4023 /* 5350 Series WiFi/WiMax */
4024         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4025         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4026         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4027
4028 /* 5150 Series Wifi/WiMax */
4029         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4030         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4031         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4032         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4033         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4034         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4035
4036         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4037         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4038         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4039         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4040
4041 /* 6x00 Series */
4042         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4043         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4044         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4045         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4046         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4047         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4048         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4049         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4050         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4051         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4052
4053 /* 6x00 Series Gen2a */
4054         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4055         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4056         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4057         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4058         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4059         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4060         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4061         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4062         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4063         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4064         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4065         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4066         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4067         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4068
4069 /* 6x00 Series Gen2b */
4070         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4071         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4072         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4073         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4074         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4075         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4076         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4077         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4078         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4079         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4080         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4081         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4082         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4083         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4084         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4085         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4086         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4087         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4088         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4089         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4090         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4091         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4092         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4093         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4094         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4095         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4096         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4097         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4098
4099 /* 6x50 WiFi/WiMax Series */
4100         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4101         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4102         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4103         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4104         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4105         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4106
4107 /* 1000 Series WiFi */
4108         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4109         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4110         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4111         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4112         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4113         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4114         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4115         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4116         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4117         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4118         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4119         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4120 #endif /* CONFIG_IWL5000 */
4121
4122         {0}
4123 };
4124 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4125
4126 static struct pci_driver iwl_driver = {
4127         .name = DRV_NAME,
4128         .id_table = iwl_hw_card_ids,
4129         .probe = iwl_pci_probe,
4130         .remove = __devexit_p(iwl_pci_remove),
4131 #ifdef CONFIG_PM
4132         .suspend = iwl_pci_suspend,
4133         .resume = iwl_pci_resume,
4134 #endif
4135 };
4136
4137 static int __init iwl_init(void)
4138 {
4139
4140         int ret;
4141         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4142         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4143
4144         ret = iwlagn_rate_control_register();
4145         if (ret) {
4146                 printk(KERN_ERR DRV_NAME
4147                        "Unable to register rate control algorithm: %d\n", ret);
4148                 return ret;
4149         }
4150
4151         ret = pci_register_driver(&iwl_driver);
4152         if (ret) {
4153                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4154                 goto error_register;
4155         }
4156
4157         return ret;
4158
4159 error_register:
4160         iwlagn_rate_control_unregister();
4161         return ret;
4162 }
4163
4164 static void __exit iwl_exit(void)
4165 {
4166         pci_unregister_driver(&iwl_driver);
4167         iwlagn_rate_control_unregister();
4168 }
4169
4170 module_exit(iwl_exit);
4171 module_init(iwl_init);
4172
4173 #ifdef CONFIG_IWLWIFI_DEBUG
4174 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4175 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4176 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4177 MODULE_PARM_DESC(debug, "debug output mask");
4178 #endif
4179
4180 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4181 MODULE_PARM_DESC(swcrypto50,
4182                  "using crypto in software (default 0 [hardware]) (deprecated)");
4183 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4184 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4185 module_param_named(queues_num50,
4186                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4187 MODULE_PARM_DESC(queues_num50,
4188                  "number of hw queues in 50xx series (deprecated)");
4189 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4190 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4191 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4192 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4193 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4194 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4195 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4196                    int, S_IRUGO);
4197 MODULE_PARM_DESC(amsdu_size_8K50,
4198                  "enable 8K amsdu size in 50XX series (deprecated)");
4199 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4200                    int, S_IRUGO);
4201 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4202 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4203 MODULE_PARM_DESC(fw_restart50,
4204                  "restart firmware in case of error (deprecated)");
4205 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4206 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4207 module_param_named(
4208         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4209 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4210
4211 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4212                    S_IRUGO);
4213 MODULE_PARM_DESC(ucode_alternative,
4214                  "specify ucode alternative to use from ucode file");