drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/slab.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/delay.h>
  37 #include <linux/sched.h>
  38 #include <linux/skbuff.h>
  39 #include <linux/netdevice.h>
  40 #include <linux/wireless.h>
  41 #include <linux/firmware.h>
  42 #include <linux/etherdevice.h>
  43 #include <linux/if_arp.h>
  44
  45 #include <net/mac80211.h>
  46
  47 #include <asm/div64.h>
  48
  49 #define DRV_NAME        "iwlagn"
  50
  51 #include "iwl-eeprom.h"
  52 #include "iwl-dev.h"
  53 #include "iwl-core.h"
  54 #include "iwl-io.h"
  55 #include "iwl-helpers.h"
  56 #include "iwl-sta.h"
  57 #include "iwl-calib.h"
  58 #include "iwl-agn.h"
  59
  60
  61 /******************************************************************************
  62  *
  63  * module boiler plate
  64  *
  65  ******************************************************************************/
  66
  67 /*
  68  * module name, copyright, version, etc.
  69  */
  70 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  71
  72 #ifdef CONFIG_IWLWIFI_DEBUG
  73 #define VD "d"
  74 #else
  75 #define VD
  76 #endif
  77
  78 #define DRV_VERSION     IWLWIFI_VERSION VD
  79
  80
  81 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  82 MODULE_VERSION(DRV_VERSION);
  83 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  84 MODULE_LICENSE("GPL");
  85 MODULE_ALIAS("iwl4965");
  86
  87 /**
  88  * iwl_commit_rxon - commit staging_rxon to hardware
  89  *
  90  * The RXON command in staging_rxon is committed to the hardware and
  91  * the active_rxon structure is updated with the new data.  This
  92  * function correctly transitions out of the RXON_ASSOC_MSK state if
  93  * a HW tune is required based on the RXON structure changes.
  94  */
  95 int iwl_commit_rxon(struct iwl_priv *priv)
  96 {
  97         /* cast away the const for active_rxon in this function */
  98         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  99         int ret;
 100         bool new_assoc =
 101                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 102
 103         if (!iwl_is_alive(priv))
 104                 return -EBUSY;
 105
 106         /* always get timestamp with Rx frame */
 107         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 108
 109         ret = iwl_check_rxon_cmd(priv);
 110         if (ret) {
 111                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 112                 return -EINVAL;
 113         }
 114
 115         /*
 116          * receive commit_rxon request
 117          * abort any previous channel switch if still in process
 118          */
 119         if (priv->switch_rxon.switch_in_progress &&
 120             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 121                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 122                       le16_to_cpu(priv->switch_rxon.channel));
 123                 iwl_chswitch_done(priv, false);
 124         }
 125
 126         /* If we don't need to send a full RXON, we can use
 127          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 128          * and other flags for the current radio configuration. */
 129         if (!iwl_full_rxon_required(priv)) {
 130                 ret = iwl_send_rxon_assoc(priv);
 131                 if (ret) {
 132                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 133                         return ret;
 134                 }
 135
 136                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 137                 iwl_print_rx_config_cmd(priv);
 138                 return 0;
 139         }
 140
 141         /* If we are currently associated and the new config requires
 142          * an RXON_ASSOC and the new config wants the associated mask enabled,
 143          * we must clear the associated from the active configuration
 144          * before we apply the new config */
 145         if (iwl_is_associated(priv) && new_assoc) {
 146                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 147                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 148
 149                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 150                                       sizeof(struct iwl_rxon_cmd),
 151                                       &priv->active_rxon);
 152
 153                 /* If the mask clearing failed then we set
 154                  * active_rxon back to what it was previously */
 155                 if (ret) {
 156                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 157                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 158                         return ret;
 159                 }
 160                 iwl_clear_ucode_stations(priv);
 161                 iwl_restore_stations(priv);
 162                 ret = iwl_restore_default_wep_keys(priv);
 163                 if (ret) {
 164                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 165                         return ret;
 166                 }
 167         }
 168
 169         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 170                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 171                        "* channel = %d\n"
 172                        "* bssid = %pM\n",
 173                        (new_assoc ? "" : "out"),
 174                        le16_to_cpu(priv->staging_rxon.channel),
 175                        priv->staging_rxon.bssid_addr);
 176
 177         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 178
 179         /* Apply the new configuration
 180          * RXON unassoc clears the station table in uCode so restoration of
 181          * stations is needed after it (the RXON command) completes
 182          */
 183         if (!new_assoc) {
 184                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 185                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 186                 if (ret) {
 187                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 188                         return ret;
 189                 }
 190                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 191                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 192                 iwl_clear_ucode_stations(priv);
 193                 iwl_restore_stations(priv);
 194                 ret = iwl_restore_default_wep_keys(priv);
 195                 if (ret) {
 196                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 197                         return ret;
 198                 }
 199         }
 200
 201         priv->start_calib = 0;
 202         if (new_assoc) {
 203                 /*
 204                  * allow CTS-to-self if possible for new association.
 205                  * this is relevant only for 5000 series and up,
 206                  * but will not damage 4965
 207                  */
 208                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 209
 210                 /* Apply the new configuration
 211                  * RXON assoc doesn't clear the station table in uCode,
 212                  */
 213                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 214                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 215                 if (ret) {
 216                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 217                         return ret;
 218                 }
 219                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 220         }
 221         iwl_print_rx_config_cmd(priv);
 222
 223         iwl_init_sensitivity(priv);
 224
 225         /* If we issue a new RXON command which required a tune then we must
 226          * send a new TXPOWER command or we won't be able to Tx any frames */
 227         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 228         if (ret) {
 229                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 230                 return ret;
 231         }
 232
 233         return 0;
 234 }
 235
 236 void iwl_update_chain_flags(struct iwl_priv *priv)
 237 {
 238
 239         if (priv->cfg->ops->hcmd->set_rxon_chain)
 240                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 241         iwlcore_commit_rxon(priv);
 242 }
 243
 244 static void iwl_clear_free_frames(struct iwl_priv *priv)
 245 {
 246         struct list_head *element;
 247
 248         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 249                        priv->frames_count);
 250
 251         while (!list_empty(&priv->free_frames)) {
 252                 element = priv->free_frames.next;
 253                 list_del(element);
 254                 kfree(list_entry(element, struct iwl_frame, list));
 255                 priv->frames_count--;
 256         }
 257
 258         if (priv->frames_count) {
 259                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 260                             priv->frames_count);
 261                 priv->frames_count = 0;
 262         }
 263 }
 264
 265 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 266 {
 267         struct iwl_frame *frame;
 268         struct list_head *element;
 269         if (list_empty(&priv->free_frames)) {
 270                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 271                 if (!frame) {
 272                         IWL_ERR(priv, "Could not allocate frame!\n");
 273                         return NULL;
 274                 }
 275
 276                 priv->frames_count++;
 277                 return frame;
 278         }
 279
 280         element = priv->free_frames.next;
 281         list_del(element);
 282         return list_entry(element, struct iwl_frame, list);
 283 }
 284
 285 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 286 {
 287         memset(frame, 0, sizeof(*frame));
 288         list_add(&frame->list, &priv->free_frames);
 289 }
 290
 291 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 292                                           struct ieee80211_hdr *hdr,
 293                                           int left)
 294 {
 295         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 296             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 297              (priv->iw_mode != NL80211_IFTYPE_AP)))
 298                 return 0;
 299
 300         if (priv->ibss_beacon->len > left)
 301                 return 0;
 302
 303         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 304
 305         return priv->ibss_beacon->len;
 306 }
 307
 308 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 309 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 310                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 311                 u8 *beacon, u32 frame_size)
 312 {
 313         u16 tim_idx;
 314         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 315
 316         /*
 317          * The index is relative to frame start but we start looking at the
 318          * variable-length part of the beacon.
 319          */
 320         tim_idx = mgmt->u.beacon.variable - beacon;
 321
 322         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 323         while ((tim_idx < (frame_size - 2)) &&
 324                         (beacon[tim_idx] != WLAN_EID_TIM))
 325                 tim_idx += beacon[tim_idx+1] + 2;
 326
 327         /* If TIM field was found, set variables */
 328         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 329                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 330                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 331         } else
 332                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 333 }
 334
 335 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 336                                        struct iwl_frame *frame)
 337 {
 338         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 339         u32 frame_size;
 340         u32 rate_flags;
 341         u32 rate;
 342         /*
 343          * We have to set up the TX command, the TX Beacon command, and the
 344          * beacon contents.
 345          */
 346
 347         /* Initialize memory */
 348         tx_beacon_cmd = &frame->u.beacon;
 349         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 350
 351         /* Set up TX beacon contents */
 352         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 353                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 354         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 355                 return 0;
 356
 357         /* Set up TX command fields */
 358         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 359         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 360         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 361         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 362                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 363
 364         /* Set up TX beacon command fields */
 365         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 366                         frame_size);
 367
 368         /* Set up packet rate and flags */
 369         rate = iwl_rate_get_lowest_plcp(priv);
 370         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
 371         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 372         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 373                 rate_flags |= RATE_MCS_CCK_MSK;
 374         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 375                         rate_flags);
 376
 377         return sizeof(*tx_beacon_cmd) + frame_size;
 378 }
 379 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 380 {
 381         struct iwl_frame *frame;
 382         unsigned int frame_size;
 383         int rc;
 384
 385         frame = iwl_get_free_frame(priv);
 386         if (!frame) {
 387                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 388                           "command.\n");
 389                 return -ENOMEM;
 390         }
 391
 392         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 393         if (!frame_size) {
 394                 IWL_ERR(priv, "Error configuring the beacon command\n");
 395                 iwl_free_frame(priv, frame);
 396                 return -EINVAL;
 397         }
 398
 399         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 400                               &frame->u.cmd[0]);
 401
 402         iwl_free_frame(priv, frame);
 403
 404         return rc;
 405 }
 406
 407 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 408 {
 409         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 410
 411         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 412         if (sizeof(dma_addr_t) > sizeof(u32))
 413                 addr |=
 414                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 415
 416         return addr;
 417 }
 418
 419 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 420 {
 421         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 422
 423         return le16_to_cpu(tb->hi_n_len) >> 4;
 424 }
 425
 426 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 427                                   dma_addr_t addr, u16 len)
 428 {
 429         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 430         u16 hi_n_len = len << 4;
 431
 432         put_unaligned_le32(addr, &tb->lo);
 433         if (sizeof(dma_addr_t) > sizeof(u32))
 434                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 435
 436         tb->hi_n_len = cpu_to_le16(hi_n_len);
 437
 438         tfd->num_tbs = idx + 1;
 439 }
 440
 441 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 442 {
 443         return tfd->num_tbs & 0x1f;
 444 }
 445
 446 /**
 447  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 448  * @priv - driver private data
 449  * @txq - tx queue
 450  *
 451  * Does NOT advance any TFD circular buffer read/write indexes
 452  * Does NOT free the TFD itself (which is within circular buffer)
 453  */
 454 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 455 {
 456         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 457         struct iwl_tfd *tfd;
 458         struct pci_dev *dev = priv->pci_dev;
 459         int index = txq->q.read_ptr;
 460         int i;
 461         int num_tbs;
 462
 463         tfd = &tfd_tmp[index];
 464
 465         /* Sanity check on number of chunks */
 466         num_tbs = iwl_tfd_get_num_tbs(tfd);
 467
 468         if (num_tbs >= IWL_NUM_OF_TBS) {
 469                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 470                 /* @todo issue fatal error, it is quite serious situation */
 471                 return;
 472         }
 473
 474         /* Unmap tx_cmd */
 475         if (num_tbs)
 476                 pci_unmap_single(dev,
 477                                 dma_unmap_addr(&txq->meta[index], mapping),
 478                                 dma_unmap_len(&txq->meta[index], len),
 479                                 PCI_DMA_BIDIRECTIONAL);
 480
 481         /* Unmap chunks, if any. */
 482         for (i = 1; i < num_tbs; i++)
 483                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 484                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 485
 486         /* free SKB */
 487         if (txq->txb) {
 488                 struct sk_buff *skb;
 489
 490                 skb = txq->txb[txq->q.read_ptr].skb;
 491
 492                 /* can be called from irqs-disabled context */
 493                 if (skb) {
 494                         dev_kfree_skb_any(skb);
 495                         txq->txb[txq->q.read_ptr].skb = NULL;
 496                 }
 497         }
 498 }
 499
 500 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 501                                  struct iwl_tx_queue *txq,
 502                                  dma_addr_t addr, u16 len,
 503                                  u8 reset, u8 pad)
 504 {
 505         struct iwl_queue *q;
 506         struct iwl_tfd *tfd, *tfd_tmp;
 507         u32 num_tbs;
 508
 509         q = &txq->q;
 510         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 511         tfd = &tfd_tmp[q->write_ptr];
 512
 513         if (reset)
 514                 memset(tfd, 0, sizeof(*tfd));
 515
 516         num_tbs = iwl_tfd_get_num_tbs(tfd);
 517
 518         /* Each TFD can point to a maximum 20 Tx buffers */
 519         if (num_tbs >= IWL_NUM_OF_TBS) {
 520                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 521                           IWL_NUM_OF_TBS);
 522                 return -EINVAL;
 523         }
 524
 525         BUG_ON(addr & ~DMA_BIT_MASK(36));
 526         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 527                 IWL_ERR(priv, "Unaligned address = %llx\n",
 528                           (unsigned long long)addr);
 529
 530         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 531
 532         return 0;
 533 }
 534
 535 /*
 536  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 537  * given Tx queue, and enable the DMA channel used for that queue.
 538  *
 539  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 540  * channels supported in hardware.
 541  */
 542 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 543                          struct iwl_tx_queue *txq)
 544 {
 545         int txq_id = txq->q.id;
 546
 547         /* Circular buffer (TFD queue in DRAM) physical base address */
 548         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 549                              txq->q.dma_addr >> 8);
 550
 551         return 0;
 552 }
 553
 554 /******************************************************************************
 555  *
 556  * Generic RX handler implementations
 557  *
 558  ******************************************************************************/
 559 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 560                                 struct iwl_rx_mem_buffer *rxb)
 561 {
 562         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 563         struct iwl_alive_resp *palive;
 564         struct delayed_work *pwork;
 565
 566         palive = &pkt->u.alive_frame;
 567
 568         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 569                        "0x%01X 0x%01X\n",
 570                        palive->is_valid, palive->ver_type,
 571                        palive->ver_subtype);
 572
 573         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 574                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 575                 memcpy(&priv->card_alive_init,
 576                        &pkt->u.alive_frame,
 577                        sizeof(struct iwl_init_alive_resp));
 578                 pwork = &priv->init_alive_start;
 579         } else {
 580                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 581                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 582                        sizeof(struct iwl_alive_resp));
 583                 pwork = &priv->alive_start;
 584         }
 585
 586         /* We delay the ALIVE response by 5ms to
 587          * give the HW RF Kill time to activate... */
 588         if (palive->is_valid == UCODE_VALID_OK)
 589                 queue_delayed_work(priv->workqueue, pwork,
 590                                    msecs_to_jiffies(5));
 591         else
 592                 IWL_WARN(priv, "uCode did not respond OK.\n");
 593 }
 594
 595 static void iwl_bg_beacon_update(struct work_struct *work)
 596 {
 597         struct iwl_priv *priv =
 598                 container_of(work, struct iwl_priv, beacon_update);
 599         struct sk_buff *beacon;
 600
 601         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 602         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 603
 604         if (!beacon) {
 605                 IWL_ERR(priv, "update beacon failed\n");
 606                 return;
 607         }
 608
 609         mutex_lock(&priv->mutex);
 610         /* new beacon skb is allocated every time; dispose previous.*/
 611         if (priv->ibss_beacon)
 612                 dev_kfree_skb(priv->ibss_beacon);
 613
 614         priv->ibss_beacon = beacon;
 615         mutex_unlock(&priv->mutex);
 616
 617         iwl_send_beacon_cmd(priv);
 618 }
 619
 620 /**
 621  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 622  *
 623  * This callback is provided in order to send a statistics request.
 624  *
 625  * This timer function is continually reset to execute within
 626  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 627  * was received.  We need to ensure we receive the statistics in order
 628  * to update the temperature used for calibrating the TXPOWER.
 629  */
 630 static void iwl_bg_statistics_periodic(unsigned long data)
 631 {
 632         struct iwl_priv *priv = (struct iwl_priv *)data;
 633
 634         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 635                 return;
 636
 637         /* dont send host command if rf-kill is on */
 638         if (!iwl_is_ready_rf(priv))
 639                 return;
 640
 641         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 642 }
 643
 644
 645 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 646                                         u32 start_idx, u32 num_events,
 647                                         u32 mode)
 648 {
 649         u32 i;
 650         u32 ptr;        /* SRAM byte address of log data */
 651         u32 ev, time, data; /* event log data */
 652         unsigned long reg_flags;
 653
 654         if (mode == 0)
 655                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 656         else
 657                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 658
 659         /* Make sure device is powered up for SRAM reads */
 660         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 661         if (iwl_grab_nic_access(priv)) {
 662                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 663                 return;
 664         }
 665
 666         /* Set starting address; reads will auto-increment */
 667         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 668         rmb();
 669
 670         /*
 671          * "time" is actually "data" for mode 0 (no timestamp).
 672          * place event id # at far right for easier visual parsing.
 673          */
 674         for (i = 0; i < num_events; i++) {
 675                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 676                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 677                 if (mode == 0) {
 678                         trace_iwlwifi_dev_ucode_cont_event(priv,
 679                                                         0, time, ev);
 680                 } else {
 681                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 682                         trace_iwlwifi_dev_ucode_cont_event(priv,
 683                                                 time, data, ev);
 684                 }
 685         }
 686         /* Allow device to power down */
 687         iwl_release_nic_access(priv);
 688         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 689 }
 690
 691 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 692 {
 693         u32 capacity;   /* event log capacity in # entries */
 694         u32 base;       /* SRAM byte address of event log header */
 695         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 696         u32 num_wraps;  /* # times uCode wrapped to top of log */
 697         u32 next_entry; /* index of next entry to be written by uCode */
 698
 699         if (priv->ucode_type == UCODE_INIT)
 700                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 701         else
 702                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 703         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 704                 capacity = iwl_read_targ_mem(priv, base);
 705                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 706                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 707                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 708         } else
 709                 return;
 710
 711         if (num_wraps == priv->event_log.num_wraps) {
 712                 iwl_print_cont_event_trace(priv,
 713                                        base, priv->event_log.next_entry,
 714                                        next_entry - priv->event_log.next_entry,
 715                                        mode);
 716                 priv->event_log.non_wraps_count++;
 717         } else {
 718                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 719                         priv->event_log.wraps_more_count++;
 720                 else
 721                         priv->event_log.wraps_once_count++;
 722                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 723                                 num_wraps - priv->event_log.num_wraps,
 724                                 next_entry, priv->event_log.next_entry);
 725                 if (next_entry < priv->event_log.next_entry) {
 726                         iwl_print_cont_event_trace(priv, base,
 727                                priv->event_log.next_entry,
 728                                capacity - priv->event_log.next_entry,
 729                                mode);
 730
 731                         iwl_print_cont_event_trace(priv, base, 0,
 732                                 next_entry, mode);
 733                 } else {
 734                         iwl_print_cont_event_trace(priv, base,
 735                                next_entry, capacity - next_entry,
 736                                mode);
 737
 738                         iwl_print_cont_event_trace(priv, base, 0,
 739                                 next_entry, mode);
 740                 }
 741         }
 742         priv->event_log.num_wraps = num_wraps;
 743         priv->event_log.next_entry = next_entry;
 744 }
 745
 746 /**
 747  * iwl_bg_ucode_trace - Timer callback to log ucode event
 748  *
 749  * The timer is continually set to execute every
 750  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 751  * this function is to perform continuous uCode event logging operation
 752  * if enabled
 753  */
 754 static void iwl_bg_ucode_trace(unsigned long data)
 755 {
 756         struct iwl_priv *priv = (struct iwl_priv *)data;
 757
 758         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 759                 return;
 760
 761         if (priv->event_log.ucode_trace) {
 762                 iwl_continuous_event_trace(priv);
 763                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 764                 mod_timer(&priv->ucode_trace,
 765                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 766         }
 767 }
 768
 769 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 770                                 struct iwl_rx_mem_buffer *rxb)
 771 {
 772 #ifdef CONFIG_IWLWIFI_DEBUG
 773         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 774         struct iwl4965_beacon_notif *beacon =
 775                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 776         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 777
 778         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 779                 "tsf %d %d rate %d\n",
 780                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 781                 beacon->beacon_notify_hdr.failure_frame,
 782                 le32_to_cpu(beacon->ibss_mgr_status),
 783                 le32_to_cpu(beacon->high_tsf),
 784                 le32_to_cpu(beacon->low_tsf), rate);
 785 #endif
 786
 787         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 788             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 789                 queue_work(priv->workqueue, &priv->beacon_update);
 790 }
 791
 792 /* Handle notification from uCode that card's power state is changing
 793  * due to software, hardware, or critical temperature RFKILL */
 794 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 795                                     struct iwl_rx_mem_buffer *rxb)
 796 {
 797         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 798         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 799         unsigned long status = priv->status;
 800
 801         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 802                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 803                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 804                           (flags & CT_CARD_DISABLED) ?
 805                           "Reached" : "Not reached");
 806
 807         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 808                      CT_CARD_DISABLED)) {
 809
 810                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 811                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 812
 813                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 814                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 815
 816                 if (!(flags & RXON_CARD_DISABLED)) {
 817                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 818                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 819                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 820                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 821                 }
 822                 if (flags & CT_CARD_DISABLED)
 823                         iwl_tt_enter_ct_kill(priv);
 824         }
 825         if (!(flags & CT_CARD_DISABLED))
 826                 iwl_tt_exit_ct_kill(priv);
 827
 828         if (flags & HW_CARD_DISABLED)
 829                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 830         else
 831                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 832
 833
 834         if (!(flags & RXON_CARD_DISABLED))
 835                 iwl_scan_cancel(priv);
 836
 837         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 838              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 839                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 840                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 841         else
 842                 wake_up_interruptible(&priv->wait_command_queue);
 843 }
 844
 845 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 846 {
 847         if (src == IWL_PWR_SRC_VAUX) {
 848                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 849                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 850                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 851                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 852         } else {
 853                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 854                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 855                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 856         }
 857
 858         return 0;
 859 }
 860
 861 /**
 862  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 863  *
 864  * Setup the RX handlers for each of the reply types sent from the uCode
 865  * to the host.
 866  *
 867  * This function chains into the hardware specific files for them to setup
 868  * any hardware specific handlers as well.
 869  */
 870 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 871 {
 872         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 873         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 874         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 875         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 876                         iwl_rx_spectrum_measure_notif;
 877         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 878         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 879             iwl_rx_pm_debug_statistics_notif;
 880         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 881
 882         /*
 883          * The same handler is used for both the REPLY to a discrete
 884          * statistics request from the host as well as for the periodic
 885          * statistics notifications (after received beacons) from the uCode.
 886          */
 887         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 888         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 889
 890         iwl_setup_rx_scan_handlers(priv);
 891
 892         /* status change handler */
 893         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 894
 895         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 896             iwl_rx_missed_beacon_notif;
 897         /* Rx handlers */
 898         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 899         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 900         /* block ack */
 901         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 902         /* Set up hardware specific Rx handlers */
 903         priv->cfg->ops->lib->rx_handler_setup(priv);
 904 }
 905
 906 /**
 907  * iwl_rx_handle - Main entry function for receiving responses from uCode
 908  *
 909  * Uses the priv->rx_handlers callback function array to invoke
 910  * the appropriate handlers, including command responses,
 911  * frame-received notifications, and other notifications.
 912  */
 913 void iwl_rx_handle(struct iwl_priv *priv)
 914 {
 915         struct iwl_rx_mem_buffer *rxb;
 916         struct iwl_rx_packet *pkt;
 917         struct iwl_rx_queue *rxq = &priv->rxq;
 918         u32 r, i;
 919         int reclaim;
 920         unsigned long flags;
 921         u8 fill_rx = 0;
 922         u32 count = 8;
 923         int total_empty;
 924
 925         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 926          * buffer that the driver may process (last buffer filled by ucode). */
 927         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 928         i = rxq->read;
 929
 930         /* Rx interrupt, but nothing sent from uCode */
 931         if (i == r)
 932                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 933
 934         /* calculate total frames need to be restock after handling RX */
 935         total_empty = r - rxq->write_actual;
 936         if (total_empty < 0)
 937                 total_empty += RX_QUEUE_SIZE;
 938
 939         if (total_empty > (RX_QUEUE_SIZE / 2))
 940                 fill_rx = 1;
 941
 942         while (i != r) {
 943                 rxb = rxq->queue[i];
 944
 945                 /* If an RXB doesn't have a Rx queue slot associated with it,
 946                  * then a bug has been introduced in the queue refilling
 947                  * routines -- catch it here */
 948                 BUG_ON(rxb == NULL);
 949
 950                 rxq->queue[i] = NULL;
 951
 952                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 953                                PAGE_SIZE << priv->hw_params.rx_page_order,
 954                                PCI_DMA_FROMDEVICE);
 955                 pkt = rxb_addr(rxb);
 956
 957                 trace_iwlwifi_dev_rx(priv, pkt,
 958                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 959
 960                 /* Reclaim a command buffer only if this packet is a response
 961                  *   to a (driver-originated) command.
 962                  * If the packet (e.g. Rx frame) originated from uCode,
 963                  *   there is no command buffer to reclaim.
 964                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 965                  *   but apparently a few don't get set; catch them here. */
 966                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 967                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 968                         (pkt->hdr.cmd != REPLY_RX) &&
 969                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 970                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 971                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 972                         (pkt->hdr.cmd != REPLY_TX);
 973
 974                 /* Based on type of command response or notification,
 975                  *   handle those that need handling via function in
 976                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 977                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 978                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 979                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 980                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 981                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 982                 } else {
 983                         /* No handling needed */
 984                         IWL_DEBUG_RX(priv,
 985                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 986                                 r, i, get_cmd_string(pkt->hdr.cmd),
 987                                 pkt->hdr.cmd);
 988                 }
 989
 990                 /*
 991                  * XXX: After here, we should always check rxb->page
 992                  * against NULL before touching it or its virtual
 993                  * memory (pkt). Because some rx_handler might have
 994                  * already taken or freed the pages.
 995                  */
 996
 997                 if (reclaim) {
 998                         /* Invoke any callbacks, transfer the buffer to caller,
 999                          * and fire off the (possibly) blocking iwl_send_cmd()
1000                          * as we reclaim the driver command queue */
1001                         if (rxb->page)
1002                                 iwl_tx_cmd_complete(priv, rxb);
1003                         else
1004                                 IWL_WARN(priv, "Claim null rxb?\n");
1005                 }
1006
1007                 /* Reuse the page if possible. For notification packets and
1008                  * SKBs that fail to Rx correctly, add them back into the
1009                  * rx_free list for reuse later. */
1010                 spin_lock_irqsave(&rxq->lock, flags);
1011                 if (rxb->page != NULL) {
1012                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1013                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1014                                 PCI_DMA_FROMDEVICE);
1015                         list_add_tail(&rxb->list, &rxq->rx_free);
1016                         rxq->free_count++;
1017                 } else
1018                         list_add_tail(&rxb->list, &rxq->rx_used);
1019
1020                 spin_unlock_irqrestore(&rxq->lock, flags);
1021
1022                 i = (i + 1) & RX_QUEUE_MASK;
1023                 /* If there are a lot of unused frames,
1024                  * restock the Rx queue so ucode wont assert. */
1025                 if (fill_rx) {
1026                         count++;
1027                         if (count >= 8) {
1028                                 rxq->read = i;
1029                                 iwlagn_rx_replenish_now(priv);
1030                                 count = 0;
1031                         }
1032                 }
1033         }
1034
1035         /* Backtrack one entry */
1036         rxq->read = i;
1037         if (fill_rx)
1038                 iwlagn_rx_replenish_now(priv);
1039         else
1040                 iwlagn_rx_queue_restock(priv);
1041 }
1042
1043 /* call this function to flush any scheduled tasklet */
1044 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1045 {
1046         /* wait to make sure we flush pending tasklet*/
1047         synchronize_irq(priv->pci_dev->irq);
1048         tasklet_kill(&priv->irq_tasklet);
1049 }
1050
1051 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1052 {
1053         u32 inta, handled = 0;
1054         u32 inta_fh;
1055         unsigned long flags;
1056         u32 i;
1057 #ifdef CONFIG_IWLWIFI_DEBUG
1058         u32 inta_mask;
1059 #endif
1060
1061         spin_lock_irqsave(&priv->lock, flags);
1062
1063         /* Ack/clear/reset pending uCode interrupts.
1064          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1065          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1066         inta = iwl_read32(priv, CSR_INT);
1067         iwl_write32(priv, CSR_INT, inta);
1068
1069         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1070          * Any new interrupts that happen after this, either while we're
1071          * in this tasklet, or later, will show up in next ISR/tasklet. */
1072         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1073         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1074
1075 #ifdef CONFIG_IWLWIFI_DEBUG
1076         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1077                 /* just for debug */
1078                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1079                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1080                               inta, inta_mask, inta_fh);
1081         }
1082 #endif
1083
1084         spin_unlock_irqrestore(&priv->lock, flags);
1085
1086         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1087          * atomic, make sure that inta covers all the interrupts that
1088          * we've discovered, even if FH interrupt came in just after
1089          * reading CSR_INT. */
1090         if (inta_fh & CSR49_FH_INT_RX_MASK)
1091                 inta |= CSR_INT_BIT_FH_RX;
1092         if (inta_fh & CSR49_FH_INT_TX_MASK)
1093                 inta |= CSR_INT_BIT_FH_TX;
1094
1095         /* Now service all interrupt bits discovered above. */
1096         if (inta & CSR_INT_BIT_HW_ERR) {
1097                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1098
1099                 /* Tell the device to stop sending interrupts */
1100                 iwl_disable_interrupts(priv);
1101
1102                 priv->isr_stats.hw++;
1103                 iwl_irq_handle_error(priv);
1104
1105                 handled |= CSR_INT_BIT_HW_ERR;
1106
1107                 return;
1108         }
1109
1110 #ifdef CONFIG_IWLWIFI_DEBUG
1111         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1112                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1113                 if (inta & CSR_INT_BIT_SCD) {
1114                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1115                                       "the frame/frames.\n");
1116                         priv->isr_stats.sch++;
1117                 }
1118
1119                 /* Alive notification via Rx interrupt will do the real work */
1120                 if (inta & CSR_INT_BIT_ALIVE) {
1121                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1122                         priv->isr_stats.alive++;
1123                 }
1124         }
1125 #endif
1126         /* Safely ignore these bits for debug checks below */
1127         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1128
1129         /* HW RF KILL switch toggled */
1130         if (inta & CSR_INT_BIT_RF_KILL) {
1131                 int hw_rf_kill = 0;
1132                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1133                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1134                         hw_rf_kill = 1;
1135
1136                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1137                                 hw_rf_kill ? "disable radio" : "enable radio");
1138
1139                 priv->isr_stats.rfkill++;
1140
1141                 /* driver only loads ucode once setting the interface up.
1142                  * the driver allows loading the ucode even if the radio
1143                  * is killed. Hence update the killswitch state here. The
1144                  * rfkill handler will care about restarting if needed.
1145                  */
1146                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1147                         if (hw_rf_kill)
1148                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1149                         else
1150                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1151                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1152                 }
1153
1154                 handled |= CSR_INT_BIT_RF_KILL;
1155         }
1156
1157         /* Chip got too hot and stopped itself */
1158         if (inta & CSR_INT_BIT_CT_KILL) {
1159                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1160                 priv->isr_stats.ctkill++;
1161                 handled |= CSR_INT_BIT_CT_KILL;
1162         }
1163
1164         /* Error detected by uCode */
1165         if (inta & CSR_INT_BIT_SW_ERR) {
1166                 IWL_ERR(priv, "Microcode SW error detected. "
1167                         " Restarting 0x%X.\n", inta);
1168                 priv->isr_stats.sw++;
1169                 priv->isr_stats.sw_err = inta;
1170                 iwl_irq_handle_error(priv);
1171                 handled |= CSR_INT_BIT_SW_ERR;
1172         }
1173
1174         /*
1175          * uCode wakes up after power-down sleep.
1176          * Tell device about any new tx or host commands enqueued,
1177          * and about any Rx buffers made available while asleep.
1178          */
1179         if (inta & CSR_INT_BIT_WAKEUP) {
1180                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1181                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1182                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1183                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1184                 priv->isr_stats.wakeup++;
1185                 handled |= CSR_INT_BIT_WAKEUP;
1186         }
1187
1188         /* All uCode command responses, including Tx command responses,
1189          * Rx "responses" (frame-received notification), and other
1190          * notifications from uCode come through here*/
1191         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1192                 iwl_rx_handle(priv);
1193                 priv->isr_stats.rx++;
1194                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1195         }
1196
1197         /* This "Tx" DMA channel is used only for loading uCode */
1198         if (inta & CSR_INT_BIT_FH_TX) {
1199                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1200                 priv->isr_stats.tx++;
1201                 handled |= CSR_INT_BIT_FH_TX;
1202                 /* Wake up uCode load routine, now that load is complete */
1203                 priv->ucode_write_complete = 1;
1204                 wake_up_interruptible(&priv->wait_command_queue);
1205         }
1206
1207         if (inta & ~handled) {
1208                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1209                 priv->isr_stats.unhandled++;
1210         }
1211
1212         if (inta & ~(priv->inta_mask)) {
1213                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1214                          inta & ~priv->inta_mask);
1215                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1216         }
1217
1218         /* Re-enable all interrupts */
1219         /* only Re-enable if diabled by irq */
1220         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1221                 iwl_enable_interrupts(priv);
1222
1223 #ifdef CONFIG_IWLWIFI_DEBUG
1224         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1225                 inta = iwl_read32(priv, CSR_INT);
1226                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1227                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1228                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1229                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1230         }
1231 #endif
1232 }
1233
1234 /* tasklet for iwlagn interrupt */
1235 static void iwl_irq_tasklet(struct iwl_priv *priv)
1236 {
1237         u32 inta = 0;
1238         u32 handled = 0;
1239         unsigned long flags;
1240         u32 i;
1241 #ifdef CONFIG_IWLWIFI_DEBUG
1242         u32 inta_mask;
1243 #endif
1244
1245         spin_lock_irqsave(&priv->lock, flags);
1246
1247         /* Ack/clear/reset pending uCode interrupts.
1248          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1249          */
1250         /* There is a hardware bug in the interrupt mask function that some
1251          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1252          * they are disabled in the CSR_INT_MASK register. Furthermore the
1253          * ICT interrupt handling mechanism has another bug that might cause
1254          * these unmasked interrupts fail to be detected. We workaround the
1255          * hardware bugs here by ACKing all the possible interrupts so that
1256          * interrupt coalescing can still be achieved.
1257          */
1258         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1259
1260         inta = priv->_agn.inta;
1261
1262 #ifdef CONFIG_IWLWIFI_DEBUG
1263         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1264                 /* just for debug */
1265                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1266                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1267                                 inta, inta_mask);
1268         }
1269 #endif
1270
1271         spin_unlock_irqrestore(&priv->lock, flags);
1272
1273         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1274         priv->_agn.inta = 0;
1275
1276         /* Now service all interrupt bits discovered above. */
1277         if (inta & CSR_INT_BIT_HW_ERR) {
1278                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1279
1280                 /* Tell the device to stop sending interrupts */
1281                 iwl_disable_interrupts(priv);
1282
1283                 priv->isr_stats.hw++;
1284                 iwl_irq_handle_error(priv);
1285
1286                 handled |= CSR_INT_BIT_HW_ERR;
1287
1288                 return;
1289         }
1290
1291 #ifdef CONFIG_IWLWIFI_DEBUG
1292         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1293                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1294                 if (inta & CSR_INT_BIT_SCD) {
1295                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1296                                       "the frame/frames.\n");
1297                         priv->isr_stats.sch++;
1298                 }
1299
1300                 /* Alive notification via Rx interrupt will do the real work */
1301                 if (inta & CSR_INT_BIT_ALIVE) {
1302                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1303                         priv->isr_stats.alive++;
1304                 }
1305         }
1306 #endif
1307         /* Safely ignore these bits for debug checks below */
1308         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1309
1310         /* HW RF KILL switch toggled */
1311         if (inta & CSR_INT_BIT_RF_KILL) {
1312                 int hw_rf_kill = 0;
1313                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1314                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1315                         hw_rf_kill = 1;
1316
1317                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1318                                 hw_rf_kill ? "disable radio" : "enable radio");
1319
1320                 priv->isr_stats.rfkill++;
1321
1322                 /* driver only loads ucode once setting the interface up.
1323                  * the driver allows loading the ucode even if the radio
1324                  * is killed. Hence update the killswitch state here. The
1325                  * rfkill handler will care about restarting if needed.
1326                  */
1327                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1328                         if (hw_rf_kill)
1329                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1330                         else
1331                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1332                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1333                 }
1334
1335                 handled |= CSR_INT_BIT_RF_KILL;
1336         }
1337
1338         /* Chip got too hot and stopped itself */
1339         if (inta & CSR_INT_BIT_CT_KILL) {
1340                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1341                 priv->isr_stats.ctkill++;
1342                 handled |= CSR_INT_BIT_CT_KILL;
1343         }
1344
1345         /* Error detected by uCode */
1346         if (inta & CSR_INT_BIT_SW_ERR) {
1347                 IWL_ERR(priv, "Microcode SW error detected. "
1348                         " Restarting 0x%X.\n", inta);
1349                 priv->isr_stats.sw++;
1350                 priv->isr_stats.sw_err = inta;
1351                 iwl_irq_handle_error(priv);
1352                 handled |= CSR_INT_BIT_SW_ERR;
1353         }
1354
1355         /* uCode wakes up after power-down sleep */
1356         if (inta & CSR_INT_BIT_WAKEUP) {
1357                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1358                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1359                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1360                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1361
1362                 priv->isr_stats.wakeup++;
1363
1364                 handled |= CSR_INT_BIT_WAKEUP;
1365         }
1366
1367         /* All uCode command responses, including Tx command responses,
1368          * Rx "responses" (frame-received notification), and other
1369          * notifications from uCode come through here*/
1370         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1371                         CSR_INT_BIT_RX_PERIODIC)) {
1372                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1373                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1374                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1375                         iwl_write32(priv, CSR_FH_INT_STATUS,
1376                                         CSR49_FH_INT_RX_MASK);
1377                 }
1378                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1379                         handled |= CSR_INT_BIT_RX_PERIODIC;
1380                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1381                 }
1382                 /* Sending RX interrupt require many steps to be done in the
1383                  * the device:
1384                  * 1- write interrupt to current index in ICT table.
1385                  * 2- dma RX frame.
1386                  * 3- update RX shared data to indicate last write index.
1387                  * 4- send interrupt.
1388                  * This could lead to RX race, driver could receive RX interrupt
1389                  * but the shared data changes does not reflect this;
1390                  * periodic interrupt will detect any dangling Rx activity.
1391                  */
1392
1393                 /* Disable periodic interrupt; we use it as just a one-shot. */
1394                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1395                             CSR_INT_PERIODIC_DIS);
1396                 iwl_rx_handle(priv);
1397
1398                 /*
1399                  * Enable periodic interrupt in 8 msec only if we received
1400                  * real RX interrupt (instead of just periodic int), to catch
1401                  * any dangling Rx interrupt.  If it was just the periodic
1402                  * interrupt, there was no dangling Rx activity, and no need
1403                  * to extend the periodic interrupt; one-shot is enough.
1404                  */
1405                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1406                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1407                                     CSR_INT_PERIODIC_ENA);
1408
1409                 priv->isr_stats.rx++;
1410         }
1411
1412         /* This "Tx" DMA channel is used only for loading uCode */
1413         if (inta & CSR_INT_BIT_FH_TX) {
1414                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1415                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1416                 priv->isr_stats.tx++;
1417                 handled |= CSR_INT_BIT_FH_TX;
1418                 /* Wake up uCode load routine, now that load is complete */
1419                 priv->ucode_write_complete = 1;
1420                 wake_up_interruptible(&priv->wait_command_queue);
1421         }
1422
1423         if (inta & ~handled) {
1424                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1425                 priv->isr_stats.unhandled++;
1426         }
1427
1428         if (inta & ~(priv->inta_mask)) {
1429                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1430                          inta & ~priv->inta_mask);
1431         }
1432
1433         /* Re-enable all interrupts */
1434         /* only Re-enable if diabled by irq */
1435         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1436                 iwl_enable_interrupts(priv);
1437 }
1438
1439 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1440 #define ACK_CNT_RATIO (50)
1441 #define BA_TIMEOUT_CNT (5)
1442 #define BA_TIMEOUT_MAX (16)
1443
1444 /**
1445  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1446  *
1447  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1448  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1449  * operation state.
1450  */
1451 bool iwl_good_ack_health(struct iwl_priv *priv,
1452                                 struct iwl_rx_packet *pkt)
1453 {
1454         bool rc = true;
1455         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1456         int ba_timeout_delta;
1457
1458         actual_ack_cnt_delta =
1459                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1460                 le32_to_cpu(priv->statistics.tx.actual_ack_cnt);
1461         expected_ack_cnt_delta =
1462                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1463                 le32_to_cpu(priv->statistics.tx.expected_ack_cnt);
1464         ba_timeout_delta =
1465                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1466                 le32_to_cpu(priv->statistics.tx.agg.ba_timeout);
1467         if ((priv->_agn.agg_tids_count > 0) &&
1468             (expected_ack_cnt_delta > 0) &&
1469             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1470                 < ACK_CNT_RATIO) &&
1471             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1472                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1473                                 " expected_ack_cnt = %d\n",
1474                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1475
1476 #ifdef CONFIG_IWLWIFI_DEBUGFS
1477                 /*
1478                  * This is ifdef'ed on DEBUGFS because otherwise the
1479                  * statistics aren't available. If DEBUGFS is set but
1480                  * DEBUG is not, these will just compile out.
1481                  */
1482                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1483                                 priv->delta_statistics.tx.rx_detected_cnt);
1484                 IWL_DEBUG_RADIO(priv,
1485                                 "ack_or_ba_timeout_collision delta = %d\n",
1486                                 priv->delta_statistics.tx.
1487                                 ack_or_ba_timeout_collision);
1488 #endif
1489                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1490                                 ba_timeout_delta);
1491                 if (!actual_ack_cnt_delta &&
1492                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1493                         rc = false;
1494         }
1495         return rc;
1496 }
1497
1498
1499 /******************************************************************************
1500  *
1501  * uCode download functions
1502  *
1503  ******************************************************************************/
1504
1505 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1506 {
1507         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1508         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1509         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1510         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1511         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1512         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1513 }
1514
1515 static void iwl_nic_start(struct iwl_priv *priv)
1516 {
1517         /* Remove all resets to allow NIC to operate */
1518         iwl_write32(priv, CSR_RESET, 0);
1519 }
1520
1521 struct iwlagn_ucode_capabilities {
1522         u32 max_probe_length;
1523 };
1524
1525 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1526 static int iwl_mac_setup_register(struct iwl_priv *priv,
1527                                   struct iwlagn_ucode_capabilities *capa);
1528
1529 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1530 {
1531         const char *name_pre = priv->cfg->fw_name_pre;
1532
1533         if (first)
1534                 priv->fw_index = priv->cfg->ucode_api_max;
1535         else
1536                 priv->fw_index--;
1537
1538         if (priv->fw_index < priv->cfg->ucode_api_min) {
1539                 IWL_ERR(priv, "no suitable firmware found!\n");
1540                 return -ENOENT;
1541         }
1542
1543         sprintf(priv->firmware_name, "%s%d%s",
1544                 name_pre, priv->fw_index, ".ucode");
1545
1546         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1547                        priv->firmware_name);
1548
1549         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1550                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1551                                        iwl_ucode_callback);
1552 }
1553
1554 struct iwlagn_firmware_pieces {
1555         const void *inst, *data, *init, *init_data, *boot;
1556         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1557
1558         u32 build;
1559
1560         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1561         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1562 };
1563
1564 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1565                                        const struct firmware *ucode_raw,
1566                                        struct iwlagn_firmware_pieces *pieces)
1567 {
1568         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1569         u32 api_ver, hdr_size;
1570         const u8 *src;
1571
1572         priv->ucode_ver = le32_to_cpu(ucode->ver);
1573         api_ver = IWL_UCODE_API(priv->ucode_ver);
1574
1575         switch (api_ver) {
1576         default:
1577                 /*
1578                  * 4965 doesn't revision the firmware file format
1579                  * along with the API version, it always uses v1
1580                  * file format.
1581                  */
1582                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1583                                 CSR_HW_REV_TYPE_4965) {
1584                         hdr_size = 28;
1585                         if (ucode_raw->size < hdr_size) {
1586                                 IWL_ERR(priv, "File size too small!\n");
1587                                 return -EINVAL;
1588                         }
1589                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1590                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1591                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1592                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1593                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1594                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1595                         src = ucode->u.v2.data;
1596                         break;
1597                 }
1598                 /* fall through for 4965 */
1599         case 0:
1600         case 1:
1601         case 2:
1602                 hdr_size = 24;
1603                 if (ucode_raw->size < hdr_size) {
1604                         IWL_ERR(priv, "File size too small!\n");
1605                         return -EINVAL;
1606                 }
1607                 pieces->build = 0;
1608                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1609                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1610                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1611                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1612                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1613                 src = ucode->u.v1.data;
1614                 break;
1615         }
1616
1617         /* Verify size of file vs. image size info in file's header */
1618         if (ucode_raw->size != hdr_size + pieces->inst_size +
1619                                 pieces->data_size + pieces->init_size +
1620                                 pieces->init_data_size + pieces->boot_size) {
1621
1622                 IWL_ERR(priv,
1623                         "uCode file size %d does not match expected size\n",
1624                         (int)ucode_raw->size);
1625                 return -EINVAL;
1626         }
1627
1628         pieces->inst = src;
1629         src += pieces->inst_size;
1630         pieces->data = src;
1631         src += pieces->data_size;
1632         pieces->init = src;
1633         src += pieces->init_size;
1634         pieces->init_data = src;
1635         src += pieces->init_data_size;
1636         pieces->boot = src;
1637         src += pieces->boot_size;
1638
1639         return 0;
1640 }
1641
1642 static int iwlagn_wanted_ucode_alternative = 1;
1643
1644 static int iwlagn_load_firmware(struct iwl_priv *priv,
1645                                 const struct firmware *ucode_raw,
1646                                 struct iwlagn_firmware_pieces *pieces,
1647                                 struct iwlagn_ucode_capabilities *capa)
1648 {
1649         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1650         struct iwl_ucode_tlv *tlv;
1651         size_t len = ucode_raw->size;
1652         const u8 *data;
1653         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1654         u64 alternatives;
1655
1656         if (len < sizeof(*ucode))
1657                 return -EINVAL;
1658
1659         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC))
1660                 return -EINVAL;
1661
1662         /*
1663          * Check which alternatives are present, and "downgrade"
1664          * when the chosen alternative is not present, warning
1665          * the user when that happens. Some files may not have
1666          * any alternatives, so don't warn in that case.
1667          */
1668         alternatives = le64_to_cpu(ucode->alternatives);
1669         tmp = wanted_alternative;
1670         if (wanted_alternative > 63)
1671                 wanted_alternative = 63;
1672         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1673                 wanted_alternative--;
1674         if (wanted_alternative && wanted_alternative != tmp)
1675                 IWL_WARN(priv,
1676                          "uCode alternative %d not available, choosing %d\n",
1677                          tmp, wanted_alternative);
1678
1679         priv->ucode_ver = le32_to_cpu(ucode->ver);
1680         pieces->build = le32_to_cpu(ucode->build);
1681         data = ucode->data;
1682
1683         len -= sizeof(*ucode);
1684
1685         while (len >= sizeof(*tlv)) {
1686                 u32 tlv_len;
1687                 enum iwl_ucode_tlv_type tlv_type;
1688                 u16 tlv_alt;
1689                 const u8 *tlv_data;
1690
1691                 len -= sizeof(*tlv);
1692                 tlv = (void *)data;
1693
1694                 tlv_len = le32_to_cpu(tlv->length);
1695                 tlv_type = le16_to_cpu(tlv->type);
1696                 tlv_alt = le16_to_cpu(tlv->alternative);
1697                 tlv_data = tlv->data;
1698
1699                 if (len < tlv_len)
1700                         return -EINVAL;
1701                 len -= ALIGN(tlv_len, 4);
1702                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1703
1704                 /*
1705                  * Alternative 0 is always valid.
1706                  *
1707                  * Skip alternative TLVs that are not selected.
1708                  */
1709                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1710                         continue;
1711
1712                 switch (tlv_type) {
1713                 case IWL_UCODE_TLV_INST:
1714                         pieces->inst = tlv_data;
1715                         pieces->inst_size = tlv_len;
1716                         break;
1717                 case IWL_UCODE_TLV_DATA:
1718                         pieces->data = tlv_data;
1719                         pieces->data_size = tlv_len;
1720                         break;
1721                 case IWL_UCODE_TLV_INIT:
1722                         pieces->init = tlv_data;
1723                         pieces->init_size = tlv_len;
1724                         break;
1725                 case IWL_UCODE_TLV_INIT_DATA:
1726                         pieces->init_data = tlv_data;
1727                         pieces->init_data_size = tlv_len;
1728                         break;
1729                 case IWL_UCODE_TLV_BOOT:
1730                         pieces->boot = tlv_data;
1731                         pieces->boot_size = tlv_len;
1732                         break;
1733                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1734                         if (tlv_len != 4)
1735                                 return -EINVAL;
1736                         capa->max_probe_length =
1737                                 le32_to_cpup((__le32 *)tlv_data);
1738                         break;
1739                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1740                         if (tlv_len != 4)
1741                                 return -EINVAL;
1742                         pieces->init_evtlog_ptr =
1743                                 le32_to_cpup((__le32 *)tlv_data);
1744                         break;
1745                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1746                         if (tlv_len != 4)
1747                                 return -EINVAL;
1748                         pieces->init_evtlog_size =
1749                                 le32_to_cpup((__le32 *)tlv_data);
1750                         break;
1751                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1752                         if (tlv_len != 4)
1753                                 return -EINVAL;
1754                         pieces->init_errlog_ptr =
1755                                 le32_to_cpup((__le32 *)tlv_data);
1756                         break;
1757                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1758                         if (tlv_len != 4)
1759                                 return -EINVAL;
1760                         pieces->inst_evtlog_ptr =
1761                                 le32_to_cpup((__le32 *)tlv_data);
1762                         break;
1763                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1764                         if (tlv_len != 4)
1765                                 return -EINVAL;
1766                         pieces->inst_evtlog_size =
1767                                 le32_to_cpup((__le32 *)tlv_data);
1768                         break;
1769                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1770                         if (tlv_len != 4)
1771                                 return -EINVAL;
1772                         pieces->inst_errlog_ptr =
1773                                 le32_to_cpup((__le32 *)tlv_data);
1774                         break;
1775                 default:
1776                         break;
1777                 }
1778         }
1779
1780         if (len)
1781                 return -EINVAL;
1782
1783         return 0;
1784 }
1785
1786 /**
1787  * iwl_ucode_callback - callback when firmware was loaded
1788  *
1789  * If loaded successfully, copies the firmware into buffers
1790  * for the card to fetch (via DMA).
1791  */
1792 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1793 {
1794         struct iwl_priv *priv = context;
1795         struct iwl_ucode_header *ucode;
1796         int err;
1797         struct iwlagn_firmware_pieces pieces;
1798         const unsigned int api_max = priv->cfg->ucode_api_max;
1799         const unsigned int api_min = priv->cfg->ucode_api_min;
1800         u32 api_ver;
1801         char buildstr[25];
1802         u32 build;
1803         struct iwlagn_ucode_capabilities ucode_capa = {
1804                 .max_probe_length = 200,
1805         };
1806
1807         memset(&pieces, 0, sizeof(pieces));
1808
1809         if (!ucode_raw) {
1810                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1811                         priv->firmware_name);
1812                 goto try_again;
1813         }
1814
1815         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1816                        priv->firmware_name, ucode_raw->size);
1817
1818         /* Make sure that we got at least the API version number */
1819         if (ucode_raw->size < 4) {
1820                 IWL_ERR(priv, "File size way too small!\n");
1821                 goto try_again;
1822         }
1823
1824         /* Data from ucode file:  header followed by uCode images */
1825         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1826
1827         if (ucode->ver)
1828                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1829         else
1830                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1831                                            &ucode_capa);
1832
1833         if (err)
1834                 goto try_again;
1835
1836         api_ver = IWL_UCODE_API(priv->ucode_ver);
1837         build = pieces.build;
1838
1839         /*
1840          * api_ver should match the api version forming part of the
1841          * firmware filename ... but we don't check for that and only rely
1842          * on the API version read from firmware header from here on forward
1843          */
1844         if (api_ver < api_min || api_ver > api_max) {
1845                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1846                           "Driver supports v%u, firmware is v%u.\n",
1847                           api_max, api_ver);
1848                 goto try_again;
1849         }
1850
1851         if (api_ver != api_max)
1852                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1853                           "got v%u. New firmware can be obtained "
1854                           "from http://www.intellinuxwireless.org.\n",
1855                           api_max, api_ver);
1856
1857         if (build)
1858                 sprintf(buildstr, " build %u", build);
1859         else
1860                 buildstr[0] = '\0';
1861
1862         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1863                  IWL_UCODE_MAJOR(priv->ucode_ver),
1864                  IWL_UCODE_MINOR(priv->ucode_ver),
1865                  IWL_UCODE_API(priv->ucode_ver),
1866                  IWL_UCODE_SERIAL(priv->ucode_ver),
1867                  buildstr);
1868
1869         snprintf(priv->hw->wiphy->fw_version,
1870                  sizeof(priv->hw->wiphy->fw_version),
1871                  "%u.%u.%u.%u%s",
1872                  IWL_UCODE_MAJOR(priv->ucode_ver),
1873                  IWL_UCODE_MINOR(priv->ucode_ver),
1874                  IWL_UCODE_API(priv->ucode_ver),
1875                  IWL_UCODE_SERIAL(priv->ucode_ver),
1876                  buildstr);
1877
1878         /*
1879          * For any of the failures below (before allocating pci memory)
1880          * we will try to load a version with a smaller API -- maybe the
1881          * user just got a corrupted version of the latest API.
1882          */
1883
1884         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1885                        priv->ucode_ver);
1886         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
1887                        pieces.inst_size);
1888         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
1889                        pieces.data_size);
1890         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
1891                        pieces.init_size);
1892         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1893                        pieces.init_data_size);
1894         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
1895                        pieces.boot_size);
1896
1897         /* Verify that uCode images will fit in card's SRAM */
1898         if (pieces.inst_size > priv->hw_params.max_inst_size) {
1899                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
1900                         pieces.inst_size);
1901                 goto try_again;
1902         }
1903
1904         if (pieces.data_size > priv->hw_params.max_data_size) {
1905                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
1906                         pieces.data_size);
1907                 goto try_again;
1908         }
1909
1910         if (pieces.init_size > priv->hw_params.max_inst_size) {
1911                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
1912                         pieces.init_size);
1913                 goto try_again;
1914         }
1915
1916         if (pieces.init_data_size > priv->hw_params.max_data_size) {
1917                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
1918                         pieces.init_data_size);
1919                 goto try_again;
1920         }
1921
1922         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
1923                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
1924                         pieces.boot_size);
1925                 goto try_again;
1926         }
1927
1928         /* Allocate ucode buffers for card's bus-master loading ... */
1929
1930         /* Runtime instructions and 2 copies of data:
1931          * 1) unmodified from disk
1932          * 2) backup cache for save/restore during power-downs */
1933         priv->ucode_code.len = pieces.inst_size;
1934         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1935
1936         priv->ucode_data.len = pieces.data_size;
1937         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1938
1939         priv->ucode_data_backup.len = pieces.data_size;
1940         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1941
1942         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1943             !priv->ucode_data_backup.v_addr)
1944                 goto err_pci_alloc;
1945
1946         /* Initialization instructions and data */
1947         if (pieces.init_size && pieces.init_data_size) {
1948                 priv->ucode_init.len = pieces.init_size;
1949                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1950
1951                 priv->ucode_init_data.len = pieces.init_data_size;
1952                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1953
1954                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1955                         goto err_pci_alloc;
1956         }
1957
1958         /* Bootstrap (instructions only, no data) */
1959         if (pieces.boot_size) {
1960                 priv->ucode_boot.len = pieces.boot_size;
1961                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1962
1963                 if (!priv->ucode_boot.v_addr)
1964                         goto err_pci_alloc;
1965         }
1966
1967         /* Now that we can no longer fail, copy information */
1968
1969         /*
1970          * The (size - 16) / 12 formula is based on the information recorded
1971          * for each event, which is of mode 1 (including timestamp) for all
1972          * new microcodes that include this information.
1973          */
1974         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
1975         if (pieces.init_evtlog_size)
1976                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
1977         else
1978                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
1979         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
1980         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
1981         if (pieces.inst_evtlog_size)
1982                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
1983         else
1984                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
1985         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1986
1987         /* Copy images into buffers for card's bus-master reads ... */
1988
1989         /* Runtime instructions (first block of data in file) */
1990         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
1991                         pieces.inst_size);
1992         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1993
1994         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1995                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1996
1997         /*
1998          * Runtime data
1999          * NOTE:  Copy into backup buffer will be done in iwl_up()
2000          */
2001         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2002                         pieces.data_size);
2003         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2004         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2005
2006         /* Initialization instructions */
2007         if (pieces.init_size) {
2008                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2009                                 pieces.init_size);
2010                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2011         }
2012
2013         /* Initialization data */
2014         if (pieces.init_data_size) {
2015                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2016                                pieces.init_data_size);
2017                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2018                        pieces.init_data_size);
2019         }
2020
2021         /* Bootstrap instructions */
2022         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2023                         pieces.boot_size);
2024         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2025
2026         /**************************************************
2027          * This is still part of probe() in a sense...
2028          *
2029          * 9. Setup and register with mac80211 and debugfs
2030          **************************************************/
2031         err = iwl_mac_setup_register(priv, &ucode_capa);
2032         if (err)
2033                 goto out_unbind;
2034
2035         err = iwl_dbgfs_register(priv, DRV_NAME);
2036         if (err)
2037                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2038
2039         /* We have our copies now, allow OS release its copies */
2040         release_firmware(ucode_raw);
2041         complete(&priv->_agn.firmware_loading_complete);
2042         return;
2043
2044  try_again:
2045         /* try next, if any */
2046         if (iwl_request_firmware(priv, false))
2047                 goto out_unbind;
2048         release_firmware(ucode_raw);
2049         return;
2050
2051  err_pci_alloc:
2052         IWL_ERR(priv, "failed to allocate pci memory\n");
2053         iwl_dealloc_ucode_pci(priv);
2054  out_unbind:
2055         complete(&priv->_agn.firmware_loading_complete);
2056         device_release_driver(&priv->pci_dev->dev);
2057         release_firmware(ucode_raw);
2058 }
2059
2060 static const char *desc_lookup_text[] = {
2061         "OK",
2062         "FAIL",
2063         "BAD_PARAM",
2064         "BAD_CHECKSUM",
2065         "NMI_INTERRUPT_WDG",
2066         "SYSASSERT",
2067         "FATAL_ERROR",
2068         "BAD_COMMAND",
2069         "HW_ERROR_TUNE_LOCK",
2070         "HW_ERROR_TEMPERATURE",
2071         "ILLEGAL_CHAN_FREQ",
2072         "VCC_NOT_STABLE",
2073         "FH_ERROR",
2074         "NMI_INTERRUPT_HOST",
2075         "NMI_INTERRUPT_ACTION_PT",
2076         "NMI_INTERRUPT_UNKNOWN",
2077         "UCODE_VERSION_MISMATCH",
2078         "HW_ERROR_ABS_LOCK",
2079         "HW_ERROR_CAL_LOCK_FAIL",
2080         "NMI_INTERRUPT_INST_ACTION_PT",
2081         "NMI_INTERRUPT_DATA_ACTION_PT",
2082         "NMI_TRM_HW_ER",
2083         "NMI_INTERRUPT_TRM",
2084         "NMI_INTERRUPT_BREAK_POINT"
2085         "DEBUG_0",
2086         "DEBUG_1",
2087         "DEBUG_2",
2088         "DEBUG_3",
2089         "ADVANCED SYSASSERT"
2090 };
2091
2092 static const char *desc_lookup(int i)
2093 {
2094         int max = ARRAY_SIZE(desc_lookup_text) - 1;
2095
2096         if (i < 0 || i > max)
2097                 i = max;
2098
2099         return desc_lookup_text[i];
2100 }
2101
2102 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2103 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2104
2105 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2106 {
2107         u32 data2, line;
2108         u32 desc, time, count, base, data1;
2109         u32 blink1, blink2, ilink1, ilink2;
2110         u32 pc, hcmd;
2111
2112         if (priv->ucode_type == UCODE_INIT) {
2113                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2114                 if (!base)
2115                         base = priv->_agn.init_errlog_ptr;
2116         } else {
2117                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2118                 if (!base)
2119                         base = priv->_agn.inst_errlog_ptr;
2120         }
2121
2122         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2123                 IWL_ERR(priv,
2124                         "Not valid error log pointer 0x%08X for %s uCode\n",
2125                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2126                 return;
2127         }
2128
2129         count = iwl_read_targ_mem(priv, base);
2130
2131         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2132                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2133                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2134                         priv->status, count);
2135         }
2136
2137         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2138         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2139         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2140         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2141         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2142         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2143         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2144         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2145         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2146         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2147         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2148
2149         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2150                                       blink1, blink2, ilink1, ilink2);
2151
2152         IWL_ERR(priv, "Desc                               Time       "
2153                 "data1      data2      line\n");
2154         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
2155                 desc_lookup(desc), desc, time, data1, data2, line);
2156         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2157         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2158                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2159 }
2160
2161 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2162
2163 /**
2164  * iwl_print_event_log - Dump error event log to syslog
2165  *
2166  */
2167 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2168                                u32 num_events, u32 mode,
2169                                int pos, char **buf, size_t bufsz)
2170 {
2171         u32 i;
2172         u32 base;       /* SRAM byte address of event log header */
2173         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2174         u32 ptr;        /* SRAM byte address of log data */
2175         u32 ev, time, data; /* event log data */
2176         unsigned long reg_flags;
2177
2178         if (num_events == 0)
2179                 return pos;
2180
2181         if (priv->ucode_type == UCODE_INIT) {
2182                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2183                 if (!base)
2184                         base = priv->_agn.init_evtlog_ptr;
2185         } else {
2186                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2187                 if (!base)
2188                         base = priv->_agn.inst_evtlog_ptr;
2189         }
2190
2191         if (mode == 0)
2192                 event_size = 2 * sizeof(u32);
2193         else
2194                 event_size = 3 * sizeof(u32);
2195
2196         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2197
2198         /* Make sure device is powered up for SRAM reads */
2199         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2200         iwl_grab_nic_access(priv);
2201
2202         /* Set starting address; reads will auto-increment */
2203         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2204         rmb();
2205
2206         /* "time" is actually "data" for mode 0 (no timestamp).
2207         * place event id # at far right for easier visual parsing. */
2208         for (i = 0; i < num_events; i++) {
2209                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2210                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2211                 if (mode == 0) {
2212                         /* data, ev */
2213                         if (bufsz) {
2214                                 pos += scnprintf(*buf + pos, bufsz - pos,
2215                                                 "EVT_LOG:0x%08x:%04u\n",
2216                                                 time, ev);
2217                         } else {
2218                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2219                                         time, ev);
2220                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2221                                         time, ev);
2222                         }
2223                 } else {
2224                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2225                         if (bufsz) {
2226                                 pos += scnprintf(*buf + pos, bufsz - pos,
2227                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2228                                                  time, data, ev);
2229                         } else {
2230                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2231                                         time, data, ev);
2232                                 trace_iwlwifi_dev_ucode_event(priv, time,
2233                                         data, ev);
2234                         }
2235                 }
2236         }
2237
2238         /* Allow device to power down */
2239         iwl_release_nic_access(priv);
2240         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2241         return pos;
2242 }
2243
2244 /**
2245  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2246  */
2247 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2248                                     u32 num_wraps, u32 next_entry,
2249                                     u32 size, u32 mode,
2250                                     int pos, char **buf, size_t bufsz)
2251 {
2252         /*
2253          * display the newest DEFAULT_LOG_ENTRIES entries
2254          * i.e the entries just before the next ont that uCode would fill.
2255          */
2256         if (num_wraps) {
2257                 if (next_entry < size) {
2258                         pos = iwl_print_event_log(priv,
2259                                                 capacity - (size - next_entry),
2260                                                 size - next_entry, mode,
2261                                                 pos, buf, bufsz);
2262                         pos = iwl_print_event_log(priv, 0,
2263                                                   next_entry, mode,
2264                                                   pos, buf, bufsz);
2265                 } else
2266                         pos = iwl_print_event_log(priv, next_entry - size,
2267                                                   size, mode, pos, buf, bufsz);
2268         } else {
2269                 if (next_entry < size) {
2270                         pos = iwl_print_event_log(priv, 0, next_entry,
2271                                                   mode, pos, buf, bufsz);
2272                 } else {
2273                         pos = iwl_print_event_log(priv, next_entry - size,
2274                                                   size, mode, pos, buf, bufsz);
2275                 }
2276         }
2277         return pos;
2278 }
2279
2280 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2281
2282 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2283                             char **buf, bool display)
2284 {
2285         u32 base;       /* SRAM byte address of event log header */
2286         u32 capacity;   /* event log capacity in # entries */
2287         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2288         u32 num_wraps;  /* # times uCode wrapped to top of log */
2289         u32 next_entry; /* index of next entry to be written by uCode */
2290         u32 size;       /* # entries that we'll print */
2291         u32 logsize;
2292         int pos = 0;
2293         size_t bufsz = 0;
2294
2295         if (priv->ucode_type == UCODE_INIT) {
2296                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2297                 logsize = priv->_agn.init_evtlog_size;
2298                 if (!base)
2299                         base = priv->_agn.init_evtlog_ptr;
2300         } else {
2301                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2302                 logsize = priv->_agn.inst_evtlog_size;
2303                 if (!base)
2304                         base = priv->_agn.inst_evtlog_ptr;
2305         }
2306
2307         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2308                 IWL_ERR(priv,
2309                         "Invalid event log pointer 0x%08X for %s uCode\n",
2310                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2311                 return -EINVAL;
2312         }
2313
2314         /* event log header */
2315         capacity = iwl_read_targ_mem(priv, base);
2316         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2317         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2318         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2319
2320         if (capacity > logsize) {
2321                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2322                         capacity, logsize);
2323                 capacity = logsize;
2324         }
2325
2326         if (next_entry > logsize) {
2327                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2328                         next_entry, logsize);
2329                 next_entry = logsize;
2330         }
2331
2332         size = num_wraps ? capacity : next_entry;
2333
2334         /* bail out if nothing in log */
2335         if (size == 0) {
2336                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2337                 return pos;
2338         }
2339
2340 #ifdef CONFIG_IWLWIFI_DEBUG
2341         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2342                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2343                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2344 #else
2345         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2346                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2347 #endif
2348         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2349                 size);
2350
2351 #ifdef CONFIG_IWLWIFI_DEBUG
2352         if (display) {
2353                 if (full_log)
2354                         bufsz = capacity * 48;
2355                 else
2356                         bufsz = size * 48;
2357                 *buf = kmalloc(bufsz, GFP_KERNEL);
2358                 if (!*buf)
2359                         return -ENOMEM;
2360         }
2361         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2362                 /*
2363                  * if uCode has wrapped back to top of log,
2364                  * start at the oldest entry,
2365                  * i.e the next one that uCode would fill.
2366                  */
2367                 if (num_wraps)
2368                         pos = iwl_print_event_log(priv, next_entry,
2369                                                 capacity - next_entry, mode,
2370                                                 pos, buf, bufsz);
2371                 /* (then/else) start at top of log */
2372                 pos = iwl_print_event_log(priv, 0,
2373                                           next_entry, mode, pos, buf, bufsz);
2374         } else
2375                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2376                                                 next_entry, size, mode,
2377                                                 pos, buf, bufsz);
2378 #else
2379         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2380                                         next_entry, size, mode,
2381                                         pos, buf, bufsz);
2382 #endif
2383         return pos;
2384 }
2385
2386 /**
2387  * iwl_alive_start - called after REPLY_ALIVE notification received
2388  *                   from protocol/runtime uCode (initialization uCode's
2389  *                   Alive gets handled by iwl_init_alive_start()).
2390  */
2391 static void iwl_alive_start(struct iwl_priv *priv)
2392 {
2393         int ret = 0;
2394
2395         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2396
2397         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2398                 /* We had an error bringing up the hardware, so take it
2399                  * all the way back down so we can try again */
2400                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2401                 goto restart;
2402         }
2403
2404         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2405          * This is a paranoid check, because we would not have gotten the
2406          * "runtime" alive if code weren't properly loaded.  */
2407         if (iwl_verify_ucode(priv)) {
2408                 /* Runtime instruction load was bad;
2409                  * take it all the way back down so we can try again */
2410                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2411                 goto restart;
2412         }
2413
2414         ret = priv->cfg->ops->lib->alive_notify(priv);
2415         if (ret) {
2416                 IWL_WARN(priv,
2417                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2418                 goto restart;
2419         }
2420
2421         /* After the ALIVE response, we can send host commands to the uCode */
2422         set_bit(STATUS_ALIVE, &priv->status);
2423
2424         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2425                 /* Enable timer to monitor the driver queues */
2426                 mod_timer(&priv->monitor_recover,
2427                         jiffies +
2428                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2429         }
2430
2431         if (iwl_is_rfkill(priv))
2432                 return;
2433
2434         ieee80211_wake_queues(priv->hw);
2435
2436         priv->active_rate = IWL_RATES_MASK;
2437
2438         /* Configure Tx antenna selection based on H/W config */
2439         if (priv->cfg->ops->hcmd->set_tx_ant)
2440                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2441
2442         if (iwl_is_associated(priv)) {
2443                 struct iwl_rxon_cmd *active_rxon =
2444                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2445                 /* apply any changes in staging */
2446                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2447                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2448         } else {
2449                 /* Initialize our rx_config data */
2450                 iwl_connection_init_rx_config(priv, NULL);
2451
2452                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2453                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2454         }
2455
2456         /* Configure Bluetooth device coexistence support */
2457         priv->cfg->ops->hcmd->send_bt_config(priv);
2458
2459         iwl_reset_run_time_calib(priv);
2460
2461         /* Configure the adapter for unassociated operation */
2462         iwlcore_commit_rxon(priv);
2463
2464         /* At this point, the NIC is initialized and operational */
2465         iwl_rf_kill_ct_config(priv);
2466
2467         iwl_leds_init(priv);
2468
2469         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2470         set_bit(STATUS_READY, &priv->status);
2471         wake_up_interruptible(&priv->wait_command_queue);
2472
2473         iwl_power_update_mode(priv, true);
2474         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2475
2476
2477         return;
2478
2479  restart:
2480         queue_work(priv->workqueue, &priv->restart);
2481 }
2482
2483 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2484
2485 static void __iwl_down(struct iwl_priv *priv)
2486 {
2487         unsigned long flags;
2488         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2489
2490         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2491
2492         if (!exit_pending)
2493                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2494
2495         iwl_clear_ucode_stations(priv);
2496         iwl_dealloc_bcast_station(priv);
2497         iwl_clear_driver_stations(priv);
2498
2499         /* Unblock any waiting calls */
2500         wake_up_interruptible_all(&priv->wait_command_queue);
2501
2502         /* Wipe out the EXIT_PENDING status bit if we are not actually
2503          * exiting the module */
2504         if (!exit_pending)
2505                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2506
2507         /* stop and reset the on-board processor */
2508         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2509
2510         /* tell the device to stop sending interrupts */
2511         spin_lock_irqsave(&priv->lock, flags);
2512         iwl_disable_interrupts(priv);
2513         spin_unlock_irqrestore(&priv->lock, flags);
2514         iwl_synchronize_irq(priv);
2515
2516         if (priv->mac80211_registered)
2517                 ieee80211_stop_queues(priv->hw);
2518
2519         /* If we have not previously called iwl_init() then
2520          * clear all bits but the RF Kill bit and return */
2521         if (!iwl_is_init(priv)) {
2522                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2523                                         STATUS_RF_KILL_HW |
2524                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2525                                         STATUS_GEO_CONFIGURED |
2526                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2527                                         STATUS_EXIT_PENDING;
2528                 goto exit;
2529         }
2530
2531         /* ...otherwise clear out all the status bits but the RF Kill
2532          * bit and continue taking the NIC down. */
2533         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2534                                 STATUS_RF_KILL_HW |
2535                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2536                                 STATUS_GEO_CONFIGURED |
2537                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2538                                 STATUS_FW_ERROR |
2539                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2540                                 STATUS_EXIT_PENDING;
2541
2542         /* device going down, Stop using ICT table */
2543         iwl_disable_ict(priv);
2544
2545         iwlagn_txq_ctx_stop(priv);
2546         iwlagn_rxq_stop(priv);
2547
2548         /* Power-down device's busmaster DMA clocks */
2549         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2550         udelay(5);
2551
2552         /* Make sure (redundant) we've released our request to stay awake */
2553         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2554
2555         /* Stop the device, and put it in low power state */
2556         priv->cfg->ops->lib->apm_ops.stop(priv);
2557
2558  exit:
2559         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2560
2561         if (priv->ibss_beacon)
2562                 dev_kfree_skb(priv->ibss_beacon);
2563         priv->ibss_beacon = NULL;
2564
2565         /* clear out any free frames */
2566         iwl_clear_free_frames(priv);
2567 }
2568
2569 static void iwl_down(struct iwl_priv *priv)
2570 {
2571         mutex_lock(&priv->mutex);
2572         __iwl_down(priv);
2573         mutex_unlock(&priv->mutex);
2574
2575         iwl_cancel_deferred_work(priv);
2576 }
2577
2578 #define HW_READY_TIMEOUT (50)
2579
2580 static int iwl_set_hw_ready(struct iwl_priv *priv)
2581 {
2582         int ret = 0;
2583
2584         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2585                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2586
2587         /* See if we got it */
2588         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2589                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2590                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2591                                 HW_READY_TIMEOUT);
2592         if (ret != -ETIMEDOUT)
2593                 priv->hw_ready = true;
2594         else
2595                 priv->hw_ready = false;
2596
2597         IWL_DEBUG_INFO(priv, "hardware %s\n",
2598                       (priv->hw_ready == 1) ? "ready" : "not ready");
2599         return ret;
2600 }
2601
2602 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2603 {
2604         int ret = 0;
2605
2606         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2607
2608         ret = iwl_set_hw_ready(priv);
2609         if (priv->hw_ready)
2610                 return ret;
2611
2612         /* If HW is not ready, prepare the conditions to check again */
2613         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2614                         CSR_HW_IF_CONFIG_REG_PREPARE);
2615
2616         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2617                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2618                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2619
2620         /* HW should be ready by now, check again. */
2621         if (ret != -ETIMEDOUT)
2622                 iwl_set_hw_ready(priv);
2623
2624         return ret;
2625 }
2626
2627 #define MAX_HW_RESTARTS 5
2628
2629 static int __iwl_up(struct iwl_priv *priv)
2630 {
2631         int i;
2632         int ret;
2633
2634         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2635                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2636                 return -EIO;
2637         }
2638
2639         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2640                 IWL_ERR(priv, "ucode not available for device bringup\n");
2641                 return -EIO;
2642         }
2643
2644         ret = iwl_alloc_bcast_station(priv, true);
2645         if (ret)
2646                 return ret;
2647
2648         iwl_prepare_card_hw(priv);
2649
2650         if (!priv->hw_ready) {
2651                 IWL_WARN(priv, "Exit HW not ready\n");
2652                 return -EIO;
2653         }
2654
2655         /* If platform's RF_KILL switch is NOT set to KILL */
2656         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2657                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2658         else
2659                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2660
2661         if (iwl_is_rfkill(priv)) {
2662                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2663
2664                 iwl_enable_interrupts(priv);
2665                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2666                 return 0;
2667         }
2668
2669         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2670
2671         ret = iwlagn_hw_nic_init(priv);
2672         if (ret) {
2673                 IWL_ERR(priv, "Unable to init nic\n");
2674                 return ret;
2675         }
2676
2677         /* make sure rfkill handshake bits are cleared */
2678         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2679         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2680                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2681
2682         /* clear (again), then enable host interrupts */
2683         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2684         iwl_enable_interrupts(priv);
2685
2686         /* really make sure rfkill handshake bits are cleared */
2687         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2688         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2689
2690         /* Copy original ucode data image from disk into backup cache.
2691          * This will be used to initialize the on-board processor's
2692          * data SRAM for a clean start when the runtime program first loads. */
2693         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2694                priv->ucode_data.len);
2695
2696         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2697
2698                 /* load bootstrap state machine,
2699                  * load bootstrap program into processor's memory,
2700                  * prepare to load the "initialize" uCode */
2701                 ret = priv->cfg->ops->lib->load_ucode(priv);
2702
2703                 if (ret) {
2704                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2705                                 ret);
2706                         continue;
2707                 }
2708
2709                 /* start card; "initialize" will load runtime ucode */
2710                 iwl_nic_start(priv);
2711
2712                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2713
2714                 return 0;
2715         }
2716
2717         set_bit(STATUS_EXIT_PENDING, &priv->status);
2718         __iwl_down(priv);
2719         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2720
2721         /* tried to restart and config the device for as long as our
2722          * patience could withstand */
2723         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2724         return -EIO;
2725 }
2726
2727
2728 /*****************************************************************************
2729  *
2730  * Workqueue callbacks
2731  *
2732  *****************************************************************************/
2733
2734 static void iwl_bg_init_alive_start(struct work_struct *data)
2735 {
2736         struct iwl_priv *priv =
2737             container_of(data, struct iwl_priv, init_alive_start.work);
2738
2739         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2740                 return;
2741
2742         mutex_lock(&priv->mutex);
2743         priv->cfg->ops->lib->init_alive_start(priv);
2744         mutex_unlock(&priv->mutex);
2745 }
2746
2747 static void iwl_bg_alive_start(struct work_struct *data)
2748 {
2749         struct iwl_priv *priv =
2750             container_of(data, struct iwl_priv, alive_start.work);
2751
2752         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2753                 return;
2754
2755         /* enable dram interrupt */
2756         iwl_reset_ict(priv);
2757
2758         mutex_lock(&priv->mutex);
2759         iwl_alive_start(priv);
2760         mutex_unlock(&priv->mutex);
2761 }
2762
2763 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2764 {
2765         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2766                         run_time_calib_work);
2767
2768         mutex_lock(&priv->mutex);
2769
2770         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2771             test_bit(STATUS_SCANNING, &priv->status)) {
2772                 mutex_unlock(&priv->mutex);
2773                 return;
2774         }
2775
2776         if (priv->start_calib) {
2777                 iwl_chain_noise_calibration(priv, &priv->statistics);
2778
2779                 iwl_sensitivity_calibration(priv, &priv->statistics);
2780         }
2781
2782         mutex_unlock(&priv->mutex);
2783 }
2784
2785 static void iwl_bg_restart(struct work_struct *data)
2786 {
2787         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2788
2789         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2790                 return;
2791
2792         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2793                 mutex_lock(&priv->mutex);
2794                 priv->vif = NULL;
2795                 priv->is_open = 0;
2796                 mutex_unlock(&priv->mutex);
2797                 iwl_down(priv);
2798                 ieee80211_restart_hw(priv->hw);
2799         } else {
2800                 iwl_down(priv);
2801
2802                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2803                         return;
2804
2805                 mutex_lock(&priv->mutex);
2806                 __iwl_up(priv);
2807                 mutex_unlock(&priv->mutex);
2808         }
2809 }
2810
2811 static void iwl_bg_rx_replenish(struct work_struct *data)
2812 {
2813         struct iwl_priv *priv =
2814             container_of(data, struct iwl_priv, rx_replenish);
2815
2816         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2817                 return;
2818
2819         mutex_lock(&priv->mutex);
2820         iwlagn_rx_replenish(priv);
2821         mutex_unlock(&priv->mutex);
2822 }
2823
2824 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2825
2826 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
2827 {
2828         struct ieee80211_conf *conf = NULL;
2829         int ret = 0;
2830
2831         if (!vif || !priv->is_open)
2832                 return;
2833
2834         if (vif->type == NL80211_IFTYPE_AP) {
2835                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2836                 return;
2837         }
2838
2839         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2840                 return;
2841
2842         iwl_scan_cancel_timeout(priv, 200);
2843
2844         conf = ieee80211_get_hw_conf(priv->hw);
2845
2846         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2847         iwlcore_commit_rxon(priv);
2848
2849         iwl_setup_rxon_timing(priv, vif);
2850         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2851                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2852         if (ret)
2853                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2854                             "Attempting to continue.\n");
2855
2856         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2857
2858         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2859
2860         if (priv->cfg->ops->hcmd->set_rxon_chain)
2861                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2862
2863         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
2864
2865         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2866                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
2867
2868         if (vif->bss_conf.use_short_preamble)
2869                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2870         else
2871                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2872
2873         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2874                 if (vif->bss_conf.use_short_slot)
2875                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2876                 else
2877                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2878         }
2879
2880         iwlcore_commit_rxon(priv);
2881
2882         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2883                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
2884
2885         switch (vif->type) {
2886         case NL80211_IFTYPE_STATION:
2887                 break;
2888         case NL80211_IFTYPE_ADHOC:
2889                 iwl_send_beacon_cmd(priv);
2890                 break;
2891         default:
2892                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2893                           __func__, vif->type);
2894                 break;
2895         }
2896
2897         /* the chain noise calibration will enabled PM upon completion
2898          * If chain noise has already been run, then we need to enable
2899          * power management here */
2900         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2901                 iwl_power_update_mode(priv, false);
2902
2903         /* Enable Rx differential gain and sensitivity calibrations */
2904         iwl_chain_noise_reset(priv);
2905         priv->start_calib = 1;
2906
2907 }
2908
2909 /*****************************************************************************
2910  *
2911  * mac80211 entry point functions
2912  *
2913  *****************************************************************************/
2914
2915 #define UCODE_READY_TIMEOUT     (4 * HZ)
2916
2917 /*
2918  * Not a mac80211 entry point function, but it fits in with all the
2919  * other mac80211 functions grouped here.
2920  */
2921 static int iwl_mac_setup_register(struct iwl_priv *priv,
2922                                   struct iwlagn_ucode_capabilities *capa)
2923 {
2924         int ret;
2925         struct ieee80211_hw *hw = priv->hw;
2926         hw->rate_control_algorithm = "iwl-agn-rs";
2927
2928         /* Tell mac80211 our characteristics */
2929         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2930                     IEEE80211_HW_AMPDU_AGGREGATION |
2931                     IEEE80211_HW_SPECTRUM_MGMT;
2932
2933         if (!priv->cfg->broken_powersave)
2934                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2935                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2936
2937         if (priv->cfg->sku & IWL_SKU_N)
2938                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2939                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2940
2941         hw->sta_data_size = sizeof(struct iwl_station_priv);
2942         hw->vif_data_size = sizeof(struct iwl_vif_priv);
2943
2944         hw->wiphy->interface_modes =
2945                 BIT(NL80211_IFTYPE_STATION) |
2946                 BIT(NL80211_IFTYPE_ADHOC);
2947
2948         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2949                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2950
2951         /*
2952          * For now, disable PS by default because it affects
2953          * RX performance significantly.
2954          */
2955         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2956
2957         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2958         /* we create the 802.11 header and a zero-length SSID element */
2959         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
2960
2961         /* Default value; 4 EDCA QOS priorities */
2962         hw->queues = 4;
2963
2964         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2965
2966         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2967                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2968                         &priv->bands[IEEE80211_BAND_2GHZ];
2969         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2970                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2971                         &priv->bands[IEEE80211_BAND_5GHZ];
2972
2973         ret = ieee80211_register_hw(priv->hw);
2974         if (ret) {
2975                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2976                 return ret;
2977         }
2978         priv->mac80211_registered = 1;
2979
2980         return 0;
2981 }
2982
2983
2984 static int iwl_mac_start(struct ieee80211_hw *hw)
2985 {
2986         struct iwl_priv *priv = hw->priv;
2987         int ret;
2988
2989         IWL_DEBUG_MAC80211(priv, "enter\n");
2990
2991         /* we should be verifying the device is ready to be opened */
2992         mutex_lock(&priv->mutex);
2993         ret = __iwl_up(priv);
2994         mutex_unlock(&priv->mutex);
2995
2996         if (ret)
2997                 return ret;
2998
2999         if (iwl_is_rfkill(priv))
3000                 goto out;
3001
3002         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3003
3004         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3005          * mac80211 will not be run successfully. */
3006         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3007                         test_bit(STATUS_READY, &priv->status),
3008                         UCODE_READY_TIMEOUT);
3009         if (!ret) {
3010                 if (!test_bit(STATUS_READY, &priv->status)) {
3011                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3012                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3013                         return -ETIMEDOUT;
3014                 }
3015         }
3016
3017         iwl_led_start(priv);
3018
3019 out:
3020         priv->is_open = 1;
3021         IWL_DEBUG_MAC80211(priv, "leave\n");
3022         return 0;
3023 }
3024
3025 static void iwl_mac_stop(struct ieee80211_hw *hw)
3026 {
3027         struct iwl_priv *priv = hw->priv;
3028
3029         IWL_DEBUG_MAC80211(priv, "enter\n");
3030
3031         if (!priv->is_open)
3032                 return;
3033
3034         priv->is_open = 0;
3035
3036         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3037                 /* stop mac, cancel any scan request and clear
3038                  * RXON_FILTER_ASSOC_MSK BIT
3039                  */
3040                 mutex_lock(&priv->mutex);
3041                 iwl_scan_cancel_timeout(priv, 100);
3042                 mutex_unlock(&priv->mutex);
3043         }
3044
3045         iwl_down(priv);
3046
3047         flush_workqueue(priv->workqueue);
3048
3049         /* enable interrupts again in order to receive rfkill changes */
3050         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3051         iwl_enable_interrupts(priv);
3052
3053         IWL_DEBUG_MAC80211(priv, "leave\n");
3054 }
3055
3056 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3057 {
3058         struct iwl_priv *priv = hw->priv;
3059
3060         IWL_DEBUG_MACDUMP(priv, "enter\n");
3061
3062         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3063                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3064
3065         if (iwlagn_tx_skb(priv, skb))
3066                 dev_kfree_skb_any(skb);
3067
3068         IWL_DEBUG_MACDUMP(priv, "leave\n");
3069         return NETDEV_TX_OK;
3070 }
3071
3072 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3073 {
3074         int ret = 0;
3075
3076         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3077                 return;
3078
3079         /* The following should be done only at AP bring up */
3080         if (!iwl_is_associated(priv)) {
3081
3082                 /* RXON - unassoc (to set timing command) */
3083                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3084                 iwlcore_commit_rxon(priv);
3085
3086                 /* RXON Timing */
3087                 iwl_setup_rxon_timing(priv, vif);
3088                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3089                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
3090                 if (ret)
3091                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3092                                         "Attempting to continue.\n");
3093
3094                 /* AP has all antennas */
3095                 priv->chain_noise_data.active_chains =
3096                         priv->hw_params.valid_rx_ant;
3097                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3098                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3099                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3100
3101                 priv->staging_rxon.assoc_id = 0;
3102
3103                 if (vif->bss_conf.use_short_preamble)
3104                         priv->staging_rxon.flags |=
3105                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3106                 else
3107                         priv->staging_rxon.flags &=
3108                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3109
3110                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3111                         if (vif->bss_conf.use_short_slot)
3112                                 priv->staging_rxon.flags |=
3113                                         RXON_FLG_SHORT_SLOT_MSK;
3114                         else
3115                                 priv->staging_rxon.flags &=
3116                                         ~RXON_FLG_SHORT_SLOT_MSK;
3117                 }
3118                 /* restore RXON assoc */
3119                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3120                 iwlcore_commit_rxon(priv);
3121         }
3122         iwl_send_beacon_cmd(priv);
3123
3124         /* FIXME - we need to add code here to detect a totally new
3125          * configuration, reset the AP, unassoc, rxon timing, assoc,
3126          * clear sta table, add BCAST sta... */
3127 }
3128
3129 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3130                                     struct ieee80211_vif *vif,
3131                                     struct ieee80211_key_conf *keyconf,
3132                                     struct ieee80211_sta *sta,
3133                                     u32 iv32, u16 *phase1key)
3134 {
3135
3136         struct iwl_priv *priv = hw->priv;
3137         IWL_DEBUG_MAC80211(priv, "enter\n");
3138
3139         iwl_update_tkip_key(priv, keyconf, sta,
3140                             iv32, phase1key);
3141
3142         IWL_DEBUG_MAC80211(priv, "leave\n");
3143 }
3144
3145 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3146                            struct ieee80211_vif *vif,
3147                            struct ieee80211_sta *sta,
3148                            struct ieee80211_key_conf *key)
3149 {
3150         struct iwl_priv *priv = hw->priv;
3151         int ret;
3152         u8 sta_id;
3153         bool is_default_wep_key = false;
3154
3155         IWL_DEBUG_MAC80211(priv, "enter\n");
3156
3157         if (priv->cfg->mod_params->sw_crypto) {
3158                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3159                 return -EOPNOTSUPP;
3160         }
3161
3162         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3163         if (sta_id == IWL_INVALID_STATION)
3164                 return -EINVAL;
3165
3166         mutex_lock(&priv->mutex);
3167         iwl_scan_cancel_timeout(priv, 100);
3168
3169         /*
3170          * If we are getting WEP group key and we didn't receive any key mapping
3171          * so far, we are in legacy wep mode (group key only), otherwise we are
3172          * in 1X mode.
3173          * In legacy wep mode, we use another host command to the uCode.
3174          */
3175         if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) {
3176                 if (cmd == SET_KEY)
3177                         is_default_wep_key = !priv->key_mapping_key;
3178                 else
3179                         is_default_wep_key =
3180                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3181         }
3182
3183         switch (cmd) {
3184         case SET_KEY:
3185                 if (is_default_wep_key)
3186                         ret = iwl_set_default_wep_key(priv, key);
3187                 else
3188                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3189
3190                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3191                 break;
3192         case DISABLE_KEY:
3193                 if (is_default_wep_key)
3194                         ret = iwl_remove_default_wep_key(priv, key);
3195                 else
3196                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3197
3198                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3199                 break;
3200         default:
3201                 ret = -EINVAL;
3202         }
3203
3204         mutex_unlock(&priv->mutex);
3205         IWL_DEBUG_MAC80211(priv, "leave\n");
3206
3207         return ret;
3208 }
3209
3210 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3211                                 struct ieee80211_vif *vif,
3212                                 enum ieee80211_ampdu_mlme_action action,
3213                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3214 {
3215         struct iwl_priv *priv = hw->priv;
3216         int ret;
3217
3218         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3219                      sta->addr, tid);
3220
3221         if (!(priv->cfg->sku & IWL_SKU_N))
3222                 return -EACCES;
3223
3224         switch (action) {
3225         case IEEE80211_AMPDU_RX_START:
3226                 IWL_DEBUG_HT(priv, "start Rx\n");
3227                 return iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3228         case IEEE80211_AMPDU_RX_STOP:
3229                 IWL_DEBUG_HT(priv, "stop Rx\n");
3230                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3231                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3232                         return 0;
3233                 else
3234                         return ret;
3235         case IEEE80211_AMPDU_TX_START:
3236                 IWL_DEBUG_HT(priv, "start Tx\n");
3237                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3238                 if (ret == 0) {
3239                         priv->_agn.agg_tids_count++;
3240                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3241                                      priv->_agn.agg_tids_count);
3242                 }
3243                 return ret;
3244         case IEEE80211_AMPDU_TX_STOP:
3245                 IWL_DEBUG_HT(priv, "stop Tx\n");
3246                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3247                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3248                         priv->_agn.agg_tids_count--;
3249                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3250                                      priv->_agn.agg_tids_count);
3251                 }
3252                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3253                         return 0;
3254                 else
3255                         return ret;
3256         case IEEE80211_AMPDU_TX_OPERATIONAL:
3257                 /* do nothing */
3258                 return -EOPNOTSUPP;
3259         default:
3260                 IWL_DEBUG_HT(priv, "unknown\n");
3261                 return -EINVAL;
3262                 break;
3263         }
3264         return 0;
3265 }
3266
3267 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3268                                struct ieee80211_vif *vif,
3269                                enum sta_notify_cmd cmd,
3270                                struct ieee80211_sta *sta)
3271 {
3272         struct iwl_priv *priv = hw->priv;
3273         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3274         int sta_id;
3275
3276         switch (cmd) {
3277         case STA_NOTIFY_SLEEP:
3278                 WARN_ON(!sta_priv->client);
3279                 sta_priv->asleep = true;
3280                 if (atomic_read(&sta_priv->pending_frames) > 0)
3281                         ieee80211_sta_block_awake(hw, sta, true);
3282                 break;
3283         case STA_NOTIFY_AWAKE:
3284                 WARN_ON(!sta_priv->client);
3285                 if (!sta_priv->asleep)
3286                         break;
3287                 sta_priv->asleep = false;
3288                 sta_id = iwl_sta_id(sta);
3289                 if (sta_id != IWL_INVALID_STATION)
3290                         iwl_sta_modify_ps_wake(priv, sta_id);
3291                 break;
3292         default:
3293                 break;
3294         }
3295 }
3296
3297 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3298                               struct ieee80211_vif *vif,
3299                               struct ieee80211_sta *sta)
3300 {
3301         struct iwl_priv *priv = hw->priv;
3302         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3303         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3304         int ret;
3305         u8 sta_id;
3306
3307         sta_priv->common.sta_id = IWL_INVALID_STATION;
3308
3309         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3310                         sta->addr);
3311
3312         atomic_set(&sta_priv->pending_frames, 0);
3313         if (vif->type == NL80211_IFTYPE_AP)
3314                 sta_priv->client = true;
3315
3316         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3317                                      &sta_id);
3318         if (ret) {
3319                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3320                         sta->addr, ret);
3321                 /* Should we return success if return code is EEXIST ? */
3322                 return ret;
3323         }
3324
3325         sta_priv->common.sta_id = sta_id;
3326
3327         /* Initialize rate scaling */
3328         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3329                        sta->addr);
3330         iwl_rs_rate_init(priv, sta, sta_id);
3331
3332         return 0;
3333 }
3334
3335 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3336                                    struct ieee80211_channel_switch *ch_switch)
3337 {
3338         struct iwl_priv *priv = hw->priv;
3339         const struct iwl_channel_info *ch_info;
3340         struct ieee80211_conf *conf = &hw->conf;
3341         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3342         u16 ch;
3343         unsigned long flags = 0;
3344
3345         IWL_DEBUG_MAC80211(priv, "enter\n");
3346
3347         if (iwl_is_rfkill(priv))
3348                 goto out_exit;
3349
3350         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3351             test_bit(STATUS_SCANNING, &priv->status))
3352                 goto out_exit;
3353
3354         if (!iwl_is_associated(priv))
3355                 goto out_exit;
3356
3357         /* channel switch in progress */
3358         if (priv->switch_rxon.switch_in_progress == true)
3359                 goto out_exit;
3360
3361         mutex_lock(&priv->mutex);
3362         if (priv->cfg->ops->lib->set_channel_switch) {
3363
3364                 ch = ieee80211_frequency_to_channel(
3365                         ch_switch->channel->center_freq);
3366                 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3367                         ch_info = iwl_get_channel_info(priv,
3368                                                        conf->channel->band,
3369                                                        ch);
3370                         if (!is_channel_valid(ch_info)) {
3371                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3372                                 goto out;
3373                         }
3374                         spin_lock_irqsave(&priv->lock, flags);
3375
3376                         priv->current_ht_config.smps = conf->smps_mode;
3377
3378                         /* Configure HT40 channels */
3379                         ht_conf->is_ht = conf_is_ht(conf);
3380                         if (ht_conf->is_ht) {
3381                                 if (conf_is_ht40_minus(conf)) {
3382                                         ht_conf->extension_chan_offset =
3383                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3384                                         ht_conf->is_40mhz = true;
3385                                 } else if (conf_is_ht40_plus(conf)) {
3386                                         ht_conf->extension_chan_offset =
3387                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3388                                         ht_conf->is_40mhz = true;
3389                                 } else {
3390                                         ht_conf->extension_chan_offset =
3391                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3392                                         ht_conf->is_40mhz = false;
3393                                 }
3394                         } else
3395                                 ht_conf->is_40mhz = false;
3396
3397                         /* if we are switching from ht to 2.4 clear flags
3398                          * from any ht related info since 2.4 does not
3399                          * support ht */
3400                         if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
3401                                 priv->staging_rxon.flags = 0;
3402
3403                         iwl_set_rxon_channel(priv, conf->channel);
3404                         iwl_set_rxon_ht(priv, ht_conf);
3405                         iwl_set_flags_for_band(priv, conf->channel->band,
3406                                                priv->vif);
3407                         spin_unlock_irqrestore(&priv->lock, flags);
3408
3409                         iwl_set_rate(priv);
3410                         /*
3411                          * at this point, staging_rxon has the
3412                          * configuration for channel switch
3413                          */
3414                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3415                                                                     ch_switch))
3416                                 priv->switch_rxon.switch_in_progress = false;
3417                 }
3418         }
3419 out:
3420         mutex_unlock(&priv->mutex);
3421 out_exit:
3422         if (!priv->switch_rxon.switch_in_progress)
3423                 ieee80211_chswitch_done(priv->vif, false);
3424         IWL_DEBUG_MAC80211(priv, "leave\n");
3425 }
3426
3427 /*****************************************************************************
3428  *
3429  * sysfs attributes
3430  *
3431  *****************************************************************************/
3432
3433 #ifdef CONFIG_IWLWIFI_DEBUG
3434
3435 /*
3436  * The following adds a new attribute to the sysfs representation
3437  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3438  * used for controlling the debug level.
3439  *
3440  * See the level definitions in iwl for details.
3441  *
3442  * The debug_level being managed using sysfs below is a per device debug
3443  * level that is used instead of the global debug level if it (the per
3444  * device debug level) is set.
3445  */
3446 static ssize_t show_debug_level(struct device *d,
3447                                 struct device_attribute *attr, char *buf)
3448 {
3449         struct iwl_priv *priv = dev_get_drvdata(d);
3450         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3451 }
3452 static ssize_t store_debug_level(struct device *d,
3453                                 struct device_attribute *attr,
3454                                  const char *buf, size_t count)
3455 {
3456         struct iwl_priv *priv = dev_get_drvdata(d);
3457         unsigned long val;
3458         int ret;
3459
3460         ret = strict_strtoul(buf, 0, &val);
3461         if (ret)
3462                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3463         else {
3464                 priv->debug_level = val;
3465                 if (iwl_alloc_traffic_mem(priv))
3466                         IWL_ERR(priv,
3467                                 "Not enough memory to generate traffic log\n");
3468         }
3469         return strnlen(buf, count);
3470 }
3471
3472 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3473                         show_debug_level, store_debug_level);
3474
3475
3476 #endif /* CONFIG_IWLWIFI_DEBUG */
3477
3478
3479 static ssize_t show_temperature(struct device *d,
3480                                 struct device_attribute *attr, char *buf)
3481 {
3482         struct iwl_priv *priv = dev_get_drvdata(d);
3483
3484         if (!iwl_is_alive(priv))
3485                 return -EAGAIN;
3486
3487         return sprintf(buf, "%d\n", priv->temperature);
3488 }
3489
3490 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3491
3492 static ssize_t show_tx_power(struct device *d,
3493                              struct device_attribute *attr, char *buf)
3494 {
3495         struct iwl_priv *priv = dev_get_drvdata(d);
3496
3497         if (!iwl_is_ready_rf(priv))
3498                 return sprintf(buf, "off\n");
3499         else
3500                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3501 }
3502
3503 static ssize_t store_tx_power(struct device *d,
3504                               struct device_attribute *attr,
3505                               const char *buf, size_t count)
3506 {
3507         struct iwl_priv *priv = dev_get_drvdata(d);
3508         unsigned long val;
3509         int ret;
3510
3511         ret = strict_strtoul(buf, 10, &val);
3512         if (ret)
3513                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3514         else {
3515                 ret = iwl_set_tx_power(priv, val, false);
3516                 if (ret)
3517                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3518                                 ret);
3519                 else
3520                         ret = count;
3521         }
3522         return ret;
3523 }
3524
3525 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3526
3527 static ssize_t show_rts_ht_protection(struct device *d,
3528                              struct device_attribute *attr, char *buf)
3529 {
3530         struct iwl_priv *priv = dev_get_drvdata(d);
3531
3532         return sprintf(buf, "%s\n",
3533                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3534 }
3535
3536 static ssize_t store_rts_ht_protection(struct device *d,
3537                               struct device_attribute *attr,
3538                               const char *buf, size_t count)
3539 {
3540         struct iwl_priv *priv = dev_get_drvdata(d);
3541         unsigned long val;
3542         int ret;
3543
3544         ret = strict_strtoul(buf, 10, &val);
3545         if (ret)
3546                 IWL_INFO(priv, "Input is not in decimal form.\n");
3547         else {
3548                 if (!iwl_is_associated(priv))
3549                         priv->cfg->use_rts_for_ht = val ? true : false;
3550                 else
3551                         IWL_ERR(priv, "Sta associated with AP - "
3552                                 "Change protection mechanism is not allowed\n");
3553                 ret = count;
3554         }
3555         return ret;
3556 }
3557
3558 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3559                         show_rts_ht_protection, store_rts_ht_protection);
3560
3561
3562 /*****************************************************************************
3563  *
3564  * driver setup and teardown
3565  *
3566  *****************************************************************************/
3567
3568 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3569 {
3570         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3571
3572         init_waitqueue_head(&priv->wait_command_queue);
3573
3574         INIT_WORK(&priv->restart, iwl_bg_restart);
3575         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3576         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3577         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3578         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3579         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3580
3581         iwl_setup_scan_deferred_work(priv);
3582
3583         if (priv->cfg->ops->lib->setup_deferred_work)
3584                 priv->cfg->ops->lib->setup_deferred_work(priv);
3585
3586         init_timer(&priv->statistics_periodic);
3587         priv->statistics_periodic.data = (unsigned long)priv;
3588         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3589
3590         init_timer(&priv->ucode_trace);
3591         priv->ucode_trace.data = (unsigned long)priv;
3592         priv->ucode_trace.function = iwl_bg_ucode_trace;
3593
3594         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3595                 init_timer(&priv->monitor_recover);
3596                 priv->monitor_recover.data = (unsigned long)priv;
3597                 priv->monitor_recover.function =
3598                         priv->cfg->ops->lib->recover_from_tx_stall;
3599         }
3600
3601         if (!priv->cfg->use_isr_legacy)
3602                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3603                         iwl_irq_tasklet, (unsigned long)priv);
3604         else
3605                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3606                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3607 }
3608
3609 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3610 {
3611         if (priv->cfg->ops->lib->cancel_deferred_work)
3612                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3613
3614         cancel_delayed_work_sync(&priv->init_alive_start);
3615         cancel_delayed_work(&priv->scan_check);
3616         cancel_work_sync(&priv->start_internal_scan);
3617         cancel_delayed_work(&priv->alive_start);
3618         cancel_work_sync(&priv->beacon_update);
3619         del_timer_sync(&priv->statistics_periodic);
3620         del_timer_sync(&priv->ucode_trace);
3621         if (priv->cfg->ops->lib->recover_from_tx_stall)
3622                 del_timer_sync(&priv->monitor_recover);
3623 }
3624
3625 static void iwl_init_hw_rates(struct iwl_priv *priv,
3626                               struct ieee80211_rate *rates)
3627 {
3628         int i;
3629
3630         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3631                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3632                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3633                 rates[i].hw_value_short = i;
3634                 rates[i].flags = 0;
3635                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3636                         /*
3637                          * If CCK != 1M then set short preamble rate flag.
3638                          */
3639                         rates[i].flags |=
3640                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3641                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3642                 }
3643         }
3644 }
3645
3646 static int iwl_init_drv(struct iwl_priv *priv)
3647 {
3648         int ret;
3649
3650         priv->ibss_beacon = NULL;
3651
3652         spin_lock_init(&priv->sta_lock);
3653         spin_lock_init(&priv->hcmd_lock);
3654
3655         INIT_LIST_HEAD(&priv->free_frames);
3656
3657         mutex_init(&priv->mutex);
3658         mutex_init(&priv->sync_cmd_mutex);
3659
3660         priv->ieee_channels = NULL;
3661         priv->ieee_rates = NULL;
3662         priv->band = IEEE80211_BAND_2GHZ;
3663
3664         priv->iw_mode = NL80211_IFTYPE_STATION;
3665         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3666         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3667         priv->_agn.agg_tids_count = 0;
3668
3669         /* initialize force reset */
3670         priv->force_reset[IWL_RF_RESET].reset_duration =
3671                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3672         priv->force_reset[IWL_FW_RESET].reset_duration =
3673                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3674
3675         /* Choose which receivers/antennas to use */
3676         if (priv->cfg->ops->hcmd->set_rxon_chain)
3677                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3678
3679         iwl_init_scan_params(priv);
3680
3681         /* Set the tx_power_user_lmt to the lowest power level
3682          * this value will get overwritten by channel max power avg
3683          * from eeprom */
3684         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3685
3686         ret = iwl_init_channel_map(priv);
3687         if (ret) {
3688                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3689                 goto err;
3690         }
3691
3692         ret = iwlcore_init_geos(priv);
3693         if (ret) {
3694                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3695                 goto err_free_channel_map;
3696         }
3697         iwl_init_hw_rates(priv, priv->ieee_rates);
3698
3699         return 0;
3700
3701 err_free_channel_map:
3702         iwl_free_channel_map(priv);
3703 err:
3704         return ret;
3705 }
3706
3707 static void iwl_uninit_drv(struct iwl_priv *priv)
3708 {
3709         iwl_calib_free_results(priv);
3710         iwlcore_free_geos(priv);
3711         iwl_free_channel_map(priv);
3712         kfree(priv->scan_cmd);
3713 }
3714
3715 static struct attribute *iwl_sysfs_entries[] = {
3716         &dev_attr_temperature.attr,
3717         &dev_attr_tx_power.attr,
3718         &dev_attr_rts_ht_protection.attr,
3719 #ifdef CONFIG_IWLWIFI_DEBUG
3720         &dev_attr_debug_level.attr,
3721 #endif
3722         NULL
3723 };
3724
3725 static struct attribute_group iwl_attribute_group = {
3726         .name = NULL,           /* put in device directory */
3727         .attrs = iwl_sysfs_entries,
3728 };
3729
3730 static struct ieee80211_ops iwl_hw_ops = {
3731         .tx = iwl_mac_tx,
3732         .start = iwl_mac_start,
3733         .stop = iwl_mac_stop,
3734         .add_interface = iwl_mac_add_interface,
3735         .remove_interface = iwl_mac_remove_interface,
3736         .config = iwl_mac_config,
3737         .configure_filter = iwl_configure_filter,
3738         .set_key = iwl_mac_set_key,
3739         .update_tkip_key = iwl_mac_update_tkip_key,
3740         .conf_tx = iwl_mac_conf_tx,
3741         .reset_tsf = iwl_mac_reset_tsf,
3742         .bss_info_changed = iwl_bss_info_changed,
3743         .ampdu_action = iwl_mac_ampdu_action,
3744         .hw_scan = iwl_mac_hw_scan,
3745         .sta_notify = iwl_mac_sta_notify,
3746         .sta_add = iwlagn_mac_sta_add,
3747         .sta_remove = iwl_mac_sta_remove,
3748         .channel_switch = iwl_mac_channel_switch,
3749 };
3750
3751 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3752 {
3753         int err = 0;
3754         struct iwl_priv *priv;
3755         struct ieee80211_hw *hw;
3756         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3757         unsigned long flags;
3758         u16 pci_cmd;
3759         u8 perm_addr[ETH_ALEN];
3760
3761         /************************
3762          * 1. Allocating HW data
3763          ************************/
3764
3765         /* Disabling hardware scan means that mac80211 will perform scans
3766          * "the hard way", rather than using device's scan. */
3767         if (cfg->mod_params->disable_hw_scan) {
3768                 if (iwl_debug_level & IWL_DL_INFO)
3769                         dev_printk(KERN_DEBUG, &(pdev->dev),
3770                                    "Disabling hw_scan\n");
3771                 iwl_hw_ops.hw_scan = NULL;
3772         }
3773
3774         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3775         if (!hw) {
3776                 err = -ENOMEM;
3777                 goto out;
3778         }
3779         priv = hw->priv;
3780         /* At this point both hw and priv are allocated. */
3781
3782         SET_IEEE80211_DEV(hw, &pdev->dev);
3783
3784         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3785         priv->cfg = cfg;
3786         priv->pci_dev = pdev;
3787         priv->inta_mask = CSR_INI_SET_MASK;
3788
3789         if (iwl_alloc_traffic_mem(priv))
3790                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3791
3792         /**************************
3793          * 2. Initializing PCI bus
3794          **************************/
3795         if (pci_enable_device(pdev)) {
3796                 err = -ENODEV;
3797                 goto out_ieee80211_free_hw;
3798         }
3799
3800         pci_set_master(pdev);
3801
3802         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3803         if (!err)
3804                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3805         if (err) {
3806                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3807                 if (!err)
3808                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3809                 /* both attempts failed: */
3810                 if (err) {
3811                         IWL_WARN(priv, "No suitable DMA available.\n");
3812                         goto out_pci_disable_device;
3813                 }
3814         }
3815
3816         err = pci_request_regions(pdev, DRV_NAME);
3817         if (err)
3818                 goto out_pci_disable_device;
3819
3820         pci_set_drvdata(pdev, priv);
3821
3822
3823         /***********************
3824          * 3. Read REV register
3825          ***********************/
3826         priv->hw_base = pci_iomap(pdev, 0, 0);
3827         if (!priv->hw_base) {
3828                 err = -ENODEV;
3829                 goto out_pci_release_regions;
3830         }
3831
3832         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3833                 (unsigned long long) pci_resource_len(pdev, 0));
3834         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3835
3836         /* these spin locks will be used in apm_ops.init and EEPROM access
3837          * we should init now
3838          */
3839         spin_lock_init(&priv->reg_lock);
3840         spin_lock_init(&priv->lock);
3841
3842         /*
3843          * stop and reset the on-board processor just in case it is in a
3844          * strange state ... like being left stranded by a primary kernel
3845          * and this is now the kdump kernel trying to start up
3846          */
3847         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3848
3849         iwl_hw_detect(priv);
3850         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3851                 priv->cfg->name, priv->hw_rev);
3852
3853         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3854          * PCI Tx retries from interfering with C3 CPU state */
3855         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3856
3857         iwl_prepare_card_hw(priv);
3858         if (!priv->hw_ready) {
3859                 IWL_WARN(priv, "Failed, HW not ready\n");
3860                 goto out_iounmap;
3861         }
3862
3863         /*****************
3864          * 4. Read EEPROM
3865          *****************/
3866         /* Read the EEPROM */
3867         err = iwl_eeprom_init(priv);
3868         if (err) {
3869                 IWL_ERR(priv, "Unable to init EEPROM\n");
3870                 goto out_iounmap;
3871         }
3872         err = iwl_eeprom_check_version(priv);
3873         if (err)
3874                 goto out_free_eeprom;
3875
3876         /* extract MAC Address */
3877         iwl_eeprom_get_mac(priv, perm_addr);
3878         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", perm_addr);
3879         SET_IEEE80211_PERM_ADDR(priv->hw, perm_addr);
3880
3881         /************************
3882          * 5. Setup HW constants
3883          ************************/
3884         if (iwl_set_hw_params(priv)) {
3885                 IWL_ERR(priv, "failed to set hw parameters\n");
3886                 goto out_free_eeprom;
3887         }
3888
3889         /*******************
3890          * 6. Setup priv
3891          *******************/
3892
3893         err = iwl_init_drv(priv);
3894         if (err)
3895                 goto out_free_eeprom;
3896         /* At this point both hw and priv are initialized. */
3897
3898         /********************
3899          * 7. Setup services
3900          ********************/
3901         spin_lock_irqsave(&priv->lock, flags);
3902         iwl_disable_interrupts(priv);
3903         spin_unlock_irqrestore(&priv->lock, flags);
3904
3905         pci_enable_msi(priv->pci_dev);
3906
3907         iwl_alloc_isr_ict(priv);
3908         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3909                           IRQF_SHARED, DRV_NAME, priv);
3910         if (err) {
3911                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3912                 goto out_disable_msi;
3913         }
3914         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3915         if (err) {
3916                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3917                 goto out_free_irq;
3918         }
3919
3920         iwl_setup_deferred_work(priv);
3921         iwl_setup_rx_handlers(priv);
3922
3923         /*********************************************
3924          * 8. Enable interrupts and read RFKILL state
3925          *********************************************/
3926
3927         /* enable interrupts if needed: hw bug w/a */
3928         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3929         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3930                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3931                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3932         }
3933
3934         iwl_enable_interrupts(priv);
3935
3936         /* If platform's RF_KILL switch is NOT set to KILL */
3937         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3938                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3939         else
3940                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3941
3942         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3943                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3944
3945         iwl_power_initialize(priv);
3946         iwl_tt_initialize(priv);
3947
3948         init_completion(&priv->_agn.firmware_loading_complete);
3949
3950         err = iwl_request_firmware(priv, true);
3951         if (err)
3952                 goto out_remove_sysfs;
3953
3954         return 0;
3955
3956  out_remove_sysfs:
3957         destroy_workqueue(priv->workqueue);
3958         priv->workqueue = NULL;
3959         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3960  out_free_irq:
3961         free_irq(priv->pci_dev->irq, priv);
3962         iwl_free_isr_ict(priv);
3963  out_disable_msi:
3964         pci_disable_msi(priv->pci_dev);
3965         iwl_uninit_drv(priv);
3966  out_free_eeprom:
3967         iwl_eeprom_free(priv);
3968  out_iounmap:
3969         pci_iounmap(pdev, priv->hw_base);
3970  out_pci_release_regions:
3971         pci_set_drvdata(pdev, NULL);
3972         pci_release_regions(pdev);
3973  out_pci_disable_device:
3974         pci_disable_device(pdev);
3975  out_ieee80211_free_hw:
3976         iwl_free_traffic_mem(priv);
3977         ieee80211_free_hw(priv->hw);
3978  out:
3979         return err;
3980 }
3981
3982 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3983 {
3984         struct iwl_priv *priv = pci_get_drvdata(pdev);
3985         unsigned long flags;
3986
3987         if (!priv)
3988                 return;
3989
3990         wait_for_completion(&priv->_agn.firmware_loading_complete);
3991
3992         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3993
3994         iwl_dbgfs_unregister(priv);
3995         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3996
3997         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3998          * to be called and iwl_down since we are removing the device
3999          * we need to set STATUS_EXIT_PENDING bit.
4000          */
4001         set_bit(STATUS_EXIT_PENDING, &priv->status);
4002         if (priv->mac80211_registered) {
4003                 ieee80211_unregister_hw(priv->hw);
4004                 priv->mac80211_registered = 0;
4005         } else {
4006                 iwl_down(priv);
4007         }
4008
4009         /*
4010          * Make sure device is reset to low power before unloading driver.
4011          * This may be redundant with iwl_down(), but there are paths to
4012          * run iwl_down() without calling apm_ops.stop(), and there are
4013          * paths to avoid running iwl_down() at all before leaving driver.
4014          * This (inexpensive) call *makes sure* device is reset.
4015          */
4016         priv->cfg->ops->lib->apm_ops.stop(priv);
4017
4018         iwl_tt_exit(priv);
4019
4020         /* make sure we flush any pending irq or
4021          * tasklet for the driver
4022          */
4023         spin_lock_irqsave(&priv->lock, flags);
4024         iwl_disable_interrupts(priv);
4025         spin_unlock_irqrestore(&priv->lock, flags);
4026
4027         iwl_synchronize_irq(priv);
4028
4029         iwl_dealloc_ucode_pci(priv);
4030
4031         if (priv->rxq.bd)
4032                 iwlagn_rx_queue_free(priv, &priv->rxq);
4033         iwlagn_hw_txq_ctx_free(priv);
4034
4035         iwl_eeprom_free(priv);
4036
4037
4038         /*netif_stop_queue(dev); */
4039         flush_workqueue(priv->workqueue);
4040
4041         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4042          * priv->workqueue... so we can't take down the workqueue
4043          * until now... */
4044         destroy_workqueue(priv->workqueue);
4045         priv->workqueue = NULL;
4046         iwl_free_traffic_mem(priv);
4047
4048         free_irq(priv->pci_dev->irq, priv);
4049         pci_disable_msi(priv->pci_dev);
4050         pci_iounmap(pdev, priv->hw_base);
4051         pci_release_regions(pdev);
4052         pci_disable_device(pdev);
4053         pci_set_drvdata(pdev, NULL);
4054
4055         iwl_uninit_drv(priv);
4056
4057         iwl_free_isr_ict(priv);
4058
4059         if (priv->ibss_beacon)
4060                 dev_kfree_skb(priv->ibss_beacon);
4061
4062         ieee80211_free_hw(priv->hw);
4063 }
4064
4065
4066 /*****************************************************************************
4067  *
4068  * driver and module entry point
4069  *
4070  *****************************************************************************/
4071
4072 /* Hardware specific file defines the PCI IDs table for that hardware module */
4073 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4074 #ifdef CONFIG_IWL4965
4075         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4076         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4077 #endif /* CONFIG_IWL4965 */
4078 #ifdef CONFIG_IWL5000
4079 /* 5100 Series WiFi */
4080         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4081         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4082         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4083         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4084         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4085         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4086         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4087         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4088         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4089         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4090         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4091         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4092         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4093         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4094         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4095         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4096         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4097         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4098         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4099         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4100         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4101         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4102         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4103         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4104
4105 /* 5300 Series WiFi */
4106         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4107         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4108         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4109         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4110         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4111         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4112         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4113         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4114         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4115         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4116         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4117         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4118
4119 /* 5350 Series WiFi/WiMax */
4120         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4121         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4122         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4123
4124 /* 5150 Series Wifi/WiMax */
4125         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4126         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4127         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4128         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4129         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4130         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4131
4132         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4133         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4134         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4135         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4136
4137 /* 6x00 Series */
4138         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4139         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4140         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4141         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4142         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4143         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4144         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4145         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4146         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4147         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4148
4149 /* 6x00 Series Gen2a */
4150         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4151         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4152         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4153         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4154         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4155         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4156         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4157         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4158         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4159         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4160         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4161         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4162         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4163         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4164
4165 /* 6x00 Series Gen2b */
4166         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4167         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4168         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4169         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4170         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4171         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4172         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4173         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4174         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4175         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4176         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4177         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4178         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4179         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4180         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4181         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4182         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4183         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4184         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4185         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4186         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4187         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4188         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4189         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4190         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4191         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4192         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4193         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4194
4195 /* 6x50 WiFi/WiMax Series */
4196         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4197         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4198         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4199         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4200         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4201         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4202
4203 /* 1000 Series WiFi */
4204         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4205         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4206         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4207         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4208         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4209         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4210         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4211         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4212         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4213         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4214         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4215         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4216 #endif /* CONFIG_IWL5000 */
4217
4218         {0}
4219 };
4220 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4221
4222 static struct pci_driver iwl_driver = {
4223         .name = DRV_NAME,
4224         .id_table = iwl_hw_card_ids,
4225         .probe = iwl_pci_probe,
4226         .remove = __devexit_p(iwl_pci_remove),
4227 #ifdef CONFIG_PM
4228         .suspend = iwl_pci_suspend,
4229         .resume = iwl_pci_resume,
4230 #endif
4231 };
4232
4233 static int __init iwl_init(void)
4234 {
4235
4236         int ret;
4237         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4238         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4239
4240         ret = iwlagn_rate_control_register();
4241         if (ret) {
4242                 printk(KERN_ERR DRV_NAME
4243                        "Unable to register rate control algorithm: %d\n", ret);
4244                 return ret;
4245         }
4246
4247         ret = pci_register_driver(&iwl_driver);
4248         if (ret) {
4249                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4250                 goto error_register;
4251         }
4252
4253         return ret;
4254
4255 error_register:
4256         iwlagn_rate_control_unregister();
4257         return ret;
4258 }
4259
4260 static void __exit iwl_exit(void)
4261 {
4262         pci_unregister_driver(&iwl_driver);
4263         iwlagn_rate_control_unregister();
4264 }
4265
4266 module_exit(iwl_exit);
4267 module_init(iwl_init);
4268
4269 #ifdef CONFIG_IWLWIFI_DEBUG
4270 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4271 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4272 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4273 MODULE_PARM_DESC(debug, "debug output mask");
4274 #endif
4275
4276 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4277 MODULE_PARM_DESC(swcrypto50,
4278                  "using crypto in software (default 0 [hardware]) (deprecated)");
4279 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4280 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4281 module_param_named(queues_num50,
4282                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4283 MODULE_PARM_DESC(queues_num50,
4284                  "number of hw queues in 50xx series (deprecated)");
4285 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4286 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4287 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4288 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4289 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4290 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4291 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4292                    int, S_IRUGO);
4293 MODULE_PARM_DESC(amsdu_size_8K50,
4294                  "enable 8K amsdu size in 50XX series (deprecated)");
4295 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4296                    int, S_IRUGO);
4297 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4298 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4299 MODULE_PARM_DESC(fw_restart50,
4300                  "restart firmware in case of error (deprecated)");
4301 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4302 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4303 module_param_named(
4304         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4305 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4306
4307 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4308                    S_IRUGO);
4309 MODULE_PARM_DESC(ucode_alternative,
4310                  "specify ucode alternative to use from ucode file");