drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/slab.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/delay.h>
  37 #include <linux/sched.h>
  38 #include <linux/skbuff.h>
  39 #include <linux/netdevice.h>
  40 #include <linux/wireless.h>
  41 #include <linux/firmware.h>
  42 #include <linux/etherdevice.h>
  43 #include <linux/if_arp.h>
  44
  45 #include <net/mac80211.h>
  46
  47 #include <asm/div64.h>
  48
  49 #define DRV_NAME        "iwlagn"
  50
  51 #include "iwl-eeprom.h"
  52 #include "iwl-dev.h"
  53 #include "iwl-core.h"
  54 #include "iwl-io.h"
  55 #include "iwl-helpers.h"
  56 #include "iwl-sta.h"
  57 #include "iwl-calib.h"
  58 #include "iwl-agn.h"
  59
  60
  61 /******************************************************************************
  62  *
  63  * module boiler plate
  64  *
  65  ******************************************************************************/
  66
  67 /*
  68  * module name, copyright, version, etc.
  69  */
  70 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  71
  72 #ifdef CONFIG_IWLWIFI_DEBUG
  73 #define VD "d"
  74 #else
  75 #define VD
  76 #endif
  77
  78 #define DRV_VERSION     IWLWIFI_VERSION VD
  79
  80
  81 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  82 MODULE_VERSION(DRV_VERSION);
  83 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  84 MODULE_LICENSE("GPL");
  85 MODULE_ALIAS("iwl4965");
  86
  87 /**
  88  * iwl_commit_rxon - commit staging_rxon to hardware
  89  *
  90  * The RXON command in staging_rxon is committed to the hardware and
  91  * the active_rxon structure is updated with the new data.  This
  92  * function correctly transitions out of the RXON_ASSOC_MSK state if
  93  * a HW tune is required based on the RXON structure changes.
  94  */
  95 int iwl_commit_rxon(struct iwl_priv *priv)
  96 {
  97         /* cast away the const for active_rxon in this function */
  98         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  99         int ret;
 100         bool new_assoc =
 101                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 102
 103         if (!iwl_is_alive(priv))
 104                 return -EBUSY;
 105
 106         /* always get timestamp with Rx frame */
 107         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 108
 109         ret = iwl_check_rxon_cmd(priv);
 110         if (ret) {
 111                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 112                 return -EINVAL;
 113         }
 114
 115         /*
 116          * receive commit_rxon request
 117          * abort any previous channel switch if still in process
 118          */
 119         if (priv->switch_rxon.switch_in_progress &&
 120             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 121                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 122                       le16_to_cpu(priv->switch_rxon.channel));
 123                 iwl_chswitch_done(priv, false);
 124         }
 125
 126         /* If we don't need to send a full RXON, we can use
 127          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 128          * and other flags for the current radio configuration. */
 129         if (!iwl_full_rxon_required(priv)) {
 130                 ret = iwl_send_rxon_assoc(priv);
 131                 if (ret) {
 132                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 133                         return ret;
 134                 }
 135
 136                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 137                 iwl_print_rx_config_cmd(priv);
 138                 return 0;
 139         }
 140
 141         /* If we are currently associated and the new config requires
 142          * an RXON_ASSOC and the new config wants the associated mask enabled,
 143          * we must clear the associated from the active configuration
 144          * before we apply the new config */
 145         if (iwl_is_associated(priv) && new_assoc) {
 146                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 147                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 148
 149                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 150                                       sizeof(struct iwl_rxon_cmd),
 151                                       &priv->active_rxon);
 152
 153                 /* If the mask clearing failed then we set
 154                  * active_rxon back to what it was previously */
 155                 if (ret) {
 156                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 157                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 158                         return ret;
 159                 }
 160                 iwl_clear_ucode_stations(priv);
 161                 iwl_restore_stations(priv);
 162                 ret = iwl_restore_default_wep_keys(priv);
 163                 if (ret) {
 164                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 165                         return ret;
 166                 }
 167         }
 168
 169         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 170                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 171                        "* channel = %d\n"
 172                        "* bssid = %pM\n",
 173                        (new_assoc ? "" : "out"),
 174                        le16_to_cpu(priv->staging_rxon.channel),
 175                        priv->staging_rxon.bssid_addr);
 176
 177         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 178
 179         /* Apply the new configuration
 180          * RXON unassoc clears the station table in uCode so restoration of
 181          * stations is needed after it (the RXON command) completes
 182          */
 183         if (!new_assoc) {
 184                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 185                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 186                 if (ret) {
 187                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 188                         return ret;
 189                 }
 190                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 191                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 192                 iwl_clear_ucode_stations(priv);
 193                 iwl_restore_stations(priv);
 194                 ret = iwl_restore_default_wep_keys(priv);
 195                 if (ret) {
 196                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 197                         return ret;
 198                 }
 199         }
 200
 201         priv->start_calib = 0;
 202         if (new_assoc) {
 203                 /*
 204                  * allow CTS-to-self if possible for new association.
 205                  * this is relevant only for 5000 series and up,
 206                  * but will not damage 4965
 207                  */
 208                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 209
 210                 /* Apply the new configuration
 211                  * RXON assoc doesn't clear the station table in uCode,
 212                  */
 213                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 214                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 215                 if (ret) {
 216                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 217                         return ret;
 218                 }
 219                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 220         }
 221         iwl_print_rx_config_cmd(priv);
 222
 223         iwl_init_sensitivity(priv);
 224
 225         /* If we issue a new RXON command which required a tune then we must
 226          * send a new TXPOWER command or we won't be able to Tx any frames */
 227         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 228         if (ret) {
 229                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 230                 return ret;
 231         }
 232
 233         return 0;
 234 }
 235
 236 void iwl_update_chain_flags(struct iwl_priv *priv)
 237 {
 238
 239         if (priv->cfg->ops->hcmd->set_rxon_chain)
 240                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 241         iwlcore_commit_rxon(priv);
 242 }
 243
 244 static void iwl_clear_free_frames(struct iwl_priv *priv)
 245 {
 246         struct list_head *element;
 247
 248         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 249                        priv->frames_count);
 250
 251         while (!list_empty(&priv->free_frames)) {
 252                 element = priv->free_frames.next;
 253                 list_del(element);
 254                 kfree(list_entry(element, struct iwl_frame, list));
 255                 priv->frames_count--;
 256         }
 257
 258         if (priv->frames_count) {
 259                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 260                             priv->frames_count);
 261                 priv->frames_count = 0;
 262         }
 263 }
 264
 265 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 266 {
 267         struct iwl_frame *frame;
 268         struct list_head *element;
 269         if (list_empty(&priv->free_frames)) {
 270                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 271                 if (!frame) {
 272                         IWL_ERR(priv, "Could not allocate frame!\n");
 273                         return NULL;
 274                 }
 275
 276                 priv->frames_count++;
 277                 return frame;
 278         }
 279
 280         element = priv->free_frames.next;
 281         list_del(element);
 282         return list_entry(element, struct iwl_frame, list);
 283 }
 284
 285 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 286 {
 287         memset(frame, 0, sizeof(*frame));
 288         list_add(&frame->list, &priv->free_frames);
 289 }
 290
 291 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 292                                           struct ieee80211_hdr *hdr,
 293                                           int left)
 294 {
 295         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 296             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 297              (priv->iw_mode != NL80211_IFTYPE_AP)))
 298                 return 0;
 299
 300         if (priv->ibss_beacon->len > left)
 301                 return 0;
 302
 303         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 304
 305         return priv->ibss_beacon->len;
 306 }
 307
 308 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 309 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 310                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 311                 u8 *beacon, u32 frame_size)
 312 {
 313         u16 tim_idx;
 314         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 315
 316         /*
 317          * The index is relative to frame start but we start looking at the
 318          * variable-length part of the beacon.
 319          */
 320         tim_idx = mgmt->u.beacon.variable - beacon;
 321
 322         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 323         while ((tim_idx < (frame_size - 2)) &&
 324                         (beacon[tim_idx] != WLAN_EID_TIM))
 325                 tim_idx += beacon[tim_idx+1] + 2;
 326
 327         /* If TIM field was found, set variables */
 328         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 329                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 330                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 331         } else
 332                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 333 }
 334
 335 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 336                                        struct iwl_frame *frame)
 337 {
 338         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 339         u32 frame_size;
 340         u32 rate_flags;
 341         u32 rate;
 342         /*
 343          * We have to set up the TX command, the TX Beacon command, and the
 344          * beacon contents.
 345          */
 346
 347         /* Initialize memory */
 348         tx_beacon_cmd = &frame->u.beacon;
 349         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 350
 351         /* Set up TX beacon contents */
 352         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 353                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 354         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 355                 return 0;
 356
 357         /* Set up TX command fields */
 358         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 359         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 360         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 361         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 362                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 363
 364         /* Set up TX beacon command fields */
 365         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 366                         frame_size);
 367
 368         /* Set up packet rate and flags */
 369         rate = iwl_rate_get_lowest_plcp(priv);
 370         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 371                                               priv->hw_params.valid_tx_ant);
 372         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 373         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 374                 rate_flags |= RATE_MCS_CCK_MSK;
 375         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 376                         rate_flags);
 377
 378         return sizeof(*tx_beacon_cmd) + frame_size;
 379 }
 380 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 381 {
 382         struct iwl_frame *frame;
 383         unsigned int frame_size;
 384         int rc;
 385
 386         frame = iwl_get_free_frame(priv);
 387         if (!frame) {
 388                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 389                           "command.\n");
 390                 return -ENOMEM;
 391         }
 392
 393         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 394         if (!frame_size) {
 395                 IWL_ERR(priv, "Error configuring the beacon command\n");
 396                 iwl_free_frame(priv, frame);
 397                 return -EINVAL;
 398         }
 399
 400         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 401                               &frame->u.cmd[0]);
 402
 403         iwl_free_frame(priv, frame);
 404
 405         return rc;
 406 }
 407
 408 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 409 {
 410         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 411
 412         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 413         if (sizeof(dma_addr_t) > sizeof(u32))
 414                 addr |=
 415                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 416
 417         return addr;
 418 }
 419
 420 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 421 {
 422         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 423
 424         return le16_to_cpu(tb->hi_n_len) >> 4;
 425 }
 426
 427 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 428                                   dma_addr_t addr, u16 len)
 429 {
 430         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 431         u16 hi_n_len = len << 4;
 432
 433         put_unaligned_le32(addr, &tb->lo);
 434         if (sizeof(dma_addr_t) > sizeof(u32))
 435                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 436
 437         tb->hi_n_len = cpu_to_le16(hi_n_len);
 438
 439         tfd->num_tbs = idx + 1;
 440 }
 441
 442 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 443 {
 444         return tfd->num_tbs & 0x1f;
 445 }
 446
 447 /**
 448  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 449  * @priv - driver private data
 450  * @txq - tx queue
 451  *
 452  * Does NOT advance any TFD circular buffer read/write indexes
 453  * Does NOT free the TFD itself (which is within circular buffer)
 454  */
 455 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 456 {
 457         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 458         struct iwl_tfd *tfd;
 459         struct pci_dev *dev = priv->pci_dev;
 460         int index = txq->q.read_ptr;
 461         int i;
 462         int num_tbs;
 463
 464         tfd = &tfd_tmp[index];
 465
 466         /* Sanity check on number of chunks */
 467         num_tbs = iwl_tfd_get_num_tbs(tfd);
 468
 469         if (num_tbs >= IWL_NUM_OF_TBS) {
 470                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 471                 /* @todo issue fatal error, it is quite serious situation */
 472                 return;
 473         }
 474
 475         /* Unmap tx_cmd */
 476         if (num_tbs)
 477                 pci_unmap_single(dev,
 478                                 dma_unmap_addr(&txq->meta[index], mapping),
 479                                 dma_unmap_len(&txq->meta[index], len),
 480                                 PCI_DMA_BIDIRECTIONAL);
 481
 482         /* Unmap chunks, if any. */
 483         for (i = 1; i < num_tbs; i++)
 484                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 485                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 486
 487         /* free SKB */
 488         if (txq->txb) {
 489                 struct sk_buff *skb;
 490
 491                 skb = txq->txb[txq->q.read_ptr].skb;
 492
 493                 /* can be called from irqs-disabled context */
 494                 if (skb) {
 495                         dev_kfree_skb_any(skb);
 496                         txq->txb[txq->q.read_ptr].skb = NULL;
 497                 }
 498         }
 499 }
 500
 501 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 502                                  struct iwl_tx_queue *txq,
 503                                  dma_addr_t addr, u16 len,
 504                                  u8 reset, u8 pad)
 505 {
 506         struct iwl_queue *q;
 507         struct iwl_tfd *tfd, *tfd_tmp;
 508         u32 num_tbs;
 509
 510         q = &txq->q;
 511         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 512         tfd = &tfd_tmp[q->write_ptr];
 513
 514         if (reset)
 515                 memset(tfd, 0, sizeof(*tfd));
 516
 517         num_tbs = iwl_tfd_get_num_tbs(tfd);
 518
 519         /* Each TFD can point to a maximum 20 Tx buffers */
 520         if (num_tbs >= IWL_NUM_OF_TBS) {
 521                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 522                           IWL_NUM_OF_TBS);
 523                 return -EINVAL;
 524         }
 525
 526         BUG_ON(addr & ~DMA_BIT_MASK(36));
 527         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 528                 IWL_ERR(priv, "Unaligned address = %llx\n",
 529                           (unsigned long long)addr);
 530
 531         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 532
 533         return 0;
 534 }
 535
 536 /*
 537  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 538  * given Tx queue, and enable the DMA channel used for that queue.
 539  *
 540  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 541  * channels supported in hardware.
 542  */
 543 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 544                          struct iwl_tx_queue *txq)
 545 {
 546         int txq_id = txq->q.id;
 547
 548         /* Circular buffer (TFD queue in DRAM) physical base address */
 549         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 550                              txq->q.dma_addr >> 8);
 551
 552         return 0;
 553 }
 554
 555 /******************************************************************************
 556  *
 557  * Generic RX handler implementations
 558  *
 559  ******************************************************************************/
 560 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 561                                 struct iwl_rx_mem_buffer *rxb)
 562 {
 563         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 564         struct iwl_alive_resp *palive;
 565         struct delayed_work *pwork;
 566
 567         palive = &pkt->u.alive_frame;
 568
 569         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 570                        "0x%01X 0x%01X\n",
 571                        palive->is_valid, palive->ver_type,
 572                        palive->ver_subtype);
 573
 574         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 575                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 576                 memcpy(&priv->card_alive_init,
 577                        &pkt->u.alive_frame,
 578                        sizeof(struct iwl_init_alive_resp));
 579                 pwork = &priv->init_alive_start;
 580         } else {
 581                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 582                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 583                        sizeof(struct iwl_alive_resp));
 584                 pwork = &priv->alive_start;
 585         }
 586
 587         /* We delay the ALIVE response by 5ms to
 588          * give the HW RF Kill time to activate... */
 589         if (palive->is_valid == UCODE_VALID_OK)
 590                 queue_delayed_work(priv->workqueue, pwork,
 591                                    msecs_to_jiffies(5));
 592         else
 593                 IWL_WARN(priv, "uCode did not respond OK.\n");
 594 }
 595
 596 static void iwl_bg_beacon_update(struct work_struct *work)
 597 {
 598         struct iwl_priv *priv =
 599                 container_of(work, struct iwl_priv, beacon_update);
 600         struct sk_buff *beacon;
 601
 602         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 603         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 604
 605         if (!beacon) {
 606                 IWL_ERR(priv, "update beacon failed\n");
 607                 return;
 608         }
 609
 610         mutex_lock(&priv->mutex);
 611         /* new beacon skb is allocated every time; dispose previous.*/
 612         if (priv->ibss_beacon)
 613                 dev_kfree_skb(priv->ibss_beacon);
 614
 615         priv->ibss_beacon = beacon;
 616         mutex_unlock(&priv->mutex);
 617
 618         iwl_send_beacon_cmd(priv);
 619 }
 620
 621 /**
 622  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 623  *
 624  * This callback is provided in order to send a statistics request.
 625  *
 626  * This timer function is continually reset to execute within
 627  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 628  * was received.  We need to ensure we receive the statistics in order
 629  * to update the temperature used for calibrating the TXPOWER.
 630  */
 631 static void iwl_bg_statistics_periodic(unsigned long data)
 632 {
 633         struct iwl_priv *priv = (struct iwl_priv *)data;
 634
 635         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 636                 return;
 637
 638         /* dont send host command if rf-kill is on */
 639         if (!iwl_is_ready_rf(priv))
 640                 return;
 641
 642         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 643 }
 644
 645
 646 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 647                                         u32 start_idx, u32 num_events,
 648                                         u32 mode)
 649 {
 650         u32 i;
 651         u32 ptr;        /* SRAM byte address of log data */
 652         u32 ev, time, data; /* event log data */
 653         unsigned long reg_flags;
 654
 655         if (mode == 0)
 656                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 657         else
 658                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 659
 660         /* Make sure device is powered up for SRAM reads */
 661         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 662         if (iwl_grab_nic_access(priv)) {
 663                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 664                 return;
 665         }
 666
 667         /* Set starting address; reads will auto-increment */
 668         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 669         rmb();
 670
 671         /*
 672          * "time" is actually "data" for mode 0 (no timestamp).
 673          * place event id # at far right for easier visual parsing.
 674          */
 675         for (i = 0; i < num_events; i++) {
 676                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 677                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 678                 if (mode == 0) {
 679                         trace_iwlwifi_dev_ucode_cont_event(priv,
 680                                                         0, time, ev);
 681                 } else {
 682                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 683                         trace_iwlwifi_dev_ucode_cont_event(priv,
 684                                                 time, data, ev);
 685                 }
 686         }
 687         /* Allow device to power down */
 688         iwl_release_nic_access(priv);
 689         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 690 }
 691
 692 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 693 {
 694         u32 capacity;   /* event log capacity in # entries */
 695         u32 base;       /* SRAM byte address of event log header */
 696         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 697         u32 num_wraps;  /* # times uCode wrapped to top of log */
 698         u32 next_entry; /* index of next entry to be written by uCode */
 699
 700         if (priv->ucode_type == UCODE_INIT)
 701                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 702         else
 703                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 704         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 705                 capacity = iwl_read_targ_mem(priv, base);
 706                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 707                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 708                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 709         } else
 710                 return;
 711
 712         if (num_wraps == priv->event_log.num_wraps) {
 713                 iwl_print_cont_event_trace(priv,
 714                                        base, priv->event_log.next_entry,
 715                                        next_entry - priv->event_log.next_entry,
 716                                        mode);
 717                 priv->event_log.non_wraps_count++;
 718         } else {
 719                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 720                         priv->event_log.wraps_more_count++;
 721                 else
 722                         priv->event_log.wraps_once_count++;
 723                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 724                                 num_wraps - priv->event_log.num_wraps,
 725                                 next_entry, priv->event_log.next_entry);
 726                 if (next_entry < priv->event_log.next_entry) {
 727                         iwl_print_cont_event_trace(priv, base,
 728                                priv->event_log.next_entry,
 729                                capacity - priv->event_log.next_entry,
 730                                mode);
 731
 732                         iwl_print_cont_event_trace(priv, base, 0,
 733                                 next_entry, mode);
 734                 } else {
 735                         iwl_print_cont_event_trace(priv, base,
 736                                next_entry, capacity - next_entry,
 737                                mode);
 738
 739                         iwl_print_cont_event_trace(priv, base, 0,
 740                                 next_entry, mode);
 741                 }
 742         }
 743         priv->event_log.num_wraps = num_wraps;
 744         priv->event_log.next_entry = next_entry;
 745 }
 746
 747 /**
 748  * iwl_bg_ucode_trace - Timer callback to log ucode event
 749  *
 750  * The timer is continually set to execute every
 751  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 752  * this function is to perform continuous uCode event logging operation
 753  * if enabled
 754  */
 755 static void iwl_bg_ucode_trace(unsigned long data)
 756 {
 757         struct iwl_priv *priv = (struct iwl_priv *)data;
 758
 759         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 760                 return;
 761
 762         if (priv->event_log.ucode_trace) {
 763                 iwl_continuous_event_trace(priv);
 764                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 765                 mod_timer(&priv->ucode_trace,
 766                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 767         }
 768 }
 769
 770 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 771                                 struct iwl_rx_mem_buffer *rxb)
 772 {
 773 #ifdef CONFIG_IWLWIFI_DEBUG
 774         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 775         struct iwl4965_beacon_notif *beacon =
 776                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 777         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 778
 779         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 780                 "tsf %d %d rate %d\n",
 781                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 782                 beacon->beacon_notify_hdr.failure_frame,
 783                 le32_to_cpu(beacon->ibss_mgr_status),
 784                 le32_to_cpu(beacon->high_tsf),
 785                 le32_to_cpu(beacon->low_tsf), rate);
 786 #endif
 787
 788         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 789             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 790                 queue_work(priv->workqueue, &priv->beacon_update);
 791 }
 792
 793 /* Handle notification from uCode that card's power state is changing
 794  * due to software, hardware, or critical temperature RFKILL */
 795 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 796                                     struct iwl_rx_mem_buffer *rxb)
 797 {
 798         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 799         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 800         unsigned long status = priv->status;
 801
 802         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 803                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 804                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 805                           (flags & CT_CARD_DISABLED) ?
 806                           "Reached" : "Not reached");
 807
 808         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 809                      CT_CARD_DISABLED)) {
 810
 811                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 812                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 813
 814                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 815                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 816
 817                 if (!(flags & RXON_CARD_DISABLED)) {
 818                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 819                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 820                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 821                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 822                 }
 823                 if (flags & CT_CARD_DISABLED)
 824                         iwl_tt_enter_ct_kill(priv);
 825         }
 826         if (!(flags & CT_CARD_DISABLED))
 827                 iwl_tt_exit_ct_kill(priv);
 828
 829         if (flags & HW_CARD_DISABLED)
 830                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 831         else
 832                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 833
 834
 835         if (!(flags & RXON_CARD_DISABLED))
 836                 iwl_scan_cancel(priv);
 837
 838         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 839              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 840                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 841                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 842         else
 843                 wake_up_interruptible(&priv->wait_command_queue);
 844 }
 845
 846 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 847 {
 848         if (src == IWL_PWR_SRC_VAUX) {
 849                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 850                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 851                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 852                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 853         } else {
 854                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 855                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 856                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 857         }
 858
 859         return 0;
 860 }
 861
 862 static void iwl_bg_tx_flush(struct work_struct *work)
 863 {
 864         struct iwl_priv *priv =
 865                 container_of(work, struct iwl_priv, tx_flush);
 866
 867         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 868                 return;
 869
 870         /* do nothing if rf-kill is on */
 871         if (!iwl_is_ready_rf(priv))
 872                 return;
 873
 874         if (priv->cfg->ops->lib->txfifo_flush) {
 875                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 876                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 877         }
 878 }
 879
 880 /**
 881  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 882  *
 883  * Setup the RX handlers for each of the reply types sent from the uCode
 884  * to the host.
 885  *
 886  * This function chains into the hardware specific files for them to setup
 887  * any hardware specific handlers as well.
 888  */
 889 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 890 {
 891         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 892         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 893         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 894         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 895                         iwl_rx_spectrum_measure_notif;
 896         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 897         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 898             iwl_rx_pm_debug_statistics_notif;
 899         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 900
 901         /*
 902          * The same handler is used for both the REPLY to a discrete
 903          * statistics request from the host as well as for the periodic
 904          * statistics notifications (after received beacons) from the uCode.
 905          */
 906         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 907         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 908
 909         iwl_setup_rx_scan_handlers(priv);
 910
 911         /* status change handler */
 912         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 913
 914         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 915             iwl_rx_missed_beacon_notif;
 916         /* Rx handlers */
 917         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 918         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 919         /* block ack */
 920         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 921         /* Set up hardware specific Rx handlers */
 922         priv->cfg->ops->lib->rx_handler_setup(priv);
 923 }
 924
 925 /**
 926  * iwl_rx_handle - Main entry function for receiving responses from uCode
 927  *
 928  * Uses the priv->rx_handlers callback function array to invoke
 929  * the appropriate handlers, including command responses,
 930  * frame-received notifications, and other notifications.
 931  */
 932 void iwl_rx_handle(struct iwl_priv *priv)
 933 {
 934         struct iwl_rx_mem_buffer *rxb;
 935         struct iwl_rx_packet *pkt;
 936         struct iwl_rx_queue *rxq = &priv->rxq;
 937         u32 r, i;
 938         int reclaim;
 939         unsigned long flags;
 940         u8 fill_rx = 0;
 941         u32 count = 8;
 942         int total_empty;
 943
 944         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 945          * buffer that the driver may process (last buffer filled by ucode). */
 946         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 947         i = rxq->read;
 948
 949         /* Rx interrupt, but nothing sent from uCode */
 950         if (i == r)
 951                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 952
 953         /* calculate total frames need to be restock after handling RX */
 954         total_empty = r - rxq->write_actual;
 955         if (total_empty < 0)
 956                 total_empty += RX_QUEUE_SIZE;
 957
 958         if (total_empty > (RX_QUEUE_SIZE / 2))
 959                 fill_rx = 1;
 960
 961         while (i != r) {
 962                 int len;
 963
 964                 rxb = rxq->queue[i];
 965
 966                 /* If an RXB doesn't have a Rx queue slot associated with it,
 967                  * then a bug has been introduced in the queue refilling
 968                  * routines -- catch it here */
 969                 BUG_ON(rxb == NULL);
 970
 971                 rxq->queue[i] = NULL;
 972
 973                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 974                                PAGE_SIZE << priv->hw_params.rx_page_order,
 975                                PCI_DMA_FROMDEVICE);
 976                 pkt = rxb_addr(rxb);
 977
 978                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 979                 len += sizeof(u32); /* account for status word */
 980                 trace_iwlwifi_dev_rx(priv, pkt, len);
 981
 982                 /* Reclaim a command buffer only if this packet is a response
 983                  *   to a (driver-originated) command.
 984                  * If the packet (e.g. Rx frame) originated from uCode,
 985                  *   there is no command buffer to reclaim.
 986                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 987                  *   but apparently a few don't get set; catch them here. */
 988                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 989                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 990                         (pkt->hdr.cmd != REPLY_RX) &&
 991                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 992                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 993                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 994                         (pkt->hdr.cmd != REPLY_TX);
 995
 996                 /* Based on type of command response or notification,
 997                  *   handle those that need handling via function in
 998                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 999                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1000                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
1001                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1002                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1003                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1004                 } else {
1005                         /* No handling needed */
1006                         IWL_DEBUG_RX(priv,
1007                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1008                                 r, i, get_cmd_string(pkt->hdr.cmd),
1009                                 pkt->hdr.cmd);
1010                 }
1011
1012                 /*
1013                  * XXX: After here, we should always check rxb->page
1014                  * against NULL before touching it or its virtual
1015                  * memory (pkt). Because some rx_handler might have
1016                  * already taken or freed the pages.
1017                  */
1018
1019                 if (reclaim) {
1020                         /* Invoke any callbacks, transfer the buffer to caller,
1021                          * and fire off the (possibly) blocking iwl_send_cmd()
1022                          * as we reclaim the driver command queue */
1023                         if (rxb->page)
1024                                 iwl_tx_cmd_complete(priv, rxb);
1025                         else
1026                                 IWL_WARN(priv, "Claim null rxb?\n");
1027                 }
1028
1029                 /* Reuse the page if possible. For notification packets and
1030                  * SKBs that fail to Rx correctly, add them back into the
1031                  * rx_free list for reuse later. */
1032                 spin_lock_irqsave(&rxq->lock, flags);
1033                 if (rxb->page != NULL) {
1034                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1035                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1036                                 PCI_DMA_FROMDEVICE);
1037                         list_add_tail(&rxb->list, &rxq->rx_free);
1038                         rxq->free_count++;
1039                 } else
1040                         list_add_tail(&rxb->list, &rxq->rx_used);
1041
1042                 spin_unlock_irqrestore(&rxq->lock, flags);
1043
1044                 i = (i + 1) & RX_QUEUE_MASK;
1045                 /* If there are a lot of unused frames,
1046                  * restock the Rx queue so ucode wont assert. */
1047                 if (fill_rx) {
1048                         count++;
1049                         if (count >= 8) {
1050                                 rxq->read = i;
1051                                 iwlagn_rx_replenish_now(priv);
1052                                 count = 0;
1053                         }
1054                 }
1055         }
1056
1057         /* Backtrack one entry */
1058         rxq->read = i;
1059         if (fill_rx)
1060                 iwlagn_rx_replenish_now(priv);
1061         else
1062                 iwlagn_rx_queue_restock(priv);
1063 }
1064
1065 /* call this function to flush any scheduled tasklet */
1066 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1067 {
1068         /* wait to make sure we flush pending tasklet*/
1069         synchronize_irq(priv->pci_dev->irq);
1070         tasklet_kill(&priv->irq_tasklet);
1071 }
1072
1073 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1074 {
1075         u32 inta, handled = 0;
1076         u32 inta_fh;
1077         unsigned long flags;
1078         u32 i;
1079 #ifdef CONFIG_IWLWIFI_DEBUG
1080         u32 inta_mask;
1081 #endif
1082
1083         spin_lock_irqsave(&priv->lock, flags);
1084
1085         /* Ack/clear/reset pending uCode interrupts.
1086          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1087          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1088         inta = iwl_read32(priv, CSR_INT);
1089         iwl_write32(priv, CSR_INT, inta);
1090
1091         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1092          * Any new interrupts that happen after this, either while we're
1093          * in this tasklet, or later, will show up in next ISR/tasklet. */
1094         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1095         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1096
1097 #ifdef CONFIG_IWLWIFI_DEBUG
1098         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1099                 /* just for debug */
1100                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1101                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1102                               inta, inta_mask, inta_fh);
1103         }
1104 #endif
1105
1106         spin_unlock_irqrestore(&priv->lock, flags);
1107
1108         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1109          * atomic, make sure that inta covers all the interrupts that
1110          * we've discovered, even if FH interrupt came in just after
1111          * reading CSR_INT. */
1112         if (inta_fh & CSR49_FH_INT_RX_MASK)
1113                 inta |= CSR_INT_BIT_FH_RX;
1114         if (inta_fh & CSR49_FH_INT_TX_MASK)
1115                 inta |= CSR_INT_BIT_FH_TX;
1116
1117         /* Now service all interrupt bits discovered above. */
1118         if (inta & CSR_INT_BIT_HW_ERR) {
1119                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1120
1121                 /* Tell the device to stop sending interrupts */
1122                 iwl_disable_interrupts(priv);
1123
1124                 priv->isr_stats.hw++;
1125                 iwl_irq_handle_error(priv);
1126
1127                 handled |= CSR_INT_BIT_HW_ERR;
1128
1129                 return;
1130         }
1131
1132 #ifdef CONFIG_IWLWIFI_DEBUG
1133         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1134                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1135                 if (inta & CSR_INT_BIT_SCD) {
1136                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1137                                       "the frame/frames.\n");
1138                         priv->isr_stats.sch++;
1139                 }
1140
1141                 /* Alive notification via Rx interrupt will do the real work */
1142                 if (inta & CSR_INT_BIT_ALIVE) {
1143                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1144                         priv->isr_stats.alive++;
1145                 }
1146         }
1147 #endif
1148         /* Safely ignore these bits for debug checks below */
1149         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1150
1151         /* HW RF KILL switch toggled */
1152         if (inta & CSR_INT_BIT_RF_KILL) {
1153                 int hw_rf_kill = 0;
1154                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1155                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1156                         hw_rf_kill = 1;
1157
1158                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1159                                 hw_rf_kill ? "disable radio" : "enable radio");
1160
1161                 priv->isr_stats.rfkill++;
1162
1163                 /* driver only loads ucode once setting the interface up.
1164                  * the driver allows loading the ucode even if the radio
1165                  * is killed. Hence update the killswitch state here. The
1166                  * rfkill handler will care about restarting if needed.
1167                  */
1168                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1169                         if (hw_rf_kill)
1170                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1171                         else
1172                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1173                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1174                 }
1175
1176                 handled |= CSR_INT_BIT_RF_KILL;
1177         }
1178
1179         /* Chip got too hot and stopped itself */
1180         if (inta & CSR_INT_BIT_CT_KILL) {
1181                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1182                 priv->isr_stats.ctkill++;
1183                 handled |= CSR_INT_BIT_CT_KILL;
1184         }
1185
1186         /* Error detected by uCode */
1187         if (inta & CSR_INT_BIT_SW_ERR) {
1188                 IWL_ERR(priv, "Microcode SW error detected. "
1189                         " Restarting 0x%X.\n", inta);
1190                 priv->isr_stats.sw++;
1191                 priv->isr_stats.sw_err = inta;
1192                 iwl_irq_handle_error(priv);
1193                 handled |= CSR_INT_BIT_SW_ERR;
1194         }
1195
1196         /*
1197          * uCode wakes up after power-down sleep.
1198          * Tell device about any new tx or host commands enqueued,
1199          * and about any Rx buffers made available while asleep.
1200          */
1201         if (inta & CSR_INT_BIT_WAKEUP) {
1202                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1203                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1204                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1205                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1206                 priv->isr_stats.wakeup++;
1207                 handled |= CSR_INT_BIT_WAKEUP;
1208         }
1209
1210         /* All uCode command responses, including Tx command responses,
1211          * Rx "responses" (frame-received notification), and other
1212          * notifications from uCode come through here*/
1213         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1214                 iwl_rx_handle(priv);
1215                 priv->isr_stats.rx++;
1216                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1217         }
1218
1219         /* This "Tx" DMA channel is used only for loading uCode */
1220         if (inta & CSR_INT_BIT_FH_TX) {
1221                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1222                 priv->isr_stats.tx++;
1223                 handled |= CSR_INT_BIT_FH_TX;
1224                 /* Wake up uCode load routine, now that load is complete */
1225                 priv->ucode_write_complete = 1;
1226                 wake_up_interruptible(&priv->wait_command_queue);
1227         }
1228
1229         if (inta & ~handled) {
1230                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1231                 priv->isr_stats.unhandled++;
1232         }
1233
1234         if (inta & ~(priv->inta_mask)) {
1235                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1236                          inta & ~priv->inta_mask);
1237                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1238         }
1239
1240         /* Re-enable all interrupts */
1241         /* only Re-enable if diabled by irq */
1242         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1243                 iwl_enable_interrupts(priv);
1244
1245 #ifdef CONFIG_IWLWIFI_DEBUG
1246         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1247                 inta = iwl_read32(priv, CSR_INT);
1248                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1249                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1250                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1251                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1252         }
1253 #endif
1254 }
1255
1256 /* tasklet for iwlagn interrupt */
1257 static void iwl_irq_tasklet(struct iwl_priv *priv)
1258 {
1259         u32 inta = 0;
1260         u32 handled = 0;
1261         unsigned long flags;
1262         u32 i;
1263 #ifdef CONFIG_IWLWIFI_DEBUG
1264         u32 inta_mask;
1265 #endif
1266
1267         spin_lock_irqsave(&priv->lock, flags);
1268
1269         /* Ack/clear/reset pending uCode interrupts.
1270          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1271          */
1272         /* There is a hardware bug in the interrupt mask function that some
1273          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1274          * they are disabled in the CSR_INT_MASK register. Furthermore the
1275          * ICT interrupt handling mechanism has another bug that might cause
1276          * these unmasked interrupts fail to be detected. We workaround the
1277          * hardware bugs here by ACKing all the possible interrupts so that
1278          * interrupt coalescing can still be achieved.
1279          */
1280         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1281
1282         inta = priv->_agn.inta;
1283
1284 #ifdef CONFIG_IWLWIFI_DEBUG
1285         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1286                 /* just for debug */
1287                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1288                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1289                                 inta, inta_mask);
1290         }
1291 #endif
1292
1293         spin_unlock_irqrestore(&priv->lock, flags);
1294
1295         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1296         priv->_agn.inta = 0;
1297
1298         /* Now service all interrupt bits discovered above. */
1299         if (inta & CSR_INT_BIT_HW_ERR) {
1300                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1301
1302                 /* Tell the device to stop sending interrupts */
1303                 iwl_disable_interrupts(priv);
1304
1305                 priv->isr_stats.hw++;
1306                 iwl_irq_handle_error(priv);
1307
1308                 handled |= CSR_INT_BIT_HW_ERR;
1309
1310                 return;
1311         }
1312
1313 #ifdef CONFIG_IWLWIFI_DEBUG
1314         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1315                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1316                 if (inta & CSR_INT_BIT_SCD) {
1317                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1318                                       "the frame/frames.\n");
1319                         priv->isr_stats.sch++;
1320                 }
1321
1322                 /* Alive notification via Rx interrupt will do the real work */
1323                 if (inta & CSR_INT_BIT_ALIVE) {
1324                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1325                         priv->isr_stats.alive++;
1326                 }
1327         }
1328 #endif
1329         /* Safely ignore these bits for debug checks below */
1330         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1331
1332         /* HW RF KILL switch toggled */
1333         if (inta & CSR_INT_BIT_RF_KILL) {
1334                 int hw_rf_kill = 0;
1335                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1336                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1337                         hw_rf_kill = 1;
1338
1339                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1340                                 hw_rf_kill ? "disable radio" : "enable radio");
1341
1342                 priv->isr_stats.rfkill++;
1343
1344                 /* driver only loads ucode once setting the interface up.
1345                  * the driver allows loading the ucode even if the radio
1346                  * is killed. Hence update the killswitch state here. The
1347                  * rfkill handler will care about restarting if needed.
1348                  */
1349                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1350                         if (hw_rf_kill)
1351                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1352                         else
1353                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1354                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1355                 }
1356
1357                 handled |= CSR_INT_BIT_RF_KILL;
1358         }
1359
1360         /* Chip got too hot and stopped itself */
1361         if (inta & CSR_INT_BIT_CT_KILL) {
1362                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1363                 priv->isr_stats.ctkill++;
1364                 handled |= CSR_INT_BIT_CT_KILL;
1365         }
1366
1367         /* Error detected by uCode */
1368         if (inta & CSR_INT_BIT_SW_ERR) {
1369                 IWL_ERR(priv, "Microcode SW error detected. "
1370                         " Restarting 0x%X.\n", inta);
1371                 priv->isr_stats.sw++;
1372                 priv->isr_stats.sw_err = inta;
1373                 iwl_irq_handle_error(priv);
1374                 handled |= CSR_INT_BIT_SW_ERR;
1375         }
1376
1377         /* uCode wakes up after power-down sleep */
1378         if (inta & CSR_INT_BIT_WAKEUP) {
1379                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1380                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1381                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1382                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1383
1384                 priv->isr_stats.wakeup++;
1385
1386                 handled |= CSR_INT_BIT_WAKEUP;
1387         }
1388
1389         /* All uCode command responses, including Tx command responses,
1390          * Rx "responses" (frame-received notification), and other
1391          * notifications from uCode come through here*/
1392         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1393                         CSR_INT_BIT_RX_PERIODIC)) {
1394                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1395                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1396                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1397                         iwl_write32(priv, CSR_FH_INT_STATUS,
1398                                         CSR49_FH_INT_RX_MASK);
1399                 }
1400                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1401                         handled |= CSR_INT_BIT_RX_PERIODIC;
1402                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1403                 }
1404                 /* Sending RX interrupt require many steps to be done in the
1405                  * the device:
1406                  * 1- write interrupt to current index in ICT table.
1407                  * 2- dma RX frame.
1408                  * 3- update RX shared data to indicate last write index.
1409                  * 4- send interrupt.
1410                  * This could lead to RX race, driver could receive RX interrupt
1411                  * but the shared data changes does not reflect this;
1412                  * periodic interrupt will detect any dangling Rx activity.
1413                  */
1414
1415                 /* Disable periodic interrupt; we use it as just a one-shot. */
1416                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1417                             CSR_INT_PERIODIC_DIS);
1418                 iwl_rx_handle(priv);
1419
1420                 /*
1421                  * Enable periodic interrupt in 8 msec only if we received
1422                  * real RX interrupt (instead of just periodic int), to catch
1423                  * any dangling Rx interrupt.  If it was just the periodic
1424                  * interrupt, there was no dangling Rx activity, and no need
1425                  * to extend the periodic interrupt; one-shot is enough.
1426                  */
1427                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1428                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1429                                     CSR_INT_PERIODIC_ENA);
1430
1431                 priv->isr_stats.rx++;
1432         }
1433
1434         /* This "Tx" DMA channel is used only for loading uCode */
1435         if (inta & CSR_INT_BIT_FH_TX) {
1436                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1437                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1438                 priv->isr_stats.tx++;
1439                 handled |= CSR_INT_BIT_FH_TX;
1440                 /* Wake up uCode load routine, now that load is complete */
1441                 priv->ucode_write_complete = 1;
1442                 wake_up_interruptible(&priv->wait_command_queue);
1443         }
1444
1445         if (inta & ~handled) {
1446                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1447                 priv->isr_stats.unhandled++;
1448         }
1449
1450         if (inta & ~(priv->inta_mask)) {
1451                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1452                          inta & ~priv->inta_mask);
1453         }
1454
1455         /* Re-enable all interrupts */
1456         /* only Re-enable if diabled by irq */
1457         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1458                 iwl_enable_interrupts(priv);
1459 }
1460
1461 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1462 #define ACK_CNT_RATIO (50)
1463 #define BA_TIMEOUT_CNT (5)
1464 #define BA_TIMEOUT_MAX (16)
1465
1466 /**
1467  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1468  *
1469  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1470  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1471  * operation state.
1472  */
1473 bool iwl_good_ack_health(struct iwl_priv *priv,
1474                                 struct iwl_rx_packet *pkt)
1475 {
1476         bool rc = true;
1477         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1478         int ba_timeout_delta;
1479
1480         actual_ack_cnt_delta =
1481                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1482                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1483         expected_ack_cnt_delta =
1484                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1485                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1486         ba_timeout_delta =
1487                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1488                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1489         if ((priv->_agn.agg_tids_count > 0) &&
1490             (expected_ack_cnt_delta > 0) &&
1491             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1492                 < ACK_CNT_RATIO) &&
1493             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1494                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1495                                 " expected_ack_cnt = %d\n",
1496                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1497
1498 #ifdef CONFIG_IWLWIFI_DEBUGFS
1499                 /*
1500                  * This is ifdef'ed on DEBUGFS because otherwise the
1501                  * statistics aren't available. If DEBUGFS is set but
1502                  * DEBUG is not, these will just compile out.
1503                  */
1504                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1505                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1506                 IWL_DEBUG_RADIO(priv,
1507                                 "ack_or_ba_timeout_collision delta = %d\n",
1508                                 priv->_agn.delta_statistics.tx.
1509                                 ack_or_ba_timeout_collision);
1510 #endif
1511                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1512                                 ba_timeout_delta);
1513                 if (!actual_ack_cnt_delta &&
1514                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1515                         rc = false;
1516         }
1517         return rc;
1518 }
1519
1520
1521 /*****************************************************************************
1522  *
1523  * sysfs attributes
1524  *
1525  *****************************************************************************/
1526
1527 #ifdef CONFIG_IWLWIFI_DEBUG
1528
1529 /*
1530  * The following adds a new attribute to the sysfs representation
1531  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1532  * used for controlling the debug level.
1533  *
1534  * See the level definitions in iwl for details.
1535  *
1536  * The debug_level being managed using sysfs below is a per device debug
1537  * level that is used instead of the global debug level if it (the per
1538  * device debug level) is set.
1539  */
1540 static ssize_t show_debug_level(struct device *d,
1541                                 struct device_attribute *attr, char *buf)
1542 {
1543         struct iwl_priv *priv = dev_get_drvdata(d);
1544         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1545 }
1546 static ssize_t store_debug_level(struct device *d,
1547                                 struct device_attribute *attr,
1548                                  const char *buf, size_t count)
1549 {
1550         struct iwl_priv *priv = dev_get_drvdata(d);
1551         unsigned long val;
1552         int ret;
1553
1554         ret = strict_strtoul(buf, 0, &val);
1555         if (ret)
1556                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1557         else {
1558                 priv->debug_level = val;
1559                 if (iwl_alloc_traffic_mem(priv))
1560                         IWL_ERR(priv,
1561                                 "Not enough memory to generate traffic log\n");
1562         }
1563         return strnlen(buf, count);
1564 }
1565
1566 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1567                         show_debug_level, store_debug_level);
1568
1569
1570 #endif /* CONFIG_IWLWIFI_DEBUG */
1571
1572
1573 static ssize_t show_temperature(struct device *d,
1574                                 struct device_attribute *attr, char *buf)
1575 {
1576         struct iwl_priv *priv = dev_get_drvdata(d);
1577
1578         if (!iwl_is_alive(priv))
1579                 return -EAGAIN;
1580
1581         return sprintf(buf, "%d\n", priv->temperature);
1582 }
1583
1584 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1585
1586 static ssize_t show_tx_power(struct device *d,
1587                              struct device_attribute *attr, char *buf)
1588 {
1589         struct iwl_priv *priv = dev_get_drvdata(d);
1590
1591         if (!iwl_is_ready_rf(priv))
1592                 return sprintf(buf, "off\n");
1593         else
1594                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1595 }
1596
1597 static ssize_t store_tx_power(struct device *d,
1598                               struct device_attribute *attr,
1599                               const char *buf, size_t count)
1600 {
1601         struct iwl_priv *priv = dev_get_drvdata(d);
1602         unsigned long val;
1603         int ret;
1604
1605         ret = strict_strtoul(buf, 10, &val);
1606         if (ret)
1607                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1608         else {
1609                 ret = iwl_set_tx_power(priv, val, false);
1610                 if (ret)
1611                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1612                                 ret);
1613                 else
1614                         ret = count;
1615         }
1616         return ret;
1617 }
1618
1619 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1620
1621 static ssize_t show_rts_ht_protection(struct device *d,
1622                              struct device_attribute *attr, char *buf)
1623 {
1624         struct iwl_priv *priv = dev_get_drvdata(d);
1625
1626         return sprintf(buf, "%s\n",
1627                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
1628 }
1629
1630 static ssize_t store_rts_ht_protection(struct device *d,
1631                               struct device_attribute *attr,
1632                               const char *buf, size_t count)
1633 {
1634         struct iwl_priv *priv = dev_get_drvdata(d);
1635         unsigned long val;
1636         int ret;
1637
1638         ret = strict_strtoul(buf, 10, &val);
1639         if (ret)
1640                 IWL_INFO(priv, "Input is not in decimal form.\n");
1641         else {
1642                 if (!iwl_is_associated(priv))
1643                         priv->cfg->use_rts_for_ht = val ? true : false;
1644                 else
1645                         IWL_ERR(priv, "Sta associated with AP - "
1646                                 "Change protection mechanism is not allowed\n");
1647                 ret = count;
1648         }
1649         return ret;
1650 }
1651
1652 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
1653                         show_rts_ht_protection, store_rts_ht_protection);
1654
1655
1656 static struct attribute *iwl_sysfs_entries[] = {
1657         &dev_attr_temperature.attr,
1658         &dev_attr_tx_power.attr,
1659         &dev_attr_rts_ht_protection.attr,
1660 #ifdef CONFIG_IWLWIFI_DEBUG
1661         &dev_attr_debug_level.attr,
1662 #endif
1663         NULL
1664 };
1665
1666 static struct attribute_group iwl_attribute_group = {
1667         .name = NULL,           /* put in device directory */
1668         .attrs = iwl_sysfs_entries,
1669 };
1670
1671 /******************************************************************************
1672  *
1673  * uCode download functions
1674  *
1675  ******************************************************************************/
1676
1677 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1678 {
1679         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1680         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1681         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1682         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1683         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1684         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1685 }
1686
1687 static void iwl_nic_start(struct iwl_priv *priv)
1688 {
1689         /* Remove all resets to allow NIC to operate */
1690         iwl_write32(priv, CSR_RESET, 0);
1691 }
1692
1693 struct iwlagn_ucode_capabilities {
1694         u32 max_probe_length;
1695 };
1696
1697 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1698 static int iwl_mac_setup_register(struct iwl_priv *priv,
1699                                   struct iwlagn_ucode_capabilities *capa);
1700
1701 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1702 {
1703         const char *name_pre = priv->cfg->fw_name_pre;
1704
1705         if (first)
1706                 priv->fw_index = priv->cfg->ucode_api_max;
1707         else
1708                 priv->fw_index--;
1709
1710         if (priv->fw_index < priv->cfg->ucode_api_min) {
1711                 IWL_ERR(priv, "no suitable firmware found!\n");
1712                 return -ENOENT;
1713         }
1714
1715         sprintf(priv->firmware_name, "%s%d%s",
1716                 name_pre, priv->fw_index, ".ucode");
1717
1718         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1719                        priv->firmware_name);
1720
1721         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1722                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1723                                        iwl_ucode_callback);
1724 }
1725
1726 struct iwlagn_firmware_pieces {
1727         const void *inst, *data, *init, *init_data, *boot;
1728         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1729
1730         u32 build;
1731
1732         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1733         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1734 };
1735
1736 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1737                                        const struct firmware *ucode_raw,
1738                                        struct iwlagn_firmware_pieces *pieces)
1739 {
1740         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1741         u32 api_ver, hdr_size;
1742         const u8 *src;
1743
1744         priv->ucode_ver = le32_to_cpu(ucode->ver);
1745         api_ver = IWL_UCODE_API(priv->ucode_ver);
1746
1747         switch (api_ver) {
1748         default:
1749                 /*
1750                  * 4965 doesn't revision the firmware file format
1751                  * along with the API version, it always uses v1
1752                  * file format.
1753                  */
1754                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1755                                 CSR_HW_REV_TYPE_4965) {
1756                         hdr_size = 28;
1757                         if (ucode_raw->size < hdr_size) {
1758                                 IWL_ERR(priv, "File size too small!\n");
1759                                 return -EINVAL;
1760                         }
1761                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1762                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1763                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1764                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1765                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1766                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1767                         src = ucode->u.v2.data;
1768                         break;
1769                 }
1770                 /* fall through for 4965 */
1771         case 0:
1772         case 1:
1773         case 2:
1774                 hdr_size = 24;
1775                 if (ucode_raw->size < hdr_size) {
1776                         IWL_ERR(priv, "File size too small!\n");
1777                         return -EINVAL;
1778                 }
1779                 pieces->build = 0;
1780                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1781                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1782                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1783                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1784                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1785                 src = ucode->u.v1.data;
1786                 break;
1787         }
1788
1789         /* Verify size of file vs. image size info in file's header */
1790         if (ucode_raw->size != hdr_size + pieces->inst_size +
1791                                 pieces->data_size + pieces->init_size +
1792                                 pieces->init_data_size + pieces->boot_size) {
1793
1794                 IWL_ERR(priv,
1795                         "uCode file size %d does not match expected size\n",
1796                         (int)ucode_raw->size);
1797                 return -EINVAL;
1798         }
1799
1800         pieces->inst = src;
1801         src += pieces->inst_size;
1802         pieces->data = src;
1803         src += pieces->data_size;
1804         pieces->init = src;
1805         src += pieces->init_size;
1806         pieces->init_data = src;
1807         src += pieces->init_data_size;
1808         pieces->boot = src;
1809         src += pieces->boot_size;
1810
1811         return 0;
1812 }
1813
1814 static int iwlagn_wanted_ucode_alternative = 1;
1815
1816 static int iwlagn_load_firmware(struct iwl_priv *priv,
1817                                 const struct firmware *ucode_raw,
1818                                 struct iwlagn_firmware_pieces *pieces,
1819                                 struct iwlagn_ucode_capabilities *capa)
1820 {
1821         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1822         struct iwl_ucode_tlv *tlv;
1823         size_t len = ucode_raw->size;
1824         const u8 *data;
1825         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1826         u64 alternatives;
1827         u32 tlv_len;
1828         enum iwl_ucode_tlv_type tlv_type;
1829         const u8 *tlv_data;
1830         int ret = 0;
1831
1832         if (len < sizeof(*ucode)) {
1833                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1834                 return -EINVAL;
1835         }
1836
1837         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1838                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1839                         le32_to_cpu(ucode->magic));
1840                 return -EINVAL;
1841         }
1842
1843         /*
1844          * Check which alternatives are present, and "downgrade"
1845          * when the chosen alternative is not present, warning
1846          * the user when that happens. Some files may not have
1847          * any alternatives, so don't warn in that case.
1848          */
1849         alternatives = le64_to_cpu(ucode->alternatives);
1850         tmp = wanted_alternative;
1851         if (wanted_alternative > 63)
1852                 wanted_alternative = 63;
1853         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1854                 wanted_alternative--;
1855         if (wanted_alternative && wanted_alternative != tmp)
1856                 IWL_WARN(priv,
1857                          "uCode alternative %d not available, choosing %d\n",
1858                          tmp, wanted_alternative);
1859
1860         priv->ucode_ver = le32_to_cpu(ucode->ver);
1861         pieces->build = le32_to_cpu(ucode->build);
1862         data = ucode->data;
1863
1864         len -= sizeof(*ucode);
1865
1866         while (len >= sizeof(*tlv) && !ret) {
1867                 u16 tlv_alt;
1868                 u32 fixed_tlv_size = 4;
1869
1870                 len -= sizeof(*tlv);
1871                 tlv = (void *)data;
1872
1873                 tlv_len = le32_to_cpu(tlv->length);
1874                 tlv_type = le16_to_cpu(tlv->type);
1875                 tlv_alt = le16_to_cpu(tlv->alternative);
1876                 tlv_data = tlv->data;
1877
1878                 if (len < tlv_len) {
1879                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1880                                 len, tlv_len);
1881                         return -EINVAL;
1882                 }
1883                 len -= ALIGN(tlv_len, 4);
1884                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1885
1886                 /*
1887                  * Alternative 0 is always valid.
1888                  *
1889                  * Skip alternative TLVs that are not selected.
1890                  */
1891                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1892                         continue;
1893
1894                 switch (tlv_type) {
1895                 case IWL_UCODE_TLV_INST:
1896                         pieces->inst = tlv_data;
1897                         pieces->inst_size = tlv_len;
1898                         break;
1899                 case IWL_UCODE_TLV_DATA:
1900                         pieces->data = tlv_data;
1901                         pieces->data_size = tlv_len;
1902                         break;
1903                 case IWL_UCODE_TLV_INIT:
1904                         pieces->init = tlv_data;
1905                         pieces->init_size = tlv_len;
1906                         break;
1907                 case IWL_UCODE_TLV_INIT_DATA:
1908                         pieces->init_data = tlv_data;
1909                         pieces->init_data_size = tlv_len;
1910                         break;
1911                 case IWL_UCODE_TLV_BOOT:
1912                         pieces->boot = tlv_data;
1913                         pieces->boot_size = tlv_len;
1914                         break;
1915                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1916                         if (tlv_len != fixed_tlv_size)
1917                                 ret = -EINVAL;
1918                         else
1919                                 capa->max_probe_length =
1920                                         le32_to_cpup((__le32 *)tlv_data);
1921                         break;
1922                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1923                         if (tlv_len != fixed_tlv_size)
1924                                 ret = -EINVAL;
1925                         else
1926                                 pieces->init_evtlog_ptr =
1927                                         le32_to_cpup((__le32 *)tlv_data);
1928                         break;
1929                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1930                         if (tlv_len != fixed_tlv_size)
1931                                 ret = -EINVAL;
1932                         else
1933                                 pieces->init_evtlog_size =
1934                                         le32_to_cpup((__le32 *)tlv_data);
1935                         break;
1936                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1937                         if (tlv_len != fixed_tlv_size)
1938                                 ret = -EINVAL;
1939                         else
1940                                 pieces->init_errlog_ptr =
1941                                         le32_to_cpup((__le32 *)tlv_data);
1942                         break;
1943                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1944                         if (tlv_len != fixed_tlv_size)
1945                                 ret = -EINVAL;
1946                         else
1947                                 pieces->inst_evtlog_ptr =
1948                                         le32_to_cpup((__le32 *)tlv_data);
1949                         break;
1950                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1951                         if (tlv_len != fixed_tlv_size)
1952                                 ret = -EINVAL;
1953                         else
1954                                 pieces->inst_evtlog_size =
1955                                         le32_to_cpup((__le32 *)tlv_data);
1956                         break;
1957                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1958                         if (tlv_len != fixed_tlv_size)
1959                                 ret = -EINVAL;
1960                         else
1961                                 pieces->inst_errlog_ptr =
1962                                         le32_to_cpup((__le32 *)tlv_data);
1963                         break;
1964                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1965                         if (tlv_len)
1966                                 ret = -EINVAL;
1967                         else
1968                                 priv->enhance_sensitivity_table = true;
1969                         break;
1970                 default:
1971                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1972                         break;
1973                 }
1974         }
1975
1976         if (len) {
1977                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1978                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1979                 ret = -EINVAL;
1980         } else if (ret) {
1981                 IWL_ERR(priv, "TLV %d has invalid size: %u\n",
1982                         tlv_type, tlv_len);
1983                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)tlv_data, tlv_len);
1984         }
1985
1986         return ret;
1987 }
1988
1989 /**
1990  * iwl_ucode_callback - callback when firmware was loaded
1991  *
1992  * If loaded successfully, copies the firmware into buffers
1993  * for the card to fetch (via DMA).
1994  */
1995 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1996 {
1997         struct iwl_priv *priv = context;
1998         struct iwl_ucode_header *ucode;
1999         int err;
2000         struct iwlagn_firmware_pieces pieces;
2001         const unsigned int api_max = priv->cfg->ucode_api_max;
2002         const unsigned int api_min = priv->cfg->ucode_api_min;
2003         u32 api_ver;
2004         char buildstr[25];
2005         u32 build;
2006         struct iwlagn_ucode_capabilities ucode_capa = {
2007                 .max_probe_length = 200,
2008         };
2009
2010         memset(&pieces, 0, sizeof(pieces));
2011
2012         if (!ucode_raw) {
2013                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
2014                         priv->firmware_name);
2015                 goto try_again;
2016         }
2017
2018         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
2019                        priv->firmware_name, ucode_raw->size);
2020
2021         /* Make sure that we got at least the API version number */
2022         if (ucode_raw->size < 4) {
2023                 IWL_ERR(priv, "File size way too small!\n");
2024                 goto try_again;
2025         }
2026
2027         /* Data from ucode file:  header followed by uCode images */
2028         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2029
2030         if (ucode->ver)
2031                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2032         else
2033                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2034                                            &ucode_capa);
2035
2036         if (err)
2037                 goto try_again;
2038
2039         api_ver = IWL_UCODE_API(priv->ucode_ver);
2040         build = pieces.build;
2041
2042         /*
2043          * api_ver should match the api version forming part of the
2044          * firmware filename ... but we don't check for that and only rely
2045          * on the API version read from firmware header from here on forward
2046          */
2047         if (api_ver < api_min || api_ver > api_max) {
2048                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2049                           "Driver supports v%u, firmware is v%u.\n",
2050                           api_max, api_ver);
2051                 goto try_again;
2052         }
2053
2054         if (api_ver != api_max)
2055                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2056                           "got v%u. New firmware can be obtained "
2057                           "from http://www.intellinuxwireless.org.\n",
2058                           api_max, api_ver);
2059
2060         if (build)
2061                 sprintf(buildstr, " build %u", build);
2062         else
2063                 buildstr[0] = '\0';
2064
2065         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2066                  IWL_UCODE_MAJOR(priv->ucode_ver),
2067                  IWL_UCODE_MINOR(priv->ucode_ver),
2068                  IWL_UCODE_API(priv->ucode_ver),
2069                  IWL_UCODE_SERIAL(priv->ucode_ver),
2070                  buildstr);
2071
2072         snprintf(priv->hw->wiphy->fw_version,
2073                  sizeof(priv->hw->wiphy->fw_version),
2074                  "%u.%u.%u.%u%s",
2075                  IWL_UCODE_MAJOR(priv->ucode_ver),
2076                  IWL_UCODE_MINOR(priv->ucode_ver),
2077                  IWL_UCODE_API(priv->ucode_ver),
2078                  IWL_UCODE_SERIAL(priv->ucode_ver),
2079                  buildstr);
2080
2081         /*
2082          * For any of the failures below (before allocating pci memory)
2083          * we will try to load a version with a smaller API -- maybe the
2084          * user just got a corrupted version of the latest API.
2085          */
2086
2087         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2088                        priv->ucode_ver);
2089         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2090                        pieces.inst_size);
2091         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2092                        pieces.data_size);
2093         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2094                        pieces.init_size);
2095         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2096                        pieces.init_data_size);
2097         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2098                        pieces.boot_size);
2099
2100         /* Verify that uCode images will fit in card's SRAM */
2101         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2102                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2103                         pieces.inst_size);
2104                 goto try_again;
2105         }
2106
2107         if (pieces.data_size > priv->hw_params.max_data_size) {
2108                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2109                         pieces.data_size);
2110                 goto try_again;
2111         }
2112
2113         if (pieces.init_size > priv->hw_params.max_inst_size) {
2114                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2115                         pieces.init_size);
2116                 goto try_again;
2117         }
2118
2119         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2120                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2121                         pieces.init_data_size);
2122                 goto try_again;
2123         }
2124
2125         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2126                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2127                         pieces.boot_size);
2128                 goto try_again;
2129         }
2130
2131         /* Allocate ucode buffers for card's bus-master loading ... */
2132
2133         /* Runtime instructions and 2 copies of data:
2134          * 1) unmodified from disk
2135          * 2) backup cache for save/restore during power-downs */
2136         priv->ucode_code.len = pieces.inst_size;
2137         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2138
2139         priv->ucode_data.len = pieces.data_size;
2140         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2141
2142         priv->ucode_data_backup.len = pieces.data_size;
2143         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2144
2145         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2146             !priv->ucode_data_backup.v_addr)
2147                 goto err_pci_alloc;
2148
2149         /* Initialization instructions and data */
2150         if (pieces.init_size && pieces.init_data_size) {
2151                 priv->ucode_init.len = pieces.init_size;
2152                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2153
2154                 priv->ucode_init_data.len = pieces.init_data_size;
2155                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2156
2157                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2158                         goto err_pci_alloc;
2159         }
2160
2161         /* Bootstrap (instructions only, no data) */
2162         if (pieces.boot_size) {
2163                 priv->ucode_boot.len = pieces.boot_size;
2164                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2165
2166                 if (!priv->ucode_boot.v_addr)
2167                         goto err_pci_alloc;
2168         }
2169
2170         /* Now that we can no longer fail, copy information */
2171
2172         /*
2173          * The (size - 16) / 12 formula is based on the information recorded
2174          * for each event, which is of mode 1 (including timestamp) for all
2175          * new microcodes that include this information.
2176          */
2177         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2178         if (pieces.init_evtlog_size)
2179                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2180         else
2181                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2182         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2183         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2184         if (pieces.inst_evtlog_size)
2185                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2186         else
2187                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2188         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2189
2190         /* Copy images into buffers for card's bus-master reads ... */
2191
2192         /* Runtime instructions (first block of data in file) */
2193         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2194                         pieces.inst_size);
2195         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2196
2197         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2198                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2199
2200         /*
2201          * Runtime data
2202          * NOTE:  Copy into backup buffer will be done in iwl_up()
2203          */
2204         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2205                         pieces.data_size);
2206         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2207         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2208
2209         /* Initialization instructions */
2210         if (pieces.init_size) {
2211                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2212                                 pieces.init_size);
2213                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2214         }
2215
2216         /* Initialization data */
2217         if (pieces.init_data_size) {
2218                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2219                                pieces.init_data_size);
2220                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2221                        pieces.init_data_size);
2222         }
2223
2224         /* Bootstrap instructions */
2225         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2226                         pieces.boot_size);
2227         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2228
2229         /**************************************************
2230          * This is still part of probe() in a sense...
2231          *
2232          * 9. Setup and register with mac80211 and debugfs
2233          **************************************************/
2234         err = iwl_mac_setup_register(priv, &ucode_capa);
2235         if (err)
2236                 goto out_unbind;
2237
2238         err = iwl_dbgfs_register(priv, DRV_NAME);
2239         if (err)
2240                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2241
2242         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2243                                         &iwl_attribute_group);
2244         if (err) {
2245                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2246                 goto out_unbind;
2247         }
2248
2249         /* We have our copies now, allow OS release its copies */
2250         release_firmware(ucode_raw);
2251         complete(&priv->_agn.firmware_loading_complete);
2252         return;
2253
2254  try_again:
2255         /* try next, if any */
2256         if (iwl_request_firmware(priv, false))
2257                 goto out_unbind;
2258         release_firmware(ucode_raw);
2259         return;
2260
2261  err_pci_alloc:
2262         IWL_ERR(priv, "failed to allocate pci memory\n");
2263         iwl_dealloc_ucode_pci(priv);
2264  out_unbind:
2265         complete(&priv->_agn.firmware_loading_complete);
2266         device_release_driver(&priv->pci_dev->dev);
2267         release_firmware(ucode_raw);
2268 }
2269
2270 static const char *desc_lookup_text[] = {
2271         "OK",
2272         "FAIL",
2273         "BAD_PARAM",
2274         "BAD_CHECKSUM",
2275         "NMI_INTERRUPT_WDG",
2276         "SYSASSERT",
2277         "FATAL_ERROR",
2278         "BAD_COMMAND",
2279         "HW_ERROR_TUNE_LOCK",
2280         "HW_ERROR_TEMPERATURE",
2281         "ILLEGAL_CHAN_FREQ",
2282         "VCC_NOT_STABLE",
2283         "FH_ERROR",
2284         "NMI_INTERRUPT_HOST",
2285         "NMI_INTERRUPT_ACTION_PT",
2286         "NMI_INTERRUPT_UNKNOWN",
2287         "UCODE_VERSION_MISMATCH",
2288         "HW_ERROR_ABS_LOCK",
2289         "HW_ERROR_CAL_LOCK_FAIL",
2290         "NMI_INTERRUPT_INST_ACTION_PT",
2291         "NMI_INTERRUPT_DATA_ACTION_PT",
2292         "NMI_TRM_HW_ER",
2293         "NMI_INTERRUPT_TRM",
2294         "NMI_INTERRUPT_BREAK_POINT"
2295         "DEBUG_0",
2296         "DEBUG_1",
2297         "DEBUG_2",
2298         "DEBUG_3",
2299         "ADVANCED SYSASSERT"
2300 };
2301
2302 static const char *desc_lookup(int i)
2303 {
2304         int max = ARRAY_SIZE(desc_lookup_text) - 1;
2305
2306         if (i < 0 || i > max)
2307                 i = max;
2308
2309         return desc_lookup_text[i];
2310 }
2311
2312 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2313 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2314
2315 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2316 {
2317         u32 data2, line;
2318         u32 desc, time, count, base, data1;
2319         u32 blink1, blink2, ilink1, ilink2;
2320         u32 pc, hcmd;
2321
2322         if (priv->ucode_type == UCODE_INIT) {
2323                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2324                 if (!base)
2325                         base = priv->_agn.init_errlog_ptr;
2326         } else {
2327                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2328                 if (!base)
2329                         base = priv->_agn.inst_errlog_ptr;
2330         }
2331
2332         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2333                 IWL_ERR(priv,
2334                         "Not valid error log pointer 0x%08X for %s uCode\n",
2335                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2336                 return;
2337         }
2338
2339         count = iwl_read_targ_mem(priv, base);
2340
2341         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2342                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2343                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2344                         priv->status, count);
2345         }
2346
2347         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2348         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2349         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2350         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2351         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2352         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2353         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2354         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2355         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2356         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2357         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2358
2359         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2360                                       blink1, blink2, ilink1, ilink2);
2361
2362         IWL_ERR(priv, "Desc                                  Time       "
2363                 "data1      data2      line\n");
2364         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2365                 desc_lookup(desc), desc, time, data1, data2, line);
2366         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2367         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2368                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2369 }
2370
2371 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2372
2373 /**
2374  * iwl_print_event_log - Dump error event log to syslog
2375  *
2376  */
2377 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2378                                u32 num_events, u32 mode,
2379                                int pos, char **buf, size_t bufsz)
2380 {
2381         u32 i;
2382         u32 base;       /* SRAM byte address of event log header */
2383         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2384         u32 ptr;        /* SRAM byte address of log data */
2385         u32 ev, time, data; /* event log data */
2386         unsigned long reg_flags;
2387
2388         if (num_events == 0)
2389                 return pos;
2390
2391         if (priv->ucode_type == UCODE_INIT) {
2392                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2393                 if (!base)
2394                         base = priv->_agn.init_evtlog_ptr;
2395         } else {
2396                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2397                 if (!base)
2398                         base = priv->_agn.inst_evtlog_ptr;
2399         }
2400
2401         if (mode == 0)
2402                 event_size = 2 * sizeof(u32);
2403         else
2404                 event_size = 3 * sizeof(u32);
2405
2406         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2407
2408         /* Make sure device is powered up for SRAM reads */
2409         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2410         iwl_grab_nic_access(priv);
2411
2412         /* Set starting address; reads will auto-increment */
2413         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2414         rmb();
2415
2416         /* "time" is actually "data" for mode 0 (no timestamp).
2417         * place event id # at far right for easier visual parsing. */
2418         for (i = 0; i < num_events; i++) {
2419                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2420                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2421                 if (mode == 0) {
2422                         /* data, ev */
2423                         if (bufsz) {
2424                                 pos += scnprintf(*buf + pos, bufsz - pos,
2425                                                 "EVT_LOG:0x%08x:%04u\n",
2426                                                 time, ev);
2427                         } else {
2428                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2429                                         time, ev);
2430                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2431                                         time, ev);
2432                         }
2433                 } else {
2434                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2435                         if (bufsz) {
2436                                 pos += scnprintf(*buf + pos, bufsz - pos,
2437                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2438                                                  time, data, ev);
2439                         } else {
2440                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2441                                         time, data, ev);
2442                                 trace_iwlwifi_dev_ucode_event(priv, time,
2443                                         data, ev);
2444                         }
2445                 }
2446         }
2447
2448         /* Allow device to power down */
2449         iwl_release_nic_access(priv);
2450         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2451         return pos;
2452 }
2453
2454 /**
2455  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2456  */
2457 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2458                                     u32 num_wraps, u32 next_entry,
2459                                     u32 size, u32 mode,
2460                                     int pos, char **buf, size_t bufsz)
2461 {
2462         /*
2463          * display the newest DEFAULT_LOG_ENTRIES entries
2464          * i.e the entries just before the next ont that uCode would fill.
2465          */
2466         if (num_wraps) {
2467                 if (next_entry < size) {
2468                         pos = iwl_print_event_log(priv,
2469                                                 capacity - (size - next_entry),
2470                                                 size - next_entry, mode,
2471                                                 pos, buf, bufsz);
2472                         pos = iwl_print_event_log(priv, 0,
2473                                                   next_entry, mode,
2474                                                   pos, buf, bufsz);
2475                 } else
2476                         pos = iwl_print_event_log(priv, next_entry - size,
2477                                                   size, mode, pos, buf, bufsz);
2478         } else {
2479                 if (next_entry < size) {
2480                         pos = iwl_print_event_log(priv, 0, next_entry,
2481                                                   mode, pos, buf, bufsz);
2482                 } else {
2483                         pos = iwl_print_event_log(priv, next_entry - size,
2484                                                   size, mode, pos, buf, bufsz);
2485                 }
2486         }
2487         return pos;
2488 }
2489
2490 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2491
2492 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2493                             char **buf, bool display)
2494 {
2495         u32 base;       /* SRAM byte address of event log header */
2496         u32 capacity;   /* event log capacity in # entries */
2497         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2498         u32 num_wraps;  /* # times uCode wrapped to top of log */
2499         u32 next_entry; /* index of next entry to be written by uCode */
2500         u32 size;       /* # entries that we'll print */
2501         u32 logsize;
2502         int pos = 0;
2503         size_t bufsz = 0;
2504
2505         if (priv->ucode_type == UCODE_INIT) {
2506                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2507                 logsize = priv->_agn.init_evtlog_size;
2508                 if (!base)
2509                         base = priv->_agn.init_evtlog_ptr;
2510         } else {
2511                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2512                 logsize = priv->_agn.inst_evtlog_size;
2513                 if (!base)
2514                         base = priv->_agn.inst_evtlog_ptr;
2515         }
2516
2517         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2518                 IWL_ERR(priv,
2519                         "Invalid event log pointer 0x%08X for %s uCode\n",
2520                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2521                 return -EINVAL;
2522         }
2523
2524         /* event log header */
2525         capacity = iwl_read_targ_mem(priv, base);
2526         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2527         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2528         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2529
2530         if (capacity > logsize) {
2531                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2532                         capacity, logsize);
2533                 capacity = logsize;
2534         }
2535
2536         if (next_entry > logsize) {
2537                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2538                         next_entry, logsize);
2539                 next_entry = logsize;
2540         }
2541
2542         size = num_wraps ? capacity : next_entry;
2543
2544         /* bail out if nothing in log */
2545         if (size == 0) {
2546                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2547                 return pos;
2548         }
2549
2550 #ifdef CONFIG_IWLWIFI_DEBUG
2551         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2552                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2553                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2554 #else
2555         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2556                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2557 #endif
2558         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2559                 size);
2560
2561 #ifdef CONFIG_IWLWIFI_DEBUG
2562         if (display) {
2563                 if (full_log)
2564                         bufsz = capacity * 48;
2565                 else
2566                         bufsz = size * 48;
2567                 *buf = kmalloc(bufsz, GFP_KERNEL);
2568                 if (!*buf)
2569                         return -ENOMEM;
2570         }
2571         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2572                 /*
2573                  * if uCode has wrapped back to top of log,
2574                  * start at the oldest entry,
2575                  * i.e the next one that uCode would fill.
2576                  */
2577                 if (num_wraps)
2578                         pos = iwl_print_event_log(priv, next_entry,
2579                                                 capacity - next_entry, mode,
2580                                                 pos, buf, bufsz);
2581                 /* (then/else) start at top of log */
2582                 pos = iwl_print_event_log(priv, 0,
2583                                           next_entry, mode, pos, buf, bufsz);
2584         } else
2585                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2586                                                 next_entry, size, mode,
2587                                                 pos, buf, bufsz);
2588 #else
2589         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2590                                         next_entry, size, mode,
2591                                         pos, buf, bufsz);
2592 #endif
2593         return pos;
2594 }
2595
2596 /**
2597  * iwl_alive_start - called after REPLY_ALIVE notification received
2598  *                   from protocol/runtime uCode (initialization uCode's
2599  *                   Alive gets handled by iwl_init_alive_start()).
2600  */
2601 static void iwl_alive_start(struct iwl_priv *priv)
2602 {
2603         int ret = 0;
2604
2605         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2606
2607         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2608                 /* We had an error bringing up the hardware, so take it
2609                  * all the way back down so we can try again */
2610                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2611                 goto restart;
2612         }
2613
2614         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2615          * This is a paranoid check, because we would not have gotten the
2616          * "runtime" alive if code weren't properly loaded.  */
2617         if (iwl_verify_ucode(priv)) {
2618                 /* Runtime instruction load was bad;
2619                  * take it all the way back down so we can try again */
2620                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2621                 goto restart;
2622         }
2623
2624         ret = priv->cfg->ops->lib->alive_notify(priv);
2625         if (ret) {
2626                 IWL_WARN(priv,
2627                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2628                 goto restart;
2629         }
2630
2631         /* After the ALIVE response, we can send host commands to the uCode */
2632         set_bit(STATUS_ALIVE, &priv->status);
2633
2634         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2635                 /* Enable timer to monitor the driver queues */
2636                 mod_timer(&priv->monitor_recover,
2637                         jiffies +
2638                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2639         }
2640
2641         if (iwl_is_rfkill(priv))
2642                 return;
2643
2644         ieee80211_wake_queues(priv->hw);
2645
2646         priv->active_rate = IWL_RATES_MASK;
2647
2648         /* Configure Tx antenna selection based on H/W config */
2649         if (priv->cfg->ops->hcmd->set_tx_ant)
2650                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2651
2652         if (iwl_is_associated(priv)) {
2653                 struct iwl_rxon_cmd *active_rxon =
2654                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2655                 /* apply any changes in staging */
2656                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2657                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2658         } else {
2659                 /* Initialize our rx_config data */
2660                 iwl_connection_init_rx_config(priv, NULL);
2661
2662                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2663                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2664         }
2665
2666         /* Configure Bluetooth device coexistence support */
2667         priv->cfg->ops->hcmd->send_bt_config(priv);
2668
2669         iwl_reset_run_time_calib(priv);
2670
2671         /* Configure the adapter for unassociated operation */
2672         iwlcore_commit_rxon(priv);
2673
2674         /* At this point, the NIC is initialized and operational */
2675         iwl_rf_kill_ct_config(priv);
2676
2677         iwl_leds_init(priv);
2678
2679         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2680         set_bit(STATUS_READY, &priv->status);
2681         wake_up_interruptible(&priv->wait_command_queue);
2682
2683         iwl_power_update_mode(priv, true);
2684         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2685
2686
2687         return;
2688
2689  restart:
2690         queue_work(priv->workqueue, &priv->restart);
2691 }
2692
2693 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2694
2695 static void __iwl_down(struct iwl_priv *priv)
2696 {
2697         unsigned long flags;
2698         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2699
2700         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2701
2702         if (!exit_pending)
2703                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2704
2705         iwl_clear_ucode_stations(priv);
2706         iwl_dealloc_bcast_station(priv);
2707         iwl_clear_driver_stations(priv);
2708
2709         /* Unblock any waiting calls */
2710         wake_up_interruptible_all(&priv->wait_command_queue);
2711
2712         /* Wipe out the EXIT_PENDING status bit if we are not actually
2713          * exiting the module */
2714         if (!exit_pending)
2715                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2716
2717         /* stop and reset the on-board processor */
2718         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2719
2720         /* tell the device to stop sending interrupts */
2721         spin_lock_irqsave(&priv->lock, flags);
2722         iwl_disable_interrupts(priv);
2723         spin_unlock_irqrestore(&priv->lock, flags);
2724         iwl_synchronize_irq(priv);
2725
2726         if (priv->mac80211_registered)
2727                 ieee80211_stop_queues(priv->hw);
2728
2729         /* If we have not previously called iwl_init() then
2730          * clear all bits but the RF Kill bit and return */
2731         if (!iwl_is_init(priv)) {
2732                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2733                                         STATUS_RF_KILL_HW |
2734                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2735                                         STATUS_GEO_CONFIGURED |
2736                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2737                                         STATUS_EXIT_PENDING;
2738                 goto exit;
2739         }
2740
2741         /* ...otherwise clear out all the status bits but the RF Kill
2742          * bit and continue taking the NIC down. */
2743         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2744                                 STATUS_RF_KILL_HW |
2745                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2746                                 STATUS_GEO_CONFIGURED |
2747                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2748                                 STATUS_FW_ERROR |
2749                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2750                                 STATUS_EXIT_PENDING;
2751
2752         /* device going down, Stop using ICT table */
2753         iwl_disable_ict(priv);
2754
2755         iwlagn_txq_ctx_stop(priv);
2756         iwlagn_rxq_stop(priv);
2757
2758         /* Power-down device's busmaster DMA clocks */
2759         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2760         udelay(5);
2761
2762         /* Make sure (redundant) we've released our request to stay awake */
2763         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2764
2765         /* Stop the device, and put it in low power state */
2766         priv->cfg->ops->lib->apm_ops.stop(priv);
2767
2768  exit:
2769         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2770
2771         if (priv->ibss_beacon)
2772                 dev_kfree_skb(priv->ibss_beacon);
2773         priv->ibss_beacon = NULL;
2774
2775         /* clear out any free frames */
2776         iwl_clear_free_frames(priv);
2777 }
2778
2779 static void iwl_down(struct iwl_priv *priv)
2780 {
2781         mutex_lock(&priv->mutex);
2782         __iwl_down(priv);
2783         mutex_unlock(&priv->mutex);
2784
2785         iwl_cancel_deferred_work(priv);
2786 }
2787
2788 #define HW_READY_TIMEOUT (50)
2789
2790 static int iwl_set_hw_ready(struct iwl_priv *priv)
2791 {
2792         int ret = 0;
2793
2794         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2795                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2796
2797         /* See if we got it */
2798         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2799                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2800                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2801                                 HW_READY_TIMEOUT);
2802         if (ret != -ETIMEDOUT)
2803                 priv->hw_ready = true;
2804         else
2805                 priv->hw_ready = false;
2806
2807         IWL_DEBUG_INFO(priv, "hardware %s\n",
2808                       (priv->hw_ready == 1) ? "ready" : "not ready");
2809         return ret;
2810 }
2811
2812 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2813 {
2814         int ret = 0;
2815
2816         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2817
2818         ret = iwl_set_hw_ready(priv);
2819         if (priv->hw_ready)
2820                 return ret;
2821
2822         /* If HW is not ready, prepare the conditions to check again */
2823         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2824                         CSR_HW_IF_CONFIG_REG_PREPARE);
2825
2826         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2827                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2828                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2829
2830         /* HW should be ready by now, check again. */
2831         if (ret != -ETIMEDOUT)
2832                 iwl_set_hw_ready(priv);
2833
2834         return ret;
2835 }
2836
2837 #define MAX_HW_RESTARTS 5
2838
2839 static int __iwl_up(struct iwl_priv *priv)
2840 {
2841         int i;
2842         int ret;
2843
2844         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2845                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2846                 return -EIO;
2847         }
2848
2849         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2850                 IWL_ERR(priv, "ucode not available for device bringup\n");
2851                 return -EIO;
2852         }
2853
2854         ret = iwl_alloc_bcast_station(priv, true);
2855         if (ret)
2856                 return ret;
2857
2858         iwl_prepare_card_hw(priv);
2859
2860         if (!priv->hw_ready) {
2861                 IWL_WARN(priv, "Exit HW not ready\n");
2862                 return -EIO;
2863         }
2864
2865         /* If platform's RF_KILL switch is NOT set to KILL */
2866         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2867                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2868         else
2869                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2870
2871         if (iwl_is_rfkill(priv)) {
2872                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2873
2874                 iwl_enable_interrupts(priv);
2875                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2876                 return 0;
2877         }
2878
2879         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2880
2881         ret = iwlagn_hw_nic_init(priv);
2882         if (ret) {
2883                 IWL_ERR(priv, "Unable to init nic\n");
2884                 return ret;
2885         }
2886
2887         /* make sure rfkill handshake bits are cleared */
2888         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2889         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2890                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2891
2892         /* clear (again), then enable host interrupts */
2893         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2894         iwl_enable_interrupts(priv);
2895
2896         /* really make sure rfkill handshake bits are cleared */
2897         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2898         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2899
2900         /* Copy original ucode data image from disk into backup cache.
2901          * This will be used to initialize the on-board processor's
2902          * data SRAM for a clean start when the runtime program first loads. */
2903         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2904                priv->ucode_data.len);
2905
2906         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2907
2908                 /* load bootstrap state machine,
2909                  * load bootstrap program into processor's memory,
2910                  * prepare to load the "initialize" uCode */
2911                 ret = priv->cfg->ops->lib->load_ucode(priv);
2912
2913                 if (ret) {
2914                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2915                                 ret);
2916                         continue;
2917                 }
2918
2919                 /* start card; "initialize" will load runtime ucode */
2920                 iwl_nic_start(priv);
2921
2922                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2923
2924                 return 0;
2925         }
2926
2927         set_bit(STATUS_EXIT_PENDING, &priv->status);
2928         __iwl_down(priv);
2929         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2930
2931         /* tried to restart and config the device for as long as our
2932          * patience could withstand */
2933         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2934         return -EIO;
2935 }
2936
2937
2938 /*****************************************************************************
2939  *
2940  * Workqueue callbacks
2941  *
2942  *****************************************************************************/
2943
2944 static void iwl_bg_init_alive_start(struct work_struct *data)
2945 {
2946         struct iwl_priv *priv =
2947             container_of(data, struct iwl_priv, init_alive_start.work);
2948
2949         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2950                 return;
2951
2952         mutex_lock(&priv->mutex);
2953         priv->cfg->ops->lib->init_alive_start(priv);
2954         mutex_unlock(&priv->mutex);
2955 }
2956
2957 static void iwl_bg_alive_start(struct work_struct *data)
2958 {
2959         struct iwl_priv *priv =
2960             container_of(data, struct iwl_priv, alive_start.work);
2961
2962         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2963                 return;
2964
2965         /* enable dram interrupt */
2966         iwl_reset_ict(priv);
2967
2968         mutex_lock(&priv->mutex);
2969         iwl_alive_start(priv);
2970         mutex_unlock(&priv->mutex);
2971 }
2972
2973 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2974 {
2975         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2976                         run_time_calib_work);
2977
2978         mutex_lock(&priv->mutex);
2979
2980         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2981             test_bit(STATUS_SCANNING, &priv->status)) {
2982                 mutex_unlock(&priv->mutex);
2983                 return;
2984         }
2985
2986         if (priv->start_calib) {
2987                 iwl_chain_noise_calibration(priv, &priv->_agn.statistics);
2988
2989                 iwl_sensitivity_calibration(priv, &priv->_agn.statistics);
2990         }
2991
2992         mutex_unlock(&priv->mutex);
2993 }
2994
2995 static void iwl_bg_restart(struct work_struct *data)
2996 {
2997         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2998
2999         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3000                 return;
3001
3002         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3003                 mutex_lock(&priv->mutex);
3004                 priv->vif = NULL;
3005                 priv->is_open = 0;
3006                 mutex_unlock(&priv->mutex);
3007                 iwl_down(priv);
3008                 ieee80211_restart_hw(priv->hw);
3009         } else {
3010                 iwl_down(priv);
3011
3012                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3013                         return;
3014
3015                 mutex_lock(&priv->mutex);
3016                 __iwl_up(priv);
3017                 mutex_unlock(&priv->mutex);
3018         }
3019 }
3020
3021 static void iwl_bg_rx_replenish(struct work_struct *data)
3022 {
3023         struct iwl_priv *priv =
3024             container_of(data, struct iwl_priv, rx_replenish);
3025
3026         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3027                 return;
3028
3029         mutex_lock(&priv->mutex);
3030         iwlagn_rx_replenish(priv);
3031         mutex_unlock(&priv->mutex);
3032 }
3033
3034 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3035
3036 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3037 {
3038         struct ieee80211_conf *conf = NULL;
3039         int ret = 0;
3040
3041         if (!vif || !priv->is_open)
3042                 return;
3043
3044         if (vif->type == NL80211_IFTYPE_AP) {
3045                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3046                 return;
3047         }
3048
3049         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3050                 return;
3051
3052         iwl_scan_cancel_timeout(priv, 200);
3053
3054         conf = ieee80211_get_hw_conf(priv->hw);
3055
3056         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3057         iwlcore_commit_rxon(priv);
3058
3059         iwl_setup_rxon_timing(priv, vif);
3060         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3061                               sizeof(priv->rxon_timing), &priv->rxon_timing);
3062         if (ret)
3063                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3064                             "Attempting to continue.\n");
3065
3066         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3067
3068         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3069
3070         if (priv->cfg->ops->hcmd->set_rxon_chain)
3071                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3072
3073         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3074
3075         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3076                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3077
3078         if (vif->bss_conf.use_short_preamble)
3079                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3080         else
3081                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3082
3083         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3084                 if (vif->bss_conf.use_short_slot)
3085                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3086                 else
3087                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3088         }
3089
3090         iwlcore_commit_rxon(priv);
3091
3092         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3093                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3094
3095         switch (vif->type) {
3096         case NL80211_IFTYPE_STATION:
3097                 break;
3098         case NL80211_IFTYPE_ADHOC:
3099                 iwl_send_beacon_cmd(priv);
3100                 break;
3101         default:
3102                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3103                           __func__, vif->type);
3104                 break;
3105         }
3106
3107         /* the chain noise calibration will enabled PM upon completion
3108          * If chain noise has already been run, then we need to enable
3109          * power management here */
3110         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3111                 iwl_power_update_mode(priv, false);
3112
3113         /* Enable Rx differential gain and sensitivity calibrations */
3114         iwl_chain_noise_reset(priv);
3115         priv->start_calib = 1;
3116
3117 }
3118
3119 /*****************************************************************************
3120  *
3121  * mac80211 entry point functions
3122  *
3123  *****************************************************************************/
3124
3125 #define UCODE_READY_TIMEOUT     (4 * HZ)
3126
3127 /*
3128  * Not a mac80211 entry point function, but it fits in with all the
3129  * other mac80211 functions grouped here.
3130  */
3131 static int iwl_mac_setup_register(struct iwl_priv *priv,
3132                                   struct iwlagn_ucode_capabilities *capa)
3133 {
3134         int ret;
3135         struct ieee80211_hw *hw = priv->hw;
3136         hw->rate_control_algorithm = "iwl-agn-rs";
3137
3138         /* Tell mac80211 our characteristics */
3139         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3140                     IEEE80211_HW_AMPDU_AGGREGATION |
3141                     IEEE80211_HW_SPECTRUM_MGMT;
3142
3143         if (!priv->cfg->broken_powersave)
3144                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3145                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3146
3147         if (priv->cfg->sku & IWL_SKU_N)
3148                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3149                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3150
3151         hw->sta_data_size = sizeof(struct iwl_station_priv);
3152         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3153
3154         hw->wiphy->interface_modes =
3155                 BIT(NL80211_IFTYPE_STATION) |
3156                 BIT(NL80211_IFTYPE_ADHOC);
3157
3158         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3159                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3160
3161         /*
3162          * For now, disable PS by default because it affects
3163          * RX performance significantly.
3164          */
3165         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3166
3167         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3168         /* we create the 802.11 header and a zero-length SSID element */
3169         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3170
3171         /* Default value; 4 EDCA QOS priorities */
3172         hw->queues = 4;
3173
3174         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3175
3176         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3177                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3178                         &priv->bands[IEEE80211_BAND_2GHZ];
3179         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3180                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3181                         &priv->bands[IEEE80211_BAND_5GHZ];
3182
3183         ret = ieee80211_register_hw(priv->hw);
3184         if (ret) {
3185                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3186                 return ret;
3187         }
3188         priv->mac80211_registered = 1;
3189
3190         return 0;
3191 }
3192
3193
3194 static int iwl_mac_start(struct ieee80211_hw *hw)
3195 {
3196         struct iwl_priv *priv = hw->priv;
3197         int ret;
3198
3199         IWL_DEBUG_MAC80211(priv, "enter\n");
3200
3201         /* we should be verifying the device is ready to be opened */
3202         mutex_lock(&priv->mutex);
3203         ret = __iwl_up(priv);
3204         mutex_unlock(&priv->mutex);
3205
3206         if (ret)
3207                 return ret;
3208
3209         if (iwl_is_rfkill(priv))
3210                 goto out;
3211
3212         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3213
3214         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3215          * mac80211 will not be run successfully. */
3216         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3217                         test_bit(STATUS_READY, &priv->status),
3218                         UCODE_READY_TIMEOUT);
3219         if (!ret) {
3220                 if (!test_bit(STATUS_READY, &priv->status)) {
3221                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3222                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3223                         return -ETIMEDOUT;
3224                 }
3225         }
3226
3227         iwl_led_start(priv);
3228
3229 out:
3230         priv->is_open = 1;
3231         IWL_DEBUG_MAC80211(priv, "leave\n");
3232         return 0;
3233 }
3234
3235 static void iwl_mac_stop(struct ieee80211_hw *hw)
3236 {
3237         struct iwl_priv *priv = hw->priv;
3238
3239         IWL_DEBUG_MAC80211(priv, "enter\n");
3240
3241         if (!priv->is_open)
3242                 return;
3243
3244         priv->is_open = 0;
3245
3246         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3247                 /* stop mac, cancel any scan request and clear
3248                  * RXON_FILTER_ASSOC_MSK BIT
3249                  */
3250                 mutex_lock(&priv->mutex);
3251                 iwl_scan_cancel_timeout(priv, 100);
3252                 mutex_unlock(&priv->mutex);
3253         }
3254
3255         iwl_down(priv);
3256
3257         flush_workqueue(priv->workqueue);
3258
3259         /* enable interrupts again in order to receive rfkill changes */
3260         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3261         iwl_enable_interrupts(priv);
3262
3263         IWL_DEBUG_MAC80211(priv, "leave\n");
3264 }
3265
3266 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3267 {
3268         struct iwl_priv *priv = hw->priv;
3269
3270         IWL_DEBUG_MACDUMP(priv, "enter\n");
3271
3272         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3273                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3274
3275         if (iwlagn_tx_skb(priv, skb))
3276                 dev_kfree_skb_any(skb);
3277
3278         IWL_DEBUG_MACDUMP(priv, "leave\n");
3279         return NETDEV_TX_OK;
3280 }
3281
3282 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3283 {
3284         int ret = 0;
3285
3286         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3287                 return;
3288
3289         /* The following should be done only at AP bring up */
3290         if (!iwl_is_associated(priv)) {
3291
3292                 /* RXON - unassoc (to set timing command) */
3293                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3294                 iwlcore_commit_rxon(priv);
3295
3296                 /* RXON Timing */
3297                 iwl_setup_rxon_timing(priv, vif);
3298                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3299                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
3300                 if (ret)
3301                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3302                                         "Attempting to continue.\n");
3303
3304                 /* AP has all antennas */
3305                 priv->chain_noise_data.active_chains =
3306                         priv->hw_params.valid_rx_ant;
3307                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3308                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3309                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3310
3311                 priv->staging_rxon.assoc_id = 0;
3312
3313                 if (vif->bss_conf.use_short_preamble)
3314                         priv->staging_rxon.flags |=
3315                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3316                 else
3317                         priv->staging_rxon.flags &=
3318                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3319
3320                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3321                         if (vif->bss_conf.use_short_slot)
3322                                 priv->staging_rxon.flags |=
3323                                         RXON_FLG_SHORT_SLOT_MSK;
3324                         else
3325                                 priv->staging_rxon.flags &=
3326                                         ~RXON_FLG_SHORT_SLOT_MSK;
3327                 }
3328                 /* restore RXON assoc */
3329                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3330                 iwlcore_commit_rxon(priv);
3331         }
3332         iwl_send_beacon_cmd(priv);
3333
3334         /* FIXME - we need to add code here to detect a totally new
3335          * configuration, reset the AP, unassoc, rxon timing, assoc,
3336          * clear sta table, add BCAST sta... */
3337 }
3338
3339 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3340                                     struct ieee80211_vif *vif,
3341                                     struct ieee80211_key_conf *keyconf,
3342                                     struct ieee80211_sta *sta,
3343                                     u32 iv32, u16 *phase1key)
3344 {
3345
3346         struct iwl_priv *priv = hw->priv;
3347         IWL_DEBUG_MAC80211(priv, "enter\n");
3348
3349         iwl_update_tkip_key(priv, keyconf, sta,
3350                             iv32, phase1key);
3351
3352         IWL_DEBUG_MAC80211(priv, "leave\n");
3353 }
3354
3355 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3356                            struct ieee80211_vif *vif,
3357                            struct ieee80211_sta *sta,
3358                            struct ieee80211_key_conf *key)
3359 {
3360         struct iwl_priv *priv = hw->priv;
3361         int ret;
3362         u8 sta_id;
3363         bool is_default_wep_key = false;
3364
3365         IWL_DEBUG_MAC80211(priv, "enter\n");
3366
3367         if (priv->cfg->mod_params->sw_crypto) {
3368                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3369                 return -EOPNOTSUPP;
3370         }
3371
3372         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3373         if (sta_id == IWL_INVALID_STATION)
3374                 return -EINVAL;
3375
3376         mutex_lock(&priv->mutex);
3377         iwl_scan_cancel_timeout(priv, 100);
3378
3379         /*
3380          * If we are getting WEP group key and we didn't receive any key mapping
3381          * so far, we are in legacy wep mode (group key only), otherwise we are
3382          * in 1X mode.
3383          * In legacy wep mode, we use another host command to the uCode.
3384          */
3385         if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) {
3386                 if (cmd == SET_KEY)
3387                         is_default_wep_key = !priv->key_mapping_key;
3388                 else
3389                         is_default_wep_key =
3390                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3391         }
3392
3393         switch (cmd) {
3394         case SET_KEY:
3395                 if (is_default_wep_key)
3396                         ret = iwl_set_default_wep_key(priv, key);
3397                 else
3398                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3399
3400                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3401                 break;
3402         case DISABLE_KEY:
3403                 if (is_default_wep_key)
3404                         ret = iwl_remove_default_wep_key(priv, key);
3405                 else
3406                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3407
3408                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3409                 break;
3410         default:
3411                 ret = -EINVAL;
3412         }
3413
3414         mutex_unlock(&priv->mutex);
3415         IWL_DEBUG_MAC80211(priv, "leave\n");
3416
3417         return ret;
3418 }
3419
3420 /*
3421  * switch to RTS/CTS for TX
3422  */
3423 static void iwl_enable_rts_cts(struct iwl_priv *priv)
3424 {
3425
3426         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3427                 return;
3428
3429         priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN;
3430         if (!test_bit(STATUS_SCANNING, &priv->status)) {
3431                 IWL_DEBUG_INFO(priv, "use RTS/CTS protection\n");
3432                 iwlcore_commit_rxon(priv);
3433         } else {
3434                 /* scanning, defer the request until scan completed */
3435                 IWL_DEBUG_INFO(priv, "defer setting RTS/CTS protection\n");
3436         }
3437 }
3438
3439 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3440                                 struct ieee80211_vif *vif,
3441                                 enum ieee80211_ampdu_mlme_action action,
3442                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3443 {
3444         struct iwl_priv *priv = hw->priv;
3445         int ret = -EINVAL;
3446
3447         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3448                      sta->addr, tid);
3449
3450         if (!(priv->cfg->sku & IWL_SKU_N))
3451                 return -EACCES;
3452
3453         mutex_lock(&priv->mutex);
3454
3455         switch (action) {
3456         case IEEE80211_AMPDU_RX_START:
3457                 IWL_DEBUG_HT(priv, "start Rx\n");
3458                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3459                 break;
3460         case IEEE80211_AMPDU_RX_STOP:
3461                 IWL_DEBUG_HT(priv, "stop Rx\n");
3462                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3463                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3464                         ret = 0;
3465                 break;
3466         case IEEE80211_AMPDU_TX_START:
3467                 IWL_DEBUG_HT(priv, "start Tx\n");
3468                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3469                 if (ret == 0) {
3470                         priv->_agn.agg_tids_count++;
3471                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3472                                      priv->_agn.agg_tids_count);
3473                 }
3474                 break;
3475         case IEEE80211_AMPDU_TX_STOP:
3476                 IWL_DEBUG_HT(priv, "stop Tx\n");
3477                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3478                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3479                         priv->_agn.agg_tids_count--;
3480                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3481                                      priv->_agn.agg_tids_count);
3482                 }
3483                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3484                         ret = 0;
3485                 break;
3486         case IEEE80211_AMPDU_TX_OPERATIONAL:
3487                 if (priv->cfg->use_rts_for_ht) {
3488                         /*
3489                          * switch to RTS/CTS if it is the prefer protection
3490                          * method for HT traffic
3491                          */
3492                         iwl_enable_rts_cts(priv);
3493                 }
3494                 ret = 0;
3495                 break;
3496         }
3497         mutex_unlock(&priv->mutex);
3498
3499         return ret;
3500 }
3501
3502 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3503                                struct ieee80211_vif *vif,
3504                                enum sta_notify_cmd cmd,
3505                                struct ieee80211_sta *sta)
3506 {
3507         struct iwl_priv *priv = hw->priv;
3508         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3509         int sta_id;
3510
3511         switch (cmd) {
3512         case STA_NOTIFY_SLEEP:
3513                 WARN_ON(!sta_priv->client);
3514                 sta_priv->asleep = true;
3515                 if (atomic_read(&sta_priv->pending_frames) > 0)
3516                         ieee80211_sta_block_awake(hw, sta, true);
3517                 break;
3518         case STA_NOTIFY_AWAKE:
3519                 WARN_ON(!sta_priv->client);
3520                 if (!sta_priv->asleep)
3521                         break;
3522                 sta_priv->asleep = false;
3523                 sta_id = iwl_sta_id(sta);
3524                 if (sta_id != IWL_INVALID_STATION)
3525                         iwl_sta_modify_ps_wake(priv, sta_id);
3526                 break;
3527         default:
3528                 break;
3529         }
3530 }
3531
3532 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3533                               struct ieee80211_vif *vif,
3534                               struct ieee80211_sta *sta)
3535 {
3536         struct iwl_priv *priv = hw->priv;
3537         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3538         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3539         int ret;
3540         u8 sta_id;
3541
3542         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3543                         sta->addr);
3544         mutex_lock(&priv->mutex);
3545         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3546                         sta->addr);
3547         sta_priv->common.sta_id = IWL_INVALID_STATION;
3548
3549         atomic_set(&sta_priv->pending_frames, 0);
3550         if (vif->type == NL80211_IFTYPE_AP)
3551                 sta_priv->client = true;
3552
3553         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3554                                      &sta_id);
3555         if (ret) {
3556                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3557                         sta->addr, ret);
3558                 /* Should we return success if return code is EEXIST ? */
3559                 mutex_unlock(&priv->mutex);
3560                 return ret;
3561         }
3562
3563         sta_priv->common.sta_id = sta_id;
3564
3565         /* Initialize rate scaling */
3566         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3567                        sta->addr);
3568         iwl_rs_rate_init(priv, sta, sta_id);
3569         mutex_unlock(&priv->mutex);
3570
3571         return 0;
3572 }
3573
3574 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3575                                    struct ieee80211_channel_switch *ch_switch)
3576 {
3577         struct iwl_priv *priv = hw->priv;
3578         const struct iwl_channel_info *ch_info;
3579         struct ieee80211_conf *conf = &hw->conf;
3580         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3581         u16 ch;
3582         unsigned long flags = 0;
3583
3584         IWL_DEBUG_MAC80211(priv, "enter\n");
3585
3586         if (iwl_is_rfkill(priv))
3587                 goto out_exit;
3588
3589         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3590             test_bit(STATUS_SCANNING, &priv->status))
3591                 goto out_exit;
3592
3593         if (!iwl_is_associated(priv))
3594                 goto out_exit;
3595
3596         /* channel switch in progress */
3597         if (priv->switch_rxon.switch_in_progress == true)
3598                 goto out_exit;
3599
3600         mutex_lock(&priv->mutex);
3601         if (priv->cfg->ops->lib->set_channel_switch) {
3602
3603                 ch = ieee80211_frequency_to_channel(
3604                         ch_switch->channel->center_freq);
3605                 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3606                         ch_info = iwl_get_channel_info(priv,
3607                                                        conf->channel->band,
3608                                                        ch);
3609                         if (!is_channel_valid(ch_info)) {
3610                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3611                                 goto out;
3612                         }
3613                         spin_lock_irqsave(&priv->lock, flags);
3614
3615                         priv->current_ht_config.smps = conf->smps_mode;
3616
3617                         /* Configure HT40 channels */
3618                         ht_conf->is_ht = conf_is_ht(conf);
3619                         if (ht_conf->is_ht) {
3620                                 if (conf_is_ht40_minus(conf)) {
3621                                         ht_conf->extension_chan_offset =
3622                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3623                                         ht_conf->is_40mhz = true;
3624                                 } else if (conf_is_ht40_plus(conf)) {
3625                                         ht_conf->extension_chan_offset =
3626                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3627                                         ht_conf->is_40mhz = true;
3628                                 } else {
3629                                         ht_conf->extension_chan_offset =
3630                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3631                                         ht_conf->is_40mhz = false;
3632                                 }
3633                         } else
3634                                 ht_conf->is_40mhz = false;
3635
3636                         /* if we are switching from ht to 2.4 clear flags
3637                          * from any ht related info since 2.4 does not
3638                          * support ht */
3639                         if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
3640                                 priv->staging_rxon.flags = 0;
3641
3642                         iwl_set_rxon_channel(priv, conf->channel);
3643                         iwl_set_rxon_ht(priv, ht_conf);
3644                         iwl_set_flags_for_band(priv, conf->channel->band,
3645                                                priv->vif);
3646                         spin_unlock_irqrestore(&priv->lock, flags);
3647
3648                         iwl_set_rate(priv);
3649                         /*
3650                          * at this point, staging_rxon has the
3651                          * configuration for channel switch
3652                          */
3653                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3654                                                                     ch_switch))
3655                                 priv->switch_rxon.switch_in_progress = false;
3656                 }
3657         }
3658 out:
3659         mutex_unlock(&priv->mutex);
3660 out_exit:
3661         if (!priv->switch_rxon.switch_in_progress)
3662                 ieee80211_chswitch_done(priv->vif, false);
3663         IWL_DEBUG_MAC80211(priv, "leave\n");
3664 }
3665
3666 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3667 {
3668         struct iwl_priv *priv = hw->priv;
3669
3670         mutex_lock(&priv->mutex);
3671         IWL_DEBUG_MAC80211(priv, "enter\n");
3672
3673         /* do not support "flush" */
3674         if (!priv->cfg->ops->lib->txfifo_flush)
3675                 goto done;
3676
3677         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3678                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3679                 goto done;
3680         }
3681         if (iwl_is_rfkill(priv)) {
3682                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3683                 goto done;
3684         }
3685
3686         /*
3687          * mac80211 will not push any more frames for transmit
3688          * until the flush is completed
3689          */
3690         if (drop) {
3691                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3692                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3693                         IWL_ERR(priv, "flush request fail\n");
3694                         goto done;
3695                 }
3696         }
3697         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3698         iwlagn_wait_tx_queue_empty(priv);
3699 done:
3700         mutex_unlock(&priv->mutex);
3701         IWL_DEBUG_MAC80211(priv, "leave\n");
3702 }
3703
3704 /*****************************************************************************
3705  *
3706  * driver setup and teardown
3707  *
3708  *****************************************************************************/
3709
3710 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3711 {
3712         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3713
3714         init_waitqueue_head(&priv->wait_command_queue);
3715
3716         INIT_WORK(&priv->restart, iwl_bg_restart);
3717         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3718         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3719         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3720         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3721         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3722         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3723
3724         iwl_setup_scan_deferred_work(priv);
3725
3726         if (priv->cfg->ops->lib->setup_deferred_work)
3727                 priv->cfg->ops->lib->setup_deferred_work(priv);
3728
3729         init_timer(&priv->statistics_periodic);
3730         priv->statistics_periodic.data = (unsigned long)priv;
3731         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3732
3733         init_timer(&priv->ucode_trace);
3734         priv->ucode_trace.data = (unsigned long)priv;
3735         priv->ucode_trace.function = iwl_bg_ucode_trace;
3736
3737         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3738                 init_timer(&priv->monitor_recover);
3739                 priv->monitor_recover.data = (unsigned long)priv;
3740                 priv->monitor_recover.function =
3741                         priv->cfg->ops->lib->recover_from_tx_stall;
3742         }
3743
3744         if (!priv->cfg->use_isr_legacy)
3745                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3746                         iwl_irq_tasklet, (unsigned long)priv);
3747         else
3748                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3749                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3750 }
3751
3752 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3753 {
3754         if (priv->cfg->ops->lib->cancel_deferred_work)
3755                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3756
3757         cancel_delayed_work_sync(&priv->init_alive_start);
3758         cancel_delayed_work(&priv->scan_check);
3759         cancel_work_sync(&priv->start_internal_scan);
3760         cancel_delayed_work(&priv->alive_start);
3761         cancel_work_sync(&priv->run_time_calib_work);
3762         cancel_work_sync(&priv->beacon_update);
3763         del_timer_sync(&priv->statistics_periodic);
3764         del_timer_sync(&priv->ucode_trace);
3765         if (priv->cfg->ops->lib->recover_from_tx_stall)
3766                 del_timer_sync(&priv->monitor_recover);
3767 }
3768
3769 static void iwl_init_hw_rates(struct iwl_priv *priv,
3770                               struct ieee80211_rate *rates)
3771 {
3772         int i;
3773
3774         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3775                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3776                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3777                 rates[i].hw_value_short = i;
3778                 rates[i].flags = 0;
3779                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3780                         /*
3781                          * If CCK != 1M then set short preamble rate flag.
3782                          */
3783                         rates[i].flags |=
3784                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3785                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3786                 }
3787         }
3788 }
3789
3790 static int iwl_init_drv(struct iwl_priv *priv)
3791 {
3792         int ret;
3793
3794         priv->ibss_beacon = NULL;
3795
3796         spin_lock_init(&priv->sta_lock);
3797         spin_lock_init(&priv->hcmd_lock);
3798
3799         INIT_LIST_HEAD(&priv->free_frames);
3800
3801         mutex_init(&priv->mutex);
3802         mutex_init(&priv->sync_cmd_mutex);
3803
3804         priv->ieee_channels = NULL;
3805         priv->ieee_rates = NULL;
3806         priv->band = IEEE80211_BAND_2GHZ;
3807
3808         priv->iw_mode = NL80211_IFTYPE_STATION;
3809         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3810         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3811         priv->_agn.agg_tids_count = 0;
3812
3813         /* initialize force reset */
3814         priv->force_reset[IWL_RF_RESET].reset_duration =
3815                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3816         priv->force_reset[IWL_FW_RESET].reset_duration =
3817                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3818
3819         /* Choose which receivers/antennas to use */
3820         if (priv->cfg->ops->hcmd->set_rxon_chain)
3821                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3822
3823         iwl_init_scan_params(priv);
3824
3825         /* Set the tx_power_user_lmt to the lowest power level
3826          * this value will get overwritten by channel max power avg
3827          * from eeprom */
3828         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3829
3830         ret = iwl_init_channel_map(priv);
3831         if (ret) {
3832                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3833                 goto err;
3834         }
3835
3836         ret = iwlcore_init_geos(priv);
3837         if (ret) {
3838                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3839                 goto err_free_channel_map;
3840         }
3841         iwl_init_hw_rates(priv, priv->ieee_rates);
3842
3843         return 0;
3844
3845 err_free_channel_map:
3846         iwl_free_channel_map(priv);
3847 err:
3848         return ret;
3849 }
3850
3851 static void iwl_uninit_drv(struct iwl_priv *priv)
3852 {
3853         iwl_calib_free_results(priv);
3854         iwlcore_free_geos(priv);
3855         iwl_free_channel_map(priv);
3856         kfree(priv->scan_cmd);
3857 }
3858
3859 static struct ieee80211_ops iwl_hw_ops = {
3860         .tx = iwl_mac_tx,
3861         .start = iwl_mac_start,
3862         .stop = iwl_mac_stop,
3863         .add_interface = iwl_mac_add_interface,
3864         .remove_interface = iwl_mac_remove_interface,
3865         .config = iwl_mac_config,
3866         .configure_filter = iwl_configure_filter,
3867         .set_key = iwl_mac_set_key,
3868         .update_tkip_key = iwl_mac_update_tkip_key,
3869         .conf_tx = iwl_mac_conf_tx,
3870         .reset_tsf = iwl_mac_reset_tsf,
3871         .bss_info_changed = iwl_bss_info_changed,
3872         .ampdu_action = iwl_mac_ampdu_action,
3873         .hw_scan = iwl_mac_hw_scan,
3874         .sta_notify = iwl_mac_sta_notify,
3875         .sta_add = iwlagn_mac_sta_add,
3876         .sta_remove = iwl_mac_sta_remove,
3877         .channel_switch = iwl_mac_channel_switch,
3878         .flush = iwl_mac_flush,
3879 };
3880
3881 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3882 {
3883         int err = 0;
3884         struct iwl_priv *priv;
3885         struct ieee80211_hw *hw;
3886         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3887         unsigned long flags;
3888         u16 pci_cmd;
3889         u8 perm_addr[ETH_ALEN];
3890
3891         /************************
3892          * 1. Allocating HW data
3893          ************************/
3894
3895         /* Disabling hardware scan means that mac80211 will perform scans
3896          * "the hard way", rather than using device's scan. */
3897         if (cfg->mod_params->disable_hw_scan) {
3898                 if (iwl_debug_level & IWL_DL_INFO)
3899                         dev_printk(KERN_DEBUG, &(pdev->dev),
3900                                    "Disabling hw_scan\n");
3901                 iwl_hw_ops.hw_scan = NULL;
3902         }
3903
3904         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3905         if (!hw) {
3906                 err = -ENOMEM;
3907                 goto out;
3908         }
3909         priv = hw->priv;
3910         /* At this point both hw and priv are allocated. */
3911
3912         SET_IEEE80211_DEV(hw, &pdev->dev);
3913
3914         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3915         priv->cfg = cfg;
3916         priv->pci_dev = pdev;
3917         priv->inta_mask = CSR_INI_SET_MASK;
3918
3919         if (iwl_alloc_traffic_mem(priv))
3920                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3921
3922         /**************************
3923          * 2. Initializing PCI bus
3924          **************************/
3925         if (pci_enable_device(pdev)) {
3926                 err = -ENODEV;
3927                 goto out_ieee80211_free_hw;
3928         }
3929
3930         pci_set_master(pdev);
3931
3932         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3933         if (!err)
3934                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3935         if (err) {
3936                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3937                 if (!err)
3938                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3939                 /* both attempts failed: */
3940                 if (err) {
3941                         IWL_WARN(priv, "No suitable DMA available.\n");
3942                         goto out_pci_disable_device;
3943                 }
3944         }
3945
3946         err = pci_request_regions(pdev, DRV_NAME);
3947         if (err)
3948                 goto out_pci_disable_device;
3949
3950         pci_set_drvdata(pdev, priv);
3951
3952
3953         /***********************
3954          * 3. Read REV register
3955          ***********************/
3956         priv->hw_base = pci_iomap(pdev, 0, 0);
3957         if (!priv->hw_base) {
3958                 err = -ENODEV;
3959                 goto out_pci_release_regions;
3960         }
3961
3962         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3963                 (unsigned long long) pci_resource_len(pdev, 0));
3964         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3965
3966         /* these spin locks will be used in apm_ops.init and EEPROM access
3967          * we should init now
3968          */
3969         spin_lock_init(&priv->reg_lock);
3970         spin_lock_init(&priv->lock);
3971
3972         /*
3973          * stop and reset the on-board processor just in case it is in a
3974          * strange state ... like being left stranded by a primary kernel
3975          * and this is now the kdump kernel trying to start up
3976          */
3977         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3978
3979         iwl_hw_detect(priv);
3980         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3981                 priv->cfg->name, priv->hw_rev);
3982
3983         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3984          * PCI Tx retries from interfering with C3 CPU state */
3985         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3986
3987         iwl_prepare_card_hw(priv);
3988         if (!priv->hw_ready) {
3989                 IWL_WARN(priv, "Failed, HW not ready\n");
3990                 goto out_iounmap;
3991         }
3992
3993         /*****************
3994          * 4. Read EEPROM
3995          *****************/
3996         /* Read the EEPROM */
3997         err = iwl_eeprom_init(priv);
3998         if (err) {
3999                 IWL_ERR(priv, "Unable to init EEPROM\n");
4000                 goto out_iounmap;
4001         }
4002         err = iwl_eeprom_check_version(priv);
4003         if (err)
4004                 goto out_free_eeprom;
4005
4006         /* extract MAC Address */
4007         iwl_eeprom_get_mac(priv, perm_addr);
4008         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", perm_addr);
4009         SET_IEEE80211_PERM_ADDR(priv->hw, perm_addr);
4010
4011         /************************
4012          * 5. Setup HW constants
4013          ************************/
4014         if (iwl_set_hw_params(priv)) {
4015                 IWL_ERR(priv, "failed to set hw parameters\n");
4016                 goto out_free_eeprom;
4017         }
4018
4019         /*******************
4020          * 6. Setup priv
4021          *******************/
4022
4023         err = iwl_init_drv(priv);
4024         if (err)
4025                 goto out_free_eeprom;
4026         /* At this point both hw and priv are initialized. */
4027
4028         /********************
4029          * 7. Setup services
4030          ********************/
4031         spin_lock_irqsave(&priv->lock, flags);
4032         iwl_disable_interrupts(priv);
4033         spin_unlock_irqrestore(&priv->lock, flags);
4034
4035         pci_enable_msi(priv->pci_dev);
4036
4037         iwl_alloc_isr_ict(priv);
4038         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4039                           IRQF_SHARED, DRV_NAME, priv);
4040         if (err) {
4041                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4042                 goto out_disable_msi;
4043         }
4044
4045         iwl_setup_deferred_work(priv);
4046         iwl_setup_rx_handlers(priv);
4047
4048         /*********************************************
4049          * 8. Enable interrupts and read RFKILL state
4050          *********************************************/
4051
4052         /* enable interrupts if needed: hw bug w/a */
4053         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4054         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4055                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4056                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4057         }
4058
4059         iwl_enable_interrupts(priv);
4060
4061         /* If platform's RF_KILL switch is NOT set to KILL */
4062         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4063                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4064         else
4065                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4066
4067         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4068                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4069
4070         iwl_power_initialize(priv);
4071         iwl_tt_initialize(priv);
4072
4073         init_completion(&priv->_agn.firmware_loading_complete);
4074
4075         err = iwl_request_firmware(priv, true);
4076         if (err)
4077                 goto out_destroy_workqueue;
4078
4079         return 0;
4080
4081  out_destroy_workqueue:
4082         destroy_workqueue(priv->workqueue);
4083         priv->workqueue = NULL;
4084         free_irq(priv->pci_dev->irq, priv);
4085         iwl_free_isr_ict(priv);
4086  out_disable_msi:
4087         pci_disable_msi(priv->pci_dev);
4088         iwl_uninit_drv(priv);
4089  out_free_eeprom:
4090         iwl_eeprom_free(priv);
4091  out_iounmap:
4092         pci_iounmap(pdev, priv->hw_base);
4093  out_pci_release_regions:
4094         pci_set_drvdata(pdev, NULL);
4095         pci_release_regions(pdev);
4096  out_pci_disable_device:
4097         pci_disable_device(pdev);
4098  out_ieee80211_free_hw:
4099         iwl_free_traffic_mem(priv);
4100         ieee80211_free_hw(priv->hw);
4101  out:
4102         return err;
4103 }
4104
4105 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4106 {
4107         struct iwl_priv *priv = pci_get_drvdata(pdev);
4108         unsigned long flags;
4109
4110         if (!priv)
4111                 return;
4112
4113         wait_for_completion(&priv->_agn.firmware_loading_complete);
4114
4115         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4116
4117         iwl_dbgfs_unregister(priv);
4118         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4119
4120         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4121          * to be called and iwl_down since we are removing the device
4122          * we need to set STATUS_EXIT_PENDING bit.
4123          */
4124         set_bit(STATUS_EXIT_PENDING, &priv->status);
4125         if (priv->mac80211_registered) {
4126                 ieee80211_unregister_hw(priv->hw);
4127                 priv->mac80211_registered = 0;
4128         } else {
4129                 iwl_down(priv);
4130         }
4131
4132         /*
4133          * Make sure device is reset to low power before unloading driver.
4134          * This may be redundant with iwl_down(), but there are paths to
4135          * run iwl_down() without calling apm_ops.stop(), and there are
4136          * paths to avoid running iwl_down() at all before leaving driver.
4137          * This (inexpensive) call *makes sure* device is reset.
4138          */
4139         priv->cfg->ops->lib->apm_ops.stop(priv);
4140
4141         iwl_tt_exit(priv);
4142
4143         /* make sure we flush any pending irq or
4144          * tasklet for the driver
4145          */
4146         spin_lock_irqsave(&priv->lock, flags);
4147         iwl_disable_interrupts(priv);
4148         spin_unlock_irqrestore(&priv->lock, flags);
4149
4150         iwl_synchronize_irq(priv);
4151
4152         iwl_dealloc_ucode_pci(priv);
4153
4154         if (priv->rxq.bd)
4155                 iwlagn_rx_queue_free(priv, &priv->rxq);
4156         iwlagn_hw_txq_ctx_free(priv);
4157
4158         iwl_eeprom_free(priv);
4159
4160
4161         /*netif_stop_queue(dev); */
4162         flush_workqueue(priv->workqueue);
4163
4164         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4165          * priv->workqueue... so we can't take down the workqueue
4166          * until now... */
4167         destroy_workqueue(priv->workqueue);
4168         priv->workqueue = NULL;
4169         iwl_free_traffic_mem(priv);
4170
4171         free_irq(priv->pci_dev->irq, priv);
4172         pci_disable_msi(priv->pci_dev);
4173         pci_iounmap(pdev, priv->hw_base);
4174         pci_release_regions(pdev);
4175         pci_disable_device(pdev);
4176         pci_set_drvdata(pdev, NULL);
4177
4178         iwl_uninit_drv(priv);
4179
4180         iwl_free_isr_ict(priv);
4181
4182         if (priv->ibss_beacon)
4183                 dev_kfree_skb(priv->ibss_beacon);
4184
4185         ieee80211_free_hw(priv->hw);
4186 }
4187
4188
4189 /*****************************************************************************
4190  *
4191  * driver and module entry point
4192  *
4193  *****************************************************************************/
4194
4195 /* Hardware specific file defines the PCI IDs table for that hardware module */
4196 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4197 #ifdef CONFIG_IWL4965
4198         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4199         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4200 #endif /* CONFIG_IWL4965 */
4201 #ifdef CONFIG_IWL5000
4202 /* 5100 Series WiFi */
4203         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4204         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4205         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4206         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4207         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4208         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4209         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4210         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4211         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4212         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4213         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4214         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4215         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4216         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4217         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4218         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4219         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4220         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4221         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4222         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4223         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4224         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4225         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4226         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4227
4228 /* 5300 Series WiFi */
4229         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4230         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4231         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4232         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4233         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4234         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4235         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4236         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4237         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4238         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4239         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4240         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4241
4242 /* 5350 Series WiFi/WiMax */
4243         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4244         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4245         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4246
4247 /* 5150 Series Wifi/WiMax */
4248         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4249         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4250         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4251         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4252         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4253         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4254
4255         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4256         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4257         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4258         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4259
4260 /* 6x00 Series */
4261         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4262         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4263         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4264         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4265         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4266         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4267         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4268         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4269         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4270         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4271
4272 /* 6x00 Series Gen2a */
4273         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4274         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4275         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4276         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4277         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4278         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4279         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4280         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4281         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4282         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4283         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4284         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4285         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4286         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4287
4288 /* 6x00 Series Gen2b */
4289         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4290         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4291         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4292         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4293         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4294         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4295         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4296         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4297         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4298         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4299         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4300         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4301         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4302         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4303         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4304         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4305         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4306         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4307         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4308         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4309         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4310         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4311         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4312         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4313         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4314         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4315         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4316         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4317
4318 /* 6x50 WiFi/WiMax Series */
4319         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4320         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4321         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4322         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4323         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4324         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4325
4326 /* 6x50 WiFi/WiMax Series Gen2 */
4327         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4328         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4329         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4330         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4331         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4332         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4333
4334 /* 1000 Series WiFi */
4335         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4336         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4337         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4338         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4339         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4340         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4341         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4342         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4343         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4344         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4345         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4346         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4347 #endif /* CONFIG_IWL5000 */
4348
4349         {0}
4350 };
4351 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4352
4353 static struct pci_driver iwl_driver = {
4354         .name = DRV_NAME,
4355         .id_table = iwl_hw_card_ids,
4356         .probe = iwl_pci_probe,
4357         .remove = __devexit_p(iwl_pci_remove),
4358 #ifdef CONFIG_PM
4359         .suspend = iwl_pci_suspend,
4360         .resume = iwl_pci_resume,
4361 #endif
4362 };
4363
4364 static int __init iwl_init(void)
4365 {
4366
4367         int ret;
4368         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
4369         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
4370
4371         ret = iwlagn_rate_control_register();
4372         if (ret) {
4373                 printk(KERN_ERR DRV_NAME
4374                        "Unable to register rate control algorithm: %d\n", ret);
4375                 return ret;
4376         }
4377
4378         ret = pci_register_driver(&iwl_driver);
4379         if (ret) {
4380                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
4381                 goto error_register;
4382         }
4383
4384         return ret;
4385
4386 error_register:
4387         iwlagn_rate_control_unregister();
4388         return ret;
4389 }
4390
4391 static void __exit iwl_exit(void)
4392 {
4393         pci_unregister_driver(&iwl_driver);
4394         iwlagn_rate_control_unregister();
4395 }
4396
4397 module_exit(iwl_exit);
4398 module_init(iwl_init);
4399
4400 #ifdef CONFIG_IWLWIFI_DEBUG
4401 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4402 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4403 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4404 MODULE_PARM_DESC(debug, "debug output mask");
4405 #endif
4406
4407 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4408 MODULE_PARM_DESC(swcrypto50,
4409                  "using crypto in software (default 0 [hardware]) (deprecated)");
4410 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4411 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4412 module_param_named(queues_num50,
4413                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4414 MODULE_PARM_DESC(queues_num50,
4415                  "number of hw queues in 50xx series (deprecated)");
4416 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4417 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4418 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4419 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4420 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4421 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4422 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4423                    int, S_IRUGO);
4424 MODULE_PARM_DESC(amsdu_size_8K50,
4425                  "enable 8K amsdu size in 50XX series (deprecated)");
4426 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4427                    int, S_IRUGO);
4428 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4429 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4430 MODULE_PARM_DESC(fw_restart50,
4431                  "restart firmware in case of error (deprecated)");
4432 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4433 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4434 module_param_named(
4435         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4436 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4437
4438 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4439                    S_IRUGO);
4440 MODULE_PARM_DESC(ucode_alternative,
4441                  "specify ucode alternative to use from ucode file");