drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwlagn"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-calib.h"
  61 #include "iwl-agn.h"
  62
  63
  64 /******************************************************************************
  65  *
  66  * module boiler plate
  67  *
  68  ******************************************************************************/
  69
  70 /*
  71  * module name, copyright, version, etc.
  72  */
  73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  74
  75 #ifdef CONFIG_IWLWIFI_DEBUG
  76 #define VD "d"
  77 #else
  78 #define VD
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 /**
  91  * iwl_commit_rxon - commit staging_rxon to hardware
  92  *
  93  * The RXON command in staging_rxon is committed to the hardware and
  94  * the active_rxon structure is updated with the new data.  This
  95  * function correctly transitions out of the RXON_ASSOC_MSK state if
  96  * a HW tune is required based on the RXON structure changes.
  97  */
  98 int iwl_commit_rxon(struct iwl_priv *priv)
  99 {
 100         /* cast away the const for active_rxon in this function */
 101         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 102         int ret;
 103         bool new_assoc =
 104                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 105
 106         if (!iwl_is_alive(priv))
 107                 return -EBUSY;
 108
 109         /* always get timestamp with Rx frame */
 110         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 111
 112         ret = iwl_check_rxon_cmd(priv);
 113         if (ret) {
 114                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 115                 return -EINVAL;
 116         }
 117
 118         /*
 119          * receive commit_rxon request
 120          * abort any previous channel switch if still in process
 121          */
 122         if (priv->switch_rxon.switch_in_progress &&
 123             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 124                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 125                       le16_to_cpu(priv->switch_rxon.channel));
 126                 iwl_chswitch_done(priv, false);
 127         }
 128
 129         /* If we don't need to send a full RXON, we can use
 130          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 131          * and other flags for the current radio configuration. */
 132         if (!iwl_full_rxon_required(priv)) {
 133                 ret = iwl_send_rxon_assoc(priv);
 134                 if (ret) {
 135                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 136                         return ret;
 137                 }
 138
 139                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 140                 iwl_print_rx_config_cmd(priv);
 141                 return 0;
 142         }
 143
 144         /* If we are currently associated and the new config requires
 145          * an RXON_ASSOC and the new config wants the associated mask enabled,
 146          * we must clear the associated from the active configuration
 147          * before we apply the new config */
 148         if (iwl_is_associated(priv) && new_assoc) {
 149                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 150                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 151
 152                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 153                                       sizeof(struct iwl_rxon_cmd),
 154                                       &priv->active_rxon);
 155
 156                 /* If the mask clearing failed then we set
 157                  * active_rxon back to what it was previously */
 158                 if (ret) {
 159                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 160                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 161                         return ret;
 162                 }
 163                 iwl_clear_ucode_stations(priv);
 164                 iwl_restore_stations(priv);
 165                 ret = iwl_restore_default_wep_keys(priv);
 166                 if (ret) {
 167                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 168                         return ret;
 169                 }
 170         }
 171
 172         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 173                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 174                        "* channel = %d\n"
 175                        "* bssid = %pM\n",
 176                        (new_assoc ? "" : "out"),
 177                        le16_to_cpu(priv->staging_rxon.channel),
 178                        priv->staging_rxon.bssid_addr);
 179
 180         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 181
 182         /* Apply the new configuration
 183          * RXON unassoc clears the station table in uCode so restoration of
 184          * stations is needed after it (the RXON command) completes
 185          */
 186         if (!new_assoc) {
 187                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 188                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 189                 if (ret) {
 190                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 191                         return ret;
 192                 }
 193                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 194                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 195                 iwl_clear_ucode_stations(priv);
 196                 iwl_restore_stations(priv);
 197                 ret = iwl_restore_default_wep_keys(priv);
 198                 if (ret) {
 199                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 200                         return ret;
 201                 }
 202         }
 203
 204         priv->start_calib = 0;
 205         if (new_assoc) {
 206                 /* Apply the new configuration
 207                  * RXON assoc doesn't clear the station table in uCode,
 208                  */
 209                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 210                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 211                 if (ret) {
 212                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 213                         return ret;
 214                 }
 215                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 216         }
 217         iwl_print_rx_config_cmd(priv);
 218
 219         iwl_init_sensitivity(priv);
 220
 221         /* If we issue a new RXON command which required a tune then we must
 222          * send a new TXPOWER command or we won't be able to Tx any frames */
 223         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 224         if (ret) {
 225                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 226                 return ret;
 227         }
 228
 229         return 0;
 230 }
 231
 232 void iwl_update_chain_flags(struct iwl_priv *priv)
 233 {
 234
 235         if (priv->cfg->ops->hcmd->set_rxon_chain)
 236                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 237         iwlcore_commit_rxon(priv);
 238 }
 239
 240 static void iwl_clear_free_frames(struct iwl_priv *priv)
 241 {
 242         struct list_head *element;
 243
 244         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 245                        priv->frames_count);
 246
 247         while (!list_empty(&priv->free_frames)) {
 248                 element = priv->free_frames.next;
 249                 list_del(element);
 250                 kfree(list_entry(element, struct iwl_frame, list));
 251                 priv->frames_count--;
 252         }
 253
 254         if (priv->frames_count) {
 255                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 256                             priv->frames_count);
 257                 priv->frames_count = 0;
 258         }
 259 }
 260
 261 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 262 {
 263         struct iwl_frame *frame;
 264         struct list_head *element;
 265         if (list_empty(&priv->free_frames)) {
 266                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 267                 if (!frame) {
 268                         IWL_ERR(priv, "Could not allocate frame!\n");
 269                         return NULL;
 270                 }
 271
 272                 priv->frames_count++;
 273                 return frame;
 274         }
 275
 276         element = priv->free_frames.next;
 277         list_del(element);
 278         return list_entry(element, struct iwl_frame, list);
 279 }
 280
 281 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 282 {
 283         memset(frame, 0, sizeof(*frame));
 284         list_add(&frame->list, &priv->free_frames);
 285 }
 286
 287 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 288                                           struct ieee80211_hdr *hdr,
 289                                           int left)
 290 {
 291         if (!priv->ibss_beacon)
 292                 return 0;
 293
 294         if (priv->ibss_beacon->len > left)
 295                 return 0;
 296
 297         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 298
 299         return priv->ibss_beacon->len;
 300 }
 301
 302 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 303 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 304                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 305                 u8 *beacon, u32 frame_size)
 306 {
 307         u16 tim_idx;
 308         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 309
 310         /*
 311          * The index is relative to frame start but we start looking at the
 312          * variable-length part of the beacon.
 313          */
 314         tim_idx = mgmt->u.beacon.variable - beacon;
 315
 316         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 317         while ((tim_idx < (frame_size - 2)) &&
 318                         (beacon[tim_idx] != WLAN_EID_TIM))
 319                 tim_idx += beacon[tim_idx+1] + 2;
 320
 321         /* If TIM field was found, set variables */
 322         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 323                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 324                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 325         } else
 326                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 327 }
 328
 329 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 330                                        struct iwl_frame *frame)
 331 {
 332         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 333         u32 frame_size;
 334         u32 rate_flags;
 335         u32 rate;
 336         /*
 337          * We have to set up the TX command, the TX Beacon command, and the
 338          * beacon contents.
 339          */
 340
 341         /* Initialize memory */
 342         tx_beacon_cmd = &frame->u.beacon;
 343         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 344
 345         /* Set up TX beacon contents */
 346         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 347                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 348         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 349                 return 0;
 350
 351         /* Set up TX command fields */
 352         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 353         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 354         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 355         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 356                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 357
 358         /* Set up TX beacon command fields */
 359         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 360                         frame_size);
 361
 362         /* Set up packet rate and flags */
 363         rate = iwl_rate_get_lowest_plcp(priv);
 364         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 365                                               priv->hw_params.valid_tx_ant);
 366         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 367         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 368                 rate_flags |= RATE_MCS_CCK_MSK;
 369         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 370                         rate_flags);
 371
 372         return sizeof(*tx_beacon_cmd) + frame_size;
 373 }
 374 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 375 {
 376         struct iwl_frame *frame;
 377         unsigned int frame_size;
 378         int rc;
 379
 380         frame = iwl_get_free_frame(priv);
 381         if (!frame) {
 382                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 383                           "command.\n");
 384                 return -ENOMEM;
 385         }
 386
 387         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 388         if (!frame_size) {
 389                 IWL_ERR(priv, "Error configuring the beacon command\n");
 390                 iwl_free_frame(priv, frame);
 391                 return -EINVAL;
 392         }
 393
 394         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 395                               &frame->u.cmd[0]);
 396
 397         iwl_free_frame(priv, frame);
 398
 399         return rc;
 400 }
 401
 402 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 403 {
 404         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 405
 406         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 407         if (sizeof(dma_addr_t) > sizeof(u32))
 408                 addr |=
 409                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 410
 411         return addr;
 412 }
 413
 414 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 415 {
 416         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 417
 418         return le16_to_cpu(tb->hi_n_len) >> 4;
 419 }
 420
 421 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 422                                   dma_addr_t addr, u16 len)
 423 {
 424         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 425         u16 hi_n_len = len << 4;
 426
 427         put_unaligned_le32(addr, &tb->lo);
 428         if (sizeof(dma_addr_t) > sizeof(u32))
 429                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 430
 431         tb->hi_n_len = cpu_to_le16(hi_n_len);
 432
 433         tfd->num_tbs = idx + 1;
 434 }
 435
 436 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 437 {
 438         return tfd->num_tbs & 0x1f;
 439 }
 440
 441 /**
 442  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 443  * @priv - driver private data
 444  * @txq - tx queue
 445  *
 446  * Does NOT advance any TFD circular buffer read/write indexes
 447  * Does NOT free the TFD itself (which is within circular buffer)
 448  */
 449 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 450 {
 451         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 452         struct iwl_tfd *tfd;
 453         struct pci_dev *dev = priv->pci_dev;
 454         int index = txq->q.read_ptr;
 455         int i;
 456         int num_tbs;
 457
 458         tfd = &tfd_tmp[index];
 459
 460         /* Sanity check on number of chunks */
 461         num_tbs = iwl_tfd_get_num_tbs(tfd);
 462
 463         if (num_tbs >= IWL_NUM_OF_TBS) {
 464                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 465                 /* @todo issue fatal error, it is quite serious situation */
 466                 return;
 467         }
 468
 469         /* Unmap tx_cmd */
 470         if (num_tbs)
 471                 pci_unmap_single(dev,
 472                                 dma_unmap_addr(&txq->meta[index], mapping),
 473                                 dma_unmap_len(&txq->meta[index], len),
 474                                 PCI_DMA_BIDIRECTIONAL);
 475
 476         /* Unmap chunks, if any. */
 477         for (i = 1; i < num_tbs; i++)
 478                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 479                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 480
 481         /* free SKB */
 482         if (txq->txb) {
 483                 struct sk_buff *skb;
 484
 485                 skb = txq->txb[txq->q.read_ptr].skb;
 486
 487                 /* can be called from irqs-disabled context */
 488                 if (skb) {
 489                         dev_kfree_skb_any(skb);
 490                         txq->txb[txq->q.read_ptr].skb = NULL;
 491                 }
 492         }
 493 }
 494
 495 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 496                                  struct iwl_tx_queue *txq,
 497                                  dma_addr_t addr, u16 len,
 498                                  u8 reset, u8 pad)
 499 {
 500         struct iwl_queue *q;
 501         struct iwl_tfd *tfd, *tfd_tmp;
 502         u32 num_tbs;
 503
 504         q = &txq->q;
 505         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 506         tfd = &tfd_tmp[q->write_ptr];
 507
 508         if (reset)
 509                 memset(tfd, 0, sizeof(*tfd));
 510
 511         num_tbs = iwl_tfd_get_num_tbs(tfd);
 512
 513         /* Each TFD can point to a maximum 20 Tx buffers */
 514         if (num_tbs >= IWL_NUM_OF_TBS) {
 515                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 516                           IWL_NUM_OF_TBS);
 517                 return -EINVAL;
 518         }
 519
 520         BUG_ON(addr & ~DMA_BIT_MASK(36));
 521         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 522                 IWL_ERR(priv, "Unaligned address = %llx\n",
 523                           (unsigned long long)addr);
 524
 525         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 526
 527         return 0;
 528 }
 529
 530 /*
 531  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 532  * given Tx queue, and enable the DMA channel used for that queue.
 533  *
 534  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 535  * channels supported in hardware.
 536  */
 537 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 538                          struct iwl_tx_queue *txq)
 539 {
 540         int txq_id = txq->q.id;
 541
 542         /* Circular buffer (TFD queue in DRAM) physical base address */
 543         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 544                              txq->q.dma_addr >> 8);
 545
 546         return 0;
 547 }
 548
 549 /******************************************************************************
 550  *
 551  * Generic RX handler implementations
 552  *
 553  ******************************************************************************/
 554 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 555                                 struct iwl_rx_mem_buffer *rxb)
 556 {
 557         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 558         struct iwl_alive_resp *palive;
 559         struct delayed_work *pwork;
 560
 561         palive = &pkt->u.alive_frame;
 562
 563         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 564                        "0x%01X 0x%01X\n",
 565                        palive->is_valid, palive->ver_type,
 566                        palive->ver_subtype);
 567
 568         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 569                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 570                 memcpy(&priv->card_alive_init,
 571                        &pkt->u.alive_frame,
 572                        sizeof(struct iwl_init_alive_resp));
 573                 pwork = &priv->init_alive_start;
 574         } else {
 575                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 576                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 577                        sizeof(struct iwl_alive_resp));
 578                 pwork = &priv->alive_start;
 579         }
 580
 581         /* We delay the ALIVE response by 5ms to
 582          * give the HW RF Kill time to activate... */
 583         if (palive->is_valid == UCODE_VALID_OK)
 584                 queue_delayed_work(priv->workqueue, pwork,
 585                                    msecs_to_jiffies(5));
 586         else
 587                 IWL_WARN(priv, "uCode did not respond OK.\n");
 588 }
 589
 590 static void iwl_bg_beacon_update(struct work_struct *work)
 591 {
 592         struct iwl_priv *priv =
 593                 container_of(work, struct iwl_priv, beacon_update);
 594         struct sk_buff *beacon;
 595
 596         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 597         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 598
 599         if (!beacon) {
 600                 IWL_ERR(priv, "update beacon failed\n");
 601                 return;
 602         }
 603
 604         mutex_lock(&priv->mutex);
 605         /* new beacon skb is allocated every time; dispose previous.*/
 606         if (priv->ibss_beacon)
 607                 dev_kfree_skb(priv->ibss_beacon);
 608
 609         priv->ibss_beacon = beacon;
 610         mutex_unlock(&priv->mutex);
 611
 612         iwl_send_beacon_cmd(priv);
 613 }
 614
 615 /**
 616  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 617  *
 618  * This callback is provided in order to send a statistics request.
 619  *
 620  * This timer function is continually reset to execute within
 621  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 622  * was received.  We need to ensure we receive the statistics in order
 623  * to update the temperature used for calibrating the TXPOWER.
 624  */
 625 static void iwl_bg_statistics_periodic(unsigned long data)
 626 {
 627         struct iwl_priv *priv = (struct iwl_priv *)data;
 628
 629         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 630                 return;
 631
 632         /* dont send host command if rf-kill is on */
 633         if (!iwl_is_ready_rf(priv))
 634                 return;
 635
 636         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 637 }
 638
 639
 640 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 641                                         u32 start_idx, u32 num_events,
 642                                         u32 mode)
 643 {
 644         u32 i;
 645         u32 ptr;        /* SRAM byte address of log data */
 646         u32 ev, time, data; /* event log data */
 647         unsigned long reg_flags;
 648
 649         if (mode == 0)
 650                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 651         else
 652                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 653
 654         /* Make sure device is powered up for SRAM reads */
 655         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 656         if (iwl_grab_nic_access(priv)) {
 657                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 658                 return;
 659         }
 660
 661         /* Set starting address; reads will auto-increment */
 662         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 663         rmb();
 664
 665         /*
 666          * "time" is actually "data" for mode 0 (no timestamp).
 667          * place event id # at far right for easier visual parsing.
 668          */
 669         for (i = 0; i < num_events; i++) {
 670                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 671                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 672                 if (mode == 0) {
 673                         trace_iwlwifi_dev_ucode_cont_event(priv,
 674                                                         0, time, ev);
 675                 } else {
 676                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 677                         trace_iwlwifi_dev_ucode_cont_event(priv,
 678                                                 time, data, ev);
 679                 }
 680         }
 681         /* Allow device to power down */
 682         iwl_release_nic_access(priv);
 683         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 684 }
 685
 686 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 687 {
 688         u32 capacity;   /* event log capacity in # entries */
 689         u32 base;       /* SRAM byte address of event log header */
 690         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 691         u32 num_wraps;  /* # times uCode wrapped to top of log */
 692         u32 next_entry; /* index of next entry to be written by uCode */
 693
 694         if (priv->ucode_type == UCODE_INIT)
 695                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 696         else
 697                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 698         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 699                 capacity = iwl_read_targ_mem(priv, base);
 700                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 701                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 702                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 703         } else
 704                 return;
 705
 706         if (num_wraps == priv->event_log.num_wraps) {
 707                 iwl_print_cont_event_trace(priv,
 708                                        base, priv->event_log.next_entry,
 709                                        next_entry - priv->event_log.next_entry,
 710                                        mode);
 711                 priv->event_log.non_wraps_count++;
 712         } else {
 713                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 714                         priv->event_log.wraps_more_count++;
 715                 else
 716                         priv->event_log.wraps_once_count++;
 717                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 718                                 num_wraps - priv->event_log.num_wraps,
 719                                 next_entry, priv->event_log.next_entry);
 720                 if (next_entry < priv->event_log.next_entry) {
 721                         iwl_print_cont_event_trace(priv, base,
 722                                priv->event_log.next_entry,
 723                                capacity - priv->event_log.next_entry,
 724                                mode);
 725
 726                         iwl_print_cont_event_trace(priv, base, 0,
 727                                 next_entry, mode);
 728                 } else {
 729                         iwl_print_cont_event_trace(priv, base,
 730                                next_entry, capacity - next_entry,
 731                                mode);
 732
 733                         iwl_print_cont_event_trace(priv, base, 0,
 734                                 next_entry, mode);
 735                 }
 736         }
 737         priv->event_log.num_wraps = num_wraps;
 738         priv->event_log.next_entry = next_entry;
 739 }
 740
 741 /**
 742  * iwl_bg_ucode_trace - Timer callback to log ucode event
 743  *
 744  * The timer is continually set to execute every
 745  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 746  * this function is to perform continuous uCode event logging operation
 747  * if enabled
 748  */
 749 static void iwl_bg_ucode_trace(unsigned long data)
 750 {
 751         struct iwl_priv *priv = (struct iwl_priv *)data;
 752
 753         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 754                 return;
 755
 756         if (priv->event_log.ucode_trace) {
 757                 iwl_continuous_event_trace(priv);
 758                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 759                 mod_timer(&priv->ucode_trace,
 760                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 761         }
 762 }
 763
 764 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 765                                 struct iwl_rx_mem_buffer *rxb)
 766 {
 767 #ifdef CONFIG_IWLWIFI_DEBUG
 768         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 769         struct iwl4965_beacon_notif *beacon =
 770                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 771         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 772
 773         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 774                 "tsf %d %d rate %d\n",
 775                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 776                 beacon->beacon_notify_hdr.failure_frame,
 777                 le32_to_cpu(beacon->ibss_mgr_status),
 778                 le32_to_cpu(beacon->high_tsf),
 779                 le32_to_cpu(beacon->low_tsf), rate);
 780 #endif
 781
 782         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 783             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 784                 queue_work(priv->workqueue, &priv->beacon_update);
 785 }
 786
 787 /* Handle notification from uCode that card's power state is changing
 788  * due to software, hardware, or critical temperature RFKILL */
 789 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 790                                     struct iwl_rx_mem_buffer *rxb)
 791 {
 792         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 793         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 794         unsigned long status = priv->status;
 795
 796         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 797                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 798                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 799                           (flags & CT_CARD_DISABLED) ?
 800                           "Reached" : "Not reached");
 801
 802         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 803                      CT_CARD_DISABLED)) {
 804
 805                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 806                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 807
 808                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 809                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 810
 811                 if (!(flags & RXON_CARD_DISABLED)) {
 812                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 813                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 814                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 815                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 816                 }
 817                 if (flags & CT_CARD_DISABLED)
 818                         iwl_tt_enter_ct_kill(priv);
 819         }
 820         if (!(flags & CT_CARD_DISABLED))
 821                 iwl_tt_exit_ct_kill(priv);
 822
 823         if (flags & HW_CARD_DISABLED)
 824                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 825         else
 826                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 827
 828
 829         if (!(flags & RXON_CARD_DISABLED))
 830                 iwl_scan_cancel(priv);
 831
 832         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 833              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 834                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 835                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 836         else
 837                 wake_up_interruptible(&priv->wait_command_queue);
 838 }
 839
 840 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 841 {
 842         if (src == IWL_PWR_SRC_VAUX) {
 843                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 844                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 845                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 846                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 847         } else {
 848                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 849                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 850                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 851         }
 852
 853         return 0;
 854 }
 855
 856 static void iwl_bg_tx_flush(struct work_struct *work)
 857 {
 858         struct iwl_priv *priv =
 859                 container_of(work, struct iwl_priv, tx_flush);
 860
 861         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 862                 return;
 863
 864         /* do nothing if rf-kill is on */
 865         if (!iwl_is_ready_rf(priv))
 866                 return;
 867
 868         if (priv->cfg->ops->lib->txfifo_flush) {
 869                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 870                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 871         }
 872 }
 873
 874 /**
 875  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 876  *
 877  * Setup the RX handlers for each of the reply types sent from the uCode
 878  * to the host.
 879  *
 880  * This function chains into the hardware specific files for them to setup
 881  * any hardware specific handlers as well.
 882  */
 883 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 884 {
 885         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 886         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 887         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 888         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 889                         iwl_rx_spectrum_measure_notif;
 890         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 891         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 892             iwl_rx_pm_debug_statistics_notif;
 893         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 894
 895         /*
 896          * The same handler is used for both the REPLY to a discrete
 897          * statistics request from the host as well as for the periodic
 898          * statistics notifications (after received beacons) from the uCode.
 899          */
 900         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 901         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 902
 903         iwl_setup_rx_scan_handlers(priv);
 904
 905         /* status change handler */
 906         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 907
 908         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 909             iwl_rx_missed_beacon_notif;
 910         /* Rx handlers */
 911         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 912         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 913         /* block ack */
 914         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 915         /* Set up hardware specific Rx handlers */
 916         priv->cfg->ops->lib->rx_handler_setup(priv);
 917 }
 918
 919 /**
 920  * iwl_rx_handle - Main entry function for receiving responses from uCode
 921  *
 922  * Uses the priv->rx_handlers callback function array to invoke
 923  * the appropriate handlers, including command responses,
 924  * frame-received notifications, and other notifications.
 925  */
 926 void iwl_rx_handle(struct iwl_priv *priv)
 927 {
 928         struct iwl_rx_mem_buffer *rxb;
 929         struct iwl_rx_packet *pkt;
 930         struct iwl_rx_queue *rxq = &priv->rxq;
 931         u32 r, i;
 932         int reclaim;
 933         unsigned long flags;
 934         u8 fill_rx = 0;
 935         u32 count = 8;
 936         int total_empty;
 937
 938         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 939          * buffer that the driver may process (last buffer filled by ucode). */
 940         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 941         i = rxq->read;
 942
 943         /* Rx interrupt, but nothing sent from uCode */
 944         if (i == r)
 945                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 946
 947         /* calculate total frames need to be restock after handling RX */
 948         total_empty = r - rxq->write_actual;
 949         if (total_empty < 0)
 950                 total_empty += RX_QUEUE_SIZE;
 951
 952         if (total_empty > (RX_QUEUE_SIZE / 2))
 953                 fill_rx = 1;
 954
 955         while (i != r) {
 956                 int len;
 957
 958                 rxb = rxq->queue[i];
 959
 960                 /* If an RXB doesn't have a Rx queue slot associated with it,
 961                  * then a bug has been introduced in the queue refilling
 962                  * routines -- catch it here */
 963                 BUG_ON(rxb == NULL);
 964
 965                 rxq->queue[i] = NULL;
 966
 967                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 968                                PAGE_SIZE << priv->hw_params.rx_page_order,
 969                                PCI_DMA_FROMDEVICE);
 970                 pkt = rxb_addr(rxb);
 971
 972                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 973                 len += sizeof(u32); /* account for status word */
 974                 trace_iwlwifi_dev_rx(priv, pkt, len);
 975
 976                 /* Reclaim a command buffer only if this packet is a response
 977                  *   to a (driver-originated) command.
 978                  * If the packet (e.g. Rx frame) originated from uCode,
 979                  *   there is no command buffer to reclaim.
 980                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 981                  *   but apparently a few don't get set; catch them here. */
 982                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 983                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 984                         (pkt->hdr.cmd != REPLY_RX) &&
 985                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 986                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 987                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 988                         (pkt->hdr.cmd != REPLY_TX);
 989
 990                 /* Based on type of command response or notification,
 991                  *   handle those that need handling via function in
 992                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 993                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 994                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 995                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 996                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 997                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 998                 } else {
 999                         /* No handling needed */
1000                         IWL_DEBUG_RX(priv,
1001                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1002                                 r, i, get_cmd_string(pkt->hdr.cmd),
1003                                 pkt->hdr.cmd);
1004                 }
1005
1006                 /*
1007                  * XXX: After here, we should always check rxb->page
1008                  * against NULL before touching it or its virtual
1009                  * memory (pkt). Because some rx_handler might have
1010                  * already taken or freed the pages.
1011                  */
1012
1013                 if (reclaim) {
1014                         /* Invoke any callbacks, transfer the buffer to caller,
1015                          * and fire off the (possibly) blocking iwl_send_cmd()
1016                          * as we reclaim the driver command queue */
1017                         if (rxb->page)
1018                                 iwl_tx_cmd_complete(priv, rxb);
1019                         else
1020                                 IWL_WARN(priv, "Claim null rxb?\n");
1021                 }
1022
1023                 /* Reuse the page if possible. For notification packets and
1024                  * SKBs that fail to Rx correctly, add them back into the
1025                  * rx_free list for reuse later. */
1026                 spin_lock_irqsave(&rxq->lock, flags);
1027                 if (rxb->page != NULL) {
1028                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1029                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1030                                 PCI_DMA_FROMDEVICE);
1031                         list_add_tail(&rxb->list, &rxq->rx_free);
1032                         rxq->free_count++;
1033                 } else
1034                         list_add_tail(&rxb->list, &rxq->rx_used);
1035
1036                 spin_unlock_irqrestore(&rxq->lock, flags);
1037
1038                 i = (i + 1) & RX_QUEUE_MASK;
1039                 /* If there are a lot of unused frames,
1040                  * restock the Rx queue so ucode wont assert. */
1041                 if (fill_rx) {
1042                         count++;
1043                         if (count >= 8) {
1044                                 rxq->read = i;
1045                                 iwlagn_rx_replenish_now(priv);
1046                                 count = 0;
1047                         }
1048                 }
1049         }
1050
1051         /* Backtrack one entry */
1052         rxq->read = i;
1053         if (fill_rx)
1054                 iwlagn_rx_replenish_now(priv);
1055         else
1056                 iwlagn_rx_queue_restock(priv);
1057 }
1058
1059 /* call this function to flush any scheduled tasklet */
1060 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1061 {
1062         /* wait to make sure we flush pending tasklet*/
1063         synchronize_irq(priv->pci_dev->irq);
1064         tasklet_kill(&priv->irq_tasklet);
1065 }
1066
1067 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1068 {
1069         u32 inta, handled = 0;
1070         u32 inta_fh;
1071         unsigned long flags;
1072         u32 i;
1073 #ifdef CONFIG_IWLWIFI_DEBUG
1074         u32 inta_mask;
1075 #endif
1076
1077         spin_lock_irqsave(&priv->lock, flags);
1078
1079         /* Ack/clear/reset pending uCode interrupts.
1080          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1081          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1082         inta = iwl_read32(priv, CSR_INT);
1083         iwl_write32(priv, CSR_INT, inta);
1084
1085         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1086          * Any new interrupts that happen after this, either while we're
1087          * in this tasklet, or later, will show up in next ISR/tasklet. */
1088         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1089         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1090
1091 #ifdef CONFIG_IWLWIFI_DEBUG
1092         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1093                 /* just for debug */
1094                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1095                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1096                               inta, inta_mask, inta_fh);
1097         }
1098 #endif
1099
1100         spin_unlock_irqrestore(&priv->lock, flags);
1101
1102         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1103          * atomic, make sure that inta covers all the interrupts that
1104          * we've discovered, even if FH interrupt came in just after
1105          * reading CSR_INT. */
1106         if (inta_fh & CSR49_FH_INT_RX_MASK)
1107                 inta |= CSR_INT_BIT_FH_RX;
1108         if (inta_fh & CSR49_FH_INT_TX_MASK)
1109                 inta |= CSR_INT_BIT_FH_TX;
1110
1111         /* Now service all interrupt bits discovered above. */
1112         if (inta & CSR_INT_BIT_HW_ERR) {
1113                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1114
1115                 /* Tell the device to stop sending interrupts */
1116                 iwl_disable_interrupts(priv);
1117
1118                 priv->isr_stats.hw++;
1119                 iwl_irq_handle_error(priv);
1120
1121                 handled |= CSR_INT_BIT_HW_ERR;
1122
1123                 return;
1124         }
1125
1126 #ifdef CONFIG_IWLWIFI_DEBUG
1127         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1128                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1129                 if (inta & CSR_INT_BIT_SCD) {
1130                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1131                                       "the frame/frames.\n");
1132                         priv->isr_stats.sch++;
1133                 }
1134
1135                 /* Alive notification via Rx interrupt will do the real work */
1136                 if (inta & CSR_INT_BIT_ALIVE) {
1137                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1138                         priv->isr_stats.alive++;
1139                 }
1140         }
1141 #endif
1142         /* Safely ignore these bits for debug checks below */
1143         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1144
1145         /* HW RF KILL switch toggled */
1146         if (inta & CSR_INT_BIT_RF_KILL) {
1147                 int hw_rf_kill = 0;
1148                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1149                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1150                         hw_rf_kill = 1;
1151
1152                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1153                                 hw_rf_kill ? "disable radio" : "enable radio");
1154
1155                 priv->isr_stats.rfkill++;
1156
1157                 /* driver only loads ucode once setting the interface up.
1158                  * the driver allows loading the ucode even if the radio
1159                  * is killed. Hence update the killswitch state here. The
1160                  * rfkill handler will care about restarting if needed.
1161                  */
1162                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1163                         if (hw_rf_kill)
1164                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1165                         else
1166                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1167                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1168                 }
1169
1170                 handled |= CSR_INT_BIT_RF_KILL;
1171         }
1172
1173         /* Chip got too hot and stopped itself */
1174         if (inta & CSR_INT_BIT_CT_KILL) {
1175                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1176                 priv->isr_stats.ctkill++;
1177                 handled |= CSR_INT_BIT_CT_KILL;
1178         }
1179
1180         /* Error detected by uCode */
1181         if (inta & CSR_INT_BIT_SW_ERR) {
1182                 IWL_ERR(priv, "Microcode SW error detected. "
1183                         " Restarting 0x%X.\n", inta);
1184                 priv->isr_stats.sw++;
1185                 priv->isr_stats.sw_err = inta;
1186                 iwl_irq_handle_error(priv);
1187                 handled |= CSR_INT_BIT_SW_ERR;
1188         }
1189
1190         /*
1191          * uCode wakes up after power-down sleep.
1192          * Tell device about any new tx or host commands enqueued,
1193          * and about any Rx buffers made available while asleep.
1194          */
1195         if (inta & CSR_INT_BIT_WAKEUP) {
1196                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1197                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1198                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1199                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1200                 priv->isr_stats.wakeup++;
1201                 handled |= CSR_INT_BIT_WAKEUP;
1202         }
1203
1204         /* All uCode command responses, including Tx command responses,
1205          * Rx "responses" (frame-received notification), and other
1206          * notifications from uCode come through here*/
1207         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1208                 iwl_rx_handle(priv);
1209                 priv->isr_stats.rx++;
1210                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1211         }
1212
1213         /* This "Tx" DMA channel is used only for loading uCode */
1214         if (inta & CSR_INT_BIT_FH_TX) {
1215                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1216                 priv->isr_stats.tx++;
1217                 handled |= CSR_INT_BIT_FH_TX;
1218                 /* Wake up uCode load routine, now that load is complete */
1219                 priv->ucode_write_complete = 1;
1220                 wake_up_interruptible(&priv->wait_command_queue);
1221         }
1222
1223         if (inta & ~handled) {
1224                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1225                 priv->isr_stats.unhandled++;
1226         }
1227
1228         if (inta & ~(priv->inta_mask)) {
1229                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1230                          inta & ~priv->inta_mask);
1231                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1232         }
1233
1234         /* Re-enable all interrupts */
1235         /* only Re-enable if diabled by irq */
1236         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1237                 iwl_enable_interrupts(priv);
1238
1239 #ifdef CONFIG_IWLWIFI_DEBUG
1240         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1241                 inta = iwl_read32(priv, CSR_INT);
1242                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1243                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1244                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1245                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1246         }
1247 #endif
1248 }
1249
1250 /* tasklet for iwlagn interrupt */
1251 static void iwl_irq_tasklet(struct iwl_priv *priv)
1252 {
1253         u32 inta = 0;
1254         u32 handled = 0;
1255         unsigned long flags;
1256         u32 i;
1257 #ifdef CONFIG_IWLWIFI_DEBUG
1258         u32 inta_mask;
1259 #endif
1260
1261         spin_lock_irqsave(&priv->lock, flags);
1262
1263         /* Ack/clear/reset pending uCode interrupts.
1264          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1265          */
1266         /* There is a hardware bug in the interrupt mask function that some
1267          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1268          * they are disabled in the CSR_INT_MASK register. Furthermore the
1269          * ICT interrupt handling mechanism has another bug that might cause
1270          * these unmasked interrupts fail to be detected. We workaround the
1271          * hardware bugs here by ACKing all the possible interrupts so that
1272          * interrupt coalescing can still be achieved.
1273          */
1274         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1275
1276         inta = priv->_agn.inta;
1277
1278 #ifdef CONFIG_IWLWIFI_DEBUG
1279         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1280                 /* just for debug */
1281                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1282                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1283                                 inta, inta_mask);
1284         }
1285 #endif
1286
1287         spin_unlock_irqrestore(&priv->lock, flags);
1288
1289         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1290         priv->_agn.inta = 0;
1291
1292         /* Now service all interrupt bits discovered above. */
1293         if (inta & CSR_INT_BIT_HW_ERR) {
1294                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1295
1296                 /* Tell the device to stop sending interrupts */
1297                 iwl_disable_interrupts(priv);
1298
1299                 priv->isr_stats.hw++;
1300                 iwl_irq_handle_error(priv);
1301
1302                 handled |= CSR_INT_BIT_HW_ERR;
1303
1304                 return;
1305         }
1306
1307 #ifdef CONFIG_IWLWIFI_DEBUG
1308         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1309                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1310                 if (inta & CSR_INT_BIT_SCD) {
1311                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1312                                       "the frame/frames.\n");
1313                         priv->isr_stats.sch++;
1314                 }
1315
1316                 /* Alive notification via Rx interrupt will do the real work */
1317                 if (inta & CSR_INT_BIT_ALIVE) {
1318                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1319                         priv->isr_stats.alive++;
1320                 }
1321         }
1322 #endif
1323         /* Safely ignore these bits for debug checks below */
1324         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1325
1326         /* HW RF KILL switch toggled */
1327         if (inta & CSR_INT_BIT_RF_KILL) {
1328                 int hw_rf_kill = 0;
1329                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1330                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1331                         hw_rf_kill = 1;
1332
1333                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1334                                 hw_rf_kill ? "disable radio" : "enable radio");
1335
1336                 priv->isr_stats.rfkill++;
1337
1338                 /* driver only loads ucode once setting the interface up.
1339                  * the driver allows loading the ucode even if the radio
1340                  * is killed. Hence update the killswitch state here. The
1341                  * rfkill handler will care about restarting if needed.
1342                  */
1343                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1344                         if (hw_rf_kill)
1345                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1346                         else
1347                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1348                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1349                 }
1350
1351                 handled |= CSR_INT_BIT_RF_KILL;
1352         }
1353
1354         /* Chip got too hot and stopped itself */
1355         if (inta & CSR_INT_BIT_CT_KILL) {
1356                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1357                 priv->isr_stats.ctkill++;
1358                 handled |= CSR_INT_BIT_CT_KILL;
1359         }
1360
1361         /* Error detected by uCode */
1362         if (inta & CSR_INT_BIT_SW_ERR) {
1363                 IWL_ERR(priv, "Microcode SW error detected. "
1364                         " Restarting 0x%X.\n", inta);
1365                 priv->isr_stats.sw++;
1366                 priv->isr_stats.sw_err = inta;
1367                 iwl_irq_handle_error(priv);
1368                 handled |= CSR_INT_BIT_SW_ERR;
1369         }
1370
1371         /* uCode wakes up after power-down sleep */
1372         if (inta & CSR_INT_BIT_WAKEUP) {
1373                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1374                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1375                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1376                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1377
1378                 priv->isr_stats.wakeup++;
1379
1380                 handled |= CSR_INT_BIT_WAKEUP;
1381         }
1382
1383         /* All uCode command responses, including Tx command responses,
1384          * Rx "responses" (frame-received notification), and other
1385          * notifications from uCode come through here*/
1386         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1387                         CSR_INT_BIT_RX_PERIODIC)) {
1388                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1389                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1390                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1391                         iwl_write32(priv, CSR_FH_INT_STATUS,
1392                                         CSR49_FH_INT_RX_MASK);
1393                 }
1394                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1395                         handled |= CSR_INT_BIT_RX_PERIODIC;
1396                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1397                 }
1398                 /* Sending RX interrupt require many steps to be done in the
1399                  * the device:
1400                  * 1- write interrupt to current index in ICT table.
1401                  * 2- dma RX frame.
1402                  * 3- update RX shared data to indicate last write index.
1403                  * 4- send interrupt.
1404                  * This could lead to RX race, driver could receive RX interrupt
1405                  * but the shared data changes does not reflect this;
1406                  * periodic interrupt will detect any dangling Rx activity.
1407                  */
1408
1409                 /* Disable periodic interrupt; we use it as just a one-shot. */
1410                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1411                             CSR_INT_PERIODIC_DIS);
1412                 iwl_rx_handle(priv);
1413
1414                 /*
1415                  * Enable periodic interrupt in 8 msec only if we received
1416                  * real RX interrupt (instead of just periodic int), to catch
1417                  * any dangling Rx interrupt.  If it was just the periodic
1418                  * interrupt, there was no dangling Rx activity, and no need
1419                  * to extend the periodic interrupt; one-shot is enough.
1420                  */
1421                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1422                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1423                                     CSR_INT_PERIODIC_ENA);
1424
1425                 priv->isr_stats.rx++;
1426         }
1427
1428         /* This "Tx" DMA channel is used only for loading uCode */
1429         if (inta & CSR_INT_BIT_FH_TX) {
1430                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1431                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1432                 priv->isr_stats.tx++;
1433                 handled |= CSR_INT_BIT_FH_TX;
1434                 /* Wake up uCode load routine, now that load is complete */
1435                 priv->ucode_write_complete = 1;
1436                 wake_up_interruptible(&priv->wait_command_queue);
1437         }
1438
1439         if (inta & ~handled) {
1440                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1441                 priv->isr_stats.unhandled++;
1442         }
1443
1444         if (inta & ~(priv->inta_mask)) {
1445                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1446                          inta & ~priv->inta_mask);
1447         }
1448
1449         /* Re-enable all interrupts */
1450         /* only Re-enable if diabled by irq */
1451         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1452                 iwl_enable_interrupts(priv);
1453 }
1454
1455 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1456 #define ACK_CNT_RATIO (50)
1457 #define BA_TIMEOUT_CNT (5)
1458 #define BA_TIMEOUT_MAX (16)
1459
1460 /**
1461  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1462  *
1463  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1464  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1465  * operation state.
1466  */
1467 bool iwl_good_ack_health(struct iwl_priv *priv,
1468                                 struct iwl_rx_packet *pkt)
1469 {
1470         bool rc = true;
1471         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1472         int ba_timeout_delta;
1473
1474         actual_ack_cnt_delta =
1475                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1476                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1477         expected_ack_cnt_delta =
1478                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1479                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1480         ba_timeout_delta =
1481                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1482                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1483         if ((priv->_agn.agg_tids_count > 0) &&
1484             (expected_ack_cnt_delta > 0) &&
1485             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1486                 < ACK_CNT_RATIO) &&
1487             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1488                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1489                                 " expected_ack_cnt = %d\n",
1490                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1491
1492 #ifdef CONFIG_IWLWIFI_DEBUGFS
1493                 /*
1494                  * This is ifdef'ed on DEBUGFS because otherwise the
1495                  * statistics aren't available. If DEBUGFS is set but
1496                  * DEBUG is not, these will just compile out.
1497                  */
1498                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1499                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1500                 IWL_DEBUG_RADIO(priv,
1501                                 "ack_or_ba_timeout_collision delta = %d\n",
1502                                 priv->_agn.delta_statistics.tx.
1503                                 ack_or_ba_timeout_collision);
1504 #endif
1505                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1506                                 ba_timeout_delta);
1507                 if (!actual_ack_cnt_delta &&
1508                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1509                         rc = false;
1510         }
1511         return rc;
1512 }
1513
1514
1515 /*****************************************************************************
1516  *
1517  * sysfs attributes
1518  *
1519  *****************************************************************************/
1520
1521 #ifdef CONFIG_IWLWIFI_DEBUG
1522
1523 /*
1524  * The following adds a new attribute to the sysfs representation
1525  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1526  * used for controlling the debug level.
1527  *
1528  * See the level definitions in iwl for details.
1529  *
1530  * The debug_level being managed using sysfs below is a per device debug
1531  * level that is used instead of the global debug level if it (the per
1532  * device debug level) is set.
1533  */
1534 static ssize_t show_debug_level(struct device *d,
1535                                 struct device_attribute *attr, char *buf)
1536 {
1537         struct iwl_priv *priv = dev_get_drvdata(d);
1538         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1539 }
1540 static ssize_t store_debug_level(struct device *d,
1541                                 struct device_attribute *attr,
1542                                  const char *buf, size_t count)
1543 {
1544         struct iwl_priv *priv = dev_get_drvdata(d);
1545         unsigned long val;
1546         int ret;
1547
1548         ret = strict_strtoul(buf, 0, &val);
1549         if (ret)
1550                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1551         else {
1552                 priv->debug_level = val;
1553                 if (iwl_alloc_traffic_mem(priv))
1554                         IWL_ERR(priv,
1555                                 "Not enough memory to generate traffic log\n");
1556         }
1557         return strnlen(buf, count);
1558 }
1559
1560 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1561                         show_debug_level, store_debug_level);
1562
1563
1564 #endif /* CONFIG_IWLWIFI_DEBUG */
1565
1566
1567 static ssize_t show_temperature(struct device *d,
1568                                 struct device_attribute *attr, char *buf)
1569 {
1570         struct iwl_priv *priv = dev_get_drvdata(d);
1571
1572         if (!iwl_is_alive(priv))
1573                 return -EAGAIN;
1574
1575         return sprintf(buf, "%d\n", priv->temperature);
1576 }
1577
1578 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1579
1580 static ssize_t show_tx_power(struct device *d,
1581                              struct device_attribute *attr, char *buf)
1582 {
1583         struct iwl_priv *priv = dev_get_drvdata(d);
1584
1585         if (!iwl_is_ready_rf(priv))
1586                 return sprintf(buf, "off\n");
1587         else
1588                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1589 }
1590
1591 static ssize_t store_tx_power(struct device *d,
1592                               struct device_attribute *attr,
1593                               const char *buf, size_t count)
1594 {
1595         struct iwl_priv *priv = dev_get_drvdata(d);
1596         unsigned long val;
1597         int ret;
1598
1599         ret = strict_strtoul(buf, 10, &val);
1600         if (ret)
1601                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1602         else {
1603                 ret = iwl_set_tx_power(priv, val, false);
1604                 if (ret)
1605                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1606                                 ret);
1607                 else
1608                         ret = count;
1609         }
1610         return ret;
1611 }
1612
1613 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1614
1615 static struct attribute *iwl_sysfs_entries[] = {
1616         &dev_attr_temperature.attr,
1617         &dev_attr_tx_power.attr,
1618 #ifdef CONFIG_IWLWIFI_DEBUG
1619         &dev_attr_debug_level.attr,
1620 #endif
1621         NULL
1622 };
1623
1624 static struct attribute_group iwl_attribute_group = {
1625         .name = NULL,           /* put in device directory */
1626         .attrs = iwl_sysfs_entries,
1627 };
1628
1629 /******************************************************************************
1630  *
1631  * uCode download functions
1632  *
1633  ******************************************************************************/
1634
1635 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1636 {
1637         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1638         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1639         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1640         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1641         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1642         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1643 }
1644
1645 static void iwl_nic_start(struct iwl_priv *priv)
1646 {
1647         /* Remove all resets to allow NIC to operate */
1648         iwl_write32(priv, CSR_RESET, 0);
1649 }
1650
1651 struct iwlagn_ucode_capabilities {
1652         u32 max_probe_length;
1653         u32 standard_phy_calibration_size;
1654 };
1655
1656 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1657 static int iwl_mac_setup_register(struct iwl_priv *priv,
1658                                   struct iwlagn_ucode_capabilities *capa);
1659
1660 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1661 {
1662         const char *name_pre = priv->cfg->fw_name_pre;
1663
1664         if (first)
1665                 priv->fw_index = priv->cfg->ucode_api_max;
1666         else
1667                 priv->fw_index--;
1668
1669         if (priv->fw_index < priv->cfg->ucode_api_min) {
1670                 IWL_ERR(priv, "no suitable firmware found!\n");
1671                 return -ENOENT;
1672         }
1673
1674         sprintf(priv->firmware_name, "%s%d%s",
1675                 name_pre, priv->fw_index, ".ucode");
1676
1677         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1678                        priv->firmware_name);
1679
1680         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1681                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1682                                        iwl_ucode_callback);
1683 }
1684
1685 struct iwlagn_firmware_pieces {
1686         const void *inst, *data, *init, *init_data, *boot;
1687         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1688
1689         u32 build;
1690
1691         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1692         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1693 };
1694
1695 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1696                                        const struct firmware *ucode_raw,
1697                                        struct iwlagn_firmware_pieces *pieces)
1698 {
1699         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1700         u32 api_ver, hdr_size;
1701         const u8 *src;
1702
1703         priv->ucode_ver = le32_to_cpu(ucode->ver);
1704         api_ver = IWL_UCODE_API(priv->ucode_ver);
1705
1706         switch (api_ver) {
1707         default:
1708                 /*
1709                  * 4965 doesn't revision the firmware file format
1710                  * along with the API version, it always uses v1
1711                  * file format.
1712                  */
1713                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1714                                 CSR_HW_REV_TYPE_4965) {
1715                         hdr_size = 28;
1716                         if (ucode_raw->size < hdr_size) {
1717                                 IWL_ERR(priv, "File size too small!\n");
1718                                 return -EINVAL;
1719                         }
1720                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1721                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1722                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1723                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1724                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1725                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1726                         src = ucode->u.v2.data;
1727                         break;
1728                 }
1729                 /* fall through for 4965 */
1730         case 0:
1731         case 1:
1732         case 2:
1733                 hdr_size = 24;
1734                 if (ucode_raw->size < hdr_size) {
1735                         IWL_ERR(priv, "File size too small!\n");
1736                         return -EINVAL;
1737                 }
1738                 pieces->build = 0;
1739                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1740                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1741                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1742                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1743                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1744                 src = ucode->u.v1.data;
1745                 break;
1746         }
1747
1748         /* Verify size of file vs. image size info in file's header */
1749         if (ucode_raw->size != hdr_size + pieces->inst_size +
1750                                 pieces->data_size + pieces->init_size +
1751                                 pieces->init_data_size + pieces->boot_size) {
1752
1753                 IWL_ERR(priv,
1754                         "uCode file size %d does not match expected size\n",
1755                         (int)ucode_raw->size);
1756                 return -EINVAL;
1757         }
1758
1759         pieces->inst = src;
1760         src += pieces->inst_size;
1761         pieces->data = src;
1762         src += pieces->data_size;
1763         pieces->init = src;
1764         src += pieces->init_size;
1765         pieces->init_data = src;
1766         src += pieces->init_data_size;
1767         pieces->boot = src;
1768         src += pieces->boot_size;
1769
1770         return 0;
1771 }
1772
1773 static int iwlagn_wanted_ucode_alternative = 1;
1774
1775 static int iwlagn_load_firmware(struct iwl_priv *priv,
1776                                 const struct firmware *ucode_raw,
1777                                 struct iwlagn_firmware_pieces *pieces,
1778                                 struct iwlagn_ucode_capabilities *capa)
1779 {
1780         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1781         struct iwl_ucode_tlv *tlv;
1782         size_t len = ucode_raw->size;
1783         const u8 *data;
1784         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1785         u64 alternatives;
1786         u32 tlv_len;
1787         enum iwl_ucode_tlv_type tlv_type;
1788         const u8 *tlv_data;
1789
1790         if (len < sizeof(*ucode)) {
1791                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1792                 return -EINVAL;
1793         }
1794
1795         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1796                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1797                         le32_to_cpu(ucode->magic));
1798                 return -EINVAL;
1799         }
1800
1801         /*
1802          * Check which alternatives are present, and "downgrade"
1803          * when the chosen alternative is not present, warning
1804          * the user when that happens. Some files may not have
1805          * any alternatives, so don't warn in that case.
1806          */
1807         alternatives = le64_to_cpu(ucode->alternatives);
1808         tmp = wanted_alternative;
1809         if (wanted_alternative > 63)
1810                 wanted_alternative = 63;
1811         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1812                 wanted_alternative--;
1813         if (wanted_alternative && wanted_alternative != tmp)
1814                 IWL_WARN(priv,
1815                          "uCode alternative %d not available, choosing %d\n",
1816                          tmp, wanted_alternative);
1817
1818         priv->ucode_ver = le32_to_cpu(ucode->ver);
1819         pieces->build = le32_to_cpu(ucode->build);
1820         data = ucode->data;
1821
1822         len -= sizeof(*ucode);
1823
1824         while (len >= sizeof(*tlv)) {
1825                 u16 tlv_alt;
1826
1827                 len -= sizeof(*tlv);
1828                 tlv = (void *)data;
1829
1830                 tlv_len = le32_to_cpu(tlv->length);
1831                 tlv_type = le16_to_cpu(tlv->type);
1832                 tlv_alt = le16_to_cpu(tlv->alternative);
1833                 tlv_data = tlv->data;
1834
1835                 if (len < tlv_len) {
1836                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1837                                 len, tlv_len);
1838                         return -EINVAL;
1839                 }
1840                 len -= ALIGN(tlv_len, 4);
1841                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1842
1843                 /*
1844                  * Alternative 0 is always valid.
1845                  *
1846                  * Skip alternative TLVs that are not selected.
1847                  */
1848                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1849                         continue;
1850
1851                 switch (tlv_type) {
1852                 case IWL_UCODE_TLV_INST:
1853                         pieces->inst = tlv_data;
1854                         pieces->inst_size = tlv_len;
1855                         break;
1856                 case IWL_UCODE_TLV_DATA:
1857                         pieces->data = tlv_data;
1858                         pieces->data_size = tlv_len;
1859                         break;
1860                 case IWL_UCODE_TLV_INIT:
1861                         pieces->init = tlv_data;
1862                         pieces->init_size = tlv_len;
1863                         break;
1864                 case IWL_UCODE_TLV_INIT_DATA:
1865                         pieces->init_data = tlv_data;
1866                         pieces->init_data_size = tlv_len;
1867                         break;
1868                 case IWL_UCODE_TLV_BOOT:
1869                         pieces->boot = tlv_data;
1870                         pieces->boot_size = tlv_len;
1871                         break;
1872                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1873                         if (tlv_len != sizeof(u32))
1874                                 goto invalid_tlv_len;
1875                         capa->max_probe_length =
1876                                         le32_to_cpup((__le32 *)tlv_data);
1877                         break;
1878                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1879                         if (tlv_len != sizeof(u32))
1880                                 goto invalid_tlv_len;
1881                         pieces->init_evtlog_ptr =
1882                                         le32_to_cpup((__le32 *)tlv_data);
1883                         break;
1884                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1885                         if (tlv_len != sizeof(u32))
1886                                 goto invalid_tlv_len;
1887                         pieces->init_evtlog_size =
1888                                         le32_to_cpup((__le32 *)tlv_data);
1889                         break;
1890                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1891                         if (tlv_len != sizeof(u32))
1892                                 goto invalid_tlv_len;
1893                         pieces->init_errlog_ptr =
1894                                         le32_to_cpup((__le32 *)tlv_data);
1895                         break;
1896                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1897                         if (tlv_len != sizeof(u32))
1898                                 goto invalid_tlv_len;
1899                         pieces->inst_evtlog_ptr =
1900                                         le32_to_cpup((__le32 *)tlv_data);
1901                         break;
1902                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1903                         if (tlv_len != sizeof(u32))
1904                                 goto invalid_tlv_len;
1905                         pieces->inst_evtlog_size =
1906                                         le32_to_cpup((__le32 *)tlv_data);
1907                         break;
1908                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1909                         if (tlv_len != sizeof(u32))
1910                                 goto invalid_tlv_len;
1911                         pieces->inst_errlog_ptr =
1912                                         le32_to_cpup((__le32 *)tlv_data);
1913                         break;
1914                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1915                         if (tlv_len)
1916                                 goto invalid_tlv_len;
1917                         priv->enhance_sensitivity_table = true;
1918                         break;
1919                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1920                         if (tlv_len != sizeof(u32))
1921                                 goto invalid_tlv_len;
1922                         capa->standard_phy_calibration_size =
1923                                         le32_to_cpup((__le32 *)tlv_data);
1924                         break;
1925                 default:
1926                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1927                         break;
1928                 }
1929         }
1930
1931         if (len) {
1932                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1933                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1934                 return -EINVAL;
1935         }
1936
1937         return 0;
1938
1939  invalid_tlv_len:
1940         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1941         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1942
1943         return -EINVAL;
1944 }
1945
1946 /**
1947  * iwl_ucode_callback - callback when firmware was loaded
1948  *
1949  * If loaded successfully, copies the firmware into buffers
1950  * for the card to fetch (via DMA).
1951  */
1952 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1953 {
1954         struct iwl_priv *priv = context;
1955         struct iwl_ucode_header *ucode;
1956         int err;
1957         struct iwlagn_firmware_pieces pieces;
1958         const unsigned int api_max = priv->cfg->ucode_api_max;
1959         const unsigned int api_min = priv->cfg->ucode_api_min;
1960         u32 api_ver;
1961         char buildstr[25];
1962         u32 build;
1963         struct iwlagn_ucode_capabilities ucode_capa = {
1964                 .max_probe_length = 200,
1965                 .standard_phy_calibration_size =
1966                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1967         };
1968
1969         memset(&pieces, 0, sizeof(pieces));
1970
1971         if (!ucode_raw) {
1972                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1973                         priv->firmware_name);
1974                 goto try_again;
1975         }
1976
1977         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1978                        priv->firmware_name, ucode_raw->size);
1979
1980         /* Make sure that we got at least the API version number */
1981         if (ucode_raw->size < 4) {
1982                 IWL_ERR(priv, "File size way too small!\n");
1983                 goto try_again;
1984         }
1985
1986         /* Data from ucode file:  header followed by uCode images */
1987         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1988
1989         if (ucode->ver)
1990                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1991         else
1992                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1993                                            &ucode_capa);
1994
1995         if (err)
1996                 goto try_again;
1997
1998         api_ver = IWL_UCODE_API(priv->ucode_ver);
1999         build = pieces.build;
2000
2001         /*
2002          * api_ver should match the api version forming part of the
2003          * firmware filename ... but we don't check for that and only rely
2004          * on the API version read from firmware header from here on forward
2005          */
2006         if (api_ver < api_min || api_ver > api_max) {
2007                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2008                           "Driver supports v%u, firmware is v%u.\n",
2009                           api_max, api_ver);
2010                 goto try_again;
2011         }
2012
2013         if (api_ver != api_max)
2014                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2015                           "got v%u. New firmware can be obtained "
2016                           "from http://www.intellinuxwireless.org.\n",
2017                           api_max, api_ver);
2018
2019         if (build)
2020                 sprintf(buildstr, " build %u", build);
2021         else
2022                 buildstr[0] = '\0';
2023
2024         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2025                  IWL_UCODE_MAJOR(priv->ucode_ver),
2026                  IWL_UCODE_MINOR(priv->ucode_ver),
2027                  IWL_UCODE_API(priv->ucode_ver),
2028                  IWL_UCODE_SERIAL(priv->ucode_ver),
2029                  buildstr);
2030
2031         snprintf(priv->hw->wiphy->fw_version,
2032                  sizeof(priv->hw->wiphy->fw_version),
2033                  "%u.%u.%u.%u%s",
2034                  IWL_UCODE_MAJOR(priv->ucode_ver),
2035                  IWL_UCODE_MINOR(priv->ucode_ver),
2036                  IWL_UCODE_API(priv->ucode_ver),
2037                  IWL_UCODE_SERIAL(priv->ucode_ver),
2038                  buildstr);
2039
2040         /*
2041          * For any of the failures below (before allocating pci memory)
2042          * we will try to load a version with a smaller API -- maybe the
2043          * user just got a corrupted version of the latest API.
2044          */
2045
2046         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2047                        priv->ucode_ver);
2048         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2049                        pieces.inst_size);
2050         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2051                        pieces.data_size);
2052         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2053                        pieces.init_size);
2054         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2055                        pieces.init_data_size);
2056         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2057                        pieces.boot_size);
2058
2059         /* Verify that uCode images will fit in card's SRAM */
2060         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2061                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2062                         pieces.inst_size);
2063                 goto try_again;
2064         }
2065
2066         if (pieces.data_size > priv->hw_params.max_data_size) {
2067                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2068                         pieces.data_size);
2069                 goto try_again;
2070         }
2071
2072         if (pieces.init_size > priv->hw_params.max_inst_size) {
2073                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2074                         pieces.init_size);
2075                 goto try_again;
2076         }
2077
2078         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2079                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2080                         pieces.init_data_size);
2081                 goto try_again;
2082         }
2083
2084         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2085                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2086                         pieces.boot_size);
2087                 goto try_again;
2088         }
2089
2090         /* Allocate ucode buffers for card's bus-master loading ... */
2091
2092         /* Runtime instructions and 2 copies of data:
2093          * 1) unmodified from disk
2094          * 2) backup cache for save/restore during power-downs */
2095         priv->ucode_code.len = pieces.inst_size;
2096         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2097
2098         priv->ucode_data.len = pieces.data_size;
2099         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2100
2101         priv->ucode_data_backup.len = pieces.data_size;
2102         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2103
2104         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2105             !priv->ucode_data_backup.v_addr)
2106                 goto err_pci_alloc;
2107
2108         /* Initialization instructions and data */
2109         if (pieces.init_size && pieces.init_data_size) {
2110                 priv->ucode_init.len = pieces.init_size;
2111                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2112
2113                 priv->ucode_init_data.len = pieces.init_data_size;
2114                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2115
2116                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2117                         goto err_pci_alloc;
2118         }
2119
2120         /* Bootstrap (instructions only, no data) */
2121         if (pieces.boot_size) {
2122                 priv->ucode_boot.len = pieces.boot_size;
2123                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2124
2125                 if (!priv->ucode_boot.v_addr)
2126                         goto err_pci_alloc;
2127         }
2128
2129         /* Now that we can no longer fail, copy information */
2130
2131         /*
2132          * The (size - 16) / 12 formula is based on the information recorded
2133          * for each event, which is of mode 1 (including timestamp) for all
2134          * new microcodes that include this information.
2135          */
2136         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2137         if (pieces.init_evtlog_size)
2138                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2139         else
2140                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2141         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2142         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2143         if (pieces.inst_evtlog_size)
2144                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2145         else
2146                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2147         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2148
2149         /* Copy images into buffers for card's bus-master reads ... */
2150
2151         /* Runtime instructions (first block of data in file) */
2152         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2153                         pieces.inst_size);
2154         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2155
2156         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2157                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2158
2159         /*
2160          * Runtime data
2161          * NOTE:  Copy into backup buffer will be done in iwl_up()
2162          */
2163         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2164                         pieces.data_size);
2165         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2166         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2167
2168         /* Initialization instructions */
2169         if (pieces.init_size) {
2170                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2171                                 pieces.init_size);
2172                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2173         }
2174
2175         /* Initialization data */
2176         if (pieces.init_data_size) {
2177                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2178                                pieces.init_data_size);
2179                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2180                        pieces.init_data_size);
2181         }
2182
2183         /* Bootstrap instructions */
2184         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2185                         pieces.boot_size);
2186         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2187
2188         /*
2189          * figure out the offset of chain noise reset and gain commands
2190          * base on the size of standard phy calibration commands table size
2191          */
2192         if (ucode_capa.standard_phy_calibration_size >
2193             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2194                 ucode_capa.standard_phy_calibration_size =
2195                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2196
2197         priv->_agn.phy_calib_chain_noise_reset_cmd =
2198                 ucode_capa.standard_phy_calibration_size;
2199         priv->_agn.phy_calib_chain_noise_gain_cmd =
2200                 ucode_capa.standard_phy_calibration_size + 1;
2201
2202         /**************************************************
2203          * This is still part of probe() in a sense...
2204          *
2205          * 9. Setup and register with mac80211 and debugfs
2206          **************************************************/
2207         err = iwl_mac_setup_register(priv, &ucode_capa);
2208         if (err)
2209                 goto out_unbind;
2210
2211         err = iwl_dbgfs_register(priv, DRV_NAME);
2212         if (err)
2213                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2214
2215         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2216                                         &iwl_attribute_group);
2217         if (err) {
2218                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2219                 goto out_unbind;
2220         }
2221
2222         /* We have our copies now, allow OS release its copies */
2223         release_firmware(ucode_raw);
2224         complete(&priv->_agn.firmware_loading_complete);
2225         return;
2226
2227  try_again:
2228         /* try next, if any */
2229         if (iwl_request_firmware(priv, false))
2230                 goto out_unbind;
2231         release_firmware(ucode_raw);
2232         return;
2233
2234  err_pci_alloc:
2235         IWL_ERR(priv, "failed to allocate pci memory\n");
2236         iwl_dealloc_ucode_pci(priv);
2237  out_unbind:
2238         complete(&priv->_agn.firmware_loading_complete);
2239         device_release_driver(&priv->pci_dev->dev);
2240         release_firmware(ucode_raw);
2241 }
2242
2243 static const char *desc_lookup_text[] = {
2244         "OK",
2245         "FAIL",
2246         "BAD_PARAM",
2247         "BAD_CHECKSUM",
2248         "NMI_INTERRUPT_WDG",
2249         "SYSASSERT",
2250         "FATAL_ERROR",
2251         "BAD_COMMAND",
2252         "HW_ERROR_TUNE_LOCK",
2253         "HW_ERROR_TEMPERATURE",
2254         "ILLEGAL_CHAN_FREQ",
2255         "VCC_NOT_STABLE",
2256         "FH_ERROR",
2257         "NMI_INTERRUPT_HOST",
2258         "NMI_INTERRUPT_ACTION_PT",
2259         "NMI_INTERRUPT_UNKNOWN",
2260         "UCODE_VERSION_MISMATCH",
2261         "HW_ERROR_ABS_LOCK",
2262         "HW_ERROR_CAL_LOCK_FAIL",
2263         "NMI_INTERRUPT_INST_ACTION_PT",
2264         "NMI_INTERRUPT_DATA_ACTION_PT",
2265         "NMI_TRM_HW_ER",
2266         "NMI_INTERRUPT_TRM",
2267         "NMI_INTERRUPT_BREAK_POINT"
2268         "DEBUG_0",
2269         "DEBUG_1",
2270         "DEBUG_2",
2271         "DEBUG_3",
2272 };
2273
2274 static struct { char *name; u8 num; } advanced_lookup[] = {
2275         { "NMI_INTERRUPT_WDG", 0x34 },
2276         { "SYSASSERT", 0x35 },
2277         { "UCODE_VERSION_MISMATCH", 0x37 },
2278         { "BAD_COMMAND", 0x38 },
2279         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2280         { "FATAL_ERROR", 0x3D },
2281         { "NMI_TRM_HW_ERR", 0x46 },
2282         { "NMI_INTERRUPT_TRM", 0x4C },
2283         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2284         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2285         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2286         { "NMI_INTERRUPT_HOST", 0x66 },
2287         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2288         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2289         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2290         { "ADVANCED_SYSASSERT", 0 },
2291 };
2292
2293 static const char *desc_lookup(u32 num)
2294 {
2295         int i;
2296         int max = ARRAY_SIZE(desc_lookup_text);
2297
2298         if (num < max)
2299                 return desc_lookup_text[num];
2300
2301         max = ARRAY_SIZE(advanced_lookup) - 1;
2302         for (i = 0; i < max; i++) {
2303                 if (advanced_lookup[i].num == num)
2304                         break;;
2305         }
2306         return advanced_lookup[i].name;
2307 }
2308
2309 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2310 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2311
2312 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2313 {
2314         u32 data2, line;
2315         u32 desc, time, count, base, data1;
2316         u32 blink1, blink2, ilink1, ilink2;
2317         u32 pc, hcmd;
2318
2319         if (priv->ucode_type == UCODE_INIT) {
2320                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2321                 if (!base)
2322                         base = priv->_agn.init_errlog_ptr;
2323         } else {
2324                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2325                 if (!base)
2326                         base = priv->_agn.inst_errlog_ptr;
2327         }
2328
2329         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2330                 IWL_ERR(priv,
2331                         "Not valid error log pointer 0x%08X for %s uCode\n",
2332                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2333                 return;
2334         }
2335
2336         count = iwl_read_targ_mem(priv, base);
2337
2338         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2339                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2340                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2341                         priv->status, count);
2342         }
2343
2344         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2345         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2346         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2347         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2348         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2349         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2350         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2351         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2352         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2353         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2354         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2355
2356         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2357                                       blink1, blink2, ilink1, ilink2);
2358
2359         IWL_ERR(priv, "Desc                                  Time       "
2360                 "data1      data2      line\n");
2361         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2362                 desc_lookup(desc), desc, time, data1, data2, line);
2363         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2364         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2365                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2366 }
2367
2368 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2369
2370 /**
2371  * iwl_print_event_log - Dump error event log to syslog
2372  *
2373  */
2374 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2375                                u32 num_events, u32 mode,
2376                                int pos, char **buf, size_t bufsz)
2377 {
2378         u32 i;
2379         u32 base;       /* SRAM byte address of event log header */
2380         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2381         u32 ptr;        /* SRAM byte address of log data */
2382         u32 ev, time, data; /* event log data */
2383         unsigned long reg_flags;
2384
2385         if (num_events == 0)
2386                 return pos;
2387
2388         if (priv->ucode_type == UCODE_INIT) {
2389                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2390                 if (!base)
2391                         base = priv->_agn.init_evtlog_ptr;
2392         } else {
2393                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2394                 if (!base)
2395                         base = priv->_agn.inst_evtlog_ptr;
2396         }
2397
2398         if (mode == 0)
2399                 event_size = 2 * sizeof(u32);
2400         else
2401                 event_size = 3 * sizeof(u32);
2402
2403         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2404
2405         /* Make sure device is powered up for SRAM reads */
2406         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2407         iwl_grab_nic_access(priv);
2408
2409         /* Set starting address; reads will auto-increment */
2410         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2411         rmb();
2412
2413         /* "time" is actually "data" for mode 0 (no timestamp).
2414         * place event id # at far right for easier visual parsing. */
2415         for (i = 0; i < num_events; i++) {
2416                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2417                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2418                 if (mode == 0) {
2419                         /* data, ev */
2420                         if (bufsz) {
2421                                 pos += scnprintf(*buf + pos, bufsz - pos,
2422                                                 "EVT_LOG:0x%08x:%04u\n",
2423                                                 time, ev);
2424                         } else {
2425                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2426                                         time, ev);
2427                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2428                                         time, ev);
2429                         }
2430                 } else {
2431                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2432                         if (bufsz) {
2433                                 pos += scnprintf(*buf + pos, bufsz - pos,
2434                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2435                                                  time, data, ev);
2436                         } else {
2437                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2438                                         time, data, ev);
2439                                 trace_iwlwifi_dev_ucode_event(priv, time,
2440                                         data, ev);
2441                         }
2442                 }
2443         }
2444
2445         /* Allow device to power down */
2446         iwl_release_nic_access(priv);
2447         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2448         return pos;
2449 }
2450
2451 /**
2452  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2453  */
2454 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2455                                     u32 num_wraps, u32 next_entry,
2456                                     u32 size, u32 mode,
2457                                     int pos, char **buf, size_t bufsz)
2458 {
2459         /*
2460          * display the newest DEFAULT_LOG_ENTRIES entries
2461          * i.e the entries just before the next ont that uCode would fill.
2462          */
2463         if (num_wraps) {
2464                 if (next_entry < size) {
2465                         pos = iwl_print_event_log(priv,
2466                                                 capacity - (size - next_entry),
2467                                                 size - next_entry, mode,
2468                                                 pos, buf, bufsz);
2469                         pos = iwl_print_event_log(priv, 0,
2470                                                   next_entry, mode,
2471                                                   pos, buf, bufsz);
2472                 } else
2473                         pos = iwl_print_event_log(priv, next_entry - size,
2474                                                   size, mode, pos, buf, bufsz);
2475         } else {
2476                 if (next_entry < size) {
2477                         pos = iwl_print_event_log(priv, 0, next_entry,
2478                                                   mode, pos, buf, bufsz);
2479                 } else {
2480                         pos = iwl_print_event_log(priv, next_entry - size,
2481                                                   size, mode, pos, buf, bufsz);
2482                 }
2483         }
2484         return pos;
2485 }
2486
2487 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2488
2489 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2490                             char **buf, bool display)
2491 {
2492         u32 base;       /* SRAM byte address of event log header */
2493         u32 capacity;   /* event log capacity in # entries */
2494         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2495         u32 num_wraps;  /* # times uCode wrapped to top of log */
2496         u32 next_entry; /* index of next entry to be written by uCode */
2497         u32 size;       /* # entries that we'll print */
2498         u32 logsize;
2499         int pos = 0;
2500         size_t bufsz = 0;
2501
2502         if (priv->ucode_type == UCODE_INIT) {
2503                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2504                 logsize = priv->_agn.init_evtlog_size;
2505                 if (!base)
2506                         base = priv->_agn.init_evtlog_ptr;
2507         } else {
2508                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2509                 logsize = priv->_agn.inst_evtlog_size;
2510                 if (!base)
2511                         base = priv->_agn.inst_evtlog_ptr;
2512         }
2513
2514         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2515                 IWL_ERR(priv,
2516                         "Invalid event log pointer 0x%08X for %s uCode\n",
2517                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2518                 return -EINVAL;
2519         }
2520
2521         /* event log header */
2522         capacity = iwl_read_targ_mem(priv, base);
2523         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2524         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2525         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2526
2527         if (capacity > logsize) {
2528                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2529                         capacity, logsize);
2530                 capacity = logsize;
2531         }
2532
2533         if (next_entry > logsize) {
2534                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2535                         next_entry, logsize);
2536                 next_entry = logsize;
2537         }
2538
2539         size = num_wraps ? capacity : next_entry;
2540
2541         /* bail out if nothing in log */
2542         if (size == 0) {
2543                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2544                 return pos;
2545         }
2546
2547 #ifdef CONFIG_IWLWIFI_DEBUG
2548         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2549                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2550                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2551 #else
2552         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2553                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2554 #endif
2555         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2556                 size);
2557
2558 #ifdef CONFIG_IWLWIFI_DEBUG
2559         if (display) {
2560                 if (full_log)
2561                         bufsz = capacity * 48;
2562                 else
2563                         bufsz = size * 48;
2564                 *buf = kmalloc(bufsz, GFP_KERNEL);
2565                 if (!*buf)
2566                         return -ENOMEM;
2567         }
2568         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2569                 /*
2570                  * if uCode has wrapped back to top of log,
2571                  * start at the oldest entry,
2572                  * i.e the next one that uCode would fill.
2573                  */
2574                 if (num_wraps)
2575                         pos = iwl_print_event_log(priv, next_entry,
2576                                                 capacity - next_entry, mode,
2577                                                 pos, buf, bufsz);
2578                 /* (then/else) start at top of log */
2579                 pos = iwl_print_event_log(priv, 0,
2580                                           next_entry, mode, pos, buf, bufsz);
2581         } else
2582                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2583                                                 next_entry, size, mode,
2584                                                 pos, buf, bufsz);
2585 #else
2586         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2587                                         next_entry, size, mode,
2588                                         pos, buf, bufsz);
2589 #endif
2590         return pos;
2591 }
2592
2593 /**
2594  * iwl_alive_start - called after REPLY_ALIVE notification received
2595  *                   from protocol/runtime uCode (initialization uCode's
2596  *                   Alive gets handled by iwl_init_alive_start()).
2597  */
2598 static void iwl_alive_start(struct iwl_priv *priv)
2599 {
2600         int ret = 0;
2601
2602         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2603
2604         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2605                 /* We had an error bringing up the hardware, so take it
2606                  * all the way back down so we can try again */
2607                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2608                 goto restart;
2609         }
2610
2611         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2612          * This is a paranoid check, because we would not have gotten the
2613          * "runtime" alive if code weren't properly loaded.  */
2614         if (iwl_verify_ucode(priv)) {
2615                 /* Runtime instruction load was bad;
2616                  * take it all the way back down so we can try again */
2617                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2618                 goto restart;
2619         }
2620
2621         ret = priv->cfg->ops->lib->alive_notify(priv);
2622         if (ret) {
2623                 IWL_WARN(priv,
2624                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2625                 goto restart;
2626         }
2627
2628         /* After the ALIVE response, we can send host commands to the uCode */
2629         set_bit(STATUS_ALIVE, &priv->status);
2630
2631         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2632                 /* Enable timer to monitor the driver queues */
2633                 mod_timer(&priv->monitor_recover,
2634                         jiffies +
2635                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2636         }
2637
2638         if (iwl_is_rfkill(priv))
2639                 return;
2640
2641         ieee80211_wake_queues(priv->hw);
2642
2643         priv->active_rate = IWL_RATES_MASK;
2644
2645         /* Configure Tx antenna selection based on H/W config */
2646         if (priv->cfg->ops->hcmd->set_tx_ant)
2647                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2648
2649         if (iwl_is_associated(priv)) {
2650                 struct iwl_rxon_cmd *active_rxon =
2651                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2652                 /* apply any changes in staging */
2653                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2654                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2655         } else {
2656                 /* Initialize our rx_config data */
2657                 iwl_connection_init_rx_config(priv, NULL);
2658
2659                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2660                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2661         }
2662
2663         /* Configure Bluetooth device coexistence support */
2664         priv->cfg->ops->hcmd->send_bt_config(priv);
2665
2666         iwl_reset_run_time_calib(priv);
2667
2668         /* Configure the adapter for unassociated operation */
2669         iwlcore_commit_rxon(priv);
2670
2671         /* At this point, the NIC is initialized and operational */
2672         iwl_rf_kill_ct_config(priv);
2673
2674         iwl_leds_init(priv);
2675
2676         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2677         set_bit(STATUS_READY, &priv->status);
2678         wake_up_interruptible(&priv->wait_command_queue);
2679
2680         iwl_power_update_mode(priv, true);
2681         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2682
2683
2684         return;
2685
2686  restart:
2687         queue_work(priv->workqueue, &priv->restart);
2688 }
2689
2690 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2691
2692 static void __iwl_down(struct iwl_priv *priv)
2693 {
2694         unsigned long flags;
2695         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2696
2697         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2698
2699         if (!exit_pending)
2700                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2701
2702         iwl_clear_ucode_stations(priv);
2703         iwl_dealloc_bcast_station(priv);
2704         iwl_clear_driver_stations(priv);
2705
2706         /* Unblock any waiting calls */
2707         wake_up_interruptible_all(&priv->wait_command_queue);
2708
2709         /* Wipe out the EXIT_PENDING status bit if we are not actually
2710          * exiting the module */
2711         if (!exit_pending)
2712                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2713
2714         /* stop and reset the on-board processor */
2715         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2716
2717         /* tell the device to stop sending interrupts */
2718         spin_lock_irqsave(&priv->lock, flags);
2719         iwl_disable_interrupts(priv);
2720         spin_unlock_irqrestore(&priv->lock, flags);
2721         iwl_synchronize_irq(priv);
2722
2723         if (priv->mac80211_registered)
2724                 ieee80211_stop_queues(priv->hw);
2725
2726         /* If we have not previously called iwl_init() then
2727          * clear all bits but the RF Kill bit and return */
2728         if (!iwl_is_init(priv)) {
2729                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2730                                         STATUS_RF_KILL_HW |
2731                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2732                                         STATUS_GEO_CONFIGURED |
2733                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2734                                         STATUS_EXIT_PENDING;
2735                 goto exit;
2736         }
2737
2738         /* ...otherwise clear out all the status bits but the RF Kill
2739          * bit and continue taking the NIC down. */
2740         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2741                                 STATUS_RF_KILL_HW |
2742                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2743                                 STATUS_GEO_CONFIGURED |
2744                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2745                                 STATUS_FW_ERROR |
2746                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2747                                 STATUS_EXIT_PENDING;
2748
2749         /* device going down, Stop using ICT table */
2750         iwl_disable_ict(priv);
2751
2752         iwlagn_txq_ctx_stop(priv);
2753         iwlagn_rxq_stop(priv);
2754
2755         /* Power-down device's busmaster DMA clocks */
2756         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2757         udelay(5);
2758
2759         /* Make sure (redundant) we've released our request to stay awake */
2760         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2761
2762         /* Stop the device, and put it in low power state */
2763         priv->cfg->ops->lib->apm_ops.stop(priv);
2764
2765  exit:
2766         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2767
2768         if (priv->ibss_beacon)
2769                 dev_kfree_skb(priv->ibss_beacon);
2770         priv->ibss_beacon = NULL;
2771
2772         /* clear out any free frames */
2773         iwl_clear_free_frames(priv);
2774 }
2775
2776 static void iwl_down(struct iwl_priv *priv)
2777 {
2778         mutex_lock(&priv->mutex);
2779         __iwl_down(priv);
2780         mutex_unlock(&priv->mutex);
2781
2782         iwl_cancel_deferred_work(priv);
2783 }
2784
2785 #define HW_READY_TIMEOUT (50)
2786
2787 static int iwl_set_hw_ready(struct iwl_priv *priv)
2788 {
2789         int ret = 0;
2790
2791         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2792                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2793
2794         /* See if we got it */
2795         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2796                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2797                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2798                                 HW_READY_TIMEOUT);
2799         if (ret != -ETIMEDOUT)
2800                 priv->hw_ready = true;
2801         else
2802                 priv->hw_ready = false;
2803
2804         IWL_DEBUG_INFO(priv, "hardware %s\n",
2805                       (priv->hw_ready == 1) ? "ready" : "not ready");
2806         return ret;
2807 }
2808
2809 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2810 {
2811         int ret = 0;
2812
2813         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2814
2815         ret = iwl_set_hw_ready(priv);
2816         if (priv->hw_ready)
2817                 return ret;
2818
2819         /* If HW is not ready, prepare the conditions to check again */
2820         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2821                         CSR_HW_IF_CONFIG_REG_PREPARE);
2822
2823         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2824                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2825                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2826
2827         /* HW should be ready by now, check again. */
2828         if (ret != -ETIMEDOUT)
2829                 iwl_set_hw_ready(priv);
2830
2831         return ret;
2832 }
2833
2834 #define MAX_HW_RESTARTS 5
2835
2836 static int __iwl_up(struct iwl_priv *priv)
2837 {
2838         int i;
2839         int ret;
2840
2841         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2842                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2843                 return -EIO;
2844         }
2845
2846         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2847                 IWL_ERR(priv, "ucode not available for device bringup\n");
2848                 return -EIO;
2849         }
2850
2851         ret = iwl_alloc_bcast_station(priv, true);
2852         if (ret)
2853                 return ret;
2854
2855         iwl_prepare_card_hw(priv);
2856
2857         if (!priv->hw_ready) {
2858                 IWL_WARN(priv, "Exit HW not ready\n");
2859                 return -EIO;
2860         }
2861
2862         /* If platform's RF_KILL switch is NOT set to KILL */
2863         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2864                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2865         else
2866                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2867
2868         if (iwl_is_rfkill(priv)) {
2869                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2870
2871                 iwl_enable_interrupts(priv);
2872                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2873                 return 0;
2874         }
2875
2876         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2877
2878         ret = iwlagn_hw_nic_init(priv);
2879         if (ret) {
2880                 IWL_ERR(priv, "Unable to init nic\n");
2881                 return ret;
2882         }
2883
2884         /* make sure rfkill handshake bits are cleared */
2885         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2886         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2887                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2888
2889         /* clear (again), then enable host interrupts */
2890         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2891         iwl_enable_interrupts(priv);
2892
2893         /* really make sure rfkill handshake bits are cleared */
2894         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2895         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2896
2897         /* Copy original ucode data image from disk into backup cache.
2898          * This will be used to initialize the on-board processor's
2899          * data SRAM for a clean start when the runtime program first loads. */
2900         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2901                priv->ucode_data.len);
2902
2903         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2904
2905                 /* load bootstrap state machine,
2906                  * load bootstrap program into processor's memory,
2907                  * prepare to load the "initialize" uCode */
2908                 ret = priv->cfg->ops->lib->load_ucode(priv);
2909
2910                 if (ret) {
2911                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2912                                 ret);
2913                         continue;
2914                 }
2915
2916                 /* start card; "initialize" will load runtime ucode */
2917                 iwl_nic_start(priv);
2918
2919                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2920
2921                 return 0;
2922         }
2923
2924         set_bit(STATUS_EXIT_PENDING, &priv->status);
2925         __iwl_down(priv);
2926         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2927
2928         /* tried to restart and config the device for as long as our
2929          * patience could withstand */
2930         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2931         return -EIO;
2932 }
2933
2934
2935 /*****************************************************************************
2936  *
2937  * Workqueue callbacks
2938  *
2939  *****************************************************************************/
2940
2941 static void iwl_bg_init_alive_start(struct work_struct *data)
2942 {
2943         struct iwl_priv *priv =
2944             container_of(data, struct iwl_priv, init_alive_start.work);
2945
2946         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2947                 return;
2948
2949         mutex_lock(&priv->mutex);
2950         priv->cfg->ops->lib->init_alive_start(priv);
2951         mutex_unlock(&priv->mutex);
2952 }
2953
2954 static void iwl_bg_alive_start(struct work_struct *data)
2955 {
2956         struct iwl_priv *priv =
2957             container_of(data, struct iwl_priv, alive_start.work);
2958
2959         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2960                 return;
2961
2962         /* enable dram interrupt */
2963         iwl_reset_ict(priv);
2964
2965         mutex_lock(&priv->mutex);
2966         iwl_alive_start(priv);
2967         mutex_unlock(&priv->mutex);
2968 }
2969
2970 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2971 {
2972         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2973                         run_time_calib_work);
2974
2975         mutex_lock(&priv->mutex);
2976
2977         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2978             test_bit(STATUS_SCANNING, &priv->status)) {
2979                 mutex_unlock(&priv->mutex);
2980                 return;
2981         }
2982
2983         if (priv->start_calib) {
2984                 if (priv->cfg->bt_statistics) {
2985                         iwl_chain_noise_calibration(priv,
2986                                         (void *)&priv->_agn.statistics_bt);
2987                         iwl_sensitivity_calibration(priv,
2988                                         (void *)&priv->_agn.statistics_bt);
2989                 } else {
2990                         iwl_chain_noise_calibration(priv,
2991                                         (void *)&priv->_agn.statistics);
2992                         iwl_sensitivity_calibration(priv,
2993                                         (void *)&priv->_agn.statistics);
2994                 }
2995         }
2996
2997         mutex_unlock(&priv->mutex);
2998 }
2999
3000 static void iwl_bg_restart(struct work_struct *data)
3001 {
3002         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3003
3004         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3005                 return;
3006
3007         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3008                 mutex_lock(&priv->mutex);
3009                 priv->vif = NULL;
3010                 priv->is_open = 0;
3011                 mutex_unlock(&priv->mutex);
3012                 iwl_down(priv);
3013                 ieee80211_restart_hw(priv->hw);
3014         } else {
3015                 iwl_down(priv);
3016
3017                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3018                         return;
3019
3020                 mutex_lock(&priv->mutex);
3021                 __iwl_up(priv);
3022                 mutex_unlock(&priv->mutex);
3023         }
3024 }
3025
3026 static void iwl_bg_rx_replenish(struct work_struct *data)
3027 {
3028         struct iwl_priv *priv =
3029             container_of(data, struct iwl_priv, rx_replenish);
3030
3031         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3032                 return;
3033
3034         mutex_lock(&priv->mutex);
3035         iwlagn_rx_replenish(priv);
3036         mutex_unlock(&priv->mutex);
3037 }
3038
3039 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3040
3041 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3042 {
3043         struct ieee80211_conf *conf = NULL;
3044         int ret = 0;
3045
3046         if (!vif || !priv->is_open)
3047                 return;
3048
3049         if (vif->type == NL80211_IFTYPE_AP) {
3050                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3051                 return;
3052         }
3053
3054         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3055                 return;
3056
3057         iwl_scan_cancel_timeout(priv, 200);
3058
3059         conf = ieee80211_get_hw_conf(priv->hw);
3060
3061         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3062         iwlcore_commit_rxon(priv);
3063
3064         iwl_setup_rxon_timing(priv, vif);
3065         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3066                               sizeof(priv->rxon_timing), &priv->rxon_timing);
3067         if (ret)
3068                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3069                             "Attempting to continue.\n");
3070
3071         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3072
3073         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3074
3075         if (priv->cfg->ops->hcmd->set_rxon_chain)
3076                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3077
3078         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3079
3080         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3081                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3082
3083         if (vif->bss_conf.use_short_preamble)
3084                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3085         else
3086                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3087
3088         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3089                 if (vif->bss_conf.use_short_slot)
3090                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3091                 else
3092                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3093         }
3094
3095         iwlcore_commit_rxon(priv);
3096
3097         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3098                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3099
3100         switch (vif->type) {
3101         case NL80211_IFTYPE_STATION:
3102                 break;
3103         case NL80211_IFTYPE_ADHOC:
3104                 iwl_send_beacon_cmd(priv);
3105                 break;
3106         default:
3107                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3108                           __func__, vif->type);
3109                 break;
3110         }
3111
3112         /* the chain noise calibration will enabled PM upon completion
3113          * If chain noise has already been run, then we need to enable
3114          * power management here */
3115         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3116                 iwl_power_update_mode(priv, false);
3117
3118         /* Enable Rx differential gain and sensitivity calibrations */
3119         iwl_chain_noise_reset(priv);
3120         priv->start_calib = 1;
3121
3122 }
3123
3124 /*****************************************************************************
3125  *
3126  * mac80211 entry point functions
3127  *
3128  *****************************************************************************/
3129
3130 #define UCODE_READY_TIMEOUT     (4 * HZ)
3131
3132 /*
3133  * Not a mac80211 entry point function, but it fits in with all the
3134  * other mac80211 functions grouped here.
3135  */
3136 static int iwl_mac_setup_register(struct iwl_priv *priv,
3137                                   struct iwlagn_ucode_capabilities *capa)
3138 {
3139         int ret;
3140         struct ieee80211_hw *hw = priv->hw;
3141         hw->rate_control_algorithm = "iwl-agn-rs";
3142
3143         /* Tell mac80211 our characteristics */
3144         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3145                     IEEE80211_HW_AMPDU_AGGREGATION |
3146                     IEEE80211_HW_SPECTRUM_MGMT;
3147
3148         if (!priv->cfg->broken_powersave)
3149                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3150                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3151
3152         if (priv->cfg->sku & IWL_SKU_N)
3153                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3154                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3155
3156         hw->sta_data_size = sizeof(struct iwl_station_priv);
3157         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3158
3159         hw->wiphy->interface_modes =
3160                 BIT(NL80211_IFTYPE_STATION) |
3161                 BIT(NL80211_IFTYPE_ADHOC);
3162
3163         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3164                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3165
3166         /*
3167          * For now, disable PS by default because it affects
3168          * RX performance significantly.
3169          */
3170         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3171
3172         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3173         /* we create the 802.11 header and a zero-length SSID element */
3174         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3175
3176         /* Default value; 4 EDCA QOS priorities */
3177         hw->queues = 4;
3178
3179         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3180
3181         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3182                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3183                         &priv->bands[IEEE80211_BAND_2GHZ];
3184         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3185                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3186                         &priv->bands[IEEE80211_BAND_5GHZ];
3187
3188         ret = ieee80211_register_hw(priv->hw);
3189         if (ret) {
3190                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3191                 return ret;
3192         }
3193         priv->mac80211_registered = 1;
3194
3195         return 0;
3196 }
3197
3198
3199 static int iwl_mac_start(struct ieee80211_hw *hw)
3200 {
3201         struct iwl_priv *priv = hw->priv;
3202         int ret;
3203
3204         IWL_DEBUG_MAC80211(priv, "enter\n");
3205
3206         /* we should be verifying the device is ready to be opened */
3207         mutex_lock(&priv->mutex);
3208         ret = __iwl_up(priv);
3209         mutex_unlock(&priv->mutex);
3210
3211         if (ret)
3212                 return ret;
3213
3214         if (iwl_is_rfkill(priv))
3215                 goto out;
3216
3217         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3218
3219         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3220          * mac80211 will not be run successfully. */
3221         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3222                         test_bit(STATUS_READY, &priv->status),
3223                         UCODE_READY_TIMEOUT);
3224         if (!ret) {
3225                 if (!test_bit(STATUS_READY, &priv->status)) {
3226                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3227                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3228                         return -ETIMEDOUT;
3229                 }
3230         }
3231
3232         iwl_led_start(priv);
3233
3234 out:
3235         priv->is_open = 1;
3236         IWL_DEBUG_MAC80211(priv, "leave\n");
3237         return 0;
3238 }
3239
3240 static void iwl_mac_stop(struct ieee80211_hw *hw)
3241 {
3242         struct iwl_priv *priv = hw->priv;
3243
3244         IWL_DEBUG_MAC80211(priv, "enter\n");
3245
3246         if (!priv->is_open)
3247                 return;
3248
3249         priv->is_open = 0;
3250
3251         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3252                 /* stop mac, cancel any scan request and clear
3253                  * RXON_FILTER_ASSOC_MSK BIT
3254                  */
3255                 mutex_lock(&priv->mutex);
3256                 iwl_scan_cancel_timeout(priv, 100);
3257                 mutex_unlock(&priv->mutex);
3258         }
3259
3260         iwl_down(priv);
3261
3262         flush_workqueue(priv->workqueue);
3263
3264         /* enable interrupts again in order to receive rfkill changes */
3265         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3266         iwl_enable_interrupts(priv);
3267
3268         IWL_DEBUG_MAC80211(priv, "leave\n");
3269 }
3270
3271 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3272 {
3273         struct iwl_priv *priv = hw->priv;
3274
3275         IWL_DEBUG_MACDUMP(priv, "enter\n");
3276
3277         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3278                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3279
3280         if (iwlagn_tx_skb(priv, skb))
3281                 dev_kfree_skb_any(skb);
3282
3283         IWL_DEBUG_MACDUMP(priv, "leave\n");
3284         return NETDEV_TX_OK;
3285 }
3286
3287 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3288 {
3289         int ret = 0;
3290
3291         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3292                 return;
3293
3294         /* The following should be done only at AP bring up */
3295         if (!iwl_is_associated(priv)) {
3296
3297                 /* RXON - unassoc (to set timing command) */
3298                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3299                 iwlcore_commit_rxon(priv);
3300
3301                 /* RXON Timing */
3302                 iwl_setup_rxon_timing(priv, vif);
3303                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3304                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
3305                 if (ret)
3306                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3307                                         "Attempting to continue.\n");
3308
3309                 /* AP has all antennas */
3310                 priv->chain_noise_data.active_chains =
3311                         priv->hw_params.valid_rx_ant;
3312                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3313                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3314                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3315
3316                 priv->staging_rxon.assoc_id = 0;
3317
3318                 if (vif->bss_conf.use_short_preamble)
3319                         priv->staging_rxon.flags |=
3320                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3321                 else
3322                         priv->staging_rxon.flags &=
3323                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3324
3325                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3326                         if (vif->bss_conf.use_short_slot)
3327                                 priv->staging_rxon.flags |=
3328                                         RXON_FLG_SHORT_SLOT_MSK;
3329                         else
3330                                 priv->staging_rxon.flags &=
3331                                         ~RXON_FLG_SHORT_SLOT_MSK;
3332                 }
3333                 /* restore RXON assoc */
3334                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3335                 iwlcore_commit_rxon(priv);
3336         }
3337         iwl_send_beacon_cmd(priv);
3338
3339         /* FIXME - we need to add code here to detect a totally new
3340          * configuration, reset the AP, unassoc, rxon timing, assoc,
3341          * clear sta table, add BCAST sta... */
3342 }
3343
3344 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3345                                     struct ieee80211_vif *vif,
3346                                     struct ieee80211_key_conf *keyconf,
3347                                     struct ieee80211_sta *sta,
3348                                     u32 iv32, u16 *phase1key)
3349 {
3350
3351         struct iwl_priv *priv = hw->priv;
3352         IWL_DEBUG_MAC80211(priv, "enter\n");
3353
3354         iwl_update_tkip_key(priv, keyconf, sta,
3355                             iv32, phase1key);
3356
3357         IWL_DEBUG_MAC80211(priv, "leave\n");
3358 }
3359
3360 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3361                            struct ieee80211_vif *vif,
3362                            struct ieee80211_sta *sta,
3363                            struct ieee80211_key_conf *key)
3364 {
3365         struct iwl_priv *priv = hw->priv;
3366         int ret;
3367         u8 sta_id;
3368         bool is_default_wep_key = false;
3369
3370         IWL_DEBUG_MAC80211(priv, "enter\n");
3371
3372         if (priv->cfg->mod_params->sw_crypto) {
3373                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3374                 return -EOPNOTSUPP;
3375         }
3376
3377         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3378         if (sta_id == IWL_INVALID_STATION)
3379                 return -EINVAL;
3380
3381         mutex_lock(&priv->mutex);
3382         iwl_scan_cancel_timeout(priv, 100);
3383
3384         /*
3385          * If we are getting WEP group key and we didn't receive any key mapping
3386          * so far, we are in legacy wep mode (group key only), otherwise we are
3387          * in 1X mode.
3388          * In legacy wep mode, we use another host command to the uCode.
3389          */
3390         if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) {
3391                 if (cmd == SET_KEY)
3392                         is_default_wep_key = !priv->key_mapping_key;
3393                 else
3394                         is_default_wep_key =
3395                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3396         }
3397
3398         switch (cmd) {
3399         case SET_KEY:
3400                 if (is_default_wep_key)
3401                         ret = iwl_set_default_wep_key(priv, key);
3402                 else
3403                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3404
3405                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3406                 break;
3407         case DISABLE_KEY:
3408                 if (is_default_wep_key)
3409                         ret = iwl_remove_default_wep_key(priv, key);
3410                 else
3411                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3412
3413                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3414                 break;
3415         default:
3416                 ret = -EINVAL;
3417         }
3418
3419         mutex_unlock(&priv->mutex);
3420         IWL_DEBUG_MAC80211(priv, "leave\n");
3421
3422         return ret;
3423 }
3424
3425 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3426                                 struct ieee80211_vif *vif,
3427                                 enum ieee80211_ampdu_mlme_action action,
3428                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3429 {
3430         struct iwl_priv *priv = hw->priv;
3431         int ret = -EINVAL;
3432
3433         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3434                      sta->addr, tid);
3435
3436         if (!(priv->cfg->sku & IWL_SKU_N))
3437                 return -EACCES;
3438
3439         mutex_lock(&priv->mutex);
3440
3441         switch (action) {
3442         case IEEE80211_AMPDU_RX_START:
3443                 IWL_DEBUG_HT(priv, "start Rx\n");
3444                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3445                 break;
3446         case IEEE80211_AMPDU_RX_STOP:
3447                 IWL_DEBUG_HT(priv, "stop Rx\n");
3448                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3449                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3450                         ret = 0;
3451                 break;
3452         case IEEE80211_AMPDU_TX_START:
3453                 IWL_DEBUG_HT(priv, "start Tx\n");
3454                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3455                 if (ret == 0) {
3456                         priv->_agn.agg_tids_count++;
3457                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3458                                      priv->_agn.agg_tids_count);
3459                 }
3460                 break;
3461         case IEEE80211_AMPDU_TX_STOP:
3462                 IWL_DEBUG_HT(priv, "stop Tx\n");
3463                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3464                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3465                         priv->_agn.agg_tids_count--;
3466                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3467                                      priv->_agn.agg_tids_count);
3468                 }
3469                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3470                         ret = 0;
3471                 if (priv->cfg->use_rts_for_aggregation) {
3472                         struct iwl_station_priv *sta_priv =
3473                                 (void *) sta->drv_priv;
3474                         /*
3475                          * switch off RTS/CTS if it was previously enabled
3476                          */
3477
3478                         sta_priv->lq_sta.lq.general_params.flags &=
3479                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3480                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3481                                 CMD_ASYNC, false);
3482                 }
3483                 break;
3484         case IEEE80211_AMPDU_TX_OPERATIONAL:
3485                 if (priv->cfg->use_rts_for_aggregation) {
3486                         struct iwl_station_priv *sta_priv =
3487                                 (void *) sta->drv_priv;
3488
3489                         /*
3490                          * switch to RTS/CTS if it is the prefer protection
3491                          * method for HT traffic
3492                          */
3493
3494                         sta_priv->lq_sta.lq.general_params.flags |=
3495                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3496                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3497                                 CMD_ASYNC, false);
3498                 }
3499                 ret = 0;
3500                 break;
3501         }
3502         mutex_unlock(&priv->mutex);
3503
3504         return ret;
3505 }
3506
3507 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3508                                struct ieee80211_vif *vif,
3509                                enum sta_notify_cmd cmd,
3510                                struct ieee80211_sta *sta)
3511 {
3512         struct iwl_priv *priv = hw->priv;
3513         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3514         int sta_id;
3515
3516         switch (cmd) {
3517         case STA_NOTIFY_SLEEP:
3518                 WARN_ON(!sta_priv->client);
3519                 sta_priv->asleep = true;
3520                 if (atomic_read(&sta_priv->pending_frames) > 0)
3521                         ieee80211_sta_block_awake(hw, sta, true);
3522                 break;
3523         case STA_NOTIFY_AWAKE:
3524                 WARN_ON(!sta_priv->client);
3525                 if (!sta_priv->asleep)
3526                         break;
3527                 sta_priv->asleep = false;
3528                 sta_id = iwl_sta_id(sta);
3529                 if (sta_id != IWL_INVALID_STATION)
3530                         iwl_sta_modify_ps_wake(priv, sta_id);
3531                 break;
3532         default:
3533                 break;
3534         }
3535 }
3536
3537 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3538                               struct ieee80211_vif *vif,
3539                               struct ieee80211_sta *sta)
3540 {
3541         struct iwl_priv *priv = hw->priv;
3542         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3543         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3544         int ret;
3545         u8 sta_id;
3546
3547         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3548                         sta->addr);
3549         mutex_lock(&priv->mutex);
3550         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3551                         sta->addr);
3552         sta_priv->common.sta_id = IWL_INVALID_STATION;
3553
3554         atomic_set(&sta_priv->pending_frames, 0);
3555         if (vif->type == NL80211_IFTYPE_AP)
3556                 sta_priv->client = true;
3557
3558         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3559                                      &sta_id);
3560         if (ret) {
3561                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3562                         sta->addr, ret);
3563                 /* Should we return success if return code is EEXIST ? */
3564                 mutex_unlock(&priv->mutex);
3565                 return ret;
3566         }
3567
3568         sta_priv->common.sta_id = sta_id;
3569
3570         /* Initialize rate scaling */
3571         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3572                        sta->addr);
3573         iwl_rs_rate_init(priv, sta, sta_id);
3574         mutex_unlock(&priv->mutex);
3575
3576         return 0;
3577 }
3578
3579 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3580                                    struct ieee80211_channel_switch *ch_switch)
3581 {
3582         struct iwl_priv *priv = hw->priv;
3583         const struct iwl_channel_info *ch_info;
3584         struct ieee80211_conf *conf = &hw->conf;
3585         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3586         u16 ch;
3587         unsigned long flags = 0;
3588
3589         IWL_DEBUG_MAC80211(priv, "enter\n");
3590
3591         if (iwl_is_rfkill(priv))
3592                 goto out_exit;
3593
3594         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3595             test_bit(STATUS_SCANNING, &priv->status))
3596                 goto out_exit;
3597
3598         if (!iwl_is_associated(priv))
3599                 goto out_exit;
3600
3601         /* channel switch in progress */
3602         if (priv->switch_rxon.switch_in_progress == true)
3603                 goto out_exit;
3604
3605         mutex_lock(&priv->mutex);
3606         if (priv->cfg->ops->lib->set_channel_switch) {
3607
3608                 ch = ieee80211_frequency_to_channel(
3609                         ch_switch->channel->center_freq);
3610                 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3611                         ch_info = iwl_get_channel_info(priv,
3612                                                        conf->channel->band,
3613                                                        ch);
3614                         if (!is_channel_valid(ch_info)) {
3615                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3616                                 goto out;
3617                         }
3618                         spin_lock_irqsave(&priv->lock, flags);
3619
3620                         priv->current_ht_config.smps = conf->smps_mode;
3621
3622                         /* Configure HT40 channels */
3623                         ht_conf->is_ht = conf_is_ht(conf);
3624                         if (ht_conf->is_ht) {
3625                                 if (conf_is_ht40_minus(conf)) {
3626                                         ht_conf->extension_chan_offset =
3627                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3628                                         ht_conf->is_40mhz = true;
3629                                 } else if (conf_is_ht40_plus(conf)) {
3630                                         ht_conf->extension_chan_offset =
3631                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3632                                         ht_conf->is_40mhz = true;
3633                                 } else {
3634                                         ht_conf->extension_chan_offset =
3635                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3636                                         ht_conf->is_40mhz = false;
3637                                 }
3638                         } else
3639                                 ht_conf->is_40mhz = false;
3640
3641                         /* if we are switching from ht to 2.4 clear flags
3642                          * from any ht related info since 2.4 does not
3643                          * support ht */
3644                         if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
3645                                 priv->staging_rxon.flags = 0;
3646
3647                         iwl_set_rxon_channel(priv, conf->channel);
3648                         iwl_set_rxon_ht(priv, ht_conf);
3649                         iwl_set_flags_for_band(priv, conf->channel->band,
3650                                                priv->vif);
3651                         spin_unlock_irqrestore(&priv->lock, flags);
3652
3653                         iwl_set_rate(priv);
3654                         /*
3655                          * at this point, staging_rxon has the
3656                          * configuration for channel switch
3657                          */
3658                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3659                                                                     ch_switch))
3660                                 priv->switch_rxon.switch_in_progress = false;
3661                 }
3662         }
3663 out:
3664         mutex_unlock(&priv->mutex);
3665 out_exit:
3666         if (!priv->switch_rxon.switch_in_progress)
3667                 ieee80211_chswitch_done(priv->vif, false);
3668         IWL_DEBUG_MAC80211(priv, "leave\n");
3669 }
3670
3671 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3672 {
3673         struct iwl_priv *priv = hw->priv;
3674
3675         mutex_lock(&priv->mutex);
3676         IWL_DEBUG_MAC80211(priv, "enter\n");
3677
3678         /* do not support "flush" */
3679         if (!priv->cfg->ops->lib->txfifo_flush)
3680                 goto done;
3681
3682         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3683                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3684                 goto done;
3685         }
3686         if (iwl_is_rfkill(priv)) {
3687                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3688                 goto done;
3689         }
3690
3691         /*
3692          * mac80211 will not push any more frames for transmit
3693          * until the flush is completed
3694          */
3695         if (drop) {
3696                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3697                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3698                         IWL_ERR(priv, "flush request fail\n");
3699                         goto done;
3700                 }
3701         }
3702         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3703         iwlagn_wait_tx_queue_empty(priv);
3704 done:
3705         mutex_unlock(&priv->mutex);
3706         IWL_DEBUG_MAC80211(priv, "leave\n");
3707 }
3708
3709 /*****************************************************************************
3710  *
3711  * driver setup and teardown
3712  *
3713  *****************************************************************************/
3714
3715 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3716 {
3717         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3718
3719         init_waitqueue_head(&priv->wait_command_queue);
3720
3721         INIT_WORK(&priv->restart, iwl_bg_restart);
3722         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3723         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3724         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3725         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3726         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3727         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3728
3729         iwl_setup_scan_deferred_work(priv);
3730
3731         if (priv->cfg->ops->lib->setup_deferred_work)
3732                 priv->cfg->ops->lib->setup_deferred_work(priv);
3733
3734         init_timer(&priv->statistics_periodic);
3735         priv->statistics_periodic.data = (unsigned long)priv;
3736         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3737
3738         init_timer(&priv->ucode_trace);
3739         priv->ucode_trace.data = (unsigned long)priv;
3740         priv->ucode_trace.function = iwl_bg_ucode_trace;
3741
3742         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3743                 init_timer(&priv->monitor_recover);
3744                 priv->monitor_recover.data = (unsigned long)priv;
3745                 priv->monitor_recover.function =
3746                         priv->cfg->ops->lib->recover_from_tx_stall;
3747         }
3748
3749         if (!priv->cfg->use_isr_legacy)
3750                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3751                         iwl_irq_tasklet, (unsigned long)priv);
3752         else
3753                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3754                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3755 }
3756
3757 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3758 {
3759         if (priv->cfg->ops->lib->cancel_deferred_work)
3760                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3761
3762         cancel_delayed_work_sync(&priv->init_alive_start);
3763         cancel_delayed_work(&priv->scan_check);
3764         cancel_work_sync(&priv->start_internal_scan);
3765         cancel_delayed_work(&priv->alive_start);
3766         cancel_work_sync(&priv->run_time_calib_work);
3767         cancel_work_sync(&priv->beacon_update);
3768         del_timer_sync(&priv->statistics_periodic);
3769         del_timer_sync(&priv->ucode_trace);
3770         if (priv->cfg->ops->lib->recover_from_tx_stall)
3771                 del_timer_sync(&priv->monitor_recover);
3772 }
3773
3774 static void iwl_init_hw_rates(struct iwl_priv *priv,
3775                               struct ieee80211_rate *rates)
3776 {
3777         int i;
3778
3779         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3780                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3781                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3782                 rates[i].hw_value_short = i;
3783                 rates[i].flags = 0;
3784                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3785                         /*
3786                          * If CCK != 1M then set short preamble rate flag.
3787                          */
3788                         rates[i].flags |=
3789                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3790                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3791                 }
3792         }
3793 }
3794
3795 static int iwl_init_drv(struct iwl_priv *priv)
3796 {
3797         int ret;
3798
3799         priv->ibss_beacon = NULL;
3800
3801         spin_lock_init(&priv->sta_lock);
3802         spin_lock_init(&priv->hcmd_lock);
3803
3804         INIT_LIST_HEAD(&priv->free_frames);
3805
3806         mutex_init(&priv->mutex);
3807         mutex_init(&priv->sync_cmd_mutex);
3808
3809         priv->ieee_channels = NULL;
3810         priv->ieee_rates = NULL;
3811         priv->band = IEEE80211_BAND_2GHZ;
3812
3813         priv->iw_mode = NL80211_IFTYPE_STATION;
3814         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3815         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3816         priv->_agn.agg_tids_count = 0;
3817
3818         /* initialize force reset */
3819         priv->force_reset[IWL_RF_RESET].reset_duration =
3820                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3821         priv->force_reset[IWL_FW_RESET].reset_duration =
3822                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3823
3824         /* Choose which receivers/antennas to use */
3825         if (priv->cfg->ops->hcmd->set_rxon_chain)
3826                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3827
3828         iwl_init_scan_params(priv);
3829
3830         /* Set the tx_power_user_lmt to the lowest power level
3831          * this value will get overwritten by channel max power avg
3832          * from eeprom */
3833         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3834
3835         ret = iwl_init_channel_map(priv);
3836         if (ret) {
3837                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3838                 goto err;
3839         }
3840
3841         ret = iwlcore_init_geos(priv);
3842         if (ret) {
3843                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3844                 goto err_free_channel_map;
3845         }
3846         iwl_init_hw_rates(priv, priv->ieee_rates);
3847
3848         return 0;
3849
3850 err_free_channel_map:
3851         iwl_free_channel_map(priv);
3852 err:
3853         return ret;
3854 }
3855
3856 static void iwl_uninit_drv(struct iwl_priv *priv)
3857 {
3858         iwl_calib_free_results(priv);
3859         iwlcore_free_geos(priv);
3860         iwl_free_channel_map(priv);
3861         kfree(priv->scan_cmd);
3862 }
3863
3864 static struct ieee80211_ops iwl_hw_ops = {
3865         .tx = iwl_mac_tx,
3866         .start = iwl_mac_start,
3867         .stop = iwl_mac_stop,
3868         .add_interface = iwl_mac_add_interface,
3869         .remove_interface = iwl_mac_remove_interface,
3870         .config = iwl_mac_config,
3871         .configure_filter = iwl_configure_filter,
3872         .set_key = iwl_mac_set_key,
3873         .update_tkip_key = iwl_mac_update_tkip_key,
3874         .conf_tx = iwl_mac_conf_tx,
3875         .reset_tsf = iwl_mac_reset_tsf,
3876         .bss_info_changed = iwl_bss_info_changed,
3877         .ampdu_action = iwl_mac_ampdu_action,
3878         .hw_scan = iwl_mac_hw_scan,
3879         .sta_notify = iwl_mac_sta_notify,
3880         .sta_add = iwlagn_mac_sta_add,
3881         .sta_remove = iwl_mac_sta_remove,
3882         .channel_switch = iwl_mac_channel_switch,
3883         .flush = iwl_mac_flush,
3884 };
3885
3886 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3887 {
3888         int err = 0;
3889         struct iwl_priv *priv;
3890         struct ieee80211_hw *hw;
3891         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3892         unsigned long flags;
3893         u16 pci_cmd, num_mac;
3894
3895         /************************
3896          * 1. Allocating HW data
3897          ************************/
3898
3899         /* Disabling hardware scan means that mac80211 will perform scans
3900          * "the hard way", rather than using device's scan. */
3901         if (cfg->mod_params->disable_hw_scan) {
3902                 if (iwl_debug_level & IWL_DL_INFO)
3903                         dev_printk(KERN_DEBUG, &(pdev->dev),
3904                                    "Disabling hw_scan\n");
3905                 iwl_hw_ops.hw_scan = NULL;
3906         }
3907
3908         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3909         if (!hw) {
3910                 err = -ENOMEM;
3911                 goto out;
3912         }
3913         priv = hw->priv;
3914         /* At this point both hw and priv are allocated. */
3915
3916         SET_IEEE80211_DEV(hw, &pdev->dev);
3917
3918         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3919         priv->cfg = cfg;
3920         priv->pci_dev = pdev;
3921         priv->inta_mask = CSR_INI_SET_MASK;
3922
3923         if (iwl_alloc_traffic_mem(priv))
3924                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3925
3926         /**************************
3927          * 2. Initializing PCI bus
3928          **************************/
3929         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3930                                 PCIE_LINK_STATE_CLKPM);
3931
3932         if (pci_enable_device(pdev)) {
3933                 err = -ENODEV;
3934                 goto out_ieee80211_free_hw;
3935         }
3936
3937         pci_set_master(pdev);
3938
3939         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3940         if (!err)
3941                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3942         if (err) {
3943                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3944                 if (!err)
3945                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3946                 /* both attempts failed: */
3947                 if (err) {
3948                         IWL_WARN(priv, "No suitable DMA available.\n");
3949                         goto out_pci_disable_device;
3950                 }
3951         }
3952
3953         err = pci_request_regions(pdev, DRV_NAME);
3954         if (err)
3955                 goto out_pci_disable_device;
3956
3957         pci_set_drvdata(pdev, priv);
3958
3959
3960         /***********************
3961          * 3. Read REV register
3962          ***********************/
3963         priv->hw_base = pci_iomap(pdev, 0, 0);
3964         if (!priv->hw_base) {
3965                 err = -ENODEV;
3966                 goto out_pci_release_regions;
3967         }
3968
3969         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3970                 (unsigned long long) pci_resource_len(pdev, 0));
3971         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3972
3973         /* these spin locks will be used in apm_ops.init and EEPROM access
3974          * we should init now
3975          */
3976         spin_lock_init(&priv->reg_lock);
3977         spin_lock_init(&priv->lock);
3978
3979         /*
3980          * stop and reset the on-board processor just in case it is in a
3981          * strange state ... like being left stranded by a primary kernel
3982          * and this is now the kdump kernel trying to start up
3983          */
3984         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3985
3986         iwl_hw_detect(priv);
3987         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3988                 priv->cfg->name, priv->hw_rev);
3989
3990         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3991          * PCI Tx retries from interfering with C3 CPU state */
3992         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3993
3994         iwl_prepare_card_hw(priv);
3995         if (!priv->hw_ready) {
3996                 IWL_WARN(priv, "Failed, HW not ready\n");
3997                 goto out_iounmap;
3998         }
3999
4000         /*****************
4001          * 4. Read EEPROM
4002          *****************/
4003         /* Read the EEPROM */
4004         err = iwl_eeprom_init(priv);
4005         if (err) {
4006                 IWL_ERR(priv, "Unable to init EEPROM\n");
4007                 goto out_iounmap;
4008         }
4009         err = iwl_eeprom_check_version(priv);
4010         if (err)
4011                 goto out_free_eeprom;
4012
4013         /* extract MAC Address */
4014         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4015         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4016         priv->hw->wiphy->addresses = priv->addresses;
4017         priv->hw->wiphy->n_addresses = 1;
4018         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4019         if (num_mac > 1) {
4020                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4021                        ETH_ALEN);
4022                 priv->addresses[1].addr[5]++;
4023                 priv->hw->wiphy->n_addresses++;
4024         }
4025
4026         /************************
4027          * 5. Setup HW constants
4028          ************************/
4029         if (iwl_set_hw_params(priv)) {
4030                 IWL_ERR(priv, "failed to set hw parameters\n");
4031                 goto out_free_eeprom;
4032         }
4033
4034         /*******************
4035          * 6. Setup priv
4036          *******************/
4037
4038         err = iwl_init_drv(priv);
4039         if (err)
4040                 goto out_free_eeprom;
4041         /* At this point both hw and priv are initialized. */
4042
4043         /********************
4044          * 7. Setup services
4045          ********************/
4046         spin_lock_irqsave(&priv->lock, flags);
4047         iwl_disable_interrupts(priv);
4048         spin_unlock_irqrestore(&priv->lock, flags);
4049
4050         pci_enable_msi(priv->pci_dev);
4051
4052         iwl_alloc_isr_ict(priv);
4053         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4054                           IRQF_SHARED, DRV_NAME, priv);
4055         if (err) {
4056                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4057                 goto out_disable_msi;
4058         }
4059
4060         iwl_setup_deferred_work(priv);
4061         iwl_setup_rx_handlers(priv);
4062
4063         /*********************************************
4064          * 8. Enable interrupts and read RFKILL state
4065          *********************************************/
4066
4067         /* enable interrupts if needed: hw bug w/a */
4068         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4069         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4070                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4071                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4072         }
4073
4074         iwl_enable_interrupts(priv);
4075
4076         /* If platform's RF_KILL switch is NOT set to KILL */
4077         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4078                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4079         else
4080                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4081
4082         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4083                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4084
4085         iwl_power_initialize(priv);
4086         iwl_tt_initialize(priv);
4087
4088         init_completion(&priv->_agn.firmware_loading_complete);
4089
4090         err = iwl_request_firmware(priv, true);
4091         if (err)
4092                 goto out_destroy_workqueue;
4093
4094         return 0;
4095
4096  out_destroy_workqueue:
4097         destroy_workqueue(priv->workqueue);
4098         priv->workqueue = NULL;
4099         free_irq(priv->pci_dev->irq, priv);
4100         iwl_free_isr_ict(priv);
4101  out_disable_msi:
4102         pci_disable_msi(priv->pci_dev);
4103         iwl_uninit_drv(priv);
4104  out_free_eeprom:
4105         iwl_eeprom_free(priv);
4106  out_iounmap:
4107         pci_iounmap(pdev, priv->hw_base);
4108  out_pci_release_regions:
4109         pci_set_drvdata(pdev, NULL);
4110         pci_release_regions(pdev);
4111  out_pci_disable_device:
4112         pci_disable_device(pdev);
4113  out_ieee80211_free_hw:
4114         iwl_free_traffic_mem(priv);
4115         ieee80211_free_hw(priv->hw);
4116  out:
4117         return err;
4118 }
4119
4120 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4121 {
4122         struct iwl_priv *priv = pci_get_drvdata(pdev);
4123         unsigned long flags;
4124
4125         if (!priv)
4126                 return;
4127
4128         wait_for_completion(&priv->_agn.firmware_loading_complete);
4129
4130         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4131
4132         iwl_dbgfs_unregister(priv);
4133         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4134
4135         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4136          * to be called and iwl_down since we are removing the device
4137          * we need to set STATUS_EXIT_PENDING bit.
4138          */
4139         set_bit(STATUS_EXIT_PENDING, &priv->status);
4140         if (priv->mac80211_registered) {
4141                 ieee80211_unregister_hw(priv->hw);
4142                 priv->mac80211_registered = 0;
4143         } else {
4144                 iwl_down(priv);
4145         }
4146
4147         /*
4148          * Make sure device is reset to low power before unloading driver.
4149          * This may be redundant with iwl_down(), but there are paths to
4150          * run iwl_down() without calling apm_ops.stop(), and there are
4151          * paths to avoid running iwl_down() at all before leaving driver.
4152          * This (inexpensive) call *makes sure* device is reset.
4153          */
4154         priv->cfg->ops->lib->apm_ops.stop(priv);
4155
4156         iwl_tt_exit(priv);
4157
4158         /* make sure we flush any pending irq or
4159          * tasklet for the driver
4160          */
4161         spin_lock_irqsave(&priv->lock, flags);
4162         iwl_disable_interrupts(priv);
4163         spin_unlock_irqrestore(&priv->lock, flags);
4164
4165         iwl_synchronize_irq(priv);
4166
4167         iwl_dealloc_ucode_pci(priv);
4168
4169         if (priv->rxq.bd)
4170                 iwlagn_rx_queue_free(priv, &priv->rxq);
4171         iwlagn_hw_txq_ctx_free(priv);
4172
4173         iwl_eeprom_free(priv);
4174
4175
4176         /*netif_stop_queue(dev); */
4177         flush_workqueue(priv->workqueue);
4178
4179         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4180          * priv->workqueue... so we can't take down the workqueue
4181          * until now... */
4182         destroy_workqueue(priv->workqueue);
4183         priv->workqueue = NULL;
4184         iwl_free_traffic_mem(priv);
4185
4186         free_irq(priv->pci_dev->irq, priv);
4187         pci_disable_msi(priv->pci_dev);
4188         pci_iounmap(pdev, priv->hw_base);
4189         pci_release_regions(pdev);
4190         pci_disable_device(pdev);
4191         pci_set_drvdata(pdev, NULL);
4192
4193         iwl_uninit_drv(priv);
4194
4195         iwl_free_isr_ict(priv);
4196
4197         if (priv->ibss_beacon)
4198                 dev_kfree_skb(priv->ibss_beacon);
4199
4200         ieee80211_free_hw(priv->hw);
4201 }
4202
4203
4204 /*****************************************************************************
4205  *
4206  * driver and module entry point
4207  *
4208  *****************************************************************************/
4209
4210 /* Hardware specific file defines the PCI IDs table for that hardware module */
4211 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4212 #ifdef CONFIG_IWL4965
4213         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4214         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4215 #endif /* CONFIG_IWL4965 */
4216 #ifdef CONFIG_IWL5000
4217 /* 5100 Series WiFi */
4218         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4219         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4220         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4221         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4222         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4223         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4224         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4225         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4226         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4227         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4228         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4229         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4230         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4231         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4232         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4233         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4234         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4235         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4236         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4237         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4238         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4239         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4240         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4241         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4242
4243 /* 5300 Series WiFi */
4244         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4245         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4246         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4247         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4248         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4249         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4250         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4251         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4252         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4253         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4254         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4255         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4256
4257 /* 5350 Series WiFi/WiMax */
4258         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4259         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4260         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4261
4262 /* 5150 Series Wifi/WiMax */
4263         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4264         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4265         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4266         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4267         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4268         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4269
4270         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4271         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4272         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4273         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4274
4275 /* 6x00 Series */
4276         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4277         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4278         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4279         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4280         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4281         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4282         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4283         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4284         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4285         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4286
4287 /* 6x00 Series Gen2a */
4288         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4289         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4290         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4291         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4292         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4293         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4294         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4295         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4296         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4297         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4298         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4299         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4300         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4301         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4302
4303 /* 6x00 Series Gen2b */
4304         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4305         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4306         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4307         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4308         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4309         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4310         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4311         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4312         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4313         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4314         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4315         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4316         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4317         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4318         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4319         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4320         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4321         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4322         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4323         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4324         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4325         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4326         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4327         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4328         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4329         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4330         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4331         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4332
4333 /* 6x50 WiFi/WiMax Series */
4334         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4335         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4336         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4337         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4338         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4339         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4340
4341 /* 6x50 WiFi/WiMax Series Gen2 */
4342         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4343         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4344         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4345         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4346         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4347         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4348
4349 /* 1000 Series WiFi */
4350         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4351         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4352         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4353         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4354         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4355         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4356         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4357         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4358         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4359         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4360         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4361         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4362 #endif /* CONFIG_IWL5000 */
4363
4364         {0}
4365 };
4366 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4367
4368 static struct pci_driver iwl_driver = {
4369         .name = DRV_NAME,
4370         .id_table = iwl_hw_card_ids,
4371         .probe = iwl_pci_probe,
4372         .remove = __devexit_p(iwl_pci_remove),
4373 #ifdef CONFIG_PM
4374         .suspend = iwl_pci_suspend,
4375         .resume = iwl_pci_resume,
4376 #endif
4377 };
4378
4379 static int __init iwl_init(void)
4380 {
4381
4382         int ret;
4383         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4384         pr_info(DRV_COPYRIGHT "\n");
4385
4386         ret = iwlagn_rate_control_register();
4387         if (ret) {
4388                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4389                 return ret;
4390         }
4391
4392         ret = pci_register_driver(&iwl_driver);
4393         if (ret) {
4394                 pr_err("Unable to initialize PCI module\n");
4395                 goto error_register;
4396         }
4397
4398         return ret;
4399
4400 error_register:
4401         iwlagn_rate_control_unregister();
4402         return ret;
4403 }
4404
4405 static void __exit iwl_exit(void)
4406 {
4407         pci_unregister_driver(&iwl_driver);
4408         iwlagn_rate_control_unregister();
4409 }
4410
4411 module_exit(iwl_exit);
4412 module_init(iwl_init);
4413
4414 #ifdef CONFIG_IWLWIFI_DEBUG
4415 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4416 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4417 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4418 MODULE_PARM_DESC(debug, "debug output mask");
4419 #endif
4420
4421 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4422 MODULE_PARM_DESC(swcrypto50,
4423                  "using crypto in software (default 0 [hardware]) (deprecated)");
4424 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4425 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4426 module_param_named(queues_num50,
4427                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4428 MODULE_PARM_DESC(queues_num50,
4429                  "number of hw queues in 50xx series (deprecated)");
4430 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4431 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4432 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4433 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4434 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4435 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4436 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4437                    int, S_IRUGO);
4438 MODULE_PARM_DESC(amsdu_size_8K50,
4439                  "enable 8K amsdu size in 50XX series (deprecated)");
4440 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4441                    int, S_IRUGO);
4442 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4443 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4444 MODULE_PARM_DESC(fw_restart50,
4445                  "restart firmware in case of error (deprecated)");
4446 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4447 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4448 module_param_named(
4449         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4450 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4451
4452 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4453                    S_IRUGO);
4454 MODULE_PARM_DESC(ucode_alternative,
4455                  "specify ucode alternative to use from ucode file");