drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/pci.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/delay.h>
  36 #include <linux/sched.h>
  37 #include <linux/skbuff.h>
  38 #include <linux/netdevice.h>
  39 #include <linux/wireless.h>
  40 #include <linux/firmware.h>
  41 #include <linux/etherdevice.h>
  42 #include <linux/if_arp.h>
  43
  44 #include <net/mac80211.h>
  45
  46 #include <asm/div64.h>
  47
  48 #define DRV_NAME        "iwlagn"
  49
  50 #include "iwl-eeprom.h"
  51 #include "iwl-dev.h"
  52 #include "iwl-core.h"
  53 #include "iwl-io.h"
  54 #include "iwl-helpers.h"
  55 #include "iwl-sta.h"
  56 #include "iwl-calib.h"
  57 #include "iwl-agn.h"
  58
  59
  60 /******************************************************************************
  61  *
  62  * module boiler plate
  63  *
  64  ******************************************************************************/
  65
  66 /*
  67  * module name, copyright, version, etc.
  68  */
  69 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  70
  71 #ifdef CONFIG_IWLWIFI_DEBUG
  72 #define VD "d"
  73 #else
  74 #define VD
  75 #endif
  76
  77 #define DRV_VERSION     IWLWIFI_VERSION VD
  78
  79
  80 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  81 MODULE_VERSION(DRV_VERSION);
  82 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  83 MODULE_LICENSE("GPL");
  84 MODULE_ALIAS("iwl4965");
  85
  86 /**
  87  * iwl_commit_rxon - commit staging_rxon to hardware
  88  *
  89  * The RXON command in staging_rxon is committed to the hardware and
  90  * the active_rxon structure is updated with the new data.  This
  91  * function correctly transitions out of the RXON_ASSOC_MSK state if
  92  * a HW tune is required based on the RXON structure changes.
  93  */
  94 int iwl_commit_rxon(struct iwl_priv *priv)
  95 {
  96         /* cast away the const for active_rxon in this function */
  97         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  98         int ret;
  99         bool new_assoc =
 100                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 101
 102         if (!iwl_is_alive(priv))
 103                 return -EBUSY;
 104
 105         /* always get timestamp with Rx frame */
 106         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 107
 108         ret = iwl_check_rxon_cmd(priv);
 109         if (ret) {
 110                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 111                 return -EINVAL;
 112         }
 113
 114         /*
 115          * receive commit_rxon request
 116          * abort any previous channel switch if still in process
 117          */
 118         if (priv->switch_rxon.switch_in_progress &&
 119             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 120                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 121                       le16_to_cpu(priv->switch_rxon.channel));
 122                 priv->switch_rxon.switch_in_progress = false;
 123         }
 124
 125         /* If we don't need to send a full RXON, we can use
 126          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 127          * and other flags for the current radio configuration. */
 128         if (!iwl_full_rxon_required(priv)) {
 129                 ret = iwl_send_rxon_assoc(priv);
 130                 if (ret) {
 131                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 132                         return ret;
 133                 }
 134
 135                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 136                 iwl_print_rx_config_cmd(priv);
 137                 return 0;
 138         }
 139
 140         /* If we are currently associated and the new config requires
 141          * an RXON_ASSOC and the new config wants the associated mask enabled,
 142          * we must clear the associated from the active configuration
 143          * before we apply the new config */
 144         if (iwl_is_associated(priv) && new_assoc) {
 145                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 146                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 147
 148                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 149                                       sizeof(struct iwl_rxon_cmd),
 150                                       &priv->active_rxon);
 151
 152                 /* If the mask clearing failed then we set
 153                  * active_rxon back to what it was previously */
 154                 if (ret) {
 155                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 156                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 157                         return ret;
 158                 }
 159                 iwl_clear_ucode_stations(priv, false);
 160                 iwl_restore_stations(priv);
 161                 ret = iwl_restore_default_wep_keys(priv);
 162                 if (ret) {
 163                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 164                         return ret;
 165                 }
 166         }
 167
 168         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 169                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 170                        "* channel = %d\n"
 171                        "* bssid = %pM\n",
 172                        (new_assoc ? "" : "out"),
 173                        le16_to_cpu(priv->staging_rxon.channel),
 174                        priv->staging_rxon.bssid_addr);
 175
 176         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 177
 178         /* Apply the new configuration
 179          * RXON unassoc clears the station table in uCode so restoration of
 180          * stations is needed after it (the RXON command) completes
 181          */
 182         if (!new_assoc) {
 183                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 184                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 185                 if (ret) {
 186                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 187                         return ret;
 188                 }
 189                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 190                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 191                 iwl_clear_ucode_stations(priv, false);
 192                 iwl_restore_stations(priv);
 193                 ret = iwl_restore_default_wep_keys(priv);
 194                 if (ret) {
 195                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 196                         return ret;
 197                 }
 198         }
 199
 200         priv->start_calib = 0;
 201         if (new_assoc) {
 202                 /*
 203                  * allow CTS-to-self if possible for new association.
 204                  * this is relevant only for 5000 series and up,
 205                  * but will not damage 4965
 206                  */
 207                 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
 208
 209                 /* Apply the new configuration
 210                  * RXON assoc doesn't clear the station table in uCode,
 211                  */
 212                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 213                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 214                 if (ret) {
 215                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 216                         return ret;
 217                 }
 218                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 219         }
 220         iwl_print_rx_config_cmd(priv);
 221
 222         iwl_init_sensitivity(priv);
 223
 224         /* If we issue a new RXON command which required a tune then we must
 225          * send a new TXPOWER command or we won't be able to Tx any frames */
 226         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 227         if (ret) {
 228                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 229                 return ret;
 230         }
 231
 232         return 0;
 233 }
 234
 235 void iwl_update_chain_flags(struct iwl_priv *priv)
 236 {
 237
 238         if (priv->cfg->ops->hcmd->set_rxon_chain)
 239                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 240         iwlcore_commit_rxon(priv);
 241 }
 242
 243 static void iwl_clear_free_frames(struct iwl_priv *priv)
 244 {
 245         struct list_head *element;
 246
 247         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 248                        priv->frames_count);
 249
 250         while (!list_empty(&priv->free_frames)) {
 251                 element = priv->free_frames.next;
 252                 list_del(element);
 253                 kfree(list_entry(element, struct iwl_frame, list));
 254                 priv->frames_count--;
 255         }
 256
 257         if (priv->frames_count) {
 258                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 259                             priv->frames_count);
 260                 priv->frames_count = 0;
 261         }
 262 }
 263
 264 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 265 {
 266         struct iwl_frame *frame;
 267         struct list_head *element;
 268         if (list_empty(&priv->free_frames)) {
 269                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 270                 if (!frame) {
 271                         IWL_ERR(priv, "Could not allocate frame!\n");
 272                         return NULL;
 273                 }
 274
 275                 priv->frames_count++;
 276                 return frame;
 277         }
 278
 279         element = priv->free_frames.next;
 280         list_del(element);
 281         return list_entry(element, struct iwl_frame, list);
 282 }
 283
 284 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 285 {
 286         memset(frame, 0, sizeof(*frame));
 287         list_add(&frame->list, &priv->free_frames);
 288 }
 289
 290 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 291                                           struct ieee80211_hdr *hdr,
 292                                           int left)
 293 {
 294         if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
 295             ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
 296              (priv->iw_mode != NL80211_IFTYPE_AP)))
 297                 return 0;
 298
 299         if (priv->ibss_beacon->len > left)
 300                 return 0;
 301
 302         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 303
 304         return priv->ibss_beacon->len;
 305 }
 306
 307 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 308 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 309                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 310                 u8 *beacon, u32 frame_size)
 311 {
 312         u16 tim_idx;
 313         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 314
 315         /*
 316          * The index is relative to frame start but we start looking at the
 317          * variable-length part of the beacon.
 318          */
 319         tim_idx = mgmt->u.beacon.variable - beacon;
 320
 321         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 322         while ((tim_idx < (frame_size - 2)) &&
 323                         (beacon[tim_idx] != WLAN_EID_TIM))
 324                 tim_idx += beacon[tim_idx+1] + 2;
 325
 326         /* If TIM field was found, set variables */
 327         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 328                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 329                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 330         } else
 331                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 332 }
 333
 334 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 335                                        struct iwl_frame *frame)
 336 {
 337         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 338         u32 frame_size;
 339         u32 rate_flags;
 340         u32 rate;
 341         /*
 342          * We have to set up the TX command, the TX Beacon command, and the
 343          * beacon contents.
 344          */
 345
 346         /* Initialize memory */
 347         tx_beacon_cmd = &frame->u.beacon;
 348         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 349
 350         /* Set up TX beacon contents */
 351         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 352                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 353         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 354                 return 0;
 355
 356         /* Set up TX command fields */
 357         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 358         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 359         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 360         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 361                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 362
 363         /* Set up TX beacon command fields */
 364         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 365                         frame_size);
 366
 367         /* Set up packet rate and flags */
 368         rate = iwl_rate_get_lowest_plcp(priv);
 369         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
 370         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 371         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 372                 rate_flags |= RATE_MCS_CCK_MSK;
 373         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 374                         rate_flags);
 375
 376         return sizeof(*tx_beacon_cmd) + frame_size;
 377 }
 378 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 379 {
 380         struct iwl_frame *frame;
 381         unsigned int frame_size;
 382         int rc;
 383
 384         frame = iwl_get_free_frame(priv);
 385         if (!frame) {
 386                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 387                           "command.\n");
 388                 return -ENOMEM;
 389         }
 390
 391         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 392         if (!frame_size) {
 393                 IWL_ERR(priv, "Error configuring the beacon command\n");
 394                 iwl_free_frame(priv, frame);
 395                 return -EINVAL;
 396         }
 397
 398         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 399                               &frame->u.cmd[0]);
 400
 401         iwl_free_frame(priv, frame);
 402
 403         return rc;
 404 }
 405
 406 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 407 {
 408         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 409
 410         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 411         if (sizeof(dma_addr_t) > sizeof(u32))
 412                 addr |=
 413                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 414
 415         return addr;
 416 }
 417
 418 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 419 {
 420         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 421
 422         return le16_to_cpu(tb->hi_n_len) >> 4;
 423 }
 424
 425 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 426                                   dma_addr_t addr, u16 len)
 427 {
 428         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 429         u16 hi_n_len = len << 4;
 430
 431         put_unaligned_le32(addr, &tb->lo);
 432         if (sizeof(dma_addr_t) > sizeof(u32))
 433                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 434
 435         tb->hi_n_len = cpu_to_le16(hi_n_len);
 436
 437         tfd->num_tbs = idx + 1;
 438 }
 439
 440 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 441 {
 442         return tfd->num_tbs & 0x1f;
 443 }
 444
 445 /**
 446  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 447  * @priv - driver private data
 448  * @txq - tx queue
 449  *
 450  * Does NOT advance any TFD circular buffer read/write indexes
 451  * Does NOT free the TFD itself (which is within circular buffer)
 452  */
 453 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 454 {
 455         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 456         struct iwl_tfd *tfd;
 457         struct pci_dev *dev = priv->pci_dev;
 458         int index = txq->q.read_ptr;
 459         int i;
 460         int num_tbs;
 461
 462         tfd = &tfd_tmp[index];
 463
 464         /* Sanity check on number of chunks */
 465         num_tbs = iwl_tfd_get_num_tbs(tfd);
 466
 467         if (num_tbs >= IWL_NUM_OF_TBS) {
 468                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 469                 /* @todo issue fatal error, it is quite serious situation */
 470                 return;
 471         }
 472
 473         /* Unmap tx_cmd */
 474         if (num_tbs)
 475                 pci_unmap_single(dev,
 476                                 pci_unmap_addr(&txq->meta[index], mapping),
 477                                 pci_unmap_len(&txq->meta[index], len),
 478                                 PCI_DMA_BIDIRECTIONAL);
 479
 480         /* Unmap chunks, if any. */
 481         for (i = 1; i < num_tbs; i++) {
 482                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 483                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 484
 485                 if (txq->txb) {
 486                         dev_kfree_skb(txq->txb[txq->q.read_ptr].skb[i - 1]);
 487                         txq->txb[txq->q.read_ptr].skb[i - 1] = NULL;
 488                 }
 489         }
 490 }
 491
 492 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 493                                  struct iwl_tx_queue *txq,
 494                                  dma_addr_t addr, u16 len,
 495                                  u8 reset, u8 pad)
 496 {
 497         struct iwl_queue *q;
 498         struct iwl_tfd *tfd, *tfd_tmp;
 499         u32 num_tbs;
 500
 501         q = &txq->q;
 502         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 503         tfd = &tfd_tmp[q->write_ptr];
 504
 505         if (reset)
 506                 memset(tfd, 0, sizeof(*tfd));
 507
 508         num_tbs = iwl_tfd_get_num_tbs(tfd);
 509
 510         /* Each TFD can point to a maximum 20 Tx buffers */
 511         if (num_tbs >= IWL_NUM_OF_TBS) {
 512                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 513                           IWL_NUM_OF_TBS);
 514                 return -EINVAL;
 515         }
 516
 517         BUG_ON(addr & ~DMA_BIT_MASK(36));
 518         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 519                 IWL_ERR(priv, "Unaligned address = %llx\n",
 520                           (unsigned long long)addr);
 521
 522         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 523
 524         return 0;
 525 }
 526
 527 /*
 528  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 529  * given Tx queue, and enable the DMA channel used for that queue.
 530  *
 531  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 532  * channels supported in hardware.
 533  */
 534 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 535                          struct iwl_tx_queue *txq)
 536 {
 537         int txq_id = txq->q.id;
 538
 539         /* Circular buffer (TFD queue in DRAM) physical base address */
 540         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 541                              txq->q.dma_addr >> 8);
 542
 543         return 0;
 544 }
 545
 546 /******************************************************************************
 547  *
 548  * Generic RX handler implementations
 549  *
 550  ******************************************************************************/
 551 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 552                                 struct iwl_rx_mem_buffer *rxb)
 553 {
 554         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 555         struct iwl_alive_resp *palive;
 556         struct delayed_work *pwork;
 557
 558         palive = &pkt->u.alive_frame;
 559
 560         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 561                        "0x%01X 0x%01X\n",
 562                        palive->is_valid, palive->ver_type,
 563                        palive->ver_subtype);
 564
 565         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 566                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 567                 memcpy(&priv->card_alive_init,
 568                        &pkt->u.alive_frame,
 569                        sizeof(struct iwl_init_alive_resp));
 570                 pwork = &priv->init_alive_start;
 571         } else {
 572                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 573                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 574                        sizeof(struct iwl_alive_resp));
 575                 pwork = &priv->alive_start;
 576         }
 577
 578         /* We delay the ALIVE response by 5ms to
 579          * give the HW RF Kill time to activate... */
 580         if (palive->is_valid == UCODE_VALID_OK)
 581                 queue_delayed_work(priv->workqueue, pwork,
 582                                    msecs_to_jiffies(5));
 583         else
 584                 IWL_WARN(priv, "uCode did not respond OK.\n");
 585 }
 586
 587 static void iwl_bg_beacon_update(struct work_struct *work)
 588 {
 589         struct iwl_priv *priv =
 590                 container_of(work, struct iwl_priv, beacon_update);
 591         struct sk_buff *beacon;
 592
 593         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 594         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 595
 596         if (!beacon) {
 597                 IWL_ERR(priv, "update beacon failed\n");
 598                 return;
 599         }
 600
 601         mutex_lock(&priv->mutex);
 602         /* new beacon skb is allocated every time; dispose previous.*/
 603         if (priv->ibss_beacon)
 604                 dev_kfree_skb(priv->ibss_beacon);
 605
 606         priv->ibss_beacon = beacon;
 607         mutex_unlock(&priv->mutex);
 608
 609         iwl_send_beacon_cmd(priv);
 610 }
 611
 612 /**
 613  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 614  *
 615  * This callback is provided in order to send a statistics request.
 616  *
 617  * This timer function is continually reset to execute within
 618  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 619  * was received.  We need to ensure we receive the statistics in order
 620  * to update the temperature used for calibrating the TXPOWER.
 621  */
 622 static void iwl_bg_statistics_periodic(unsigned long data)
 623 {
 624         struct iwl_priv *priv = (struct iwl_priv *)data;
 625
 626         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 627                 return;
 628
 629         /* dont send host command if rf-kill is on */
 630         if (!iwl_is_ready_rf(priv))
 631                 return;
 632
 633         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 634 }
 635
 636
 637 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 638                                         u32 start_idx, u32 num_events,
 639                                         u32 mode)
 640 {
 641         u32 i;
 642         u32 ptr;        /* SRAM byte address of log data */
 643         u32 ev, time, data; /* event log data */
 644         unsigned long reg_flags;
 645
 646         if (mode == 0)
 647                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 648         else
 649                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 650
 651         /* Make sure device is powered up for SRAM reads */
 652         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 653         if (iwl_grab_nic_access(priv)) {
 654                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 655                 return;
 656         }
 657
 658         /* Set starting address; reads will auto-increment */
 659         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 660         rmb();
 661
 662         /*
 663          * "time" is actually "data" for mode 0 (no timestamp).
 664          * place event id # at far right for easier visual parsing.
 665          */
 666         for (i = 0; i < num_events; i++) {
 667                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 668                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 669                 if (mode == 0) {
 670                         trace_iwlwifi_dev_ucode_cont_event(priv,
 671                                                         0, time, ev);
 672                 } else {
 673                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 674                         trace_iwlwifi_dev_ucode_cont_event(priv,
 675                                                 time, data, ev);
 676                 }
 677         }
 678         /* Allow device to power down */
 679         iwl_release_nic_access(priv);
 680         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 681 }
 682
 683 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 684 {
 685         u32 capacity;   /* event log capacity in # entries */
 686         u32 base;       /* SRAM byte address of event log header */
 687         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 688         u32 num_wraps;  /* # times uCode wrapped to top of log */
 689         u32 next_entry; /* index of next entry to be written by uCode */
 690
 691         if (priv->ucode_type == UCODE_INIT)
 692                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 693         else
 694                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 695         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 696                 capacity = iwl_read_targ_mem(priv, base);
 697                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 698                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 699                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 700         } else
 701                 return;
 702
 703         if (num_wraps == priv->event_log.num_wraps) {
 704                 iwl_print_cont_event_trace(priv,
 705                                        base, priv->event_log.next_entry,
 706                                        next_entry - priv->event_log.next_entry,
 707                                        mode);
 708                 priv->event_log.non_wraps_count++;
 709         } else {
 710                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 711                         priv->event_log.wraps_more_count++;
 712                 else
 713                         priv->event_log.wraps_once_count++;
 714                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 715                                 num_wraps - priv->event_log.num_wraps,
 716                                 next_entry, priv->event_log.next_entry);
 717                 if (next_entry < priv->event_log.next_entry) {
 718                         iwl_print_cont_event_trace(priv, base,
 719                                priv->event_log.next_entry,
 720                                capacity - priv->event_log.next_entry,
 721                                mode);
 722
 723                         iwl_print_cont_event_trace(priv, base, 0,
 724                                 next_entry, mode);
 725                 } else {
 726                         iwl_print_cont_event_trace(priv, base,
 727                                next_entry, capacity - next_entry,
 728                                mode);
 729
 730                         iwl_print_cont_event_trace(priv, base, 0,
 731                                 next_entry, mode);
 732                 }
 733         }
 734         priv->event_log.num_wraps = num_wraps;
 735         priv->event_log.next_entry = next_entry;
 736 }
 737
 738 /**
 739  * iwl_bg_ucode_trace - Timer callback to log ucode event
 740  *
 741  * The timer is continually set to execute every
 742  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 743  * this function is to perform continuous uCode event logging operation
 744  * if enabled
 745  */
 746 static void iwl_bg_ucode_trace(unsigned long data)
 747 {
 748         struct iwl_priv *priv = (struct iwl_priv *)data;
 749
 750         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 751                 return;
 752
 753         if (priv->event_log.ucode_trace) {
 754                 iwl_continuous_event_trace(priv);
 755                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 756                 mod_timer(&priv->ucode_trace,
 757                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 758         }
 759 }
 760
 761 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 762                                 struct iwl_rx_mem_buffer *rxb)
 763 {
 764 #ifdef CONFIG_IWLWIFI_DEBUG
 765         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 766         struct iwl4965_beacon_notif *beacon =
 767                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 768         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 769
 770         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 771                 "tsf %d %d rate %d\n",
 772                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 773                 beacon->beacon_notify_hdr.failure_frame,
 774                 le32_to_cpu(beacon->ibss_mgr_status),
 775                 le32_to_cpu(beacon->high_tsf),
 776                 le32_to_cpu(beacon->low_tsf), rate);
 777 #endif
 778
 779         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 780             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 781                 queue_work(priv->workqueue, &priv->beacon_update);
 782 }
 783
 784 /* Handle notification from uCode that card's power state is changing
 785  * due to software, hardware, or critical temperature RFKILL */
 786 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 787                                     struct iwl_rx_mem_buffer *rxb)
 788 {
 789         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 790         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 791         unsigned long status = priv->status;
 792
 793         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 794                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 795                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 796                           (flags & CT_CARD_DISABLED) ?
 797                           "Reached" : "Not reached");
 798
 799         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 800                      CT_CARD_DISABLED)) {
 801
 802                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 803                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 804
 805                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 806                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 807
 808                 if (!(flags & RXON_CARD_DISABLED)) {
 809                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 810                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 811                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 812                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 813                 }
 814                 if (flags & CT_CARD_DISABLED)
 815                         iwl_tt_enter_ct_kill(priv);
 816         }
 817         if (!(flags & CT_CARD_DISABLED))
 818                 iwl_tt_exit_ct_kill(priv);
 819
 820         if (flags & HW_CARD_DISABLED)
 821                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 822         else
 823                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 824
 825
 826         if (!(flags & RXON_CARD_DISABLED))
 827                 iwl_scan_cancel(priv);
 828
 829         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 830              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 831                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 832                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 833         else
 834                 wake_up_interruptible(&priv->wait_command_queue);
 835 }
 836
 837 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 838 {
 839         if (src == IWL_PWR_SRC_VAUX) {
 840                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 841                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 842                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 843                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 844         } else {
 845                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 846                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 847                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 848         }
 849
 850         return 0;
 851 }
 852
 853 /**
 854  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 855  *
 856  * Setup the RX handlers for each of the reply types sent from the uCode
 857  * to the host.
 858  *
 859  * This function chains into the hardware specific files for them to setup
 860  * any hardware specific handlers as well.
 861  */
 862 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 863 {
 864         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 865         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 866         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 867         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 868                         iwl_rx_spectrum_measure_notif;
 869         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 870         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 871             iwl_rx_pm_debug_statistics_notif;
 872         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 873
 874         /*
 875          * The same handler is used for both the REPLY to a discrete
 876          * statistics request from the host as well as for the periodic
 877          * statistics notifications (after received beacons) from the uCode.
 878          */
 879         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 880         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 881
 882         iwl_setup_rx_scan_handlers(priv);
 883
 884         /* status change handler */
 885         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 886
 887         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 888             iwl_rx_missed_beacon_notif;
 889         /* Rx handlers */
 890         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 891         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 892         /* block ack */
 893         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 894         /* Set up hardware specific Rx handlers */
 895         priv->cfg->ops->lib->rx_handler_setup(priv);
 896 }
 897
 898 /**
 899  * iwl_rx_handle - Main entry function for receiving responses from uCode
 900  *
 901  * Uses the priv->rx_handlers callback function array to invoke
 902  * the appropriate handlers, including command responses,
 903  * frame-received notifications, and other notifications.
 904  */
 905 void iwl_rx_handle(struct iwl_priv *priv)
 906 {
 907         struct iwl_rx_mem_buffer *rxb;
 908         struct iwl_rx_packet *pkt;
 909         struct iwl_rx_queue *rxq = &priv->rxq;
 910         u32 r, i;
 911         int reclaim;
 912         unsigned long flags;
 913         u8 fill_rx = 0;
 914         u32 count = 8;
 915         int total_empty;
 916
 917         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 918          * buffer that the driver may process (last buffer filled by ucode). */
 919         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 920         i = rxq->read;
 921
 922         /* Rx interrupt, but nothing sent from uCode */
 923         if (i == r)
 924                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 925
 926         /* calculate total frames need to be restock after handling RX */
 927         total_empty = r - rxq->write_actual;
 928         if (total_empty < 0)
 929                 total_empty += RX_QUEUE_SIZE;
 930
 931         if (total_empty > (RX_QUEUE_SIZE / 2))
 932                 fill_rx = 1;
 933
 934         while (i != r) {
 935                 rxb = rxq->queue[i];
 936
 937                 /* If an RXB doesn't have a Rx queue slot associated with it,
 938                  * then a bug has been introduced in the queue refilling
 939                  * routines -- catch it here */
 940                 BUG_ON(rxb == NULL);
 941
 942                 rxq->queue[i] = NULL;
 943
 944                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 945                                PAGE_SIZE << priv->hw_params.rx_page_order,
 946                                PCI_DMA_FROMDEVICE);
 947                 pkt = rxb_addr(rxb);
 948
 949                 trace_iwlwifi_dev_rx(priv, pkt,
 950                         le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
 951
 952                 /* Reclaim a command buffer only if this packet is a response
 953                  *   to a (driver-originated) command.
 954                  * If the packet (e.g. Rx frame) originated from uCode,
 955                  *   there is no command buffer to reclaim.
 956                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 957                  *   but apparently a few don't get set; catch them here. */
 958                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 959                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 960                         (pkt->hdr.cmd != REPLY_RX) &&
 961                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 962                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 963                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 964                         (pkt->hdr.cmd != REPLY_TX);
 965
 966                 /* Based on type of command response or notification,
 967                  *   handle those that need handling via function in
 968                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 969                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 970                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 971                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 972                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 973                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
 974                 } else {
 975                         /* No handling needed */
 976                         IWL_DEBUG_RX(priv,
 977                                 "r %d i %d No handler needed for %s, 0x%02x\n",
 978                                 r, i, get_cmd_string(pkt->hdr.cmd),
 979                                 pkt->hdr.cmd);
 980                 }
 981
 982                 /*
 983                  * XXX: After here, we should always check rxb->page
 984                  * against NULL before touching it or its virtual
 985                  * memory (pkt). Because some rx_handler might have
 986                  * already taken or freed the pages.
 987                  */
 988
 989                 if (reclaim) {
 990                         /* Invoke any callbacks, transfer the buffer to caller,
 991                          * and fire off the (possibly) blocking iwl_send_cmd()
 992                          * as we reclaim the driver command queue */
 993                         if (rxb->page)
 994                                 iwl_tx_cmd_complete(priv, rxb);
 995                         else
 996                                 IWL_WARN(priv, "Claim null rxb?\n");
 997                 }
 998
 999                 /* Reuse the page if possible. For notification packets and
1000                  * SKBs that fail to Rx correctly, add them back into the
1001                  * rx_free list for reuse later. */
1002                 spin_lock_irqsave(&rxq->lock, flags);
1003                 if (rxb->page != NULL) {
1004                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1005                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1006                                 PCI_DMA_FROMDEVICE);
1007                         list_add_tail(&rxb->list, &rxq->rx_free);
1008                         rxq->free_count++;
1009                 } else
1010                         list_add_tail(&rxb->list, &rxq->rx_used);
1011
1012                 spin_unlock_irqrestore(&rxq->lock, flags);
1013
1014                 i = (i + 1) & RX_QUEUE_MASK;
1015                 /* If there are a lot of unused frames,
1016                  * restock the Rx queue so ucode wont assert. */
1017                 if (fill_rx) {
1018                         count++;
1019                         if (count >= 8) {
1020                                 rxq->read = i;
1021                                 iwlagn_rx_replenish_now(priv);
1022                                 count = 0;
1023                         }
1024                 }
1025         }
1026
1027         /* Backtrack one entry */
1028         rxq->read = i;
1029         if (fill_rx)
1030                 iwlagn_rx_replenish_now(priv);
1031         else
1032                 iwlagn_rx_queue_restock(priv);
1033 }
1034
1035 /* call this function to flush any scheduled tasklet */
1036 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1037 {
1038         /* wait to make sure we flush pending tasklet*/
1039         synchronize_irq(priv->pci_dev->irq);
1040         tasklet_kill(&priv->irq_tasklet);
1041 }
1042
1043 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1044 {
1045         u32 inta, handled = 0;
1046         u32 inta_fh;
1047         unsigned long flags;
1048         u32 i;
1049 #ifdef CONFIG_IWLWIFI_DEBUG
1050         u32 inta_mask;
1051 #endif
1052
1053         spin_lock_irqsave(&priv->lock, flags);
1054
1055         /* Ack/clear/reset pending uCode interrupts.
1056          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1057          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1058         inta = iwl_read32(priv, CSR_INT);
1059         iwl_write32(priv, CSR_INT, inta);
1060
1061         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1062          * Any new interrupts that happen after this, either while we're
1063          * in this tasklet, or later, will show up in next ISR/tasklet. */
1064         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1065         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1066
1067 #ifdef CONFIG_IWLWIFI_DEBUG
1068         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1069                 /* just for debug */
1070                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1071                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1072                               inta, inta_mask, inta_fh);
1073         }
1074 #endif
1075
1076         spin_unlock_irqrestore(&priv->lock, flags);
1077
1078         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1079          * atomic, make sure that inta covers all the interrupts that
1080          * we've discovered, even if FH interrupt came in just after
1081          * reading CSR_INT. */
1082         if (inta_fh & CSR49_FH_INT_RX_MASK)
1083                 inta |= CSR_INT_BIT_FH_RX;
1084         if (inta_fh & CSR49_FH_INT_TX_MASK)
1085                 inta |= CSR_INT_BIT_FH_TX;
1086
1087         /* Now service all interrupt bits discovered above. */
1088         if (inta & CSR_INT_BIT_HW_ERR) {
1089                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1090
1091                 /* Tell the device to stop sending interrupts */
1092                 iwl_disable_interrupts(priv);
1093
1094                 priv->isr_stats.hw++;
1095                 iwl_irq_handle_error(priv);
1096
1097                 handled |= CSR_INT_BIT_HW_ERR;
1098
1099                 return;
1100         }
1101
1102 #ifdef CONFIG_IWLWIFI_DEBUG
1103         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1104                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1105                 if (inta & CSR_INT_BIT_SCD) {
1106                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1107                                       "the frame/frames.\n");
1108                         priv->isr_stats.sch++;
1109                 }
1110
1111                 /* Alive notification via Rx interrupt will do the real work */
1112                 if (inta & CSR_INT_BIT_ALIVE) {
1113                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1114                         priv->isr_stats.alive++;
1115                 }
1116         }
1117 #endif
1118         /* Safely ignore these bits for debug checks below */
1119         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1120
1121         /* HW RF KILL switch toggled */
1122         if (inta & CSR_INT_BIT_RF_KILL) {
1123                 int hw_rf_kill = 0;
1124                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1125                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1126                         hw_rf_kill = 1;
1127
1128                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1129                                 hw_rf_kill ? "disable radio" : "enable radio");
1130
1131                 priv->isr_stats.rfkill++;
1132
1133                 /* driver only loads ucode once setting the interface up.
1134                  * the driver allows loading the ucode even if the radio
1135                  * is killed. Hence update the killswitch state here. The
1136                  * rfkill handler will care about restarting if needed.
1137                  */
1138                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1139                         if (hw_rf_kill)
1140                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1141                         else
1142                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1143                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1144                 }
1145
1146                 handled |= CSR_INT_BIT_RF_KILL;
1147         }
1148
1149         /* Chip got too hot and stopped itself */
1150         if (inta & CSR_INT_BIT_CT_KILL) {
1151                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1152                 priv->isr_stats.ctkill++;
1153                 handled |= CSR_INT_BIT_CT_KILL;
1154         }
1155
1156         /* Error detected by uCode */
1157         if (inta & CSR_INT_BIT_SW_ERR) {
1158                 IWL_ERR(priv, "Microcode SW error detected. "
1159                         " Restarting 0x%X.\n", inta);
1160                 priv->isr_stats.sw++;
1161                 priv->isr_stats.sw_err = inta;
1162                 iwl_irq_handle_error(priv);
1163                 handled |= CSR_INT_BIT_SW_ERR;
1164         }
1165
1166         /*
1167          * uCode wakes up after power-down sleep.
1168          * Tell device about any new tx or host commands enqueued,
1169          * and about any Rx buffers made available while asleep.
1170          */
1171         if (inta & CSR_INT_BIT_WAKEUP) {
1172                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1173                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1174                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1175                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1176                 priv->isr_stats.wakeup++;
1177                 handled |= CSR_INT_BIT_WAKEUP;
1178         }
1179
1180         /* All uCode command responses, including Tx command responses,
1181          * Rx "responses" (frame-received notification), and other
1182          * notifications from uCode come through here*/
1183         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1184                 iwl_rx_handle(priv);
1185                 priv->isr_stats.rx++;
1186                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1187         }
1188
1189         /* This "Tx" DMA channel is used only for loading uCode */
1190         if (inta & CSR_INT_BIT_FH_TX) {
1191                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1192                 priv->isr_stats.tx++;
1193                 handled |= CSR_INT_BIT_FH_TX;
1194                 /* Wake up uCode load routine, now that load is complete */
1195                 priv->ucode_write_complete = 1;
1196                 wake_up_interruptible(&priv->wait_command_queue);
1197         }
1198
1199         if (inta & ~handled) {
1200                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1201                 priv->isr_stats.unhandled++;
1202         }
1203
1204         if (inta & ~(priv->inta_mask)) {
1205                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1206                          inta & ~priv->inta_mask);
1207                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1208         }
1209
1210         /* Re-enable all interrupts */
1211         /* only Re-enable if diabled by irq */
1212         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1213                 iwl_enable_interrupts(priv);
1214
1215 #ifdef CONFIG_IWLWIFI_DEBUG
1216         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1217                 inta = iwl_read32(priv, CSR_INT);
1218                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1219                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1220                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1221                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1222         }
1223 #endif
1224 }
1225
1226 /* tasklet for iwlagn interrupt */
1227 static void iwl_irq_tasklet(struct iwl_priv *priv)
1228 {
1229         u32 inta = 0;
1230         u32 handled = 0;
1231         unsigned long flags;
1232         u32 i;
1233 #ifdef CONFIG_IWLWIFI_DEBUG
1234         u32 inta_mask;
1235 #endif
1236
1237         spin_lock_irqsave(&priv->lock, flags);
1238
1239         /* Ack/clear/reset pending uCode interrupts.
1240          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1241          */
1242         /* There is a hardware bug in the interrupt mask function that some
1243          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1244          * they are disabled in the CSR_INT_MASK register. Furthermore the
1245          * ICT interrupt handling mechanism has another bug that might cause
1246          * these unmasked interrupts fail to be detected. We workaround the
1247          * hardware bugs here by ACKing all the possible interrupts so that
1248          * interrupt coalescing can still be achieved.
1249          */
1250         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1251
1252         inta = priv->_agn.inta;
1253
1254 #ifdef CONFIG_IWLWIFI_DEBUG
1255         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1256                 /* just for debug */
1257                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1258                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1259                                 inta, inta_mask);
1260         }
1261 #endif
1262
1263         spin_unlock_irqrestore(&priv->lock, flags);
1264
1265         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1266         priv->_agn.inta = 0;
1267
1268         /* Now service all interrupt bits discovered above. */
1269         if (inta & CSR_INT_BIT_HW_ERR) {
1270                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1271
1272                 /* Tell the device to stop sending interrupts */
1273                 iwl_disable_interrupts(priv);
1274
1275                 priv->isr_stats.hw++;
1276                 iwl_irq_handle_error(priv);
1277
1278                 handled |= CSR_INT_BIT_HW_ERR;
1279
1280                 return;
1281         }
1282
1283 #ifdef CONFIG_IWLWIFI_DEBUG
1284         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1285                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1286                 if (inta & CSR_INT_BIT_SCD) {
1287                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1288                                       "the frame/frames.\n");
1289                         priv->isr_stats.sch++;
1290                 }
1291
1292                 /* Alive notification via Rx interrupt will do the real work */
1293                 if (inta & CSR_INT_BIT_ALIVE) {
1294                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1295                         priv->isr_stats.alive++;
1296                 }
1297         }
1298 #endif
1299         /* Safely ignore these bits for debug checks below */
1300         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1301
1302         /* HW RF KILL switch toggled */
1303         if (inta & CSR_INT_BIT_RF_KILL) {
1304                 int hw_rf_kill = 0;
1305                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1306                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1307                         hw_rf_kill = 1;
1308
1309                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1310                                 hw_rf_kill ? "disable radio" : "enable radio");
1311
1312                 priv->isr_stats.rfkill++;
1313
1314                 /* driver only loads ucode once setting the interface up.
1315                  * the driver allows loading the ucode even if the radio
1316                  * is killed. Hence update the killswitch state here. The
1317                  * rfkill handler will care about restarting if needed.
1318                  */
1319                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1320                         if (hw_rf_kill)
1321                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1322                         else
1323                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1324                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1325                 }
1326
1327                 handled |= CSR_INT_BIT_RF_KILL;
1328         }
1329
1330         /* Chip got too hot and stopped itself */
1331         if (inta & CSR_INT_BIT_CT_KILL) {
1332                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1333                 priv->isr_stats.ctkill++;
1334                 handled |= CSR_INT_BIT_CT_KILL;
1335         }
1336
1337         /* Error detected by uCode */
1338         if (inta & CSR_INT_BIT_SW_ERR) {
1339                 IWL_ERR(priv, "Microcode SW error detected. "
1340                         " Restarting 0x%X.\n", inta);
1341                 priv->isr_stats.sw++;
1342                 priv->isr_stats.sw_err = inta;
1343                 iwl_irq_handle_error(priv);
1344                 handled |= CSR_INT_BIT_SW_ERR;
1345         }
1346
1347         /* uCode wakes up after power-down sleep */
1348         if (inta & CSR_INT_BIT_WAKEUP) {
1349                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1350                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1351                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1352                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1353
1354                 priv->isr_stats.wakeup++;
1355
1356                 handled |= CSR_INT_BIT_WAKEUP;
1357         }
1358
1359         /* All uCode command responses, including Tx command responses,
1360          * Rx "responses" (frame-received notification), and other
1361          * notifications from uCode come through here*/
1362         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1363                         CSR_INT_BIT_RX_PERIODIC)) {
1364                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1365                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1366                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1367                         iwl_write32(priv, CSR_FH_INT_STATUS,
1368                                         CSR49_FH_INT_RX_MASK);
1369                 }
1370                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1371                         handled |= CSR_INT_BIT_RX_PERIODIC;
1372                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1373                 }
1374                 /* Sending RX interrupt require many steps to be done in the
1375                  * the device:
1376                  * 1- write interrupt to current index in ICT table.
1377                  * 2- dma RX frame.
1378                  * 3- update RX shared data to indicate last write index.
1379                  * 4- send interrupt.
1380                  * This could lead to RX race, driver could receive RX interrupt
1381                  * but the shared data changes does not reflect this;
1382                  * periodic interrupt will detect any dangling Rx activity.
1383                  */
1384
1385                 /* Disable periodic interrupt; we use it as just a one-shot. */
1386                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1387                             CSR_INT_PERIODIC_DIS);
1388                 iwl_rx_handle(priv);
1389
1390                 /*
1391                  * Enable periodic interrupt in 8 msec only if we received
1392                  * real RX interrupt (instead of just periodic int), to catch
1393                  * any dangling Rx interrupt.  If it was just the periodic
1394                  * interrupt, there was no dangling Rx activity, and no need
1395                  * to extend the periodic interrupt; one-shot is enough.
1396                  */
1397                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1398                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1399                                     CSR_INT_PERIODIC_ENA);
1400
1401                 priv->isr_stats.rx++;
1402         }
1403
1404         /* This "Tx" DMA channel is used only for loading uCode */
1405         if (inta & CSR_INT_BIT_FH_TX) {
1406                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1407                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1408                 priv->isr_stats.tx++;
1409                 handled |= CSR_INT_BIT_FH_TX;
1410                 /* Wake up uCode load routine, now that load is complete */
1411                 priv->ucode_write_complete = 1;
1412                 wake_up_interruptible(&priv->wait_command_queue);
1413         }
1414
1415         if (inta & ~handled) {
1416                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1417                 priv->isr_stats.unhandled++;
1418         }
1419
1420         if (inta & ~(priv->inta_mask)) {
1421                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1422                          inta & ~priv->inta_mask);
1423         }
1424
1425         /* Re-enable all interrupts */
1426         /* only Re-enable if diabled by irq */
1427         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1428                 iwl_enable_interrupts(priv);
1429 }
1430
1431 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1432 #define ACK_CNT_RATIO (50)
1433 #define BA_TIMEOUT_CNT (5)
1434 #define BA_TIMEOUT_MAX (16)
1435
1436 /**
1437  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1438  *
1439  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1440  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1441  * operation state.
1442  */
1443 bool iwl_good_ack_health(struct iwl_priv *priv,
1444                                 struct iwl_rx_packet *pkt)
1445 {
1446         bool rc = true;
1447         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1448         int ba_timeout_delta;
1449
1450         actual_ack_cnt_delta =
1451                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1452                 le32_to_cpu(priv->statistics.tx.actual_ack_cnt);
1453         expected_ack_cnt_delta =
1454                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1455                 le32_to_cpu(priv->statistics.tx.expected_ack_cnt);
1456         ba_timeout_delta =
1457                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1458                 le32_to_cpu(priv->statistics.tx.agg.ba_timeout);
1459         if ((priv->_agn.agg_tids_count > 0) &&
1460             (expected_ack_cnt_delta > 0) &&
1461             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1462                 < ACK_CNT_RATIO) &&
1463             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1464                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1465                                 " expected_ack_cnt = %d\n",
1466                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1467
1468 #ifdef CONFIG_IWLWIFI_DEBUG
1469                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1470                                 priv->delta_statistics.tx.rx_detected_cnt);
1471                 IWL_DEBUG_RADIO(priv,
1472                                 "ack_or_ba_timeout_collision delta = %d\n",
1473                                 priv->delta_statistics.tx.
1474                                 ack_or_ba_timeout_collision);
1475 #endif
1476                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1477                                 ba_timeout_delta);
1478                 if (!actual_ack_cnt_delta &&
1479                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1480                         rc = false;
1481         }
1482         return rc;
1483 }
1484
1485
1486 /******************************************************************************
1487  *
1488  * uCode download functions
1489  *
1490  ******************************************************************************/
1491
1492 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1493 {
1494         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1495         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1496         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1497         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1498         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1499         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1500 }
1501
1502 static void iwl_nic_start(struct iwl_priv *priv)
1503 {
1504         /* Remove all resets to allow NIC to operate */
1505         iwl_write32(priv, CSR_RESET, 0);
1506 }
1507
1508
1509 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1510 static int iwl_mac_setup_register(struct iwl_priv *priv);
1511
1512 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1513 {
1514         const char *name_pre = priv->cfg->fw_name_pre;
1515
1516         if (first)
1517                 priv->fw_index = priv->cfg->ucode_api_max;
1518         else
1519                 priv->fw_index--;
1520
1521         if (priv->fw_index < priv->cfg->ucode_api_min) {
1522                 IWL_ERR(priv, "no suitable firmware found!\n");
1523                 return -ENOENT;
1524         }
1525
1526         sprintf(priv->firmware_name, "%s%d%s",
1527                 name_pre, priv->fw_index, ".ucode");
1528
1529         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1530                        priv->firmware_name);
1531
1532         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1533                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1534                                        iwl_ucode_callback);
1535 }
1536
1537 /**
1538  * iwl_ucode_callback - callback when firmware was loaded
1539  *
1540  * If loaded successfully, copies the firmware into buffers
1541  * for the card to fetch (via DMA).
1542  */
1543 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1544 {
1545         struct iwl_priv *priv = context;
1546         struct iwl_ucode_header *ucode;
1547         const unsigned int api_max = priv->cfg->ucode_api_max;
1548         const unsigned int api_min = priv->cfg->ucode_api_min;
1549         u8 *src;
1550         size_t len;
1551         u32 api_ver, build;
1552         u32 inst_size, data_size, init_size, init_data_size, boot_size;
1553         int err;
1554         u16 eeprom_ver;
1555         char buildstr[25];
1556
1557         if (!ucode_raw) {
1558                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1559                         priv->firmware_name);
1560                 goto try_again;
1561         }
1562
1563         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1564                        priv->firmware_name, ucode_raw->size);
1565
1566         /* Make sure that we got at least the v1 header! */
1567         if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1568                 IWL_ERR(priv, "File size way too small!\n");
1569                 goto try_again;
1570         }
1571
1572         /* Data from ucode file:  header followed by uCode images */
1573         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1574
1575         priv->ucode_ver = le32_to_cpu(ucode->ver);
1576         api_ver = IWL_UCODE_API(priv->ucode_ver);
1577         build = priv->cfg->ops->ucode->get_build(ucode, api_ver);
1578         inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
1579         data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
1580         init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
1581         init_data_size =
1582                 priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
1583         boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
1584         src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
1585
1586         /* api_ver should match the api version forming part of the
1587          * firmware filename ... but we don't check for that and only rely
1588          * on the API version read from firmware header from here on forward */
1589
1590         if (api_ver < api_min || api_ver > api_max) {
1591                 IWL_ERR(priv, "Driver unable to support your firmware API. "
1592                           "Driver supports v%u, firmware is v%u.\n",
1593                           api_max, api_ver);
1594                 goto try_again;
1595         }
1596
1597         if (api_ver != api_max)
1598                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1599                           "got v%u. New firmware can be obtained "
1600                           "from http://www.intellinuxwireless.org.\n",
1601                           api_max, api_ver);
1602
1603         if (build)
1604                 sprintf(buildstr, " build %u", build);
1605         else
1606                 buildstr[0] = '\0';
1607
1608         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
1609                  IWL_UCODE_MAJOR(priv->ucode_ver),
1610                  IWL_UCODE_MINOR(priv->ucode_ver),
1611                  IWL_UCODE_API(priv->ucode_ver),
1612                  IWL_UCODE_SERIAL(priv->ucode_ver),
1613                  buildstr);
1614
1615         snprintf(priv->hw->wiphy->fw_version,
1616                  sizeof(priv->hw->wiphy->fw_version),
1617                  "%u.%u.%u.%u%s",
1618                  IWL_UCODE_MAJOR(priv->ucode_ver),
1619                  IWL_UCODE_MINOR(priv->ucode_ver),
1620                  IWL_UCODE_API(priv->ucode_ver),
1621                  IWL_UCODE_SERIAL(priv->ucode_ver),
1622                  buildstr);
1623
1624         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
1625         IWL_DEBUG_INFO(priv, "NVM Type: %s, version: 0x%x\n",
1626                        (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
1627                        ? "OTP" : "EEPROM", eeprom_ver);
1628
1629         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1630                        priv->ucode_ver);
1631         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1632                        inst_size);
1633         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1634                        data_size);
1635         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1636                        init_size);
1637         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1638                        init_data_size);
1639         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1640                        boot_size);
1641
1642         /*
1643          * For any of the failures below (before allocating pci memory)
1644          * we will try to load a version with a smaller API -- maybe the
1645          * user just got a corrupted version of the latest API.
1646          */
1647
1648         /* Verify size of file vs. image size info in file's header */
1649         if (ucode_raw->size !=
1650                 priv->cfg->ops->ucode->get_header_size(api_ver) +
1651                 inst_size + data_size + init_size +
1652                 init_data_size + boot_size) {
1653
1654                 IWL_DEBUG_INFO(priv,
1655                         "uCode file size %d does not match expected size\n",
1656                         (int)ucode_raw->size);
1657                 goto try_again;
1658         }
1659
1660         /* Verify that uCode images will fit in card's SRAM */
1661         if (inst_size > priv->hw_params.max_inst_size) {
1662                 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1663                                inst_size);
1664                 goto try_again;
1665         }
1666
1667         if (data_size > priv->hw_params.max_data_size) {
1668                 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1669                                 data_size);
1670                 goto try_again;
1671         }
1672         if (init_size > priv->hw_params.max_inst_size) {
1673                 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1674                         init_size);
1675                 goto try_again;
1676         }
1677         if (init_data_size > priv->hw_params.max_data_size) {
1678                 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1679                       init_data_size);
1680                 goto try_again;
1681         }
1682         if (boot_size > priv->hw_params.max_bsm_size) {
1683                 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1684                         boot_size);
1685                 goto try_again;
1686         }
1687
1688         /* Allocate ucode buffers for card's bus-master loading ... */
1689
1690         /* Runtime instructions and 2 copies of data:
1691          * 1) unmodified from disk
1692          * 2) backup cache for save/restore during power-downs */
1693         priv->ucode_code.len = inst_size;
1694         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
1695
1696         priv->ucode_data.len = data_size;
1697         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
1698
1699         priv->ucode_data_backup.len = data_size;
1700         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1701
1702         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1703             !priv->ucode_data_backup.v_addr)
1704                 goto err_pci_alloc;
1705
1706         /* Initialization instructions and data */
1707         if (init_size && init_data_size) {
1708                 priv->ucode_init.len = init_size;
1709                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
1710
1711                 priv->ucode_init_data.len = init_data_size;
1712                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1713
1714                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1715                         goto err_pci_alloc;
1716         }
1717
1718         /* Bootstrap (instructions only, no data) */
1719         if (boot_size) {
1720                 priv->ucode_boot.len = boot_size;
1721                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1722
1723                 if (!priv->ucode_boot.v_addr)
1724                         goto err_pci_alloc;
1725         }
1726
1727         /* Copy images into buffers for card's bus-master reads ... */
1728
1729         /* Runtime instructions (first block of data in file) */
1730         len = inst_size;
1731         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", len);
1732         memcpy(priv->ucode_code.v_addr, src, len);
1733         src += len;
1734
1735         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1736                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1737
1738         /* Runtime data (2nd block)
1739          * NOTE:  Copy into backup buffer will be done in iwl_up()  */
1740         len = data_size;
1741         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n", len);
1742         memcpy(priv->ucode_data.v_addr, src, len);
1743         memcpy(priv->ucode_data_backup.v_addr, src, len);
1744         src += len;
1745
1746         /* Initialization instructions (3rd block) */
1747         if (init_size) {
1748                 len = init_size;
1749                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1750                                 len);
1751                 memcpy(priv->ucode_init.v_addr, src, len);
1752                 src += len;
1753         }
1754
1755         /* Initialization data (4th block) */
1756         if (init_data_size) {
1757                 len = init_data_size;
1758                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1759                                len);
1760                 memcpy(priv->ucode_init_data.v_addr, src, len);
1761                 src += len;
1762         }
1763
1764         /* Bootstrap instructions (5th block) */
1765         len = boot_size;
1766         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1767         memcpy(priv->ucode_boot.v_addr, src, len);
1768
1769         /**************************************************
1770          * This is still part of probe() in a sense...
1771          *
1772          * 9. Setup and register with mac80211 and debugfs
1773          **************************************************/
1774         err = iwl_mac_setup_register(priv);
1775         if (err)
1776                 goto out_unbind;
1777
1778         err = iwl_dbgfs_register(priv, DRV_NAME);
1779         if (err)
1780                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1781
1782         /* We have our copies now, allow OS release its copies */
1783         release_firmware(ucode_raw);
1784         complete(&priv->_agn.firmware_loading_complete);
1785         return;
1786
1787  try_again:
1788         /* try next, if any */
1789         if (iwl_request_firmware(priv, false))
1790                 goto out_unbind;
1791         release_firmware(ucode_raw);
1792         return;
1793
1794  err_pci_alloc:
1795         IWL_ERR(priv, "failed to allocate pci memory\n");
1796         iwl_dealloc_ucode_pci(priv);
1797  out_unbind:
1798         complete(&priv->_agn.firmware_loading_complete);
1799         device_release_driver(&priv->pci_dev->dev);
1800         release_firmware(ucode_raw);
1801 }
1802
1803 static const char *desc_lookup_text[] = {
1804         "OK",
1805         "FAIL",
1806         "BAD_PARAM",
1807         "BAD_CHECKSUM",
1808         "NMI_INTERRUPT_WDG",
1809         "SYSASSERT",
1810         "FATAL_ERROR",
1811         "BAD_COMMAND",
1812         "HW_ERROR_TUNE_LOCK",
1813         "HW_ERROR_TEMPERATURE",
1814         "ILLEGAL_CHAN_FREQ",
1815         "VCC_NOT_STABLE",
1816         "FH_ERROR",
1817         "NMI_INTERRUPT_HOST",
1818         "NMI_INTERRUPT_ACTION_PT",
1819         "NMI_INTERRUPT_UNKNOWN",
1820         "UCODE_VERSION_MISMATCH",
1821         "HW_ERROR_ABS_LOCK",
1822         "HW_ERROR_CAL_LOCK_FAIL",
1823         "NMI_INTERRUPT_INST_ACTION_PT",
1824         "NMI_INTERRUPT_DATA_ACTION_PT",
1825         "NMI_TRM_HW_ER",
1826         "NMI_INTERRUPT_TRM",
1827         "NMI_INTERRUPT_BREAK_POINT"
1828         "DEBUG_0",
1829         "DEBUG_1",
1830         "DEBUG_2",
1831         "DEBUG_3",
1832         "ADVANCED SYSASSERT"
1833 };
1834
1835 static const char *desc_lookup(int i)
1836 {
1837         int max = ARRAY_SIZE(desc_lookup_text) - 1;
1838
1839         if (i < 0 || i > max)
1840                 i = max;
1841
1842         return desc_lookup_text[i];
1843 }
1844
1845 #define ERROR_START_OFFSET  (1 * sizeof(u32))
1846 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
1847
1848 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1849 {
1850         u32 data2, line;
1851         u32 desc, time, count, base, data1;
1852         u32 blink1, blink2, ilink1, ilink2;
1853         u32 pc, hcmd;
1854
1855         if (priv->ucode_type == UCODE_INIT)
1856                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1857         else
1858                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1859
1860         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1861                 IWL_ERR(priv,
1862                         "Not valid error log pointer 0x%08X for %s uCode\n",
1863                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1864                 return;
1865         }
1866
1867         count = iwl_read_targ_mem(priv, base);
1868
1869         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1870                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1871                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1872                         priv->status, count);
1873         }
1874
1875         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1876         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
1877         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1878         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1879         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1880         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1881         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1882         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1883         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1884         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1885         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
1886
1887         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1888                                       blink1, blink2, ilink1, ilink2);
1889
1890         IWL_ERR(priv, "Desc                               Time       "
1891                 "data1      data2      line\n");
1892         IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1893                 desc_lookup(desc), desc, time, data1, data2, line);
1894         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
1895         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
1896                 pc, blink1, blink2, ilink1, ilink2, hcmd);
1897 }
1898
1899 #define EVENT_START_OFFSET  (4 * sizeof(u32))
1900
1901 /**
1902  * iwl_print_event_log - Dump error event log to syslog
1903  *
1904  */
1905 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1906                                u32 num_events, u32 mode,
1907                                int pos, char **buf, size_t bufsz)
1908 {
1909         u32 i;
1910         u32 base;       /* SRAM byte address of event log header */
1911         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1912         u32 ptr;        /* SRAM byte address of log data */
1913         u32 ev, time, data; /* event log data */
1914         unsigned long reg_flags;
1915
1916         if (num_events == 0)
1917                 return pos;
1918         if (priv->ucode_type == UCODE_INIT)
1919                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1920         else
1921                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1922
1923         if (mode == 0)
1924                 event_size = 2 * sizeof(u32);
1925         else
1926                 event_size = 3 * sizeof(u32);
1927
1928         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1929
1930         /* Make sure device is powered up for SRAM reads */
1931         spin_lock_irqsave(&priv->reg_lock, reg_flags);
1932         iwl_grab_nic_access(priv);
1933
1934         /* Set starting address; reads will auto-increment */
1935         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1936         rmb();
1937
1938         /* "time" is actually "data" for mode 0 (no timestamp).
1939         * place event id # at far right for easier visual parsing. */
1940         for (i = 0; i < num_events; i++) {
1941                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1942                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1943                 if (mode == 0) {
1944                         /* data, ev */
1945                         if (bufsz) {
1946                                 pos += scnprintf(*buf + pos, bufsz - pos,
1947                                                 "EVT_LOG:0x%08x:%04u\n",
1948                                                 time, ev);
1949                         } else {
1950                                 trace_iwlwifi_dev_ucode_event(priv, 0,
1951                                         time, ev);
1952                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1953                                         time, ev);
1954                         }
1955                 } else {
1956                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1957                         if (bufsz) {
1958                                 pos += scnprintf(*buf + pos, bufsz - pos,
1959                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
1960                                                  time, data, ev);
1961                         } else {
1962                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1963                                         time, data, ev);
1964                                 trace_iwlwifi_dev_ucode_event(priv, time,
1965                                         data, ev);
1966                         }
1967                 }
1968         }
1969
1970         /* Allow device to power down */
1971         iwl_release_nic_access(priv);
1972         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1973         return pos;
1974 }
1975
1976 /**
1977  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1978  */
1979 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1980                                     u32 num_wraps, u32 next_entry,
1981                                     u32 size, u32 mode,
1982                                     int pos, char **buf, size_t bufsz)
1983 {
1984         /*
1985          * display the newest DEFAULT_LOG_ENTRIES entries
1986          * i.e the entries just before the next ont that uCode would fill.
1987          */
1988         if (num_wraps) {
1989                 if (next_entry < size) {
1990                         pos = iwl_print_event_log(priv,
1991                                                 capacity - (size - next_entry),
1992                                                 size - next_entry, mode,
1993                                                 pos, buf, bufsz);
1994                         pos = iwl_print_event_log(priv, 0,
1995                                                   next_entry, mode,
1996                                                   pos, buf, bufsz);
1997                 } else
1998                         pos = iwl_print_event_log(priv, next_entry - size,
1999                                                   size, mode, pos, buf, bufsz);
2000         } else {
2001                 if (next_entry < size) {
2002                         pos = iwl_print_event_log(priv, 0, next_entry,
2003                                                   mode, pos, buf, bufsz);
2004                 } else {
2005                         pos = iwl_print_event_log(priv, next_entry - size,
2006                                                   size, mode, pos, buf, bufsz);
2007                 }
2008         }
2009         return pos;
2010 }
2011
2012 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2013
2014 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2015                             char **buf, bool display)
2016 {
2017         u32 base;       /* SRAM byte address of event log header */
2018         u32 capacity;   /* event log capacity in # entries */
2019         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2020         u32 num_wraps;  /* # times uCode wrapped to top of log */
2021         u32 next_entry; /* index of next entry to be written by uCode */
2022         u32 size;       /* # entries that we'll print */
2023         int pos = 0;
2024         size_t bufsz = 0;
2025
2026         if (priv->ucode_type == UCODE_INIT)
2027                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2028         else
2029                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2030
2031         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2032                 IWL_ERR(priv,
2033                         "Invalid event log pointer 0x%08X for %s uCode\n",
2034                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2035                 return -EINVAL;
2036         }
2037
2038         /* event log header */
2039         capacity = iwl_read_targ_mem(priv, base);
2040         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2041         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2042         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2043
2044         if (capacity > priv->cfg->max_event_log_size) {
2045                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2046                         capacity, priv->cfg->max_event_log_size);
2047                 capacity = priv->cfg->max_event_log_size;
2048         }
2049
2050         if (next_entry > priv->cfg->max_event_log_size) {
2051                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2052                         next_entry, priv->cfg->max_event_log_size);
2053                 next_entry = priv->cfg->max_event_log_size;
2054         }
2055
2056         size = num_wraps ? capacity : next_entry;
2057
2058         /* bail out if nothing in log */
2059         if (size == 0) {
2060                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2061                 return pos;
2062         }
2063
2064 #ifdef CONFIG_IWLWIFI_DEBUG
2065         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2066                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2067                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2068 #else
2069         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2070                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2071 #endif
2072         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2073                 size);
2074
2075 #ifdef CONFIG_IWLWIFI_DEBUG
2076         if (display) {
2077                 if (full_log)
2078                         bufsz = capacity * 48;
2079                 else
2080                         bufsz = size * 48;
2081                 *buf = kmalloc(bufsz, GFP_KERNEL);
2082                 if (!*buf)
2083                         return -ENOMEM;
2084         }
2085         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2086                 /*
2087                  * if uCode has wrapped back to top of log,
2088                  * start at the oldest entry,
2089                  * i.e the next one that uCode would fill.
2090                  */
2091                 if (num_wraps)
2092                         pos = iwl_print_event_log(priv, next_entry,
2093                                                 capacity - next_entry, mode,
2094                                                 pos, buf, bufsz);
2095                 /* (then/else) start at top of log */
2096                 pos = iwl_print_event_log(priv, 0,
2097                                           next_entry, mode, pos, buf, bufsz);
2098         } else
2099                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2100                                                 next_entry, size, mode,
2101                                                 pos, buf, bufsz);
2102 #else
2103         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2104                                         next_entry, size, mode,
2105                                         pos, buf, bufsz);
2106 #endif
2107         return pos;
2108 }
2109
2110 /**
2111  * iwl_alive_start - called after REPLY_ALIVE notification received
2112  *                   from protocol/runtime uCode (initialization uCode's
2113  *                   Alive gets handled by iwl_init_alive_start()).
2114  */
2115 static void iwl_alive_start(struct iwl_priv *priv)
2116 {
2117         int ret = 0;
2118
2119         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2120
2121         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2122                 /* We had an error bringing up the hardware, so take it
2123                  * all the way back down so we can try again */
2124                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2125                 goto restart;
2126         }
2127
2128         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2129          * This is a paranoid check, because we would not have gotten the
2130          * "runtime" alive if code weren't properly loaded.  */
2131         if (iwl_verify_ucode(priv)) {
2132                 /* Runtime instruction load was bad;
2133                  * take it all the way back down so we can try again */
2134                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2135                 goto restart;
2136         }
2137
2138         ret = priv->cfg->ops->lib->alive_notify(priv);
2139         if (ret) {
2140                 IWL_WARN(priv,
2141                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2142                 goto restart;
2143         }
2144
2145         /* After the ALIVE response, we can send host commands to the uCode */
2146         set_bit(STATUS_ALIVE, &priv->status);
2147
2148         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2149                 /* Enable timer to monitor the driver queues */
2150                 mod_timer(&priv->monitor_recover,
2151                         jiffies +
2152                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2153         }
2154
2155         if (iwl_is_rfkill(priv))
2156                 return;
2157
2158         ieee80211_wake_queues(priv->hw);
2159
2160         priv->active_rate = IWL_RATES_MASK;
2161
2162         /* Configure Tx antenna selection based on H/W config */
2163         if (priv->cfg->ops->hcmd->set_tx_ant)
2164                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2165
2166         if (iwl_is_associated(priv)) {
2167                 struct iwl_rxon_cmd *active_rxon =
2168                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2169                 /* apply any changes in staging */
2170                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2171                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2172         } else {
2173                 /* Initialize our rx_config data */
2174                 iwl_connection_init_rx_config(priv, priv->iw_mode);
2175
2176                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2177                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2178
2179                 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2180         }
2181
2182         /* Configure Bluetooth device coexistence support */
2183         priv->cfg->ops->hcmd->send_bt_config(priv);
2184
2185         iwl_reset_run_time_calib(priv);
2186
2187         /* Configure the adapter for unassociated operation */
2188         iwlcore_commit_rxon(priv);
2189
2190         /* At this point, the NIC is initialized and operational */
2191         iwl_rf_kill_ct_config(priv);
2192
2193         iwl_leds_init(priv);
2194
2195         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2196         set_bit(STATUS_READY, &priv->status);
2197         wake_up_interruptible(&priv->wait_command_queue);
2198
2199         iwl_power_update_mode(priv, true);
2200         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2201
2202
2203         return;
2204
2205  restart:
2206         queue_work(priv->workqueue, &priv->restart);
2207 }
2208
2209 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2210
2211 static void __iwl_down(struct iwl_priv *priv)
2212 {
2213         unsigned long flags;
2214         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2215
2216         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2217
2218         if (!exit_pending)
2219                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2220
2221         iwl_clear_ucode_stations(priv, true);
2222
2223         /* Unblock any waiting calls */
2224         wake_up_interruptible_all(&priv->wait_command_queue);
2225
2226         /* Wipe out the EXIT_PENDING status bit if we are not actually
2227          * exiting the module */
2228         if (!exit_pending)
2229                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2230
2231         /* stop and reset the on-board processor */
2232         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2233
2234         /* tell the device to stop sending interrupts */
2235         spin_lock_irqsave(&priv->lock, flags);
2236         iwl_disable_interrupts(priv);
2237         spin_unlock_irqrestore(&priv->lock, flags);
2238         iwl_synchronize_irq(priv);
2239
2240         if (priv->mac80211_registered)
2241                 ieee80211_stop_queues(priv->hw);
2242
2243         /* If we have not previously called iwl_init() then
2244          * clear all bits but the RF Kill bit and return */
2245         if (!iwl_is_init(priv)) {
2246                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2247                                         STATUS_RF_KILL_HW |
2248                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2249                                         STATUS_GEO_CONFIGURED |
2250                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2251                                         STATUS_EXIT_PENDING;
2252                 goto exit;
2253         }
2254
2255         /* ...otherwise clear out all the status bits but the RF Kill
2256          * bit and continue taking the NIC down. */
2257         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2258                                 STATUS_RF_KILL_HW |
2259                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2260                                 STATUS_GEO_CONFIGURED |
2261                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2262                                 STATUS_FW_ERROR |
2263                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2264                                 STATUS_EXIT_PENDING;
2265
2266         /* device going down, Stop using ICT table */
2267         iwl_disable_ict(priv);
2268
2269         iwlagn_txq_ctx_stop(priv);
2270         iwlagn_rxq_stop(priv);
2271
2272         /* Power-down device's busmaster DMA clocks */
2273         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2274         udelay(5);
2275
2276         /* Make sure (redundant) we've released our request to stay awake */
2277         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2278
2279         /* Stop the device, and put it in low power state */
2280         priv->cfg->ops->lib->apm_ops.stop(priv);
2281
2282  exit:
2283         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2284
2285         if (priv->ibss_beacon)
2286                 dev_kfree_skb(priv->ibss_beacon);
2287         priv->ibss_beacon = NULL;
2288
2289         /* clear out any free frames */
2290         iwl_clear_free_frames(priv);
2291 }
2292
2293 static void iwl_down(struct iwl_priv *priv)
2294 {
2295         mutex_lock(&priv->mutex);
2296         __iwl_down(priv);
2297         mutex_unlock(&priv->mutex);
2298
2299         iwl_cancel_deferred_work(priv);
2300 }
2301
2302 #define HW_READY_TIMEOUT (50)
2303
2304 static int iwl_set_hw_ready(struct iwl_priv *priv)
2305 {
2306         int ret = 0;
2307
2308         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2309                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2310
2311         /* See if we got it */
2312         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2313                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2314                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2315                                 HW_READY_TIMEOUT);
2316         if (ret != -ETIMEDOUT)
2317                 priv->hw_ready = true;
2318         else
2319                 priv->hw_ready = false;
2320
2321         IWL_DEBUG_INFO(priv, "hardware %s\n",
2322                       (priv->hw_ready == 1) ? "ready" : "not ready");
2323         return ret;
2324 }
2325
2326 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2327 {
2328         int ret = 0;
2329
2330         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2331
2332         ret = iwl_set_hw_ready(priv);
2333         if (priv->hw_ready)
2334                 return ret;
2335
2336         /* If HW is not ready, prepare the conditions to check again */
2337         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2338                         CSR_HW_IF_CONFIG_REG_PREPARE);
2339
2340         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2341                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2342                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2343
2344         /* HW should be ready by now, check again. */
2345         if (ret != -ETIMEDOUT)
2346                 iwl_set_hw_ready(priv);
2347
2348         return ret;
2349 }
2350
2351 #define MAX_HW_RESTARTS 5
2352
2353 static int __iwl_up(struct iwl_priv *priv)
2354 {
2355         int i;
2356         int ret;
2357
2358         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2359                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2360                 return -EIO;
2361         }
2362
2363         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2364                 IWL_ERR(priv, "ucode not available for device bringup\n");
2365                 return -EIO;
2366         }
2367
2368         iwl_prepare_card_hw(priv);
2369
2370         if (!priv->hw_ready) {
2371                 IWL_WARN(priv, "Exit HW not ready\n");
2372                 return -EIO;
2373         }
2374
2375         /* If platform's RF_KILL switch is NOT set to KILL */
2376         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2377                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2378         else
2379                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2380
2381         if (iwl_is_rfkill(priv)) {
2382                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2383
2384                 iwl_enable_interrupts(priv);
2385                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2386                 return 0;
2387         }
2388
2389         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2390
2391         ret = iwlagn_hw_nic_init(priv);
2392         if (ret) {
2393                 IWL_ERR(priv, "Unable to init nic\n");
2394                 return ret;
2395         }
2396
2397         /* make sure rfkill handshake bits are cleared */
2398         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2399         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2400                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2401
2402         /* clear (again), then enable host interrupts */
2403         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2404         iwl_enable_interrupts(priv);
2405
2406         /* really make sure rfkill handshake bits are cleared */
2407         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2408         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2409
2410         /* Copy original ucode data image from disk into backup cache.
2411          * This will be used to initialize the on-board processor's
2412          * data SRAM for a clean start when the runtime program first loads. */
2413         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2414                priv->ucode_data.len);
2415
2416         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2417
2418                 /* load bootstrap state machine,
2419                  * load bootstrap program into processor's memory,
2420                  * prepare to load the "initialize" uCode */
2421                 ret = priv->cfg->ops->lib->load_ucode(priv);
2422
2423                 if (ret) {
2424                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2425                                 ret);
2426                         continue;
2427                 }
2428
2429                 /* start card; "initialize" will load runtime ucode */
2430                 iwl_nic_start(priv);
2431
2432                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2433
2434                 return 0;
2435         }
2436
2437         set_bit(STATUS_EXIT_PENDING, &priv->status);
2438         __iwl_down(priv);
2439         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2440
2441         /* tried to restart and config the device for as long as our
2442          * patience could withstand */
2443         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2444         return -EIO;
2445 }
2446
2447
2448 /*****************************************************************************
2449  *
2450  * Workqueue callbacks
2451  *
2452  *****************************************************************************/
2453
2454 static void iwl_bg_init_alive_start(struct work_struct *data)
2455 {
2456         struct iwl_priv *priv =
2457             container_of(data, struct iwl_priv, init_alive_start.work);
2458
2459         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2460                 return;
2461
2462         mutex_lock(&priv->mutex);
2463         priv->cfg->ops->lib->init_alive_start(priv);
2464         mutex_unlock(&priv->mutex);
2465 }
2466
2467 static void iwl_bg_alive_start(struct work_struct *data)
2468 {
2469         struct iwl_priv *priv =
2470             container_of(data, struct iwl_priv, alive_start.work);
2471
2472         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2473                 return;
2474
2475         /* enable dram interrupt */
2476         iwl_reset_ict(priv);
2477
2478         mutex_lock(&priv->mutex);
2479         iwl_alive_start(priv);
2480         mutex_unlock(&priv->mutex);
2481 }
2482
2483 static void iwl_bg_run_time_calib_work(struct work_struct *work)
2484 {
2485         struct iwl_priv *priv = container_of(work, struct iwl_priv,
2486                         run_time_calib_work);
2487
2488         mutex_lock(&priv->mutex);
2489
2490         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
2491             test_bit(STATUS_SCANNING, &priv->status)) {
2492                 mutex_unlock(&priv->mutex);
2493                 return;
2494         }
2495
2496         if (priv->start_calib) {
2497                 iwl_chain_noise_calibration(priv, &priv->statistics);
2498
2499                 iwl_sensitivity_calibration(priv, &priv->statistics);
2500         }
2501
2502         mutex_unlock(&priv->mutex);
2503         return;
2504 }
2505
2506 static void iwl_bg_restart(struct work_struct *data)
2507 {
2508         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2509
2510         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2511                 return;
2512
2513         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2514                 mutex_lock(&priv->mutex);
2515                 priv->vif = NULL;
2516                 priv->is_open = 0;
2517                 mutex_unlock(&priv->mutex);
2518                 iwl_down(priv);
2519                 ieee80211_restart_hw(priv->hw);
2520         } else {
2521                 iwl_down(priv);
2522
2523                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2524                         return;
2525
2526                 mutex_lock(&priv->mutex);
2527                 __iwl_up(priv);
2528                 mutex_unlock(&priv->mutex);
2529         }
2530 }
2531
2532 static void iwl_bg_rx_replenish(struct work_struct *data)
2533 {
2534         struct iwl_priv *priv =
2535             container_of(data, struct iwl_priv, rx_replenish);
2536
2537         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2538                 return;
2539
2540         mutex_lock(&priv->mutex);
2541         iwlagn_rx_replenish(priv);
2542         mutex_unlock(&priv->mutex);
2543 }
2544
2545 #define IWL_DELAY_NEXT_SCAN (HZ*2)
2546
2547 void iwl_post_associate(struct iwl_priv *priv)
2548 {
2549         struct ieee80211_conf *conf = NULL;
2550         int ret = 0;
2551
2552         if (priv->iw_mode == NL80211_IFTYPE_AP) {
2553                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
2554                 return;
2555         }
2556
2557         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2558                 return;
2559
2560
2561         if (!priv->vif || !priv->is_open)
2562                 return;
2563
2564         iwl_scan_cancel_timeout(priv, 200);
2565
2566         conf = ieee80211_get_hw_conf(priv->hw);
2567
2568         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2569         iwlcore_commit_rxon(priv);
2570
2571         iwl_setup_rxon_timing(priv);
2572         ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2573                               sizeof(priv->rxon_timing), &priv->rxon_timing);
2574         if (ret)
2575                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2576                             "Attempting to continue.\n");
2577
2578         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2579
2580         iwl_set_rxon_ht(priv, &priv->current_ht_config);
2581
2582         if (priv->cfg->ops->hcmd->set_rxon_chain)
2583                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2584
2585         priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2586
2587         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2588                         priv->assoc_id, priv->beacon_int);
2589
2590         if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2591                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2592         else
2593                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2594
2595         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2596                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2597                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2598                 else
2599                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2600
2601                 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2602                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2603
2604         }
2605
2606         iwlcore_commit_rxon(priv);
2607
2608         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2609                         priv->assoc_id, priv->active_rxon.bssid_addr);
2610
2611         switch (priv->iw_mode) {
2612         case NL80211_IFTYPE_STATION:
2613                 break;
2614         case NL80211_IFTYPE_ADHOC:
2615                 /* assume default assoc id */
2616                 priv->assoc_id = 1;
2617                 iwl_send_beacon_cmd(priv);
2618                 break;
2619         default:
2620                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2621                           __func__, priv->iw_mode);
2622                 break;
2623         }
2624
2625         /* the chain noise calibration will enabled PM upon completion
2626          * If chain noise has already been run, then we need to enable
2627          * power management here */
2628         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
2629                 iwl_power_update_mode(priv, false);
2630
2631         /* Enable Rx differential gain and sensitivity calibrations */
2632         iwl_chain_noise_reset(priv);
2633         priv->start_calib = 1;
2634
2635 }
2636
2637 /*****************************************************************************
2638  *
2639  * mac80211 entry point functions
2640  *
2641  *****************************************************************************/
2642
2643 #define UCODE_READY_TIMEOUT     (4 * HZ)
2644
2645 /*
2646  * Not a mac80211 entry point function, but it fits in with all the
2647  * other mac80211 functions grouped here.
2648  */
2649 static int iwl_mac_setup_register(struct iwl_priv *priv)
2650 {
2651         int ret;
2652         struct ieee80211_hw *hw = priv->hw;
2653         hw->rate_control_algorithm = "iwl-agn-rs";
2654
2655         /* Tell mac80211 our characteristics */
2656         hw->flags = IEEE80211_HW_SIGNAL_DBM |
2657                     IEEE80211_HW_AMPDU_AGGREGATION |
2658                     IEEE80211_HW_SPECTRUM_MGMT;
2659
2660         if (!priv->cfg->broken_powersave)
2661                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2662                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2663
2664         if (priv->cfg->sku & IWL_SKU_N)
2665                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2666                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2667
2668         hw->sta_data_size = sizeof(struct iwl_station_priv);
2669         hw->wiphy->interface_modes =
2670                 BIT(NL80211_IFTYPE_STATION) |
2671                 BIT(NL80211_IFTYPE_ADHOC);
2672
2673         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2674                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
2675
2676         /*
2677          * For now, disable PS by default because it affects
2678          * RX performance significantly.
2679          */
2680         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2681
2682         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2683         /* we create the 802.11 header and a zero-length SSID element */
2684         hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2685
2686         /* Default value; 4 EDCA QOS priorities */
2687         hw->queues = 4;
2688
2689         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2690
2691         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2692                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2693                         &priv->bands[IEEE80211_BAND_2GHZ];
2694         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2695                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2696                         &priv->bands[IEEE80211_BAND_5GHZ];
2697
2698         ret = ieee80211_register_hw(priv->hw);
2699         if (ret) {
2700                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2701                 return ret;
2702         }
2703         priv->mac80211_registered = 1;
2704
2705         return 0;
2706 }
2707
2708
2709 static int iwl_mac_start(struct ieee80211_hw *hw)
2710 {
2711         struct iwl_priv *priv = hw->priv;
2712         int ret;
2713
2714         IWL_DEBUG_MAC80211(priv, "enter\n");
2715
2716         /* we should be verifying the device is ready to be opened */
2717         mutex_lock(&priv->mutex);
2718         ret = __iwl_up(priv);
2719         mutex_unlock(&priv->mutex);
2720
2721         if (ret)
2722                 return ret;
2723
2724         if (iwl_is_rfkill(priv))
2725                 goto out;
2726
2727         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
2728
2729         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
2730          * mac80211 will not be run successfully. */
2731         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
2732                         test_bit(STATUS_READY, &priv->status),
2733                         UCODE_READY_TIMEOUT);
2734         if (!ret) {
2735                 if (!test_bit(STATUS_READY, &priv->status)) {
2736                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
2737                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2738                         return -ETIMEDOUT;
2739                 }
2740         }
2741
2742         iwl_led_start(priv);
2743
2744 out:
2745         priv->is_open = 1;
2746         IWL_DEBUG_MAC80211(priv, "leave\n");
2747         return 0;
2748 }
2749
2750 static void iwl_mac_stop(struct ieee80211_hw *hw)
2751 {
2752         struct iwl_priv *priv = hw->priv;
2753
2754         IWL_DEBUG_MAC80211(priv, "enter\n");
2755
2756         if (!priv->is_open)
2757                 return;
2758
2759         priv->is_open = 0;
2760
2761         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
2762                 /* stop mac, cancel any scan request and clear
2763                  * RXON_FILTER_ASSOC_MSK BIT
2764                  */
2765                 mutex_lock(&priv->mutex);
2766                 iwl_scan_cancel_timeout(priv, 100);
2767                 mutex_unlock(&priv->mutex);
2768         }
2769
2770         iwl_down(priv);
2771
2772         flush_workqueue(priv->workqueue);
2773
2774         /* enable interrupts again in order to receive rfkill changes */
2775         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2776         iwl_enable_interrupts(priv);
2777
2778         IWL_DEBUG_MAC80211(priv, "leave\n");
2779 }
2780
2781 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2782 {
2783         struct iwl_priv *priv = hw->priv;
2784
2785         IWL_DEBUG_MACDUMP(priv, "enter\n");
2786
2787         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2788                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2789
2790         if (iwlagn_tx_skb(priv, skb))
2791                 dev_kfree_skb_any(skb);
2792
2793         IWL_DEBUG_MACDUMP(priv, "leave\n");
2794         return NETDEV_TX_OK;
2795 }
2796
2797 void iwl_config_ap(struct iwl_priv *priv)
2798 {
2799         int ret = 0;
2800
2801         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2802                 return;
2803
2804         /* The following should be done only at AP bring up */
2805         if (!iwl_is_associated(priv)) {
2806
2807                 /* RXON - unassoc (to set timing command) */
2808                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2809                 iwlcore_commit_rxon(priv);
2810
2811                 /* RXON Timing */
2812                 iwl_setup_rxon_timing(priv);
2813                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
2814                                 sizeof(priv->rxon_timing), &priv->rxon_timing);
2815                 if (ret)
2816                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2817                                         "Attempting to continue.\n");
2818
2819                 /* AP has all antennas */
2820                 priv->chain_noise_data.active_chains =
2821                         priv->hw_params.valid_rx_ant;
2822                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2823                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2824                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2825
2826                 /* FIXME: what should be the assoc_id for AP? */
2827                 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
2828                 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
2829                         priv->staging_rxon.flags |=
2830                                 RXON_FLG_SHORT_PREAMBLE_MSK;
2831                 else
2832                         priv->staging_rxon.flags &=
2833                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2834
2835                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
2836                         if (priv->assoc_capability &
2837                                 WLAN_CAPABILITY_SHORT_SLOT_TIME)
2838                                 priv->staging_rxon.flags |=
2839                                         RXON_FLG_SHORT_SLOT_MSK;
2840                         else
2841                                 priv->staging_rxon.flags &=
2842                                         ~RXON_FLG_SHORT_SLOT_MSK;
2843
2844                         if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
2845                                 priv->staging_rxon.flags &=
2846                                         ~RXON_FLG_SHORT_SLOT_MSK;
2847                 }
2848                 /* restore RXON assoc */
2849                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2850                 iwlcore_commit_rxon(priv);
2851                 iwl_add_bcast_station(priv);
2852         }
2853         iwl_send_beacon_cmd(priv);
2854
2855         /* FIXME - we need to add code here to detect a totally new
2856          * configuration, reset the AP, unassoc, rxon timing, assoc,
2857          * clear sta table, add BCAST sta... */
2858 }
2859
2860 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2861                                     struct ieee80211_vif *vif,
2862                                     struct ieee80211_key_conf *keyconf,
2863                                     struct ieee80211_sta *sta,
2864                                     u32 iv32, u16 *phase1key)
2865 {
2866
2867         struct iwl_priv *priv = hw->priv;
2868         IWL_DEBUG_MAC80211(priv, "enter\n");
2869
2870         iwl_update_tkip_key(priv, keyconf,
2871                             sta ? sta->addr : iwl_bcast_addr,
2872                             iv32, phase1key);
2873
2874         IWL_DEBUG_MAC80211(priv, "leave\n");
2875 }
2876
2877 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2878                            struct ieee80211_vif *vif,
2879                            struct ieee80211_sta *sta,
2880                            struct ieee80211_key_conf *key)
2881 {
2882         struct iwl_priv *priv = hw->priv;
2883         const u8 *addr;
2884         int ret;
2885         u8 sta_id;
2886         bool is_default_wep_key = false;
2887
2888         IWL_DEBUG_MAC80211(priv, "enter\n");
2889
2890         if (priv->cfg->mod_params->sw_crypto) {
2891                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2892                 return -EOPNOTSUPP;
2893         }
2894         addr = sta ? sta->addr : iwl_bcast_addr;
2895         sta_id = iwl_find_station(priv, addr);
2896         if (sta_id == IWL_INVALID_STATION) {
2897                 IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
2898                                    addr);
2899                 return -EINVAL;
2900
2901         }
2902
2903         mutex_lock(&priv->mutex);
2904         iwl_scan_cancel_timeout(priv, 100);
2905
2906         /*
2907          * If we are getting WEP group key and we didn't receive any key mapping
2908          * so far, we are in legacy wep mode (group key only), otherwise we are
2909          * in 1X mode.
2910          * In legacy wep mode, we use another host command to the uCode.
2911          */
2912         if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) {
2913                 if (cmd == SET_KEY)
2914                         is_default_wep_key = !priv->key_mapping_key;
2915                 else
2916                         is_default_wep_key =
2917                                         (key->hw_key_idx == HW_KEY_DEFAULT);
2918         }
2919
2920         switch (cmd) {
2921         case SET_KEY:
2922                 if (is_default_wep_key)
2923                         ret = iwl_set_default_wep_key(priv, key);
2924                 else
2925                         ret = iwl_set_dynamic_key(priv, key, sta_id);
2926
2927                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
2928                 break;
2929         case DISABLE_KEY:
2930                 if (is_default_wep_key)
2931                         ret = iwl_remove_default_wep_key(priv, key);
2932                 else
2933                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
2934
2935                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
2936                 break;
2937         default:
2938                 ret = -EINVAL;
2939         }
2940
2941         mutex_unlock(&priv->mutex);
2942         IWL_DEBUG_MAC80211(priv, "leave\n");
2943
2944         return ret;
2945 }
2946
2947 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2948                                 struct ieee80211_vif *vif,
2949                              enum ieee80211_ampdu_mlme_action action,
2950                              struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2951 {
2952         struct iwl_priv *priv = hw->priv;
2953         int ret;
2954
2955         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
2956                      sta->addr, tid);
2957
2958         if (!(priv->cfg->sku & IWL_SKU_N))
2959                 return -EACCES;
2960
2961         switch (action) {
2962         case IEEE80211_AMPDU_RX_START:
2963                 IWL_DEBUG_HT(priv, "start Rx\n");
2964                 return iwl_sta_rx_agg_start(priv, sta->addr, tid, *ssn);
2965         case IEEE80211_AMPDU_RX_STOP:
2966                 IWL_DEBUG_HT(priv, "stop Rx\n");
2967                 ret = iwl_sta_rx_agg_stop(priv, sta->addr, tid);
2968                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2969                         return 0;
2970                 else
2971                         return ret;
2972         case IEEE80211_AMPDU_TX_START:
2973                 IWL_DEBUG_HT(priv, "start Tx\n");
2974                 ret = iwlagn_tx_agg_start(priv, sta->addr, tid, ssn);
2975                 if (ret == 0) {
2976                         priv->_agn.agg_tids_count++;
2977                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2978                                      priv->_agn.agg_tids_count);
2979                 }
2980                 return ret;
2981         case IEEE80211_AMPDU_TX_STOP:
2982                 IWL_DEBUG_HT(priv, "stop Tx\n");
2983                 ret = iwlagn_tx_agg_stop(priv, sta->addr, tid);
2984                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
2985                         priv->_agn.agg_tids_count--;
2986                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
2987                                      priv->_agn.agg_tids_count);
2988                 }
2989                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2990                         return 0;
2991                 else
2992                         return ret;
2993         case IEEE80211_AMPDU_TX_OPERATIONAL:
2994                 /* do nothing */
2995                 return -EOPNOTSUPP;
2996         default:
2997                 IWL_DEBUG_HT(priv, "unknown\n");
2998                 return -EINVAL;
2999                 break;
3000         }
3001         return 0;
3002 }
3003
3004 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3005                                struct ieee80211_vif *vif,
3006                                enum sta_notify_cmd cmd,
3007                                struct ieee80211_sta *sta)
3008 {
3009         struct iwl_priv *priv = hw->priv;
3010         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3011         int sta_id;
3012
3013         switch (cmd) {
3014         case STA_NOTIFY_SLEEP:
3015                 WARN_ON(!sta_priv->client);
3016                 sta_priv->asleep = true;
3017                 if (atomic_read(&sta_priv->pending_frames) > 0)
3018                         ieee80211_sta_block_awake(hw, sta, true);
3019                 break;
3020         case STA_NOTIFY_AWAKE:
3021                 WARN_ON(!sta_priv->client);
3022                 if (!sta_priv->asleep)
3023                         break;
3024                 sta_priv->asleep = false;
3025                 sta_id = iwl_find_station(priv, sta->addr);
3026                 if (sta_id != IWL_INVALID_STATION)
3027                         iwl_sta_modify_ps_wake(priv, sta_id);
3028                 break;
3029         default:
3030                 break;
3031         }
3032 }
3033
3034 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3035                               struct ieee80211_vif *vif,
3036                               struct ieee80211_sta *sta)
3037 {
3038         struct iwl_priv *priv = hw->priv;
3039         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3040         bool is_ap = priv->iw_mode == NL80211_IFTYPE_STATION;
3041         int ret;
3042         u8 sta_id;
3043
3044         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3045                         sta->addr);
3046
3047         atomic_set(&sta_priv->pending_frames, 0);
3048         if (vif->type == NL80211_IFTYPE_AP)
3049                 sta_priv->client = true;
3050
3051         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3052                                      &sta_id);
3053         if (ret) {
3054                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3055                         sta->addr, ret);
3056                 /* Should we return success if return code is EEXIST ? */
3057                 return ret;
3058         }
3059
3060         /* Initialize rate scaling */
3061         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3062                        sta->addr);
3063         iwl_rs_rate_init(priv, sta, sta_id);
3064
3065         return ret;
3066 }
3067
3068 /*****************************************************************************
3069  *
3070  * sysfs attributes
3071  *
3072  *****************************************************************************/
3073
3074 #ifdef CONFIG_IWLWIFI_DEBUG
3075
3076 /*
3077  * The following adds a new attribute to the sysfs representation
3078  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
3079  * used for controlling the debug level.
3080  *
3081  * See the level definitions in iwl for details.
3082  *
3083  * The debug_level being managed using sysfs below is a per device debug
3084  * level that is used instead of the global debug level if it (the per
3085  * device debug level) is set.
3086  */
3087 static ssize_t show_debug_level(struct device *d,
3088                                 struct device_attribute *attr, char *buf)
3089 {
3090         struct iwl_priv *priv = dev_get_drvdata(d);
3091         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
3092 }
3093 static ssize_t store_debug_level(struct device *d,
3094                                 struct device_attribute *attr,
3095                                  const char *buf, size_t count)
3096 {
3097         struct iwl_priv *priv = dev_get_drvdata(d);
3098         unsigned long val;
3099         int ret;
3100
3101         ret = strict_strtoul(buf, 0, &val);
3102         if (ret)
3103                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
3104         else {
3105                 priv->debug_level = val;
3106                 if (iwl_alloc_traffic_mem(priv))
3107                         IWL_ERR(priv,
3108                                 "Not enough memory to generate traffic log\n");
3109         }
3110         return strnlen(buf, count);
3111 }
3112
3113 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3114                         show_debug_level, store_debug_level);
3115
3116
3117 #endif /* CONFIG_IWLWIFI_DEBUG */
3118
3119
3120 static ssize_t show_temperature(struct device *d,
3121                                 struct device_attribute *attr, char *buf)
3122 {
3123         struct iwl_priv *priv = dev_get_drvdata(d);
3124
3125         if (!iwl_is_alive(priv))
3126                 return -EAGAIN;
3127
3128         return sprintf(buf, "%d\n", priv->temperature);
3129 }
3130
3131 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
3132
3133 static ssize_t show_tx_power(struct device *d,
3134                              struct device_attribute *attr, char *buf)
3135 {
3136         struct iwl_priv *priv = dev_get_drvdata(d);
3137
3138         if (!iwl_is_ready_rf(priv))
3139                 return sprintf(buf, "off\n");
3140         else
3141                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3142 }
3143
3144 static ssize_t store_tx_power(struct device *d,
3145                               struct device_attribute *attr,
3146                               const char *buf, size_t count)
3147 {
3148         struct iwl_priv *priv = dev_get_drvdata(d);
3149         unsigned long val;
3150         int ret;
3151
3152         ret = strict_strtoul(buf, 10, &val);
3153         if (ret)
3154                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
3155         else {
3156                 ret = iwl_set_tx_power(priv, val, false);
3157                 if (ret)
3158                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
3159                                 ret);
3160                 else
3161                         ret = count;
3162         }
3163         return ret;
3164 }
3165
3166 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
3167
3168 static ssize_t show_rts_ht_protection(struct device *d,
3169                              struct device_attribute *attr, char *buf)
3170 {
3171         struct iwl_priv *priv = dev_get_drvdata(d);
3172
3173         return sprintf(buf, "%s\n",
3174                 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3175 }
3176
3177 static ssize_t store_rts_ht_protection(struct device *d,
3178                               struct device_attribute *attr,
3179                               const char *buf, size_t count)
3180 {
3181         struct iwl_priv *priv = dev_get_drvdata(d);
3182         unsigned long val;
3183         int ret;
3184
3185         ret = strict_strtoul(buf, 10, &val);
3186         if (ret)
3187                 IWL_INFO(priv, "Input is not in decimal form.\n");
3188         else {
3189                 if (!iwl_is_associated(priv))
3190                         priv->cfg->use_rts_for_ht = val ? true : false;
3191                 else
3192                         IWL_ERR(priv, "Sta associated with AP - "
3193                                 "Change protection mechanism is not allowed\n");
3194                 ret = count;
3195         }
3196         return ret;
3197 }
3198
3199 static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3200                         show_rts_ht_protection, store_rts_ht_protection);
3201
3202
3203 /*****************************************************************************
3204  *
3205  * driver setup and teardown
3206  *
3207  *****************************************************************************/
3208
3209 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3210 {
3211         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3212
3213         init_waitqueue_head(&priv->wait_command_queue);
3214
3215         INIT_WORK(&priv->restart, iwl_bg_restart);
3216         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3217         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3218         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3219         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3220         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3221
3222         iwl_setup_scan_deferred_work(priv);
3223
3224         if (priv->cfg->ops->lib->setup_deferred_work)
3225                 priv->cfg->ops->lib->setup_deferred_work(priv);
3226
3227         init_timer(&priv->statistics_periodic);
3228         priv->statistics_periodic.data = (unsigned long)priv;
3229         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3230
3231         init_timer(&priv->ucode_trace);
3232         priv->ucode_trace.data = (unsigned long)priv;
3233         priv->ucode_trace.function = iwl_bg_ucode_trace;
3234
3235         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3236                 init_timer(&priv->monitor_recover);
3237                 priv->monitor_recover.data = (unsigned long)priv;
3238                 priv->monitor_recover.function =
3239                         priv->cfg->ops->lib->recover_from_tx_stall;
3240         }
3241
3242         if (!priv->cfg->use_isr_legacy)
3243                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3244                         iwl_irq_tasklet, (unsigned long)priv);
3245         else
3246                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3247                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3248 }
3249
3250 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3251 {
3252         if (priv->cfg->ops->lib->cancel_deferred_work)
3253                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3254
3255         cancel_delayed_work_sync(&priv->init_alive_start);
3256         cancel_delayed_work(&priv->scan_check);
3257         cancel_work_sync(&priv->start_internal_scan);
3258         cancel_delayed_work(&priv->alive_start);
3259         cancel_work_sync(&priv->beacon_update);
3260         del_timer_sync(&priv->statistics_periodic);
3261         del_timer_sync(&priv->ucode_trace);
3262         if (priv->cfg->ops->lib->recover_from_tx_stall)
3263                 del_timer_sync(&priv->monitor_recover);
3264 }
3265
3266 static void iwl_init_hw_rates(struct iwl_priv *priv,
3267                               struct ieee80211_rate *rates)
3268 {
3269         int i;
3270
3271         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3272                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3273                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3274                 rates[i].hw_value_short = i;
3275                 rates[i].flags = 0;
3276                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3277                         /*
3278                          * If CCK != 1M then set short preamble rate flag.
3279                          */
3280                         rates[i].flags |=
3281                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3282                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3283                 }
3284         }
3285 }
3286
3287 static int iwl_init_drv(struct iwl_priv *priv)
3288 {
3289         int ret;
3290
3291         priv->ibss_beacon = NULL;
3292
3293         spin_lock_init(&priv->sta_lock);
3294         spin_lock_init(&priv->hcmd_lock);
3295
3296         INIT_LIST_HEAD(&priv->free_frames);
3297
3298         mutex_init(&priv->mutex);
3299         mutex_init(&priv->sync_cmd_mutex);
3300
3301         priv->ieee_channels = NULL;
3302         priv->ieee_rates = NULL;
3303         priv->band = IEEE80211_BAND_2GHZ;
3304
3305         priv->iw_mode = NL80211_IFTYPE_STATION;
3306         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3307         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3308         priv->_agn.agg_tids_count = 0;
3309
3310         /* initialize force reset */
3311         priv->force_reset[IWL_RF_RESET].reset_duration =
3312                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3313         priv->force_reset[IWL_FW_RESET].reset_duration =
3314                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3315
3316         /* Choose which receivers/antennas to use */
3317         if (priv->cfg->ops->hcmd->set_rxon_chain)
3318                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3319
3320         iwl_init_scan_params(priv);
3321
3322         /* Set the tx_power_user_lmt to the lowest power level
3323          * this value will get overwritten by channel max power avg
3324          * from eeprom */
3325         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3326
3327         ret = iwl_init_channel_map(priv);
3328         if (ret) {
3329                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3330                 goto err;
3331         }
3332
3333         ret = iwlcore_init_geos(priv);
3334         if (ret) {
3335                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3336                 goto err_free_channel_map;
3337         }
3338         iwl_init_hw_rates(priv, priv->ieee_rates);
3339
3340         return 0;
3341
3342 err_free_channel_map:
3343         iwl_free_channel_map(priv);
3344 err:
3345         return ret;
3346 }
3347
3348 static void iwl_uninit_drv(struct iwl_priv *priv)
3349 {
3350         iwl_calib_free_results(priv);
3351         iwlcore_free_geos(priv);
3352         iwl_free_channel_map(priv);
3353         kfree(priv->scan_cmd);
3354 }
3355
3356 static struct attribute *iwl_sysfs_entries[] = {
3357         &dev_attr_temperature.attr,
3358         &dev_attr_tx_power.attr,
3359         &dev_attr_rts_ht_protection.attr,
3360 #ifdef CONFIG_IWLWIFI_DEBUG
3361         &dev_attr_debug_level.attr,
3362 #endif
3363         NULL
3364 };
3365
3366 static struct attribute_group iwl_attribute_group = {
3367         .name = NULL,           /* put in device directory */
3368         .attrs = iwl_sysfs_entries,
3369 };
3370
3371 static struct ieee80211_ops iwl_hw_ops = {
3372         .tx = iwl_mac_tx,
3373         .start = iwl_mac_start,
3374         .stop = iwl_mac_stop,
3375         .add_interface = iwl_mac_add_interface,
3376         .remove_interface = iwl_mac_remove_interface,
3377         .config = iwl_mac_config,
3378         .configure_filter = iwl_configure_filter,
3379         .set_key = iwl_mac_set_key,
3380         .update_tkip_key = iwl_mac_update_tkip_key,
3381         .conf_tx = iwl_mac_conf_tx,
3382         .reset_tsf = iwl_mac_reset_tsf,
3383         .bss_info_changed = iwl_bss_info_changed,
3384         .ampdu_action = iwl_mac_ampdu_action,
3385         .hw_scan = iwl_mac_hw_scan,
3386         .sta_notify = iwl_mac_sta_notify,
3387         .sta_add = iwlagn_mac_sta_add,
3388         .sta_remove = iwl_mac_sta_remove,
3389 };
3390
3391 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3392 {
3393         int err = 0;
3394         struct iwl_priv *priv;
3395         struct ieee80211_hw *hw;
3396         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3397         unsigned long flags;
3398         u16 pci_cmd;
3399
3400         /************************
3401          * 1. Allocating HW data
3402          ************************/
3403
3404         /* Disabling hardware scan means that mac80211 will perform scans
3405          * "the hard way", rather than using device's scan. */
3406         if (cfg->mod_params->disable_hw_scan) {
3407                 if (iwl_debug_level & IWL_DL_INFO)
3408                         dev_printk(KERN_DEBUG, &(pdev->dev),
3409                                    "Disabling hw_scan\n");
3410                 iwl_hw_ops.hw_scan = NULL;
3411         }
3412
3413         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3414         if (!hw) {
3415                 err = -ENOMEM;
3416                 goto out;
3417         }
3418         priv = hw->priv;
3419         /* At this point both hw and priv are allocated. */
3420
3421         SET_IEEE80211_DEV(hw, &pdev->dev);
3422
3423         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3424         priv->cfg = cfg;
3425         priv->pci_dev = pdev;
3426         priv->inta_mask = CSR_INI_SET_MASK;
3427
3428 #ifdef CONFIG_IWLWIFI_DEBUG
3429         atomic_set(&priv->restrict_refcnt, 0);
3430 #endif
3431         if (iwl_alloc_traffic_mem(priv))
3432                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3433
3434         /**************************
3435          * 2. Initializing PCI bus
3436          **************************/
3437         if (pci_enable_device(pdev)) {
3438                 err = -ENODEV;
3439                 goto out_ieee80211_free_hw;
3440         }
3441
3442         pci_set_master(pdev);
3443
3444         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
3445         if (!err)
3446                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
3447         if (err) {
3448                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3449                 if (!err)
3450                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3451                 /* both attempts failed: */
3452                 if (err) {
3453                         IWL_WARN(priv, "No suitable DMA available.\n");
3454                         goto out_pci_disable_device;
3455                 }
3456         }
3457
3458         err = pci_request_regions(pdev, DRV_NAME);
3459         if (err)
3460                 goto out_pci_disable_device;
3461
3462         pci_set_drvdata(pdev, priv);
3463
3464
3465         /***********************
3466          * 3. Read REV register
3467          ***********************/
3468         priv->hw_base = pci_iomap(pdev, 0, 0);
3469         if (!priv->hw_base) {
3470                 err = -ENODEV;
3471                 goto out_pci_release_regions;
3472         }
3473
3474         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3475                 (unsigned long long) pci_resource_len(pdev, 0));
3476         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3477
3478         /* these spin locks will be used in apm_ops.init and EEPROM access
3479          * we should init now
3480          */
3481         spin_lock_init(&priv->reg_lock);
3482         spin_lock_init(&priv->lock);
3483
3484         /*
3485          * stop and reset the on-board processor just in case it is in a
3486          * strange state ... like being left stranded by a primary kernel
3487          * and this is now the kdump kernel trying to start up
3488          */
3489         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3490
3491         iwl_hw_detect(priv);
3492         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
3493                 priv->cfg->name, priv->hw_rev);
3494
3495         /* We disable the RETRY_TIMEOUT register (0x41) to keep
3496          * PCI Tx retries from interfering with C3 CPU state */
3497         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
3498
3499         iwl_prepare_card_hw(priv);
3500         if (!priv->hw_ready) {
3501                 IWL_WARN(priv, "Failed, HW not ready\n");
3502                 goto out_iounmap;
3503         }
3504
3505         /*****************
3506          * 4. Read EEPROM
3507          *****************/
3508         /* Read the EEPROM */
3509         err = iwl_eeprom_init(priv);
3510         if (err) {
3511                 IWL_ERR(priv, "Unable to init EEPROM\n");
3512                 goto out_iounmap;
3513         }
3514         err = iwl_eeprom_check_version(priv);
3515         if (err)
3516                 goto out_free_eeprom;
3517
3518         /* extract MAC Address */
3519         iwl_eeprom_get_mac(priv, priv->mac_addr);
3520         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
3521         SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
3522
3523         /************************
3524          * 5. Setup HW constants
3525          ************************/
3526         if (iwl_set_hw_params(priv)) {
3527                 IWL_ERR(priv, "failed to set hw parameters\n");
3528                 goto out_free_eeprom;
3529         }
3530
3531         /*******************
3532          * 6. Setup priv
3533          *******************/
3534
3535         err = iwl_init_drv(priv);
3536         if (err)
3537                 goto out_free_eeprom;
3538         /* At this point both hw and priv are initialized. */
3539
3540         /********************
3541          * 7. Setup services
3542          ********************/
3543         spin_lock_irqsave(&priv->lock, flags);
3544         iwl_disable_interrupts(priv);
3545         spin_unlock_irqrestore(&priv->lock, flags);
3546
3547         pci_enable_msi(priv->pci_dev);
3548
3549         iwl_alloc_isr_ict(priv);
3550         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
3551                           IRQF_SHARED, DRV_NAME, priv);
3552         if (err) {
3553                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3554                 goto out_disable_msi;
3555         }
3556         err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
3557         if (err) {
3558                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3559                 goto out_free_irq;
3560         }
3561
3562         iwl_setup_deferred_work(priv);
3563         iwl_setup_rx_handlers(priv);
3564
3565         /*********************************************
3566          * 8. Enable interrupts and read RFKILL state
3567          *********************************************/
3568
3569         /* enable interrupts if needed: hw bug w/a */
3570         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
3571         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
3572                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
3573                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
3574         }
3575
3576         iwl_enable_interrupts(priv);
3577
3578         /* If platform's RF_KILL switch is NOT set to KILL */
3579         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3580                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3581         else
3582                 set_bit(STATUS_RF_KILL_HW, &priv->status);
3583
3584         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
3585                 test_bit(STATUS_RF_KILL_HW, &priv->status));
3586
3587         iwl_power_initialize(priv);
3588         iwl_tt_initialize(priv);
3589
3590         init_completion(&priv->_agn.firmware_loading_complete);
3591
3592         err = iwl_request_firmware(priv, true);
3593         if (err)
3594                 goto out_remove_sysfs;
3595
3596         return 0;
3597
3598  out_remove_sysfs:
3599         destroy_workqueue(priv->workqueue);
3600         priv->workqueue = NULL;
3601         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3602  out_free_irq:
3603         free_irq(priv->pci_dev->irq, priv);
3604         iwl_free_isr_ict(priv);
3605  out_disable_msi:
3606         pci_disable_msi(priv->pci_dev);
3607         iwl_uninit_drv(priv);
3608  out_free_eeprom:
3609         iwl_eeprom_free(priv);
3610  out_iounmap:
3611         pci_iounmap(pdev, priv->hw_base);
3612  out_pci_release_regions:
3613         pci_set_drvdata(pdev, NULL);
3614         pci_release_regions(pdev);
3615  out_pci_disable_device:
3616         pci_disable_device(pdev);
3617  out_ieee80211_free_hw:
3618         iwl_free_traffic_mem(priv);
3619         ieee80211_free_hw(priv->hw);
3620  out:
3621         return err;
3622 }
3623
3624 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3625 {
3626         struct iwl_priv *priv = pci_get_drvdata(pdev);
3627         unsigned long flags;
3628
3629         if (!priv)
3630                 return;
3631
3632         wait_for_completion(&priv->_agn.firmware_loading_complete);
3633
3634         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3635
3636         iwl_dbgfs_unregister(priv);
3637         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
3638
3639         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
3640          * to be called and iwl_down since we are removing the device
3641          * we need to set STATUS_EXIT_PENDING bit.
3642          */
3643         set_bit(STATUS_EXIT_PENDING, &priv->status);
3644         if (priv->mac80211_registered) {
3645                 ieee80211_unregister_hw(priv->hw);
3646                 priv->mac80211_registered = 0;
3647         } else {
3648                 iwl_down(priv);
3649         }
3650
3651         /*
3652          * Make sure device is reset to low power before unloading driver.
3653          * This may be redundant with iwl_down(), but there are paths to
3654          * run iwl_down() without calling apm_ops.stop(), and there are
3655          * paths to avoid running iwl_down() at all before leaving driver.
3656          * This (inexpensive) call *makes sure* device is reset.
3657          */
3658         priv->cfg->ops->lib->apm_ops.stop(priv);
3659
3660         iwl_tt_exit(priv);
3661
3662         /* make sure we flush any pending irq or
3663          * tasklet for the driver
3664          */
3665         spin_lock_irqsave(&priv->lock, flags);
3666         iwl_disable_interrupts(priv);
3667         spin_unlock_irqrestore(&priv->lock, flags);
3668
3669         iwl_synchronize_irq(priv);
3670
3671         iwl_dealloc_ucode_pci(priv);
3672
3673         if (priv->rxq.bd)
3674                 iwlagn_rx_queue_free(priv, &priv->rxq);
3675         iwlagn_hw_txq_ctx_free(priv);
3676
3677         iwl_eeprom_free(priv);
3678
3679
3680         /*netif_stop_queue(dev); */
3681         flush_workqueue(priv->workqueue);
3682
3683         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
3684          * priv->workqueue... so we can't take down the workqueue
3685          * until now... */
3686         destroy_workqueue(priv->workqueue);
3687         priv->workqueue = NULL;
3688         iwl_free_traffic_mem(priv);
3689
3690         free_irq(priv->pci_dev->irq, priv);
3691         pci_disable_msi(priv->pci_dev);
3692         pci_iounmap(pdev, priv->hw_base);
3693         pci_release_regions(pdev);
3694         pci_disable_device(pdev);
3695         pci_set_drvdata(pdev, NULL);
3696
3697         iwl_uninit_drv(priv);
3698
3699         iwl_free_isr_ict(priv);
3700
3701         if (priv->ibss_beacon)
3702                 dev_kfree_skb(priv->ibss_beacon);
3703
3704         ieee80211_free_hw(priv->hw);
3705 }
3706
3707
3708 /*****************************************************************************
3709  *
3710  * driver and module entry point
3711  *
3712  *****************************************************************************/
3713
3714 /* Hardware specific file defines the PCI IDs table for that hardware module */
3715 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3716 #ifdef CONFIG_IWL4965
3717         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3718         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3719 #endif /* CONFIG_IWL4965 */
3720 #ifdef CONFIG_IWL5000
3721 /* 5100 Series WiFi */
3722         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3723         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3724         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3725         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3726         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3727         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3728         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3729         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3730         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3731         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3732         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3733         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3734         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3735         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3736         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3737         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3738         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3739         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3740         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3741         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3742         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3743         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3744         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3745         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3746
3747 /* 5300 Series WiFi */
3748         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3749         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3750         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3751         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3752         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3753         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3754         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3755         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3756         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3757         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3758         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3759         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3760
3761 /* 5350 Series WiFi/WiMax */
3762         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3763         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3764         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3765
3766 /* 5150 Series Wifi/WiMax */
3767         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3768         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3769         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3770         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3771         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3772         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3773
3774         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3775         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3776         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3777         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3778
3779 /* 6x00 Series */
3780         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3781         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3782         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3783         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3784         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3785         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3786         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3787         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3788         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3789         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3790
3791 /* 6x00 Series Gen2a */
3792         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
3793         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
3794         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
3795
3796 /* 6x50 WiFi/WiMax Series */
3797         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3798         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3799         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3800         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3801         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3802         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3803
3804 /* 1000 Series WiFi */
3805         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3806         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3807         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3808         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3809         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3810         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3811         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3812         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3813         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3814         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3815         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3816         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3817 #endif /* CONFIG_IWL5000 */
3818
3819         {0}
3820 };
3821 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
3822
3823 static struct pci_driver iwl_driver = {
3824         .name = DRV_NAME,
3825         .id_table = iwl_hw_card_ids,
3826         .probe = iwl_pci_probe,
3827         .remove = __devexit_p(iwl_pci_remove),
3828 #ifdef CONFIG_PM
3829         .suspend = iwl_pci_suspend,
3830         .resume = iwl_pci_resume,
3831 #endif
3832 };
3833
3834 static int __init iwl_init(void)
3835 {
3836
3837         int ret;
3838         printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
3839         printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
3840
3841         ret = iwlagn_rate_control_register();
3842         if (ret) {
3843                 printk(KERN_ERR DRV_NAME
3844                        "Unable to register rate control algorithm: %d\n", ret);
3845                 return ret;
3846         }
3847
3848         ret = pci_register_driver(&iwl_driver);
3849         if (ret) {
3850                 printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
3851                 goto error_register;
3852         }
3853
3854         return ret;
3855
3856 error_register:
3857         iwlagn_rate_control_unregister();
3858         return ret;
3859 }
3860
3861 static void __exit iwl_exit(void)
3862 {
3863         pci_unregister_driver(&iwl_driver);
3864         iwlagn_rate_control_unregister();
3865 }
3866
3867 module_exit(iwl_exit);
3868 module_init(iwl_init);
3869
3870 #ifdef CONFIG_IWLWIFI_DEBUG
3871 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3872 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3873 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3874 MODULE_PARM_DESC(debug, "debug output mask");
3875 #endif
3876
3877 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
3878 MODULE_PARM_DESC(swcrypto50,
3879                  "using crypto in software (default 0 [hardware]) (deprecated)");
3880 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
3881 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
3882 module_param_named(queues_num50,
3883                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3884 MODULE_PARM_DESC(queues_num50,
3885                  "number of hw queues in 50xx series (deprecated)");
3886 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
3887 MODULE_PARM_DESC(queues_num, "number of hw queues.");
3888 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3889 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
3890 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
3891 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
3892 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
3893                    int, S_IRUGO);
3894 MODULE_PARM_DESC(amsdu_size_8K50,
3895                  "enable 8K amsdu size in 50XX series (deprecated)");
3896 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
3897                    int, S_IRUGO);
3898 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
3899 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3900 MODULE_PARM_DESC(fw_restart50,
3901                  "restart firmware in case of error (deprecated)");
3902 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
3903 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3904 module_param_named(
3905         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
3906 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");