drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwlagn"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-calib.h"
  61 #include "iwl-agn.h"
  62
  63
  64 /******************************************************************************
  65  *
  66  * module boiler plate
  67  *
  68  ******************************************************************************/
  69
  70 /*
  71  * module name, copyright, version, etc.
  72  */
  73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  74
  75 #ifdef CONFIG_IWLWIFI_DEBUG
  76 #define VD "d"
  77 #else
  78 #define VD
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 /**
  91  * iwl_commit_rxon - commit staging_rxon to hardware
  92  *
  93  * The RXON command in staging_rxon is committed to the hardware and
  94  * the active_rxon structure is updated with the new data.  This
  95  * function correctly transitions out of the RXON_ASSOC_MSK state if
  96  * a HW tune is required based on the RXON structure changes.
  97  */
  98 int iwl_commit_rxon(struct iwl_priv *priv)
  99 {
 100         /* cast away the const for active_rxon in this function */
 101         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 102         int ret;
 103         bool new_assoc =
 104                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 105
 106         if (!iwl_is_alive(priv))
 107                 return -EBUSY;
 108
 109         /* always get timestamp with Rx frame */
 110         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 111
 112         ret = iwl_check_rxon_cmd(priv);
 113         if (ret) {
 114                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 115                 return -EINVAL;
 116         }
 117
 118         /*
 119          * receive commit_rxon request
 120          * abort any previous channel switch if still in process
 121          */
 122         if (priv->switch_rxon.switch_in_progress &&
 123             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 124                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 125                       le16_to_cpu(priv->switch_rxon.channel));
 126                 iwl_chswitch_done(priv, false);
 127         }
 128
 129         /* If we don't need to send a full RXON, we can use
 130          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 131          * and other flags for the current radio configuration. */
 132         if (!iwl_full_rxon_required(priv)) {
 133                 ret = iwl_send_rxon_assoc(priv);
 134                 if (ret) {
 135                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 136                         return ret;
 137                 }
 138
 139                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 140                 iwl_print_rx_config_cmd(priv);
 141                 return 0;
 142         }
 143
 144         /* If we are currently associated and the new config requires
 145          * an RXON_ASSOC and the new config wants the associated mask enabled,
 146          * we must clear the associated from the active configuration
 147          * before we apply the new config */
 148         if (iwl_is_associated(priv) && new_assoc) {
 149                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 150                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 151
 152                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 153                                       sizeof(struct iwl_rxon_cmd),
 154                                       &priv->active_rxon);
 155
 156                 /* If the mask clearing failed then we set
 157                  * active_rxon back to what it was previously */
 158                 if (ret) {
 159                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 160                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 161                         return ret;
 162                 }
 163                 iwl_clear_ucode_stations(priv);
 164                 iwl_restore_stations(priv);
 165                 ret = iwl_restore_default_wep_keys(priv);
 166                 if (ret) {
 167                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 168                         return ret;
 169                 }
 170         }
 171
 172         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 173                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 174                        "* channel = %d\n"
 175                        "* bssid = %pM\n",
 176                        (new_assoc ? "" : "out"),
 177                        le16_to_cpu(priv->staging_rxon.channel),
 178                        priv->staging_rxon.bssid_addr);
 179
 180         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 181
 182         /* Apply the new configuration
 183          * RXON unassoc clears the station table in uCode so restoration of
 184          * stations is needed after it (the RXON command) completes
 185          */
 186         if (!new_assoc) {
 187                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 188                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 189                 if (ret) {
 190                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 191                         return ret;
 192                 }
 193                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 194                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 195                 iwl_clear_ucode_stations(priv);
 196                 iwl_restore_stations(priv);
 197                 ret = iwl_restore_default_wep_keys(priv);
 198                 if (ret) {
 199                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 200                         return ret;
 201                 }
 202         }
 203
 204         priv->start_calib = 0;
 205         if (new_assoc) {
 206                 /* Apply the new configuration
 207                  * RXON assoc doesn't clear the station table in uCode,
 208                  */
 209                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 210                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 211                 if (ret) {
 212                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 213                         return ret;
 214                 }
 215                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 216         }
 217         iwl_print_rx_config_cmd(priv);
 218
 219         iwl_init_sensitivity(priv);
 220
 221         /* If we issue a new RXON command which required a tune then we must
 222          * send a new TXPOWER command or we won't be able to Tx any frames */
 223         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 224         if (ret) {
 225                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 226                 return ret;
 227         }
 228
 229         return 0;
 230 }
 231
 232 void iwl_update_chain_flags(struct iwl_priv *priv)
 233 {
 234
 235         if (priv->cfg->ops->hcmd->set_rxon_chain)
 236                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 237         iwlcore_commit_rxon(priv);
 238 }
 239
 240 static void iwl_clear_free_frames(struct iwl_priv *priv)
 241 {
 242         struct list_head *element;
 243
 244         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 245                        priv->frames_count);
 246
 247         while (!list_empty(&priv->free_frames)) {
 248                 element = priv->free_frames.next;
 249                 list_del(element);
 250                 kfree(list_entry(element, struct iwl_frame, list));
 251                 priv->frames_count--;
 252         }
 253
 254         if (priv->frames_count) {
 255                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 256                             priv->frames_count);
 257                 priv->frames_count = 0;
 258         }
 259 }
 260
 261 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 262 {
 263         struct iwl_frame *frame;
 264         struct list_head *element;
 265         if (list_empty(&priv->free_frames)) {
 266                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 267                 if (!frame) {
 268                         IWL_ERR(priv, "Could not allocate frame!\n");
 269                         return NULL;
 270                 }
 271
 272                 priv->frames_count++;
 273                 return frame;
 274         }
 275
 276         element = priv->free_frames.next;
 277         list_del(element);
 278         return list_entry(element, struct iwl_frame, list);
 279 }
 280
 281 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 282 {
 283         memset(frame, 0, sizeof(*frame));
 284         list_add(&frame->list, &priv->free_frames);
 285 }
 286
 287 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 288                                           struct ieee80211_hdr *hdr,
 289                                           int left)
 290 {
 291         if (!priv->ibss_beacon)
 292                 return 0;
 293
 294         if (priv->ibss_beacon->len > left)
 295                 return 0;
 296
 297         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 298
 299         return priv->ibss_beacon->len;
 300 }
 301
 302 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 303 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 304                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 305                 u8 *beacon, u32 frame_size)
 306 {
 307         u16 tim_idx;
 308         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 309
 310         /*
 311          * The index is relative to frame start but we start looking at the
 312          * variable-length part of the beacon.
 313          */
 314         tim_idx = mgmt->u.beacon.variable - beacon;
 315
 316         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 317         while ((tim_idx < (frame_size - 2)) &&
 318                         (beacon[tim_idx] != WLAN_EID_TIM))
 319                 tim_idx += beacon[tim_idx+1] + 2;
 320
 321         /* If TIM field was found, set variables */
 322         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 323                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 324                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 325         } else
 326                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 327 }
 328
 329 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 330                                        struct iwl_frame *frame)
 331 {
 332         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 333         u32 frame_size;
 334         u32 rate_flags;
 335         u32 rate;
 336         /*
 337          * We have to set up the TX command, the TX Beacon command, and the
 338          * beacon contents.
 339          */
 340
 341         /* Initialize memory */
 342         tx_beacon_cmd = &frame->u.beacon;
 343         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 344
 345         /* Set up TX beacon contents */
 346         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 347                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 348         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 349                 return 0;
 350
 351         /* Set up TX command fields */
 352         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 353         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 354         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 355         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 356                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 357
 358         /* Set up TX beacon command fields */
 359         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 360                         frame_size);
 361
 362         /* Set up packet rate and flags */
 363         rate = iwl_rate_get_lowest_plcp(priv);
 364         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 365                                               priv->hw_params.valid_tx_ant);
 366         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 367         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 368                 rate_flags |= RATE_MCS_CCK_MSK;
 369         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 370                         rate_flags);
 371
 372         return sizeof(*tx_beacon_cmd) + frame_size;
 373 }
 374 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 375 {
 376         struct iwl_frame *frame;
 377         unsigned int frame_size;
 378         int rc;
 379
 380         frame = iwl_get_free_frame(priv);
 381         if (!frame) {
 382                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 383                           "command.\n");
 384                 return -ENOMEM;
 385         }
 386
 387         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 388         if (!frame_size) {
 389                 IWL_ERR(priv, "Error configuring the beacon command\n");
 390                 iwl_free_frame(priv, frame);
 391                 return -EINVAL;
 392         }
 393
 394         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 395                               &frame->u.cmd[0]);
 396
 397         iwl_free_frame(priv, frame);
 398
 399         return rc;
 400 }
 401
 402 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 403 {
 404         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 405
 406         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 407         if (sizeof(dma_addr_t) > sizeof(u32))
 408                 addr |=
 409                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 410
 411         return addr;
 412 }
 413
 414 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 415 {
 416         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 417
 418         return le16_to_cpu(tb->hi_n_len) >> 4;
 419 }
 420
 421 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 422                                   dma_addr_t addr, u16 len)
 423 {
 424         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 425         u16 hi_n_len = len << 4;
 426
 427         put_unaligned_le32(addr, &tb->lo);
 428         if (sizeof(dma_addr_t) > sizeof(u32))
 429                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 430
 431         tb->hi_n_len = cpu_to_le16(hi_n_len);
 432
 433         tfd->num_tbs = idx + 1;
 434 }
 435
 436 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 437 {
 438         return tfd->num_tbs & 0x1f;
 439 }
 440
 441 /**
 442  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 443  * @priv - driver private data
 444  * @txq - tx queue
 445  *
 446  * Does NOT advance any TFD circular buffer read/write indexes
 447  * Does NOT free the TFD itself (which is within circular buffer)
 448  */
 449 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 450 {
 451         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 452         struct iwl_tfd *tfd;
 453         struct pci_dev *dev = priv->pci_dev;
 454         int index = txq->q.read_ptr;
 455         int i;
 456         int num_tbs;
 457
 458         tfd = &tfd_tmp[index];
 459
 460         /* Sanity check on number of chunks */
 461         num_tbs = iwl_tfd_get_num_tbs(tfd);
 462
 463         if (num_tbs >= IWL_NUM_OF_TBS) {
 464                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 465                 /* @todo issue fatal error, it is quite serious situation */
 466                 return;
 467         }
 468
 469         /* Unmap tx_cmd */
 470         if (num_tbs)
 471                 pci_unmap_single(dev,
 472                                 dma_unmap_addr(&txq->meta[index], mapping),
 473                                 dma_unmap_len(&txq->meta[index], len),
 474                                 PCI_DMA_BIDIRECTIONAL);
 475
 476         /* Unmap chunks, if any. */
 477         for (i = 1; i < num_tbs; i++)
 478                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 479                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 480
 481         /* free SKB */
 482         if (txq->txb) {
 483                 struct sk_buff *skb;
 484
 485                 skb = txq->txb[txq->q.read_ptr].skb;
 486
 487                 /* can be called from irqs-disabled context */
 488                 if (skb) {
 489                         dev_kfree_skb_any(skb);
 490                         txq->txb[txq->q.read_ptr].skb = NULL;
 491                 }
 492         }
 493 }
 494
 495 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 496                                  struct iwl_tx_queue *txq,
 497                                  dma_addr_t addr, u16 len,
 498                                  u8 reset, u8 pad)
 499 {
 500         struct iwl_queue *q;
 501         struct iwl_tfd *tfd, *tfd_tmp;
 502         u32 num_tbs;
 503
 504         q = &txq->q;
 505         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 506         tfd = &tfd_tmp[q->write_ptr];
 507
 508         if (reset)
 509                 memset(tfd, 0, sizeof(*tfd));
 510
 511         num_tbs = iwl_tfd_get_num_tbs(tfd);
 512
 513         /* Each TFD can point to a maximum 20 Tx buffers */
 514         if (num_tbs >= IWL_NUM_OF_TBS) {
 515                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 516                           IWL_NUM_OF_TBS);
 517                 return -EINVAL;
 518         }
 519
 520         BUG_ON(addr & ~DMA_BIT_MASK(36));
 521         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 522                 IWL_ERR(priv, "Unaligned address = %llx\n",
 523                           (unsigned long long)addr);
 524
 525         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 526
 527         return 0;
 528 }
 529
 530 /*
 531  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 532  * given Tx queue, and enable the DMA channel used for that queue.
 533  *
 534  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 535  * channels supported in hardware.
 536  */
 537 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 538                          struct iwl_tx_queue *txq)
 539 {
 540         int txq_id = txq->q.id;
 541
 542         /* Circular buffer (TFD queue in DRAM) physical base address */
 543         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 544                              txq->q.dma_addr >> 8);
 545
 546         return 0;
 547 }
 548
 549 /******************************************************************************
 550  *
 551  * Generic RX handler implementations
 552  *
 553  ******************************************************************************/
 554 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 555                                 struct iwl_rx_mem_buffer *rxb)
 556 {
 557         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 558         struct iwl_alive_resp *palive;
 559         struct delayed_work *pwork;
 560
 561         palive = &pkt->u.alive_frame;
 562
 563         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 564                        "0x%01X 0x%01X\n",
 565                        palive->is_valid, palive->ver_type,
 566                        palive->ver_subtype);
 567
 568         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 569                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 570                 memcpy(&priv->card_alive_init,
 571                        &pkt->u.alive_frame,
 572                        sizeof(struct iwl_init_alive_resp));
 573                 pwork = &priv->init_alive_start;
 574         } else {
 575                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 576                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 577                        sizeof(struct iwl_alive_resp));
 578                 pwork = &priv->alive_start;
 579         }
 580
 581         /* We delay the ALIVE response by 5ms to
 582          * give the HW RF Kill time to activate... */
 583         if (palive->is_valid == UCODE_VALID_OK)
 584                 queue_delayed_work(priv->workqueue, pwork,
 585                                    msecs_to_jiffies(5));
 586         else
 587                 IWL_WARN(priv, "uCode did not respond OK.\n");
 588 }
 589
 590 static void iwl_bg_beacon_update(struct work_struct *work)
 591 {
 592         struct iwl_priv *priv =
 593                 container_of(work, struct iwl_priv, beacon_update);
 594         struct sk_buff *beacon;
 595
 596         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 597         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 598
 599         if (!beacon) {
 600                 IWL_ERR(priv, "update beacon failed\n");
 601                 return;
 602         }
 603
 604         mutex_lock(&priv->mutex);
 605         /* new beacon skb is allocated every time; dispose previous.*/
 606         if (priv->ibss_beacon)
 607                 dev_kfree_skb(priv->ibss_beacon);
 608
 609         priv->ibss_beacon = beacon;
 610         mutex_unlock(&priv->mutex);
 611
 612         iwl_send_beacon_cmd(priv);
 613 }
 614
 615 /**
 616  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 617  *
 618  * This callback is provided in order to send a statistics request.
 619  *
 620  * This timer function is continually reset to execute within
 621  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 622  * was received.  We need to ensure we receive the statistics in order
 623  * to update the temperature used for calibrating the TXPOWER.
 624  */
 625 static void iwl_bg_statistics_periodic(unsigned long data)
 626 {
 627         struct iwl_priv *priv = (struct iwl_priv *)data;
 628
 629         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 630                 return;
 631
 632         /* dont send host command if rf-kill is on */
 633         if (!iwl_is_ready_rf(priv))
 634                 return;
 635
 636         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 637 }
 638
 639
 640 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 641                                         u32 start_idx, u32 num_events,
 642                                         u32 mode)
 643 {
 644         u32 i;
 645         u32 ptr;        /* SRAM byte address of log data */
 646         u32 ev, time, data; /* event log data */
 647         unsigned long reg_flags;
 648
 649         if (mode == 0)
 650                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 651         else
 652                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 653
 654         /* Make sure device is powered up for SRAM reads */
 655         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 656         if (iwl_grab_nic_access(priv)) {
 657                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 658                 return;
 659         }
 660
 661         /* Set starting address; reads will auto-increment */
 662         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 663         rmb();
 664
 665         /*
 666          * "time" is actually "data" for mode 0 (no timestamp).
 667          * place event id # at far right for easier visual parsing.
 668          */
 669         for (i = 0; i < num_events; i++) {
 670                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 671                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 672                 if (mode == 0) {
 673                         trace_iwlwifi_dev_ucode_cont_event(priv,
 674                                                         0, time, ev);
 675                 } else {
 676                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 677                         trace_iwlwifi_dev_ucode_cont_event(priv,
 678                                                 time, data, ev);
 679                 }
 680         }
 681         /* Allow device to power down */
 682         iwl_release_nic_access(priv);
 683         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 684 }
 685
 686 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 687 {
 688         u32 capacity;   /* event log capacity in # entries */
 689         u32 base;       /* SRAM byte address of event log header */
 690         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 691         u32 num_wraps;  /* # times uCode wrapped to top of log */
 692         u32 next_entry; /* index of next entry to be written by uCode */
 693
 694         if (priv->ucode_type == UCODE_INIT)
 695                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 696         else
 697                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 698         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 699                 capacity = iwl_read_targ_mem(priv, base);
 700                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 701                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 702                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 703         } else
 704                 return;
 705
 706         if (num_wraps == priv->event_log.num_wraps) {
 707                 iwl_print_cont_event_trace(priv,
 708                                        base, priv->event_log.next_entry,
 709                                        next_entry - priv->event_log.next_entry,
 710                                        mode);
 711                 priv->event_log.non_wraps_count++;
 712         } else {
 713                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 714                         priv->event_log.wraps_more_count++;
 715                 else
 716                         priv->event_log.wraps_once_count++;
 717                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 718                                 num_wraps - priv->event_log.num_wraps,
 719                                 next_entry, priv->event_log.next_entry);
 720                 if (next_entry < priv->event_log.next_entry) {
 721                         iwl_print_cont_event_trace(priv, base,
 722                                priv->event_log.next_entry,
 723                                capacity - priv->event_log.next_entry,
 724                                mode);
 725
 726                         iwl_print_cont_event_trace(priv, base, 0,
 727                                 next_entry, mode);
 728                 } else {
 729                         iwl_print_cont_event_trace(priv, base,
 730                                next_entry, capacity - next_entry,
 731                                mode);
 732
 733                         iwl_print_cont_event_trace(priv, base, 0,
 734                                 next_entry, mode);
 735                 }
 736         }
 737         priv->event_log.num_wraps = num_wraps;
 738         priv->event_log.next_entry = next_entry;
 739 }
 740
 741 /**
 742  * iwl_bg_ucode_trace - Timer callback to log ucode event
 743  *
 744  * The timer is continually set to execute every
 745  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 746  * this function is to perform continuous uCode event logging operation
 747  * if enabled
 748  */
 749 static void iwl_bg_ucode_trace(unsigned long data)
 750 {
 751         struct iwl_priv *priv = (struct iwl_priv *)data;
 752
 753         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 754                 return;
 755
 756         if (priv->event_log.ucode_trace) {
 757                 iwl_continuous_event_trace(priv);
 758                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 759                 mod_timer(&priv->ucode_trace,
 760                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 761         }
 762 }
 763
 764 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 765                                 struct iwl_rx_mem_buffer *rxb)
 766 {
 767         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 768         struct iwl4965_beacon_notif *beacon =
 769                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 770 #ifdef CONFIG_IWLWIFI_DEBUG
 771         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 772
 773         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 774                 "tsf %d %d rate %d\n",
 775                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 776                 beacon->beacon_notify_hdr.failure_frame,
 777                 le32_to_cpu(beacon->ibss_mgr_status),
 778                 le32_to_cpu(beacon->high_tsf),
 779                 le32_to_cpu(beacon->low_tsf), rate);
 780 #endif
 781
 782         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
 783
 784         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 785             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 786                 queue_work(priv->workqueue, &priv->beacon_update);
 787 }
 788
 789 /* Handle notification from uCode that card's power state is changing
 790  * due to software, hardware, or critical temperature RFKILL */
 791 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 792                                     struct iwl_rx_mem_buffer *rxb)
 793 {
 794         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 795         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 796         unsigned long status = priv->status;
 797
 798         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 799                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 800                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 801                           (flags & CT_CARD_DISABLED) ?
 802                           "Reached" : "Not reached");
 803
 804         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 805                      CT_CARD_DISABLED)) {
 806
 807                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 808                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 809
 810                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 811                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 812
 813                 if (!(flags & RXON_CARD_DISABLED)) {
 814                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 815                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 816                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 817                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 818                 }
 819                 if (flags & CT_CARD_DISABLED)
 820                         iwl_tt_enter_ct_kill(priv);
 821         }
 822         if (!(flags & CT_CARD_DISABLED))
 823                 iwl_tt_exit_ct_kill(priv);
 824
 825         if (flags & HW_CARD_DISABLED)
 826                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 827         else
 828                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 829
 830
 831         if (!(flags & RXON_CARD_DISABLED))
 832                 iwl_scan_cancel(priv);
 833
 834         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 835              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 836                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 837                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 838         else
 839                 wake_up_interruptible(&priv->wait_command_queue);
 840 }
 841
 842 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 843 {
 844         if (src == IWL_PWR_SRC_VAUX) {
 845                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 846                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 847                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 848                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 849         } else {
 850                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 851                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 852                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 853         }
 854
 855         return 0;
 856 }
 857
 858 static void iwl_bg_tx_flush(struct work_struct *work)
 859 {
 860         struct iwl_priv *priv =
 861                 container_of(work, struct iwl_priv, tx_flush);
 862
 863         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 864                 return;
 865
 866         /* do nothing if rf-kill is on */
 867         if (!iwl_is_ready_rf(priv))
 868                 return;
 869
 870         if (priv->cfg->ops->lib->txfifo_flush) {
 871                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 872                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 873         }
 874 }
 875
 876 /**
 877  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 878  *
 879  * Setup the RX handlers for each of the reply types sent from the uCode
 880  * to the host.
 881  *
 882  * This function chains into the hardware specific files for them to setup
 883  * any hardware specific handlers as well.
 884  */
 885 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 886 {
 887         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 888         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 889         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 890         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 891                         iwl_rx_spectrum_measure_notif;
 892         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 893         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 894             iwl_rx_pm_debug_statistics_notif;
 895         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 896
 897         /*
 898          * The same handler is used for both the REPLY to a discrete
 899          * statistics request from the host as well as for the periodic
 900          * statistics notifications (after received beacons) from the uCode.
 901          */
 902         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 903         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 904
 905         iwl_setup_rx_scan_handlers(priv);
 906
 907         /* status change handler */
 908         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 909
 910         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 911             iwl_rx_missed_beacon_notif;
 912         /* Rx handlers */
 913         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 914         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 915         /* block ack */
 916         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 917         /* Set up hardware specific Rx handlers */
 918         priv->cfg->ops->lib->rx_handler_setup(priv);
 919 }
 920
 921 /**
 922  * iwl_rx_handle - Main entry function for receiving responses from uCode
 923  *
 924  * Uses the priv->rx_handlers callback function array to invoke
 925  * the appropriate handlers, including command responses,
 926  * frame-received notifications, and other notifications.
 927  */
 928 void iwl_rx_handle(struct iwl_priv *priv)
 929 {
 930         struct iwl_rx_mem_buffer *rxb;
 931         struct iwl_rx_packet *pkt;
 932         struct iwl_rx_queue *rxq = &priv->rxq;
 933         u32 r, i;
 934         int reclaim;
 935         unsigned long flags;
 936         u8 fill_rx = 0;
 937         u32 count = 8;
 938         int total_empty;
 939
 940         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 941          * buffer that the driver may process (last buffer filled by ucode). */
 942         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 943         i = rxq->read;
 944
 945         /* Rx interrupt, but nothing sent from uCode */
 946         if (i == r)
 947                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 948
 949         /* calculate total frames need to be restock after handling RX */
 950         total_empty = r - rxq->write_actual;
 951         if (total_empty < 0)
 952                 total_empty += RX_QUEUE_SIZE;
 953
 954         if (total_empty > (RX_QUEUE_SIZE / 2))
 955                 fill_rx = 1;
 956
 957         while (i != r) {
 958                 int len;
 959
 960                 rxb = rxq->queue[i];
 961
 962                 /* If an RXB doesn't have a Rx queue slot associated with it,
 963                  * then a bug has been introduced in the queue refilling
 964                  * routines -- catch it here */
 965                 BUG_ON(rxb == NULL);
 966
 967                 rxq->queue[i] = NULL;
 968
 969                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
 970                                PAGE_SIZE << priv->hw_params.rx_page_order,
 971                                PCI_DMA_FROMDEVICE);
 972                 pkt = rxb_addr(rxb);
 973
 974                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
 975                 len += sizeof(u32); /* account for status word */
 976                 trace_iwlwifi_dev_rx(priv, pkt, len);
 977
 978                 /* Reclaim a command buffer only if this packet is a response
 979                  *   to a (driver-originated) command.
 980                  * If the packet (e.g. Rx frame) originated from uCode,
 981                  *   there is no command buffer to reclaim.
 982                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
 983                  *   but apparently a few don't get set; catch them here. */
 984                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
 985                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
 986                         (pkt->hdr.cmd != REPLY_RX) &&
 987                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
 988                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
 989                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
 990                         (pkt->hdr.cmd != REPLY_TX);
 991
 992                 /* Based on type of command response or notification,
 993                  *   handle those that need handling via function in
 994                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
 995                 if (priv->rx_handlers[pkt->hdr.cmd]) {
 996                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
 997                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
 998                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
 999                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1000                 } else {
1001                         /* No handling needed */
1002                         IWL_DEBUG_RX(priv,
1003                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1004                                 r, i, get_cmd_string(pkt->hdr.cmd),
1005                                 pkt->hdr.cmd);
1006                 }
1007
1008                 /*
1009                  * XXX: After here, we should always check rxb->page
1010                  * against NULL before touching it or its virtual
1011                  * memory (pkt). Because some rx_handler might have
1012                  * already taken or freed the pages.
1013                  */
1014
1015                 if (reclaim) {
1016                         /* Invoke any callbacks, transfer the buffer to caller,
1017                          * and fire off the (possibly) blocking iwl_send_cmd()
1018                          * as we reclaim the driver command queue */
1019                         if (rxb->page)
1020                                 iwl_tx_cmd_complete(priv, rxb);
1021                         else
1022                                 IWL_WARN(priv, "Claim null rxb?\n");
1023                 }
1024
1025                 /* Reuse the page if possible. For notification packets and
1026                  * SKBs that fail to Rx correctly, add them back into the
1027                  * rx_free list for reuse later. */
1028                 spin_lock_irqsave(&rxq->lock, flags);
1029                 if (rxb->page != NULL) {
1030                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1031                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1032                                 PCI_DMA_FROMDEVICE);
1033                         list_add_tail(&rxb->list, &rxq->rx_free);
1034                         rxq->free_count++;
1035                 } else
1036                         list_add_tail(&rxb->list, &rxq->rx_used);
1037
1038                 spin_unlock_irqrestore(&rxq->lock, flags);
1039
1040                 i = (i + 1) & RX_QUEUE_MASK;
1041                 /* If there are a lot of unused frames,
1042                  * restock the Rx queue so ucode wont assert. */
1043                 if (fill_rx) {
1044                         count++;
1045                         if (count >= 8) {
1046                                 rxq->read = i;
1047                                 iwlagn_rx_replenish_now(priv);
1048                                 count = 0;
1049                         }
1050                 }
1051         }
1052
1053         /* Backtrack one entry */
1054         rxq->read = i;
1055         if (fill_rx)
1056                 iwlagn_rx_replenish_now(priv);
1057         else
1058                 iwlagn_rx_queue_restock(priv);
1059 }
1060
1061 /* call this function to flush any scheduled tasklet */
1062 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1063 {
1064         /* wait to make sure we flush pending tasklet*/
1065         synchronize_irq(priv->pci_dev->irq);
1066         tasklet_kill(&priv->irq_tasklet);
1067 }
1068
1069 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1070 {
1071         u32 inta, handled = 0;
1072         u32 inta_fh;
1073         unsigned long flags;
1074         u32 i;
1075 #ifdef CONFIG_IWLWIFI_DEBUG
1076         u32 inta_mask;
1077 #endif
1078
1079         spin_lock_irqsave(&priv->lock, flags);
1080
1081         /* Ack/clear/reset pending uCode interrupts.
1082          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1083          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1084         inta = iwl_read32(priv, CSR_INT);
1085         iwl_write32(priv, CSR_INT, inta);
1086
1087         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1088          * Any new interrupts that happen after this, either while we're
1089          * in this tasklet, or later, will show up in next ISR/tasklet. */
1090         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1091         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1092
1093 #ifdef CONFIG_IWLWIFI_DEBUG
1094         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1095                 /* just for debug */
1096                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1097                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1098                               inta, inta_mask, inta_fh);
1099         }
1100 #endif
1101
1102         spin_unlock_irqrestore(&priv->lock, flags);
1103
1104         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1105          * atomic, make sure that inta covers all the interrupts that
1106          * we've discovered, even if FH interrupt came in just after
1107          * reading CSR_INT. */
1108         if (inta_fh & CSR49_FH_INT_RX_MASK)
1109                 inta |= CSR_INT_BIT_FH_RX;
1110         if (inta_fh & CSR49_FH_INT_TX_MASK)
1111                 inta |= CSR_INT_BIT_FH_TX;
1112
1113         /* Now service all interrupt bits discovered above. */
1114         if (inta & CSR_INT_BIT_HW_ERR) {
1115                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1116
1117                 /* Tell the device to stop sending interrupts */
1118                 iwl_disable_interrupts(priv);
1119
1120                 priv->isr_stats.hw++;
1121                 iwl_irq_handle_error(priv);
1122
1123                 handled |= CSR_INT_BIT_HW_ERR;
1124
1125                 return;
1126         }
1127
1128 #ifdef CONFIG_IWLWIFI_DEBUG
1129         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1130                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1131                 if (inta & CSR_INT_BIT_SCD) {
1132                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1133                                       "the frame/frames.\n");
1134                         priv->isr_stats.sch++;
1135                 }
1136
1137                 /* Alive notification via Rx interrupt will do the real work */
1138                 if (inta & CSR_INT_BIT_ALIVE) {
1139                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1140                         priv->isr_stats.alive++;
1141                 }
1142         }
1143 #endif
1144         /* Safely ignore these bits for debug checks below */
1145         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1146
1147         /* HW RF KILL switch toggled */
1148         if (inta & CSR_INT_BIT_RF_KILL) {
1149                 int hw_rf_kill = 0;
1150                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1151                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1152                         hw_rf_kill = 1;
1153
1154                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1155                                 hw_rf_kill ? "disable radio" : "enable radio");
1156
1157                 priv->isr_stats.rfkill++;
1158
1159                 /* driver only loads ucode once setting the interface up.
1160                  * the driver allows loading the ucode even if the radio
1161                  * is killed. Hence update the killswitch state here. The
1162                  * rfkill handler will care about restarting if needed.
1163                  */
1164                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1165                         if (hw_rf_kill)
1166                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1167                         else
1168                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1169                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1170                 }
1171
1172                 handled |= CSR_INT_BIT_RF_KILL;
1173         }
1174
1175         /* Chip got too hot and stopped itself */
1176         if (inta & CSR_INT_BIT_CT_KILL) {
1177                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1178                 priv->isr_stats.ctkill++;
1179                 handled |= CSR_INT_BIT_CT_KILL;
1180         }
1181
1182         /* Error detected by uCode */
1183         if (inta & CSR_INT_BIT_SW_ERR) {
1184                 IWL_ERR(priv, "Microcode SW error detected. "
1185                         " Restarting 0x%X.\n", inta);
1186                 priv->isr_stats.sw++;
1187                 priv->isr_stats.sw_err = inta;
1188                 iwl_irq_handle_error(priv);
1189                 handled |= CSR_INT_BIT_SW_ERR;
1190         }
1191
1192         /*
1193          * uCode wakes up after power-down sleep.
1194          * Tell device about any new tx or host commands enqueued,
1195          * and about any Rx buffers made available while asleep.
1196          */
1197         if (inta & CSR_INT_BIT_WAKEUP) {
1198                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1199                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1200                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1201                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1202                 priv->isr_stats.wakeup++;
1203                 handled |= CSR_INT_BIT_WAKEUP;
1204         }
1205
1206         /* All uCode command responses, including Tx command responses,
1207          * Rx "responses" (frame-received notification), and other
1208          * notifications from uCode come through here*/
1209         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1210                 iwl_rx_handle(priv);
1211                 priv->isr_stats.rx++;
1212                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1213         }
1214
1215         /* This "Tx" DMA channel is used only for loading uCode */
1216         if (inta & CSR_INT_BIT_FH_TX) {
1217                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1218                 priv->isr_stats.tx++;
1219                 handled |= CSR_INT_BIT_FH_TX;
1220                 /* Wake up uCode load routine, now that load is complete */
1221                 priv->ucode_write_complete = 1;
1222                 wake_up_interruptible(&priv->wait_command_queue);
1223         }
1224
1225         if (inta & ~handled) {
1226                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1227                 priv->isr_stats.unhandled++;
1228         }
1229
1230         if (inta & ~(priv->inta_mask)) {
1231                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1232                          inta & ~priv->inta_mask);
1233                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1234         }
1235
1236         /* Re-enable all interrupts */
1237         /* only Re-enable if diabled by irq */
1238         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1239                 iwl_enable_interrupts(priv);
1240
1241 #ifdef CONFIG_IWLWIFI_DEBUG
1242         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1243                 inta = iwl_read32(priv, CSR_INT);
1244                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1245                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1246                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1247                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1248         }
1249 #endif
1250 }
1251
1252 /* tasklet for iwlagn interrupt */
1253 static void iwl_irq_tasklet(struct iwl_priv *priv)
1254 {
1255         u32 inta = 0;
1256         u32 handled = 0;
1257         unsigned long flags;
1258         u32 i;
1259 #ifdef CONFIG_IWLWIFI_DEBUG
1260         u32 inta_mask;
1261 #endif
1262
1263         spin_lock_irqsave(&priv->lock, flags);
1264
1265         /* Ack/clear/reset pending uCode interrupts.
1266          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1267          */
1268         /* There is a hardware bug in the interrupt mask function that some
1269          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1270          * they are disabled in the CSR_INT_MASK register. Furthermore the
1271          * ICT interrupt handling mechanism has another bug that might cause
1272          * these unmasked interrupts fail to be detected. We workaround the
1273          * hardware bugs here by ACKing all the possible interrupts so that
1274          * interrupt coalescing can still be achieved.
1275          */
1276         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1277
1278         inta = priv->_agn.inta;
1279
1280 #ifdef CONFIG_IWLWIFI_DEBUG
1281         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1282                 /* just for debug */
1283                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1284                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1285                                 inta, inta_mask);
1286         }
1287 #endif
1288
1289         spin_unlock_irqrestore(&priv->lock, flags);
1290
1291         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1292         priv->_agn.inta = 0;
1293
1294         /* Now service all interrupt bits discovered above. */
1295         if (inta & CSR_INT_BIT_HW_ERR) {
1296                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1297
1298                 /* Tell the device to stop sending interrupts */
1299                 iwl_disable_interrupts(priv);
1300
1301                 priv->isr_stats.hw++;
1302                 iwl_irq_handle_error(priv);
1303
1304                 handled |= CSR_INT_BIT_HW_ERR;
1305
1306                 return;
1307         }
1308
1309 #ifdef CONFIG_IWLWIFI_DEBUG
1310         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1311                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1312                 if (inta & CSR_INT_BIT_SCD) {
1313                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1314                                       "the frame/frames.\n");
1315                         priv->isr_stats.sch++;
1316                 }
1317
1318                 /* Alive notification via Rx interrupt will do the real work */
1319                 if (inta & CSR_INT_BIT_ALIVE) {
1320                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1321                         priv->isr_stats.alive++;
1322                 }
1323         }
1324 #endif
1325         /* Safely ignore these bits for debug checks below */
1326         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1327
1328         /* HW RF KILL switch toggled */
1329         if (inta & CSR_INT_BIT_RF_KILL) {
1330                 int hw_rf_kill = 0;
1331                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1332                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1333                         hw_rf_kill = 1;
1334
1335                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1336                                 hw_rf_kill ? "disable radio" : "enable radio");
1337
1338                 priv->isr_stats.rfkill++;
1339
1340                 /* driver only loads ucode once setting the interface up.
1341                  * the driver allows loading the ucode even if the radio
1342                  * is killed. Hence update the killswitch state here. The
1343                  * rfkill handler will care about restarting if needed.
1344                  */
1345                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1346                         if (hw_rf_kill)
1347                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1348                         else
1349                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1350                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1351                 }
1352
1353                 handled |= CSR_INT_BIT_RF_KILL;
1354         }
1355
1356         /* Chip got too hot and stopped itself */
1357         if (inta & CSR_INT_BIT_CT_KILL) {
1358                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1359                 priv->isr_stats.ctkill++;
1360                 handled |= CSR_INT_BIT_CT_KILL;
1361         }
1362
1363         /* Error detected by uCode */
1364         if (inta & CSR_INT_BIT_SW_ERR) {
1365                 IWL_ERR(priv, "Microcode SW error detected. "
1366                         " Restarting 0x%X.\n", inta);
1367                 priv->isr_stats.sw++;
1368                 priv->isr_stats.sw_err = inta;
1369                 iwl_irq_handle_error(priv);
1370                 handled |= CSR_INT_BIT_SW_ERR;
1371         }
1372
1373         /* uCode wakes up after power-down sleep */
1374         if (inta & CSR_INT_BIT_WAKEUP) {
1375                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1376                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1377                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1378                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1379
1380                 priv->isr_stats.wakeup++;
1381
1382                 handled |= CSR_INT_BIT_WAKEUP;
1383         }
1384
1385         /* All uCode command responses, including Tx command responses,
1386          * Rx "responses" (frame-received notification), and other
1387          * notifications from uCode come through here*/
1388         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1389                         CSR_INT_BIT_RX_PERIODIC)) {
1390                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1391                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1392                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1393                         iwl_write32(priv, CSR_FH_INT_STATUS,
1394                                         CSR49_FH_INT_RX_MASK);
1395                 }
1396                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1397                         handled |= CSR_INT_BIT_RX_PERIODIC;
1398                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1399                 }
1400                 /* Sending RX interrupt require many steps to be done in the
1401                  * the device:
1402                  * 1- write interrupt to current index in ICT table.
1403                  * 2- dma RX frame.
1404                  * 3- update RX shared data to indicate last write index.
1405                  * 4- send interrupt.
1406                  * This could lead to RX race, driver could receive RX interrupt
1407                  * but the shared data changes does not reflect this;
1408                  * periodic interrupt will detect any dangling Rx activity.
1409                  */
1410
1411                 /* Disable periodic interrupt; we use it as just a one-shot. */
1412                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1413                             CSR_INT_PERIODIC_DIS);
1414                 iwl_rx_handle(priv);
1415
1416                 /*
1417                  * Enable periodic interrupt in 8 msec only if we received
1418                  * real RX interrupt (instead of just periodic int), to catch
1419                  * any dangling Rx interrupt.  If it was just the periodic
1420                  * interrupt, there was no dangling Rx activity, and no need
1421                  * to extend the periodic interrupt; one-shot is enough.
1422                  */
1423                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1424                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1425                                     CSR_INT_PERIODIC_ENA);
1426
1427                 priv->isr_stats.rx++;
1428         }
1429
1430         /* This "Tx" DMA channel is used only for loading uCode */
1431         if (inta & CSR_INT_BIT_FH_TX) {
1432                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1433                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1434                 priv->isr_stats.tx++;
1435                 handled |= CSR_INT_BIT_FH_TX;
1436                 /* Wake up uCode load routine, now that load is complete */
1437                 priv->ucode_write_complete = 1;
1438                 wake_up_interruptible(&priv->wait_command_queue);
1439         }
1440
1441         if (inta & ~handled) {
1442                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1443                 priv->isr_stats.unhandled++;
1444         }
1445
1446         if (inta & ~(priv->inta_mask)) {
1447                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1448                          inta & ~priv->inta_mask);
1449         }
1450
1451         /* Re-enable all interrupts */
1452         /* only Re-enable if diabled by irq */
1453         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1454                 iwl_enable_interrupts(priv);
1455 }
1456
1457 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1458 #define ACK_CNT_RATIO (50)
1459 #define BA_TIMEOUT_CNT (5)
1460 #define BA_TIMEOUT_MAX (16)
1461
1462 /**
1463  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1464  *
1465  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1466  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1467  * operation state.
1468  */
1469 bool iwl_good_ack_health(struct iwl_priv *priv,
1470                                 struct iwl_rx_packet *pkt)
1471 {
1472         bool rc = true;
1473         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1474         int ba_timeout_delta;
1475
1476         actual_ack_cnt_delta =
1477                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1478                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1479         expected_ack_cnt_delta =
1480                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1481                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1482         ba_timeout_delta =
1483                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1484                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1485         if ((priv->_agn.agg_tids_count > 0) &&
1486             (expected_ack_cnt_delta > 0) &&
1487             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1488                 < ACK_CNT_RATIO) &&
1489             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1490                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1491                                 " expected_ack_cnt = %d\n",
1492                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1493
1494 #ifdef CONFIG_IWLWIFI_DEBUGFS
1495                 /*
1496                  * This is ifdef'ed on DEBUGFS because otherwise the
1497                  * statistics aren't available. If DEBUGFS is set but
1498                  * DEBUG is not, these will just compile out.
1499                  */
1500                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1501                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1502                 IWL_DEBUG_RADIO(priv,
1503                                 "ack_or_ba_timeout_collision delta = %d\n",
1504                                 priv->_agn.delta_statistics.tx.
1505                                 ack_or_ba_timeout_collision);
1506 #endif
1507                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1508                                 ba_timeout_delta);
1509                 if (!actual_ack_cnt_delta &&
1510                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1511                         rc = false;
1512         }
1513         return rc;
1514 }
1515
1516
1517 /*****************************************************************************
1518  *
1519  * sysfs attributes
1520  *
1521  *****************************************************************************/
1522
1523 #ifdef CONFIG_IWLWIFI_DEBUG
1524
1525 /*
1526  * The following adds a new attribute to the sysfs representation
1527  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1528  * used for controlling the debug level.
1529  *
1530  * See the level definitions in iwl for details.
1531  *
1532  * The debug_level being managed using sysfs below is a per device debug
1533  * level that is used instead of the global debug level if it (the per
1534  * device debug level) is set.
1535  */
1536 static ssize_t show_debug_level(struct device *d,
1537                                 struct device_attribute *attr, char *buf)
1538 {
1539         struct iwl_priv *priv = dev_get_drvdata(d);
1540         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1541 }
1542 static ssize_t store_debug_level(struct device *d,
1543                                 struct device_attribute *attr,
1544                                  const char *buf, size_t count)
1545 {
1546         struct iwl_priv *priv = dev_get_drvdata(d);
1547         unsigned long val;
1548         int ret;
1549
1550         ret = strict_strtoul(buf, 0, &val);
1551         if (ret)
1552                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1553         else {
1554                 priv->debug_level = val;
1555                 if (iwl_alloc_traffic_mem(priv))
1556                         IWL_ERR(priv,
1557                                 "Not enough memory to generate traffic log\n");
1558         }
1559         return strnlen(buf, count);
1560 }
1561
1562 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1563                         show_debug_level, store_debug_level);
1564
1565
1566 #endif /* CONFIG_IWLWIFI_DEBUG */
1567
1568
1569 static ssize_t show_temperature(struct device *d,
1570                                 struct device_attribute *attr, char *buf)
1571 {
1572         struct iwl_priv *priv = dev_get_drvdata(d);
1573
1574         if (!iwl_is_alive(priv))
1575                 return -EAGAIN;
1576
1577         return sprintf(buf, "%d\n", priv->temperature);
1578 }
1579
1580 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1581
1582 static ssize_t show_tx_power(struct device *d,
1583                              struct device_attribute *attr, char *buf)
1584 {
1585         struct iwl_priv *priv = dev_get_drvdata(d);
1586
1587         if (!iwl_is_ready_rf(priv))
1588                 return sprintf(buf, "off\n");
1589         else
1590                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1591 }
1592
1593 static ssize_t store_tx_power(struct device *d,
1594                               struct device_attribute *attr,
1595                               const char *buf, size_t count)
1596 {
1597         struct iwl_priv *priv = dev_get_drvdata(d);
1598         unsigned long val;
1599         int ret;
1600
1601         ret = strict_strtoul(buf, 10, &val);
1602         if (ret)
1603                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1604         else {
1605                 ret = iwl_set_tx_power(priv, val, false);
1606                 if (ret)
1607                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1608                                 ret);
1609                 else
1610                         ret = count;
1611         }
1612         return ret;
1613 }
1614
1615 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1616
1617 static struct attribute *iwl_sysfs_entries[] = {
1618         &dev_attr_temperature.attr,
1619         &dev_attr_tx_power.attr,
1620 #ifdef CONFIG_IWLWIFI_DEBUG
1621         &dev_attr_debug_level.attr,
1622 #endif
1623         NULL
1624 };
1625
1626 static struct attribute_group iwl_attribute_group = {
1627         .name = NULL,           /* put in device directory */
1628         .attrs = iwl_sysfs_entries,
1629 };
1630
1631 /******************************************************************************
1632  *
1633  * uCode download functions
1634  *
1635  ******************************************************************************/
1636
1637 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1638 {
1639         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1640         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1641         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1642         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1643         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1644         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1645 }
1646
1647 static void iwl_nic_start(struct iwl_priv *priv)
1648 {
1649         /* Remove all resets to allow NIC to operate */
1650         iwl_write32(priv, CSR_RESET, 0);
1651 }
1652
1653 struct iwlagn_ucode_capabilities {
1654         u32 max_probe_length;
1655         u32 standard_phy_calibration_size;
1656 };
1657
1658 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1659 static int iwl_mac_setup_register(struct iwl_priv *priv,
1660                                   struct iwlagn_ucode_capabilities *capa);
1661
1662 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1663 {
1664         const char *name_pre = priv->cfg->fw_name_pre;
1665
1666         if (first)
1667                 priv->fw_index = priv->cfg->ucode_api_max;
1668         else
1669                 priv->fw_index--;
1670
1671         if (priv->fw_index < priv->cfg->ucode_api_min) {
1672                 IWL_ERR(priv, "no suitable firmware found!\n");
1673                 return -ENOENT;
1674         }
1675
1676         sprintf(priv->firmware_name, "%s%d%s",
1677                 name_pre, priv->fw_index, ".ucode");
1678
1679         IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1680                        priv->firmware_name);
1681
1682         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1683                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1684                                        iwl_ucode_callback);
1685 }
1686
1687 struct iwlagn_firmware_pieces {
1688         const void *inst, *data, *init, *init_data, *boot;
1689         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1690
1691         u32 build;
1692
1693         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1694         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1695 };
1696
1697 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1698                                        const struct firmware *ucode_raw,
1699                                        struct iwlagn_firmware_pieces *pieces)
1700 {
1701         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1702         u32 api_ver, hdr_size;
1703         const u8 *src;
1704
1705         priv->ucode_ver = le32_to_cpu(ucode->ver);
1706         api_ver = IWL_UCODE_API(priv->ucode_ver);
1707
1708         switch (api_ver) {
1709         default:
1710                 /*
1711                  * 4965 doesn't revision the firmware file format
1712                  * along with the API version, it always uses v1
1713                  * file format.
1714                  */
1715                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1716                                 CSR_HW_REV_TYPE_4965) {
1717                         hdr_size = 28;
1718                         if (ucode_raw->size < hdr_size) {
1719                                 IWL_ERR(priv, "File size too small!\n");
1720                                 return -EINVAL;
1721                         }
1722                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1723                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1724                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1725                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1726                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1727                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1728                         src = ucode->u.v2.data;
1729                         break;
1730                 }
1731                 /* fall through for 4965 */
1732         case 0:
1733         case 1:
1734         case 2:
1735                 hdr_size = 24;
1736                 if (ucode_raw->size < hdr_size) {
1737                         IWL_ERR(priv, "File size too small!\n");
1738                         return -EINVAL;
1739                 }
1740                 pieces->build = 0;
1741                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1742                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1743                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1744                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1745                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1746                 src = ucode->u.v1.data;
1747                 break;
1748         }
1749
1750         /* Verify size of file vs. image size info in file's header */
1751         if (ucode_raw->size != hdr_size + pieces->inst_size +
1752                                 pieces->data_size + pieces->init_size +
1753                                 pieces->init_data_size + pieces->boot_size) {
1754
1755                 IWL_ERR(priv,
1756                         "uCode file size %d does not match expected size\n",
1757                         (int)ucode_raw->size);
1758                 return -EINVAL;
1759         }
1760
1761         pieces->inst = src;
1762         src += pieces->inst_size;
1763         pieces->data = src;
1764         src += pieces->data_size;
1765         pieces->init = src;
1766         src += pieces->init_size;
1767         pieces->init_data = src;
1768         src += pieces->init_data_size;
1769         pieces->boot = src;
1770         src += pieces->boot_size;
1771
1772         return 0;
1773 }
1774
1775 static int iwlagn_wanted_ucode_alternative = 1;
1776
1777 static int iwlagn_load_firmware(struct iwl_priv *priv,
1778                                 const struct firmware *ucode_raw,
1779                                 struct iwlagn_firmware_pieces *pieces,
1780                                 struct iwlagn_ucode_capabilities *capa)
1781 {
1782         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1783         struct iwl_ucode_tlv *tlv;
1784         size_t len = ucode_raw->size;
1785         const u8 *data;
1786         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1787         u64 alternatives;
1788         u32 tlv_len;
1789         enum iwl_ucode_tlv_type tlv_type;
1790         const u8 *tlv_data;
1791
1792         if (len < sizeof(*ucode)) {
1793                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1794                 return -EINVAL;
1795         }
1796
1797         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1798                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1799                         le32_to_cpu(ucode->magic));
1800                 return -EINVAL;
1801         }
1802
1803         /*
1804          * Check which alternatives are present, and "downgrade"
1805          * when the chosen alternative is not present, warning
1806          * the user when that happens. Some files may not have
1807          * any alternatives, so don't warn in that case.
1808          */
1809         alternatives = le64_to_cpu(ucode->alternatives);
1810         tmp = wanted_alternative;
1811         if (wanted_alternative > 63)
1812                 wanted_alternative = 63;
1813         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1814                 wanted_alternative--;
1815         if (wanted_alternative && wanted_alternative != tmp)
1816                 IWL_WARN(priv,
1817                          "uCode alternative %d not available, choosing %d\n",
1818                          tmp, wanted_alternative);
1819
1820         priv->ucode_ver = le32_to_cpu(ucode->ver);
1821         pieces->build = le32_to_cpu(ucode->build);
1822         data = ucode->data;
1823
1824         len -= sizeof(*ucode);
1825
1826         while (len >= sizeof(*tlv)) {
1827                 u16 tlv_alt;
1828
1829                 len -= sizeof(*tlv);
1830                 tlv = (void *)data;
1831
1832                 tlv_len = le32_to_cpu(tlv->length);
1833                 tlv_type = le16_to_cpu(tlv->type);
1834                 tlv_alt = le16_to_cpu(tlv->alternative);
1835                 tlv_data = tlv->data;
1836
1837                 if (len < tlv_len) {
1838                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1839                                 len, tlv_len);
1840                         return -EINVAL;
1841                 }
1842                 len -= ALIGN(tlv_len, 4);
1843                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1844
1845                 /*
1846                  * Alternative 0 is always valid.
1847                  *
1848                  * Skip alternative TLVs that are not selected.
1849                  */
1850                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1851                         continue;
1852
1853                 switch (tlv_type) {
1854                 case IWL_UCODE_TLV_INST:
1855                         pieces->inst = tlv_data;
1856                         pieces->inst_size = tlv_len;
1857                         break;
1858                 case IWL_UCODE_TLV_DATA:
1859                         pieces->data = tlv_data;
1860                         pieces->data_size = tlv_len;
1861                         break;
1862                 case IWL_UCODE_TLV_INIT:
1863                         pieces->init = tlv_data;
1864                         pieces->init_size = tlv_len;
1865                         break;
1866                 case IWL_UCODE_TLV_INIT_DATA:
1867                         pieces->init_data = tlv_data;
1868                         pieces->init_data_size = tlv_len;
1869                         break;
1870                 case IWL_UCODE_TLV_BOOT:
1871                         pieces->boot = tlv_data;
1872                         pieces->boot_size = tlv_len;
1873                         break;
1874                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1875                         if (tlv_len != sizeof(u32))
1876                                 goto invalid_tlv_len;
1877                         capa->max_probe_length =
1878                                         le32_to_cpup((__le32 *)tlv_data);
1879                         break;
1880                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1881                         if (tlv_len != sizeof(u32))
1882                                 goto invalid_tlv_len;
1883                         pieces->init_evtlog_ptr =
1884                                         le32_to_cpup((__le32 *)tlv_data);
1885                         break;
1886                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1887                         if (tlv_len != sizeof(u32))
1888                                 goto invalid_tlv_len;
1889                         pieces->init_evtlog_size =
1890                                         le32_to_cpup((__le32 *)tlv_data);
1891                         break;
1892                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1893                         if (tlv_len != sizeof(u32))
1894                                 goto invalid_tlv_len;
1895                         pieces->init_errlog_ptr =
1896                                         le32_to_cpup((__le32 *)tlv_data);
1897                         break;
1898                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1899                         if (tlv_len != sizeof(u32))
1900                                 goto invalid_tlv_len;
1901                         pieces->inst_evtlog_ptr =
1902                                         le32_to_cpup((__le32 *)tlv_data);
1903                         break;
1904                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1905                         if (tlv_len != sizeof(u32))
1906                                 goto invalid_tlv_len;
1907                         pieces->inst_evtlog_size =
1908                                         le32_to_cpup((__le32 *)tlv_data);
1909                         break;
1910                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1911                         if (tlv_len != sizeof(u32))
1912                                 goto invalid_tlv_len;
1913                         pieces->inst_errlog_ptr =
1914                                         le32_to_cpup((__le32 *)tlv_data);
1915                         break;
1916                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1917                         if (tlv_len)
1918                                 goto invalid_tlv_len;
1919                         priv->enhance_sensitivity_table = true;
1920                         break;
1921                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1922                         if (tlv_len != sizeof(u32))
1923                                 goto invalid_tlv_len;
1924                         capa->standard_phy_calibration_size =
1925                                         le32_to_cpup((__le32 *)tlv_data);
1926                         break;
1927                 default:
1928                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1929                         break;
1930                 }
1931         }
1932
1933         if (len) {
1934                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1935                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1936                 return -EINVAL;
1937         }
1938
1939         return 0;
1940
1941  invalid_tlv_len:
1942         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
1943         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
1944
1945         return -EINVAL;
1946 }
1947
1948 /**
1949  * iwl_ucode_callback - callback when firmware was loaded
1950  *
1951  * If loaded successfully, copies the firmware into buffers
1952  * for the card to fetch (via DMA).
1953  */
1954 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1955 {
1956         struct iwl_priv *priv = context;
1957         struct iwl_ucode_header *ucode;
1958         int err;
1959         struct iwlagn_firmware_pieces pieces;
1960         const unsigned int api_max = priv->cfg->ucode_api_max;
1961         const unsigned int api_min = priv->cfg->ucode_api_min;
1962         u32 api_ver;
1963         char buildstr[25];
1964         u32 build;
1965         struct iwlagn_ucode_capabilities ucode_capa = {
1966                 .max_probe_length = 200,
1967                 .standard_phy_calibration_size =
1968                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1969         };
1970
1971         memset(&pieces, 0, sizeof(pieces));
1972
1973         if (!ucode_raw) {
1974                 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1975                         priv->firmware_name);
1976                 goto try_again;
1977         }
1978
1979         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1980                        priv->firmware_name, ucode_raw->size);
1981
1982         /* Make sure that we got at least the API version number */
1983         if (ucode_raw->size < 4) {
1984                 IWL_ERR(priv, "File size way too small!\n");
1985                 goto try_again;
1986         }
1987
1988         /* Data from ucode file:  header followed by uCode images */
1989         ucode = (struct iwl_ucode_header *)ucode_raw->data;
1990
1991         if (ucode->ver)
1992                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
1993         else
1994                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
1995                                            &ucode_capa);
1996
1997         if (err)
1998                 goto try_again;
1999
2000         api_ver = IWL_UCODE_API(priv->ucode_ver);
2001         build = pieces.build;
2002
2003         /*
2004          * api_ver should match the api version forming part of the
2005          * firmware filename ... but we don't check for that and only rely
2006          * on the API version read from firmware header from here on forward
2007          */
2008         if (api_ver < api_min || api_ver > api_max) {
2009                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2010                           "Driver supports v%u, firmware is v%u.\n",
2011                           api_max, api_ver);
2012                 goto try_again;
2013         }
2014
2015         if (api_ver != api_max)
2016                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2017                           "got v%u. New firmware can be obtained "
2018                           "from http://www.intellinuxwireless.org.\n",
2019                           api_max, api_ver);
2020
2021         if (build)
2022                 sprintf(buildstr, " build %u", build);
2023         else
2024                 buildstr[0] = '\0';
2025
2026         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2027                  IWL_UCODE_MAJOR(priv->ucode_ver),
2028                  IWL_UCODE_MINOR(priv->ucode_ver),
2029                  IWL_UCODE_API(priv->ucode_ver),
2030                  IWL_UCODE_SERIAL(priv->ucode_ver),
2031                  buildstr);
2032
2033         snprintf(priv->hw->wiphy->fw_version,
2034                  sizeof(priv->hw->wiphy->fw_version),
2035                  "%u.%u.%u.%u%s",
2036                  IWL_UCODE_MAJOR(priv->ucode_ver),
2037                  IWL_UCODE_MINOR(priv->ucode_ver),
2038                  IWL_UCODE_API(priv->ucode_ver),
2039                  IWL_UCODE_SERIAL(priv->ucode_ver),
2040                  buildstr);
2041
2042         /*
2043          * For any of the failures below (before allocating pci memory)
2044          * we will try to load a version with a smaller API -- maybe the
2045          * user just got a corrupted version of the latest API.
2046          */
2047
2048         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2049                        priv->ucode_ver);
2050         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2051                        pieces.inst_size);
2052         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2053                        pieces.data_size);
2054         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2055                        pieces.init_size);
2056         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2057                        pieces.init_data_size);
2058         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2059                        pieces.boot_size);
2060
2061         /* Verify that uCode images will fit in card's SRAM */
2062         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2063                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2064                         pieces.inst_size);
2065                 goto try_again;
2066         }
2067
2068         if (pieces.data_size > priv->hw_params.max_data_size) {
2069                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2070                         pieces.data_size);
2071                 goto try_again;
2072         }
2073
2074         if (pieces.init_size > priv->hw_params.max_inst_size) {
2075                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2076                         pieces.init_size);
2077                 goto try_again;
2078         }
2079
2080         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2081                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2082                         pieces.init_data_size);
2083                 goto try_again;
2084         }
2085
2086         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2087                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2088                         pieces.boot_size);
2089                 goto try_again;
2090         }
2091
2092         /* Allocate ucode buffers for card's bus-master loading ... */
2093
2094         /* Runtime instructions and 2 copies of data:
2095          * 1) unmodified from disk
2096          * 2) backup cache for save/restore during power-downs */
2097         priv->ucode_code.len = pieces.inst_size;
2098         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2099
2100         priv->ucode_data.len = pieces.data_size;
2101         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2102
2103         priv->ucode_data_backup.len = pieces.data_size;
2104         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2105
2106         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2107             !priv->ucode_data_backup.v_addr)
2108                 goto err_pci_alloc;
2109
2110         /* Initialization instructions and data */
2111         if (pieces.init_size && pieces.init_data_size) {
2112                 priv->ucode_init.len = pieces.init_size;
2113                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2114
2115                 priv->ucode_init_data.len = pieces.init_data_size;
2116                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2117
2118                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2119                         goto err_pci_alloc;
2120         }
2121
2122         /* Bootstrap (instructions only, no data) */
2123         if (pieces.boot_size) {
2124                 priv->ucode_boot.len = pieces.boot_size;
2125                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2126
2127                 if (!priv->ucode_boot.v_addr)
2128                         goto err_pci_alloc;
2129         }
2130
2131         /* Now that we can no longer fail, copy information */
2132
2133         /*
2134          * The (size - 16) / 12 formula is based on the information recorded
2135          * for each event, which is of mode 1 (including timestamp) for all
2136          * new microcodes that include this information.
2137          */
2138         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2139         if (pieces.init_evtlog_size)
2140                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2141         else
2142                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2143         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2144         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2145         if (pieces.inst_evtlog_size)
2146                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2147         else
2148                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2149         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2150
2151         /* Copy images into buffers for card's bus-master reads ... */
2152
2153         /* Runtime instructions (first block of data in file) */
2154         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2155                         pieces.inst_size);
2156         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2157
2158         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2159                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2160
2161         /*
2162          * Runtime data
2163          * NOTE:  Copy into backup buffer will be done in iwl_up()
2164          */
2165         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2166                         pieces.data_size);
2167         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2168         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2169
2170         /* Initialization instructions */
2171         if (pieces.init_size) {
2172                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2173                                 pieces.init_size);
2174                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2175         }
2176
2177         /* Initialization data */
2178         if (pieces.init_data_size) {
2179                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2180                                pieces.init_data_size);
2181                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2182                        pieces.init_data_size);
2183         }
2184
2185         /* Bootstrap instructions */
2186         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2187                         pieces.boot_size);
2188         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2189
2190         /*
2191          * figure out the offset of chain noise reset and gain commands
2192          * base on the size of standard phy calibration commands table size
2193          */
2194         if (ucode_capa.standard_phy_calibration_size >
2195             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2196                 ucode_capa.standard_phy_calibration_size =
2197                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2198
2199         priv->_agn.phy_calib_chain_noise_reset_cmd =
2200                 ucode_capa.standard_phy_calibration_size;
2201         priv->_agn.phy_calib_chain_noise_gain_cmd =
2202                 ucode_capa.standard_phy_calibration_size + 1;
2203
2204         /**************************************************
2205          * This is still part of probe() in a sense...
2206          *
2207          * 9. Setup and register with mac80211 and debugfs
2208          **************************************************/
2209         err = iwl_mac_setup_register(priv, &ucode_capa);
2210         if (err)
2211                 goto out_unbind;
2212
2213         err = iwl_dbgfs_register(priv, DRV_NAME);
2214         if (err)
2215                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2216
2217         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2218                                         &iwl_attribute_group);
2219         if (err) {
2220                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2221                 goto out_unbind;
2222         }
2223
2224         /* We have our copies now, allow OS release its copies */
2225         release_firmware(ucode_raw);
2226         complete(&priv->_agn.firmware_loading_complete);
2227         return;
2228
2229  try_again:
2230         /* try next, if any */
2231         if (iwl_request_firmware(priv, false))
2232                 goto out_unbind;
2233         release_firmware(ucode_raw);
2234         return;
2235
2236  err_pci_alloc:
2237         IWL_ERR(priv, "failed to allocate pci memory\n");
2238         iwl_dealloc_ucode_pci(priv);
2239  out_unbind:
2240         complete(&priv->_agn.firmware_loading_complete);
2241         device_release_driver(&priv->pci_dev->dev);
2242         release_firmware(ucode_raw);
2243 }
2244
2245 static const char *desc_lookup_text[] = {
2246         "OK",
2247         "FAIL",
2248         "BAD_PARAM",
2249         "BAD_CHECKSUM",
2250         "NMI_INTERRUPT_WDG",
2251         "SYSASSERT",
2252         "FATAL_ERROR",
2253         "BAD_COMMAND",
2254         "HW_ERROR_TUNE_LOCK",
2255         "HW_ERROR_TEMPERATURE",
2256         "ILLEGAL_CHAN_FREQ",
2257         "VCC_NOT_STABLE",
2258         "FH_ERROR",
2259         "NMI_INTERRUPT_HOST",
2260         "NMI_INTERRUPT_ACTION_PT",
2261         "NMI_INTERRUPT_UNKNOWN",
2262         "UCODE_VERSION_MISMATCH",
2263         "HW_ERROR_ABS_LOCK",
2264         "HW_ERROR_CAL_LOCK_FAIL",
2265         "NMI_INTERRUPT_INST_ACTION_PT",
2266         "NMI_INTERRUPT_DATA_ACTION_PT",
2267         "NMI_TRM_HW_ER",
2268         "NMI_INTERRUPT_TRM",
2269         "NMI_INTERRUPT_BREAK_POINT"
2270         "DEBUG_0",
2271         "DEBUG_1",
2272         "DEBUG_2",
2273         "DEBUG_3",
2274 };
2275
2276 static struct { char *name; u8 num; } advanced_lookup[] = {
2277         { "NMI_INTERRUPT_WDG", 0x34 },
2278         { "SYSASSERT", 0x35 },
2279         { "UCODE_VERSION_MISMATCH", 0x37 },
2280         { "BAD_COMMAND", 0x38 },
2281         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2282         { "FATAL_ERROR", 0x3D },
2283         { "NMI_TRM_HW_ERR", 0x46 },
2284         { "NMI_INTERRUPT_TRM", 0x4C },
2285         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2286         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2287         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2288         { "NMI_INTERRUPT_HOST", 0x66 },
2289         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2290         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2291         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2292         { "ADVANCED_SYSASSERT", 0 },
2293 };
2294
2295 static const char *desc_lookup(u32 num)
2296 {
2297         int i;
2298         int max = ARRAY_SIZE(desc_lookup_text);
2299
2300         if (num < max)
2301                 return desc_lookup_text[num];
2302
2303         max = ARRAY_SIZE(advanced_lookup) - 1;
2304         for (i = 0; i < max; i++) {
2305                 if (advanced_lookup[i].num == num)
2306                         break;;
2307         }
2308         return advanced_lookup[i].name;
2309 }
2310
2311 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2312 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2313
2314 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2315 {
2316         u32 data2, line;
2317         u32 desc, time, count, base, data1;
2318         u32 blink1, blink2, ilink1, ilink2;
2319         u32 pc, hcmd;
2320
2321         if (priv->ucode_type == UCODE_INIT) {
2322                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2323                 if (!base)
2324                         base = priv->_agn.init_errlog_ptr;
2325         } else {
2326                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2327                 if (!base)
2328                         base = priv->_agn.inst_errlog_ptr;
2329         }
2330
2331         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2332                 IWL_ERR(priv,
2333                         "Not valid error log pointer 0x%08X for %s uCode\n",
2334                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2335                 return;
2336         }
2337
2338         count = iwl_read_targ_mem(priv, base);
2339
2340         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2341                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2342                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2343                         priv->status, count);
2344         }
2345
2346         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2347         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2348         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2349         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2350         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2351         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2352         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2353         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2354         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2355         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2356         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2357
2358         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2359                                       blink1, blink2, ilink1, ilink2);
2360
2361         IWL_ERR(priv, "Desc                                  Time       "
2362                 "data1      data2      line\n");
2363         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2364                 desc_lookup(desc), desc, time, data1, data2, line);
2365         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2366         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2367                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2368 }
2369
2370 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2371
2372 /**
2373  * iwl_print_event_log - Dump error event log to syslog
2374  *
2375  */
2376 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2377                                u32 num_events, u32 mode,
2378                                int pos, char **buf, size_t bufsz)
2379 {
2380         u32 i;
2381         u32 base;       /* SRAM byte address of event log header */
2382         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2383         u32 ptr;        /* SRAM byte address of log data */
2384         u32 ev, time, data; /* event log data */
2385         unsigned long reg_flags;
2386
2387         if (num_events == 0)
2388                 return pos;
2389
2390         if (priv->ucode_type == UCODE_INIT) {
2391                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2392                 if (!base)
2393                         base = priv->_agn.init_evtlog_ptr;
2394         } else {
2395                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2396                 if (!base)
2397                         base = priv->_agn.inst_evtlog_ptr;
2398         }
2399
2400         if (mode == 0)
2401                 event_size = 2 * sizeof(u32);
2402         else
2403                 event_size = 3 * sizeof(u32);
2404
2405         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2406
2407         /* Make sure device is powered up for SRAM reads */
2408         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2409         iwl_grab_nic_access(priv);
2410
2411         /* Set starting address; reads will auto-increment */
2412         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2413         rmb();
2414
2415         /* "time" is actually "data" for mode 0 (no timestamp).
2416         * place event id # at far right for easier visual parsing. */
2417         for (i = 0; i < num_events; i++) {
2418                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2419                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2420                 if (mode == 0) {
2421                         /* data, ev */
2422                         if (bufsz) {
2423                                 pos += scnprintf(*buf + pos, bufsz - pos,
2424                                                 "EVT_LOG:0x%08x:%04u\n",
2425                                                 time, ev);
2426                         } else {
2427                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2428                                         time, ev);
2429                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2430                                         time, ev);
2431                         }
2432                 } else {
2433                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2434                         if (bufsz) {
2435                                 pos += scnprintf(*buf + pos, bufsz - pos,
2436                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2437                                                  time, data, ev);
2438                         } else {
2439                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2440                                         time, data, ev);
2441                                 trace_iwlwifi_dev_ucode_event(priv, time,
2442                                         data, ev);
2443                         }
2444                 }
2445         }
2446
2447         /* Allow device to power down */
2448         iwl_release_nic_access(priv);
2449         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2450         return pos;
2451 }
2452
2453 /**
2454  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2455  */
2456 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2457                                     u32 num_wraps, u32 next_entry,
2458                                     u32 size, u32 mode,
2459                                     int pos, char **buf, size_t bufsz)
2460 {
2461         /*
2462          * display the newest DEFAULT_LOG_ENTRIES entries
2463          * i.e the entries just before the next ont that uCode would fill.
2464          */
2465         if (num_wraps) {
2466                 if (next_entry < size) {
2467                         pos = iwl_print_event_log(priv,
2468                                                 capacity - (size - next_entry),
2469                                                 size - next_entry, mode,
2470                                                 pos, buf, bufsz);
2471                         pos = iwl_print_event_log(priv, 0,
2472                                                   next_entry, mode,
2473                                                   pos, buf, bufsz);
2474                 } else
2475                         pos = iwl_print_event_log(priv, next_entry - size,
2476                                                   size, mode, pos, buf, bufsz);
2477         } else {
2478                 if (next_entry < size) {
2479                         pos = iwl_print_event_log(priv, 0, next_entry,
2480                                                   mode, pos, buf, bufsz);
2481                 } else {
2482                         pos = iwl_print_event_log(priv, next_entry - size,
2483                                                   size, mode, pos, buf, bufsz);
2484                 }
2485         }
2486         return pos;
2487 }
2488
2489 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2490
2491 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2492                             char **buf, bool display)
2493 {
2494         u32 base;       /* SRAM byte address of event log header */
2495         u32 capacity;   /* event log capacity in # entries */
2496         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2497         u32 num_wraps;  /* # times uCode wrapped to top of log */
2498         u32 next_entry; /* index of next entry to be written by uCode */
2499         u32 size;       /* # entries that we'll print */
2500         u32 logsize;
2501         int pos = 0;
2502         size_t bufsz = 0;
2503
2504         if (priv->ucode_type == UCODE_INIT) {
2505                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2506                 logsize = priv->_agn.init_evtlog_size;
2507                 if (!base)
2508                         base = priv->_agn.init_evtlog_ptr;
2509         } else {
2510                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2511                 logsize = priv->_agn.inst_evtlog_size;
2512                 if (!base)
2513                         base = priv->_agn.inst_evtlog_ptr;
2514         }
2515
2516         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2517                 IWL_ERR(priv,
2518                         "Invalid event log pointer 0x%08X for %s uCode\n",
2519                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2520                 return -EINVAL;
2521         }
2522
2523         /* event log header */
2524         capacity = iwl_read_targ_mem(priv, base);
2525         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2526         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2527         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2528
2529         if (capacity > logsize) {
2530                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2531                         capacity, logsize);
2532                 capacity = logsize;
2533         }
2534
2535         if (next_entry > logsize) {
2536                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2537                         next_entry, logsize);
2538                 next_entry = logsize;
2539         }
2540
2541         size = num_wraps ? capacity : next_entry;
2542
2543         /* bail out if nothing in log */
2544         if (size == 0) {
2545                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2546                 return pos;
2547         }
2548
2549 #ifdef CONFIG_IWLWIFI_DEBUG
2550         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2551                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2552                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2553 #else
2554         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2555                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2556 #endif
2557         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2558                 size);
2559
2560 #ifdef CONFIG_IWLWIFI_DEBUG
2561         if (display) {
2562                 if (full_log)
2563                         bufsz = capacity * 48;
2564                 else
2565                         bufsz = size * 48;
2566                 *buf = kmalloc(bufsz, GFP_KERNEL);
2567                 if (!*buf)
2568                         return -ENOMEM;
2569         }
2570         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2571                 /*
2572                  * if uCode has wrapped back to top of log,
2573                  * start at the oldest entry,
2574                  * i.e the next one that uCode would fill.
2575                  */
2576                 if (num_wraps)
2577                         pos = iwl_print_event_log(priv, next_entry,
2578                                                 capacity - next_entry, mode,
2579                                                 pos, buf, bufsz);
2580                 /* (then/else) start at top of log */
2581                 pos = iwl_print_event_log(priv, 0,
2582                                           next_entry, mode, pos, buf, bufsz);
2583         } else
2584                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2585                                                 next_entry, size, mode,
2586                                                 pos, buf, bufsz);
2587 #else
2588         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2589                                         next_entry, size, mode,
2590                                         pos, buf, bufsz);
2591 #endif
2592         return pos;
2593 }
2594
2595 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2596 {
2597         struct iwl_ct_kill_config cmd;
2598         struct iwl_ct_kill_throttling_config adv_cmd;
2599         unsigned long flags;
2600         int ret = 0;
2601
2602         spin_lock_irqsave(&priv->lock, flags);
2603         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2604                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2605         spin_unlock_irqrestore(&priv->lock, flags);
2606         priv->thermal_throttle.ct_kill_toggle = false;
2607
2608         if (priv->cfg->support_ct_kill_exit) {
2609                 adv_cmd.critical_temperature_enter =
2610                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2611                 adv_cmd.critical_temperature_exit =
2612                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2613
2614                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2615                                        sizeof(adv_cmd), &adv_cmd);
2616                 if (ret)
2617                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2618                 else
2619                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2620                                         "succeeded, "
2621                                         "critical temperature enter is %d,"
2622                                         "exit is %d\n",
2623                                        priv->hw_params.ct_kill_threshold,
2624                                        priv->hw_params.ct_kill_exit_threshold);
2625         } else {
2626                 cmd.critical_temperature_R =
2627                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2628
2629                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2630                                        sizeof(cmd), &cmd);
2631                 if (ret)
2632                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2633                 else
2634                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2635                                         "succeeded, "
2636                                         "critical temperature is %d\n",
2637                                         priv->hw_params.ct_kill_threshold);
2638         }
2639 }
2640
2641 /**
2642  * iwl_alive_start - called after REPLY_ALIVE notification received
2643  *                   from protocol/runtime uCode (initialization uCode's
2644  *                   Alive gets handled by iwl_init_alive_start()).
2645  */
2646 static void iwl_alive_start(struct iwl_priv *priv)
2647 {
2648         int ret = 0;
2649
2650         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2651
2652         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2653                 /* We had an error bringing up the hardware, so take it
2654                  * all the way back down so we can try again */
2655                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2656                 goto restart;
2657         }
2658
2659         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2660          * This is a paranoid check, because we would not have gotten the
2661          * "runtime" alive if code weren't properly loaded.  */
2662         if (iwl_verify_ucode(priv)) {
2663                 /* Runtime instruction load was bad;
2664                  * take it all the way back down so we can try again */
2665                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2666                 goto restart;
2667         }
2668
2669         ret = priv->cfg->ops->lib->alive_notify(priv);
2670         if (ret) {
2671                 IWL_WARN(priv,
2672                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2673                 goto restart;
2674         }
2675
2676         /* After the ALIVE response, we can send host commands to the uCode */
2677         set_bit(STATUS_ALIVE, &priv->status);
2678
2679         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2680                 /* Enable timer to monitor the driver queues */
2681                 mod_timer(&priv->monitor_recover,
2682                         jiffies +
2683                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2684         }
2685
2686         if (iwl_is_rfkill(priv))
2687                 return;
2688
2689         ieee80211_wake_queues(priv->hw);
2690
2691         priv->active_rate = IWL_RATES_MASK;
2692
2693         /* Configure Tx antenna selection based on H/W config */
2694         if (priv->cfg->ops->hcmd->set_tx_ant)
2695                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2696
2697         if (iwl_is_associated(priv)) {
2698                 struct iwl_rxon_cmd *active_rxon =
2699                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2700                 /* apply any changes in staging */
2701                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2702                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2703         } else {
2704                 /* Initialize our rx_config data */
2705                 iwl_connection_init_rx_config(priv, NULL);
2706
2707                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2708                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2709         }
2710
2711         /* Configure Bluetooth device coexistence support */
2712         priv->cfg->ops->hcmd->send_bt_config(priv);
2713
2714         iwl_reset_run_time_calib(priv);
2715
2716         /* Configure the adapter for unassociated operation */
2717         iwlcore_commit_rxon(priv);
2718
2719         /* At this point, the NIC is initialized and operational */
2720         iwl_rf_kill_ct_config(priv);
2721
2722         iwl_leds_init(priv);
2723
2724         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2725         set_bit(STATUS_READY, &priv->status);
2726         wake_up_interruptible(&priv->wait_command_queue);
2727
2728         iwl_power_update_mode(priv, true);
2729         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2730
2731
2732         return;
2733
2734  restart:
2735         queue_work(priv->workqueue, &priv->restart);
2736 }
2737
2738 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2739
2740 static void __iwl_down(struct iwl_priv *priv)
2741 {
2742         unsigned long flags;
2743         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2744
2745         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2746
2747         if (!exit_pending)
2748                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2749
2750         iwl_clear_ucode_stations(priv);
2751         iwl_dealloc_bcast_station(priv);
2752         iwl_clear_driver_stations(priv);
2753
2754         /* Unblock any waiting calls */
2755         wake_up_interruptible_all(&priv->wait_command_queue);
2756
2757         /* Wipe out the EXIT_PENDING status bit if we are not actually
2758          * exiting the module */
2759         if (!exit_pending)
2760                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2761
2762         /* stop and reset the on-board processor */
2763         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2764
2765         /* tell the device to stop sending interrupts */
2766         spin_lock_irqsave(&priv->lock, flags);
2767         iwl_disable_interrupts(priv);
2768         spin_unlock_irqrestore(&priv->lock, flags);
2769         iwl_synchronize_irq(priv);
2770
2771         if (priv->mac80211_registered)
2772                 ieee80211_stop_queues(priv->hw);
2773
2774         /* If we have not previously called iwl_init() then
2775          * clear all bits but the RF Kill bit and return */
2776         if (!iwl_is_init(priv)) {
2777                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2778                                         STATUS_RF_KILL_HW |
2779                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2780                                         STATUS_GEO_CONFIGURED |
2781                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2782                                         STATUS_EXIT_PENDING;
2783                 goto exit;
2784         }
2785
2786         /* ...otherwise clear out all the status bits but the RF Kill
2787          * bit and continue taking the NIC down. */
2788         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2789                                 STATUS_RF_KILL_HW |
2790                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2791                                 STATUS_GEO_CONFIGURED |
2792                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2793                                 STATUS_FW_ERROR |
2794                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2795                                 STATUS_EXIT_PENDING;
2796
2797         /* device going down, Stop using ICT table */
2798         iwl_disable_ict(priv);
2799
2800         iwlagn_txq_ctx_stop(priv);
2801         iwlagn_rxq_stop(priv);
2802
2803         /* Power-down device's busmaster DMA clocks */
2804         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2805         udelay(5);
2806
2807         /* Make sure (redundant) we've released our request to stay awake */
2808         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2809
2810         /* Stop the device, and put it in low power state */
2811         priv->cfg->ops->lib->apm_ops.stop(priv);
2812
2813  exit:
2814         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2815
2816         if (priv->ibss_beacon)
2817                 dev_kfree_skb(priv->ibss_beacon);
2818         priv->ibss_beacon = NULL;
2819
2820         /* clear out any free frames */
2821         iwl_clear_free_frames(priv);
2822 }
2823
2824 static void iwl_down(struct iwl_priv *priv)
2825 {
2826         mutex_lock(&priv->mutex);
2827         __iwl_down(priv);
2828         mutex_unlock(&priv->mutex);
2829
2830         iwl_cancel_deferred_work(priv);
2831 }
2832
2833 #define HW_READY_TIMEOUT (50)
2834
2835 static int iwl_set_hw_ready(struct iwl_priv *priv)
2836 {
2837         int ret = 0;
2838
2839         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2840                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2841
2842         /* See if we got it */
2843         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2844                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2845                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2846                                 HW_READY_TIMEOUT);
2847         if (ret != -ETIMEDOUT)
2848                 priv->hw_ready = true;
2849         else
2850                 priv->hw_ready = false;
2851
2852         IWL_DEBUG_INFO(priv, "hardware %s\n",
2853                       (priv->hw_ready == 1) ? "ready" : "not ready");
2854         return ret;
2855 }
2856
2857 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2858 {
2859         int ret = 0;
2860
2861         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2862
2863         ret = iwl_set_hw_ready(priv);
2864         if (priv->hw_ready)
2865                 return ret;
2866
2867         /* If HW is not ready, prepare the conditions to check again */
2868         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2869                         CSR_HW_IF_CONFIG_REG_PREPARE);
2870
2871         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2872                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2873                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2874
2875         /* HW should be ready by now, check again. */
2876         if (ret != -ETIMEDOUT)
2877                 iwl_set_hw_ready(priv);
2878
2879         return ret;
2880 }
2881
2882 #define MAX_HW_RESTARTS 5
2883
2884 static int __iwl_up(struct iwl_priv *priv)
2885 {
2886         int i;
2887         int ret;
2888
2889         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2890                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2891                 return -EIO;
2892         }
2893
2894         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2895                 IWL_ERR(priv, "ucode not available for device bringup\n");
2896                 return -EIO;
2897         }
2898
2899         ret = iwl_alloc_bcast_station(priv, true);
2900         if (ret)
2901                 return ret;
2902
2903         iwl_prepare_card_hw(priv);
2904
2905         if (!priv->hw_ready) {
2906                 IWL_WARN(priv, "Exit HW not ready\n");
2907                 return -EIO;
2908         }
2909
2910         /* If platform's RF_KILL switch is NOT set to KILL */
2911         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2912                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2913         else
2914                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2915
2916         if (iwl_is_rfkill(priv)) {
2917                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2918
2919                 iwl_enable_interrupts(priv);
2920                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2921                 return 0;
2922         }
2923
2924         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2925
2926         ret = iwlagn_hw_nic_init(priv);
2927         if (ret) {
2928                 IWL_ERR(priv, "Unable to init nic\n");
2929                 return ret;
2930         }
2931
2932         /* make sure rfkill handshake bits are cleared */
2933         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2934         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2935                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2936
2937         /* clear (again), then enable host interrupts */
2938         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2939         iwl_enable_interrupts(priv);
2940
2941         /* really make sure rfkill handshake bits are cleared */
2942         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2943         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2944
2945         /* Copy original ucode data image from disk into backup cache.
2946          * This will be used to initialize the on-board processor's
2947          * data SRAM for a clean start when the runtime program first loads. */
2948         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2949                priv->ucode_data.len);
2950
2951         for (i = 0; i < MAX_HW_RESTARTS; i++) {
2952
2953                 /* load bootstrap state machine,
2954                  * load bootstrap program into processor's memory,
2955                  * prepare to load the "initialize" uCode */
2956                 ret = priv->cfg->ops->lib->load_ucode(priv);
2957
2958                 if (ret) {
2959                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2960                                 ret);
2961                         continue;
2962                 }
2963
2964                 /* start card; "initialize" will load runtime ucode */
2965                 iwl_nic_start(priv);
2966
2967                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2968
2969                 return 0;
2970         }
2971
2972         set_bit(STATUS_EXIT_PENDING, &priv->status);
2973         __iwl_down(priv);
2974         clear_bit(STATUS_EXIT_PENDING, &priv->status);
2975
2976         /* tried to restart and config the device for as long as our
2977          * patience could withstand */
2978         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2979         return -EIO;
2980 }
2981
2982
2983 /*****************************************************************************
2984  *
2985  * Workqueue callbacks
2986  *
2987  *****************************************************************************/
2988
2989 static void iwl_bg_init_alive_start(struct work_struct *data)
2990 {
2991         struct iwl_priv *priv =
2992             container_of(data, struct iwl_priv, init_alive_start.work);
2993
2994         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2995                 return;
2996
2997         mutex_lock(&priv->mutex);
2998         priv->cfg->ops->lib->init_alive_start(priv);
2999         mutex_unlock(&priv->mutex);
3000 }
3001
3002 static void iwl_bg_alive_start(struct work_struct *data)
3003 {
3004         struct iwl_priv *priv =
3005             container_of(data, struct iwl_priv, alive_start.work);
3006
3007         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3008                 return;
3009
3010         /* enable dram interrupt */
3011         iwl_reset_ict(priv);
3012
3013         mutex_lock(&priv->mutex);
3014         iwl_alive_start(priv);
3015         mutex_unlock(&priv->mutex);
3016 }
3017
3018 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3019 {
3020         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3021                         run_time_calib_work);
3022
3023         mutex_lock(&priv->mutex);
3024
3025         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3026             test_bit(STATUS_SCANNING, &priv->status)) {
3027                 mutex_unlock(&priv->mutex);
3028                 return;
3029         }
3030
3031         if (priv->start_calib) {
3032                 if (priv->cfg->bt_statistics) {
3033                         iwl_chain_noise_calibration(priv,
3034                                         (void *)&priv->_agn.statistics_bt);
3035                         iwl_sensitivity_calibration(priv,
3036                                         (void *)&priv->_agn.statistics_bt);
3037                 } else {
3038                         iwl_chain_noise_calibration(priv,
3039                                         (void *)&priv->_agn.statistics);
3040                         iwl_sensitivity_calibration(priv,
3041                                         (void *)&priv->_agn.statistics);
3042                 }
3043         }
3044
3045         mutex_unlock(&priv->mutex);
3046 }
3047
3048 static void iwl_bg_restart(struct work_struct *data)
3049 {
3050         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3051
3052         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3053                 return;
3054
3055         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3056                 mutex_lock(&priv->mutex);
3057                 priv->vif = NULL;
3058                 priv->is_open = 0;
3059                 mutex_unlock(&priv->mutex);
3060                 iwl_down(priv);
3061                 ieee80211_restart_hw(priv->hw);
3062         } else {
3063                 iwl_down(priv);
3064
3065                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3066                         return;
3067
3068                 mutex_lock(&priv->mutex);
3069                 __iwl_up(priv);
3070                 mutex_unlock(&priv->mutex);
3071         }
3072 }
3073
3074 static void iwl_bg_rx_replenish(struct work_struct *data)
3075 {
3076         struct iwl_priv *priv =
3077             container_of(data, struct iwl_priv, rx_replenish);
3078
3079         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3080                 return;
3081
3082         mutex_lock(&priv->mutex);
3083         iwlagn_rx_replenish(priv);
3084         mutex_unlock(&priv->mutex);
3085 }
3086
3087 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3088
3089 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3090 {
3091         struct ieee80211_conf *conf = NULL;
3092         int ret = 0;
3093
3094         if (!vif || !priv->is_open)
3095                 return;
3096
3097         if (vif->type == NL80211_IFTYPE_AP) {
3098                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3099                 return;
3100         }
3101
3102         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3103                 return;
3104
3105         iwl_scan_cancel_timeout(priv, 200);
3106
3107         conf = ieee80211_get_hw_conf(priv->hw);
3108
3109         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3110         iwlcore_commit_rxon(priv);
3111
3112         ret = iwl_send_rxon_timing(priv, vif);
3113         if (ret)
3114                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3115                             "Attempting to continue.\n");
3116
3117         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3118
3119         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3120
3121         if (priv->cfg->ops->hcmd->set_rxon_chain)
3122                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3123
3124         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3125
3126         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3127                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3128
3129         if (vif->bss_conf.use_short_preamble)
3130                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3131         else
3132                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3133
3134         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3135                 if (vif->bss_conf.use_short_slot)
3136                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3137                 else
3138                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3139         }
3140
3141         iwlcore_commit_rxon(priv);
3142
3143         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3144                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3145
3146         switch (vif->type) {
3147         case NL80211_IFTYPE_STATION:
3148                 break;
3149         case NL80211_IFTYPE_ADHOC:
3150                 iwl_send_beacon_cmd(priv);
3151                 break;
3152         default:
3153                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3154                           __func__, vif->type);
3155                 break;
3156         }
3157
3158         /* the chain noise calibration will enabled PM upon completion
3159          * If chain noise has already been run, then we need to enable
3160          * power management here */
3161         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3162                 iwl_power_update_mode(priv, false);
3163
3164         /* Enable Rx differential gain and sensitivity calibrations */
3165         iwl_chain_noise_reset(priv);
3166         priv->start_calib = 1;
3167
3168 }
3169
3170 /*****************************************************************************
3171  *
3172  * mac80211 entry point functions
3173  *
3174  *****************************************************************************/
3175
3176 #define UCODE_READY_TIMEOUT     (4 * HZ)
3177
3178 /*
3179  * Not a mac80211 entry point function, but it fits in with all the
3180  * other mac80211 functions grouped here.
3181  */
3182 static int iwl_mac_setup_register(struct iwl_priv *priv,
3183                                   struct iwlagn_ucode_capabilities *capa)
3184 {
3185         int ret;
3186         struct ieee80211_hw *hw = priv->hw;
3187         hw->rate_control_algorithm = "iwl-agn-rs";
3188
3189         /* Tell mac80211 our characteristics */
3190         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3191                     IEEE80211_HW_AMPDU_AGGREGATION |
3192                     IEEE80211_HW_SPECTRUM_MGMT;
3193
3194         if (!priv->cfg->broken_powersave)
3195                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3196                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3197
3198         if (priv->cfg->sku & IWL_SKU_N)
3199                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3200                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3201
3202         hw->sta_data_size = sizeof(struct iwl_station_priv);
3203         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3204
3205         hw->wiphy->interface_modes =
3206                 BIT(NL80211_IFTYPE_STATION) |
3207                 BIT(NL80211_IFTYPE_ADHOC);
3208
3209         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3210                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3211
3212         /*
3213          * For now, disable PS by default because it affects
3214          * RX performance significantly.
3215          */
3216         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3217
3218         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3219         /* we create the 802.11 header and a zero-length SSID element */
3220         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3221
3222         /* Default value; 4 EDCA QOS priorities */
3223         hw->queues = 4;
3224
3225         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3226
3227         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3228                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3229                         &priv->bands[IEEE80211_BAND_2GHZ];
3230         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3231                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3232                         &priv->bands[IEEE80211_BAND_5GHZ];
3233
3234         ret = ieee80211_register_hw(priv->hw);
3235         if (ret) {
3236                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3237                 return ret;
3238         }
3239         priv->mac80211_registered = 1;
3240
3241         return 0;
3242 }
3243
3244
3245 static int iwl_mac_start(struct ieee80211_hw *hw)
3246 {
3247         struct iwl_priv *priv = hw->priv;
3248         int ret;
3249
3250         IWL_DEBUG_MAC80211(priv, "enter\n");
3251
3252         /* we should be verifying the device is ready to be opened */
3253         mutex_lock(&priv->mutex);
3254         ret = __iwl_up(priv);
3255         mutex_unlock(&priv->mutex);
3256
3257         if (ret)
3258                 return ret;
3259
3260         if (iwl_is_rfkill(priv))
3261                 goto out;
3262
3263         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3264
3265         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3266          * mac80211 will not be run successfully. */
3267         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3268                         test_bit(STATUS_READY, &priv->status),
3269                         UCODE_READY_TIMEOUT);
3270         if (!ret) {
3271                 if (!test_bit(STATUS_READY, &priv->status)) {
3272                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3273                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3274                         return -ETIMEDOUT;
3275                 }
3276         }
3277
3278         iwl_led_start(priv);
3279
3280 out:
3281         priv->is_open = 1;
3282         IWL_DEBUG_MAC80211(priv, "leave\n");
3283         return 0;
3284 }
3285
3286 static void iwl_mac_stop(struct ieee80211_hw *hw)
3287 {
3288         struct iwl_priv *priv = hw->priv;
3289
3290         IWL_DEBUG_MAC80211(priv, "enter\n");
3291
3292         if (!priv->is_open)
3293                 return;
3294
3295         priv->is_open = 0;
3296
3297         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3298                 /* stop mac, cancel any scan request and clear
3299                  * RXON_FILTER_ASSOC_MSK BIT
3300                  */
3301                 mutex_lock(&priv->mutex);
3302                 iwl_scan_cancel_timeout(priv, 100);
3303                 mutex_unlock(&priv->mutex);
3304         }
3305
3306         iwl_down(priv);
3307
3308         flush_workqueue(priv->workqueue);
3309
3310         /* enable interrupts again in order to receive rfkill changes */
3311         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3312         iwl_enable_interrupts(priv);
3313
3314         IWL_DEBUG_MAC80211(priv, "leave\n");
3315 }
3316
3317 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3318 {
3319         struct iwl_priv *priv = hw->priv;
3320
3321         IWL_DEBUG_MACDUMP(priv, "enter\n");
3322
3323         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3324                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3325
3326         if (iwlagn_tx_skb(priv, skb))
3327                 dev_kfree_skb_any(skb);
3328
3329         IWL_DEBUG_MACDUMP(priv, "leave\n");
3330         return NETDEV_TX_OK;
3331 }
3332
3333 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3334 {
3335         int ret = 0;
3336
3337         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3338                 return;
3339
3340         /* The following should be done only at AP bring up */
3341         if (!iwl_is_associated(priv)) {
3342
3343                 /* RXON - unassoc (to set timing command) */
3344                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3345                 iwlcore_commit_rxon(priv);
3346
3347                 /* RXON Timing */
3348                 ret = iwl_send_rxon_timing(priv, vif);
3349                 if (ret)
3350                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3351                                         "Attempting to continue.\n");
3352
3353                 /* AP has all antennas */
3354                 priv->chain_noise_data.active_chains =
3355                         priv->hw_params.valid_rx_ant;
3356                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3357                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3358                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3359
3360                 priv->staging_rxon.assoc_id = 0;
3361
3362                 if (vif->bss_conf.use_short_preamble)
3363                         priv->staging_rxon.flags |=
3364                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3365                 else
3366                         priv->staging_rxon.flags &=
3367                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3368
3369                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3370                         if (vif->bss_conf.use_short_slot)
3371                                 priv->staging_rxon.flags |=
3372                                         RXON_FLG_SHORT_SLOT_MSK;
3373                         else
3374                                 priv->staging_rxon.flags &=
3375                                         ~RXON_FLG_SHORT_SLOT_MSK;
3376                 }
3377                 /* restore RXON assoc */
3378                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3379                 iwlcore_commit_rxon(priv);
3380         }
3381         iwl_send_beacon_cmd(priv);
3382
3383         /* FIXME - we need to add code here to detect a totally new
3384          * configuration, reset the AP, unassoc, rxon timing, assoc,
3385          * clear sta table, add BCAST sta... */
3386 }
3387
3388 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3389                                     struct ieee80211_vif *vif,
3390                                     struct ieee80211_key_conf *keyconf,
3391                                     struct ieee80211_sta *sta,
3392                                     u32 iv32, u16 *phase1key)
3393 {
3394
3395         struct iwl_priv *priv = hw->priv;
3396         IWL_DEBUG_MAC80211(priv, "enter\n");
3397
3398         iwl_update_tkip_key(priv, keyconf, sta,
3399                             iv32, phase1key);
3400
3401         IWL_DEBUG_MAC80211(priv, "leave\n");
3402 }
3403
3404 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3405                            struct ieee80211_vif *vif,
3406                            struct ieee80211_sta *sta,
3407                            struct ieee80211_key_conf *key)
3408 {
3409         struct iwl_priv *priv = hw->priv;
3410         int ret;
3411         u8 sta_id;
3412         bool is_default_wep_key = false;
3413
3414         IWL_DEBUG_MAC80211(priv, "enter\n");
3415
3416         if (priv->cfg->mod_params->sw_crypto) {
3417                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3418                 return -EOPNOTSUPP;
3419         }
3420
3421         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3422         if (sta_id == IWL_INVALID_STATION)
3423                 return -EINVAL;
3424
3425         mutex_lock(&priv->mutex);
3426         iwl_scan_cancel_timeout(priv, 100);
3427
3428         /*
3429          * If we are getting WEP group key and we didn't receive any key mapping
3430          * so far, we are in legacy wep mode (group key only), otherwise we are
3431          * in 1X mode.
3432          * In legacy wep mode, we use another host command to the uCode.
3433          */
3434         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3435              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3436             !sta && vif->type != NL80211_IFTYPE_AP) {
3437                 if (cmd == SET_KEY)
3438                         is_default_wep_key = !priv->key_mapping_key;
3439                 else
3440                         is_default_wep_key =
3441                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3442         }
3443
3444         switch (cmd) {
3445         case SET_KEY:
3446                 if (is_default_wep_key)
3447                         ret = iwl_set_default_wep_key(priv, key);
3448                 else
3449                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3450
3451                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3452                 break;
3453         case DISABLE_KEY:
3454                 if (is_default_wep_key)
3455                         ret = iwl_remove_default_wep_key(priv, key);
3456                 else
3457                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3458
3459                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3460                 break;
3461         default:
3462                 ret = -EINVAL;
3463         }
3464
3465         mutex_unlock(&priv->mutex);
3466         IWL_DEBUG_MAC80211(priv, "leave\n");
3467
3468         return ret;
3469 }
3470
3471 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3472                                 struct ieee80211_vif *vif,
3473                                 enum ieee80211_ampdu_mlme_action action,
3474                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3475 {
3476         struct iwl_priv *priv = hw->priv;
3477         int ret = -EINVAL;
3478
3479         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3480                      sta->addr, tid);
3481
3482         if (!(priv->cfg->sku & IWL_SKU_N))
3483                 return -EACCES;
3484
3485         mutex_lock(&priv->mutex);
3486
3487         switch (action) {
3488         case IEEE80211_AMPDU_RX_START:
3489                 IWL_DEBUG_HT(priv, "start Rx\n");
3490                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3491                 break;
3492         case IEEE80211_AMPDU_RX_STOP:
3493                 IWL_DEBUG_HT(priv, "stop Rx\n");
3494                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3495                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3496                         ret = 0;
3497                 break;
3498         case IEEE80211_AMPDU_TX_START:
3499                 IWL_DEBUG_HT(priv, "start Tx\n");
3500                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3501                 if (ret == 0) {
3502                         priv->_agn.agg_tids_count++;
3503                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3504                                      priv->_agn.agg_tids_count);
3505                 }
3506                 break;
3507         case IEEE80211_AMPDU_TX_STOP:
3508                 IWL_DEBUG_HT(priv, "stop Tx\n");
3509                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3510                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3511                         priv->_agn.agg_tids_count--;
3512                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3513                                      priv->_agn.agg_tids_count);
3514                 }
3515                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3516                         ret = 0;
3517                 if (priv->cfg->use_rts_for_aggregation) {
3518                         struct iwl_station_priv *sta_priv =
3519                                 (void *) sta->drv_priv;
3520                         /*
3521                          * switch off RTS/CTS if it was previously enabled
3522                          */
3523
3524                         sta_priv->lq_sta.lq.general_params.flags &=
3525                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3526                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3527                                 CMD_ASYNC, false);
3528                 }
3529                 break;
3530         case IEEE80211_AMPDU_TX_OPERATIONAL:
3531                 if (priv->cfg->use_rts_for_aggregation) {
3532                         struct iwl_station_priv *sta_priv =
3533                                 (void *) sta->drv_priv;
3534
3535                         /*
3536                          * switch to RTS/CTS if it is the prefer protection
3537                          * method for HT traffic
3538                          */
3539
3540                         sta_priv->lq_sta.lq.general_params.flags |=
3541                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3542                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3543                                 CMD_ASYNC, false);
3544                 }
3545                 ret = 0;
3546                 break;
3547         }
3548         mutex_unlock(&priv->mutex);
3549
3550         return ret;
3551 }
3552
3553 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3554                                struct ieee80211_vif *vif,
3555                                enum sta_notify_cmd cmd,
3556                                struct ieee80211_sta *sta)
3557 {
3558         struct iwl_priv *priv = hw->priv;
3559         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3560         int sta_id;
3561
3562         switch (cmd) {
3563         case STA_NOTIFY_SLEEP:
3564                 WARN_ON(!sta_priv->client);
3565                 sta_priv->asleep = true;
3566                 if (atomic_read(&sta_priv->pending_frames) > 0)
3567                         ieee80211_sta_block_awake(hw, sta, true);
3568                 break;
3569         case STA_NOTIFY_AWAKE:
3570                 WARN_ON(!sta_priv->client);
3571                 if (!sta_priv->asleep)
3572                         break;
3573                 sta_priv->asleep = false;
3574                 sta_id = iwl_sta_id(sta);
3575                 if (sta_id != IWL_INVALID_STATION)
3576                         iwl_sta_modify_ps_wake(priv, sta_id);
3577                 break;
3578         default:
3579                 break;
3580         }
3581 }
3582
3583 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3584                               struct ieee80211_vif *vif,
3585                               struct ieee80211_sta *sta)
3586 {
3587         struct iwl_priv *priv = hw->priv;
3588         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3589         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3590         int ret;
3591         u8 sta_id;
3592
3593         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3594                         sta->addr);
3595         mutex_lock(&priv->mutex);
3596         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3597                         sta->addr);
3598         sta_priv->common.sta_id = IWL_INVALID_STATION;
3599
3600         atomic_set(&sta_priv->pending_frames, 0);
3601         if (vif->type == NL80211_IFTYPE_AP)
3602                 sta_priv->client = true;
3603
3604         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3605                                      &sta_id);
3606         if (ret) {
3607                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3608                         sta->addr, ret);
3609                 /* Should we return success if return code is EEXIST ? */
3610                 mutex_unlock(&priv->mutex);
3611                 return ret;
3612         }
3613
3614         sta_priv->common.sta_id = sta_id;
3615
3616         /* Initialize rate scaling */
3617         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3618                        sta->addr);
3619         iwl_rs_rate_init(priv, sta, sta_id);
3620         mutex_unlock(&priv->mutex);
3621
3622         return 0;
3623 }
3624
3625 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3626                                    struct ieee80211_channel_switch *ch_switch)
3627 {
3628         struct iwl_priv *priv = hw->priv;
3629         const struct iwl_channel_info *ch_info;
3630         struct ieee80211_conf *conf = &hw->conf;
3631         struct ieee80211_channel *channel = ch_switch->channel;
3632         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3633         u16 ch;
3634         unsigned long flags = 0;
3635
3636         IWL_DEBUG_MAC80211(priv, "enter\n");
3637
3638         if (iwl_is_rfkill(priv))
3639                 goto out_exit;
3640
3641         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3642             test_bit(STATUS_SCANNING, &priv->status))
3643                 goto out_exit;
3644
3645         if (!iwl_is_associated(priv))
3646                 goto out_exit;
3647
3648         /* channel switch in progress */
3649         if (priv->switch_rxon.switch_in_progress == true)
3650                 goto out_exit;
3651
3652         mutex_lock(&priv->mutex);
3653         if (priv->cfg->ops->lib->set_channel_switch) {
3654
3655                 ch = channel->hw_value;
3656                 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3657                         ch_info = iwl_get_channel_info(priv,
3658                                                        channel->band,
3659                                                        ch);
3660                         if (!is_channel_valid(ch_info)) {
3661                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3662                                 goto out;
3663                         }
3664                         spin_lock_irqsave(&priv->lock, flags);
3665
3666                         priv->current_ht_config.smps = conf->smps_mode;
3667
3668                         /* Configure HT40 channels */
3669                         ht_conf->is_ht = conf_is_ht(conf);
3670                         if (ht_conf->is_ht) {
3671                                 if (conf_is_ht40_minus(conf)) {
3672                                         ht_conf->extension_chan_offset =
3673                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3674                                         ht_conf->is_40mhz = true;
3675                                 } else if (conf_is_ht40_plus(conf)) {
3676                                         ht_conf->extension_chan_offset =
3677                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3678                                         ht_conf->is_40mhz = true;
3679                                 } else {
3680                                         ht_conf->extension_chan_offset =
3681                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3682                                         ht_conf->is_40mhz = false;
3683                                 }
3684                         } else
3685                                 ht_conf->is_40mhz = false;
3686
3687                         if (le16_to_cpu(priv->staging_rxon.channel) != ch)
3688                                 priv->staging_rxon.flags = 0;
3689
3690                         iwl_set_rxon_channel(priv, channel);
3691                         iwl_set_rxon_ht(priv, ht_conf);
3692                         iwl_set_flags_for_band(priv, channel->band,
3693                                                priv->vif);
3694                         spin_unlock_irqrestore(&priv->lock, flags);
3695
3696                         iwl_set_rate(priv);
3697                         /*
3698                          * at this point, staging_rxon has the
3699                          * configuration for channel switch
3700                          */
3701                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3702                                                                     ch_switch))
3703                                 priv->switch_rxon.switch_in_progress = false;
3704                 }
3705         }
3706 out:
3707         mutex_unlock(&priv->mutex);
3708 out_exit:
3709         if (!priv->switch_rxon.switch_in_progress)
3710                 ieee80211_chswitch_done(priv->vif, false);
3711         IWL_DEBUG_MAC80211(priv, "leave\n");
3712 }
3713
3714 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3715 {
3716         struct iwl_priv *priv = hw->priv;
3717
3718         mutex_lock(&priv->mutex);
3719         IWL_DEBUG_MAC80211(priv, "enter\n");
3720
3721         /* do not support "flush" */
3722         if (!priv->cfg->ops->lib->txfifo_flush)
3723                 goto done;
3724
3725         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3726                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3727                 goto done;
3728         }
3729         if (iwl_is_rfkill(priv)) {
3730                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3731                 goto done;
3732         }
3733
3734         /*
3735          * mac80211 will not push any more frames for transmit
3736          * until the flush is completed
3737          */
3738         if (drop) {
3739                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3740                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3741                         IWL_ERR(priv, "flush request fail\n");
3742                         goto done;
3743                 }
3744         }
3745         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3746         iwlagn_wait_tx_queue_empty(priv);
3747 done:
3748         mutex_unlock(&priv->mutex);
3749         IWL_DEBUG_MAC80211(priv, "leave\n");
3750 }
3751
3752 /*****************************************************************************
3753  *
3754  * driver setup and teardown
3755  *
3756  *****************************************************************************/
3757
3758 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3759 {
3760         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3761
3762         init_waitqueue_head(&priv->wait_command_queue);
3763
3764         INIT_WORK(&priv->restart, iwl_bg_restart);
3765         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3766         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3767         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3768         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3769         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3770         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3771
3772         iwl_setup_scan_deferred_work(priv);
3773
3774         if (priv->cfg->ops->lib->setup_deferred_work)
3775                 priv->cfg->ops->lib->setup_deferred_work(priv);
3776
3777         init_timer(&priv->statistics_periodic);
3778         priv->statistics_periodic.data = (unsigned long)priv;
3779         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3780
3781         init_timer(&priv->ucode_trace);
3782         priv->ucode_trace.data = (unsigned long)priv;
3783         priv->ucode_trace.function = iwl_bg_ucode_trace;
3784
3785         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3786                 init_timer(&priv->monitor_recover);
3787                 priv->monitor_recover.data = (unsigned long)priv;
3788                 priv->monitor_recover.function =
3789                         priv->cfg->ops->lib->recover_from_tx_stall;
3790         }
3791
3792         if (!priv->cfg->use_isr_legacy)
3793                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3794                         iwl_irq_tasklet, (unsigned long)priv);
3795         else
3796                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3797                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3798 }
3799
3800 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3801 {
3802         if (priv->cfg->ops->lib->cancel_deferred_work)
3803                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3804
3805         cancel_delayed_work_sync(&priv->init_alive_start);
3806         cancel_delayed_work(&priv->scan_check);
3807         cancel_work_sync(&priv->start_internal_scan);
3808         cancel_delayed_work(&priv->alive_start);
3809         cancel_work_sync(&priv->run_time_calib_work);
3810         cancel_work_sync(&priv->beacon_update);
3811         del_timer_sync(&priv->statistics_periodic);
3812         del_timer_sync(&priv->ucode_trace);
3813         if (priv->cfg->ops->lib->recover_from_tx_stall)
3814                 del_timer_sync(&priv->monitor_recover);
3815 }
3816
3817 static void iwl_init_hw_rates(struct iwl_priv *priv,
3818                               struct ieee80211_rate *rates)
3819 {
3820         int i;
3821
3822         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3823                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3824                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3825                 rates[i].hw_value_short = i;
3826                 rates[i].flags = 0;
3827                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3828                         /*
3829                          * If CCK != 1M then set short preamble rate flag.
3830                          */
3831                         rates[i].flags |=
3832                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3833                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3834                 }
3835         }
3836 }
3837
3838 static int iwl_init_drv(struct iwl_priv *priv)
3839 {
3840         int ret;
3841
3842         priv->ibss_beacon = NULL;
3843
3844         spin_lock_init(&priv->sta_lock);
3845         spin_lock_init(&priv->hcmd_lock);
3846
3847         INIT_LIST_HEAD(&priv->free_frames);
3848
3849         mutex_init(&priv->mutex);
3850         mutex_init(&priv->sync_cmd_mutex);
3851
3852         priv->ieee_channels = NULL;
3853         priv->ieee_rates = NULL;
3854         priv->band = IEEE80211_BAND_2GHZ;
3855
3856         priv->iw_mode = NL80211_IFTYPE_STATION;
3857         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3858         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3859         priv->_agn.agg_tids_count = 0;
3860
3861         /* initialize force reset */
3862         priv->force_reset[IWL_RF_RESET].reset_duration =
3863                 IWL_DELAY_NEXT_FORCE_RF_RESET;
3864         priv->force_reset[IWL_FW_RESET].reset_duration =
3865                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3866
3867         /* Choose which receivers/antennas to use */
3868         if (priv->cfg->ops->hcmd->set_rxon_chain)
3869                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3870
3871         iwl_init_scan_params(priv);
3872
3873         /* Set the tx_power_user_lmt to the lowest power level
3874          * this value will get overwritten by channel max power avg
3875          * from eeprom */
3876         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3877
3878         ret = iwl_init_channel_map(priv);
3879         if (ret) {
3880                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3881                 goto err;
3882         }
3883
3884         ret = iwlcore_init_geos(priv);
3885         if (ret) {
3886                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3887                 goto err_free_channel_map;
3888         }
3889         iwl_init_hw_rates(priv, priv->ieee_rates);
3890
3891         return 0;
3892
3893 err_free_channel_map:
3894         iwl_free_channel_map(priv);
3895 err:
3896         return ret;
3897 }
3898
3899 static void iwl_uninit_drv(struct iwl_priv *priv)
3900 {
3901         iwl_calib_free_results(priv);
3902         iwlcore_free_geos(priv);
3903         iwl_free_channel_map(priv);
3904         kfree(priv->scan_cmd);
3905 }
3906
3907 static struct ieee80211_ops iwl_hw_ops = {
3908         .tx = iwl_mac_tx,
3909         .start = iwl_mac_start,
3910         .stop = iwl_mac_stop,
3911         .add_interface = iwl_mac_add_interface,
3912         .remove_interface = iwl_mac_remove_interface,
3913         .config = iwl_mac_config,
3914         .configure_filter = iwl_configure_filter,
3915         .set_key = iwl_mac_set_key,
3916         .update_tkip_key = iwl_mac_update_tkip_key,
3917         .conf_tx = iwl_mac_conf_tx,
3918         .reset_tsf = iwl_mac_reset_tsf,
3919         .bss_info_changed = iwl_bss_info_changed,
3920         .ampdu_action = iwl_mac_ampdu_action,
3921         .hw_scan = iwl_mac_hw_scan,
3922         .sta_notify = iwl_mac_sta_notify,
3923         .sta_add = iwlagn_mac_sta_add,
3924         .sta_remove = iwl_mac_sta_remove,
3925         .channel_switch = iwl_mac_channel_switch,
3926         .flush = iwl_mac_flush,
3927         .tx_last_beacon = iwl_mac_tx_last_beacon,
3928 };
3929
3930 static void iwl_hw_detect(struct iwl_priv *priv)
3931 {
3932         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
3933         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
3934         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
3935         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
3936 }
3937
3938 static int iwl_set_hw_params(struct iwl_priv *priv)
3939 {
3940         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3941         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3942         if (priv->cfg->mod_params->amsdu_size_8K)
3943                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3944         else
3945                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3946
3947         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3948
3949         if (priv->cfg->mod_params->disable_11n)
3950                 priv->cfg->sku &= ~IWL_SKU_N;
3951
3952         /* Device-specific setup */
3953         return priv->cfg->ops->lib->set_hw_params(priv);
3954 }
3955
3956 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3957 {
3958         int err = 0;
3959         struct iwl_priv *priv;
3960         struct ieee80211_hw *hw;
3961         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3962         unsigned long flags;
3963         u16 pci_cmd, num_mac;
3964
3965         /************************
3966          * 1. Allocating HW data
3967          ************************/
3968
3969         /* Disabling hardware scan means that mac80211 will perform scans
3970          * "the hard way", rather than using device's scan. */
3971         if (cfg->mod_params->disable_hw_scan) {
3972                 if (iwl_debug_level & IWL_DL_INFO)
3973                         dev_printk(KERN_DEBUG, &(pdev->dev),
3974                                    "Disabling hw_scan\n");
3975                 iwl_hw_ops.hw_scan = NULL;
3976         }
3977
3978         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3979         if (!hw) {
3980                 err = -ENOMEM;
3981                 goto out;
3982         }
3983         priv = hw->priv;
3984         /* At this point both hw and priv are allocated. */
3985
3986         SET_IEEE80211_DEV(hw, &pdev->dev);
3987
3988         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3989         priv->cfg = cfg;
3990         priv->pci_dev = pdev;
3991         priv->inta_mask = CSR_INI_SET_MASK;
3992
3993         if (iwl_alloc_traffic_mem(priv))
3994                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3995
3996         /**************************
3997          * 2. Initializing PCI bus
3998          **************************/
3999         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4000                                 PCIE_LINK_STATE_CLKPM);
4001
4002         if (pci_enable_device(pdev)) {
4003                 err = -ENODEV;
4004                 goto out_ieee80211_free_hw;
4005         }
4006
4007         pci_set_master(pdev);
4008
4009         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4010         if (!err)
4011                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4012         if (err) {
4013                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4014                 if (!err)
4015                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4016                 /* both attempts failed: */
4017                 if (err) {
4018                         IWL_WARN(priv, "No suitable DMA available.\n");
4019                         goto out_pci_disable_device;
4020                 }
4021         }
4022
4023         err = pci_request_regions(pdev, DRV_NAME);
4024         if (err)
4025                 goto out_pci_disable_device;
4026
4027         pci_set_drvdata(pdev, priv);
4028
4029
4030         /***********************
4031          * 3. Read REV register
4032          ***********************/
4033         priv->hw_base = pci_iomap(pdev, 0, 0);
4034         if (!priv->hw_base) {
4035                 err = -ENODEV;
4036                 goto out_pci_release_regions;
4037         }
4038
4039         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4040                 (unsigned long long) pci_resource_len(pdev, 0));
4041         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4042
4043         /* these spin locks will be used in apm_ops.init and EEPROM access
4044          * we should init now
4045          */
4046         spin_lock_init(&priv->reg_lock);
4047         spin_lock_init(&priv->lock);
4048
4049         /*
4050          * stop and reset the on-board processor just in case it is in a
4051          * strange state ... like being left stranded by a primary kernel
4052          * and this is now the kdump kernel trying to start up
4053          */
4054         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4055
4056         iwl_hw_detect(priv);
4057         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4058                 priv->cfg->name, priv->hw_rev);
4059
4060         /* We disable the RETRY_TIMEOUT register (0x41) to keep
4061          * PCI Tx retries from interfering with C3 CPU state */
4062         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4063
4064         iwl_prepare_card_hw(priv);
4065         if (!priv->hw_ready) {
4066                 IWL_WARN(priv, "Failed, HW not ready\n");
4067                 goto out_iounmap;
4068         }
4069
4070         /*****************
4071          * 4. Read EEPROM
4072          *****************/
4073         /* Read the EEPROM */
4074         err = iwl_eeprom_init(priv);
4075         if (err) {
4076                 IWL_ERR(priv, "Unable to init EEPROM\n");
4077                 goto out_iounmap;
4078         }
4079         err = iwl_eeprom_check_version(priv);
4080         if (err)
4081                 goto out_free_eeprom;
4082
4083         /* extract MAC Address */
4084         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4085         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4086         priv->hw->wiphy->addresses = priv->addresses;
4087         priv->hw->wiphy->n_addresses = 1;
4088         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4089         if (num_mac > 1) {
4090                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4091                        ETH_ALEN);
4092                 priv->addresses[1].addr[5]++;
4093                 priv->hw->wiphy->n_addresses++;
4094         }
4095
4096         /************************
4097          * 5. Setup HW constants
4098          ************************/
4099         if (iwl_set_hw_params(priv)) {
4100                 IWL_ERR(priv, "failed to set hw parameters\n");
4101                 goto out_free_eeprom;
4102         }
4103
4104         /*******************
4105          * 6. Setup priv
4106          *******************/
4107
4108         err = iwl_init_drv(priv);
4109         if (err)
4110                 goto out_free_eeprom;
4111         /* At this point both hw and priv are initialized. */
4112
4113         /********************
4114          * 7. Setup services
4115          ********************/
4116         spin_lock_irqsave(&priv->lock, flags);
4117         iwl_disable_interrupts(priv);
4118         spin_unlock_irqrestore(&priv->lock, flags);
4119
4120         pci_enable_msi(priv->pci_dev);
4121
4122         iwl_alloc_isr_ict(priv);
4123         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4124                           IRQF_SHARED, DRV_NAME, priv);
4125         if (err) {
4126                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4127                 goto out_disable_msi;
4128         }
4129
4130         iwl_setup_deferred_work(priv);
4131         iwl_setup_rx_handlers(priv);
4132
4133         /*********************************************
4134          * 8. Enable interrupts and read RFKILL state
4135          *********************************************/
4136
4137         /* enable interrupts if needed: hw bug w/a */
4138         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4139         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4140                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4141                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4142         }
4143
4144         iwl_enable_interrupts(priv);
4145
4146         /* If platform's RF_KILL switch is NOT set to KILL */
4147         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4148                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4149         else
4150                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4151
4152         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4153                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4154
4155         iwl_power_initialize(priv);
4156         iwl_tt_initialize(priv);
4157
4158         init_completion(&priv->_agn.firmware_loading_complete);
4159
4160         err = iwl_request_firmware(priv, true);
4161         if (err)
4162                 goto out_destroy_workqueue;
4163
4164         return 0;
4165
4166  out_destroy_workqueue:
4167         destroy_workqueue(priv->workqueue);
4168         priv->workqueue = NULL;
4169         free_irq(priv->pci_dev->irq, priv);
4170         iwl_free_isr_ict(priv);
4171  out_disable_msi:
4172         pci_disable_msi(priv->pci_dev);
4173         iwl_uninit_drv(priv);
4174  out_free_eeprom:
4175         iwl_eeprom_free(priv);
4176  out_iounmap:
4177         pci_iounmap(pdev, priv->hw_base);
4178  out_pci_release_regions:
4179         pci_set_drvdata(pdev, NULL);
4180         pci_release_regions(pdev);
4181  out_pci_disable_device:
4182         pci_disable_device(pdev);
4183  out_ieee80211_free_hw:
4184         iwl_free_traffic_mem(priv);
4185         ieee80211_free_hw(priv->hw);
4186  out:
4187         return err;
4188 }
4189
4190 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4191 {
4192         struct iwl_priv *priv = pci_get_drvdata(pdev);
4193         unsigned long flags;
4194
4195         if (!priv)
4196                 return;
4197
4198         wait_for_completion(&priv->_agn.firmware_loading_complete);
4199
4200         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4201
4202         iwl_dbgfs_unregister(priv);
4203         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4204
4205         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4206          * to be called and iwl_down since we are removing the device
4207          * we need to set STATUS_EXIT_PENDING bit.
4208          */
4209         set_bit(STATUS_EXIT_PENDING, &priv->status);
4210         if (priv->mac80211_registered) {
4211                 ieee80211_unregister_hw(priv->hw);
4212                 priv->mac80211_registered = 0;
4213         } else {
4214                 iwl_down(priv);
4215         }
4216
4217         /*
4218          * Make sure device is reset to low power before unloading driver.
4219          * This may be redundant with iwl_down(), but there are paths to
4220          * run iwl_down() without calling apm_ops.stop(), and there are
4221          * paths to avoid running iwl_down() at all before leaving driver.
4222          * This (inexpensive) call *makes sure* device is reset.
4223          */
4224         priv->cfg->ops->lib->apm_ops.stop(priv);
4225
4226         iwl_tt_exit(priv);
4227
4228         /* make sure we flush any pending irq or
4229          * tasklet for the driver
4230          */
4231         spin_lock_irqsave(&priv->lock, flags);
4232         iwl_disable_interrupts(priv);
4233         spin_unlock_irqrestore(&priv->lock, flags);
4234
4235         iwl_synchronize_irq(priv);
4236
4237         iwl_dealloc_ucode_pci(priv);
4238
4239         if (priv->rxq.bd)
4240                 iwlagn_rx_queue_free(priv, &priv->rxq);
4241         iwlagn_hw_txq_ctx_free(priv);
4242
4243         iwl_eeprom_free(priv);
4244
4245
4246         /*netif_stop_queue(dev); */
4247         flush_workqueue(priv->workqueue);
4248
4249         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4250          * priv->workqueue... so we can't take down the workqueue
4251          * until now... */
4252         destroy_workqueue(priv->workqueue);
4253         priv->workqueue = NULL;
4254         iwl_free_traffic_mem(priv);
4255
4256         free_irq(priv->pci_dev->irq, priv);
4257         pci_disable_msi(priv->pci_dev);
4258         pci_iounmap(pdev, priv->hw_base);
4259         pci_release_regions(pdev);
4260         pci_disable_device(pdev);
4261         pci_set_drvdata(pdev, NULL);
4262
4263         iwl_uninit_drv(priv);
4264
4265         iwl_free_isr_ict(priv);
4266
4267         if (priv->ibss_beacon)
4268                 dev_kfree_skb(priv->ibss_beacon);
4269
4270         ieee80211_free_hw(priv->hw);
4271 }
4272
4273
4274 /*****************************************************************************
4275  *
4276  * driver and module entry point
4277  *
4278  *****************************************************************************/
4279
4280 /* Hardware specific file defines the PCI IDs table for that hardware module */
4281 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4282 #ifdef CONFIG_IWL4965
4283         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4284         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4285 #endif /* CONFIG_IWL4965 */
4286 #ifdef CONFIG_IWL5000
4287 /* 5100 Series WiFi */
4288         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4289         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4290         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4291         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4292         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4293         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4294         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4295         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4296         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4297         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4298         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4299         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4300         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4301         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4302         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4303         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4304         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4305         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4306         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4307         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4308         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4309         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4310         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4311         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4312
4313 /* 5300 Series WiFi */
4314         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4315         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4316         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4317         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4318         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4319         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4320         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4321         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4322         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4323         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4324         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4325         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4326
4327 /* 5350 Series WiFi/WiMax */
4328         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4329         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4330         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4331
4332 /* 5150 Series Wifi/WiMax */
4333         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4334         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4335         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4336         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4337         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4338         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4339
4340         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4341         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4342         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4343         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4344
4345 /* 6x00 Series */
4346         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4347         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4348         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4349         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4350         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4351         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4352         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4353         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4354         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4355         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4356
4357 /* 6x00 Series Gen2a */
4358         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4359         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4360         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4361         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4362         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4363         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4364         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4365         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4366         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4367         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4368         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4369         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4370         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4371         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4372
4373 /* 6x00 Series Gen2b */
4374         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4375         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4376         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4377         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4378         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4379         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4380         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4381         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4382         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4383         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4384         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4385         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4386         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4387         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4388         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4389         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4390         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4391         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4392         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4393         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4394         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4395         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4396         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4397         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4398         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4399         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4400         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4401         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4402
4403 /* 6x50 WiFi/WiMax Series */
4404         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4405         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4406         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4407         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4408         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4409         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4410
4411 /* 6x50 WiFi/WiMax Series Gen2 */
4412         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4413         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4414         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4415         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4416         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4417         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4418
4419 /* 1000 Series WiFi */
4420         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4421         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4422         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4423         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4424         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4425         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4426         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4427         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4428         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4429         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4430         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4431         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4432 #endif /* CONFIG_IWL5000 */
4433
4434         {0}
4435 };
4436 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4437
4438 static struct pci_driver iwl_driver = {
4439         .name = DRV_NAME,
4440         .id_table = iwl_hw_card_ids,
4441         .probe = iwl_pci_probe,
4442         .remove = __devexit_p(iwl_pci_remove),
4443 #ifdef CONFIG_PM
4444         .suspend = iwl_pci_suspend,
4445         .resume = iwl_pci_resume,
4446 #endif
4447 };
4448
4449 static int __init iwl_init(void)
4450 {
4451
4452         int ret;
4453         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4454         pr_info(DRV_COPYRIGHT "\n");
4455
4456         ret = iwlagn_rate_control_register();
4457         if (ret) {
4458                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4459                 return ret;
4460         }
4461
4462         ret = pci_register_driver(&iwl_driver);
4463         if (ret) {
4464                 pr_err("Unable to initialize PCI module\n");
4465                 goto error_register;
4466         }
4467
4468         return ret;
4469
4470 error_register:
4471         iwlagn_rate_control_unregister();
4472         return ret;
4473 }
4474
4475 static void __exit iwl_exit(void)
4476 {
4477         pci_unregister_driver(&iwl_driver);
4478         iwlagn_rate_control_unregister();
4479 }
4480
4481 module_exit(iwl_exit);
4482 module_init(iwl_init);
4483
4484 #ifdef CONFIG_IWLWIFI_DEBUG
4485 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4486 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4487 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4488 MODULE_PARM_DESC(debug, "debug output mask");
4489 #endif
4490
4491 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4492 MODULE_PARM_DESC(swcrypto50,
4493                  "using crypto in software (default 0 [hardware]) (deprecated)");
4494 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4495 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4496 module_param_named(queues_num50,
4497                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4498 MODULE_PARM_DESC(queues_num50,
4499                  "number of hw queues in 50xx series (deprecated)");
4500 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4501 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4502 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4503 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4504 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4505 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4506 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4507                    int, S_IRUGO);
4508 MODULE_PARM_DESC(amsdu_size_8K50,
4509                  "enable 8K amsdu size in 50XX series (deprecated)");
4510 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4511                    int, S_IRUGO);
4512 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4513 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4514 MODULE_PARM_DESC(fw_restart50,
4515                  "restart firmware in case of error (deprecated)");
4516 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4517 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4518 module_param_named(
4519         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4520 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4521
4522 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4523                    S_IRUGO);
4524 MODULE_PARM_DESC(ucode_alternative,
4525                  "specify ucode alternative to use from ucode file");