drivers/net/wireless/iwlwifi/iwl-agn.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
   4  *
   5  * Portions of this file are derived from the ipw3945 project, as well
   6  * as portions of the ieee80211 subsystem header files.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of version 2 of the GNU General Public License as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program; if not, write to the Free Software Foundation, Inc.,
  19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20  *
  21  * The full GNU General Public License is included in this distribution in the
  22  * file called LICENSE.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29
  30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/init.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci-aspm.h>
  37 #include <linux/slab.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/delay.h>
  40 #include <linux/sched.h>
  41 #include <linux/skbuff.h>
  42 #include <linux/netdevice.h>
  43 #include <linux/wireless.h>
  44 #include <linux/firmware.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/if_arp.h>
  47
  48 #include <net/mac80211.h>
  49
  50 #include <asm/div64.h>
  51
  52 #define DRV_NAME        "iwlagn"
  53
  54 #include "iwl-eeprom.h"
  55 #include "iwl-dev.h"
  56 #include "iwl-core.h"
  57 #include "iwl-io.h"
  58 #include "iwl-helpers.h"
  59 #include "iwl-sta.h"
  60 #include "iwl-calib.h"
  61 #include "iwl-agn.h"
  62
  63
  64 /******************************************************************************
  65  *
  66  * module boiler plate
  67  *
  68  ******************************************************************************/
  69
  70 /*
  71  * module name, copyright, version, etc.
  72  */
  73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  74
  75 #ifdef CONFIG_IWLWIFI_DEBUG
  76 #define VD "d"
  77 #else
  78 #define VD
  79 #endif
  80
  81 #define DRV_VERSION     IWLWIFI_VERSION VD
  82
  83
  84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85 MODULE_VERSION(DRV_VERSION);
  86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  87 MODULE_LICENSE("GPL");
  88 MODULE_ALIAS("iwl4965");
  89
  90 static int iwlagn_ant_coupling;
  91 static bool iwlagn_bt_ch_announce = 1;
  92
  93 /**
  94  * iwl_commit_rxon - commit staging_rxon to hardware
  95  *
  96  * The RXON command in staging_rxon is committed to the hardware and
  97  * the active_rxon structure is updated with the new data.  This
  98  * function correctly transitions out of the RXON_ASSOC_MSK state if
  99  * a HW tune is required based on the RXON structure changes.
 100  */
 101 int iwl_commit_rxon(struct iwl_priv *priv)
 102 {
 103         /* cast away the const for active_rxon in this function */
 104         struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
 105         int ret;
 106         bool new_assoc =
 107                 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
 108
 109         if (!iwl_is_alive(priv))
 110                 return -EBUSY;
 111
 112         /* always get timestamp with Rx frame */
 113         priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
 114
 115         ret = iwl_check_rxon_cmd(priv);
 116         if (ret) {
 117                 IWL_ERR(priv, "Invalid RXON configuration.  Not committing.\n");
 118                 return -EINVAL;
 119         }
 120
 121         /*
 122          * receive commit_rxon request
 123          * abort any previous channel switch if still in process
 124          */
 125         if (priv->switch_rxon.switch_in_progress &&
 126             (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
 127                 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
 128                       le16_to_cpu(priv->switch_rxon.channel));
 129                 iwl_chswitch_done(priv, false);
 130         }
 131
 132         /* If we don't need to send a full RXON, we can use
 133          * iwl_rxon_assoc_cmd which is used to reconfigure filter
 134          * and other flags for the current radio configuration. */
 135         if (!iwl_full_rxon_required(priv)) {
 136                 ret = iwl_send_rxon_assoc(priv);
 137                 if (ret) {
 138                         IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
 139                         return ret;
 140                 }
 141
 142                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 143                 iwl_print_rx_config_cmd(priv);
 144                 return 0;
 145         }
 146
 147         /* If we are currently associated and the new config requires
 148          * an RXON_ASSOC and the new config wants the associated mask enabled,
 149          * we must clear the associated from the active configuration
 150          * before we apply the new config */
 151         if (iwl_is_associated(priv) && new_assoc) {
 152                 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
 153                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
 154
 155                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 156                                       sizeof(struct iwl_rxon_cmd),
 157                                       &priv->active_rxon);
 158
 159                 /* If the mask clearing failed then we set
 160                  * active_rxon back to what it was previously */
 161                 if (ret) {
 162                         active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
 163                         IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
 164                         return ret;
 165                 }
 166                 iwl_clear_ucode_stations(priv);
 167                 iwl_restore_stations(priv);
 168                 ret = iwl_restore_default_wep_keys(priv);
 169                 if (ret) {
 170                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 171                         return ret;
 172                 }
 173         }
 174
 175         IWL_DEBUG_INFO(priv, "Sending RXON\n"
 176                        "* with%s RXON_FILTER_ASSOC_MSK\n"
 177                        "* channel = %d\n"
 178                        "* bssid = %pM\n",
 179                        (new_assoc ? "" : "out"),
 180                        le16_to_cpu(priv->staging_rxon.channel),
 181                        priv->staging_rxon.bssid_addr);
 182
 183         iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
 184
 185         /* Apply the new configuration
 186          * RXON unassoc clears the station table in uCode so restoration of
 187          * stations is needed after it (the RXON command) completes
 188          */
 189         if (!new_assoc) {
 190                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 191                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 192                 if (ret) {
 193                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 194                         return ret;
 195                 }
 196                 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
 197                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 198                 iwl_clear_ucode_stations(priv);
 199                 iwl_restore_stations(priv);
 200                 ret = iwl_restore_default_wep_keys(priv);
 201                 if (ret) {
 202                         IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
 203                         return ret;
 204                 }
 205         }
 206
 207         priv->start_calib = 0;
 208         if (new_assoc) {
 209                 /* Apply the new configuration
 210                  * RXON assoc doesn't clear the station table in uCode,
 211                  */
 212                 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
 213                               sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
 214                 if (ret) {
 215                         IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
 216                         return ret;
 217                 }
 218                 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
 219         }
 220         iwl_print_rx_config_cmd(priv);
 221
 222         iwl_init_sensitivity(priv);
 223
 224         /* If we issue a new RXON command which required a tune then we must
 225          * send a new TXPOWER command or we won't be able to Tx any frames */
 226         ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
 227         if (ret) {
 228                 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
 229                 return ret;
 230         }
 231
 232         return 0;
 233 }
 234
 235 void iwl_update_chain_flags(struct iwl_priv *priv)
 236 {
 237
 238         if (priv->cfg->ops->hcmd->set_rxon_chain)
 239                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 240         iwlcore_commit_rxon(priv);
 241 }
 242
 243 static void iwl_clear_free_frames(struct iwl_priv *priv)
 244 {
 245         struct list_head *element;
 246
 247         IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
 248                        priv->frames_count);
 249
 250         while (!list_empty(&priv->free_frames)) {
 251                 element = priv->free_frames.next;
 252                 list_del(element);
 253                 kfree(list_entry(element, struct iwl_frame, list));
 254                 priv->frames_count--;
 255         }
 256
 257         if (priv->frames_count) {
 258                 IWL_WARN(priv, "%d frames still in use.  Did we lose one?\n",
 259                             priv->frames_count);
 260                 priv->frames_count = 0;
 261         }
 262 }
 263
 264 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
 265 {
 266         struct iwl_frame *frame;
 267         struct list_head *element;
 268         if (list_empty(&priv->free_frames)) {
 269                 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
 270                 if (!frame) {
 271                         IWL_ERR(priv, "Could not allocate frame!\n");
 272                         return NULL;
 273                 }
 274
 275                 priv->frames_count++;
 276                 return frame;
 277         }
 278
 279         element = priv->free_frames.next;
 280         list_del(element);
 281         return list_entry(element, struct iwl_frame, list);
 282 }
 283
 284 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
 285 {
 286         memset(frame, 0, sizeof(*frame));
 287         list_add(&frame->list, &priv->free_frames);
 288 }
 289
 290 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
 291                                           struct ieee80211_hdr *hdr,
 292                                           int left)
 293 {
 294         if (!priv->ibss_beacon)
 295                 return 0;
 296
 297         if (priv->ibss_beacon->len > left)
 298                 return 0;
 299
 300         memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
 301
 302         return priv->ibss_beacon->len;
 303 }
 304
 305 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
 306 static void iwl_set_beacon_tim(struct iwl_priv *priv,
 307                 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
 308                 u8 *beacon, u32 frame_size)
 309 {
 310         u16 tim_idx;
 311         struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
 312
 313         /*
 314          * The index is relative to frame start but we start looking at the
 315          * variable-length part of the beacon.
 316          */
 317         tim_idx = mgmt->u.beacon.variable - beacon;
 318
 319         /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
 320         while ((tim_idx < (frame_size - 2)) &&
 321                         (beacon[tim_idx] != WLAN_EID_TIM))
 322                 tim_idx += beacon[tim_idx+1] + 2;
 323
 324         /* If TIM field was found, set variables */
 325         if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
 326                 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
 327                 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
 328         } else
 329                 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
 330 }
 331
 332 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
 333                                        struct iwl_frame *frame)
 334 {
 335         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
 336         u32 frame_size;
 337         u32 rate_flags;
 338         u32 rate;
 339         /*
 340          * We have to set up the TX command, the TX Beacon command, and the
 341          * beacon contents.
 342          */
 343
 344         /* Initialize memory */
 345         tx_beacon_cmd = &frame->u.beacon;
 346         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
 347
 348         /* Set up TX beacon contents */
 349         frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
 350                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
 351         if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
 352                 return 0;
 353
 354         /* Set up TX command fields */
 355         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
 356         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
 357         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
 358         tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
 359                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
 360
 361         /* Set up TX beacon command fields */
 362         iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
 363                         frame_size);
 364
 365         /* Set up packet rate and flags */
 366         rate = iwl_rate_get_lowest_plcp(priv);
 367         priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
 368                                               priv->hw_params.valid_tx_ant);
 369         rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
 370         if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
 371                 rate_flags |= RATE_MCS_CCK_MSK;
 372         tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
 373                         rate_flags);
 374
 375         return sizeof(*tx_beacon_cmd) + frame_size;
 376 }
 377 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
 378 {
 379         struct iwl_frame *frame;
 380         unsigned int frame_size;
 381         int rc;
 382
 383         frame = iwl_get_free_frame(priv);
 384         if (!frame) {
 385                 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
 386                           "command.\n");
 387                 return -ENOMEM;
 388         }
 389
 390         frame_size = iwl_hw_get_beacon_cmd(priv, frame);
 391         if (!frame_size) {
 392                 IWL_ERR(priv, "Error configuring the beacon command\n");
 393                 iwl_free_frame(priv, frame);
 394                 return -EINVAL;
 395         }
 396
 397         rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
 398                               &frame->u.cmd[0]);
 399
 400         iwl_free_frame(priv, frame);
 401
 402         return rc;
 403 }
 404
 405 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
 406 {
 407         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 408
 409         dma_addr_t addr = get_unaligned_le32(&tb->lo);
 410         if (sizeof(dma_addr_t) > sizeof(u32))
 411                 addr |=
 412                 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
 413
 414         return addr;
 415 }
 416
 417 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
 418 {
 419         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 420
 421         return le16_to_cpu(tb->hi_n_len) >> 4;
 422 }
 423
 424 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
 425                                   dma_addr_t addr, u16 len)
 426 {
 427         struct iwl_tfd_tb *tb = &tfd->tbs[idx];
 428         u16 hi_n_len = len << 4;
 429
 430         put_unaligned_le32(addr, &tb->lo);
 431         if (sizeof(dma_addr_t) > sizeof(u32))
 432                 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
 433
 434         tb->hi_n_len = cpu_to_le16(hi_n_len);
 435
 436         tfd->num_tbs = idx + 1;
 437 }
 438
 439 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
 440 {
 441         return tfd->num_tbs & 0x1f;
 442 }
 443
 444 /**
 445  * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
 446  * @priv - driver private data
 447  * @txq - tx queue
 448  *
 449  * Does NOT advance any TFD circular buffer read/write indexes
 450  * Does NOT free the TFD itself (which is within circular buffer)
 451  */
 452 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 453 {
 454         struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
 455         struct iwl_tfd *tfd;
 456         struct pci_dev *dev = priv->pci_dev;
 457         int index = txq->q.read_ptr;
 458         int i;
 459         int num_tbs;
 460
 461         tfd = &tfd_tmp[index];
 462
 463         /* Sanity check on number of chunks */
 464         num_tbs = iwl_tfd_get_num_tbs(tfd);
 465
 466         if (num_tbs >= IWL_NUM_OF_TBS) {
 467                 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
 468                 /* @todo issue fatal error, it is quite serious situation */
 469                 return;
 470         }
 471
 472         /* Unmap tx_cmd */
 473         if (num_tbs)
 474                 pci_unmap_single(dev,
 475                                 dma_unmap_addr(&txq->meta[index], mapping),
 476                                 dma_unmap_len(&txq->meta[index], len),
 477                                 PCI_DMA_BIDIRECTIONAL);
 478
 479         /* Unmap chunks, if any. */
 480         for (i = 1; i < num_tbs; i++)
 481                 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
 482                                 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
 483
 484         /* free SKB */
 485         if (txq->txb) {
 486                 struct sk_buff *skb;
 487
 488                 skb = txq->txb[txq->q.read_ptr].skb;
 489
 490                 /* can be called from irqs-disabled context */
 491                 if (skb) {
 492                         dev_kfree_skb_any(skb);
 493                         txq->txb[txq->q.read_ptr].skb = NULL;
 494                 }
 495         }
 496 }
 497
 498 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
 499                                  struct iwl_tx_queue *txq,
 500                                  dma_addr_t addr, u16 len,
 501                                  u8 reset, u8 pad)
 502 {
 503         struct iwl_queue *q;
 504         struct iwl_tfd *tfd, *tfd_tmp;
 505         u32 num_tbs;
 506
 507         q = &txq->q;
 508         tfd_tmp = (struct iwl_tfd *)txq->tfds;
 509         tfd = &tfd_tmp[q->write_ptr];
 510
 511         if (reset)
 512                 memset(tfd, 0, sizeof(*tfd));
 513
 514         num_tbs = iwl_tfd_get_num_tbs(tfd);
 515
 516         /* Each TFD can point to a maximum 20 Tx buffers */
 517         if (num_tbs >= IWL_NUM_OF_TBS) {
 518                 IWL_ERR(priv, "Error can not send more than %d chunks\n",
 519                           IWL_NUM_OF_TBS);
 520                 return -EINVAL;
 521         }
 522
 523         BUG_ON(addr & ~DMA_BIT_MASK(36));
 524         if (unlikely(addr & ~IWL_TX_DMA_MASK))
 525                 IWL_ERR(priv, "Unaligned address = %llx\n",
 526                           (unsigned long long)addr);
 527
 528         iwl_tfd_set_tb(tfd, num_tbs, addr, len);
 529
 530         return 0;
 531 }
 532
 533 /*
 534  * Tell nic where to find circular buffer of Tx Frame Descriptors for
 535  * given Tx queue, and enable the DMA channel used for that queue.
 536  *
 537  * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
 538  * channels supported in hardware.
 539  */
 540 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
 541                          struct iwl_tx_queue *txq)
 542 {
 543         int txq_id = txq->q.id;
 544
 545         /* Circular buffer (TFD queue in DRAM) physical base address */
 546         iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
 547                              txq->q.dma_addr >> 8);
 548
 549         return 0;
 550 }
 551
 552 /******************************************************************************
 553  *
 554  * Generic RX handler implementations
 555  *
 556  ******************************************************************************/
 557 static void iwl_rx_reply_alive(struct iwl_priv *priv,
 558                                 struct iwl_rx_mem_buffer *rxb)
 559 {
 560         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 561         struct iwl_alive_resp *palive;
 562         struct delayed_work *pwork;
 563
 564         palive = &pkt->u.alive_frame;
 565
 566         IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
 567                        "0x%01X 0x%01X\n",
 568                        palive->is_valid, palive->ver_type,
 569                        palive->ver_subtype);
 570
 571         if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
 572                 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 573                 memcpy(&priv->card_alive_init,
 574                        &pkt->u.alive_frame,
 575                        sizeof(struct iwl_init_alive_resp));
 576                 pwork = &priv->init_alive_start;
 577         } else {
 578                 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
 579                 memcpy(&priv->card_alive, &pkt->u.alive_frame,
 580                        sizeof(struct iwl_alive_resp));
 581                 pwork = &priv->alive_start;
 582         }
 583
 584         /* We delay the ALIVE response by 5ms to
 585          * give the HW RF Kill time to activate... */
 586         if (palive->is_valid == UCODE_VALID_OK)
 587                 queue_delayed_work(priv->workqueue, pwork,
 588                                    msecs_to_jiffies(5));
 589         else
 590                 IWL_WARN(priv, "uCode did not respond OK.\n");
 591 }
 592
 593 static void iwl_bg_beacon_update(struct work_struct *work)
 594 {
 595         struct iwl_priv *priv =
 596                 container_of(work, struct iwl_priv, beacon_update);
 597         struct sk_buff *beacon;
 598
 599         /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
 600         beacon = ieee80211_beacon_get(priv->hw, priv->vif);
 601
 602         if (!beacon) {
 603                 IWL_ERR(priv, "update beacon failed\n");
 604                 return;
 605         }
 606
 607         mutex_lock(&priv->mutex);
 608         /* new beacon skb is allocated every time; dispose previous.*/
 609         if (priv->ibss_beacon)
 610                 dev_kfree_skb(priv->ibss_beacon);
 611
 612         priv->ibss_beacon = beacon;
 613         mutex_unlock(&priv->mutex);
 614
 615         iwl_send_beacon_cmd(priv);
 616 }
 617
 618 static void iwl_bg_bt_runtime_config(struct work_struct *work)
 619 {
 620         struct iwl_priv *priv =
 621                 container_of(work, struct iwl_priv, bt_runtime_config);
 622
 623         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 624                 return;
 625
 626         /* dont send host command if rf-kill is on */
 627         if (!iwl_is_ready_rf(priv))
 628                 return;
 629         priv->cfg->ops->hcmd->send_bt_config(priv);
 630 }
 631
 632 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
 633 {
 634         struct iwl_priv *priv =
 635                 container_of(work, struct iwl_priv, bt_full_concurrency);
 636
 637         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 638                 return;
 639
 640         /* dont send host command if rf-kill is on */
 641         if (!iwl_is_ready_rf(priv))
 642                 return;
 643
 644         IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
 645                        priv->bt_full_concurrent ?
 646                        "full concurrency" : "3-wire");
 647
 648         /*
 649          * LQ & RXON updated cmds must be sent before BT Config cmd
 650          * to avoid 3-wire collisions
 651          */
 652         if (priv->cfg->ops->hcmd->set_rxon_chain)
 653                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
 654         iwlcore_commit_rxon(priv);
 655
 656         priv->cfg->ops->hcmd->send_bt_config(priv);
 657 }
 658
 659 /**
 660  * iwl_bg_statistics_periodic - Timer callback to queue statistics
 661  *
 662  * This callback is provided in order to send a statistics request.
 663  *
 664  * This timer function is continually reset to execute within
 665  * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
 666  * was received.  We need to ensure we receive the statistics in order
 667  * to update the temperature used for calibrating the TXPOWER.
 668  */
 669 static void iwl_bg_statistics_periodic(unsigned long data)
 670 {
 671         struct iwl_priv *priv = (struct iwl_priv *)data;
 672
 673         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 674                 return;
 675
 676         /* dont send host command if rf-kill is on */
 677         if (!iwl_is_ready_rf(priv))
 678                 return;
 679
 680         iwl_send_statistics_request(priv, CMD_ASYNC, false);
 681 }
 682
 683
 684 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
 685                                         u32 start_idx, u32 num_events,
 686                                         u32 mode)
 687 {
 688         u32 i;
 689         u32 ptr;        /* SRAM byte address of log data */
 690         u32 ev, time, data; /* event log data */
 691         unsigned long reg_flags;
 692
 693         if (mode == 0)
 694                 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
 695         else
 696                 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
 697
 698         /* Make sure device is powered up for SRAM reads */
 699         spin_lock_irqsave(&priv->reg_lock, reg_flags);
 700         if (iwl_grab_nic_access(priv)) {
 701                 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 702                 return;
 703         }
 704
 705         /* Set starting address; reads will auto-increment */
 706         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
 707         rmb();
 708
 709         /*
 710          * "time" is actually "data" for mode 0 (no timestamp).
 711          * place event id # at far right for easier visual parsing.
 712          */
 713         for (i = 0; i < num_events; i++) {
 714                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 715                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 716                 if (mode == 0) {
 717                         trace_iwlwifi_dev_ucode_cont_event(priv,
 718                                                         0, time, ev);
 719                 } else {
 720                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
 721                         trace_iwlwifi_dev_ucode_cont_event(priv,
 722                                                 time, data, ev);
 723                 }
 724         }
 725         /* Allow device to power down */
 726         iwl_release_nic_access(priv);
 727         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
 728 }
 729
 730 static void iwl_continuous_event_trace(struct iwl_priv *priv)
 731 {
 732         u32 capacity;   /* event log capacity in # entries */
 733         u32 base;       /* SRAM byte address of event log header */
 734         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
 735         u32 num_wraps;  /* # times uCode wrapped to top of log */
 736         u32 next_entry; /* index of next entry to be written by uCode */
 737
 738         if (priv->ucode_type == UCODE_INIT)
 739                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
 740         else
 741                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 742         if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
 743                 capacity = iwl_read_targ_mem(priv, base);
 744                 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
 745                 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
 746                 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
 747         } else
 748                 return;
 749
 750         if (num_wraps == priv->event_log.num_wraps) {
 751                 iwl_print_cont_event_trace(priv,
 752                                        base, priv->event_log.next_entry,
 753                                        next_entry - priv->event_log.next_entry,
 754                                        mode);
 755                 priv->event_log.non_wraps_count++;
 756         } else {
 757                 if ((num_wraps - priv->event_log.num_wraps) > 1)
 758                         priv->event_log.wraps_more_count++;
 759                 else
 760                         priv->event_log.wraps_once_count++;
 761                 trace_iwlwifi_dev_ucode_wrap_event(priv,
 762                                 num_wraps - priv->event_log.num_wraps,
 763                                 next_entry, priv->event_log.next_entry);
 764                 if (next_entry < priv->event_log.next_entry) {
 765                         iwl_print_cont_event_trace(priv, base,
 766                                priv->event_log.next_entry,
 767                                capacity - priv->event_log.next_entry,
 768                                mode);
 769
 770                         iwl_print_cont_event_trace(priv, base, 0,
 771                                 next_entry, mode);
 772                 } else {
 773                         iwl_print_cont_event_trace(priv, base,
 774                                next_entry, capacity - next_entry,
 775                                mode);
 776
 777                         iwl_print_cont_event_trace(priv, base, 0,
 778                                 next_entry, mode);
 779                 }
 780         }
 781         priv->event_log.num_wraps = num_wraps;
 782         priv->event_log.next_entry = next_entry;
 783 }
 784
 785 /**
 786  * iwl_bg_ucode_trace - Timer callback to log ucode event
 787  *
 788  * The timer is continually set to execute every
 789  * UCODE_TRACE_PERIOD milliseconds after the last timer expired
 790  * this function is to perform continuous uCode event logging operation
 791  * if enabled
 792  */
 793 static void iwl_bg_ucode_trace(unsigned long data)
 794 {
 795         struct iwl_priv *priv = (struct iwl_priv *)data;
 796
 797         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 798                 return;
 799
 800         if (priv->event_log.ucode_trace) {
 801                 iwl_continuous_event_trace(priv);
 802                 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
 803                 mod_timer(&priv->ucode_trace,
 804                          jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
 805         }
 806 }
 807
 808 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
 809                                 struct iwl_rx_mem_buffer *rxb)
 810 {
 811         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 812         struct iwl4965_beacon_notif *beacon =
 813                 (struct iwl4965_beacon_notif *)pkt->u.raw;
 814 #ifdef CONFIG_IWLWIFI_DEBUG
 815         u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
 816
 817         IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
 818                 "tsf %d %d rate %d\n",
 819                 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
 820                 beacon->beacon_notify_hdr.failure_frame,
 821                 le32_to_cpu(beacon->ibss_mgr_status),
 822                 le32_to_cpu(beacon->high_tsf),
 823                 le32_to_cpu(beacon->low_tsf), rate);
 824 #endif
 825
 826         priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
 827
 828         if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
 829             (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
 830                 queue_work(priv->workqueue, &priv->beacon_update);
 831 }
 832
 833 /* Handle notification from uCode that card's power state is changing
 834  * due to software, hardware, or critical temperature RFKILL */
 835 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
 836                                     struct iwl_rx_mem_buffer *rxb)
 837 {
 838         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 839         u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
 840         unsigned long status = priv->status;
 841
 842         IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
 843                           (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 844                           (flags & SW_CARD_DISABLED) ? "Kill" : "On",
 845                           (flags & CT_CARD_DISABLED) ?
 846                           "Reached" : "Not reached");
 847
 848         if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
 849                      CT_CARD_DISABLED)) {
 850
 851                 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
 852                             CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 853
 854                 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 855                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 856
 857                 if (!(flags & RXON_CARD_DISABLED)) {
 858                         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
 859                                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 860                         iwl_write_direct32(priv, HBUS_TARG_MBX_C,
 861                                         HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
 862                 }
 863                 if (flags & CT_CARD_DISABLED)
 864                         iwl_tt_enter_ct_kill(priv);
 865         }
 866         if (!(flags & CT_CARD_DISABLED))
 867                 iwl_tt_exit_ct_kill(priv);
 868
 869         if (flags & HW_CARD_DISABLED)
 870                 set_bit(STATUS_RF_KILL_HW, &priv->status);
 871         else
 872                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
 873
 874
 875         if (!(flags & RXON_CARD_DISABLED))
 876                 iwl_scan_cancel(priv);
 877
 878         if ((test_bit(STATUS_RF_KILL_HW, &status) !=
 879              test_bit(STATUS_RF_KILL_HW, &priv->status)))
 880                 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
 881                         test_bit(STATUS_RF_KILL_HW, &priv->status));
 882         else
 883                 wake_up_interruptible(&priv->wait_command_queue);
 884 }
 885
 886 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 887 {
 888         if (src == IWL_PWR_SRC_VAUX) {
 889                 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
 890                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 891                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 892                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 893         } else {
 894                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 895                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 896                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 897         }
 898
 899         return 0;
 900 }
 901
 902 static void iwl_bg_tx_flush(struct work_struct *work)
 903 {
 904         struct iwl_priv *priv =
 905                 container_of(work, struct iwl_priv, tx_flush);
 906
 907         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
 908                 return;
 909
 910         /* do nothing if rf-kill is on */
 911         if (!iwl_is_ready_rf(priv))
 912                 return;
 913
 914         if (priv->cfg->ops->lib->txfifo_flush) {
 915                 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
 916                 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
 917         }
 918 }
 919
 920 /**
 921  * iwl_setup_rx_handlers - Initialize Rx handler callbacks
 922  *
 923  * Setup the RX handlers for each of the reply types sent from the uCode
 924  * to the host.
 925  *
 926  * This function chains into the hardware specific files for them to setup
 927  * any hardware specific handlers as well.
 928  */
 929 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
 930 {
 931         priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
 932         priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
 933         priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
 934         priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
 935                         iwl_rx_spectrum_measure_notif;
 936         priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
 937         priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
 938             iwl_rx_pm_debug_statistics_notif;
 939         priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
 940
 941         /*
 942          * The same handler is used for both the REPLY to a discrete
 943          * statistics request from the host as well as for the periodic
 944          * statistics notifications (after received beacons) from the uCode.
 945          */
 946         priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
 947         priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
 948
 949         iwl_setup_rx_scan_handlers(priv);
 950
 951         /* status change handler */
 952         priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
 953
 954         priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
 955             iwl_rx_missed_beacon_notif;
 956         /* Rx handlers */
 957         priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
 958         priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
 959         /* block ack */
 960         priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
 961         /* Set up hardware specific Rx handlers */
 962         priv->cfg->ops->lib->rx_handler_setup(priv);
 963 }
 964
 965 /**
 966  * iwl_rx_handle - Main entry function for receiving responses from uCode
 967  *
 968  * Uses the priv->rx_handlers callback function array to invoke
 969  * the appropriate handlers, including command responses,
 970  * frame-received notifications, and other notifications.
 971  */
 972 void iwl_rx_handle(struct iwl_priv *priv)
 973 {
 974         struct iwl_rx_mem_buffer *rxb;
 975         struct iwl_rx_packet *pkt;
 976         struct iwl_rx_queue *rxq = &priv->rxq;
 977         u32 r, i;
 978         int reclaim;
 979         unsigned long flags;
 980         u8 fill_rx = 0;
 981         u32 count = 8;
 982         int total_empty;
 983
 984         /* uCode's read index (stored in shared DRAM) indicates the last Rx
 985          * buffer that the driver may process (last buffer filled by ucode). */
 986         r = le16_to_cpu(rxq->rb_stts->closed_rb_num) &  0x0FFF;
 987         i = rxq->read;
 988
 989         /* Rx interrupt, but nothing sent from uCode */
 990         if (i == r)
 991                 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
 992
 993         /* calculate total frames need to be restock after handling RX */
 994         total_empty = r - rxq->write_actual;
 995         if (total_empty < 0)
 996                 total_empty += RX_QUEUE_SIZE;
 997
 998         if (total_empty > (RX_QUEUE_SIZE / 2))
 999                 fill_rx = 1;
1000
1001         while (i != r) {
1002                 int len;
1003
1004                 rxb = rxq->queue[i];
1005
1006                 /* If an RXB doesn't have a Rx queue slot associated with it,
1007                  * then a bug has been introduced in the queue refilling
1008                  * routines -- catch it here */
1009                 BUG_ON(rxb == NULL);
1010
1011                 rxq->queue[i] = NULL;
1012
1013                 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1014                                PAGE_SIZE << priv->hw_params.rx_page_order,
1015                                PCI_DMA_FROMDEVICE);
1016                 pkt = rxb_addr(rxb);
1017
1018                 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1019                 len += sizeof(u32); /* account for status word */
1020                 trace_iwlwifi_dev_rx(priv, pkt, len);
1021
1022                 /* Reclaim a command buffer only if this packet is a response
1023                  *   to a (driver-originated) command.
1024                  * If the packet (e.g. Rx frame) originated from uCode,
1025                  *   there is no command buffer to reclaim.
1026                  * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1027                  *   but apparently a few don't get set; catch them here. */
1028                 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1029                         (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
1030                         (pkt->hdr.cmd != REPLY_RX) &&
1031                         (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
1032                         (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
1033                         (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1034                         (pkt->hdr.cmd != REPLY_TX);
1035
1036                 /* Based on type of command response or notification,
1037                  *   handle those that need handling via function in
1038                  *   rx_handlers table.  See iwl_setup_rx_handlers() */
1039                 if (priv->rx_handlers[pkt->hdr.cmd]) {
1040                         IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
1041                                 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1042                         priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1043                         priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1044                 } else {
1045                         /* No handling needed */
1046                         IWL_DEBUG_RX(priv,
1047                                 "r %d i %d No handler needed for %s, 0x%02x\n",
1048                                 r, i, get_cmd_string(pkt->hdr.cmd),
1049                                 pkt->hdr.cmd);
1050                 }
1051
1052                 /*
1053                  * XXX: After here, we should always check rxb->page
1054                  * against NULL before touching it or its virtual
1055                  * memory (pkt). Because some rx_handler might have
1056                  * already taken or freed the pages.
1057                  */
1058
1059                 if (reclaim) {
1060                         /* Invoke any callbacks, transfer the buffer to caller,
1061                          * and fire off the (possibly) blocking iwl_send_cmd()
1062                          * as we reclaim the driver command queue */
1063                         if (rxb->page)
1064                                 iwl_tx_cmd_complete(priv, rxb);
1065                         else
1066                                 IWL_WARN(priv, "Claim null rxb?\n");
1067                 }
1068
1069                 /* Reuse the page if possible. For notification packets and
1070                  * SKBs that fail to Rx correctly, add them back into the
1071                  * rx_free list for reuse later. */
1072                 spin_lock_irqsave(&rxq->lock, flags);
1073                 if (rxb->page != NULL) {
1074                         rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1075                                 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1076                                 PCI_DMA_FROMDEVICE);
1077                         list_add_tail(&rxb->list, &rxq->rx_free);
1078                         rxq->free_count++;
1079                 } else
1080                         list_add_tail(&rxb->list, &rxq->rx_used);
1081
1082                 spin_unlock_irqrestore(&rxq->lock, flags);
1083
1084                 i = (i + 1) & RX_QUEUE_MASK;
1085                 /* If there are a lot of unused frames,
1086                  * restock the Rx queue so ucode wont assert. */
1087                 if (fill_rx) {
1088                         count++;
1089                         if (count >= 8) {
1090                                 rxq->read = i;
1091                                 iwlagn_rx_replenish_now(priv);
1092                                 count = 0;
1093                         }
1094                 }
1095         }
1096
1097         /* Backtrack one entry */
1098         rxq->read = i;
1099         if (fill_rx)
1100                 iwlagn_rx_replenish_now(priv);
1101         else
1102                 iwlagn_rx_queue_restock(priv);
1103 }
1104
1105 /* call this function to flush any scheduled tasklet */
1106 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1107 {
1108         /* wait to make sure we flush pending tasklet*/
1109         synchronize_irq(priv->pci_dev->irq);
1110         tasklet_kill(&priv->irq_tasklet);
1111 }
1112
1113 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1114 {
1115         u32 inta, handled = 0;
1116         u32 inta_fh;
1117         unsigned long flags;
1118         u32 i;
1119 #ifdef CONFIG_IWLWIFI_DEBUG
1120         u32 inta_mask;
1121 #endif
1122
1123         spin_lock_irqsave(&priv->lock, flags);
1124
1125         /* Ack/clear/reset pending uCode interrupts.
1126          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1127          *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
1128         inta = iwl_read32(priv, CSR_INT);
1129         iwl_write32(priv, CSR_INT, inta);
1130
1131         /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1132          * Any new interrupts that happen after this, either while we're
1133          * in this tasklet, or later, will show up in next ISR/tasklet. */
1134         inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1135         iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1136
1137 #ifdef CONFIG_IWLWIFI_DEBUG
1138         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1139                 /* just for debug */
1140                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1141                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1142                               inta, inta_mask, inta_fh);
1143         }
1144 #endif
1145
1146         spin_unlock_irqrestore(&priv->lock, flags);
1147
1148         /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1149          * atomic, make sure that inta covers all the interrupts that
1150          * we've discovered, even if FH interrupt came in just after
1151          * reading CSR_INT. */
1152         if (inta_fh & CSR49_FH_INT_RX_MASK)
1153                 inta |= CSR_INT_BIT_FH_RX;
1154         if (inta_fh & CSR49_FH_INT_TX_MASK)
1155                 inta |= CSR_INT_BIT_FH_TX;
1156
1157         /* Now service all interrupt bits discovered above. */
1158         if (inta & CSR_INT_BIT_HW_ERR) {
1159                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1160
1161                 /* Tell the device to stop sending interrupts */
1162                 iwl_disable_interrupts(priv);
1163
1164                 priv->isr_stats.hw++;
1165                 iwl_irq_handle_error(priv);
1166
1167                 handled |= CSR_INT_BIT_HW_ERR;
1168
1169                 return;
1170         }
1171
1172 #ifdef CONFIG_IWLWIFI_DEBUG
1173         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1174                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1175                 if (inta & CSR_INT_BIT_SCD) {
1176                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1177                                       "the frame/frames.\n");
1178                         priv->isr_stats.sch++;
1179                 }
1180
1181                 /* Alive notification via Rx interrupt will do the real work */
1182                 if (inta & CSR_INT_BIT_ALIVE) {
1183                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1184                         priv->isr_stats.alive++;
1185                 }
1186         }
1187 #endif
1188         /* Safely ignore these bits for debug checks below */
1189         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1190
1191         /* HW RF KILL switch toggled */
1192         if (inta & CSR_INT_BIT_RF_KILL) {
1193                 int hw_rf_kill = 0;
1194                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1195                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1196                         hw_rf_kill = 1;
1197
1198                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1199                                 hw_rf_kill ? "disable radio" : "enable radio");
1200
1201                 priv->isr_stats.rfkill++;
1202
1203                 /* driver only loads ucode once setting the interface up.
1204                  * the driver allows loading the ucode even if the radio
1205                  * is killed. Hence update the killswitch state here. The
1206                  * rfkill handler will care about restarting if needed.
1207                  */
1208                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1209                         if (hw_rf_kill)
1210                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1211                         else
1212                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1213                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1214                 }
1215
1216                 handled |= CSR_INT_BIT_RF_KILL;
1217         }
1218
1219         /* Chip got too hot and stopped itself */
1220         if (inta & CSR_INT_BIT_CT_KILL) {
1221                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1222                 priv->isr_stats.ctkill++;
1223                 handled |= CSR_INT_BIT_CT_KILL;
1224         }
1225
1226         /* Error detected by uCode */
1227         if (inta & CSR_INT_BIT_SW_ERR) {
1228                 IWL_ERR(priv, "Microcode SW error detected. "
1229                         " Restarting 0x%X.\n", inta);
1230                 priv->isr_stats.sw++;
1231                 priv->isr_stats.sw_err = inta;
1232                 iwl_irq_handle_error(priv);
1233                 handled |= CSR_INT_BIT_SW_ERR;
1234         }
1235
1236         /*
1237          * uCode wakes up after power-down sleep.
1238          * Tell device about any new tx or host commands enqueued,
1239          * and about any Rx buffers made available while asleep.
1240          */
1241         if (inta & CSR_INT_BIT_WAKEUP) {
1242                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1243                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1244                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1245                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1246                 priv->isr_stats.wakeup++;
1247                 handled |= CSR_INT_BIT_WAKEUP;
1248         }
1249
1250         /* All uCode command responses, including Tx command responses,
1251          * Rx "responses" (frame-received notification), and other
1252          * notifications from uCode come through here*/
1253         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1254                 iwl_rx_handle(priv);
1255                 priv->isr_stats.rx++;
1256                 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1257         }
1258
1259         /* This "Tx" DMA channel is used only for loading uCode */
1260         if (inta & CSR_INT_BIT_FH_TX) {
1261                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1262                 priv->isr_stats.tx++;
1263                 handled |= CSR_INT_BIT_FH_TX;
1264                 /* Wake up uCode load routine, now that load is complete */
1265                 priv->ucode_write_complete = 1;
1266                 wake_up_interruptible(&priv->wait_command_queue);
1267         }
1268
1269         if (inta & ~handled) {
1270                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1271                 priv->isr_stats.unhandled++;
1272         }
1273
1274         if (inta & ~(priv->inta_mask)) {
1275                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1276                          inta & ~priv->inta_mask);
1277                 IWL_WARN(priv, "   with FH_INT = 0x%08x\n", inta_fh);
1278         }
1279
1280         /* Re-enable all interrupts */
1281         /* only Re-enable if diabled by irq */
1282         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1283                 iwl_enable_interrupts(priv);
1284
1285 #ifdef CONFIG_IWLWIFI_DEBUG
1286         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1287                 inta = iwl_read32(priv, CSR_INT);
1288                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1289                 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1290                 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1291                         "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1292         }
1293 #endif
1294 }
1295
1296 /* tasklet for iwlagn interrupt */
1297 static void iwl_irq_tasklet(struct iwl_priv *priv)
1298 {
1299         u32 inta = 0;
1300         u32 handled = 0;
1301         unsigned long flags;
1302         u32 i;
1303 #ifdef CONFIG_IWLWIFI_DEBUG
1304         u32 inta_mask;
1305 #endif
1306
1307         spin_lock_irqsave(&priv->lock, flags);
1308
1309         /* Ack/clear/reset pending uCode interrupts.
1310          * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1311          */
1312         /* There is a hardware bug in the interrupt mask function that some
1313          * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1314          * they are disabled in the CSR_INT_MASK register. Furthermore the
1315          * ICT interrupt handling mechanism has another bug that might cause
1316          * these unmasked interrupts fail to be detected. We workaround the
1317          * hardware bugs here by ACKing all the possible interrupts so that
1318          * interrupt coalescing can still be achieved.
1319          */
1320         iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1321
1322         inta = priv->_agn.inta;
1323
1324 #ifdef CONFIG_IWLWIFI_DEBUG
1325         if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1326                 /* just for debug */
1327                 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1328                 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1329                                 inta, inta_mask);
1330         }
1331 #endif
1332
1333         spin_unlock_irqrestore(&priv->lock, flags);
1334
1335         /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1336         priv->_agn.inta = 0;
1337
1338         /* Now service all interrupt bits discovered above. */
1339         if (inta & CSR_INT_BIT_HW_ERR) {
1340                 IWL_ERR(priv, "Hardware error detected.  Restarting.\n");
1341
1342                 /* Tell the device to stop sending interrupts */
1343                 iwl_disable_interrupts(priv);
1344
1345                 priv->isr_stats.hw++;
1346                 iwl_irq_handle_error(priv);
1347
1348                 handled |= CSR_INT_BIT_HW_ERR;
1349
1350                 return;
1351         }
1352
1353 #ifdef CONFIG_IWLWIFI_DEBUG
1354         if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1355                 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1356                 if (inta & CSR_INT_BIT_SCD) {
1357                         IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1358                                       "the frame/frames.\n");
1359                         priv->isr_stats.sch++;
1360                 }
1361
1362                 /* Alive notification via Rx interrupt will do the real work */
1363                 if (inta & CSR_INT_BIT_ALIVE) {
1364                         IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1365                         priv->isr_stats.alive++;
1366                 }
1367         }
1368 #endif
1369         /* Safely ignore these bits for debug checks below */
1370         inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1371
1372         /* HW RF KILL switch toggled */
1373         if (inta & CSR_INT_BIT_RF_KILL) {
1374                 int hw_rf_kill = 0;
1375                 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1376                                 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1377                         hw_rf_kill = 1;
1378
1379                 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1380                                 hw_rf_kill ? "disable radio" : "enable radio");
1381
1382                 priv->isr_stats.rfkill++;
1383
1384                 /* driver only loads ucode once setting the interface up.
1385                  * the driver allows loading the ucode even if the radio
1386                  * is killed. Hence update the killswitch state here. The
1387                  * rfkill handler will care about restarting if needed.
1388                  */
1389                 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1390                         if (hw_rf_kill)
1391                                 set_bit(STATUS_RF_KILL_HW, &priv->status);
1392                         else
1393                                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1394                         wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1395                 }
1396
1397                 handled |= CSR_INT_BIT_RF_KILL;
1398         }
1399
1400         /* Chip got too hot and stopped itself */
1401         if (inta & CSR_INT_BIT_CT_KILL) {
1402                 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1403                 priv->isr_stats.ctkill++;
1404                 handled |= CSR_INT_BIT_CT_KILL;
1405         }
1406
1407         /* Error detected by uCode */
1408         if (inta & CSR_INT_BIT_SW_ERR) {
1409                 IWL_ERR(priv, "Microcode SW error detected. "
1410                         " Restarting 0x%X.\n", inta);
1411                 priv->isr_stats.sw++;
1412                 priv->isr_stats.sw_err = inta;
1413                 iwl_irq_handle_error(priv);
1414                 handled |= CSR_INT_BIT_SW_ERR;
1415         }
1416
1417         /* uCode wakes up after power-down sleep */
1418         if (inta & CSR_INT_BIT_WAKEUP) {
1419                 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1420                 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1421                 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1422                         iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1423
1424                 priv->isr_stats.wakeup++;
1425
1426                 handled |= CSR_INT_BIT_WAKEUP;
1427         }
1428
1429         /* All uCode command responses, including Tx command responses,
1430          * Rx "responses" (frame-received notification), and other
1431          * notifications from uCode come through here*/
1432         if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1433                         CSR_INT_BIT_RX_PERIODIC)) {
1434                 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1435                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1436                         handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1437                         iwl_write32(priv, CSR_FH_INT_STATUS,
1438                                         CSR49_FH_INT_RX_MASK);
1439                 }
1440                 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1441                         handled |= CSR_INT_BIT_RX_PERIODIC;
1442                         iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1443                 }
1444                 /* Sending RX interrupt require many steps to be done in the
1445                  * the device:
1446                  * 1- write interrupt to current index in ICT table.
1447                  * 2- dma RX frame.
1448                  * 3- update RX shared data to indicate last write index.
1449                  * 4- send interrupt.
1450                  * This could lead to RX race, driver could receive RX interrupt
1451                  * but the shared data changes does not reflect this;
1452                  * periodic interrupt will detect any dangling Rx activity.
1453                  */
1454
1455                 /* Disable periodic interrupt; we use it as just a one-shot. */
1456                 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1457                             CSR_INT_PERIODIC_DIS);
1458                 iwl_rx_handle(priv);
1459
1460                 /*
1461                  * Enable periodic interrupt in 8 msec only if we received
1462                  * real RX interrupt (instead of just periodic int), to catch
1463                  * any dangling Rx interrupt.  If it was just the periodic
1464                  * interrupt, there was no dangling Rx activity, and no need
1465                  * to extend the periodic interrupt; one-shot is enough.
1466                  */
1467                 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1468                         iwl_write8(priv, CSR_INT_PERIODIC_REG,
1469                                     CSR_INT_PERIODIC_ENA);
1470
1471                 priv->isr_stats.rx++;
1472         }
1473
1474         /* This "Tx" DMA channel is used only for loading uCode */
1475         if (inta & CSR_INT_BIT_FH_TX) {
1476                 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1477                 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1478                 priv->isr_stats.tx++;
1479                 handled |= CSR_INT_BIT_FH_TX;
1480                 /* Wake up uCode load routine, now that load is complete */
1481                 priv->ucode_write_complete = 1;
1482                 wake_up_interruptible(&priv->wait_command_queue);
1483         }
1484
1485         if (inta & ~handled) {
1486                 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1487                 priv->isr_stats.unhandled++;
1488         }
1489
1490         if (inta & ~(priv->inta_mask)) {
1491                 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1492                          inta & ~priv->inta_mask);
1493         }
1494
1495         /* Re-enable all interrupts */
1496         /* only Re-enable if diabled by irq */
1497         if (test_bit(STATUS_INT_ENABLED, &priv->status))
1498                 iwl_enable_interrupts(priv);
1499 }
1500
1501 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1502 #define ACK_CNT_RATIO (50)
1503 #define BA_TIMEOUT_CNT (5)
1504 #define BA_TIMEOUT_MAX (16)
1505
1506 /**
1507  * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1508  *
1509  * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1510  * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1511  * operation state.
1512  */
1513 bool iwl_good_ack_health(struct iwl_priv *priv,
1514                                 struct iwl_rx_packet *pkt)
1515 {
1516         bool rc = true;
1517         int actual_ack_cnt_delta, expected_ack_cnt_delta;
1518         int ba_timeout_delta;
1519
1520         actual_ack_cnt_delta =
1521                 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1522                 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1523         expected_ack_cnt_delta =
1524                 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1525                 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1526         ba_timeout_delta =
1527                 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1528                 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1529         if ((priv->_agn.agg_tids_count > 0) &&
1530             (expected_ack_cnt_delta > 0) &&
1531             (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1532                 < ACK_CNT_RATIO) &&
1533             (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1534                 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1535                                 " expected_ack_cnt = %d\n",
1536                                 actual_ack_cnt_delta, expected_ack_cnt_delta);
1537
1538 #ifdef CONFIG_IWLWIFI_DEBUGFS
1539                 /*
1540                  * This is ifdef'ed on DEBUGFS because otherwise the
1541                  * statistics aren't available. If DEBUGFS is set but
1542                  * DEBUG is not, these will just compile out.
1543                  */
1544                 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1545                                 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1546                 IWL_DEBUG_RADIO(priv,
1547                                 "ack_or_ba_timeout_collision delta = %d\n",
1548                                 priv->_agn.delta_statistics.tx.
1549                                 ack_or_ba_timeout_collision);
1550 #endif
1551                 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1552                                 ba_timeout_delta);
1553                 if (!actual_ack_cnt_delta &&
1554                     (ba_timeout_delta >= BA_TIMEOUT_MAX))
1555                         rc = false;
1556         }
1557         return rc;
1558 }
1559
1560
1561 /*****************************************************************************
1562  *
1563  * sysfs attributes
1564  *
1565  *****************************************************************************/
1566
1567 #ifdef CONFIG_IWLWIFI_DEBUG
1568
1569 /*
1570  * The following adds a new attribute to the sysfs representation
1571  * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1572  * used for controlling the debug level.
1573  *
1574  * See the level definitions in iwl for details.
1575  *
1576  * The debug_level being managed using sysfs below is a per device debug
1577  * level that is used instead of the global debug level if it (the per
1578  * device debug level) is set.
1579  */
1580 static ssize_t show_debug_level(struct device *d,
1581                                 struct device_attribute *attr, char *buf)
1582 {
1583         struct iwl_priv *priv = dev_get_drvdata(d);
1584         return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1585 }
1586 static ssize_t store_debug_level(struct device *d,
1587                                 struct device_attribute *attr,
1588                                  const char *buf, size_t count)
1589 {
1590         struct iwl_priv *priv = dev_get_drvdata(d);
1591         unsigned long val;
1592         int ret;
1593
1594         ret = strict_strtoul(buf, 0, &val);
1595         if (ret)
1596                 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1597         else {
1598                 priv->debug_level = val;
1599                 if (iwl_alloc_traffic_mem(priv))
1600                         IWL_ERR(priv,
1601                                 "Not enough memory to generate traffic log\n");
1602         }
1603         return strnlen(buf, count);
1604 }
1605
1606 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1607                         show_debug_level, store_debug_level);
1608
1609
1610 #endif /* CONFIG_IWLWIFI_DEBUG */
1611
1612
1613 static ssize_t show_temperature(struct device *d,
1614                                 struct device_attribute *attr, char *buf)
1615 {
1616         struct iwl_priv *priv = dev_get_drvdata(d);
1617
1618         if (!iwl_is_alive(priv))
1619                 return -EAGAIN;
1620
1621         return sprintf(buf, "%d\n", priv->temperature);
1622 }
1623
1624 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1625
1626 static ssize_t show_tx_power(struct device *d,
1627                              struct device_attribute *attr, char *buf)
1628 {
1629         struct iwl_priv *priv = dev_get_drvdata(d);
1630
1631         if (!iwl_is_ready_rf(priv))
1632                 return sprintf(buf, "off\n");
1633         else
1634                 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1635 }
1636
1637 static ssize_t store_tx_power(struct device *d,
1638                               struct device_attribute *attr,
1639                               const char *buf, size_t count)
1640 {
1641         struct iwl_priv *priv = dev_get_drvdata(d);
1642         unsigned long val;
1643         int ret;
1644
1645         ret = strict_strtoul(buf, 10, &val);
1646         if (ret)
1647                 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1648         else {
1649                 ret = iwl_set_tx_power(priv, val, false);
1650                 if (ret)
1651                         IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1652                                 ret);
1653                 else
1654                         ret = count;
1655         }
1656         return ret;
1657 }
1658
1659 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1660
1661 static struct attribute *iwl_sysfs_entries[] = {
1662         &dev_attr_temperature.attr,
1663         &dev_attr_tx_power.attr,
1664 #ifdef CONFIG_IWLWIFI_DEBUG
1665         &dev_attr_debug_level.attr,
1666 #endif
1667         NULL
1668 };
1669
1670 static struct attribute_group iwl_attribute_group = {
1671         .name = NULL,           /* put in device directory */
1672         .attrs = iwl_sysfs_entries,
1673 };
1674
1675 /******************************************************************************
1676  *
1677  * uCode download functions
1678  *
1679  ******************************************************************************/
1680
1681 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1682 {
1683         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1684         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1685         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1686         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1687         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1688         iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1689 }
1690
1691 static void iwl_nic_start(struct iwl_priv *priv)
1692 {
1693         /* Remove all resets to allow NIC to operate */
1694         iwl_write32(priv, CSR_RESET, 0);
1695 }
1696
1697 struct iwlagn_ucode_capabilities {
1698         u32 max_probe_length;
1699         u32 standard_phy_calibration_size;
1700 };
1701
1702 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1703 static int iwl_mac_setup_register(struct iwl_priv *priv,
1704                                   struct iwlagn_ucode_capabilities *capa);
1705
1706 #define UCODE_EXPERIMENTAL_INDEX        100
1707 #define UCODE_EXPERIMENTAL_TAG          "exp"
1708
1709 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1710 {
1711         const char *name_pre = priv->cfg->fw_name_pre;
1712         char tag[8];
1713
1714         if (first) {
1715 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1716                 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1717                 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1718         } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1719 #endif
1720                 priv->fw_index = priv->cfg->ucode_api_max;
1721                 sprintf(tag, "%d", priv->fw_index);
1722         } else {
1723                 priv->fw_index--;
1724                 sprintf(tag, "%d", priv->fw_index);
1725         }
1726
1727         if (priv->fw_index < priv->cfg->ucode_api_min) {
1728                 IWL_ERR(priv, "no suitable firmware found!\n");
1729                 return -ENOENT;
1730         }
1731
1732         sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1733
1734         IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1735                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1736                                 ? "EXPERIMENTAL " : "",
1737                        priv->firmware_name);
1738
1739         return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1740                                        &priv->pci_dev->dev, GFP_KERNEL, priv,
1741                                        iwl_ucode_callback);
1742 }
1743
1744 struct iwlagn_firmware_pieces {
1745         const void *inst, *data, *init, *init_data, *boot;
1746         size_t inst_size, data_size, init_size, init_data_size, boot_size;
1747
1748         u32 build;
1749
1750         u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1751         u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1752 };
1753
1754 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1755                                        const struct firmware *ucode_raw,
1756                                        struct iwlagn_firmware_pieces *pieces)
1757 {
1758         struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1759         u32 api_ver, hdr_size;
1760         const u8 *src;
1761
1762         priv->ucode_ver = le32_to_cpu(ucode->ver);
1763         api_ver = IWL_UCODE_API(priv->ucode_ver);
1764
1765         switch (api_ver) {
1766         default:
1767                 /*
1768                  * 4965 doesn't revision the firmware file format
1769                  * along with the API version, it always uses v1
1770                  * file format.
1771                  */
1772                 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1773                                 CSR_HW_REV_TYPE_4965) {
1774                         hdr_size = 28;
1775                         if (ucode_raw->size < hdr_size) {
1776                                 IWL_ERR(priv, "File size too small!\n");
1777                                 return -EINVAL;
1778                         }
1779                         pieces->build = le32_to_cpu(ucode->u.v2.build);
1780                         pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1781                         pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1782                         pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1783                         pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1784                         pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1785                         src = ucode->u.v2.data;
1786                         break;
1787                 }
1788                 /* fall through for 4965 */
1789         case 0:
1790         case 1:
1791         case 2:
1792                 hdr_size = 24;
1793                 if (ucode_raw->size < hdr_size) {
1794                         IWL_ERR(priv, "File size too small!\n");
1795                         return -EINVAL;
1796                 }
1797                 pieces->build = 0;
1798                 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1799                 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1800                 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1801                 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1802                 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1803                 src = ucode->u.v1.data;
1804                 break;
1805         }
1806
1807         /* Verify size of file vs. image size info in file's header */
1808         if (ucode_raw->size != hdr_size + pieces->inst_size +
1809                                 pieces->data_size + pieces->init_size +
1810                                 pieces->init_data_size + pieces->boot_size) {
1811
1812                 IWL_ERR(priv,
1813                         "uCode file size %d does not match expected size\n",
1814                         (int)ucode_raw->size);
1815                 return -EINVAL;
1816         }
1817
1818         pieces->inst = src;
1819         src += pieces->inst_size;
1820         pieces->data = src;
1821         src += pieces->data_size;
1822         pieces->init = src;
1823         src += pieces->init_size;
1824         pieces->init_data = src;
1825         src += pieces->init_data_size;
1826         pieces->boot = src;
1827         src += pieces->boot_size;
1828
1829         return 0;
1830 }
1831
1832 static int iwlagn_wanted_ucode_alternative = 1;
1833
1834 static int iwlagn_load_firmware(struct iwl_priv *priv,
1835                                 const struct firmware *ucode_raw,
1836                                 struct iwlagn_firmware_pieces *pieces,
1837                                 struct iwlagn_ucode_capabilities *capa)
1838 {
1839         struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1840         struct iwl_ucode_tlv *tlv;
1841         size_t len = ucode_raw->size;
1842         const u8 *data;
1843         int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1844         u64 alternatives;
1845         u32 tlv_len;
1846         enum iwl_ucode_tlv_type tlv_type;
1847         const u8 *tlv_data;
1848
1849         if (len < sizeof(*ucode)) {
1850                 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1851                 return -EINVAL;
1852         }
1853
1854         if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1855                 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1856                         le32_to_cpu(ucode->magic));
1857                 return -EINVAL;
1858         }
1859
1860         /*
1861          * Check which alternatives are present, and "downgrade"
1862          * when the chosen alternative is not present, warning
1863          * the user when that happens. Some files may not have
1864          * any alternatives, so don't warn in that case.
1865          */
1866         alternatives = le64_to_cpu(ucode->alternatives);
1867         tmp = wanted_alternative;
1868         if (wanted_alternative > 63)
1869                 wanted_alternative = 63;
1870         while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1871                 wanted_alternative--;
1872         if (wanted_alternative && wanted_alternative != tmp)
1873                 IWL_WARN(priv,
1874                          "uCode alternative %d not available, choosing %d\n",
1875                          tmp, wanted_alternative);
1876
1877         priv->ucode_ver = le32_to_cpu(ucode->ver);
1878         pieces->build = le32_to_cpu(ucode->build);
1879         data = ucode->data;
1880
1881         len -= sizeof(*ucode);
1882
1883         while (len >= sizeof(*tlv)) {
1884                 u16 tlv_alt;
1885
1886                 len -= sizeof(*tlv);
1887                 tlv = (void *)data;
1888
1889                 tlv_len = le32_to_cpu(tlv->length);
1890                 tlv_type = le16_to_cpu(tlv->type);
1891                 tlv_alt = le16_to_cpu(tlv->alternative);
1892                 tlv_data = tlv->data;
1893
1894                 if (len < tlv_len) {
1895                         IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1896                                 len, tlv_len);
1897                         return -EINVAL;
1898                 }
1899                 len -= ALIGN(tlv_len, 4);
1900                 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1901
1902                 /*
1903                  * Alternative 0 is always valid.
1904                  *
1905                  * Skip alternative TLVs that are not selected.
1906                  */
1907                 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1908                         continue;
1909
1910                 switch (tlv_type) {
1911                 case IWL_UCODE_TLV_INST:
1912                         pieces->inst = tlv_data;
1913                         pieces->inst_size = tlv_len;
1914                         break;
1915                 case IWL_UCODE_TLV_DATA:
1916                         pieces->data = tlv_data;
1917                         pieces->data_size = tlv_len;
1918                         break;
1919                 case IWL_UCODE_TLV_INIT:
1920                         pieces->init = tlv_data;
1921                         pieces->init_size = tlv_len;
1922                         break;
1923                 case IWL_UCODE_TLV_INIT_DATA:
1924                         pieces->init_data = tlv_data;
1925                         pieces->init_data_size = tlv_len;
1926                         break;
1927                 case IWL_UCODE_TLV_BOOT:
1928                         pieces->boot = tlv_data;
1929                         pieces->boot_size = tlv_len;
1930                         break;
1931                 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1932                         if (tlv_len != sizeof(u32))
1933                                 goto invalid_tlv_len;
1934                         capa->max_probe_length =
1935                                         le32_to_cpup((__le32 *)tlv_data);
1936                         break;
1937                 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1938                         if (tlv_len != sizeof(u32))
1939                                 goto invalid_tlv_len;
1940                         pieces->init_evtlog_ptr =
1941                                         le32_to_cpup((__le32 *)tlv_data);
1942                         break;
1943                 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1944                         if (tlv_len != sizeof(u32))
1945                                 goto invalid_tlv_len;
1946                         pieces->init_evtlog_size =
1947                                         le32_to_cpup((__le32 *)tlv_data);
1948                         break;
1949                 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1950                         if (tlv_len != sizeof(u32))
1951                                 goto invalid_tlv_len;
1952                         pieces->init_errlog_ptr =
1953                                         le32_to_cpup((__le32 *)tlv_data);
1954                         break;
1955                 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1956                         if (tlv_len != sizeof(u32))
1957                                 goto invalid_tlv_len;
1958                         pieces->inst_evtlog_ptr =
1959                                         le32_to_cpup((__le32 *)tlv_data);
1960                         break;
1961                 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1962                         if (tlv_len != sizeof(u32))
1963                                 goto invalid_tlv_len;
1964                         pieces->inst_evtlog_size =
1965                                         le32_to_cpup((__le32 *)tlv_data);
1966                         break;
1967                 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1968                         if (tlv_len != sizeof(u32))
1969                                 goto invalid_tlv_len;
1970                         pieces->inst_errlog_ptr =
1971                                         le32_to_cpup((__le32 *)tlv_data);
1972                         break;
1973                 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1974                         if (tlv_len)
1975                                 goto invalid_tlv_len;
1976                         priv->enhance_sensitivity_table = true;
1977                         break;
1978                 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
1979                         if (tlv_len != sizeof(u32))
1980                                 goto invalid_tlv_len;
1981                         capa->standard_phy_calibration_size =
1982                                         le32_to_cpup((__le32 *)tlv_data);
1983                         break;
1984                 default:
1985                         IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
1986                         break;
1987                 }
1988         }
1989
1990         if (len) {
1991                 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
1992                 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
1993                 return -EINVAL;
1994         }
1995
1996         return 0;
1997
1998  invalid_tlv_len:
1999         IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
2000         iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
2001
2002         return -EINVAL;
2003 }
2004
2005 /**
2006  * iwl_ucode_callback - callback when firmware was loaded
2007  *
2008  * If loaded successfully, copies the firmware into buffers
2009  * for the card to fetch (via DMA).
2010  */
2011 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
2012 {
2013         struct iwl_priv *priv = context;
2014         struct iwl_ucode_header *ucode;
2015         int err;
2016         struct iwlagn_firmware_pieces pieces;
2017         const unsigned int api_max = priv->cfg->ucode_api_max;
2018         const unsigned int api_min = priv->cfg->ucode_api_min;
2019         u32 api_ver;
2020         char buildstr[25];
2021         u32 build;
2022         struct iwlagn_ucode_capabilities ucode_capa = {
2023                 .max_probe_length = 200,
2024                 .standard_phy_calibration_size =
2025                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
2026         };
2027
2028         memset(&pieces, 0, sizeof(pieces));
2029
2030         if (!ucode_raw) {
2031                 if (priv->fw_index <= priv->cfg->ucode_api_max)
2032                         IWL_ERR(priv,
2033                                 "request for firmware file '%s' failed.\n",
2034                                 priv->firmware_name);
2035                 goto try_again;
2036         }
2037
2038         IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
2039                        priv->firmware_name, ucode_raw->size);
2040
2041         /* Make sure that we got at least the API version number */
2042         if (ucode_raw->size < 4) {
2043                 IWL_ERR(priv, "File size way too small!\n");
2044                 goto try_again;
2045         }
2046
2047         /* Data from ucode file:  header followed by uCode images */
2048         ucode = (struct iwl_ucode_header *)ucode_raw->data;
2049
2050         if (ucode->ver)
2051                 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2052         else
2053                 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2054                                            &ucode_capa);
2055
2056         if (err)
2057                 goto try_again;
2058
2059         api_ver = IWL_UCODE_API(priv->ucode_ver);
2060         build = pieces.build;
2061
2062         /*
2063          * api_ver should match the api version forming part of the
2064          * firmware filename ... but we don't check for that and only rely
2065          * on the API version read from firmware header from here on forward
2066          */
2067         if (api_ver < api_min || api_ver > api_max) {
2068                 IWL_ERR(priv, "Driver unable to support your firmware API. "
2069                           "Driver supports v%u, firmware is v%u.\n",
2070                           api_max, api_ver);
2071                 goto try_again;
2072         }
2073
2074         if (api_ver != api_max)
2075                 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2076                           "got v%u. New firmware can be obtained "
2077                           "from http://www.intellinuxwireless.org.\n",
2078                           api_max, api_ver);
2079
2080         if (build)
2081                 sprintf(buildstr, " build %u%s", build,
2082                        (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
2083                                 ? " (EXP)" : "");
2084         else
2085                 buildstr[0] = '\0';
2086
2087         IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2088                  IWL_UCODE_MAJOR(priv->ucode_ver),
2089                  IWL_UCODE_MINOR(priv->ucode_ver),
2090                  IWL_UCODE_API(priv->ucode_ver),
2091                  IWL_UCODE_SERIAL(priv->ucode_ver),
2092                  buildstr);
2093
2094         snprintf(priv->hw->wiphy->fw_version,
2095                  sizeof(priv->hw->wiphy->fw_version),
2096                  "%u.%u.%u.%u%s",
2097                  IWL_UCODE_MAJOR(priv->ucode_ver),
2098                  IWL_UCODE_MINOR(priv->ucode_ver),
2099                  IWL_UCODE_API(priv->ucode_ver),
2100                  IWL_UCODE_SERIAL(priv->ucode_ver),
2101                  buildstr);
2102
2103         /*
2104          * For any of the failures below (before allocating pci memory)
2105          * we will try to load a version with a smaller API -- maybe the
2106          * user just got a corrupted version of the latest API.
2107          */
2108
2109         IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2110                        priv->ucode_ver);
2111         IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2112                        pieces.inst_size);
2113         IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2114                        pieces.data_size);
2115         IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2116                        pieces.init_size);
2117         IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2118                        pieces.init_data_size);
2119         IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2120                        pieces.boot_size);
2121
2122         /* Verify that uCode images will fit in card's SRAM */
2123         if (pieces.inst_size > priv->hw_params.max_inst_size) {
2124                 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2125                         pieces.inst_size);
2126                 goto try_again;
2127         }
2128
2129         if (pieces.data_size > priv->hw_params.max_data_size) {
2130                 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2131                         pieces.data_size);
2132                 goto try_again;
2133         }
2134
2135         if (pieces.init_size > priv->hw_params.max_inst_size) {
2136                 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2137                         pieces.init_size);
2138                 goto try_again;
2139         }
2140
2141         if (pieces.init_data_size > priv->hw_params.max_data_size) {
2142                 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2143                         pieces.init_data_size);
2144                 goto try_again;
2145         }
2146
2147         if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2148                 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2149                         pieces.boot_size);
2150                 goto try_again;
2151         }
2152
2153         /* Allocate ucode buffers for card's bus-master loading ... */
2154
2155         /* Runtime instructions and 2 copies of data:
2156          * 1) unmodified from disk
2157          * 2) backup cache for save/restore during power-downs */
2158         priv->ucode_code.len = pieces.inst_size;
2159         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2160
2161         priv->ucode_data.len = pieces.data_size;
2162         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2163
2164         priv->ucode_data_backup.len = pieces.data_size;
2165         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2166
2167         if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2168             !priv->ucode_data_backup.v_addr)
2169                 goto err_pci_alloc;
2170
2171         /* Initialization instructions and data */
2172         if (pieces.init_size && pieces.init_data_size) {
2173                 priv->ucode_init.len = pieces.init_size;
2174                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2175
2176                 priv->ucode_init_data.len = pieces.init_data_size;
2177                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2178
2179                 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2180                         goto err_pci_alloc;
2181         }
2182
2183         /* Bootstrap (instructions only, no data) */
2184         if (pieces.boot_size) {
2185                 priv->ucode_boot.len = pieces.boot_size;
2186                 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2187
2188                 if (!priv->ucode_boot.v_addr)
2189                         goto err_pci_alloc;
2190         }
2191
2192         /* Now that we can no longer fail, copy information */
2193
2194         /*
2195          * The (size - 16) / 12 formula is based on the information recorded
2196          * for each event, which is of mode 1 (including timestamp) for all
2197          * new microcodes that include this information.
2198          */
2199         priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2200         if (pieces.init_evtlog_size)
2201                 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2202         else
2203                 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2204         priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2205         priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2206         if (pieces.inst_evtlog_size)
2207                 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2208         else
2209                 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2210         priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2211
2212         /* Copy images into buffers for card's bus-master reads ... */
2213
2214         /* Runtime instructions (first block of data in file) */
2215         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2216                         pieces.inst_size);
2217         memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2218
2219         IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2220                 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2221
2222         /*
2223          * Runtime data
2224          * NOTE:  Copy into backup buffer will be done in iwl_up()
2225          */
2226         IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2227                         pieces.data_size);
2228         memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2229         memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2230
2231         /* Initialization instructions */
2232         if (pieces.init_size) {
2233                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2234                                 pieces.init_size);
2235                 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2236         }
2237
2238         /* Initialization data */
2239         if (pieces.init_data_size) {
2240                 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2241                                pieces.init_data_size);
2242                 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2243                        pieces.init_data_size);
2244         }
2245
2246         /* Bootstrap instructions */
2247         IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2248                         pieces.boot_size);
2249         memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2250
2251         /*
2252          * figure out the offset of chain noise reset and gain commands
2253          * base on the size of standard phy calibration commands table size
2254          */
2255         if (ucode_capa.standard_phy_calibration_size >
2256             IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2257                 ucode_capa.standard_phy_calibration_size =
2258                         IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2259
2260         priv->_agn.phy_calib_chain_noise_reset_cmd =
2261                 ucode_capa.standard_phy_calibration_size;
2262         priv->_agn.phy_calib_chain_noise_gain_cmd =
2263                 ucode_capa.standard_phy_calibration_size + 1;
2264
2265         /**************************************************
2266          * This is still part of probe() in a sense...
2267          *
2268          * 9. Setup and register with mac80211 and debugfs
2269          **************************************************/
2270         err = iwl_mac_setup_register(priv, &ucode_capa);
2271         if (err)
2272                 goto out_unbind;
2273
2274         err = iwl_dbgfs_register(priv, DRV_NAME);
2275         if (err)
2276                 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2277
2278         err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2279                                         &iwl_attribute_group);
2280         if (err) {
2281                 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2282                 goto out_unbind;
2283         }
2284
2285         /* We have our copies now, allow OS release its copies */
2286         release_firmware(ucode_raw);
2287         complete(&priv->_agn.firmware_loading_complete);
2288         return;
2289
2290  try_again:
2291         /* try next, if any */
2292         if (iwl_request_firmware(priv, false))
2293                 goto out_unbind;
2294         release_firmware(ucode_raw);
2295         return;
2296
2297  err_pci_alloc:
2298         IWL_ERR(priv, "failed to allocate pci memory\n");
2299         iwl_dealloc_ucode_pci(priv);
2300  out_unbind:
2301         complete(&priv->_agn.firmware_loading_complete);
2302         device_release_driver(&priv->pci_dev->dev);
2303         release_firmware(ucode_raw);
2304 }
2305
2306 static const char *desc_lookup_text[] = {
2307         "OK",
2308         "FAIL",
2309         "BAD_PARAM",
2310         "BAD_CHECKSUM",
2311         "NMI_INTERRUPT_WDG",
2312         "SYSASSERT",
2313         "FATAL_ERROR",
2314         "BAD_COMMAND",
2315         "HW_ERROR_TUNE_LOCK",
2316         "HW_ERROR_TEMPERATURE",
2317         "ILLEGAL_CHAN_FREQ",
2318         "VCC_NOT_STABLE",
2319         "FH_ERROR",
2320         "NMI_INTERRUPT_HOST",
2321         "NMI_INTERRUPT_ACTION_PT",
2322         "NMI_INTERRUPT_UNKNOWN",
2323         "UCODE_VERSION_MISMATCH",
2324         "HW_ERROR_ABS_LOCK",
2325         "HW_ERROR_CAL_LOCK_FAIL",
2326         "NMI_INTERRUPT_INST_ACTION_PT",
2327         "NMI_INTERRUPT_DATA_ACTION_PT",
2328         "NMI_TRM_HW_ER",
2329         "NMI_INTERRUPT_TRM",
2330         "NMI_INTERRUPT_BREAK_POINT"
2331         "DEBUG_0",
2332         "DEBUG_1",
2333         "DEBUG_2",
2334         "DEBUG_3",
2335 };
2336
2337 static struct { char *name; u8 num; } advanced_lookup[] = {
2338         { "NMI_INTERRUPT_WDG", 0x34 },
2339         { "SYSASSERT", 0x35 },
2340         { "UCODE_VERSION_MISMATCH", 0x37 },
2341         { "BAD_COMMAND", 0x38 },
2342         { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2343         { "FATAL_ERROR", 0x3D },
2344         { "NMI_TRM_HW_ERR", 0x46 },
2345         { "NMI_INTERRUPT_TRM", 0x4C },
2346         { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2347         { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2348         { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2349         { "NMI_INTERRUPT_HOST", 0x66 },
2350         { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2351         { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2352         { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2353         { "ADVANCED_SYSASSERT", 0 },
2354 };
2355
2356 static const char *desc_lookup(u32 num)
2357 {
2358         int i;
2359         int max = ARRAY_SIZE(desc_lookup_text);
2360
2361         if (num < max)
2362                 return desc_lookup_text[num];
2363
2364         max = ARRAY_SIZE(advanced_lookup) - 1;
2365         for (i = 0; i < max; i++) {
2366                 if (advanced_lookup[i].num == num)
2367                         break;;
2368         }
2369         return advanced_lookup[i].name;
2370 }
2371
2372 #define ERROR_START_OFFSET  (1 * sizeof(u32))
2373 #define ERROR_ELEM_SIZE     (7 * sizeof(u32))
2374
2375 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2376 {
2377         u32 data2, line;
2378         u32 desc, time, count, base, data1;
2379         u32 blink1, blink2, ilink1, ilink2;
2380         u32 pc, hcmd;
2381
2382         if (priv->ucode_type == UCODE_INIT) {
2383                 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2384                 if (!base)
2385                         base = priv->_agn.init_errlog_ptr;
2386         } else {
2387                 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2388                 if (!base)
2389                         base = priv->_agn.inst_errlog_ptr;
2390         }
2391
2392         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2393                 IWL_ERR(priv,
2394                         "Not valid error log pointer 0x%08X for %s uCode\n",
2395                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2396                 return;
2397         }
2398
2399         count = iwl_read_targ_mem(priv, base);
2400
2401         if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2402                 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2403                 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2404                         priv->status, count);
2405         }
2406
2407         desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2408         pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2409         blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2410         blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2411         ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2412         ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2413         data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2414         data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2415         line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2416         time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2417         hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2418
2419         trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2420                                       blink1, blink2, ilink1, ilink2);
2421
2422         IWL_ERR(priv, "Desc                                  Time       "
2423                 "data1      data2      line\n");
2424         IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2425                 desc_lookup(desc), desc, time, data1, data2, line);
2426         IWL_ERR(priv, "pc      blink1  blink2  ilink1  ilink2  hcmd\n");
2427         IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2428                 pc, blink1, blink2, ilink1, ilink2, hcmd);
2429 }
2430
2431 #define EVENT_START_OFFSET  (4 * sizeof(u32))
2432
2433 /**
2434  * iwl_print_event_log - Dump error event log to syslog
2435  *
2436  */
2437 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2438                                u32 num_events, u32 mode,
2439                                int pos, char **buf, size_t bufsz)
2440 {
2441         u32 i;
2442         u32 base;       /* SRAM byte address of event log header */
2443         u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2444         u32 ptr;        /* SRAM byte address of log data */
2445         u32 ev, time, data; /* event log data */
2446         unsigned long reg_flags;
2447
2448         if (num_events == 0)
2449                 return pos;
2450
2451         if (priv->ucode_type == UCODE_INIT) {
2452                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2453                 if (!base)
2454                         base = priv->_agn.init_evtlog_ptr;
2455         } else {
2456                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2457                 if (!base)
2458                         base = priv->_agn.inst_evtlog_ptr;
2459         }
2460
2461         if (mode == 0)
2462                 event_size = 2 * sizeof(u32);
2463         else
2464                 event_size = 3 * sizeof(u32);
2465
2466         ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2467
2468         /* Make sure device is powered up for SRAM reads */
2469         spin_lock_irqsave(&priv->reg_lock, reg_flags);
2470         iwl_grab_nic_access(priv);
2471
2472         /* Set starting address; reads will auto-increment */
2473         _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2474         rmb();
2475
2476         /* "time" is actually "data" for mode 0 (no timestamp).
2477         * place event id # at far right for easier visual parsing. */
2478         for (i = 0; i < num_events; i++) {
2479                 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2480                 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2481                 if (mode == 0) {
2482                         /* data, ev */
2483                         if (bufsz) {
2484                                 pos += scnprintf(*buf + pos, bufsz - pos,
2485                                                 "EVT_LOG:0x%08x:%04u\n",
2486                                                 time, ev);
2487                         } else {
2488                                 trace_iwlwifi_dev_ucode_event(priv, 0,
2489                                         time, ev);
2490                                 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2491                                         time, ev);
2492                         }
2493                 } else {
2494                         data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2495                         if (bufsz) {
2496                                 pos += scnprintf(*buf + pos, bufsz - pos,
2497                                                 "EVT_LOGT:%010u:0x%08x:%04u\n",
2498                                                  time, data, ev);
2499                         } else {
2500                                 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2501                                         time, data, ev);
2502                                 trace_iwlwifi_dev_ucode_event(priv, time,
2503                                         data, ev);
2504                         }
2505                 }
2506         }
2507
2508         /* Allow device to power down */
2509         iwl_release_nic_access(priv);
2510         spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2511         return pos;
2512 }
2513
2514 /**
2515  * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2516  */
2517 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2518                                     u32 num_wraps, u32 next_entry,
2519                                     u32 size, u32 mode,
2520                                     int pos, char **buf, size_t bufsz)
2521 {
2522         /*
2523          * display the newest DEFAULT_LOG_ENTRIES entries
2524          * i.e the entries just before the next ont that uCode would fill.
2525          */
2526         if (num_wraps) {
2527                 if (next_entry < size) {
2528                         pos = iwl_print_event_log(priv,
2529                                                 capacity - (size - next_entry),
2530                                                 size - next_entry, mode,
2531                                                 pos, buf, bufsz);
2532                         pos = iwl_print_event_log(priv, 0,
2533                                                   next_entry, mode,
2534                                                   pos, buf, bufsz);
2535                 } else
2536                         pos = iwl_print_event_log(priv, next_entry - size,
2537                                                   size, mode, pos, buf, bufsz);
2538         } else {
2539                 if (next_entry < size) {
2540                         pos = iwl_print_event_log(priv, 0, next_entry,
2541                                                   mode, pos, buf, bufsz);
2542                 } else {
2543                         pos = iwl_print_event_log(priv, next_entry - size,
2544                                                   size, mode, pos, buf, bufsz);
2545                 }
2546         }
2547         return pos;
2548 }
2549
2550 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2551
2552 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2553                             char **buf, bool display)
2554 {
2555         u32 base;       /* SRAM byte address of event log header */
2556         u32 capacity;   /* event log capacity in # entries */
2557         u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
2558         u32 num_wraps;  /* # times uCode wrapped to top of log */
2559         u32 next_entry; /* index of next entry to be written by uCode */
2560         u32 size;       /* # entries that we'll print */
2561         u32 logsize;
2562         int pos = 0;
2563         size_t bufsz = 0;
2564
2565         if (priv->ucode_type == UCODE_INIT) {
2566                 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2567                 logsize = priv->_agn.init_evtlog_size;
2568                 if (!base)
2569                         base = priv->_agn.init_evtlog_ptr;
2570         } else {
2571                 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2572                 logsize = priv->_agn.inst_evtlog_size;
2573                 if (!base)
2574                         base = priv->_agn.inst_evtlog_ptr;
2575         }
2576
2577         if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2578                 IWL_ERR(priv,
2579                         "Invalid event log pointer 0x%08X for %s uCode\n",
2580                         base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2581                 return -EINVAL;
2582         }
2583
2584         /* event log header */
2585         capacity = iwl_read_targ_mem(priv, base);
2586         mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2587         num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2588         next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2589
2590         if (capacity > logsize) {
2591                 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2592                         capacity, logsize);
2593                 capacity = logsize;
2594         }
2595
2596         if (next_entry > logsize) {
2597                 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2598                         next_entry, logsize);
2599                 next_entry = logsize;
2600         }
2601
2602         size = num_wraps ? capacity : next_entry;
2603
2604         /* bail out if nothing in log */
2605         if (size == 0) {
2606                 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2607                 return pos;
2608         }
2609
2610         /* enable/disable bt channel announcement */
2611         priv->bt_ch_announce = iwlagn_bt_ch_announce;
2612
2613 #ifdef CONFIG_IWLWIFI_DEBUG
2614         if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2615                 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2616                         ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2617 #else
2618         size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2619                 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2620 #endif
2621         IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2622                 size);
2623
2624 #ifdef CONFIG_IWLWIFI_DEBUG
2625         if (display) {
2626                 if (full_log)
2627                         bufsz = capacity * 48;
2628                 else
2629                         bufsz = size * 48;
2630                 *buf = kmalloc(bufsz, GFP_KERNEL);
2631                 if (!*buf)
2632                         return -ENOMEM;
2633         }
2634         if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2635                 /*
2636                  * if uCode has wrapped back to top of log,
2637                  * start at the oldest entry,
2638                  * i.e the next one that uCode would fill.
2639                  */
2640                 if (num_wraps)
2641                         pos = iwl_print_event_log(priv, next_entry,
2642                                                 capacity - next_entry, mode,
2643                                                 pos, buf, bufsz);
2644                 /* (then/else) start at top of log */
2645                 pos = iwl_print_event_log(priv, 0,
2646                                           next_entry, mode, pos, buf, bufsz);
2647         } else
2648                 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2649                                                 next_entry, size, mode,
2650                                                 pos, buf, bufsz);
2651 #else
2652         pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2653                                         next_entry, size, mode,
2654                                         pos, buf, bufsz);
2655 #endif
2656         return pos;
2657 }
2658
2659 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2660 {
2661         struct iwl_ct_kill_config cmd;
2662         struct iwl_ct_kill_throttling_config adv_cmd;
2663         unsigned long flags;
2664         int ret = 0;
2665
2666         spin_lock_irqsave(&priv->lock, flags);
2667         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2668                     CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2669         spin_unlock_irqrestore(&priv->lock, flags);
2670         priv->thermal_throttle.ct_kill_toggle = false;
2671
2672         if (priv->cfg->support_ct_kill_exit) {
2673                 adv_cmd.critical_temperature_enter =
2674                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2675                 adv_cmd.critical_temperature_exit =
2676                         cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2677
2678                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2679                                        sizeof(adv_cmd), &adv_cmd);
2680                 if (ret)
2681                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2682                 else
2683                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2684                                         "succeeded, "
2685                                         "critical temperature enter is %d,"
2686                                         "exit is %d\n",
2687                                        priv->hw_params.ct_kill_threshold,
2688                                        priv->hw_params.ct_kill_exit_threshold);
2689         } else {
2690                 cmd.critical_temperature_R =
2691                         cpu_to_le32(priv->hw_params.ct_kill_threshold);
2692
2693                 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2694                                        sizeof(cmd), &cmd);
2695                 if (ret)
2696                         IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2697                 else
2698                         IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2699                                         "succeeded, "
2700                                         "critical temperature is %d\n",
2701                                         priv->hw_params.ct_kill_threshold);
2702         }
2703 }
2704
2705 /**
2706  * iwl_alive_start - called after REPLY_ALIVE notification received
2707  *                   from protocol/runtime uCode (initialization uCode's
2708  *                   Alive gets handled by iwl_init_alive_start()).
2709  */
2710 static void iwl_alive_start(struct iwl_priv *priv)
2711 {
2712         int ret = 0;
2713
2714         IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2715
2716         if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2717                 /* We had an error bringing up the hardware, so take it
2718                  * all the way back down so we can try again */
2719                 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2720                 goto restart;
2721         }
2722
2723         /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2724          * This is a paranoid check, because we would not have gotten the
2725          * "runtime" alive if code weren't properly loaded.  */
2726         if (iwl_verify_ucode(priv)) {
2727                 /* Runtime instruction load was bad;
2728                  * take it all the way back down so we can try again */
2729                 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2730                 goto restart;
2731         }
2732
2733         ret = priv->cfg->ops->lib->alive_notify(priv);
2734         if (ret) {
2735                 IWL_WARN(priv,
2736                         "Could not complete ALIVE transition [ntf]: %d\n", ret);
2737                 goto restart;
2738         }
2739
2740         /* After the ALIVE response, we can send host commands to the uCode */
2741         set_bit(STATUS_ALIVE, &priv->status);
2742
2743         if (priv->cfg->ops->lib->recover_from_tx_stall) {
2744                 /* Enable timer to monitor the driver queues */
2745                 mod_timer(&priv->monitor_recover,
2746                         jiffies +
2747                         msecs_to_jiffies(priv->cfg->monitor_recover_period));
2748         }
2749
2750         if (iwl_is_rfkill(priv))
2751                 return;
2752
2753         ieee80211_wake_queues(priv->hw);
2754
2755         priv->active_rate = IWL_RATES_MASK;
2756
2757         /* Configure Tx antenna selection based on H/W config */
2758         if (priv->cfg->ops->hcmd->set_tx_ant)
2759                 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2760
2761         if (iwl_is_associated(priv)) {
2762                 struct iwl_rxon_cmd *active_rxon =
2763                                 (struct iwl_rxon_cmd *)&priv->active_rxon;
2764                 /* apply any changes in staging */
2765                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2766                 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2767         } else {
2768                 /* Initialize our rx_config data */
2769                 iwl_connection_init_rx_config(priv, NULL);
2770
2771                 if (priv->cfg->ops->hcmd->set_rxon_chain)
2772                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
2773         }
2774
2775         if (!priv->cfg->advanced_bt_coexist) {
2776                 /* Configure Bluetooth device coexistence support */
2777                 priv->cfg->ops->hcmd->send_bt_config(priv);
2778         }
2779
2780         iwl_reset_run_time_calib(priv);
2781
2782         /* Configure the adapter for unassociated operation */
2783         iwlcore_commit_rxon(priv);
2784
2785         /* At this point, the NIC is initialized and operational */
2786         iwl_rf_kill_ct_config(priv);
2787
2788         iwl_leds_init(priv);
2789
2790         IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2791         set_bit(STATUS_READY, &priv->status);
2792         wake_up_interruptible(&priv->wait_command_queue);
2793
2794         iwl_power_update_mode(priv, true);
2795         IWL_DEBUG_INFO(priv, "Updated power mode\n");
2796
2797
2798         return;
2799
2800  restart:
2801         queue_work(priv->workqueue, &priv->restart);
2802 }
2803
2804 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2805
2806 static void __iwl_down(struct iwl_priv *priv)
2807 {
2808         unsigned long flags;
2809         int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2810
2811         IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2812
2813         if (!exit_pending)
2814                 set_bit(STATUS_EXIT_PENDING, &priv->status);
2815
2816         /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2817          * to prevent rearm timer */
2818         if (priv->cfg->ops->lib->recover_from_tx_stall)
2819                 del_timer_sync(&priv->monitor_recover);
2820
2821         iwl_clear_ucode_stations(priv);
2822         iwl_dealloc_bcast_station(priv);
2823         iwl_clear_driver_stations(priv);
2824
2825         /* reset BT coex data */
2826         priv->bt_traffic_load = priv->cfg->bt_init_traffic_load;
2827         priv->bt_sco_active = false;
2828         priv->bt_full_concurrent = false;
2829         priv->bt_ci_compliance = 0;
2830
2831         /* Unblock any waiting calls */
2832         wake_up_interruptible_all(&priv->wait_command_queue);
2833
2834         /* Wipe out the EXIT_PENDING status bit if we are not actually
2835          * exiting the module */
2836         if (!exit_pending)
2837                 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2838
2839         /* stop and reset the on-board processor */
2840         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2841
2842         /* tell the device to stop sending interrupts */
2843         spin_lock_irqsave(&priv->lock, flags);
2844         iwl_disable_interrupts(priv);
2845         spin_unlock_irqrestore(&priv->lock, flags);
2846         iwl_synchronize_irq(priv);
2847
2848         if (priv->mac80211_registered)
2849                 ieee80211_stop_queues(priv->hw);
2850
2851         /* If we have not previously called iwl_init() then
2852          * clear all bits but the RF Kill bit and return */
2853         if (!iwl_is_init(priv)) {
2854                 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2855                                         STATUS_RF_KILL_HW |
2856                                test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2857                                         STATUS_GEO_CONFIGURED |
2858                                test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2859                                         STATUS_EXIT_PENDING;
2860                 goto exit;
2861         }
2862
2863         /* ...otherwise clear out all the status bits but the RF Kill
2864          * bit and continue taking the NIC down. */
2865         priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2866                                 STATUS_RF_KILL_HW |
2867                         test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2868                                 STATUS_GEO_CONFIGURED |
2869                         test_bit(STATUS_FW_ERROR, &priv->status) <<
2870                                 STATUS_FW_ERROR |
2871                        test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2872                                 STATUS_EXIT_PENDING;
2873
2874         /* device going down, Stop using ICT table */
2875         iwl_disable_ict(priv);
2876
2877         iwlagn_txq_ctx_stop(priv);
2878         iwlagn_rxq_stop(priv);
2879
2880         /* Power-down device's busmaster DMA clocks */
2881         iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2882         udelay(5);
2883
2884         /* Make sure (redundant) we've released our request to stay awake */
2885         iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2886
2887         /* Stop the device, and put it in low power state */
2888         priv->cfg->ops->lib->apm_ops.stop(priv);
2889
2890  exit:
2891         memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2892
2893         if (priv->ibss_beacon)
2894                 dev_kfree_skb(priv->ibss_beacon);
2895         priv->ibss_beacon = NULL;
2896
2897         /* clear out any free frames */
2898         iwl_clear_free_frames(priv);
2899 }
2900
2901 static void iwl_down(struct iwl_priv *priv)
2902 {
2903         mutex_lock(&priv->mutex);
2904         __iwl_down(priv);
2905         mutex_unlock(&priv->mutex);
2906
2907         iwl_cancel_deferred_work(priv);
2908 }
2909
2910 #define HW_READY_TIMEOUT (50)
2911
2912 static int iwl_set_hw_ready(struct iwl_priv *priv)
2913 {
2914         int ret = 0;
2915
2916         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2917                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2918
2919         /* See if we got it */
2920         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2921                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2922                                 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2923                                 HW_READY_TIMEOUT);
2924         if (ret != -ETIMEDOUT)
2925                 priv->hw_ready = true;
2926         else
2927                 priv->hw_ready = false;
2928
2929         IWL_DEBUG_INFO(priv, "hardware %s\n",
2930                       (priv->hw_ready == 1) ? "ready" : "not ready");
2931         return ret;
2932 }
2933
2934 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2935 {
2936         int ret = 0;
2937
2938         IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2939
2940         ret = iwl_set_hw_ready(priv);
2941         if (priv->hw_ready)
2942                 return ret;
2943
2944         /* If HW is not ready, prepare the conditions to check again */
2945         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2946                         CSR_HW_IF_CONFIG_REG_PREPARE);
2947
2948         ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2949                         ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2950                         CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2951
2952         /* HW should be ready by now, check again. */
2953         if (ret != -ETIMEDOUT)
2954                 iwl_set_hw_ready(priv);
2955
2956         return ret;
2957 }
2958
2959 #define MAX_HW_RESTARTS 5
2960
2961 static int __iwl_up(struct iwl_priv *priv)
2962 {
2963         int i;
2964         int ret;
2965
2966         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2967                 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2968                 return -EIO;
2969         }
2970
2971         if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2972                 IWL_ERR(priv, "ucode not available for device bringup\n");
2973                 return -EIO;
2974         }
2975
2976         ret = iwl_alloc_bcast_station(priv, true);
2977         if (ret)
2978                 return ret;
2979
2980         iwl_prepare_card_hw(priv);
2981
2982         if (!priv->hw_ready) {
2983                 IWL_WARN(priv, "Exit HW not ready\n");
2984                 return -EIO;
2985         }
2986
2987         /* If platform's RF_KILL switch is NOT set to KILL */
2988         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2989                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2990         else
2991                 set_bit(STATUS_RF_KILL_HW, &priv->status);
2992
2993         if (iwl_is_rfkill(priv)) {
2994                 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2995
2996                 iwl_enable_interrupts(priv);
2997                 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2998                 return 0;
2999         }
3000
3001         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3002
3003         ret = iwlagn_hw_nic_init(priv);
3004         if (ret) {
3005                 IWL_ERR(priv, "Unable to init nic\n");
3006                 return ret;
3007         }
3008
3009         /* make sure rfkill handshake bits are cleared */
3010         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3011         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
3012                     CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3013
3014         /* clear (again), then enable host interrupts */
3015         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3016         iwl_enable_interrupts(priv);
3017
3018         /* really make sure rfkill handshake bits are cleared */
3019         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3020         iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3021
3022         /* Copy original ucode data image from disk into backup cache.
3023          * This will be used to initialize the on-board processor's
3024          * data SRAM for a clean start when the runtime program first loads. */
3025         memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
3026                priv->ucode_data.len);
3027
3028         for (i = 0; i < MAX_HW_RESTARTS; i++) {
3029
3030                 /* load bootstrap state machine,
3031                  * load bootstrap program into processor's memory,
3032                  * prepare to load the "initialize" uCode */
3033                 ret = priv->cfg->ops->lib->load_ucode(priv);
3034
3035                 if (ret) {
3036                         IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
3037                                 ret);
3038                         continue;
3039                 }
3040
3041                 /* start card; "initialize" will load runtime ucode */
3042                 iwl_nic_start(priv);
3043
3044                 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
3045
3046                 return 0;
3047         }
3048
3049         set_bit(STATUS_EXIT_PENDING, &priv->status);
3050         __iwl_down(priv);
3051         clear_bit(STATUS_EXIT_PENDING, &priv->status);
3052
3053         /* tried to restart and config the device for as long as our
3054          * patience could withstand */
3055         IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
3056         return -EIO;
3057 }
3058
3059
3060 /*****************************************************************************
3061  *
3062  * Workqueue callbacks
3063  *
3064  *****************************************************************************/
3065
3066 static void iwl_bg_init_alive_start(struct work_struct *data)
3067 {
3068         struct iwl_priv *priv =
3069             container_of(data, struct iwl_priv, init_alive_start.work);
3070
3071         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3072                 return;
3073
3074         mutex_lock(&priv->mutex);
3075         priv->cfg->ops->lib->init_alive_start(priv);
3076         mutex_unlock(&priv->mutex);
3077 }
3078
3079 static void iwl_bg_alive_start(struct work_struct *data)
3080 {
3081         struct iwl_priv *priv =
3082             container_of(data, struct iwl_priv, alive_start.work);
3083
3084         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3085                 return;
3086
3087         /* enable dram interrupt */
3088         iwl_reset_ict(priv);
3089
3090         mutex_lock(&priv->mutex);
3091         iwl_alive_start(priv);
3092         mutex_unlock(&priv->mutex);
3093 }
3094
3095 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3096 {
3097         struct iwl_priv *priv = container_of(work, struct iwl_priv,
3098                         run_time_calib_work);
3099
3100         mutex_lock(&priv->mutex);
3101
3102         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3103             test_bit(STATUS_SCANNING, &priv->status)) {
3104                 mutex_unlock(&priv->mutex);
3105                 return;
3106         }
3107
3108         if (priv->start_calib) {
3109                 if (priv->cfg->bt_statistics) {
3110                         iwl_chain_noise_calibration(priv,
3111                                         (void *)&priv->_agn.statistics_bt);
3112                         iwl_sensitivity_calibration(priv,
3113                                         (void *)&priv->_agn.statistics_bt);
3114                 } else {
3115                         iwl_chain_noise_calibration(priv,
3116                                         (void *)&priv->_agn.statistics);
3117                         iwl_sensitivity_calibration(priv,
3118                                         (void *)&priv->_agn.statistics);
3119                 }
3120         }
3121
3122         mutex_unlock(&priv->mutex);
3123 }
3124
3125 static void iwl_bg_restart(struct work_struct *data)
3126 {
3127         struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3128
3129         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3130                 return;
3131
3132         if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3133                 bool bt_sco, bt_full_concurrent;
3134                 u8 bt_ci_compliance;
3135                 u8 bt_load;
3136
3137                 mutex_lock(&priv->mutex);
3138                 priv->vif = NULL;
3139                 priv->is_open = 0;
3140
3141                 /*
3142                  * __iwl_down() will clear the BT status variables,
3143                  * which is correct, but when we restart we really
3144                  * want to keep them so restore them afterwards.
3145                  *
3146                  * The restart process will later pick them up and
3147                  * re-configure the hw when we reconfigure the BT
3148                  * command.
3149                  */
3150                 bt_sco = priv->bt_sco_active;
3151                 bt_full_concurrent = priv->bt_full_concurrent;
3152                 bt_ci_compliance = priv->bt_ci_compliance;
3153                 bt_load = priv->bt_traffic_load;
3154
3155                 __iwl_down(priv);
3156
3157                 priv->bt_sco_active = bt_sco;
3158                 priv->bt_full_concurrent = bt_full_concurrent;
3159                 priv->bt_ci_compliance = bt_ci_compliance;
3160                 priv->bt_traffic_load = bt_load;
3161
3162                 mutex_unlock(&priv->mutex);
3163                 iwl_cancel_deferred_work(priv);
3164                 ieee80211_restart_hw(priv->hw);
3165         } else {
3166                 iwl_down(priv);
3167
3168                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3169                         return;
3170
3171                 mutex_lock(&priv->mutex);
3172                 __iwl_up(priv);
3173                 mutex_unlock(&priv->mutex);
3174         }
3175 }
3176
3177 static void iwl_bg_rx_replenish(struct work_struct *data)
3178 {
3179         struct iwl_priv *priv =
3180             container_of(data, struct iwl_priv, rx_replenish);
3181
3182         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3183                 return;
3184
3185         mutex_lock(&priv->mutex);
3186         iwlagn_rx_replenish(priv);
3187         mutex_unlock(&priv->mutex);
3188 }
3189
3190 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3191
3192 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3193 {
3194         struct ieee80211_conf *conf = NULL;
3195         int ret = 0;
3196
3197         if (!vif || !priv->is_open)
3198                 return;
3199
3200         if (vif->type == NL80211_IFTYPE_AP) {
3201                 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3202                 return;
3203         }
3204
3205         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3206                 return;
3207
3208         iwl_scan_cancel_timeout(priv, 200);
3209
3210         conf = ieee80211_get_hw_conf(priv->hw);
3211
3212         priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3213         iwlcore_commit_rxon(priv);
3214
3215         ret = iwl_send_rxon_timing(priv, vif);
3216         if (ret)
3217                 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3218                             "Attempting to continue.\n");
3219
3220         priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3221
3222         iwl_set_rxon_ht(priv, &priv->current_ht_config);
3223
3224         if (priv->cfg->ops->hcmd->set_rxon_chain)
3225                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3226
3227         priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3228
3229         IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3230                         vif->bss_conf.aid, vif->bss_conf.beacon_int);
3231
3232         if (vif->bss_conf.use_short_preamble)
3233                 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3234         else
3235                 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3236
3237         if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3238                 if (vif->bss_conf.use_short_slot)
3239                         priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3240                 else
3241                         priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3242         }
3243
3244         iwlcore_commit_rxon(priv);
3245
3246         IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3247                         vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3248
3249         switch (vif->type) {
3250         case NL80211_IFTYPE_STATION:
3251                 break;
3252         case NL80211_IFTYPE_ADHOC:
3253                 iwl_send_beacon_cmd(priv);
3254                 break;
3255         default:
3256                 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3257                           __func__, vif->type);
3258                 break;
3259         }
3260
3261         /* the chain noise calibration will enabled PM upon completion
3262          * If chain noise has already been run, then we need to enable
3263          * power management here */
3264         if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3265                 iwl_power_update_mode(priv, false);
3266
3267         /* Enable Rx differential gain and sensitivity calibrations */
3268         iwl_chain_noise_reset(priv);
3269         priv->start_calib = 1;
3270
3271 }
3272
3273 /*****************************************************************************
3274  *
3275  * mac80211 entry point functions
3276  *
3277  *****************************************************************************/
3278
3279 #define UCODE_READY_TIMEOUT     (4 * HZ)
3280
3281 /*
3282  * Not a mac80211 entry point function, but it fits in with all the
3283  * other mac80211 functions grouped here.
3284  */
3285 static int iwl_mac_setup_register(struct iwl_priv *priv,
3286                                   struct iwlagn_ucode_capabilities *capa)
3287 {
3288         int ret;
3289         struct ieee80211_hw *hw = priv->hw;
3290         hw->rate_control_algorithm = "iwl-agn-rs";
3291
3292         /* Tell mac80211 our characteristics */
3293         hw->flags = IEEE80211_HW_SIGNAL_DBM |
3294                     IEEE80211_HW_AMPDU_AGGREGATION |
3295                     IEEE80211_HW_SPECTRUM_MGMT;
3296
3297         if (!priv->cfg->broken_powersave)
3298                 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3299                              IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3300
3301         if (priv->cfg->sku & IWL_SKU_N)
3302                 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3303                              IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3304
3305         hw->sta_data_size = sizeof(struct iwl_station_priv);
3306         hw->vif_data_size = sizeof(struct iwl_vif_priv);
3307
3308         hw->wiphy->interface_modes =
3309                 BIT(NL80211_IFTYPE_STATION) |
3310                 BIT(NL80211_IFTYPE_ADHOC);
3311
3312         hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3313                             WIPHY_FLAG_DISABLE_BEACON_HINTS;
3314
3315         /*
3316          * For now, disable PS by default because it affects
3317          * RX performance significantly.
3318          */
3319         hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3320
3321         hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3322         /* we create the 802.11 header and a zero-length SSID element */
3323         hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3324
3325         /* Default value; 4 EDCA QOS priorities */
3326         hw->queues = 4;
3327
3328         hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3329
3330         if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3331                 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3332                         &priv->bands[IEEE80211_BAND_2GHZ];
3333         if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3334                 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3335                         &priv->bands[IEEE80211_BAND_5GHZ];
3336
3337         ret = ieee80211_register_hw(priv->hw);
3338         if (ret) {
3339                 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3340                 return ret;
3341         }
3342         priv->mac80211_registered = 1;
3343
3344         return 0;
3345 }
3346
3347
3348 static int iwl_mac_start(struct ieee80211_hw *hw)
3349 {
3350         struct iwl_priv *priv = hw->priv;
3351         int ret;
3352
3353         IWL_DEBUG_MAC80211(priv, "enter\n");
3354
3355         /* we should be verifying the device is ready to be opened */
3356         mutex_lock(&priv->mutex);
3357         ret = __iwl_up(priv);
3358         mutex_unlock(&priv->mutex);
3359
3360         if (ret)
3361                 return ret;
3362
3363         if (iwl_is_rfkill(priv))
3364                 goto out;
3365
3366         IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3367
3368         /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3369          * mac80211 will not be run successfully. */
3370         ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3371                         test_bit(STATUS_READY, &priv->status),
3372                         UCODE_READY_TIMEOUT);
3373         if (!ret) {
3374                 if (!test_bit(STATUS_READY, &priv->status)) {
3375                         IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3376                                 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3377                         return -ETIMEDOUT;
3378                 }
3379         }
3380
3381         iwl_led_start(priv);
3382
3383 out:
3384         priv->is_open = 1;
3385         IWL_DEBUG_MAC80211(priv, "leave\n");
3386         return 0;
3387 }
3388
3389 static void iwl_mac_stop(struct ieee80211_hw *hw)
3390 {
3391         struct iwl_priv *priv = hw->priv;
3392
3393         IWL_DEBUG_MAC80211(priv, "enter\n");
3394
3395         if (!priv->is_open)
3396                 return;
3397
3398         priv->is_open = 0;
3399
3400         if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3401                 /* stop mac, cancel any scan request and clear
3402                  * RXON_FILTER_ASSOC_MSK BIT
3403                  */
3404                 mutex_lock(&priv->mutex);
3405                 iwl_scan_cancel_timeout(priv, 100);
3406                 mutex_unlock(&priv->mutex);
3407         }
3408
3409         iwl_down(priv);
3410
3411         flush_workqueue(priv->workqueue);
3412
3413         /* enable interrupts again in order to receive rfkill changes */
3414         iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3415         iwl_enable_interrupts(priv);
3416
3417         IWL_DEBUG_MAC80211(priv, "leave\n");
3418 }
3419
3420 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3421 {
3422         struct iwl_priv *priv = hw->priv;
3423
3424         IWL_DEBUG_MACDUMP(priv, "enter\n");
3425
3426         IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3427                      ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3428
3429         if (iwlagn_tx_skb(priv, skb))
3430                 dev_kfree_skb_any(skb);
3431
3432         IWL_DEBUG_MACDUMP(priv, "leave\n");
3433         return NETDEV_TX_OK;
3434 }
3435
3436 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3437 {
3438         int ret = 0;
3439
3440         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3441                 return;
3442
3443         /* The following should be done only at AP bring up */
3444         if (!iwl_is_associated(priv)) {
3445
3446                 /* RXON - unassoc (to set timing command) */
3447                 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3448                 iwlcore_commit_rxon(priv);
3449
3450                 /* RXON Timing */
3451                 ret = iwl_send_rxon_timing(priv, vif);
3452                 if (ret)
3453                         IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3454                                         "Attempting to continue.\n");
3455
3456                 /* AP has all antennas */
3457                 priv->chain_noise_data.active_chains =
3458                         priv->hw_params.valid_rx_ant;
3459                 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3460                 if (priv->cfg->ops->hcmd->set_rxon_chain)
3461                         priv->cfg->ops->hcmd->set_rxon_chain(priv);
3462
3463                 priv->staging_rxon.assoc_id = 0;
3464
3465                 if (vif->bss_conf.use_short_preamble)
3466                         priv->staging_rxon.flags |=
3467                                 RXON_FLG_SHORT_PREAMBLE_MSK;
3468                 else
3469                         priv->staging_rxon.flags &=
3470                                 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3471
3472                 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3473                         if (vif->bss_conf.use_short_slot)
3474                                 priv->staging_rxon.flags |=
3475                                         RXON_FLG_SHORT_SLOT_MSK;
3476                         else
3477                                 priv->staging_rxon.flags &=
3478                                         ~RXON_FLG_SHORT_SLOT_MSK;
3479                 }
3480                 /* restore RXON assoc */
3481                 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3482                 iwlcore_commit_rxon(priv);
3483         }
3484         iwl_send_beacon_cmd(priv);
3485
3486         /* FIXME - we need to add code here to detect a totally new
3487          * configuration, reset the AP, unassoc, rxon timing, assoc,
3488          * clear sta table, add BCAST sta... */
3489 }
3490
3491 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3492                                     struct ieee80211_vif *vif,
3493                                     struct ieee80211_key_conf *keyconf,
3494                                     struct ieee80211_sta *sta,
3495                                     u32 iv32, u16 *phase1key)
3496 {
3497
3498         struct iwl_priv *priv = hw->priv;
3499         IWL_DEBUG_MAC80211(priv, "enter\n");
3500
3501         iwl_update_tkip_key(priv, keyconf, sta,
3502                             iv32, phase1key);
3503
3504         IWL_DEBUG_MAC80211(priv, "leave\n");
3505 }
3506
3507 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3508                            struct ieee80211_vif *vif,
3509                            struct ieee80211_sta *sta,
3510                            struct ieee80211_key_conf *key)
3511 {
3512         struct iwl_priv *priv = hw->priv;
3513         int ret;
3514         u8 sta_id;
3515         bool is_default_wep_key = false;
3516
3517         IWL_DEBUG_MAC80211(priv, "enter\n");
3518
3519         if (priv->cfg->mod_params->sw_crypto) {
3520                 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3521                 return -EOPNOTSUPP;
3522         }
3523
3524         sta_id = iwl_sta_id_or_broadcast(priv, sta);
3525         if (sta_id == IWL_INVALID_STATION)
3526                 return -EINVAL;
3527
3528         mutex_lock(&priv->mutex);
3529         iwl_scan_cancel_timeout(priv, 100);
3530
3531         /*
3532          * If we are getting WEP group key and we didn't receive any key mapping
3533          * so far, we are in legacy wep mode (group key only), otherwise we are
3534          * in 1X mode.
3535          * In legacy wep mode, we use another host command to the uCode.
3536          */
3537         if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3538              key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3539             !sta) {
3540                 if (cmd == SET_KEY)
3541                         is_default_wep_key = !priv->key_mapping_key;
3542                 else
3543                         is_default_wep_key =
3544                                         (key->hw_key_idx == HW_KEY_DEFAULT);
3545         }
3546
3547         switch (cmd) {
3548         case SET_KEY:
3549                 if (is_default_wep_key)
3550                         ret = iwl_set_default_wep_key(priv, key);
3551                 else
3552                         ret = iwl_set_dynamic_key(priv, key, sta_id);
3553
3554                 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3555                 break;
3556         case DISABLE_KEY:
3557                 if (is_default_wep_key)
3558                         ret = iwl_remove_default_wep_key(priv, key);
3559                 else
3560                         ret = iwl_remove_dynamic_key(priv, key, sta_id);
3561
3562                 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3563                 break;
3564         default:
3565                 ret = -EINVAL;
3566         }
3567
3568         mutex_unlock(&priv->mutex);
3569         IWL_DEBUG_MAC80211(priv, "leave\n");
3570
3571         return ret;
3572 }
3573
3574 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3575                                 struct ieee80211_vif *vif,
3576                                 enum ieee80211_ampdu_mlme_action action,
3577                                 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3578 {
3579         struct iwl_priv *priv = hw->priv;
3580         int ret = -EINVAL;
3581
3582         IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3583                      sta->addr, tid);
3584
3585         if (!(priv->cfg->sku & IWL_SKU_N))
3586                 return -EACCES;
3587
3588         mutex_lock(&priv->mutex);
3589
3590         switch (action) {
3591         case IEEE80211_AMPDU_RX_START:
3592                 IWL_DEBUG_HT(priv, "start Rx\n");
3593                 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3594                 break;
3595         case IEEE80211_AMPDU_RX_STOP:
3596                 IWL_DEBUG_HT(priv, "stop Rx\n");
3597                 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3598                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3599                         ret = 0;
3600                 break;
3601         case IEEE80211_AMPDU_TX_START:
3602                 IWL_DEBUG_HT(priv, "start Tx\n");
3603                 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3604                 if (ret == 0) {
3605                         priv->_agn.agg_tids_count++;
3606                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3607                                      priv->_agn.agg_tids_count);
3608                 }
3609                 break;
3610         case IEEE80211_AMPDU_TX_STOP:
3611                 IWL_DEBUG_HT(priv, "stop Tx\n");
3612                 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3613                 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3614                         priv->_agn.agg_tids_count--;
3615                         IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3616                                      priv->_agn.agg_tids_count);
3617                 }
3618                 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3619                         ret = 0;
3620                 if (priv->cfg->use_rts_for_aggregation) {
3621                         struct iwl_station_priv *sta_priv =
3622                                 (void *) sta->drv_priv;
3623                         /*
3624                          * switch off RTS/CTS if it was previously enabled
3625                          */
3626
3627                         sta_priv->lq_sta.lq.general_params.flags &=
3628                                 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3629                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3630                                 CMD_ASYNC, false);
3631                 }
3632                 break;
3633         case IEEE80211_AMPDU_TX_OPERATIONAL:
3634                 if (priv->cfg->use_rts_for_aggregation) {
3635                         struct iwl_station_priv *sta_priv =
3636                                 (void *) sta->drv_priv;
3637
3638                         /*
3639                          * switch to RTS/CTS if it is the prefer protection
3640                          * method for HT traffic
3641                          */
3642
3643                         sta_priv->lq_sta.lq.general_params.flags |=
3644                                 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3645                         iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3646                                 CMD_ASYNC, false);
3647                 }
3648                 ret = 0;
3649                 break;
3650         }
3651         mutex_unlock(&priv->mutex);
3652
3653         return ret;
3654 }
3655
3656 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3657                                struct ieee80211_vif *vif,
3658                                enum sta_notify_cmd cmd,
3659                                struct ieee80211_sta *sta)
3660 {
3661         struct iwl_priv *priv = hw->priv;
3662         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3663         int sta_id;
3664
3665         switch (cmd) {
3666         case STA_NOTIFY_SLEEP:
3667                 WARN_ON(!sta_priv->client);
3668                 sta_priv->asleep = true;
3669                 if (atomic_read(&sta_priv->pending_frames) > 0)
3670                         ieee80211_sta_block_awake(hw, sta, true);
3671                 break;
3672         case STA_NOTIFY_AWAKE:
3673                 WARN_ON(!sta_priv->client);
3674                 if (!sta_priv->asleep)
3675                         break;
3676                 sta_priv->asleep = false;
3677                 sta_id = iwl_sta_id(sta);
3678                 if (sta_id != IWL_INVALID_STATION)
3679                         iwl_sta_modify_ps_wake(priv, sta_id);
3680                 break;
3681         default:
3682                 break;
3683         }
3684 }
3685
3686 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3687                               struct ieee80211_vif *vif,
3688                               struct ieee80211_sta *sta)
3689 {
3690         struct iwl_priv *priv = hw->priv;
3691         struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3692         bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3693         int ret;
3694         u8 sta_id;
3695
3696         IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3697                         sta->addr);
3698         mutex_lock(&priv->mutex);
3699         IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3700                         sta->addr);
3701         sta_priv->common.sta_id = IWL_INVALID_STATION;
3702
3703         atomic_set(&sta_priv->pending_frames, 0);
3704         if (vif->type == NL80211_IFTYPE_AP)
3705                 sta_priv->client = true;
3706
3707         ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
3708                                      &sta_id);
3709         if (ret) {
3710                 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3711                         sta->addr, ret);
3712                 /* Should we return success if return code is EEXIST ? */
3713                 mutex_unlock(&priv->mutex);
3714                 return ret;
3715         }
3716
3717         sta_priv->common.sta_id = sta_id;
3718
3719         /* Initialize rate scaling */
3720         IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3721                        sta->addr);
3722         iwl_rs_rate_init(priv, sta, sta_id);
3723         mutex_unlock(&priv->mutex);
3724
3725         return 0;
3726 }
3727
3728 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3729                                    struct ieee80211_channel_switch *ch_switch)
3730 {
3731         struct iwl_priv *priv = hw->priv;
3732         const struct iwl_channel_info *ch_info;
3733         struct ieee80211_conf *conf = &hw->conf;
3734         struct ieee80211_channel *channel = ch_switch->channel;
3735         struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3736         u16 ch;
3737         unsigned long flags = 0;
3738
3739         IWL_DEBUG_MAC80211(priv, "enter\n");
3740
3741         if (iwl_is_rfkill(priv))
3742                 goto out_exit;
3743
3744         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3745             test_bit(STATUS_SCANNING, &priv->status))
3746                 goto out_exit;
3747
3748         if (!iwl_is_associated(priv))
3749                 goto out_exit;
3750
3751         /* channel switch in progress */
3752         if (priv->switch_rxon.switch_in_progress == true)
3753                 goto out_exit;
3754
3755         mutex_lock(&priv->mutex);
3756         if (priv->cfg->ops->lib->set_channel_switch) {
3757
3758                 ch = channel->hw_value;
3759                 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3760                         ch_info = iwl_get_channel_info(priv,
3761                                                        channel->band,
3762                                                        ch);
3763                         if (!is_channel_valid(ch_info)) {
3764                                 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3765                                 goto out;
3766                         }
3767                         spin_lock_irqsave(&priv->lock, flags);
3768
3769                         priv->current_ht_config.smps = conf->smps_mode;
3770
3771                         /* Configure HT40 channels */
3772                         ht_conf->is_ht = conf_is_ht(conf);
3773                         if (ht_conf->is_ht) {
3774                                 if (conf_is_ht40_minus(conf)) {
3775                                         ht_conf->extension_chan_offset =
3776                                                 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3777                                         ht_conf->is_40mhz = true;
3778                                 } else if (conf_is_ht40_plus(conf)) {
3779                                         ht_conf->extension_chan_offset =
3780                                                 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3781                                         ht_conf->is_40mhz = true;
3782                                 } else {
3783                                         ht_conf->extension_chan_offset =
3784                                                 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3785                                         ht_conf->is_40mhz = false;
3786                                 }
3787                         } else
3788                                 ht_conf->is_40mhz = false;
3789
3790                         if (le16_to_cpu(priv->staging_rxon.channel) != ch)
3791                                 priv->staging_rxon.flags = 0;
3792
3793                         iwl_set_rxon_channel(priv, channel);
3794                         iwl_set_rxon_ht(priv, ht_conf);
3795                         iwl_set_flags_for_band(priv, channel->band,
3796                                                priv->vif);
3797                         spin_unlock_irqrestore(&priv->lock, flags);
3798
3799                         iwl_set_rate(priv);
3800                         /*
3801                          * at this point, staging_rxon has the
3802                          * configuration for channel switch
3803                          */
3804                         if (priv->cfg->ops->lib->set_channel_switch(priv,
3805                                                                     ch_switch))
3806                                 priv->switch_rxon.switch_in_progress = false;
3807                 }
3808         }
3809 out:
3810         mutex_unlock(&priv->mutex);
3811 out_exit:
3812         if (!priv->switch_rxon.switch_in_progress)
3813                 ieee80211_chswitch_done(priv->vif, false);
3814         IWL_DEBUG_MAC80211(priv, "leave\n");
3815 }
3816
3817 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3818                                     unsigned int changed_flags,
3819                                     unsigned int *total_flags,
3820                                     u64 multicast)
3821 {
3822         struct iwl_priv *priv = hw->priv;
3823         __le32 filter_or = 0, filter_nand = 0;
3824
3825 #define CHK(test, flag) do { \
3826         if (*total_flags & (test))              \
3827                 filter_or |= (flag);            \
3828         else                                    \
3829                 filter_nand |= (flag);          \
3830         } while (0)
3831
3832         IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3833                         changed_flags, *total_flags);
3834
3835         CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3836         CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3837         CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3838
3839 #undef CHK
3840
3841         mutex_lock(&priv->mutex);
3842
3843         priv->staging_rxon.filter_flags &= ~filter_nand;
3844         priv->staging_rxon.filter_flags |= filter_or;
3845
3846         iwlcore_commit_rxon(priv);
3847
3848         mutex_unlock(&priv->mutex);
3849
3850         /*
3851          * Receiving all multicast frames is always enabled by the
3852          * default flags setup in iwl_connection_init_rx_config()
3853          * since we currently do not support programming multicast
3854          * filters into the device.
3855          */
3856         *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3857                         FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3858 }
3859
3860 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3861 {
3862         struct iwl_priv *priv = hw->priv;
3863
3864         mutex_lock(&priv->mutex);
3865         IWL_DEBUG_MAC80211(priv, "enter\n");
3866
3867         /* do not support "flush" */
3868         if (!priv->cfg->ops->lib->txfifo_flush)
3869                 goto done;
3870
3871         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3872                 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3873                 goto done;
3874         }
3875         if (iwl_is_rfkill(priv)) {
3876                 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3877                 goto done;
3878         }
3879
3880         /*
3881          * mac80211 will not push any more frames for transmit
3882          * until the flush is completed
3883          */
3884         if (drop) {
3885                 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3886                 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3887                         IWL_ERR(priv, "flush request fail\n");
3888                         goto done;
3889                 }
3890         }
3891         IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3892         iwlagn_wait_tx_queue_empty(priv);
3893 done:
3894         mutex_unlock(&priv->mutex);
3895         IWL_DEBUG_MAC80211(priv, "leave\n");
3896 }
3897
3898 /*****************************************************************************
3899  *
3900  * driver setup and teardown
3901  *
3902  *****************************************************************************/
3903
3904 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3905 {
3906         priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3907
3908         init_waitqueue_head(&priv->wait_command_queue);
3909
3910         INIT_WORK(&priv->restart, iwl_bg_restart);
3911         INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3912         INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3913         INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3914         INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3915         INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3916         INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3917         INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3918         INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3919
3920         iwl_setup_scan_deferred_work(priv);
3921
3922         if (priv->cfg->ops->lib->setup_deferred_work)
3923                 priv->cfg->ops->lib->setup_deferred_work(priv);
3924
3925         init_timer(&priv->statistics_periodic);
3926         priv->statistics_periodic.data = (unsigned long)priv;
3927         priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3928
3929         init_timer(&priv->ucode_trace);
3930         priv->ucode_trace.data = (unsigned long)priv;
3931         priv->ucode_trace.function = iwl_bg_ucode_trace;
3932
3933         if (priv->cfg->ops->lib->recover_from_tx_stall) {
3934                 init_timer(&priv->monitor_recover);
3935                 priv->monitor_recover.data = (unsigned long)priv;
3936                 priv->monitor_recover.function =
3937                         priv->cfg->ops->lib->recover_from_tx_stall;
3938         }
3939
3940         if (!priv->cfg->use_isr_legacy)
3941                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3942                         iwl_irq_tasklet, (unsigned long)priv);
3943         else
3944                 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3945                         iwl_irq_tasklet_legacy, (unsigned long)priv);
3946 }
3947
3948 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3949 {
3950         if (priv->cfg->ops->lib->cancel_deferred_work)
3951                 priv->cfg->ops->lib->cancel_deferred_work(priv);
3952
3953         cancel_delayed_work_sync(&priv->init_alive_start);
3954         cancel_delayed_work(&priv->scan_check);
3955         cancel_work_sync(&priv->start_internal_scan);
3956         cancel_delayed_work(&priv->alive_start);
3957         cancel_work_sync(&priv->run_time_calib_work);
3958         cancel_work_sync(&priv->beacon_update);
3959         cancel_work_sync(&priv->bt_full_concurrency);
3960         cancel_work_sync(&priv->bt_runtime_config);
3961         del_timer_sync(&priv->statistics_periodic);
3962         del_timer_sync(&priv->ucode_trace);
3963 }
3964
3965 static void iwl_init_hw_rates(struct iwl_priv *priv,
3966                               struct ieee80211_rate *rates)
3967 {
3968         int i;
3969
3970         for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3971                 rates[i].bitrate = iwl_rates[i].ieee * 5;
3972                 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3973                 rates[i].hw_value_short = i;
3974                 rates[i].flags = 0;
3975                 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3976                         /*
3977                          * If CCK != 1M then set short preamble rate flag.
3978                          */
3979                         rates[i].flags |=
3980                                 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3981                                         0 : IEEE80211_RATE_SHORT_PREAMBLE;
3982                 }
3983         }
3984 }
3985
3986 static int iwl_init_drv(struct iwl_priv *priv)
3987 {
3988         int ret;
3989
3990         priv->ibss_beacon = NULL;
3991
3992         spin_lock_init(&priv->sta_lock);
3993         spin_lock_init(&priv->hcmd_lock);
3994
3995         INIT_LIST_HEAD(&priv->free_frames);
3996
3997         mutex_init(&priv->mutex);
3998         mutex_init(&priv->sync_cmd_mutex);
3999
4000         priv->ieee_channels = NULL;
4001         priv->ieee_rates = NULL;
4002         priv->band = IEEE80211_BAND_2GHZ;
4003
4004         priv->iw_mode = NL80211_IFTYPE_STATION;
4005         priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
4006         priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
4007         priv->_agn.agg_tids_count = 0;
4008
4009         /* initialize force reset */
4010         priv->force_reset[IWL_RF_RESET].reset_duration =
4011                 IWL_DELAY_NEXT_FORCE_RF_RESET;
4012         priv->force_reset[IWL_FW_RESET].reset_duration =
4013                 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
4014
4015         /* Choose which receivers/antennas to use */
4016         if (priv->cfg->ops->hcmd->set_rxon_chain)
4017                 priv->cfg->ops->hcmd->set_rxon_chain(priv);
4018
4019         iwl_init_scan_params(priv);
4020
4021         /* init bt coex */
4022         if (priv->cfg->advanced_bt_coexist) {
4023                 priv->kill_ack_mask = IWL6000G2B_BT_KILL_ACK_MASK_DEFAULT;
4024                 priv->kill_cts_mask = IWL6000G2B_BT_KILL_CTS_MASK_DEFAULT;
4025                 priv->bt_valid = IWL6000G2B_BT_ALL_VALID_MSK;
4026                 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
4027                 priv->bt_duration = BT_DURATION_LIMIT_DEF;
4028                 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
4029                 priv->dynamic_agg_thresh = BT_AGG_THRESHOLD_DEF;
4030         }
4031
4032         /* Set the tx_power_user_lmt to the lowest power level
4033          * this value will get overwritten by channel max power avg
4034          * from eeprom */
4035         priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
4036
4037         ret = iwl_init_channel_map(priv);
4038         if (ret) {
4039                 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4040                 goto err;
4041         }
4042
4043         ret = iwlcore_init_geos(priv);
4044         if (ret) {
4045                 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4046                 goto err_free_channel_map;
4047         }
4048         iwl_init_hw_rates(priv, priv->ieee_rates);
4049
4050         return 0;
4051
4052 err_free_channel_map:
4053         iwl_free_channel_map(priv);
4054 err:
4055         return ret;
4056 }
4057
4058 static void iwl_uninit_drv(struct iwl_priv *priv)
4059 {
4060         iwl_calib_free_results(priv);
4061         iwlcore_free_geos(priv);
4062         iwl_free_channel_map(priv);
4063         kfree(priv->scan_cmd);
4064 }
4065
4066 static struct ieee80211_ops iwl_hw_ops = {
4067         .tx = iwl_mac_tx,
4068         .start = iwl_mac_start,
4069         .stop = iwl_mac_stop,
4070         .add_interface = iwl_mac_add_interface,
4071         .remove_interface = iwl_mac_remove_interface,
4072         .config = iwl_mac_config,
4073         .configure_filter = iwlagn_configure_filter,
4074         .set_key = iwl_mac_set_key,
4075         .update_tkip_key = iwl_mac_update_tkip_key,
4076         .conf_tx = iwl_mac_conf_tx,
4077         .reset_tsf = iwl_mac_reset_tsf,
4078         .bss_info_changed = iwl_bss_info_changed,
4079         .ampdu_action = iwl_mac_ampdu_action,
4080         .hw_scan = iwl_mac_hw_scan,
4081         .sta_notify = iwl_mac_sta_notify,
4082         .sta_add = iwlagn_mac_sta_add,
4083         .sta_remove = iwl_mac_sta_remove,
4084         .channel_switch = iwl_mac_channel_switch,
4085         .flush = iwl_mac_flush,
4086         .tx_last_beacon = iwl_mac_tx_last_beacon,
4087 };
4088
4089 static void iwl_hw_detect(struct iwl_priv *priv)
4090 {
4091         priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
4092         priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
4093         pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
4094         IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
4095 }
4096
4097 static int iwl_set_hw_params(struct iwl_priv *priv)
4098 {
4099         priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
4100         priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
4101         if (priv->cfg->mod_params->amsdu_size_8K)
4102                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
4103         else
4104                 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
4105
4106         priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
4107
4108         if (priv->cfg->mod_params->disable_11n)
4109                 priv->cfg->sku &= ~IWL_SKU_N;
4110
4111         /* Device-specific setup */
4112         return priv->cfg->ops->lib->set_hw_params(priv);
4113 }
4114
4115 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4116 {
4117         int err = 0;
4118         struct iwl_priv *priv;
4119         struct ieee80211_hw *hw;
4120         struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
4121         unsigned long flags;
4122         u16 pci_cmd, num_mac;
4123
4124         /************************
4125          * 1. Allocating HW data
4126          ************************/
4127
4128         /* Disabling hardware scan means that mac80211 will perform scans
4129          * "the hard way", rather than using device's scan. */
4130         if (cfg->mod_params->disable_hw_scan) {
4131                 if (iwl_debug_level & IWL_DL_INFO)
4132                         dev_printk(KERN_DEBUG, &(pdev->dev),
4133                                    "Disabling hw_scan\n");
4134                 iwl_hw_ops.hw_scan = NULL;
4135         }
4136
4137         hw = iwl_alloc_all(cfg, &iwl_hw_ops);
4138         if (!hw) {
4139                 err = -ENOMEM;
4140                 goto out;
4141         }
4142         priv = hw->priv;
4143         /* At this point both hw and priv are allocated. */
4144
4145         SET_IEEE80211_DEV(hw, &pdev->dev);
4146
4147         IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4148         priv->cfg = cfg;
4149         priv->pci_dev = pdev;
4150         priv->inta_mask = CSR_INI_SET_MASK;
4151
4152         /* is antenna coupling more than 35dB ? */
4153         priv->bt_ant_couple_ok =
4154                 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
4155                 true : false;
4156
4157         /* enable/disable bt channel announcement */
4158         priv->bt_ch_announce = iwlagn_bt_ch_announce;
4159
4160         if (iwl_alloc_traffic_mem(priv))
4161                 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4162
4163         /**************************
4164          * 2. Initializing PCI bus
4165          **************************/
4166         pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4167                                 PCIE_LINK_STATE_CLKPM);
4168
4169         if (pci_enable_device(pdev)) {
4170                 err = -ENODEV;
4171                 goto out_ieee80211_free_hw;
4172         }
4173
4174         pci_set_master(pdev);
4175
4176         err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4177         if (!err)
4178                 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4179         if (err) {
4180                 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4181                 if (!err)
4182                         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4183                 /* both attempts failed: */
4184                 if (err) {
4185                         IWL_WARN(priv, "No suitable DMA available.\n");
4186                         goto out_pci_disable_device;
4187                 }
4188         }
4189
4190         err = pci_request_regions(pdev, DRV_NAME);
4191         if (err)
4192                 goto out_pci_disable_device;
4193
4194         pci_set_drvdata(pdev, priv);
4195
4196
4197         /***********************
4198          * 3. Read REV register
4199          ***********************/
4200         priv->hw_base = pci_iomap(pdev, 0, 0);
4201         if (!priv->hw_base) {
4202                 err = -ENODEV;
4203                 goto out_pci_release_regions;
4204         }
4205
4206         IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4207                 (unsigned long long) pci_resource_len(pdev, 0));
4208         IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4209
4210         /* these spin locks will be used in apm_ops.init and EEPROM access
4211          * we should init now
4212          */
4213         spin_lock_init(&priv->reg_lock);
4214         spin_lock_init(&priv->lock);
4215
4216         /*
4217          * stop and reset the on-board processor just in case it is in a
4218          * strange state ... like being left stranded by a primary kernel
4219          * and this is now the kdump kernel trying to start up
4220          */
4221         iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4222
4223         iwl_hw_detect(priv);
4224         IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4225                 priv->cfg->name, priv->hw_rev);
4226
4227         /* We disable the RETRY_TIMEOUT register (0x41) to keep
4228          * PCI Tx retries from interfering with C3 CPU state */
4229         pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4230
4231         iwl_prepare_card_hw(priv);
4232         if (!priv->hw_ready) {
4233                 IWL_WARN(priv, "Failed, HW not ready\n");
4234                 goto out_iounmap;
4235         }
4236
4237         /*****************
4238          * 4. Read EEPROM
4239          *****************/
4240         /* Read the EEPROM */
4241         err = iwl_eeprom_init(priv);
4242         if (err) {
4243                 IWL_ERR(priv, "Unable to init EEPROM\n");
4244                 goto out_iounmap;
4245         }
4246         err = iwl_eeprom_check_version(priv);
4247         if (err)
4248                 goto out_free_eeprom;
4249
4250         /* extract MAC Address */
4251         iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4252         IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4253         priv->hw->wiphy->addresses = priv->addresses;
4254         priv->hw->wiphy->n_addresses = 1;
4255         num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4256         if (num_mac > 1) {
4257                 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4258                        ETH_ALEN);
4259                 priv->addresses[1].addr[5]++;
4260                 priv->hw->wiphy->n_addresses++;
4261         }
4262
4263         /************************
4264          * 5. Setup HW constants
4265          ************************/
4266         if (iwl_set_hw_params(priv)) {
4267                 IWL_ERR(priv, "failed to set hw parameters\n");
4268                 goto out_free_eeprom;
4269         }
4270
4271         /*******************
4272          * 6. Setup priv
4273          *******************/
4274
4275         err = iwl_init_drv(priv);
4276         if (err)
4277                 goto out_free_eeprom;
4278         /* At this point both hw and priv are initialized. */
4279
4280         /********************
4281          * 7. Setup services
4282          ********************/
4283         spin_lock_irqsave(&priv->lock, flags);
4284         iwl_disable_interrupts(priv);
4285         spin_unlock_irqrestore(&priv->lock, flags);
4286
4287         pci_enable_msi(priv->pci_dev);
4288
4289         iwl_alloc_isr_ict(priv);
4290         err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4291                           IRQF_SHARED, DRV_NAME, priv);
4292         if (err) {
4293                 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4294                 goto out_disable_msi;
4295         }
4296
4297         iwl_setup_deferred_work(priv);
4298         iwl_setup_rx_handlers(priv);
4299
4300         /*********************************************
4301          * 8. Enable interrupts and read RFKILL state
4302          *********************************************/
4303
4304         /* enable interrupts if needed: hw bug w/a */
4305         pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4306         if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4307                 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4308                 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4309         }
4310
4311         iwl_enable_interrupts(priv);
4312
4313         /* If platform's RF_KILL switch is NOT set to KILL */
4314         if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4315                 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4316         else
4317                 set_bit(STATUS_RF_KILL_HW, &priv->status);
4318
4319         wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4320                 test_bit(STATUS_RF_KILL_HW, &priv->status));
4321
4322         iwl_power_initialize(priv);
4323         iwl_tt_initialize(priv);
4324
4325         init_completion(&priv->_agn.firmware_loading_complete);
4326
4327         err = iwl_request_firmware(priv, true);
4328         if (err)
4329                 goto out_destroy_workqueue;
4330
4331         return 0;
4332
4333  out_destroy_workqueue:
4334         destroy_workqueue(priv->workqueue);
4335         priv->workqueue = NULL;
4336         free_irq(priv->pci_dev->irq, priv);
4337         iwl_free_isr_ict(priv);
4338  out_disable_msi:
4339         pci_disable_msi(priv->pci_dev);
4340         iwl_uninit_drv(priv);
4341  out_free_eeprom:
4342         iwl_eeprom_free(priv);
4343  out_iounmap:
4344         pci_iounmap(pdev, priv->hw_base);
4345  out_pci_release_regions:
4346         pci_set_drvdata(pdev, NULL);
4347         pci_release_regions(pdev);
4348  out_pci_disable_device:
4349         pci_disable_device(pdev);
4350  out_ieee80211_free_hw:
4351         iwl_free_traffic_mem(priv);
4352         ieee80211_free_hw(priv->hw);
4353  out:
4354         return err;
4355 }
4356
4357 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4358 {
4359         struct iwl_priv *priv = pci_get_drvdata(pdev);
4360         unsigned long flags;
4361
4362         if (!priv)
4363                 return;
4364
4365         wait_for_completion(&priv->_agn.firmware_loading_complete);
4366
4367         IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4368
4369         iwl_dbgfs_unregister(priv);
4370         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4371
4372         /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4373          * to be called and iwl_down since we are removing the device
4374          * we need to set STATUS_EXIT_PENDING bit.
4375          */
4376         set_bit(STATUS_EXIT_PENDING, &priv->status);
4377         if (priv->mac80211_registered) {
4378                 ieee80211_unregister_hw(priv->hw);
4379                 priv->mac80211_registered = 0;
4380         } else {
4381                 iwl_down(priv);
4382         }
4383
4384         /*
4385          * Make sure device is reset to low power before unloading driver.
4386          * This may be redundant with iwl_down(), but there are paths to
4387          * run iwl_down() without calling apm_ops.stop(), and there are
4388          * paths to avoid running iwl_down() at all before leaving driver.
4389          * This (inexpensive) call *makes sure* device is reset.
4390          */
4391         priv->cfg->ops->lib->apm_ops.stop(priv);
4392
4393         iwl_tt_exit(priv);
4394
4395         /* make sure we flush any pending irq or
4396          * tasklet for the driver
4397          */
4398         spin_lock_irqsave(&priv->lock, flags);
4399         iwl_disable_interrupts(priv);
4400         spin_unlock_irqrestore(&priv->lock, flags);
4401
4402         iwl_synchronize_irq(priv);
4403
4404         iwl_dealloc_ucode_pci(priv);
4405
4406         if (priv->rxq.bd)
4407                 iwlagn_rx_queue_free(priv, &priv->rxq);
4408         iwlagn_hw_txq_ctx_free(priv);
4409
4410         iwl_eeprom_free(priv);
4411
4412
4413         /*netif_stop_queue(dev); */
4414         flush_workqueue(priv->workqueue);
4415
4416         /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4417          * priv->workqueue... so we can't take down the workqueue
4418          * until now... */
4419         destroy_workqueue(priv->workqueue);
4420         priv->workqueue = NULL;
4421         iwl_free_traffic_mem(priv);
4422
4423         free_irq(priv->pci_dev->irq, priv);
4424         pci_disable_msi(priv->pci_dev);
4425         pci_iounmap(pdev, priv->hw_base);
4426         pci_release_regions(pdev);
4427         pci_disable_device(pdev);
4428         pci_set_drvdata(pdev, NULL);
4429
4430         iwl_uninit_drv(priv);
4431
4432         iwl_free_isr_ict(priv);
4433
4434         if (priv->ibss_beacon)
4435                 dev_kfree_skb(priv->ibss_beacon);
4436
4437         ieee80211_free_hw(priv->hw);
4438 }
4439
4440
4441 /*****************************************************************************
4442  *
4443  * driver and module entry point
4444  *
4445  *****************************************************************************/
4446
4447 /* Hardware specific file defines the PCI IDs table for that hardware module */
4448 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4449 #ifdef CONFIG_IWL4965
4450         {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4451         {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4452 #endif /* CONFIG_IWL4965 */
4453 #ifdef CONFIG_IWL5000
4454 /* 5100 Series WiFi */
4455         {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4456         {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4457         {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4458         {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4459         {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4460         {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4461         {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4462         {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4463         {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4464         {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4465         {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4466         {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4467         {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4468         {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4469         {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4470         {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4471         {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4472         {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4473         {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4474         {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4475         {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4476         {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4477         {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4478         {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4479
4480 /* 5300 Series WiFi */
4481         {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4482         {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4483         {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4484         {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4485         {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4486         {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4487         {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4488         {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4489         {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4490         {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4491         {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4492         {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4493
4494 /* 5350 Series WiFi/WiMax */
4495         {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4496         {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4497         {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4498
4499 /* 5150 Series Wifi/WiMax */
4500         {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4501         {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4502         {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4503         {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4504         {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4505         {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4506
4507         {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4508         {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4509         {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4510         {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4511
4512 /* 6x00 Series */
4513         {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4514         {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4515         {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4516         {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4517         {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4518         {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4519         {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4520         {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4521         {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4522         {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4523
4524 /* 6x00 Series Gen2a */
4525         {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4526         {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4527         {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4528         {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4529         {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4530         {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4531         {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4532         {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4533         {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4534         {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4535         {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4536         {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4537         {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4538         {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4539
4540 /* 6x00 Series Gen2b */
4541         {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4542         {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4543         {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4544         {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4545         {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4546         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4547         {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4548         {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4549         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4550         {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4551         {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4552         {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4553         {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4554         {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4555         {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4556         {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4557         {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4558         {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4559         {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4560         {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4561         {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4562         {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4563         {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4564         {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4565         {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4566         {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4567         {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4568         {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4569
4570 /* 6x50 WiFi/WiMax Series */
4571         {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4572         {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4573         {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4574         {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4575         {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4576         {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4577
4578 /* 6x50 WiFi/WiMax Series Gen2 */
4579         {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4580         {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4581         {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4582         {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4583         {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4584         {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4585
4586 /* 1000 Series WiFi */
4587         {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4588         {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4589         {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4590         {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4591         {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4592         {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4593         {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4594         {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4595         {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4596         {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4597         {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4598         {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4599 #endif /* CONFIG_IWL5000 */
4600
4601         {0}
4602 };
4603 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4604
4605 static struct pci_driver iwl_driver = {
4606         .name = DRV_NAME,
4607         .id_table = iwl_hw_card_ids,
4608         .probe = iwl_pci_probe,
4609         .remove = __devexit_p(iwl_pci_remove),
4610 #ifdef CONFIG_PM
4611         .suspend = iwl_pci_suspend,
4612         .resume = iwl_pci_resume,
4613 #endif
4614 };
4615
4616 static int __init iwl_init(void)
4617 {
4618
4619         int ret;
4620         pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4621         pr_info(DRV_COPYRIGHT "\n");
4622
4623         ret = iwlagn_rate_control_register();
4624         if (ret) {
4625                 pr_err("Unable to register rate control algorithm: %d\n", ret);
4626                 return ret;
4627         }
4628
4629         ret = pci_register_driver(&iwl_driver);
4630         if (ret) {
4631                 pr_err("Unable to initialize PCI module\n");
4632                 goto error_register;
4633         }
4634
4635         return ret;
4636
4637 error_register:
4638         iwlagn_rate_control_unregister();
4639         return ret;
4640 }
4641
4642 static void __exit iwl_exit(void)
4643 {
4644         pci_unregister_driver(&iwl_driver);
4645         iwlagn_rate_control_unregister();
4646 }
4647
4648 module_exit(iwl_exit);
4649 module_init(iwl_init);
4650
4651 #ifdef CONFIG_IWLWIFI_DEBUG
4652 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4653 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4654 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4655 MODULE_PARM_DESC(debug, "debug output mask");
4656 #endif
4657
4658 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4659 MODULE_PARM_DESC(swcrypto50,
4660                  "using crypto in software (default 0 [hardware]) (deprecated)");
4661 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4662 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4663 module_param_named(queues_num50,
4664                    iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4665 MODULE_PARM_DESC(queues_num50,
4666                  "number of hw queues in 50xx series (deprecated)");
4667 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4668 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4669 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4670 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4671 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4672 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4673 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4674                    int, S_IRUGO);
4675 MODULE_PARM_DESC(amsdu_size_8K50,
4676                  "enable 8K amsdu size in 50XX series (deprecated)");
4677 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4678                    int, S_IRUGO);
4679 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4680 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4681 MODULE_PARM_DESC(fw_restart50,
4682                  "restart firmware in case of error (deprecated)");
4683 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4684 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4685 module_param_named(
4686         disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4687 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4688
4689 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4690                    S_IRUGO);
4691 MODULE_PARM_DESC(ucode_alternative,
4692                  "specify ucode alternative to use from ucode file");
4693
4694 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4695 MODULE_PARM_DESC(antenna_coupling,
4696                  "specify antenna coupling in dB (defualt: 0 dB)");
4697
4698 module_param_named(bt_ch_announce, iwlagn_bt_ch_announce, bool, S_IRUGO);
4699 MODULE_PARM_DESC(bt_ch_announce,
4700                  "Enable BT channel announcement mode (default: enable)");