drivers/net/wireless/iwlwifi/iwl-eeprom.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22  * USA
  23  *
  24  * The full GNU General Public License is included in this distribution
  25  * in the file called LICENSE.GPL.
  26  *
  27  * Contact Information:
  28  *  Intel Linux Wireless <ilw@linux.intel.com>
  29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30  *
  31  * BSD LICENSE
  32  *
  33  * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.
  34  * All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  *
  40  *  * Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  *  * Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in
  44  *    the documentation and/or other materials provided with the
  45  *    distribution.
  46  *  * Neither the name Intel Corporation nor the names of its
  47  *    contributors may be used to endorse or promote products derived
  48  *    from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  *****************************************************************************/
  62
  63
  64 #include <linux/kernel.h>
  65 #include <linux/module.h>
  66 #include <linux/slab.h>
  67 #include <linux/init.h>
  68
  69 #include <net/mac80211.h>
  70
  71 #include "iwl-commands.h"
  72 #include "iwl-dev.h"
  73 #include "iwl-core.h"
  74 #include "iwl-debug.h"
  75 #include "iwl-agn.h"
  76 #include "iwl-eeprom.h"
  77 #include "iwl-io.h"
  78
  79 /************************** EEPROM BANDS ****************************
  80  *
  81  * The iwl_eeprom_band definitions below provide the mapping from the
  82  * EEPROM contents to the specific channel number supported for each
  83  * band.
  84  *
  85  * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  86  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  87  * The specific geography and calibration information for that channel
  88  * is contained in the eeprom map itself.
  89  *
  90  * During init, we copy the eeprom information and channel map
  91  * information into priv->channel_info_24/52 and priv->channel_map_24/52
  92  *
  93  * channel_map_24/52 provides the index in the channel_info array for a
  94  * given channel.  We have to have two separate maps as there is channel
  95  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  96  * band_2
  97  *
  98  * A value of 0xff stored in the channel_map indicates that the channel
  99  * is not supported by the hardware at all.
 100  *
 101  * A value of 0xfe in the channel_map indicates that the channel is not
 102  * valid for Tx with the current hardware.  This means that
 103  * while the system can tune and receive on a given channel, it may not
 104  * be able to associate or transmit any frames on that
 105  * channel.  There is no corresponding channel information for that
 106  * entry.
 107  *
 108  *********************************************************************/
 109
 110 /* 2.4 GHz */
 111 const u8 iwl_eeprom_band_1[14] = {
 112         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 113 };
 114
 115 /* 5.2 GHz bands */
 116 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
 117         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
 118 };
 119
 120 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
 121         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 122 };
 123
 124 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
 125         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 126 };
 127
 128 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
 129         145, 149, 153, 157, 161, 165
 130 };
 131
 132 static const u8 iwl_eeprom_band_6[] = {       /* 2.4 ht40 channel */
 133         1, 2, 3, 4, 5, 6, 7
 134 };
 135
 136 static const u8 iwl_eeprom_band_7[] = {       /* 5.2 ht40 channel */
 137         36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
 138 };
 139
 140 /******************************************************************************
 141  *
 142  * generic NVM functions
 143  *
 144 ******************************************************************************/
 145
 146 /*
 147  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 148  * when accessing the EEPROM; each access is a series of pulses to/from the
 149  * EEPROM chip, not a single event, so even reads could conflict if they
 150  * weren't arbitrated by the semaphore.
 151  */
 152
 153 #define EEPROM_SEM_TIMEOUT 10           /* milliseconds */
 154 #define EEPROM_SEM_RETRY_LIMIT 1000     /* number of attempts (not time) */
 155
 156 static int iwl_eeprom_acquire_semaphore(struct iwl_trans *trans)
 157 {
 158         u16 count;
 159         int ret;
 160
 161         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 162                 /* Request semaphore */
 163                 iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
 164                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 165
 166                 /* See if we got it */
 167                 ret = iwl_poll_bit(trans, CSR_HW_IF_CONFIG_REG,
 168                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 169                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 170                                 EEPROM_SEM_TIMEOUT);
 171                 if (ret >= 0) {
 172                         IWL_DEBUG_EEPROM(trans,
 173                                 "Acquired semaphore after %d tries.\n",
 174                                 count+1);
 175                         return ret;
 176                 }
 177         }
 178
 179         return ret;
 180 }
 181
 182 static void iwl_eeprom_release_semaphore(struct iwl_trans *trans)
 183 {
 184         iwl_clear_bit(trans, CSR_HW_IF_CONFIG_REG,
 185                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 186
 187 }
 188
 189 static int iwl_eeprom_verify_signature(struct iwl_trans *trans)
 190 {
 191         u32 gp = iwl_read32(trans, CSR_EEPROM_GP) &
 192                            CSR_EEPROM_GP_VALID_MSK;
 193         int ret = 0;
 194
 195         IWL_DEBUG_EEPROM(trans, "EEPROM signature=0x%08x\n", gp);
 196         switch (gp) {
 197         case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:
 198                 if (trans->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
 199                         IWL_ERR(trans, "EEPROM with bad signature: 0x%08x\n",
 200                                 gp);
 201                         ret = -ENOENT;
 202                 }
 203                 break;
 204         case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
 205         case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
 206                 if (trans->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {
 207                         IWL_ERR(trans, "OTP with bad signature: 0x%08x\n", gp);
 208                         ret = -ENOENT;
 209                 }
 210                 break;
 211         case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP:
 212         default:
 213                 IWL_ERR(trans, "bad EEPROM/OTP signature, type=%s, "
 214                         "EEPROM_GP=0x%08x\n",
 215                         (trans->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 216                         ? "OTP" : "EEPROM", gp);
 217                 ret = -ENOENT;
 218                 break;
 219         }
 220         return ret;
 221 }
 222
 223 u16 iwl_eeprom_query16(const struct iwl_shared *shrd, size_t offset)
 224 {
 225         if (!shrd->eeprom)
 226                 return 0;
 227         return (u16)shrd->eeprom[offset] | ((u16)shrd->eeprom[offset + 1] << 8);
 228 }
 229
 230 int iwl_eeprom_check_version(struct iwl_priv *priv)
 231 {
 232         u16 eeprom_ver;
 233         u16 calib_ver;
 234
 235         eeprom_ver = iwl_eeprom_query16(priv->shrd, EEPROM_VERSION);
 236         calib_ver = iwl_eeprom_calib_version(priv->shrd);
 237
 238         if (eeprom_ver < cfg(priv)->eeprom_ver ||
 239             calib_ver < cfg(priv)->eeprom_calib_ver)
 240                 goto err;
 241
 242         IWL_INFO(priv, "device EEPROM VER=0x%x, CALIB=0x%x\n",
 243                  eeprom_ver, calib_ver);
 244
 245         return 0;
 246 err:
 247         IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x "
 248                   "CALIB=0x%x < 0x%x\n",
 249                   eeprom_ver, cfg(priv)->eeprom_ver,
 250                   calib_ver,  cfg(priv)->eeprom_calib_ver);
 251         return -EINVAL;
 252
 253 }
 254
 255 int iwl_eeprom_init_hw_params(struct iwl_priv *priv)
 256 {
 257         struct iwl_shared *shrd = priv->shrd;
 258         u16 radio_cfg;
 259
 260         hw_params(priv).sku = iwl_eeprom_query16(shrd, EEPROM_SKU_CAP);
 261         if (hw_params(priv).sku & EEPROM_SKU_CAP_11N_ENABLE &&
 262             !cfg(priv)->ht_params) {
 263                 IWL_ERR(priv, "Invalid 11n configuration\n");
 264                 return -EINVAL;
 265         }
 266
 267         if (!hw_params(priv).sku) {
 268                 IWL_ERR(priv, "Invalid device sku\n");
 269                 return -EINVAL;
 270         }
 271
 272         IWL_INFO(priv, "Device SKU: 0x%X\n", hw_params(priv).sku);
 273
 274         radio_cfg = iwl_eeprom_query16(shrd, EEPROM_RADIO_CONFIG);
 275
 276         hw_params(priv).valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
 277         hw_params(priv).valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
 278
 279         /* check overrides (some devices have wrong EEPROM) */
 280         if (cfg(priv)->valid_tx_ant)
 281                 hw_params(priv).valid_tx_ant = cfg(priv)->valid_tx_ant;
 282         if (cfg(priv)->valid_rx_ant)
 283                 hw_params(priv).valid_rx_ant = cfg(priv)->valid_rx_ant;
 284
 285         if (!hw_params(priv).valid_tx_ant || !hw_params(priv).valid_rx_ant) {
 286                 IWL_ERR(priv, "Invalid chain (0x%X, 0x%X)\n",
 287                         hw_params(priv).valid_tx_ant,
 288                         hw_params(priv).valid_rx_ant);
 289                 return -EINVAL;
 290         }
 291
 292         IWL_INFO(priv, "Valid Tx ant: 0x%X, Valid Rx ant: 0x%X\n",
 293                  hw_params(priv).valid_tx_ant, hw_params(priv).valid_rx_ant);
 294
 295         return 0;
 296 }
 297
 298 void iwl_eeprom_get_mac(const struct iwl_shared *shrd, u8 *mac)
 299 {
 300         const u8 *addr = iwl_eeprom_query_addr(shrd,
 301                                         EEPROM_MAC_ADDRESS);
 302         memcpy(mac, addr, ETH_ALEN);
 303 }
 304
 305 /******************************************************************************
 306  *
 307  * OTP related functions
 308  *
 309 ******************************************************************************/
 310
 311 static void iwl_set_otp_access(struct iwl_trans *trans,
 312                                enum iwl_access_mode mode)
 313 {
 314         iwl_read32(trans, CSR_OTP_GP_REG);
 315
 316         if (mode == IWL_OTP_ACCESS_ABSOLUTE)
 317                 iwl_clear_bit(trans, CSR_OTP_GP_REG,
 318                               CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 319         else
 320                 iwl_set_bit(trans, CSR_OTP_GP_REG,
 321                             CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 322 }
 323
 324 static int iwl_get_nvm_type(struct iwl_trans *trans, u32 hw_rev)
 325 {
 326         u32 otpgp;
 327         int nvm_type;
 328
 329         /* OTP only valid for CP/PP and after */
 330         switch (hw_rev & CSR_HW_REV_TYPE_MSK) {
 331         case CSR_HW_REV_TYPE_NONE:
 332                 IWL_ERR(trans, "Unknown hardware type\n");
 333                 return -ENOENT;
 334         case CSR_HW_REV_TYPE_5300:
 335         case CSR_HW_REV_TYPE_5350:
 336         case CSR_HW_REV_TYPE_5100:
 337         case CSR_HW_REV_TYPE_5150:
 338                 nvm_type = NVM_DEVICE_TYPE_EEPROM;
 339                 break;
 340         default:
 341                 otpgp = iwl_read32(trans, CSR_OTP_GP_REG);
 342                 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
 343                         nvm_type = NVM_DEVICE_TYPE_OTP;
 344                 else
 345                         nvm_type = NVM_DEVICE_TYPE_EEPROM;
 346                 break;
 347         }
 348         return  nvm_type;
 349 }
 350
 351 static int iwl_init_otp_access(struct iwl_trans *trans)
 352 {
 353         int ret;
 354
 355         /* Enable 40MHz radio clock */
 356         iwl_write32(trans, CSR_GP_CNTRL,
 357                     iwl_read32(trans, CSR_GP_CNTRL) |
 358                     CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 359
 360         /* wait for clock to be ready */
 361         ret = iwl_poll_bit(trans, CSR_GP_CNTRL,
 362                                  CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 363                                  CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 364                                  25000);
 365         if (ret < 0)
 366                 IWL_ERR(trans, "Time out access OTP\n");
 367         else {
 368                 iwl_set_bits_prph(trans, APMG_PS_CTRL_REG,
 369                                   APMG_PS_CTRL_VAL_RESET_REQ);
 370                 udelay(5);
 371                 iwl_clear_bits_prph(trans, APMG_PS_CTRL_REG,
 372                                     APMG_PS_CTRL_VAL_RESET_REQ);
 373
 374                 /*
 375                  * CSR auto clock gate disable bit -
 376                  * this is only applicable for HW with OTP shadow RAM
 377                  */
 378                 if (cfg(trans)->base_params->shadow_ram_support)
 379                         iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG,
 380                                 CSR_RESET_LINK_PWR_MGMT_DISABLED);
 381         }
 382         return ret;
 383 }
 384
 385 static int iwl_read_otp_word(struct iwl_trans *trans, u16 addr,
 386                              __le16 *eeprom_data)
 387 {
 388         int ret = 0;
 389         u32 r;
 390         u32 otpgp;
 391
 392         iwl_write32(trans, CSR_EEPROM_REG,
 393                     CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 394         ret = iwl_poll_bit(trans, CSR_EEPROM_REG,
 395                                  CSR_EEPROM_REG_READ_VALID_MSK,
 396                                  CSR_EEPROM_REG_READ_VALID_MSK,
 397                                  IWL_EEPROM_ACCESS_TIMEOUT);
 398         if (ret < 0) {
 399                 IWL_ERR(trans, "Time out reading OTP[%d]\n", addr);
 400                 return ret;
 401         }
 402         r = iwl_read32(trans, CSR_EEPROM_REG);
 403         /* check for ECC errors: */
 404         otpgp = iwl_read32(trans, CSR_OTP_GP_REG);
 405         if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
 406                 /* stop in this case */
 407                 /* set the uncorrectable OTP ECC bit for acknowledgement */
 408                 iwl_set_bit(trans, CSR_OTP_GP_REG,
 409                         CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 410                 IWL_ERR(trans, "Uncorrectable OTP ECC error, abort OTP read\n");
 411                 return -EINVAL;
 412         }
 413         if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
 414                 /* continue in this case */
 415                 /* set the correctable OTP ECC bit for acknowledgement */
 416                 iwl_set_bit(trans, CSR_OTP_GP_REG,
 417                                 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
 418                 IWL_ERR(trans, "Correctable OTP ECC error, continue read\n");
 419         }
 420         *eeprom_data = cpu_to_le16(r >> 16);
 421         return 0;
 422 }
 423
 424 /*
 425  * iwl_is_otp_empty: check for empty OTP
 426  */
 427 static bool iwl_is_otp_empty(struct iwl_trans *trans)
 428 {
 429         u16 next_link_addr = 0;
 430         __le16 link_value;
 431         bool is_empty = false;
 432
 433         /* locate the beginning of OTP link list */
 434         if (!iwl_read_otp_word(trans, next_link_addr, &link_value)) {
 435                 if (!link_value) {
 436                         IWL_ERR(trans, "OTP is empty\n");
 437                         is_empty = true;
 438                 }
 439         } else {
 440                 IWL_ERR(trans, "Unable to read first block of OTP list.\n");
 441                 is_empty = true;
 442         }
 443
 444         return is_empty;
 445 }
 446
 447
 448 /*
 449  * iwl_find_otp_image: find EEPROM image in OTP
 450  *   finding the OTP block that contains the EEPROM image.
 451  *   the last valid block on the link list (the block _before_ the last block)
 452  *   is the block we should read and used to configure the device.
 453  *   If all the available OTP blocks are full, the last block will be the block
 454  *   we should read and used to configure the device.
 455  *   only perform this operation if shadow RAM is disabled
 456  */
 457 static int iwl_find_otp_image(struct iwl_trans *trans,
 458                                         u16 *validblockaddr)
 459 {
 460         u16 next_link_addr = 0, valid_addr;
 461         __le16 link_value = 0;
 462         int usedblocks = 0;
 463
 464         /* set addressing mode to absolute to traverse the link list */
 465         iwl_set_otp_access(trans, IWL_OTP_ACCESS_ABSOLUTE);
 466
 467         /* checking for empty OTP or error */
 468         if (iwl_is_otp_empty(trans))
 469                 return -EINVAL;
 470
 471         /*
 472          * start traverse link list
 473          * until reach the max number of OTP blocks
 474          * different devices have different number of OTP blocks
 475          */
 476         do {
 477                 /* save current valid block address
 478                  * check for more block on the link list
 479                  */
 480                 valid_addr = next_link_addr;
 481                 next_link_addr = le16_to_cpu(link_value) * sizeof(u16);
 482                 IWL_DEBUG_EEPROM(trans, "OTP blocks %d addr 0x%x\n",
 483                                usedblocks, next_link_addr);
 484                 if (iwl_read_otp_word(trans, next_link_addr, &link_value))
 485                         return -EINVAL;
 486                 if (!link_value) {
 487                         /*
 488                          * reach the end of link list, return success and
 489                          * set address point to the starting address
 490                          * of the image
 491                          */
 492                         *validblockaddr = valid_addr;
 493                         /* skip first 2 bytes (link list pointer) */
 494                         *validblockaddr += 2;
 495                         return 0;
 496                 }
 497                 /* more in the link list, continue */
 498                 usedblocks++;
 499         } while (usedblocks <= cfg(trans)->base_params->max_ll_items);
 500
 501         /* OTP has no valid blocks */
 502         IWL_DEBUG_EEPROM(trans, "OTP has no valid blocks\n");
 503         return -EINVAL;
 504 }
 505
 506 /******************************************************************************
 507  *
 508  * Tx Power related functions
 509  *
 510 ******************************************************************************/
 511 /**
 512  * iwl_get_max_txpower_avg - get the highest tx power from all chains.
 513  *     find the highest tx power from all chains for the channel
 514  */
 515 static s8 iwl_get_max_txpower_avg(struct iwl_cfg *cfg,
 516                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 517                 int element, s8 *max_txpower_in_half_dbm)
 518 {
 519         s8 max_txpower_avg = 0; /* (dBm) */
 520
 521         /* Take the highest tx power from any valid chains */
 522         if ((cfg->valid_tx_ant & ANT_A) &&
 523             (enhanced_txpower[element].chain_a_max > max_txpower_avg))
 524                 max_txpower_avg = enhanced_txpower[element].chain_a_max;
 525         if ((cfg->valid_tx_ant & ANT_B) &&
 526             (enhanced_txpower[element].chain_b_max > max_txpower_avg))
 527                 max_txpower_avg = enhanced_txpower[element].chain_b_max;
 528         if ((cfg->valid_tx_ant & ANT_C) &&
 529             (enhanced_txpower[element].chain_c_max > max_txpower_avg))
 530                 max_txpower_avg = enhanced_txpower[element].chain_c_max;
 531         if (((cfg->valid_tx_ant == ANT_AB) |
 532             (cfg->valid_tx_ant == ANT_BC) |
 533             (cfg->valid_tx_ant == ANT_AC)) &&
 534             (enhanced_txpower[element].mimo2_max > max_txpower_avg))
 535                 max_txpower_avg =  enhanced_txpower[element].mimo2_max;
 536         if ((cfg->valid_tx_ant == ANT_ABC) &&
 537             (enhanced_txpower[element].mimo3_max > max_txpower_avg))
 538                 max_txpower_avg = enhanced_txpower[element].mimo3_max;
 539
 540         /*
 541          * max. tx power in EEPROM is in 1/2 dBm format
 542          * convert from 1/2 dBm to dBm (round-up convert)
 543          * but we also do not want to loss 1/2 dBm resolution which
 544          * will impact performance
 545          */
 546         *max_txpower_in_half_dbm = max_txpower_avg;
 547         return (max_txpower_avg & 0x01) + (max_txpower_avg >> 1);
 548 }
 549
 550 static void
 551 iwl_eeprom_enh_txp_read_element(struct iwl_priv *priv,
 552                                     struct iwl_eeprom_enhanced_txpwr *txp,
 553                                     s8 max_txpower_avg)
 554 {
 555         int ch_idx;
 556         bool is_ht40 = txp->flags & IWL_EEPROM_ENH_TXP_FL_40MHZ;
 557         enum ieee80211_band band;
 558
 559         band = txp->flags & IWL_EEPROM_ENH_TXP_FL_BAND_52G ?
 560                 IEEE80211_BAND_5GHZ : IEEE80211_BAND_2GHZ;
 561
 562         for (ch_idx = 0; ch_idx < priv->channel_count; ch_idx++) {
 563                 struct iwl_channel_info *ch_info = &priv->channel_info[ch_idx];
 564
 565                 /* update matching channel or from common data only */
 566                 if (txp->channel != 0 && ch_info->channel != txp->channel)
 567                         continue;
 568
 569                 /* update matching band only */
 570                 if (band != ch_info->band)
 571                         continue;
 572
 573                 if (ch_info->max_power_avg < max_txpower_avg && !is_ht40) {
 574                         ch_info->max_power_avg = max_txpower_avg;
 575                         ch_info->curr_txpow = max_txpower_avg;
 576                         ch_info->scan_power = max_txpower_avg;
 577                 }
 578
 579                 if (is_ht40 && ch_info->ht40_max_power_avg < max_txpower_avg)
 580                         ch_info->ht40_max_power_avg = max_txpower_avg;
 581         }
 582 }
 583
 584 #define EEPROM_TXP_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT)
 585 #define EEPROM_TXP_ENTRY_LEN sizeof(struct iwl_eeprom_enhanced_txpwr)
 586 #define EEPROM_TXP_SZ_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT_SIZE)
 587
 588 #define TXP_CHECK_AND_PRINT(x) ((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) \
 589                             ? # x " " : "")
 590
 591 void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
 592 {
 593         struct iwl_shared *shrd = priv->shrd;
 594         struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
 595         int idx, entries;
 596         __le16 *txp_len;
 597         s8 max_txp_avg, max_txp_avg_halfdbm;
 598
 599         BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);
 600
 601         /* the length is in 16-bit words, but we want entries */
 602         txp_len = (__le16 *) iwl_eeprom_query_addr(shrd, EEPROM_TXP_SZ_OFFS);
 603         entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
 604
 605         txp_array = (void *) iwl_eeprom_query_addr(shrd, EEPROM_TXP_OFFS);
 606
 607         for (idx = 0; idx < entries; idx++) {
 608                 txp = &txp_array[idx];
 609                 /* skip invalid entries */
 610                 if (!(txp->flags & IWL_EEPROM_ENH_TXP_FL_VALID))
 611                         continue;
 612
 613                 IWL_DEBUG_EEPROM(priv, "%s %d:\t %s%s%s%s%s%s%s%s (0x%02x)\n",
 614                                  (txp->channel && (txp->flags &
 615                                         IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE)) ?
 616                                         "Common " : (txp->channel) ?
 617                                         "Channel" : "Common",
 618                                  (txp->channel),
 619                                  TXP_CHECK_AND_PRINT(VALID),
 620                                  TXP_CHECK_AND_PRINT(BAND_52G),
 621                                  TXP_CHECK_AND_PRINT(OFDM),
 622                                  TXP_CHECK_AND_PRINT(40MHZ),
 623                                  TXP_CHECK_AND_PRINT(HT_AP),
 624                                  TXP_CHECK_AND_PRINT(RES1),
 625                                  TXP_CHECK_AND_PRINT(RES2),
 626                                  TXP_CHECK_AND_PRINT(COMMON_TYPE),
 627                                  txp->flags);
 628                 IWL_DEBUG_EEPROM(priv, "\t\t chain_A: 0x%02x "
 629                                  "chain_B: 0X%02x chain_C: 0X%02x\n",
 630                                  txp->chain_a_max, txp->chain_b_max,
 631                                  txp->chain_c_max);
 632                 IWL_DEBUG_EEPROM(priv, "\t\t MIMO2: 0x%02x "
 633                                  "MIMO3: 0x%02x High 20_on_40: 0x%02x "
 634                                  "Low 20_on_40: 0x%02x\n",
 635                                  txp->mimo2_max, txp->mimo3_max,
 636                                  ((txp->delta_20_in_40 & 0xf0) >> 4),
 637                                  (txp->delta_20_in_40 & 0x0f));
 638
 639                 max_txp_avg = iwl_get_max_txpower_avg(cfg(priv), txp_array, idx,
 640                                                       &max_txp_avg_halfdbm);
 641
 642                 /*
 643                  * Update the user limit values values to the highest
 644                  * power supported by any channel
 645                  */
 646                 if (max_txp_avg > priv->tx_power_user_lmt)
 647                         priv->tx_power_user_lmt = max_txp_avg;
 648                 if (max_txp_avg_halfdbm > priv->tx_power_lmt_in_half_dbm)
 649                         priv->tx_power_lmt_in_half_dbm = max_txp_avg_halfdbm;
 650
 651                 iwl_eeprom_enh_txp_read_element(priv, txp, max_txp_avg);
 652         }
 653 }
 654
 655 /**
 656  * iwl_eeprom_init - read EEPROM contents
 657  *
 658  * Load the EEPROM contents from adapter into shrd->eeprom
 659  *
 660  * NOTE:  This routine uses the non-debug IO access functions.
 661  */
 662 int iwl_eeprom_init(struct iwl_trans *trans, u32 hw_rev)
 663 {
 664         __le16 *e;
 665         u32 gp = iwl_read32(trans, CSR_EEPROM_GP);
 666         int sz;
 667         int ret;
 668         u16 addr;
 669         u16 validblockaddr = 0;
 670         u16 cache_addr = 0;
 671
 672         trans->nvm_device_type = iwl_get_nvm_type(trans, hw_rev);
 673         if (trans->nvm_device_type == -ENOENT)
 674                 return -ENOENT;
 675         /* allocate eeprom */
 676         sz = cfg(trans)->base_params->eeprom_size;
 677         IWL_DEBUG_EEPROM(trans, "NVM size = %d\n", sz);
 678         trans->shrd->eeprom = kzalloc(sz, GFP_KERNEL);
 679         if (!trans->shrd->eeprom) {
 680                 ret = -ENOMEM;
 681                 goto alloc_err;
 682         }
 683         e = (__le16 *)trans->shrd->eeprom;
 684
 685         ret = iwl_eeprom_verify_signature(trans);
 686         if (ret < 0) {
 687                 IWL_ERR(trans, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 688                 ret = -ENOENT;
 689                 goto err;
 690         }
 691
 692         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
 693         ret = iwl_eeprom_acquire_semaphore(trans);
 694         if (ret < 0) {
 695                 IWL_ERR(trans, "Failed to acquire EEPROM semaphore.\n");
 696                 ret = -ENOENT;
 697                 goto err;
 698         }
 699
 700         if (trans->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
 701
 702                 ret = iwl_init_otp_access(trans);
 703                 if (ret) {
 704                         IWL_ERR(trans, "Failed to initialize OTP access.\n");
 705                         ret = -ENOENT;
 706                         goto done;
 707                 }
 708                 iwl_write32(trans, CSR_EEPROM_GP,
 709                             iwl_read32(trans, CSR_EEPROM_GP) &
 710                             ~CSR_EEPROM_GP_IF_OWNER_MSK);
 711
 712                 iwl_set_bit(trans, CSR_OTP_GP_REG,
 713                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
 714                              CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 715                 /* traversing the linked list if no shadow ram supported */
 716                 if (!cfg(trans)->base_params->shadow_ram_support) {
 717                         if (iwl_find_otp_image(trans, &validblockaddr)) {
 718                                 ret = -ENOENT;
 719                                 goto done;
 720                         }
 721                 }
 722                 for (addr = validblockaddr; addr < validblockaddr + sz;
 723                      addr += sizeof(u16)) {
 724                         __le16 eeprom_data;
 725
 726                         ret = iwl_read_otp_word(trans, addr, &eeprom_data);
 727                         if (ret)
 728                                 goto done;
 729                         e[cache_addr / 2] = eeprom_data;
 730                         cache_addr += sizeof(u16);
 731                 }
 732         } else {
 733                 /* eeprom is an array of 16bit values */
 734                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 735                         u32 r;
 736
 737                         iwl_write32(trans, CSR_EEPROM_REG,
 738                                     CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 739
 740                         ret = iwl_poll_bit(trans, CSR_EEPROM_REG,
 741                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 742                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 743                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 744                         if (ret < 0) {
 745                                 IWL_ERR(trans,
 746                                         "Time out reading EEPROM[%d]\n", addr);
 747                                 goto done;
 748                         }
 749                         r = iwl_read32(trans, CSR_EEPROM_REG);
 750                         e[addr / 2] = cpu_to_le16(r >> 16);
 751                 }
 752         }
 753
 754         IWL_DEBUG_EEPROM(trans, "NVM Type: %s, version: 0x%x\n",
 755                        (trans->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 756                        ? "OTP" : "EEPROM",
 757                        iwl_eeprom_query16(trans->shrd, EEPROM_VERSION));
 758
 759         ret = 0;
 760 done:
 761         iwl_eeprom_release_semaphore(trans);
 762
 763 err:
 764         if (ret)
 765                 iwl_eeprom_free(trans->shrd);
 766 alloc_err:
 767         return ret;
 768 }
 769
 770 void iwl_eeprom_free(struct iwl_shared *shrd)
 771 {
 772         kfree(shrd->eeprom);
 773         shrd->eeprom = NULL;
 774 }
 775
 776 static void iwl_init_band_reference(const struct iwl_priv *priv,
 777                         int eep_band, int *eeprom_ch_count,
 778                         const struct iwl_eeprom_channel **eeprom_ch_info,
 779                         const u8 **eeprom_ch_index)
 780 {
 781         struct iwl_shared *shrd = priv->shrd;
 782         u32 offset = cfg(priv)->lib->
 783                         eeprom_ops.regulatory_bands[eep_band - 1];
 784         switch (eep_band) {
 785         case 1:         /* 2.4GHz band */
 786                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
 787                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 788                                 iwl_eeprom_query_addr(shrd, offset);
 789                 *eeprom_ch_index = iwl_eeprom_band_1;
 790                 break;
 791         case 2:         /* 4.9GHz band */
 792                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
 793                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 794                                 iwl_eeprom_query_addr(shrd, offset);
 795                 *eeprom_ch_index = iwl_eeprom_band_2;
 796                 break;
 797         case 3:         /* 5.2GHz band */
 798                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
 799                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 800                                 iwl_eeprom_query_addr(shrd, offset);
 801                 *eeprom_ch_index = iwl_eeprom_band_3;
 802                 break;
 803         case 4:         /* 5.5GHz band */
 804                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
 805                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 806                                 iwl_eeprom_query_addr(shrd, offset);
 807                 *eeprom_ch_index = iwl_eeprom_band_4;
 808                 break;
 809         case 5:         /* 5.7GHz band */
 810                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
 811                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 812                                 iwl_eeprom_query_addr(shrd, offset);
 813                 *eeprom_ch_index = iwl_eeprom_band_5;
 814                 break;
 815         case 6:         /* 2.4GHz ht40 channels */
 816                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
 817                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 818                                 iwl_eeprom_query_addr(shrd, offset);
 819                 *eeprom_ch_index = iwl_eeprom_band_6;
 820                 break;
 821         case 7:         /* 5 GHz ht40 channels */
 822                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
 823                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 824                                 iwl_eeprom_query_addr(shrd, offset);
 825                 *eeprom_ch_index = iwl_eeprom_band_7;
 826                 break;
 827         default:
 828                 BUG();
 829                 return;
 830         }
 831 }
 832
 833 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
 834                             ? # x " " : "")
 835 /**
 836  * iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
 837  *
 838  * Does not set up a command, or touch hardware.
 839  */
 840 static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
 841                               enum ieee80211_band band, u16 channel,
 842                               const struct iwl_eeprom_channel *eeprom_ch,
 843                               u8 clear_ht40_extension_channel)
 844 {
 845         struct iwl_channel_info *ch_info;
 846
 847         ch_info = (struct iwl_channel_info *)
 848                         iwl_get_channel_info(priv, band, channel);
 849
 850         if (!is_channel_valid(ch_info))
 851                 return -1;
 852
 853         IWL_DEBUG_EEPROM(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
 854                         " Ad-Hoc %ssupported\n",
 855                         ch_info->channel,
 856                         is_channel_a_band(ch_info) ?
 857                         "5.2" : "2.4",
 858                         CHECK_AND_PRINT(IBSS),
 859                         CHECK_AND_PRINT(ACTIVE),
 860                         CHECK_AND_PRINT(RADAR),
 861                         CHECK_AND_PRINT(WIDE),
 862                         CHECK_AND_PRINT(DFS),
 863                         eeprom_ch->flags,
 864                         eeprom_ch->max_power_avg,
 865                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
 866                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
 867                         "" : "not ");
 868
 869         ch_info->ht40_eeprom = *eeprom_ch;
 870         ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
 871         ch_info->ht40_flags = eeprom_ch->flags;
 872         if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
 873                 ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
 874
 875         return 0;
 876 }
 877
 878 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
 879                             ? # x " " : "")
 880
 881 /**
 882  * iwl_init_channel_map - Set up driver's info for all possible channels
 883  */
 884 int iwl_init_channel_map(struct iwl_priv *priv)
 885 {
 886         int eeprom_ch_count = 0;
 887         const u8 *eeprom_ch_index = NULL;
 888         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
 889         int band, ch;
 890         struct iwl_channel_info *ch_info;
 891
 892         if (priv->channel_count) {
 893                 IWL_DEBUG_EEPROM(priv, "Channel map already initialized.\n");
 894                 return 0;
 895         }
 896
 897         IWL_DEBUG_EEPROM(priv, "Initializing regulatory info from EEPROM\n");
 898
 899         priv->channel_count =
 900             ARRAY_SIZE(iwl_eeprom_band_1) +
 901             ARRAY_SIZE(iwl_eeprom_band_2) +
 902             ARRAY_SIZE(iwl_eeprom_band_3) +
 903             ARRAY_SIZE(iwl_eeprom_band_4) +
 904             ARRAY_SIZE(iwl_eeprom_band_5);
 905
 906         IWL_DEBUG_EEPROM(priv, "Parsing data for %d channels.\n",
 907                         priv->channel_count);
 908
 909         priv->channel_info = kcalloc(priv->channel_count,
 910                                      sizeof(struct iwl_channel_info),
 911                                      GFP_KERNEL);
 912         if (!priv->channel_info) {
 913                 IWL_ERR(priv, "Could not allocate channel_info\n");
 914                 priv->channel_count = 0;
 915                 return -ENOMEM;
 916         }
 917
 918         ch_info = priv->channel_info;
 919
 920         /* Loop through the 5 EEPROM bands adding them in order to the
 921          * channel map we maintain (that contains additional information than
 922          * what just in the EEPROM) */
 923         for (band = 1; band <= 5; band++) {
 924
 925                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 926                                         &eeprom_ch_info, &eeprom_ch_index);
 927
 928                 /* Loop through each band adding each of the channels */
 929                 for (ch = 0; ch < eeprom_ch_count; ch++) {
 930                         ch_info->channel = eeprom_ch_index[ch];
 931                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
 932                             IEEE80211_BAND_5GHZ;
 933
 934                         /* permanently store EEPROM's channel regulatory flags
 935                          *   and max power in channel info database. */
 936                         ch_info->eeprom = eeprom_ch_info[ch];
 937
 938                         /* Copy the run-time flags so they are there even on
 939                          * invalid channels */
 940                         ch_info->flags = eeprom_ch_info[ch].flags;
 941                         /* First write that ht40 is not enabled, and then enable
 942                          * one by one */
 943                         ch_info->ht40_extension_channel =
 944                                         IEEE80211_CHAN_NO_HT40;
 945
 946                         if (!(is_channel_valid(ch_info))) {
 947                                 IWL_DEBUG_EEPROM(priv,
 948                                                "Ch. %d Flags %x [%sGHz] - "
 949                                                "No traffic\n",
 950                                                ch_info->channel,
 951                                                ch_info->flags,
 952                                                is_channel_a_band(ch_info) ?
 953                                                "5.2" : "2.4");
 954                                 ch_info++;
 955                                 continue;
 956                         }
 957
 958                         /* Initialize regulatory-based run-time data */
 959                         ch_info->max_power_avg = ch_info->curr_txpow =
 960                             eeprom_ch_info[ch].max_power_avg;
 961                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
 962                         ch_info->min_power = 0;
 963
 964                         IWL_DEBUG_EEPROM(priv, "Ch. %d [%sGHz] "
 965                                        "%s%s%s%s%s%s(0x%02x %ddBm):"
 966                                        " Ad-Hoc %ssupported\n",
 967                                        ch_info->channel,
 968                                        is_channel_a_band(ch_info) ?
 969                                        "5.2" : "2.4",
 970                                        CHECK_AND_PRINT_I(VALID),
 971                                        CHECK_AND_PRINT_I(IBSS),
 972                                        CHECK_AND_PRINT_I(ACTIVE),
 973                                        CHECK_AND_PRINT_I(RADAR),
 974                                        CHECK_AND_PRINT_I(WIDE),
 975                                        CHECK_AND_PRINT_I(DFS),
 976                                        eeprom_ch_info[ch].flags,
 977                                        eeprom_ch_info[ch].max_power_avg,
 978                                        ((eeprom_ch_info[ch].
 979                                          flags & EEPROM_CHANNEL_IBSS)
 980                                         && !(eeprom_ch_info[ch].
 981                                              flags & EEPROM_CHANNEL_RADAR))
 982                                        ? "" : "not ");
 983
 984                         ch_info++;
 985                 }
 986         }
 987
 988         /* Check if we do have HT40 channels */
 989         if (cfg(priv)->lib->eeprom_ops.regulatory_bands[5] ==
 990             EEPROM_REGULATORY_BAND_NO_HT40 &&
 991             cfg(priv)->lib->eeprom_ops.regulatory_bands[6] ==
 992             EEPROM_REGULATORY_BAND_NO_HT40)
 993                 return 0;
 994
 995         /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
 996         for (band = 6; band <= 7; band++) {
 997                 enum ieee80211_band ieeeband;
 998
 999                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
1000                                         &eeprom_ch_info, &eeprom_ch_index);
1001
1002                 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
1003                 ieeeband =
1004                         (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1005
1006                 /* Loop through each band adding each of the channels */
1007                 for (ch = 0; ch < eeprom_ch_count; ch++) {
1008                         /* Set up driver's info for lower half */
1009                         iwl_mod_ht40_chan_info(priv, ieeeband,
1010                                                 eeprom_ch_index[ch],
1011                                                 &eeprom_ch_info[ch],
1012                                                 IEEE80211_CHAN_NO_HT40PLUS);
1013
1014                         /* Set up driver's info for upper half */
1015                         iwl_mod_ht40_chan_info(priv, ieeeband,
1016                                                 eeprom_ch_index[ch] + 4,
1017                                                 &eeprom_ch_info[ch],
1018                                                 IEEE80211_CHAN_NO_HT40MINUS);
1019                 }
1020         }
1021
1022         /* for newer device (6000 series and up)
1023          * EEPROM contain enhanced tx power information
1024          * driver need to process addition information
1025          * to determine the max channel tx power limits
1026          */
1027         if (cfg(priv)->lib->eeprom_ops.update_enhanced_txpower)
1028                 cfg(priv)->lib->eeprom_ops.update_enhanced_txpower(priv);
1029
1030         return 0;
1031 }
1032
1033 /*
1034  * iwl_free_channel_map - undo allocations in iwl_init_channel_map
1035  */
1036 void iwl_free_channel_map(struct iwl_priv *priv)
1037 {
1038         kfree(priv->channel_info);
1039         priv->channel_count = 0;
1040 }
1041
1042 /**
1043  * iwl_get_channel_info - Find driver's private channel info
1044  *
1045  * Based on band and channel number.
1046  */
1047 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
1048                                         enum ieee80211_band band, u16 channel)
1049 {
1050         int i;
1051
1052         switch (band) {
1053         case IEEE80211_BAND_5GHZ:
1054                 for (i = 14; i < priv->channel_count; i++) {
1055                         if (priv->channel_info[i].channel == channel)
1056                                 return &priv->channel_info[i];
1057                 }
1058                 break;
1059         case IEEE80211_BAND_2GHZ:
1060                 if (channel >= 1 && channel <= 14)
1061                         return &priv->channel_info[channel - 1];
1062                 break;
1063         default:
1064                 BUG();
1065         }
1066
1067         return NULL;
1068 }
1069
1070 void iwl_rf_config(struct iwl_priv *priv)
1071 {
1072         u16 radio_cfg;
1073
1074         radio_cfg = iwl_eeprom_query16(priv->shrd, EEPROM_RADIO_CONFIG);
1075
1076         /* write radio config values to register */
1077         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX) {
1078                 iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,
1079                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
1080                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
1081                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
1082                 IWL_INFO(priv, "Radio type=0x%x-0x%x-0x%x\n",
1083                          EEPROM_RF_CFG_TYPE_MSK(radio_cfg),
1084                          EEPROM_RF_CFG_STEP_MSK(radio_cfg),
1085                          EEPROM_RF_CFG_DASH_MSK(radio_cfg));
1086         } else
1087                 WARN_ON(1);
1088
1089         /* set CSR_HW_CONFIG_REG for uCode use */
1090         iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,
1091                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
1092                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
1093 }