drivers/net/wireless/iwlwifi/iwl-eeprom.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2012 Intel Corporation. All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22  * USA
  23  *
  24  * The full GNU General Public License is included in this distribution
  25  * in the file called LICENSE.GPL.
  26  *
  27  * Contact Information:
  28  *  Intel Linux Wireless <ilw@linux.intel.com>
  29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30  *
  31  * BSD LICENSE
  32  *
  33  * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.
  34  * All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  *
  40  *  * Redistributions of source code must retain the above copyright
  41  *    notice, this list of conditions and the following disclaimer.
  42  *  * Redistributions in binary form must reproduce the above copyright
  43  *    notice, this list of conditions and the following disclaimer in
  44  *    the documentation and/or other materials provided with the
  45  *    distribution.
  46  *  * Neither the name Intel Corporation nor the names of its
  47  *    contributors may be used to endorse or promote products derived
  48  *    from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61  *****************************************************************************/
  62
  63
  64 #include <linux/kernel.h>
  65 #include <linux/module.h>
  66 #include <linux/slab.h>
  67 #include <linux/init.h>
  68
  69 #include <net/mac80211.h>
  70
  71 #include "iwl-commands.h"
  72 #include "iwl-dev.h"
  73 #include "iwl-core.h"
  74 #include "iwl-debug.h"
  75 #include "iwl-agn.h"
  76 #include "iwl-eeprom.h"
  77 #include "iwl-io.h"
  78
  79 /************************** EEPROM BANDS ****************************
  80  *
  81  * The iwl_eeprom_band definitions below provide the mapping from the
  82  * EEPROM contents to the specific channel number supported for each
  83  * band.
  84  *
  85  * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  86  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  87  * The specific geography and calibration information for that channel
  88  * is contained in the eeprom map itself.
  89  *
  90  * During init, we copy the eeprom information and channel map
  91  * information into priv->channel_info_24/52 and priv->channel_map_24/52
  92  *
  93  * channel_map_24/52 provides the index in the channel_info array for a
  94  * given channel.  We have to have two separate maps as there is channel
  95  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  96  * band_2
  97  *
  98  * A value of 0xff stored in the channel_map indicates that the channel
  99  * is not supported by the hardware at all.
 100  *
 101  * A value of 0xfe in the channel_map indicates that the channel is not
 102  * valid for Tx with the current hardware.  This means that
 103  * while the system can tune and receive on a given channel, it may not
 104  * be able to associate or transmit any frames on that
 105  * channel.  There is no corresponding channel information for that
 106  * entry.
 107  *
 108  *********************************************************************/
 109
 110 /* 2.4 GHz */
 111 const u8 iwl_eeprom_band_1[14] = {
 112         1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
 113 };
 114
 115 /* 5.2 GHz bands */
 116 static const u8 iwl_eeprom_band_2[] = { /* 4915-5080MHz */
 117         183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
 118 };
 119
 120 static const u8 iwl_eeprom_band_3[] = { /* 5170-5320MHz */
 121         34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
 122 };
 123
 124 static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
 125         100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
 126 };
 127
 128 static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
 129         145, 149, 153, 157, 161, 165
 130 };
 131
 132 static const u8 iwl_eeprom_band_6[] = {       /* 2.4 ht40 channel */
 133         1, 2, 3, 4, 5, 6, 7
 134 };
 135
 136 static const u8 iwl_eeprom_band_7[] = {       /* 5.2 ht40 channel */
 137         36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
 138 };
 139
 140 /******************************************************************************
 141  *
 142  * generic NVM functions
 143  *
 144 ******************************************************************************/
 145
 146 /*
 147  * The device's EEPROM semaphore prevents conflicts between driver and uCode
 148  * when accessing the EEPROM; each access is a series of pulses to/from the
 149  * EEPROM chip, not a single event, so even reads could conflict if they
 150  * weren't arbitrated by the semaphore.
 151  */
 152 static int iwl_eeprom_acquire_semaphore(struct iwl_bus *bus)
 153 {
 154         u16 count;
 155         int ret;
 156
 157         for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
 158                 /* Request semaphore */
 159                 iwl_set_bit(trans(bus), CSR_HW_IF_CONFIG_REG,
 160                             CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 161
 162                 /* See if we got it */
 163                 ret = iwl_poll_bit(trans(bus), CSR_HW_IF_CONFIG_REG,
 164                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 165                                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
 166                                 EEPROM_SEM_TIMEOUT);
 167                 if (ret >= 0) {
 168                         IWL_DEBUG_EEPROM(trans(bus),
 169                                 "Acquired semaphore after %d tries.\n",
 170                                 count+1);
 171                         return ret;
 172                 }
 173         }
 174
 175         return ret;
 176 }
 177
 178 static void iwl_eeprom_release_semaphore(struct iwl_bus *bus)
 179 {
 180         iwl_clear_bit(trans(bus), CSR_HW_IF_CONFIG_REG,
 181                 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
 182
 183 }
 184
 185 static int iwl_eeprom_verify_signature(struct iwl_trans *trans)
 186 {
 187         u32 gp = iwl_read32(trans, CSR_EEPROM_GP) &
 188                            CSR_EEPROM_GP_VALID_MSK;
 189         int ret = 0;
 190
 191         IWL_DEBUG_EEPROM(trans, "EEPROM signature=0x%08x\n", gp);
 192         switch (gp) {
 193         case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:
 194                 if (trans->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
 195                         IWL_ERR(trans, "EEPROM with bad signature: 0x%08x\n",
 196                                 gp);
 197                         ret = -ENOENT;
 198                 }
 199                 break;
 200         case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
 201         case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
 202                 if (trans->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {
 203                         IWL_ERR(trans, "OTP with bad signature: 0x%08x\n", gp);
 204                         ret = -ENOENT;
 205                 }
 206                 break;
 207         case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP:
 208         default:
 209                 IWL_ERR(trans, "bad EEPROM/OTP signature, type=%s, "
 210                         "EEPROM_GP=0x%08x\n",
 211                         (trans->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 212                         ? "OTP" : "EEPROM", gp);
 213                 ret = -ENOENT;
 214                 break;
 215         }
 216         return ret;
 217 }
 218
 219 u16 iwl_eeprom_query16(const struct iwl_shared *shrd, size_t offset)
 220 {
 221         if (!shrd->eeprom)
 222                 return 0;
 223         return (u16)shrd->eeprom[offset] | ((u16)shrd->eeprom[offset + 1] << 8);
 224 }
 225
 226 int iwl_eeprom_check_version(struct iwl_priv *priv)
 227 {
 228         u16 eeprom_ver;
 229         u16 calib_ver;
 230
 231         eeprom_ver = iwl_eeprom_query16(priv->shrd, EEPROM_VERSION);
 232         calib_ver = iwl_eeprom_calib_version(priv->shrd);
 233
 234         if (eeprom_ver < cfg(priv)->eeprom_ver ||
 235             calib_ver < cfg(priv)->eeprom_calib_ver)
 236                 goto err;
 237
 238         IWL_INFO(priv, "device EEPROM VER=0x%x, CALIB=0x%x\n",
 239                  eeprom_ver, calib_ver);
 240
 241         return 0;
 242 err:
 243         IWL_ERR(priv, "Unsupported (too old) EEPROM VER=0x%x < 0x%x "
 244                   "CALIB=0x%x < 0x%x\n",
 245                   eeprom_ver, cfg(priv)->eeprom_ver,
 246                   calib_ver,  cfg(priv)->eeprom_calib_ver);
 247         return -EINVAL;
 248
 249 }
 250
 251 int iwl_eeprom_check_sku(struct iwl_priv *priv)
 252 {
 253         struct iwl_shared *shrd = priv->shrd;
 254         u16 radio_cfg;
 255
 256         if (!cfg(priv)->sku) {
 257                 /* not using sku overwrite */
 258                 cfg(priv)->sku = iwl_eeprom_query16(shrd, EEPROM_SKU_CAP);
 259                 if (cfg(priv)->sku & EEPROM_SKU_CAP_11N_ENABLE &&
 260                     !cfg(priv)->ht_params) {
 261                         IWL_ERR(priv, "Invalid 11n configuration\n");
 262                         return -EINVAL;
 263                 }
 264         }
 265         if (!cfg(priv)->sku) {
 266                 IWL_ERR(priv, "Invalid device sku\n");
 267                 return -EINVAL;
 268         }
 269
 270         IWL_INFO(priv, "Device SKU: 0x%X\n", cfg(priv)->sku);
 271
 272         if (!cfg(priv)->valid_tx_ant && !cfg(priv)->valid_rx_ant) {
 273                 /* not using .cfg overwrite */
 274                 radio_cfg = iwl_eeprom_query16(shrd, EEPROM_RADIO_CONFIG);
 275                 cfg(priv)->valid_tx_ant = EEPROM_RF_CFG_TX_ANT_MSK(radio_cfg);
 276                 cfg(priv)->valid_rx_ant = EEPROM_RF_CFG_RX_ANT_MSK(radio_cfg);
 277                 if (!cfg(priv)->valid_tx_ant || !cfg(priv)->valid_rx_ant) {
 278                         IWL_ERR(priv, "Invalid chain (0x%X, 0x%X)\n",
 279                                 cfg(priv)->valid_tx_ant,
 280                                 cfg(priv)->valid_rx_ant);
 281                         return -EINVAL;
 282                 }
 283                 IWL_INFO(priv, "Valid Tx ant: 0x%X, Valid Rx ant: 0x%X\n",
 284                          cfg(priv)->valid_tx_ant, cfg(priv)->valid_rx_ant);
 285         }
 286         /*
 287          * for some special cases,
 288          * EEPROM did not reflect the correct antenna setting
 289          * so overwrite the valid tx/rx antenna from .cfg
 290          */
 291         return 0;
 292 }
 293
 294 void iwl_eeprom_get_mac(const struct iwl_shared *shrd, u8 *mac)
 295 {
 296         const u8 *addr = iwl_eeprom_query_addr(shrd,
 297                                         EEPROM_MAC_ADDRESS);
 298         memcpy(mac, addr, ETH_ALEN);
 299 }
 300
 301 /******************************************************************************
 302  *
 303  * OTP related functions
 304  *
 305 ******************************************************************************/
 306
 307 static void iwl_set_otp_access(struct iwl_bus *bus, enum iwl_access_mode mode)
 308 {
 309         iwl_read32(trans(bus), CSR_OTP_GP_REG);
 310
 311         if (mode == IWL_OTP_ACCESS_ABSOLUTE)
 312                 iwl_clear_bit(trans(bus), CSR_OTP_GP_REG,
 313                               CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 314         else
 315                 iwl_set_bit(trans(bus), CSR_OTP_GP_REG,
 316                             CSR_OTP_GP_REG_OTP_ACCESS_MODE);
 317 }
 318
 319 static int iwl_get_nvm_type(struct iwl_bus *bus, u32 hw_rev)
 320 {
 321         u32 otpgp;
 322         int nvm_type;
 323
 324         /* OTP only valid for CP/PP and after */
 325         switch (hw_rev & CSR_HW_REV_TYPE_MSK) {
 326         case CSR_HW_REV_TYPE_NONE:
 327                 IWL_ERR(bus, "Unknown hardware type\n");
 328                 return -ENOENT;
 329         case CSR_HW_REV_TYPE_5300:
 330         case CSR_HW_REV_TYPE_5350:
 331         case CSR_HW_REV_TYPE_5100:
 332         case CSR_HW_REV_TYPE_5150:
 333                 nvm_type = NVM_DEVICE_TYPE_EEPROM;
 334                 break;
 335         default:
 336                 otpgp = iwl_read32(trans(bus), CSR_OTP_GP_REG);
 337                 if (otpgp & CSR_OTP_GP_REG_DEVICE_SELECT)
 338                         nvm_type = NVM_DEVICE_TYPE_OTP;
 339                 else
 340                         nvm_type = NVM_DEVICE_TYPE_EEPROM;
 341                 break;
 342         }
 343         return  nvm_type;
 344 }
 345
 346 static int iwl_init_otp_access(struct iwl_bus *bus)
 347 {
 348         int ret;
 349
 350         /* Enable 40MHz radio clock */
 351         iwl_write32(trans(bus), CSR_GP_CNTRL,
 352                     iwl_read32(trans(bus), CSR_GP_CNTRL) |
 353                     CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 354
 355         /* wait for clock to be ready */
 356         ret = iwl_poll_bit(trans(bus), CSR_GP_CNTRL,
 357                                  CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 358                                  CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 359                                  25000);
 360         if (ret < 0)
 361                 IWL_ERR(bus, "Time out access OTP\n");
 362         else {
 363                 iwl_set_bits_prph(trans(bus), APMG_PS_CTRL_REG,
 364                                   APMG_PS_CTRL_VAL_RESET_REQ);
 365                 udelay(5);
 366                 iwl_clear_bits_prph(trans(bus), APMG_PS_CTRL_REG,
 367                                     APMG_PS_CTRL_VAL_RESET_REQ);
 368
 369                 /*
 370                  * CSR auto clock gate disable bit -
 371                  * this is only applicable for HW with OTP shadow RAM
 372                  */
 373                 if (cfg(bus)->base_params->shadow_ram_support)
 374                         iwl_set_bit(trans(bus), CSR_DBG_LINK_PWR_MGMT_REG,
 375                                 CSR_RESET_LINK_PWR_MGMT_DISABLED);
 376         }
 377         return ret;
 378 }
 379
 380 static int iwl_read_otp_word(struct iwl_bus *bus, u16 addr, __le16 *eeprom_data)
 381 {
 382         int ret = 0;
 383         u32 r;
 384         u32 otpgp;
 385
 386         iwl_write32(trans(bus), CSR_EEPROM_REG,
 387                     CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 388         ret = iwl_poll_bit(trans(bus), CSR_EEPROM_REG,
 389                                  CSR_EEPROM_REG_READ_VALID_MSK,
 390                                  CSR_EEPROM_REG_READ_VALID_MSK,
 391                                  IWL_EEPROM_ACCESS_TIMEOUT);
 392         if (ret < 0) {
 393                 IWL_ERR(bus, "Time out reading OTP[%d]\n", addr);
 394                 return ret;
 395         }
 396         r = iwl_read32(trans(bus), CSR_EEPROM_REG);
 397         /* check for ECC errors: */
 398         otpgp = iwl_read32(trans(bus), CSR_OTP_GP_REG);
 399         if (otpgp & CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK) {
 400                 /* stop in this case */
 401                 /* set the uncorrectable OTP ECC bit for acknowledgement */
 402                 iwl_set_bit(trans(bus), CSR_OTP_GP_REG,
 403                         CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 404                 IWL_ERR(bus, "Uncorrectable OTP ECC error, abort OTP read\n");
 405                 return -EINVAL;
 406         }
 407         if (otpgp & CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK) {
 408                 /* continue in this case */
 409                 /* set the correctable OTP ECC bit for acknowledgement */
 410                 iwl_set_bit(trans(bus), CSR_OTP_GP_REG,
 411                                 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
 412                 IWL_ERR(bus, "Correctable OTP ECC error, continue read\n");
 413         }
 414         *eeprom_data = cpu_to_le16(r >> 16);
 415         return 0;
 416 }
 417
 418 /*
 419  * iwl_is_otp_empty: check for empty OTP
 420  */
 421 static bool iwl_is_otp_empty(struct iwl_bus *bus)
 422 {
 423         u16 next_link_addr = 0;
 424         __le16 link_value;
 425         bool is_empty = false;
 426
 427         /* locate the beginning of OTP link list */
 428         if (!iwl_read_otp_word(bus, next_link_addr, &link_value)) {
 429                 if (!link_value) {
 430                         IWL_ERR(bus, "OTP is empty\n");
 431                         is_empty = true;
 432                 }
 433         } else {
 434                 IWL_ERR(bus, "Unable to read first block of OTP list.\n");
 435                 is_empty = true;
 436         }
 437
 438         return is_empty;
 439 }
 440
 441
 442 /*
 443  * iwl_find_otp_image: find EEPROM image in OTP
 444  *   finding the OTP block that contains the EEPROM image.
 445  *   the last valid block on the link list (the block _before_ the last block)
 446  *   is the block we should read and used to configure the device.
 447  *   If all the available OTP blocks are full, the last block will be the block
 448  *   we should read and used to configure the device.
 449  *   only perform this operation if shadow RAM is disabled
 450  */
 451 static int iwl_find_otp_image(struct iwl_bus *bus,
 452                                         u16 *validblockaddr)
 453 {
 454         u16 next_link_addr = 0, valid_addr;
 455         __le16 link_value = 0;
 456         int usedblocks = 0;
 457
 458         /* set addressing mode to absolute to traverse the link list */
 459         iwl_set_otp_access(bus, IWL_OTP_ACCESS_ABSOLUTE);
 460
 461         /* checking for empty OTP or error */
 462         if (iwl_is_otp_empty(bus))
 463                 return -EINVAL;
 464
 465         /*
 466          * start traverse link list
 467          * until reach the max number of OTP blocks
 468          * different devices have different number of OTP blocks
 469          */
 470         do {
 471                 /* save current valid block address
 472                  * check for more block on the link list
 473                  */
 474                 valid_addr = next_link_addr;
 475                 next_link_addr = le16_to_cpu(link_value) * sizeof(u16);
 476                 IWL_DEBUG_EEPROM(bus, "OTP blocks %d addr 0x%x\n",
 477                                usedblocks, next_link_addr);
 478                 if (iwl_read_otp_word(bus, next_link_addr, &link_value))
 479                         return -EINVAL;
 480                 if (!link_value) {
 481                         /*
 482                          * reach the end of link list, return success and
 483                          * set address point to the starting address
 484                          * of the image
 485                          */
 486                         *validblockaddr = valid_addr;
 487                         /* skip first 2 bytes (link list pointer) */
 488                         *validblockaddr += 2;
 489                         return 0;
 490                 }
 491                 /* more in the link list, continue */
 492                 usedblocks++;
 493         } while (usedblocks <= cfg(bus)->base_params->max_ll_items);
 494
 495         /* OTP has no valid blocks */
 496         IWL_DEBUG_EEPROM(bus, "OTP has no valid blocks\n");
 497         return -EINVAL;
 498 }
 499
 500 /******************************************************************************
 501  *
 502  * Tx Power related functions
 503  *
 504 ******************************************************************************/
 505 /**
 506  * iwl_get_max_txpower_avg - get the highest tx power from all chains.
 507  *     find the highest tx power from all chains for the channel
 508  */
 509 static s8 iwl_get_max_txpower_avg(struct iwl_cfg *cfg,
 510                 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
 511                 int element, s8 *max_txpower_in_half_dbm)
 512 {
 513         s8 max_txpower_avg = 0; /* (dBm) */
 514
 515         /* Take the highest tx power from any valid chains */
 516         if ((cfg->valid_tx_ant & ANT_A) &&
 517             (enhanced_txpower[element].chain_a_max > max_txpower_avg))
 518                 max_txpower_avg = enhanced_txpower[element].chain_a_max;
 519         if ((cfg->valid_tx_ant & ANT_B) &&
 520             (enhanced_txpower[element].chain_b_max > max_txpower_avg))
 521                 max_txpower_avg = enhanced_txpower[element].chain_b_max;
 522         if ((cfg->valid_tx_ant & ANT_C) &&
 523             (enhanced_txpower[element].chain_c_max > max_txpower_avg))
 524                 max_txpower_avg = enhanced_txpower[element].chain_c_max;
 525         if (((cfg->valid_tx_ant == ANT_AB) |
 526             (cfg->valid_tx_ant == ANT_BC) |
 527             (cfg->valid_tx_ant == ANT_AC)) &&
 528             (enhanced_txpower[element].mimo2_max > max_txpower_avg))
 529                 max_txpower_avg =  enhanced_txpower[element].mimo2_max;
 530         if ((cfg->valid_tx_ant == ANT_ABC) &&
 531             (enhanced_txpower[element].mimo3_max > max_txpower_avg))
 532                 max_txpower_avg = enhanced_txpower[element].mimo3_max;
 533
 534         /*
 535          * max. tx power in EEPROM is in 1/2 dBm format
 536          * convert from 1/2 dBm to dBm (round-up convert)
 537          * but we also do not want to loss 1/2 dBm resolution which
 538          * will impact performance
 539          */
 540         *max_txpower_in_half_dbm = max_txpower_avg;
 541         return (max_txpower_avg & 0x01) + (max_txpower_avg >> 1);
 542 }
 543
 544 static void
 545 iwl_eeprom_enh_txp_read_element(struct iwl_priv *priv,
 546                                     struct iwl_eeprom_enhanced_txpwr *txp,
 547                                     s8 max_txpower_avg)
 548 {
 549         int ch_idx;
 550         bool is_ht40 = txp->flags & IWL_EEPROM_ENH_TXP_FL_40MHZ;
 551         enum ieee80211_band band;
 552
 553         band = txp->flags & IWL_EEPROM_ENH_TXP_FL_BAND_52G ?
 554                 IEEE80211_BAND_5GHZ : IEEE80211_BAND_2GHZ;
 555
 556         for (ch_idx = 0; ch_idx < priv->channel_count; ch_idx++) {
 557                 struct iwl_channel_info *ch_info = &priv->channel_info[ch_idx];
 558
 559                 /* update matching channel or from common data only */
 560                 if (txp->channel != 0 && ch_info->channel != txp->channel)
 561                         continue;
 562
 563                 /* update matching band only */
 564                 if (band != ch_info->band)
 565                         continue;
 566
 567                 if (ch_info->max_power_avg < max_txpower_avg && !is_ht40) {
 568                         ch_info->max_power_avg = max_txpower_avg;
 569                         ch_info->curr_txpow = max_txpower_avg;
 570                         ch_info->scan_power = max_txpower_avg;
 571                 }
 572
 573                 if (is_ht40 && ch_info->ht40_max_power_avg < max_txpower_avg)
 574                         ch_info->ht40_max_power_avg = max_txpower_avg;
 575         }
 576 }
 577
 578 #define EEPROM_TXP_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT)
 579 #define EEPROM_TXP_ENTRY_LEN sizeof(struct iwl_eeprom_enhanced_txpwr)
 580 #define EEPROM_TXP_SZ_OFFS (0x00 | INDIRECT_ADDRESS | INDIRECT_TXP_LIMIT_SIZE)
 581
 582 #define TXP_CHECK_AND_PRINT(x) ((txp->flags & IWL_EEPROM_ENH_TXP_FL_##x) \
 583                             ? # x " " : "")
 584
 585 void iwl_eeprom_enhanced_txpower(struct iwl_priv *priv)
 586 {
 587         struct iwl_shared *shrd = priv->shrd;
 588         struct iwl_eeprom_enhanced_txpwr *txp_array, *txp;
 589         int idx, entries;
 590         __le16 *txp_len;
 591         s8 max_txp_avg, max_txp_avg_halfdbm;
 592
 593         BUILD_BUG_ON(sizeof(struct iwl_eeprom_enhanced_txpwr) != 8);
 594
 595         /* the length is in 16-bit words, but we want entries */
 596         txp_len = (__le16 *) iwl_eeprom_query_addr(shrd, EEPROM_TXP_SZ_OFFS);
 597         entries = le16_to_cpup(txp_len) * 2 / EEPROM_TXP_ENTRY_LEN;
 598
 599         txp_array = (void *) iwl_eeprom_query_addr(shrd, EEPROM_TXP_OFFS);
 600
 601         for (idx = 0; idx < entries; idx++) {
 602                 txp = &txp_array[idx];
 603                 /* skip invalid entries */
 604                 if (!(txp->flags & IWL_EEPROM_ENH_TXP_FL_VALID))
 605                         continue;
 606
 607                 IWL_DEBUG_EEPROM(priv, "%s %d:\t %s%s%s%s%s%s%s%s (0x%02x)\n",
 608                                  (txp->channel && (txp->flags &
 609                                         IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE)) ?
 610                                         "Common " : (txp->channel) ?
 611                                         "Channel" : "Common",
 612                                  (txp->channel),
 613                                  TXP_CHECK_AND_PRINT(VALID),
 614                                  TXP_CHECK_AND_PRINT(BAND_52G),
 615                                  TXP_CHECK_AND_PRINT(OFDM),
 616                                  TXP_CHECK_AND_PRINT(40MHZ),
 617                                  TXP_CHECK_AND_PRINT(HT_AP),
 618                                  TXP_CHECK_AND_PRINT(RES1),
 619                                  TXP_CHECK_AND_PRINT(RES2),
 620                                  TXP_CHECK_AND_PRINT(COMMON_TYPE),
 621                                  txp->flags);
 622                 IWL_DEBUG_EEPROM(priv, "\t\t chain_A: 0x%02x "
 623                                  "chain_B: 0X%02x chain_C: 0X%02x\n",
 624                                  txp->chain_a_max, txp->chain_b_max,
 625                                  txp->chain_c_max);
 626                 IWL_DEBUG_EEPROM(priv, "\t\t MIMO2: 0x%02x "
 627                                  "MIMO3: 0x%02x High 20_on_40: 0x%02x "
 628                                  "Low 20_on_40: 0x%02x\n",
 629                                  txp->mimo2_max, txp->mimo3_max,
 630                                  ((txp->delta_20_in_40 & 0xf0) >> 4),
 631                                  (txp->delta_20_in_40 & 0x0f));
 632
 633                 max_txp_avg = iwl_get_max_txpower_avg(cfg(priv), txp_array, idx,
 634                                                       &max_txp_avg_halfdbm);
 635
 636                 /*
 637                  * Update the user limit values values to the highest
 638                  * power supported by any channel
 639                  */
 640                 if (max_txp_avg > priv->tx_power_user_lmt)
 641                         priv->tx_power_user_lmt = max_txp_avg;
 642                 if (max_txp_avg_halfdbm > priv->tx_power_lmt_in_half_dbm)
 643                         priv->tx_power_lmt_in_half_dbm = max_txp_avg_halfdbm;
 644
 645                 iwl_eeprom_enh_txp_read_element(priv, txp, max_txp_avg);
 646         }
 647 }
 648
 649 /**
 650  * iwl_eeprom_init - read EEPROM contents
 651  *
 652  * Load the EEPROM contents from adapter into shrd->eeprom
 653  *
 654  * NOTE:  This routine uses the non-debug IO access functions.
 655  */
 656 int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev)
 657 {
 658         struct iwl_shared *shrd = priv->shrd;
 659         __le16 *e;
 660         u32 gp = iwl_read32(trans(priv), CSR_EEPROM_GP);
 661         int sz;
 662         int ret;
 663         u16 addr;
 664         u16 validblockaddr = 0;
 665         u16 cache_addr = 0;
 666
 667         trans(priv)->nvm_device_type = iwl_get_nvm_type(bus(priv), hw_rev);
 668         if (trans(priv)->nvm_device_type == -ENOENT)
 669                 return -ENOENT;
 670         /* allocate eeprom */
 671         sz = cfg(priv)->base_params->eeprom_size;
 672         IWL_DEBUG_EEPROM(priv, "NVM size = %d\n", sz);
 673         shrd->eeprom = kzalloc(sz, GFP_KERNEL);
 674         if (!shrd->eeprom) {
 675                 ret = -ENOMEM;
 676                 goto alloc_err;
 677         }
 678         e = (__le16 *)shrd->eeprom;
 679
 680         ret = iwl_eeprom_verify_signature(trans(priv));
 681         if (ret < 0) {
 682                 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
 683                 ret = -ENOENT;
 684                 goto err;
 685         }
 686
 687         /* Make sure driver (instead of uCode) is allowed to read EEPROM */
 688         ret = iwl_eeprom_acquire_semaphore(bus(priv));
 689         if (ret < 0) {
 690                 IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
 691                 ret = -ENOENT;
 692                 goto err;
 693         }
 694
 695         if (trans(priv)->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
 696
 697                 ret = iwl_init_otp_access(bus(priv));
 698                 if (ret) {
 699                         IWL_ERR(priv, "Failed to initialize OTP access.\n");
 700                         ret = -ENOENT;
 701                         goto done;
 702                 }
 703                 iwl_write32(trans(priv), CSR_EEPROM_GP,
 704                             iwl_read32(trans(priv), CSR_EEPROM_GP) &
 705                             ~CSR_EEPROM_GP_IF_OWNER_MSK);
 706
 707                 iwl_set_bit(trans(priv), CSR_OTP_GP_REG,
 708                              CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK |
 709                              CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK);
 710                 /* traversing the linked list if no shadow ram supported */
 711                 if (!cfg(priv)->base_params->shadow_ram_support) {
 712                         if (iwl_find_otp_image(bus(priv), &validblockaddr)) {
 713                                 ret = -ENOENT;
 714                                 goto done;
 715                         }
 716                 }
 717                 for (addr = validblockaddr; addr < validblockaddr + sz;
 718                      addr += sizeof(u16)) {
 719                         __le16 eeprom_data;
 720
 721                         ret = iwl_read_otp_word(bus(priv), addr, &eeprom_data);
 722                         if (ret)
 723                                 goto done;
 724                         e[cache_addr / 2] = eeprom_data;
 725                         cache_addr += sizeof(u16);
 726                 }
 727         } else {
 728                 /* eeprom is an array of 16bit values */
 729                 for (addr = 0; addr < sz; addr += sizeof(u16)) {
 730                         u32 r;
 731
 732                         iwl_write32(trans(priv), CSR_EEPROM_REG,
 733                                     CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
 734
 735                         ret = iwl_poll_bit(trans(priv), CSR_EEPROM_REG,
 736                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 737                                                   CSR_EEPROM_REG_READ_VALID_MSK,
 738                                                   IWL_EEPROM_ACCESS_TIMEOUT);
 739                         if (ret < 0) {
 740                                 IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
 741                                 goto done;
 742                         }
 743                         r = iwl_read32(trans(priv), CSR_EEPROM_REG);
 744                         e[addr / 2] = cpu_to_le16(r >> 16);
 745                 }
 746         }
 747
 748         IWL_DEBUG_EEPROM(priv, "NVM Type: %s, version: 0x%x\n",
 749                        (trans(priv)->nvm_device_type == NVM_DEVICE_TYPE_OTP)
 750                        ? "OTP" : "EEPROM",
 751                        iwl_eeprom_query16(shrd, EEPROM_VERSION));
 752
 753         ret = 0;
 754 done:
 755         iwl_eeprom_release_semaphore(bus(priv));
 756
 757 err:
 758         if (ret)
 759                 iwl_eeprom_free(priv->shrd);
 760 alloc_err:
 761         return ret;
 762 }
 763
 764 void iwl_eeprom_free(struct iwl_shared *shrd)
 765 {
 766         kfree(shrd->eeprom);
 767         shrd->eeprom = NULL;
 768 }
 769
 770 static void iwl_init_band_reference(const struct iwl_priv *priv,
 771                         int eep_band, int *eeprom_ch_count,
 772                         const struct iwl_eeprom_channel **eeprom_ch_info,
 773                         const u8 **eeprom_ch_index)
 774 {
 775         struct iwl_shared *shrd = priv->shrd;
 776         u32 offset = cfg(priv)->lib->
 777                         eeprom_ops.regulatory_bands[eep_band - 1];
 778         switch (eep_band) {
 779         case 1:         /* 2.4GHz band */
 780                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
 781                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 782                                 iwl_eeprom_query_addr(shrd, offset);
 783                 *eeprom_ch_index = iwl_eeprom_band_1;
 784                 break;
 785         case 2:         /* 4.9GHz band */
 786                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
 787                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 788                                 iwl_eeprom_query_addr(shrd, offset);
 789                 *eeprom_ch_index = iwl_eeprom_band_2;
 790                 break;
 791         case 3:         /* 5.2GHz band */
 792                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
 793                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 794                                 iwl_eeprom_query_addr(shrd, offset);
 795                 *eeprom_ch_index = iwl_eeprom_band_3;
 796                 break;
 797         case 4:         /* 5.5GHz band */
 798                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
 799                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 800                                 iwl_eeprom_query_addr(shrd, offset);
 801                 *eeprom_ch_index = iwl_eeprom_band_4;
 802                 break;
 803         case 5:         /* 5.7GHz band */
 804                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
 805                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 806                                 iwl_eeprom_query_addr(shrd, offset);
 807                 *eeprom_ch_index = iwl_eeprom_band_5;
 808                 break;
 809         case 6:         /* 2.4GHz ht40 channels */
 810                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
 811                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 812                                 iwl_eeprom_query_addr(shrd, offset);
 813                 *eeprom_ch_index = iwl_eeprom_band_6;
 814                 break;
 815         case 7:         /* 5 GHz ht40 channels */
 816                 *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
 817                 *eeprom_ch_info = (struct iwl_eeprom_channel *)
 818                                 iwl_eeprom_query_addr(shrd, offset);
 819                 *eeprom_ch_index = iwl_eeprom_band_7;
 820                 break;
 821         default:
 822                 BUG();
 823                 return;
 824         }
 825 }
 826
 827 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
 828                             ? # x " " : "")
 829 /**
 830  * iwl_mod_ht40_chan_info - Copy ht40 channel info into driver's priv.
 831  *
 832  * Does not set up a command, or touch hardware.
 833  */
 834 static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
 835                               enum ieee80211_band band, u16 channel,
 836                               const struct iwl_eeprom_channel *eeprom_ch,
 837                               u8 clear_ht40_extension_channel)
 838 {
 839         struct iwl_channel_info *ch_info;
 840
 841         ch_info = (struct iwl_channel_info *)
 842                         iwl_get_channel_info(priv, band, channel);
 843
 844         if (!is_channel_valid(ch_info))
 845                 return -1;
 846
 847         IWL_DEBUG_EEPROM(priv, "HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
 848                         " Ad-Hoc %ssupported\n",
 849                         ch_info->channel,
 850                         is_channel_a_band(ch_info) ?
 851                         "5.2" : "2.4",
 852                         CHECK_AND_PRINT(IBSS),
 853                         CHECK_AND_PRINT(ACTIVE),
 854                         CHECK_AND_PRINT(RADAR),
 855                         CHECK_AND_PRINT(WIDE),
 856                         CHECK_AND_PRINT(DFS),
 857                         eeprom_ch->flags,
 858                         eeprom_ch->max_power_avg,
 859                         ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
 860                          && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
 861                         "" : "not ");
 862
 863         ch_info->ht40_eeprom = *eeprom_ch;
 864         ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
 865         ch_info->ht40_flags = eeprom_ch->flags;
 866         if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
 867                 ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
 868
 869         return 0;
 870 }
 871
 872 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
 873                             ? # x " " : "")
 874
 875 /**
 876  * iwl_init_channel_map - Set up driver's info for all possible channels
 877  */
 878 int iwl_init_channel_map(struct iwl_priv *priv)
 879 {
 880         int eeprom_ch_count = 0;
 881         const u8 *eeprom_ch_index = NULL;
 882         const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
 883         int band, ch;
 884         struct iwl_channel_info *ch_info;
 885
 886         if (priv->channel_count) {
 887                 IWL_DEBUG_EEPROM(priv, "Channel map already initialized.\n");
 888                 return 0;
 889         }
 890
 891         IWL_DEBUG_EEPROM(priv, "Initializing regulatory info from EEPROM\n");
 892
 893         priv->channel_count =
 894             ARRAY_SIZE(iwl_eeprom_band_1) +
 895             ARRAY_SIZE(iwl_eeprom_band_2) +
 896             ARRAY_SIZE(iwl_eeprom_band_3) +
 897             ARRAY_SIZE(iwl_eeprom_band_4) +
 898             ARRAY_SIZE(iwl_eeprom_band_5);
 899
 900         IWL_DEBUG_EEPROM(priv, "Parsing data for %d channels.\n",
 901                         priv->channel_count);
 902
 903         priv->channel_info = kcalloc(priv->channel_count,
 904                                      sizeof(struct iwl_channel_info),
 905                                      GFP_KERNEL);
 906         if (!priv->channel_info) {
 907                 IWL_ERR(priv, "Could not allocate channel_info\n");
 908                 priv->channel_count = 0;
 909                 return -ENOMEM;
 910         }
 911
 912         ch_info = priv->channel_info;
 913
 914         /* Loop through the 5 EEPROM bands adding them in order to the
 915          * channel map we maintain (that contains additional information than
 916          * what just in the EEPROM) */
 917         for (band = 1; band <= 5; band++) {
 918
 919                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 920                                         &eeprom_ch_info, &eeprom_ch_index);
 921
 922                 /* Loop through each band adding each of the channels */
 923                 for (ch = 0; ch < eeprom_ch_count; ch++) {
 924                         ch_info->channel = eeprom_ch_index[ch];
 925                         ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
 926                             IEEE80211_BAND_5GHZ;
 927
 928                         /* permanently store EEPROM's channel regulatory flags
 929                          *   and max power in channel info database. */
 930                         ch_info->eeprom = eeprom_ch_info[ch];
 931
 932                         /* Copy the run-time flags so they are there even on
 933                          * invalid channels */
 934                         ch_info->flags = eeprom_ch_info[ch].flags;
 935                         /* First write that ht40 is not enabled, and then enable
 936                          * one by one */
 937                         ch_info->ht40_extension_channel =
 938                                         IEEE80211_CHAN_NO_HT40;
 939
 940                         if (!(is_channel_valid(ch_info))) {
 941                                 IWL_DEBUG_EEPROM(priv,
 942                                                "Ch. %d Flags %x [%sGHz] - "
 943                                                "No traffic\n",
 944                                                ch_info->channel,
 945                                                ch_info->flags,
 946                                                is_channel_a_band(ch_info) ?
 947                                                "5.2" : "2.4");
 948                                 ch_info++;
 949                                 continue;
 950                         }
 951
 952                         /* Initialize regulatory-based run-time data */
 953                         ch_info->max_power_avg = ch_info->curr_txpow =
 954                             eeprom_ch_info[ch].max_power_avg;
 955                         ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
 956                         ch_info->min_power = 0;
 957
 958                         IWL_DEBUG_EEPROM(priv, "Ch. %d [%sGHz] "
 959                                        "%s%s%s%s%s%s(0x%02x %ddBm):"
 960                                        " Ad-Hoc %ssupported\n",
 961                                        ch_info->channel,
 962                                        is_channel_a_band(ch_info) ?
 963                                        "5.2" : "2.4",
 964                                        CHECK_AND_PRINT_I(VALID),
 965                                        CHECK_AND_PRINT_I(IBSS),
 966                                        CHECK_AND_PRINT_I(ACTIVE),
 967                                        CHECK_AND_PRINT_I(RADAR),
 968                                        CHECK_AND_PRINT_I(WIDE),
 969                                        CHECK_AND_PRINT_I(DFS),
 970                                        eeprom_ch_info[ch].flags,
 971                                        eeprom_ch_info[ch].max_power_avg,
 972                                        ((eeprom_ch_info[ch].
 973                                          flags & EEPROM_CHANNEL_IBSS)
 974                                         && !(eeprom_ch_info[ch].
 975                                              flags & EEPROM_CHANNEL_RADAR))
 976                                        ? "" : "not ");
 977
 978                         ch_info++;
 979                 }
 980         }
 981
 982         /* Check if we do have HT40 channels */
 983         if (cfg(priv)->lib->eeprom_ops.regulatory_bands[5] ==
 984             EEPROM_REGULATORY_BAND_NO_HT40 &&
 985             cfg(priv)->lib->eeprom_ops.regulatory_bands[6] ==
 986             EEPROM_REGULATORY_BAND_NO_HT40)
 987                 return 0;
 988
 989         /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
 990         for (band = 6; band <= 7; band++) {
 991                 enum ieee80211_band ieeeband;
 992
 993                 iwl_init_band_reference(priv, band, &eeprom_ch_count,
 994                                         &eeprom_ch_info, &eeprom_ch_index);
 995
 996                 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
 997                 ieeeband =
 998                         (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 999
1000                 /* Loop through each band adding each of the channels */
1001                 for (ch = 0; ch < eeprom_ch_count; ch++) {
1002                         /* Set up driver's info for lower half */
1003                         iwl_mod_ht40_chan_info(priv, ieeeband,
1004                                                 eeprom_ch_index[ch],
1005                                                 &eeprom_ch_info[ch],
1006                                                 IEEE80211_CHAN_NO_HT40PLUS);
1007
1008                         /* Set up driver's info for upper half */
1009                         iwl_mod_ht40_chan_info(priv, ieeeband,
1010                                                 eeprom_ch_index[ch] + 4,
1011                                                 &eeprom_ch_info[ch],
1012                                                 IEEE80211_CHAN_NO_HT40MINUS);
1013                 }
1014         }
1015
1016         /* for newer device (6000 series and up)
1017          * EEPROM contain enhanced tx power information
1018          * driver need to process addition information
1019          * to determine the max channel tx power limits
1020          */
1021         if (cfg(priv)->lib->eeprom_ops.update_enhanced_txpower)
1022                 cfg(priv)->lib->eeprom_ops.update_enhanced_txpower(priv);
1023
1024         return 0;
1025 }
1026
1027 /*
1028  * iwl_free_channel_map - undo allocations in iwl_init_channel_map
1029  */
1030 void iwl_free_channel_map(struct iwl_priv *priv)
1031 {
1032         kfree(priv->channel_info);
1033         priv->channel_count = 0;
1034 }
1035
1036 /**
1037  * iwl_get_channel_info - Find driver's private channel info
1038  *
1039  * Based on band and channel number.
1040  */
1041 const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
1042                                         enum ieee80211_band band, u16 channel)
1043 {
1044         int i;
1045
1046         switch (band) {
1047         case IEEE80211_BAND_5GHZ:
1048                 for (i = 14; i < priv->channel_count; i++) {
1049                         if (priv->channel_info[i].channel == channel)
1050                                 return &priv->channel_info[i];
1051                 }
1052                 break;
1053         case IEEE80211_BAND_2GHZ:
1054                 if (channel >= 1 && channel <= 14)
1055                         return &priv->channel_info[channel - 1];
1056                 break;
1057         default:
1058                 BUG();
1059         }
1060
1061         return NULL;
1062 }
1063
1064 void iwl_rf_config(struct iwl_priv *priv)
1065 {
1066         u16 radio_cfg;
1067
1068         radio_cfg = iwl_eeprom_query16(priv->shrd, EEPROM_RADIO_CONFIG);
1069
1070         /* write radio config values to register */
1071         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX) {
1072                 iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,
1073                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
1074                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
1075                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
1076                 IWL_INFO(priv, "Radio type=0x%x-0x%x-0x%x\n",
1077                          EEPROM_RF_CFG_TYPE_MSK(radio_cfg),
1078                          EEPROM_RF_CFG_STEP_MSK(radio_cfg),
1079                          EEPROM_RF_CFG_DASH_MSK(radio_cfg));
1080         } else
1081                 WARN_ON(1);
1082
1083         /* set CSR_HW_CONFIG_REG for uCode use */
1084         iwl_set_bit(trans(priv), CSR_HW_IF_CONFIG_REG,
1085                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
1086                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
1087 }