1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved.
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37 * modification, are permitted provided that the following conditions
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60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *****************************************************************************/
63 #ifndef __iwl_eeprom_h__
64 #define __iwl_eeprom_h__
66 #include <net/mac80211.h>
71 * EEPROM access time values:
73 * Driver initiates EEPROM read by writing byte address << 1 to CSR_EEPROM_REG.
74 * Driver then polls CSR_EEPROM_REG for CSR_EEPROM_REG_READ_VALID_MSK (0x1).
75 * When polling, wait 10 uSec between polling loops, up to a maximum 5000 uSec.
76 * Driver reads 16-bit value from bits 31-16 of CSR_EEPROM_REG.
78 #define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
80 #define IWL_EEPROM_SEM_TIMEOUT 10 /* microseconds */
81 #define IWL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
85 * Regulatory channel usage flags in EEPROM struct iwl4965_eeprom_channel.flags.
87 * IBSS and/or AP operation is allowed *only* on those channels with
88 * (VALID && IBSS && ACTIVE && !RADAR). This restriction is in place because
89 * RADAR detection is not supported by the 4965 driver, but is a
90 * requirement for establishing a new network for legal operation on channels
91 * requiring RADAR detection or restricting ACTIVE scanning.
93 * NOTE: "WIDE" flag does not indicate anything about "HT40" 40 MHz channels.
94 * It only indicates that 20 MHz channel use is supported; HT40 channel
95 * usage is indicated by a separate set of regulatory flags for each
98 * NOTE: Using a channel inappropriately will result in a uCode error!
100 #define IWL_NUM_TX_CALIB_GROUPS 5
102 EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */
103 EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
105 EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */
106 EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */
107 EEPROM_CHANNEL_WIDE = (1 << 5), /* 20 MHz channel okay */
108 /* Bit 6 Reserved (was Narrow Channel) */
109 EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */
112 /* SKU Capabilities */
113 #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
114 #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
116 /* *regulatory* channel data format in eeprom, one for each channel.
117 * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */
118 struct iwl_eeprom_channel {
119 u8 flags; /* EEPROM_CHANNEL_* flags copied from EEPROM */
120 s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */
123 enum iwl_eeprom_enhanced_txpwr_flags {
124 IWL_EEPROM_ENH_TXP_FL_VALID = BIT(0),
125 IWL_EEPROM_ENH_TXP_FL_BAND_52G = BIT(1),
126 IWL_EEPROM_ENH_TXP_FL_OFDM = BIT(2),
127 IWL_EEPROM_ENH_TXP_FL_40MHZ = BIT(3),
128 IWL_EEPROM_ENH_TXP_FL_HT_AP = BIT(4),
129 IWL_EEPROM_ENH_TXP_FL_RES1 = BIT(5),
130 IWL_EEPROM_ENH_TXP_FL_RES2 = BIT(6),
131 IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE = BIT(7),
135 * iwl_eeprom_enhanced_txpwr structure
136 * This structure presents the enhanced regulatory tx power limit layout
138 * Enhanced regulatory tx power portion of eeprom image can be broken down
139 * into individual structures; each one is 8 bytes in size and contain the
140 * following information
141 * @flags: entry flags
142 * @channel: channel number
143 * @chain_a_max_pwr: chain a max power in 1/2 dBm
144 * @chain_b_max_pwr: chain b max power in 1/2 dBm
145 * @chain_c_max_pwr: chain c max power in 1/2 dBm
146 * @delta_20_in_40: 20-in-40 deltas (hi/lo)
147 * @mimo2_max_pwr: mimo2 max power in 1/2 dBm
148 * @mimo3_max_pwr: mimo3 max power in 1/2 dBm
151 struct iwl_eeprom_enhanced_txpwr {
163 #define EEPROM_3945_EEPROM_VERSION (0x2f)
165 /* 4965 has two radio transmitters (and 3 radio receivers) */
166 #define EEPROM_TX_POWER_TX_CHAINS (2)
168 /* 4965 has room for up to 8 sets of txpower calibration data */
169 #define EEPROM_TX_POWER_BANDS (8)
171 /* 4965 factory calibration measures txpower gain settings for
172 * each of 3 target output levels */
173 #define EEPROM_TX_POWER_MEASUREMENTS (3)
176 /* 4965 driver does not work with txpower calibration version < 5 */
177 #define EEPROM_4965_TX_POWER_VERSION (5)
178 #define EEPROM_4965_EEPROM_VERSION (0x2f)
179 #define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */
180 #define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */
181 #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */
182 #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */
185 #define EEPROM_5000_TX_POWER_VERSION (4)
186 #define EEPROM_5000_EEPROM_VERSION (0x11A)
188 /* 5000 and up calibration */
189 #define EEPROM_CALIB_ALL (INDIRECT_ADDRESS | INDIRECT_CALIBRATION)
190 #define EEPROM_XTAL ((2*0x128) | EEPROM_CALIB_ALL)
192 /* 5000 temperature */
193 #define EEPROM_5000_TEMPERATURE ((2*0x12A) | EEPROM_CALIB_ALL)
196 #define EEPROM_LINK_HOST (2*0x64)
197 #define EEPROM_LINK_GENERAL (2*0x65)
198 #define EEPROM_LINK_REGULATORY (2*0x66)
199 #define EEPROM_LINK_CALIBRATION (2*0x67)
200 #define EEPROM_LINK_PROCESS_ADJST (2*0x68)
201 #define EEPROM_LINK_OTHERS (2*0x69)
202 #define EEPROM_LINK_TXP_LIMIT (2*0x6a)
203 #define EEPROM_LINK_TXP_LIMIT_SIZE (2*0x6b)
205 /* agn regulatory - indirect access */
206 #define EEPROM_REG_BAND_1_CHANNELS ((0x08)\
207 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 28 bytes */
208 #define EEPROM_REG_BAND_2_CHANNELS ((0x26)\
209 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 26 bytes */
210 #define EEPROM_REG_BAND_3_CHANNELS ((0x42)\
211 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
212 #define EEPROM_REG_BAND_4_CHANNELS ((0x5C)\
213 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
214 #define EEPROM_REG_BAND_5_CHANNELS ((0x74)\
215 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 12 bytes */
216 #define EEPROM_REG_BAND_24_HT40_CHANNELS ((0x82)\
217 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 14 bytes */
218 #define EEPROM_REG_BAND_52_HT40_CHANNELS ((0x92)\
219 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
221 /* 6000 regulatory - indirect access */
222 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS ((0x80)\
223 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 14 bytes */
225 /* 6000 and up regulatory tx power - indirect access */
226 /* max. elements per section */
227 #define EEPROM_MAX_TXPOWER_SECTION_ELEMENTS (8)
228 #define EEPROM_TXPOWER_COMMON_HT40_INDEX (2)
231 * Partition the enhanced tx power portion of eeprom image into
232 * 10 sections based on band, modulation, frequency and channel
234 * Section 1: all CCK channels
235 * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40 ) channels
236 * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels
237 * Section 4: 2.4 GHz 20MHz channels: 1, 2, 10, 11. Both Legacy and HT
238 * Section 5: 2.4 GHz 40MHz channels: 1, 2, 6, 7, 9, (_above_)
239 * Section 6: 5.2 GHz 20MHz channels: 36, 64, 100, both Legacy and HT
240 * Section 7: 5.2 GHz 40MHz channels: 36, 60, 100 (_above_)
241 * Section 8: 2.4 GHz channel 13, Both Legacy and HT
242 * Section 9: 2.4 GHz channel 140, Both Legacy and HT
243 * Section 10: 2.4 GHz 40MHz channels: 132, 44 (_above_)
245 /* 2.4 GHz band: CCK */
246 #define EEPROM_LB_CCK_20_COMMON ((0xA8)\
247 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 8 bytes */
248 /* 2.4 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */
249 #define EEPROM_LB_OFDM_COMMON ((0xB0)\
250 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
251 /* 5.2 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */
252 #define EEPROM_HB_OFDM_COMMON ((0xC8)\
253 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
254 /* 2.4GHz band channels:
255 * 1Legacy, 1HT, 2Legacy, 2HT, 10Legacy, 10HT, 11Legacy, 11HT */
256 #define EEPROM_LB_OFDM_20_BAND ((0xE0)\
257 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 64 bytes */
258 /* 2.4 GHz band HT40 channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1) */
259 #define EEPROM_LB_OFDM_HT40_BAND ((0x120)\
260 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 40 bytes */
261 /* 5.2GHz band channels: 36Legacy, 36HT, 64Legacy, 64HT, 100Legacy, 100HT */
262 #define EEPROM_HB_OFDM_20_BAND ((0x148)\
263 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 48 bytes */
264 /* 5.2 GHz band HT40 channels: (36,+1) (60,+1) (100,+1) */
265 #define EEPROM_HB_OFDM_HT40_BAND ((0x178)\
266 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
267 /* 2.4 GHz band, channnel 13: Legacy, HT */
268 #define EEPROM_LB_OFDM_20_CHANNEL_13 ((0x190)\
269 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */
270 /* 5.2 GHz band, channnel 140: Legacy, HT */
271 #define EEPROM_HB_OFDM_20_CHANNEL_140 ((0x1A0)\
272 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */
273 /* 5.2 GHz band, HT40 channnels (132,+1) (44,+1) */
274 #define EEPROM_HB_OFDM_HT40_BAND_1 ((0x1B0)\
275 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */
279 #define EEPROM_5050_TX_POWER_VERSION (4)
280 #define EEPROM_5050_EEPROM_VERSION (0x21E)
283 #define EEPROM_1000_TX_POWER_VERSION (4)
284 #define EEPROM_1000_EEPROM_VERSION (0x15C)
287 #define EEPROM_6000_TX_POWER_VERSION (4)
288 #define EEPROM_6000_EEPROM_VERSION (0x434)
291 #define EEPROM_6050_TX_POWER_VERSION (4)
292 #define EEPROM_6050_EEPROM_VERSION (0x532)
294 /* 6x50g2 Specific */
295 #define EEPROM_6050G2_TX_POWER_VERSION (6)
296 #define EEPROM_6050G2_EEPROM_VERSION (0x553)
298 /* 6x00g2 Specific */
299 #define EEPROM_6000G2_TX_POWER_VERSION (6)
300 #define EEPROM_6000G2_EEPROM_VERSION (0x709)
303 /* lower blocks contain EEPROM image and calibration data */
304 #define OTP_LOW_IMAGE_SIZE (2 * 512 * sizeof(u16)) /* 2 KB */
305 /* high blocks contain PAPD data */
306 #define OTP_HIGH_IMAGE_SIZE_6x00 (6 * 512 * sizeof(u16)) /* 6 KB */
307 #define OTP_HIGH_IMAGE_SIZE_1000 (0x200 * sizeof(u16)) /* 1024 bytes */
308 #define OTP_MAX_LL_ITEMS_1000 (3) /* OTP blocks for 1000 */
309 #define OTP_MAX_LL_ITEMS_6x00 (4) /* OTP blocks for 6x00 */
310 #define OTP_MAX_LL_ITEMS_6x50 (7) /* OTP blocks for 6x50 */
313 extern const u8 iwl_eeprom_band_1[14];
316 * factory calibration data for one txpower level, on one channel,
317 * measured on one of the 2 tx chains (radio transmitter and associated
318 * antenna). EEPROM contains:
320 * 1) Temperature (degrees Celsius) of device when measurement was made.
322 * 2) Gain table index used to achieve the target measurement power.
323 * This refers to the "well-known" gain tables (see iwl-4965-hw.h).
325 * 3) Actual measured output power, in half-dBm ("34" = 17 dBm).
327 * 4) RF power amplifier detector level measurement (not used).
329 struct iwl_eeprom_calib_measure {
330 u8 temperature; /* Device temperature (Celsius) */
331 u8 gain_idx; /* Index into gain table */
332 u8 actual_pow; /* Measured RF output power, half-dBm */
333 s8 pa_det; /* Power amp detector level (not used) */
338 * measurement set for one channel. EEPROM contains:
340 * 1) Channel number measured
342 * 2) Measurements for each of 3 power levels for each of 2 radio transmitters
343 * (a.k.a. "tx chains") (6 measurements altogether)
345 struct iwl_eeprom_calib_ch_info {
347 struct iwl_eeprom_calib_measure
348 measurements[EEPROM_TX_POWER_TX_CHAINS]
349 [EEPROM_TX_POWER_MEASUREMENTS];
353 * txpower subband info.
355 * For each frequency subband, EEPROM contains the following:
357 * 1) First and last channels within range of the subband. "0" values
358 * indicate that this sample set is not being used.
360 * 2) Sample measurement sets for 2 channels close to the range endpoints.
362 struct iwl_eeprom_calib_subband_info {
363 u8 ch_from; /* channel number of lowest channel in subband */
364 u8 ch_to; /* channel number of highest channel in subband */
365 struct iwl_eeprom_calib_ch_info ch1;
366 struct iwl_eeprom_calib_ch_info ch2;
371 * txpower calibration info. EEPROM contains:
373 * 1) Factory-measured saturation power levels (maximum levels at which
374 * tx power amplifier can output a signal without too much distortion).
375 * There is one level for 2.4 GHz band and one for 5 GHz band. These
376 * values apply to all channels within each of the bands.
378 * 2) Factory-measured power supply voltage level. This is assumed to be
379 * constant (i.e. same value applies to all channels/bands) while the
380 * factory measurements are being made.
382 * 3) Up to 8 sets of factory-measured txpower calibration values.
383 * These are for different frequency ranges, since txpower gain
384 * characteristics of the analog radio circuitry vary with frequency.
386 * Not all sets need to be filled with data;
387 * struct iwl_eeprom_calib_subband_info contains range of channels
388 * (0 if unused) for each set of data.
390 struct iwl_eeprom_calib_info {
391 u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */
392 u8 saturation_power52; /* half-dBm */
393 __le16 voltage; /* signed */
394 struct iwl_eeprom_calib_subband_info
395 band_info[EEPROM_TX_POWER_BANDS];
399 #define ADDRESS_MSK 0x0000FFFF
400 #define INDIRECT_TYPE_MSK 0x000F0000
401 #define INDIRECT_HOST 0x00010000
402 #define INDIRECT_GENERAL 0x00020000
403 #define INDIRECT_REGULATORY 0x00030000
404 #define INDIRECT_CALIBRATION 0x00040000
405 #define INDIRECT_PROCESS_ADJST 0x00050000
406 #define INDIRECT_OTHERS 0x00060000
407 #define INDIRECT_TXP_LIMIT 0x00070000
408 #define INDIRECT_TXP_LIMIT_SIZE 0x00080000
409 #define INDIRECT_ADDRESS 0x00100000
412 #define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
413 #define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
414 #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
415 #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
416 #define EEPROM_VERSION (2*0x44) /* 2 bytes */
417 #define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */
418 #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
419 #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
420 #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */
421 #define EEPROM_3945_M_VERSION (2*0x4A) /* 1 bytes */
422 #define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */
424 /* The following masks are to be applied on EEPROM_RADIO_CONFIG */
425 #define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */
426 #define EEPROM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */
427 #define EEPROM_RF_CFG_DASH_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */
428 #define EEPROM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */
429 #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */
430 #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */
432 #define EEPROM_3945_RF_CFG_TYPE_MAX 0x0
433 #define EEPROM_4965_RF_CFG_TYPE_MAX 0x1
435 /* Radio Config for 5000 and up */
436 #define EEPROM_RF_CONFIG_TYPE_R3x3 0x0
437 #define EEPROM_RF_CONFIG_TYPE_R2x2 0x1
438 #define EEPROM_RF_CONFIG_TYPE_R1x2 0x2
439 #define EEPROM_RF_CONFIG_TYPE_MAX 0x3
442 * Per-channel regulatory data.
444 * Each channel that *might* be supported by iwl has a fixed location
445 * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
448 * Entries immediately below are for 20 MHz channel width. HT40 (40 MHz)
449 * channels (only for 4965, not supported by 3945) appear later in the EEPROM.
451 * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
453 #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */
454 #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */
455 #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */
458 * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
459 * 5.0 GHz channels 7, 8, 11, 12, 16
460 * (4915-5080MHz) (none of these is ever supported)
462 #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */
463 #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */
466 * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
469 #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */
470 #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */
473 * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
476 #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */
477 #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */
480 * 5.7 GHz channels 145, 149, 153, 157, 161, 165
483 #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */
484 #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */
487 * 2.4 GHz HT40 channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11)
489 * The channel listed is the center of the lower 20 MHz half of the channel.
490 * The overall center frequency is actually 2 channels (10 MHz) above that,
491 * and the upper half of each HT40 channel is centered 4 channels (20 MHz) away
492 * from the lower half; e.g. the upper half of HT40 channel 1 is channel 5,
493 * and the overall HT40 channel width centers on channel 3.
495 * NOTE: The RXON command uses 20 MHz channel numbers to specify the
496 * control channel to which to tune. RXON also specifies whether the
497 * control channel is the upper or lower half of a HT40 channel.
499 * NOTE: 4965 does not support HT40 channels on 2.4 GHz.
501 #define EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS (2*0xA0) /* 14 bytes */
504 * 5.2 GHz HT40 channels 36 (40), 44 (48), 52 (56), 60 (64),
505 * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161)
507 #define EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS (2*0xA8) /* 22 bytes */
509 #define EEPROM_REGULATORY_BAND_NO_HT40 (0)
511 struct iwl_eeprom_ops {
512 const u32 regulatory_bands[7];
513 int (*acquire_semaphore) (struct iwl_priv *priv);
514 void (*release_semaphore) (struct iwl_priv *priv);
515 u16 (*calib_version) (struct iwl_priv *priv);
516 const u8* (*query_addr) (const struct iwl_priv *priv, size_t offset);
517 void (*update_enhanced_txpower) (struct iwl_priv *priv);
521 int iwl_eeprom_init(struct iwl_priv *priv);
522 void iwl_eeprom_free(struct iwl_priv *priv);
523 int iwl_eeprom_check_version(struct iwl_priv *priv);
524 const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset);
525 int iwlcore_eeprom_verify_signature(struct iwl_priv *priv);
526 u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset);
527 const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset);
528 int iwl_init_channel_map(struct iwl_priv *priv);
529 void iwl_free_channel_map(struct iwl_priv *priv);
530 const struct iwl_channel_info *iwl_get_channel_info(
531 const struct iwl_priv *priv,
532 enum ieee80211_band band, u16 channel);
534 #endif /* __iwl_eeprom_h__ */