1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/etherdevice.h>
31 #include <net/mac80211.h>
32 #include <asm/unaligned.h>
33 #include "iwl-eeprom.h"
38 #include "iwl-calib.h"
39 #include "iwl-helpers.h"
40 /************************** RX-FUNCTIONS ****************************/
42 * Rx theory of operation
44 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
45 * each of which point to Receive Buffers to be filled by the NIC. These get
46 * used not only for Rx frames, but for any command response or notification
47 * from the NIC. The driver and NIC manage the Rx buffers by means
48 * of indexes into the circular buffer.
51 * The host/firmware share two index registers for managing the Rx buffers.
53 * The READ index maps to the first position that the firmware may be writing
54 * to -- the driver can read up to (but not including) this position and get
56 * The READ index is managed by the firmware once the card is enabled.
58 * The WRITE index maps to the last position the driver has read from -- the
59 * position preceding WRITE is the last slot the firmware can place a packet.
61 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
64 * During initialization, the host sets up the READ queue position to the first
65 * INDEX position, and WRITE to the last (READ - 1 wrapped)
67 * When the firmware places a packet in a buffer, it will advance the READ index
68 * and fire the RX interrupt. The driver can then query the READ index and
69 * process as many packets as possible, moving the WRITE index forward as it
70 * resets the Rx queue buffers with new memory.
72 * The management in the driver is as follows:
73 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
74 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
75 * to replenish the iwl->rxq->rx_free.
76 * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
77 * iwl->rxq is replenished and the READ INDEX is updated (updating the
78 * 'processed' and 'read' driver indexes as well)
79 * + A received packet is processed and handed to the kernel network stack,
80 * detached from the iwl->rxq. The driver 'processed' index is updated.
81 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
82 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
83 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
84 * were enough free buffers and RX_STALLED is set it is cleared.
89 * iwl_rx_queue_alloc() Allocates rx_free
90 * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
91 * iwl_rx_queue_restock
92 * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
93 * queue, updates firmware pointers, and updates
94 * the WRITE index. If insufficient rx_free buffers
95 * are available, schedules iwl_rx_replenish
97 * -- enable interrupts --
98 * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
99 * READ INDEX, detaching the SKB from the pool.
100 * Moves the packet buffer from queue to rx_used.
101 * Calls iwl_rx_queue_restock to refill any empty
108 * iwl_rx_queue_space - Return number of free slots available in queue.
110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
112 int s = q->read - q->write;
115 /* keep some buffer to not confuse full and empty queue */
121 EXPORT_SYMBOL(iwl_rx_queue_space);
124 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
129 u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
133 spin_lock_irqsave(&q->lock, flags);
135 if (q->need_update == 0)
138 /* If power-saving is in use, make sure device is awake */
139 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
140 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
142 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
143 iwl_set_bit(priv, CSR_GP_CNTRL,
144 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
148 q->write_actual = (q->write & ~0x7);
149 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
151 /* Else device is assumed to be awake */
153 /* Device expects a multiple of 8 */
154 q->write_actual = (q->write & ~0x7);
155 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
161 spin_unlock_irqrestore(&q->lock, flags);
164 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
166 * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
168 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
171 return cpu_to_le32((u32)(dma_addr >> 8));
175 * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
177 * If there are slots in the RX queue that need to be restocked,
178 * and we have free pre-allocated buffers, fill the ranks as much
179 * as we can, pulling from rx_free.
181 * This moves the 'write' index forward to catch up with 'processed', and
182 * also updates the memory address in the firmware to reference the new
185 int iwl_rx_queue_restock(struct iwl_priv *priv)
187 struct iwl_rx_queue *rxq = &priv->rxq;
188 struct list_head *element;
189 struct iwl_rx_mem_buffer *rxb;
194 spin_lock_irqsave(&rxq->lock, flags);
195 write = rxq->write & ~0x7;
196 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
197 /* Get next free Rx buffer, remove from free list */
198 element = rxq->rx_free.next;
199 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
202 /* Point to Rx buffer via next RBD in circular buffer */
203 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->aligned_dma_addr);
204 rxq->queue[rxq->write] = rxb;
205 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
208 spin_unlock_irqrestore(&rxq->lock, flags);
209 /* If the pre-allocated buffer pool is dropping low, schedule to
211 if (rxq->free_count <= RX_LOW_WATERMARK)
212 queue_work(priv->workqueue, &priv->rx_replenish);
215 /* If we've added more space for the firmware to place data, tell it.
216 * Increment device's write pointer in multiples of 8. */
217 if (rxq->write_actual != (rxq->write & ~0x7)) {
218 spin_lock_irqsave(&rxq->lock, flags);
219 rxq->need_update = 1;
220 spin_unlock_irqrestore(&rxq->lock, flags);
221 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
226 EXPORT_SYMBOL(iwl_rx_queue_restock);
230 * iwl_rx_replenish - Move all used packet from rx_used to rx_free
232 * When moving to rx_free an SKB is allocated for the slot.
234 * Also restock the Rx queue via iwl_rx_queue_restock.
235 * This is called as a scheduled work item (except for during initialization)
237 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
239 struct iwl_rx_queue *rxq = &priv->rxq;
240 struct list_head *element;
241 struct iwl_rx_mem_buffer *rxb;
246 spin_lock_irqsave(&rxq->lock, flags);
247 if (list_empty(&rxq->rx_used)) {
248 spin_unlock_irqrestore(&rxq->lock, flags);
251 spin_unlock_irqrestore(&rxq->lock, flags);
253 /* Alloc a new receive buffer */
254 skb = alloc_skb(priv->hw_params.rx_buf_size + 256,
258 IWL_CRIT(priv, "Can not allocate SKB buffers\n");
259 /* We don't reschedule replenish work here -- we will
260 * call the restock method and if it still needs
261 * more buffers it will schedule replenish */
265 spin_lock_irqsave(&rxq->lock, flags);
267 if (list_empty(&rxq->rx_used)) {
268 spin_unlock_irqrestore(&rxq->lock, flags);
269 dev_kfree_skb_any(skb);
272 element = rxq->rx_used.next;
273 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
276 spin_unlock_irqrestore(&rxq->lock, flags);
279 /* Get physical address of RB/SKB */
280 rxb->real_dma_addr = pci_map_single(
283 priv->hw_params.rx_buf_size + 256,
285 /* dma address must be no more than 36 bits */
286 BUG_ON(rxb->real_dma_addr & ~DMA_BIT_MASK(36));
287 /* and also 256 byte aligned! */
288 rxb->aligned_dma_addr = ALIGN(rxb->real_dma_addr, 256);
289 skb_reserve(rxb->skb, rxb->aligned_dma_addr - rxb->real_dma_addr);
291 spin_lock_irqsave(&rxq->lock, flags);
293 list_add_tail(&rxb->list, &rxq->rx_free);
295 priv->alloc_rxb_skb++;
297 spin_unlock_irqrestore(&rxq->lock, flags);
301 void iwl_rx_replenish(struct iwl_priv *priv)
305 iwl_rx_allocate(priv, GFP_KERNEL);
307 spin_lock_irqsave(&priv->lock, flags);
308 iwl_rx_queue_restock(priv);
309 spin_unlock_irqrestore(&priv->lock, flags);
311 EXPORT_SYMBOL(iwl_rx_replenish);
313 void iwl_rx_replenish_now(struct iwl_priv *priv)
315 iwl_rx_allocate(priv, GFP_ATOMIC);
317 iwl_rx_queue_restock(priv);
319 EXPORT_SYMBOL(iwl_rx_replenish_now);
322 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
323 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
324 * This free routine walks the list of POOL entries and if SKB is set to
325 * non NULL it is unmapped and freed
327 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
330 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
331 if (rxq->pool[i].skb != NULL) {
332 pci_unmap_single(priv->pci_dev,
333 rxq->pool[i].real_dma_addr,
334 priv->hw_params.rx_buf_size + 256,
336 dev_kfree_skb(rxq->pool[i].skb);
340 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
342 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
343 rxq->rb_stts, rxq->rb_stts_dma);
347 EXPORT_SYMBOL(iwl_rx_queue_free);
349 int iwl_rx_queue_alloc(struct iwl_priv *priv)
351 struct iwl_rx_queue *rxq = &priv->rxq;
352 struct pci_dev *dev = priv->pci_dev;
355 spin_lock_init(&rxq->lock);
356 INIT_LIST_HEAD(&rxq->rx_free);
357 INIT_LIST_HEAD(&rxq->rx_used);
359 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
360 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
364 rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
369 /* Fill the rx_used queue with _all_ of the Rx buffers */
370 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
371 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
373 /* Set us so that we have processed and used all buffers, but have
374 * not restocked the Rx queue with fresh buffers */
375 rxq->read = rxq->write = 0;
376 rxq->write_actual = 0;
378 rxq->need_update = 0;
382 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
387 EXPORT_SYMBOL(iwl_rx_queue_alloc);
389 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
393 spin_lock_irqsave(&rxq->lock, flags);
394 INIT_LIST_HEAD(&rxq->rx_free);
395 INIT_LIST_HEAD(&rxq->rx_used);
396 /* Fill the rx_used queue with _all_ of the Rx buffers */
397 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
398 /* In the reset function, these buffers may have been allocated
399 * to an SKB, so we need to unmap and free potential storage */
400 if (rxq->pool[i].skb != NULL) {
401 pci_unmap_single(priv->pci_dev,
402 rxq->pool[i].real_dma_addr,
403 priv->hw_params.rx_buf_size + 256,
405 priv->alloc_rxb_skb--;
406 dev_kfree_skb(rxq->pool[i].skb);
407 rxq->pool[i].skb = NULL;
409 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
412 /* Set us so that we have processed and used all buffers, but have
413 * not restocked the Rx queue with fresh buffers */
414 rxq->read = rxq->write = 0;
415 rxq->write_actual = 0;
417 spin_unlock_irqrestore(&rxq->lock, flags);
420 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
423 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
424 u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
426 if (!priv->cfg->use_isr_legacy)
427 rb_timeout = RX_RB_TIMEOUT;
429 if (priv->cfg->mod_params->amsdu_size_8K)
430 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
432 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
435 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
437 /* Reset driver's Rx queue write index */
438 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
440 /* Tell device where to find RBD circular buffer in DRAM */
441 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
442 (u32)(rxq->dma_addr >> 8));
444 /* Tell device where in DRAM to update its Rx status */
445 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
446 rxq->rb_stts_dma >> 4);
449 * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
450 * the credit mechanism in 5000 HW RX FIFO
451 * Direct rx interrupts to hosts
452 * Rx buffer size 4 or 8k
456 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
457 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
458 FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
459 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
460 FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
462 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
463 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
465 iwl_write32(priv, CSR_INT_COALESCING, 0x40);
470 int iwl_rxq_stop(struct iwl_priv *priv)
474 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
475 iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
476 FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
480 EXPORT_SYMBOL(iwl_rxq_stop);
482 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
483 struct iwl_rx_mem_buffer *rxb)
486 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
487 struct iwl_missed_beacon_notif *missed_beacon;
489 missed_beacon = &pkt->u.missed_beacon;
490 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
491 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
492 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
493 le32_to_cpu(missed_beacon->total_missed_becons),
494 le32_to_cpu(missed_beacon->num_recvd_beacons),
495 le32_to_cpu(missed_beacon->num_expected_beacons));
496 if (!test_bit(STATUS_SCANNING, &priv->status))
497 iwl_init_sensitivity(priv);
500 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
503 /* Calculate noise level, based on measurements during network silence just
504 * before arriving beacon. This measurement can be done only if we know
505 * exactly when to expect beacons, therefore only when we're associated. */
506 static void iwl_rx_calc_noise(struct iwl_priv *priv)
508 struct statistics_rx_non_phy *rx_info
509 = &(priv->statistics.rx.general);
510 int num_active_rx = 0;
511 int total_silence = 0;
513 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
515 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
517 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
520 total_silence += bcn_silence_a;
524 total_silence += bcn_silence_b;
528 total_silence += bcn_silence_c;
532 /* Average among active antennas */
534 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
536 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
538 IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
539 bcn_silence_a, bcn_silence_b, bcn_silence_c,
540 priv->last_rx_noise);
543 #define REG_RECALIB_PERIOD (60)
545 void iwl_rx_statistics(struct iwl_priv *priv,
546 struct iwl_rx_mem_buffer *rxb)
549 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
551 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
552 (int)sizeof(priv->statistics),
553 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
555 change = ((priv->statistics.general.temperature !=
556 pkt->u.stats.general.temperature) ||
557 ((priv->statistics.flag &
558 STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
559 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
561 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
563 set_bit(STATUS_STATISTICS, &priv->status);
565 /* Reschedule the statistics timer to occur in
566 * REG_RECALIB_PERIOD seconds to ensure we get a
567 * thermal update even if the uCode doesn't give
569 mod_timer(&priv->statistics_periodic, jiffies +
570 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
572 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
573 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
574 iwl_rx_calc_noise(priv);
575 queue_work(priv->workqueue, &priv->run_time_calib_work);
578 iwl_leds_background(priv);
580 if (priv->cfg->ops->lib->temp_ops.temperature && change)
581 priv->cfg->ops->lib->temp_ops.temperature(priv);
583 EXPORT_SYMBOL(iwl_rx_statistics);
585 #define PERFECT_RSSI (-20) /* dBm */
586 #define WORST_RSSI (-95) /* dBm */
587 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
589 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
590 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
591 * about formulas used below. */
592 static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
595 int degradation = PERFECT_RSSI - rssi_dbm;
597 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
598 * as indicator; formula is (signal dbm - noise dbm).
599 * SNR at or above 40 is a great signal (100%).
600 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
601 * Weakest usable signal is usually 10 - 15 dB SNR. */
603 if (rssi_dbm - noise_dbm >= 40)
605 else if (rssi_dbm < noise_dbm)
607 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
609 /* Else use just the signal level.
610 * This formula is a least squares fit of data points collected and
611 * compared with a reference system that had a percentage (%) display
612 * for signal quality. */
614 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
615 (15 * RSSI_RANGE + 62 * degradation)) /
616 (RSSI_RANGE * RSSI_RANGE);
620 else if (sig_qual < 1)
626 /* Calc max signal level (dBm) among 3 possible receivers */
627 static inline int iwl_calc_rssi(struct iwl_priv *priv,
628 struct iwl_rx_phy_res *rx_resp)
630 return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
633 #ifdef CONFIG_IWLWIFI_DEBUG
635 * iwl_dbg_report_frame - dump frame to syslog during debug sessions
637 * You may hack this function to show different aspects of received frames,
638 * including selective frame dumps.
639 * group100 parameter selects whether to show 1 out of 100 good data frames.
640 * All beacon and probe response frames are printed.
642 static void iwl_dbg_report_frame(struct iwl_priv *priv,
643 struct iwl_rx_phy_res *phy_res, u16 length,
644 struct ieee80211_hdr *header, int group100)
647 u32 print_summary = 0;
648 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
659 if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
663 fc = header->frame_control;
664 seq_ctl = le16_to_cpu(header->seq_ctrl);
667 channel = le16_to_cpu(phy_res->channel);
668 phy_flags = le16_to_cpu(phy_res->phy_flags);
669 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
671 /* signal statistics */
672 rssi = iwl_calc_rssi(priv, phy_res);
673 tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
675 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
677 /* if data frame is to us and all is good,
678 * (optionally) print summary for only 1 out of every 100 */
679 if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
680 cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
683 print_summary = 1; /* print each frame */
684 else if (priv->framecnt_to_us < 100) {
685 priv->framecnt_to_us++;
688 priv->framecnt_to_us = 0;
693 /* print summary for all other frames */
704 else if (ieee80211_has_retry(fc))
706 else if (ieee80211_is_assoc_resp(fc))
708 else if (ieee80211_is_reassoc_resp(fc))
710 else if (ieee80211_is_probe_resp(fc)) {
712 print_dump = 1; /* dump frame contents */
713 } else if (ieee80211_is_beacon(fc)) {
715 print_dump = 1; /* dump frame contents */
716 } else if (ieee80211_is_atim(fc))
718 else if (ieee80211_is_auth(fc))
720 else if (ieee80211_is_deauth(fc))
722 else if (ieee80211_is_disassoc(fc))
727 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
728 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
732 bitrate = iwl_rates[rate_idx].ieee / 2;
735 /* print frame summary.
736 * MAC addresses show just the last byte (for brevity),
737 * but you can hack it to show more, if you'd like to. */
739 IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
740 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
741 title, le16_to_cpu(fc), header->addr1[5],
742 length, rssi, channel, bitrate);
744 /* src/dst addresses assume managed mode */
745 IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
746 "len=%u, rssi=%d, tim=%lu usec, "
747 "phy=0x%02x, chnl=%d\n",
748 title, le16_to_cpu(fc), header->addr1[5],
749 header->addr3[5], length, rssi,
750 tsf_low - priv->scan_start_tsf,
755 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
760 * returns non-zero if packet should be dropped
762 int iwl_set_decrypted_flag(struct iwl_priv *priv,
763 struct ieee80211_hdr *hdr,
765 struct ieee80211_rx_status *stats)
767 u16 fc = le16_to_cpu(hdr->frame_control);
769 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
772 if (!(fc & IEEE80211_FCTL_PROTECTED))
775 IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
776 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
777 case RX_RES_STATUS_SEC_TYPE_TKIP:
778 /* The uCode has got a bad phase 1 Key, pushes the packet.
779 * Decryption will be done in SW. */
780 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
781 RX_RES_STATUS_BAD_KEY_TTAK)
784 case RX_RES_STATUS_SEC_TYPE_WEP:
785 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
786 RX_RES_STATUS_BAD_ICV_MIC) {
787 /* bad ICV, the packet is destroyed since the
788 * decryption is inplace, drop it */
789 IWL_DEBUG_RX(priv, "Packet destroyed\n");
792 case RX_RES_STATUS_SEC_TYPE_CCMP:
793 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
794 RX_RES_STATUS_DECRYPT_OK) {
795 IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
796 stats->flag |= RX_FLAG_DECRYPTED;
805 EXPORT_SYMBOL(iwl_set_decrypted_flag);
807 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
811 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
812 RX_RES_STATUS_STATION_FOUND)
813 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
814 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
816 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
818 /* packet was not encrypted */
819 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
820 RX_RES_STATUS_SEC_TYPE_NONE)
823 /* packet was encrypted with unknown alg */
824 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
825 RX_RES_STATUS_SEC_TYPE_ERR)
828 /* decryption was not done in HW */
829 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
830 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
833 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
835 case RX_RES_STATUS_SEC_TYPE_CCMP:
836 /* alg is CCM: check MIC only */
837 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
839 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
841 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
845 case RX_RES_STATUS_SEC_TYPE_TKIP:
846 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
848 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
851 /* fall through if TTAK OK */
853 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
854 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
856 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
860 IWL_DEBUG_RX(priv, "decrypt_in:0x%x decrypt_out = 0x%x\n",
861 decrypt_in, decrypt_out);
866 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
867 struct ieee80211_hdr *hdr,
870 struct iwl_rx_mem_buffer *rxb,
871 struct ieee80211_rx_status *stats)
873 /* We only process data packets if the interface is open */
874 if (unlikely(!priv->is_open)) {
875 IWL_DEBUG_DROP_LIMIT(priv,
876 "Dropping packet while interface is not open.\n");
880 /* In case of HW accelerated crypto and bad decryption, drop */
881 if (!priv->cfg->mod_params->sw_crypto &&
882 iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
885 /* Resize SKB from mac header to end of packet */
886 skb_reserve(rxb->skb, (void *)hdr - (void *)rxb->skb->data);
887 skb_put(rxb->skb, len);
889 iwl_update_stats(priv, false, hdr->frame_control, len);
890 memcpy(IEEE80211_SKB_RXCB(rxb->skb), stats, sizeof(*stats));
891 ieee80211_rx_irqsafe(priv->hw, rxb->skb);
892 priv->alloc_rxb_skb--;
896 /* This is necessary only for a number of statistics, see the caller. */
897 static int iwl_is_network_packet(struct iwl_priv *priv,
898 struct ieee80211_hdr *header)
900 /* Filter incoming packets to determine if they are targeted toward
901 * this network, discarding packets coming from ourselves */
902 switch (priv->iw_mode) {
903 case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */
904 /* packets to our IBSS update information */
905 return !compare_ether_addr(header->addr3, priv->bssid);
906 case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
907 /* packets to our IBSS update information */
908 return !compare_ether_addr(header->addr2, priv->bssid);
914 /* Called for REPLY_RX (legacy ABG frames), or
915 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
916 void iwl_rx_reply_rx(struct iwl_priv *priv,
917 struct iwl_rx_mem_buffer *rxb)
919 struct ieee80211_hdr *header;
920 struct ieee80211_rx_status rx_status;
921 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
922 struct iwl_rx_phy_res *phy_res;
923 __le32 rx_pkt_status;
924 struct iwl4965_rx_mpdu_res_start *amsdu;
931 * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
932 * REPLY_RX: physical layer info is in this buffer
933 * REPLY_RX_MPDU_CMD: physical layer info was sent in separate
934 * command and cached in priv->last_phy_res
936 * Here we set up local variables depending on which command is
939 if (pkt->hdr.cmd == REPLY_RX) {
940 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
941 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
942 + phy_res->cfg_phy_cnt);
944 len = le16_to_cpu(phy_res->byte_count);
945 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
946 phy_res->cfg_phy_cnt + len);
947 ampdu_status = le32_to_cpu(rx_pkt_status);
949 if (!priv->last_phy_res[0]) {
950 IWL_ERR(priv, "MPDU frame without cached PHY data\n");
953 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
954 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
955 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
956 len = le16_to_cpu(amsdu->byte_count);
957 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
958 ampdu_status = iwl_translate_rx_status(priv,
959 le32_to_cpu(rx_pkt_status));
962 if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
963 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
964 phy_res->cfg_phy_cnt);
968 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
969 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
970 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
971 le32_to_cpu(rx_pkt_status));
975 /* This will be used in several places later */
976 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
978 /* rx_status carries information about the packet to mac80211 */
979 rx_status.mactime = le64_to_cpu(phy_res->timestamp);
981 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
982 rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
983 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
985 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
988 /* TSF isn't reliable. In order to allow smooth user experience,
989 * this W/A doesn't propagate it to the mac80211 */
990 /*rx_status.flag |= RX_FLAG_TSFT;*/
992 priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
994 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
995 rx_status.signal = iwl_calc_rssi(priv, phy_res);
997 /* Meaningful noise values are available only from beacon statistics,
998 * which are gathered only when associated, and indicate noise
999 * only for the associated network channel ...
1000 * Ignore these noise values while scanning (other channels) */
1001 if (iwl_is_associated(priv) &&
1002 !test_bit(STATUS_SCANNING, &priv->status)) {
1003 rx_status.noise = priv->last_rx_noise;
1004 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1007 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1008 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1011 /* Reset beacon noise level if not associated. */
1012 if (!iwl_is_associated(priv))
1013 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1015 #ifdef CONFIG_IWLWIFI_DEBUG
1016 /* Set "1" to report good data frames in groups of 100 */
1017 if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1018 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1020 iwl_dbg_log_rx_data_frame(priv, len, header);
1021 IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, qual %d, TSF %llu\n",
1022 rx_status.signal, rx_status.noise, rx_status.qual,
1023 (unsigned long long)rx_status.mactime);
1028 * It seems that the antenna field in the phy flags value
1029 * is actually a bit field. This is undefined by radiotap,
1030 * it wants an actual antenna number but I always get "7"
1031 * for most legacy frames I receive indicating that the
1032 * same frame was received on all three RX chains.
1034 * I think this field should be removed in favor of a
1035 * new 802.11n radiotap field "RX chains" that is defined
1039 le16_to_cpu(phy_res->phy_flags & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1040 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1042 /* set the preamble flag if appropriate */
1043 if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1044 rx_status.flag |= RX_FLAG_SHORTPRE;
1046 /* Set up the HT phy flags */
1047 if (rate_n_flags & RATE_MCS_HT_MSK)
1048 rx_status.flag |= RX_FLAG_HT;
1049 if (rate_n_flags & RATE_MCS_HT40_MSK)
1050 rx_status.flag |= RX_FLAG_40MHZ;
1051 if (rate_n_flags & RATE_MCS_SGI_MSK)
1052 rx_status.flag |= RX_FLAG_SHORT_GI;
1054 if (iwl_is_network_packet(priv, header)) {
1055 priv->last_rx_rssi = rx_status.signal;
1056 priv->last_beacon_time = priv->ucode_beacon_time;
1057 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1060 fc = le16_to_cpu(header->frame_control);
1061 switch (fc & IEEE80211_FCTL_FTYPE) {
1062 case IEEE80211_FTYPE_MGMT:
1063 case IEEE80211_FTYPE_DATA:
1064 if (priv->iw_mode == NL80211_IFTYPE_AP)
1065 iwl_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
1069 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1075 EXPORT_SYMBOL(iwl_rx_reply_rx);
1077 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1078 * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1079 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1080 struct iwl_rx_mem_buffer *rxb)
1082 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1083 priv->last_phy_res[0] = 1;
1084 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1085 sizeof(struct iwl_rx_phy_res));
1087 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);