2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
91 struct mwl8k_device_info {
95 struct rxd_ops *ap_rxd_ops;
98 struct mwl8k_rx_queue {
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma)
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
125 struct sk_buff **skb;
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
132 struct mwl8k_device_info *device_info;
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
141 /* hardware/firmware parameters */
143 struct rxd_ops *rxd_ops;
145 /* firmware access */
146 struct mutex fw_mutex;
147 struct task_struct *fw_mutex_owner;
149 struct completion *hostcmd_wait;
151 /* lock held over TX and TX reap */
154 /* TX quiesce completion, protected by fw_mutex and tx_lock */
155 struct completion *tx_wait;
157 struct ieee80211_vif *vif;
159 struct ieee80211_channel *current_channel;
161 /* power management status cookie from firmware */
163 dma_addr_t cookie_dma;
170 * Running count of TX packets in flight, to avoid
171 * iterating over the transmit rings each time.
175 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
176 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
179 struct ieee80211_supported_band band;
180 struct ieee80211_channel channels[14];
181 struct ieee80211_rate rates[14];
184 bool radio_short_preamble;
185 bool sniffer_enabled;
188 struct work_struct sta_notify_worker;
189 spinlock_t sta_notify_list_lock;
190 struct list_head sta_notify_list;
192 /* XXX need to convert this to handle multiple interfaces */
194 u8 capture_bssid[ETH_ALEN];
195 struct sk_buff *beacon_skb;
198 * This FJ worker has to be global as it is scheduled from the
199 * RX handler. At this point we don't know which interface it
200 * belongs to until the list of bssids waiting to complete join
203 struct work_struct finalize_join_worker;
205 /* Tasklet to perform TX reclaim. */
206 struct tasklet_struct poll_tx_task;
208 /* Tasklet to perform RX. */
209 struct tasklet_struct poll_rx_task;
212 /* Per interface specific private data */
214 /* Non AMPDU sequence number assigned by driver. */
217 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
220 /* Index into station database. Returned by UPDATE_STADB. */
223 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
225 static const struct ieee80211_channel mwl8k_channels[] = {
226 { .center_freq = 2412, .hw_value = 1, },
227 { .center_freq = 2417, .hw_value = 2, },
228 { .center_freq = 2422, .hw_value = 3, },
229 { .center_freq = 2427, .hw_value = 4, },
230 { .center_freq = 2432, .hw_value = 5, },
231 { .center_freq = 2437, .hw_value = 6, },
232 { .center_freq = 2442, .hw_value = 7, },
233 { .center_freq = 2447, .hw_value = 8, },
234 { .center_freq = 2452, .hw_value = 9, },
235 { .center_freq = 2457, .hw_value = 10, },
236 { .center_freq = 2462, .hw_value = 11, },
237 { .center_freq = 2467, .hw_value = 12, },
238 { .center_freq = 2472, .hw_value = 13, },
239 { .center_freq = 2484, .hw_value = 14, },
242 static const struct ieee80211_rate mwl8k_rates[] = {
243 { .bitrate = 10, .hw_value = 2, },
244 { .bitrate = 20, .hw_value = 4, },
245 { .bitrate = 55, .hw_value = 11, },
246 { .bitrate = 110, .hw_value = 22, },
247 { .bitrate = 220, .hw_value = 44, },
248 { .bitrate = 60, .hw_value = 12, },
249 { .bitrate = 90, .hw_value = 18, },
250 { .bitrate = 120, .hw_value = 24, },
251 { .bitrate = 180, .hw_value = 36, },
252 { .bitrate = 240, .hw_value = 48, },
253 { .bitrate = 360, .hw_value = 72, },
254 { .bitrate = 480, .hw_value = 96, },
255 { .bitrate = 540, .hw_value = 108, },
256 { .bitrate = 720, .hw_value = 144, },
259 /* Set or get info from Firmware */
260 #define MWL8K_CMD_SET 0x0001
261 #define MWL8K_CMD_GET 0x0000
263 /* Firmware command codes */
264 #define MWL8K_CMD_CODE_DNLD 0x0001
265 #define MWL8K_CMD_GET_HW_SPEC 0x0003
266 #define MWL8K_CMD_SET_HW_SPEC 0x0004
267 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
268 #define MWL8K_CMD_GET_STAT 0x0014
269 #define MWL8K_CMD_RADIO_CONTROL 0x001c
270 #define MWL8K_CMD_RF_TX_POWER 0x001e
271 #define MWL8K_CMD_RF_ANTENNA 0x0020
272 #define MWL8K_CMD_SET_BEACON 0x0100
273 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
274 #define MWL8K_CMD_SET_POST_SCAN 0x0108
275 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
276 #define MWL8K_CMD_SET_AID 0x010d
277 #define MWL8K_CMD_SET_RATE 0x0110
278 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
279 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
280 #define MWL8K_CMD_SET_SLOT 0x0114
281 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
282 #define MWL8K_CMD_SET_WMM_MODE 0x0123
283 #define MWL8K_CMD_MIMO_CONFIG 0x0125
284 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
285 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
286 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
287 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
288 #define MWL8K_CMD_BSS_START 0x1100
289 #define MWL8K_CMD_SET_NEW_STN 0x1111
290 #define MWL8K_CMD_UPDATE_STADB 0x1123
292 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
294 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
295 snprintf(buf, bufsize, "%s", #x);\
298 switch (cmd & ~0x8000) {
299 MWL8K_CMDNAME(CODE_DNLD);
300 MWL8K_CMDNAME(GET_HW_SPEC);
301 MWL8K_CMDNAME(SET_HW_SPEC);
302 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
303 MWL8K_CMDNAME(GET_STAT);
304 MWL8K_CMDNAME(RADIO_CONTROL);
305 MWL8K_CMDNAME(RF_TX_POWER);
306 MWL8K_CMDNAME(RF_ANTENNA);
307 MWL8K_CMDNAME(SET_BEACON);
308 MWL8K_CMDNAME(SET_PRE_SCAN);
309 MWL8K_CMDNAME(SET_POST_SCAN);
310 MWL8K_CMDNAME(SET_RF_CHANNEL);
311 MWL8K_CMDNAME(SET_AID);
312 MWL8K_CMDNAME(SET_RATE);
313 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
314 MWL8K_CMDNAME(RTS_THRESHOLD);
315 MWL8K_CMDNAME(SET_SLOT);
316 MWL8K_CMDNAME(SET_EDCA_PARAMS);
317 MWL8K_CMDNAME(SET_WMM_MODE);
318 MWL8K_CMDNAME(MIMO_CONFIG);
319 MWL8K_CMDNAME(USE_FIXED_RATE);
320 MWL8K_CMDNAME(ENABLE_SNIFFER);
321 MWL8K_CMDNAME(SET_MAC_ADDR);
322 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
323 MWL8K_CMDNAME(BSS_START);
324 MWL8K_CMDNAME(SET_NEW_STN);
325 MWL8K_CMDNAME(UPDATE_STADB);
327 snprintf(buf, bufsize, "0x%x", cmd);
334 /* Hardware and firmware reset */
335 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
337 iowrite32(MWL8K_H2A_INT_RESET,
338 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
339 iowrite32(MWL8K_H2A_INT_RESET,
340 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
344 /* Release fw image */
345 static void mwl8k_release_fw(struct firmware **fw)
349 release_firmware(*fw);
353 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
355 mwl8k_release_fw(&priv->fw_ucode);
356 mwl8k_release_fw(&priv->fw_helper);
359 /* Request fw image */
360 static int mwl8k_request_fw(struct mwl8k_priv *priv,
361 const char *fname, struct firmware **fw)
363 /* release current image */
365 mwl8k_release_fw(fw);
367 return request_firmware((const struct firmware **)fw,
368 fname, &priv->pdev->dev);
371 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
373 struct mwl8k_device_info *di = priv->device_info;
376 if (di->helper_image != NULL) {
377 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
379 printk(KERN_ERR "%s: Error requesting helper "
380 "firmware file %s\n", pci_name(priv->pdev),
386 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
388 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
389 pci_name(priv->pdev), di->fw_image);
390 mwl8k_release_fw(&priv->fw_helper);
397 struct mwl8k_cmd_pkt {
403 } __attribute__((packed));
409 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
411 void __iomem *regs = priv->regs;
415 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
416 if (pci_dma_mapping_error(priv->pdev, dma_addr))
419 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
420 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
421 iowrite32(MWL8K_H2A_INT_DOORBELL,
422 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
423 iowrite32(MWL8K_H2A_INT_DUMMY,
424 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
430 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
431 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
432 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
440 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
442 return loops ? 0 : -ETIMEDOUT;
445 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
446 const u8 *data, size_t length)
448 struct mwl8k_cmd_pkt *cmd;
452 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
456 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
462 int block_size = length > 256 ? 256 : length;
464 memcpy(cmd->payload, data + done, block_size);
465 cmd->length = cpu_to_le16(block_size);
467 rc = mwl8k_send_fw_load_cmd(priv, cmd,
468 sizeof(*cmd) + block_size);
473 length -= block_size;
478 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
486 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
487 const u8 *data, size_t length)
489 unsigned char *buffer;
490 int may_continue, rc = 0;
491 u32 done, prev_block_size;
493 buffer = kmalloc(1024, GFP_KERNEL);
500 while (may_continue > 0) {
503 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
504 if (block_size & 1) {
508 done += prev_block_size;
509 length -= prev_block_size;
512 if (block_size > 1024 || block_size > length) {
522 if (block_size == 0) {
529 prev_block_size = block_size;
530 memcpy(buffer, data + done, block_size);
532 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
537 if (!rc && length != 0)
545 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
547 struct mwl8k_priv *priv = hw->priv;
548 struct firmware *fw = priv->fw_ucode;
552 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
553 struct firmware *helper = priv->fw_helper;
555 if (helper == NULL) {
556 printk(KERN_ERR "%s: helper image needed but none "
557 "given\n", pci_name(priv->pdev));
561 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
563 printk(KERN_ERR "%s: unable to load firmware "
564 "helper image\n", pci_name(priv->pdev));
569 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
571 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
575 printk(KERN_ERR "%s: unable to load firmware image\n",
576 pci_name(priv->pdev));
580 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
586 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
587 if (ready_code == MWL8K_FWAP_READY) {
590 } else if (ready_code == MWL8K_FWSTA_READY) {
599 return loops ? 0 : -ETIMEDOUT;
603 /* DMA header used by firmware and hardware. */
604 struct mwl8k_dma_data {
606 struct ieee80211_hdr wh;
608 } __attribute__((packed));
610 /* Routines to add/remove DMA header from skb. */
611 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
613 struct mwl8k_dma_data *tr;
616 tr = (struct mwl8k_dma_data *)skb->data;
617 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
619 if (hdrlen != sizeof(tr->wh)) {
620 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
621 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
622 *((__le16 *)(tr->data - 2)) = qos;
624 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
628 if (hdrlen != sizeof(*tr))
629 skb_pull(skb, sizeof(*tr) - hdrlen);
632 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
634 struct ieee80211_hdr *wh;
636 struct mwl8k_dma_data *tr;
639 * Add a firmware DMA header; the firmware requires that we
640 * present a 2-byte payload length followed by a 4-address
641 * header (without QoS field), followed (optionally) by any
642 * WEP/ExtIV header (but only filled in for CCMP).
644 wh = (struct ieee80211_hdr *)skb->data;
646 hdrlen = ieee80211_hdrlen(wh->frame_control);
647 if (hdrlen != sizeof(*tr))
648 skb_push(skb, sizeof(*tr) - hdrlen);
650 if (ieee80211_is_data_qos(wh->frame_control))
653 tr = (struct mwl8k_dma_data *)skb->data;
655 memmove(&tr->wh, wh, hdrlen);
656 if (hdrlen != sizeof(tr->wh))
657 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
660 * Firmware length is the length of the fully formed "802.11
661 * payload". That is, everything except for the 802.11 header.
662 * This includes all crypto material including the MIC.
664 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
669 * Packet reception for 88w8366 AP firmware.
671 struct mwl8k_rxd_8366_ap {
675 __le32 pkt_phys_addr;
676 __le32 next_rxd_phys_addr;
680 __le32 hw_noise_floor_info;
687 } __attribute__((packed));
689 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
690 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
691 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
693 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
695 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
697 struct mwl8k_rxd_8366_ap *rxd = _rxd;
699 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
700 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
703 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
705 struct mwl8k_rxd_8366_ap *rxd = _rxd;
707 rxd->pkt_len = cpu_to_le16(len);
708 rxd->pkt_phys_addr = cpu_to_le32(addr);
714 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
717 struct mwl8k_rxd_8366_ap *rxd = _rxd;
719 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
723 memset(status, 0, sizeof(*status));
725 status->signal = -rxd->rssi;
726 status->noise = -rxd->noise_floor;
728 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
729 status->flag |= RX_FLAG_HT;
730 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
731 status->flag |= RX_FLAG_40MHZ;
732 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
736 for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
737 if (mwl8k_rates[i].hw_value == rxd->rate) {
738 status->rate_idx = i;
744 status->band = IEEE80211_BAND_2GHZ;
745 status->freq = ieee80211_channel_to_frequency(rxd->channel);
747 *qos = rxd->qos_control;
749 return le16_to_cpu(rxd->pkt_len);
752 static struct rxd_ops rxd_8366_ap_ops = {
753 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
754 .rxd_init = mwl8k_rxd_8366_ap_init,
755 .rxd_refill = mwl8k_rxd_8366_ap_refill,
756 .rxd_process = mwl8k_rxd_8366_ap_process,
760 * Packet reception for STA firmware.
762 struct mwl8k_rxd_sta {
766 __le32 pkt_phys_addr;
767 __le32 next_rxd_phys_addr;
777 } __attribute__((packed));
779 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
780 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
781 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
782 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
783 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
784 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
786 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
788 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
790 struct mwl8k_rxd_sta *rxd = _rxd;
792 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
793 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
796 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
798 struct mwl8k_rxd_sta *rxd = _rxd;
800 rxd->pkt_len = cpu_to_le16(len);
801 rxd->pkt_phys_addr = cpu_to_le32(addr);
807 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
810 struct mwl8k_rxd_sta *rxd = _rxd;
813 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
817 rate_info = le16_to_cpu(rxd->rate_info);
819 memset(status, 0, sizeof(*status));
821 status->signal = -rxd->rssi;
822 status->noise = -rxd->noise_level;
823 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
824 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
826 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
827 status->flag |= RX_FLAG_SHORTPRE;
828 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
829 status->flag |= RX_FLAG_40MHZ;
830 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
831 status->flag |= RX_FLAG_SHORT_GI;
832 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
833 status->flag |= RX_FLAG_HT;
835 status->band = IEEE80211_BAND_2GHZ;
836 status->freq = ieee80211_channel_to_frequency(rxd->channel);
838 *qos = rxd->qos_control;
840 return le16_to_cpu(rxd->pkt_len);
843 static struct rxd_ops rxd_sta_ops = {
844 .rxd_size = sizeof(struct mwl8k_rxd_sta),
845 .rxd_init = mwl8k_rxd_sta_init,
846 .rxd_refill = mwl8k_rxd_sta_refill,
847 .rxd_process = mwl8k_rxd_sta_process,
851 #define MWL8K_RX_DESCS 256
852 #define MWL8K_RX_MAXSZ 3800
854 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
856 struct mwl8k_priv *priv = hw->priv;
857 struct mwl8k_rx_queue *rxq = priv->rxq + index;
865 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
867 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
868 if (rxq->rxd == NULL) {
869 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
870 wiphy_name(hw->wiphy));
873 memset(rxq->rxd, 0, size);
875 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
876 if (rxq->buf == NULL) {
877 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
878 wiphy_name(hw->wiphy));
879 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
882 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
884 for (i = 0; i < MWL8K_RX_DESCS; i++) {
888 dma_addr_t next_dma_addr;
890 desc_size = priv->rxd_ops->rxd_size;
891 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
894 if (nexti == MWL8K_RX_DESCS)
896 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
898 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
904 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
906 struct mwl8k_priv *priv = hw->priv;
907 struct mwl8k_rx_queue *rxq = priv->rxq + index;
911 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
917 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
921 addr = pci_map_single(priv->pdev, skb->data,
922 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
926 if (rxq->tail == MWL8K_RX_DESCS)
928 rxq->buf[rx].skb = skb;
929 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
931 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
932 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
940 /* Must be called only when the card's reception is completely halted */
941 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
943 struct mwl8k_priv *priv = hw->priv;
944 struct mwl8k_rx_queue *rxq = priv->rxq + index;
947 for (i = 0; i < MWL8K_RX_DESCS; i++) {
948 if (rxq->buf[i].skb != NULL) {
949 pci_unmap_single(priv->pdev,
950 pci_unmap_addr(&rxq->buf[i], dma),
951 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
952 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
954 kfree_skb(rxq->buf[i].skb);
955 rxq->buf[i].skb = NULL;
962 pci_free_consistent(priv->pdev,
963 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
964 rxq->rxd, rxq->rxd_dma);
970 * Scan a list of BSSIDs to process for finalize join.
971 * Allows for extension to process multiple BSSIDs.
974 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
976 return priv->capture_beacon &&
977 ieee80211_is_beacon(wh->frame_control) &&
978 !compare_ether_addr(wh->addr3, priv->capture_bssid);
981 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
984 struct mwl8k_priv *priv = hw->priv;
986 priv->capture_beacon = false;
987 memset(priv->capture_bssid, 0, ETH_ALEN);
990 * Use GFP_ATOMIC as rxq_process is called from
991 * the primary interrupt handler, memory allocation call
994 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
995 if (priv->beacon_skb != NULL)
996 ieee80211_queue_work(hw, &priv->finalize_join_worker);
999 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1001 struct mwl8k_priv *priv = hw->priv;
1002 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1006 while (rxq->rxd_count && limit--) {
1007 struct sk_buff *skb;
1010 struct ieee80211_rx_status status;
1013 skb = rxq->buf[rxq->head].skb;
1017 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1019 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1023 rxq->buf[rxq->head].skb = NULL;
1025 pci_unmap_single(priv->pdev,
1026 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1027 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1028 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1031 if (rxq->head == MWL8K_RX_DESCS)
1036 skb_put(skb, pkt_len);
1037 mwl8k_remove_dma_header(skb, qos);
1040 * Check for a pending join operation. Save a
1041 * copy of the beacon and schedule a tasklet to
1042 * send a FINALIZE_JOIN command to the firmware.
1044 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1045 mwl8k_save_beacon(hw, skb);
1047 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1048 ieee80211_rx_irqsafe(hw, skb);
1058 * Packet transmission.
1061 #define MWL8K_TXD_STATUS_OK 0x00000001
1062 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1063 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1064 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1065 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1067 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1068 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1069 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1070 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1071 #define MWL8K_QOS_EOSP 0x0010
1073 struct mwl8k_tx_desc {
1078 __le32 pkt_phys_addr;
1080 __u8 dest_MAC_addr[ETH_ALEN];
1081 __le32 next_txd_phys_addr;
1086 } __attribute__((packed));
1088 #define MWL8K_TX_DESCS 128
1090 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1092 struct mwl8k_priv *priv = hw->priv;
1093 struct mwl8k_tx_queue *txq = priv->txq + index;
1097 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1098 txq->stats.limit = MWL8K_TX_DESCS;
1102 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1104 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1105 if (txq->txd == NULL) {
1106 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1107 wiphy_name(hw->wiphy));
1110 memset(txq->txd, 0, size);
1112 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1113 if (txq->skb == NULL) {
1114 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1115 wiphy_name(hw->wiphy));
1116 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1119 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1121 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1122 struct mwl8k_tx_desc *tx_desc;
1125 tx_desc = txq->txd + i;
1126 nexti = (i + 1) % MWL8K_TX_DESCS;
1128 tx_desc->status = 0;
1129 tx_desc->next_txd_phys_addr =
1130 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1136 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1138 iowrite32(MWL8K_H2A_INT_PPA_READY,
1139 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1140 iowrite32(MWL8K_H2A_INT_DUMMY,
1141 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1142 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1145 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1147 struct mwl8k_priv *priv = hw->priv;
1150 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1151 struct mwl8k_tx_queue *txq = priv->txq + i;
1157 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1158 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1161 status = le32_to_cpu(tx_desc->status);
1162 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1167 if (tx_desc->pkt_len == 0)
1171 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1172 "fw_owned=%d drv_owned=%d unused=%d\n",
1173 wiphy_name(hw->wiphy), i,
1174 txq->stats.len, txq->head, txq->tail,
1175 fw_owned, drv_owned, unused);
1180 * Must be called with priv->fw_mutex held and tx queues stopped.
1182 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1184 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1186 struct mwl8k_priv *priv = hw->priv;
1187 DECLARE_COMPLETION_ONSTACK(tx_wait);
1194 * The TX queues are stopped at this point, so this test
1195 * doesn't need to take ->tx_lock.
1197 if (!priv->pending_tx_pkts)
1203 spin_lock_bh(&priv->tx_lock);
1204 priv->tx_wait = &tx_wait;
1207 unsigned long timeout;
1209 oldcount = priv->pending_tx_pkts;
1211 spin_unlock_bh(&priv->tx_lock);
1212 timeout = wait_for_completion_timeout(&tx_wait,
1213 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1214 spin_lock_bh(&priv->tx_lock);
1217 WARN_ON(priv->pending_tx_pkts);
1219 printk(KERN_NOTICE "%s: tx rings drained\n",
1220 wiphy_name(hw->wiphy));
1225 if (priv->pending_tx_pkts < oldcount) {
1226 printk(KERN_NOTICE "%s: waiting for tx rings "
1227 "to drain (%d -> %d pkts)\n",
1228 wiphy_name(hw->wiphy), oldcount,
1229 priv->pending_tx_pkts);
1234 priv->tx_wait = NULL;
1236 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1237 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1238 mwl8k_dump_tx_rings(hw);
1242 spin_unlock_bh(&priv->tx_lock);
1247 #define MWL8K_TXD_SUCCESS(status) \
1248 ((status) & (MWL8K_TXD_STATUS_OK | \
1249 MWL8K_TXD_STATUS_OK_RETRY | \
1250 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1253 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1255 struct mwl8k_priv *priv = hw->priv;
1256 struct mwl8k_tx_queue *txq = priv->txq + index;
1260 while (txq->stats.len > 0 && limit--) {
1262 struct mwl8k_tx_desc *tx_desc;
1265 struct sk_buff *skb;
1266 struct ieee80211_tx_info *info;
1270 tx_desc = txq->txd + tx;
1272 status = le32_to_cpu(tx_desc->status);
1274 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1278 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1281 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1282 BUG_ON(txq->stats.len == 0);
1284 priv->pending_tx_pkts--;
1286 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1287 size = le16_to_cpu(tx_desc->pkt_len);
1289 txq->skb[tx] = NULL;
1291 BUG_ON(skb == NULL);
1292 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1294 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1296 /* Mark descriptor as unused */
1297 tx_desc->pkt_phys_addr = 0;
1298 tx_desc->pkt_len = 0;
1300 info = IEEE80211_SKB_CB(skb);
1301 ieee80211_tx_info_clear_status(info);
1302 if (MWL8K_TXD_SUCCESS(status))
1303 info->flags |= IEEE80211_TX_STAT_ACK;
1305 ieee80211_tx_status_irqsafe(hw, skb);
1310 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1311 ieee80211_wake_queue(hw, index);
1316 /* must be called only when the card's transmit is completely halted */
1317 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1319 struct mwl8k_priv *priv = hw->priv;
1320 struct mwl8k_tx_queue *txq = priv->txq + index;
1322 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1327 pci_free_consistent(priv->pdev,
1328 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1329 txq->txd, txq->txd_dma);
1334 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1336 struct mwl8k_priv *priv = hw->priv;
1337 struct ieee80211_tx_info *tx_info;
1338 struct mwl8k_vif *mwl8k_vif;
1339 struct ieee80211_hdr *wh;
1340 struct mwl8k_tx_queue *txq;
1341 struct mwl8k_tx_desc *tx;
1347 wh = (struct ieee80211_hdr *)skb->data;
1348 if (ieee80211_is_data_qos(wh->frame_control))
1349 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1353 mwl8k_add_dma_header(skb);
1354 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1356 tx_info = IEEE80211_SKB_CB(skb);
1357 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1359 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1360 u16 seqno = mwl8k_vif->seqno;
1362 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1363 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1364 mwl8k_vif->seqno = seqno++ % 4096;
1367 /* Setup firmware control bit fields for each frame type. */
1370 if (ieee80211_is_mgmt(wh->frame_control) ||
1371 ieee80211_is_ctl(wh->frame_control)) {
1373 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1374 } else if (ieee80211_is_data(wh->frame_control)) {
1376 if (is_multicast_ether_addr(wh->addr1))
1377 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1379 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1380 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1381 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1383 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1386 dma = pci_map_single(priv->pdev, skb->data,
1387 skb->len, PCI_DMA_TODEVICE);
1389 if (pci_dma_mapping_error(priv->pdev, dma)) {
1390 printk(KERN_DEBUG "%s: failed to dma map skb, "
1391 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1393 return NETDEV_TX_OK;
1396 spin_lock_bh(&priv->tx_lock);
1398 txq = priv->txq + index;
1400 BUG_ON(txq->skb[txq->tail] != NULL);
1401 txq->skb[txq->tail] = skb;
1403 tx = txq->txd + txq->tail;
1404 tx->data_rate = txdatarate;
1405 tx->tx_priority = index;
1406 tx->qos_control = cpu_to_le16(qos);
1407 tx->pkt_phys_addr = cpu_to_le32(dma);
1408 tx->pkt_len = cpu_to_le16(skb->len);
1410 if (!priv->ap_fw && tx_info->control.sta != NULL)
1411 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1415 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1419 priv->pending_tx_pkts++;
1422 if (txq->tail == MWL8K_TX_DESCS)
1425 if (txq->head == txq->tail)
1426 ieee80211_stop_queue(hw, index);
1428 mwl8k_tx_start(priv);
1430 spin_unlock_bh(&priv->tx_lock);
1432 return NETDEV_TX_OK;
1439 * We have the following requirements for issuing firmware commands:
1440 * - Some commands require that the packet transmit path is idle when
1441 * the command is issued. (For simplicity, we'll just quiesce the
1442 * transmit path for every command.)
1443 * - There are certain sequences of commands that need to be issued to
1444 * the hardware sequentially, with no other intervening commands.
1446 * This leads to an implementation of a "firmware lock" as a mutex that
1447 * can be taken recursively, and which is taken by both the low-level
1448 * command submission function (mwl8k_post_cmd) as well as any users of
1449 * that function that require issuing of an atomic sequence of commands,
1450 * and quiesces the transmit path whenever it's taken.
1452 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1454 struct mwl8k_priv *priv = hw->priv;
1456 if (priv->fw_mutex_owner != current) {
1459 mutex_lock(&priv->fw_mutex);
1460 ieee80211_stop_queues(hw);
1462 rc = mwl8k_tx_wait_empty(hw);
1464 ieee80211_wake_queues(hw);
1465 mutex_unlock(&priv->fw_mutex);
1470 priv->fw_mutex_owner = current;
1473 priv->fw_mutex_depth++;
1478 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1480 struct mwl8k_priv *priv = hw->priv;
1482 if (!--priv->fw_mutex_depth) {
1483 ieee80211_wake_queues(hw);
1484 priv->fw_mutex_owner = NULL;
1485 mutex_unlock(&priv->fw_mutex);
1491 * Command processing.
1494 /* Timeout firmware commands after 10s */
1495 #define MWL8K_CMD_TIMEOUT_MS 10000
1497 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1499 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1500 struct mwl8k_priv *priv = hw->priv;
1501 void __iomem *regs = priv->regs;
1502 dma_addr_t dma_addr;
1503 unsigned int dma_size;
1505 unsigned long timeout = 0;
1508 cmd->result = 0xffff;
1509 dma_size = le16_to_cpu(cmd->length);
1510 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1511 PCI_DMA_BIDIRECTIONAL);
1512 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1515 rc = mwl8k_fw_lock(hw);
1517 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1518 PCI_DMA_BIDIRECTIONAL);
1522 priv->hostcmd_wait = &cmd_wait;
1523 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1524 iowrite32(MWL8K_H2A_INT_DOORBELL,
1525 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1526 iowrite32(MWL8K_H2A_INT_DUMMY,
1527 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1529 timeout = wait_for_completion_timeout(&cmd_wait,
1530 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1532 priv->hostcmd_wait = NULL;
1534 mwl8k_fw_unlock(hw);
1536 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1537 PCI_DMA_BIDIRECTIONAL);
1540 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1541 wiphy_name(hw->wiphy),
1542 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1543 MWL8K_CMD_TIMEOUT_MS);
1548 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1550 rc = cmd->result ? -EINVAL : 0;
1552 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1553 wiphy_name(hw->wiphy),
1554 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1555 le16_to_cpu(cmd->result));
1557 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1558 wiphy_name(hw->wiphy),
1559 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1567 * CMD_GET_HW_SPEC (STA version).
1569 struct mwl8k_cmd_get_hw_spec_sta {
1570 struct mwl8k_cmd_pkt header;
1572 __u8 host_interface;
1574 __u8 perm_addr[ETH_ALEN];
1579 __u8 mcs_bitmap[16];
1580 __le32 rx_queue_ptr;
1581 __le32 num_tx_queues;
1582 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1584 __le32 num_tx_desc_per_queue;
1586 } __attribute__((packed));
1588 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1589 #define MWL8K_CAP_GREENFIELD 0x08000000
1590 #define MWL8K_CAP_AMPDU 0x04000000
1591 #define MWL8K_CAP_RX_STBC 0x01000000
1592 #define MWL8K_CAP_TX_STBC 0x00800000
1593 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1594 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1595 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1596 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1597 #define MWL8K_CAP_DELAY_BA 0x00003000
1598 #define MWL8K_CAP_MIMO 0x00000200
1599 #define MWL8K_CAP_40MHZ 0x00000100
1601 static void mwl8k_set_ht_caps(struct ieee80211_hw *hw, u32 cap)
1603 struct mwl8k_priv *priv = hw->priv;
1607 priv->band.ht_cap.ht_supported = 1;
1609 if (cap & MWL8K_CAP_MAX_AMSDU)
1610 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1611 if (cap & MWL8K_CAP_GREENFIELD)
1612 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1613 if (cap & MWL8K_CAP_AMPDU) {
1614 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1615 priv->band.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1616 priv->band.ht_cap.ampdu_density =
1617 IEEE80211_HT_MPDU_DENSITY_NONE;
1619 if (cap & MWL8K_CAP_RX_STBC)
1620 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1621 if (cap & MWL8K_CAP_TX_STBC)
1622 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1623 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1624 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1625 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1626 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1627 if (cap & MWL8K_CAP_DELAY_BA)
1628 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1629 if (cap & MWL8K_CAP_40MHZ)
1630 priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1632 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1633 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1635 priv->band.ht_cap.mcs.rx_mask[0] = 0xff;
1636 if (rx_streams >= 2)
1637 priv->band.ht_cap.mcs.rx_mask[1] = 0xff;
1638 if (rx_streams >= 3)
1639 priv->band.ht_cap.mcs.rx_mask[2] = 0xff;
1640 priv->band.ht_cap.mcs.rx_mask[4] = 0x01;
1641 priv->band.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1643 if (rx_streams != tx_streams) {
1644 priv->band.ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1645 priv->band.ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1646 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1650 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1652 struct mwl8k_priv *priv = hw->priv;
1653 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1657 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1661 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1662 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1664 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1665 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1666 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1667 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1668 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1669 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1670 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1671 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1673 rc = mwl8k_post_cmd(hw, &cmd->header);
1676 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1677 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1678 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1679 priv->hw_rev = cmd->hw_rev;
1680 if (cmd->caps & cpu_to_le32(MWL8K_CAP_MIMO))
1681 mwl8k_set_ht_caps(hw, le32_to_cpu(cmd->caps));
1689 * CMD_GET_HW_SPEC (AP version).
1691 struct mwl8k_cmd_get_hw_spec_ap {
1692 struct mwl8k_cmd_pkt header;
1694 __u8 host_interface;
1697 __u8 perm_addr[ETH_ALEN];
1708 } __attribute__((packed));
1710 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1712 struct mwl8k_priv *priv = hw->priv;
1713 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1716 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1720 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1721 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1723 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1724 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1726 rc = mwl8k_post_cmd(hw, &cmd->header);
1731 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1732 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1733 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1734 priv->hw_rev = cmd->hw_rev;
1736 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1737 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1739 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1740 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1742 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1743 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1745 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1746 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1748 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1749 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1751 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1752 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1762 struct mwl8k_cmd_set_hw_spec {
1763 struct mwl8k_cmd_pkt header;
1765 __u8 host_interface;
1767 __u8 perm_addr[ETH_ALEN];
1772 __le32 rx_queue_ptr;
1773 __le32 num_tx_queues;
1774 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1776 __le32 num_tx_desc_per_queue;
1778 } __attribute__((packed));
1780 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1781 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1782 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1784 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1786 struct mwl8k_priv *priv = hw->priv;
1787 struct mwl8k_cmd_set_hw_spec *cmd;
1791 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1795 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1796 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1798 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1799 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1800 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1801 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1802 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1803 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1804 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1805 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1806 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1807 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1809 rc = mwl8k_post_cmd(hw, &cmd->header);
1816 * CMD_MAC_MULTICAST_ADR.
1818 struct mwl8k_cmd_mac_multicast_adr {
1819 struct mwl8k_cmd_pkt header;
1822 __u8 addr[0][ETH_ALEN];
1825 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1826 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1827 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1828 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1830 static struct mwl8k_cmd_pkt *
1831 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1832 int mc_count, struct dev_addr_list *mclist)
1834 struct mwl8k_priv *priv = hw->priv;
1835 struct mwl8k_cmd_mac_multicast_adr *cmd;
1838 if (allmulti || mc_count > priv->num_mcaddrs) {
1843 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1845 cmd = kzalloc(size, GFP_ATOMIC);
1849 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1850 cmd->header.length = cpu_to_le16(size);
1851 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1852 MWL8K_ENABLE_RX_BROADCAST);
1855 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1856 } else if (mc_count) {
1859 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1860 cmd->numaddr = cpu_to_le16(mc_count);
1861 for (i = 0; i < mc_count && mclist; i++) {
1862 if (mclist->da_addrlen != ETH_ALEN) {
1866 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1867 mclist = mclist->next;
1871 return &cmd->header;
1877 struct mwl8k_cmd_get_stat {
1878 struct mwl8k_cmd_pkt header;
1880 } __attribute__((packed));
1882 #define MWL8K_STAT_ACK_FAILURE 9
1883 #define MWL8K_STAT_RTS_FAILURE 12
1884 #define MWL8K_STAT_FCS_ERROR 24
1885 #define MWL8K_STAT_RTS_SUCCESS 11
1887 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1888 struct ieee80211_low_level_stats *stats)
1890 struct mwl8k_cmd_get_stat *cmd;
1893 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1897 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1898 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1900 rc = mwl8k_post_cmd(hw, &cmd->header);
1902 stats->dot11ACKFailureCount =
1903 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1904 stats->dot11RTSFailureCount =
1905 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1906 stats->dot11FCSErrorCount =
1907 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1908 stats->dot11RTSSuccessCount =
1909 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1917 * CMD_RADIO_CONTROL.
1919 struct mwl8k_cmd_radio_control {
1920 struct mwl8k_cmd_pkt header;
1924 } __attribute__((packed));
1927 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1929 struct mwl8k_priv *priv = hw->priv;
1930 struct mwl8k_cmd_radio_control *cmd;
1933 if (enable == priv->radio_on && !force)
1936 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1940 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1941 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1942 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1943 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1944 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1946 rc = mwl8k_post_cmd(hw, &cmd->header);
1950 priv->radio_on = enable;
1955 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
1957 return mwl8k_cmd_radio_control(hw, 0, 0);
1960 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
1962 return mwl8k_cmd_radio_control(hw, 1, 0);
1966 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1968 struct mwl8k_priv *priv = hw->priv;
1970 priv->radio_short_preamble = short_preamble;
1972 return mwl8k_cmd_radio_control(hw, 1, 1);
1978 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1980 struct mwl8k_cmd_rf_tx_power {
1981 struct mwl8k_cmd_pkt header;
1983 __le16 support_level;
1984 __le16 current_level;
1986 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1987 } __attribute__((packed));
1989 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1991 struct mwl8k_cmd_rf_tx_power *cmd;
1994 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1998 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1999 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2000 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2001 cmd->support_level = cpu_to_le16(dBm);
2003 rc = mwl8k_post_cmd(hw, &cmd->header);
2012 struct mwl8k_cmd_rf_antenna {
2013 struct mwl8k_cmd_pkt header;
2016 } __attribute__((packed));
2018 #define MWL8K_RF_ANTENNA_RX 1
2019 #define MWL8K_RF_ANTENNA_TX 2
2022 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2024 struct mwl8k_cmd_rf_antenna *cmd;
2027 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2031 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2032 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2033 cmd->antenna = cpu_to_le16(antenna);
2034 cmd->mode = cpu_to_le16(mask);
2036 rc = mwl8k_post_cmd(hw, &cmd->header);
2045 struct mwl8k_cmd_set_beacon {
2046 struct mwl8k_cmd_pkt header;
2051 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, u8 *beacon, int len)
2053 struct mwl8k_cmd_set_beacon *cmd;
2056 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2060 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2061 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2062 cmd->beacon_len = cpu_to_le16(len);
2063 memcpy(cmd->beacon, beacon, len);
2065 rc = mwl8k_post_cmd(hw, &cmd->header);
2074 struct mwl8k_cmd_set_pre_scan {
2075 struct mwl8k_cmd_pkt header;
2076 } __attribute__((packed));
2078 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2080 struct mwl8k_cmd_set_pre_scan *cmd;
2083 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2087 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2088 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2090 rc = mwl8k_post_cmd(hw, &cmd->header);
2097 * CMD_SET_POST_SCAN.
2099 struct mwl8k_cmd_set_post_scan {
2100 struct mwl8k_cmd_pkt header;
2102 __u8 bssid[ETH_ALEN];
2103 } __attribute__((packed));
2106 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2108 struct mwl8k_cmd_set_post_scan *cmd;
2111 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2115 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2116 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2118 memcpy(cmd->bssid, mac, ETH_ALEN);
2120 rc = mwl8k_post_cmd(hw, &cmd->header);
2127 * CMD_SET_RF_CHANNEL.
2129 struct mwl8k_cmd_set_rf_channel {
2130 struct mwl8k_cmd_pkt header;
2132 __u8 current_channel;
2133 __le32 channel_flags;
2134 } __attribute__((packed));
2136 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2137 struct ieee80211_conf *conf)
2139 struct ieee80211_channel *channel = conf->channel;
2140 struct mwl8k_cmd_set_rf_channel *cmd;
2143 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2147 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2148 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2149 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2150 cmd->current_channel = channel->hw_value;
2152 if (channel->band == IEEE80211_BAND_2GHZ)
2153 cmd->channel_flags |= cpu_to_le32(0x00000001);
2155 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2156 conf->channel_type == NL80211_CHAN_HT20)
2157 cmd->channel_flags |= cpu_to_le32(0x00000080);
2158 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2159 cmd->channel_flags |= cpu_to_le32(0x000001900);
2160 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2161 cmd->channel_flags |= cpu_to_le32(0x000000900);
2163 rc = mwl8k_post_cmd(hw, &cmd->header);
2172 #define MWL8K_FRAME_PROT_DISABLED 0x00
2173 #define MWL8K_FRAME_PROT_11G 0x07
2174 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2175 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2177 struct mwl8k_cmd_update_set_aid {
2178 struct mwl8k_cmd_pkt header;
2181 /* AP's MAC address (BSSID) */
2182 __u8 bssid[ETH_ALEN];
2183 __le16 protection_mode;
2184 __u8 supp_rates[14];
2185 } __attribute__((packed));
2187 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2193 * Clear nonstandard rates 4 and 13.
2197 for (i = 0, j = 0; i < 14; i++) {
2198 if (mask & (1 << i))
2199 rates[j++] = mwl8k_rates[i].hw_value;
2204 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2205 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2207 struct mwl8k_cmd_update_set_aid *cmd;
2211 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2215 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2216 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2217 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2218 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2220 if (vif->bss_conf.use_cts_prot) {
2221 prot_mode = MWL8K_FRAME_PROT_11G;
2223 switch (vif->bss_conf.ht_operation_mode &
2224 IEEE80211_HT_OP_MODE_PROTECTION) {
2225 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2226 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2228 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2229 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2232 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2236 cmd->protection_mode = cpu_to_le16(prot_mode);
2238 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2240 rc = mwl8k_post_cmd(hw, &cmd->header);
2249 struct mwl8k_cmd_set_rate {
2250 struct mwl8k_cmd_pkt header;
2251 __u8 legacy_rates[14];
2253 /* Bitmap for supported MCS codes. */
2256 } __attribute__((packed));
2259 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2260 u32 legacy_rate_mask, u8 *mcs_rates)
2262 struct mwl8k_cmd_set_rate *cmd;
2265 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2269 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2270 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2271 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2272 memcpy(cmd->mcs_set, mcs_rates, 16);
2274 rc = mwl8k_post_cmd(hw, &cmd->header);
2281 * CMD_FINALIZE_JOIN.
2283 #define MWL8K_FJ_BEACON_MAXLEN 128
2285 struct mwl8k_cmd_finalize_join {
2286 struct mwl8k_cmd_pkt header;
2287 __le32 sleep_interval; /* Number of beacon periods to sleep */
2288 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2289 } __attribute__((packed));
2291 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2292 int framelen, int dtim)
2294 struct mwl8k_cmd_finalize_join *cmd;
2295 struct ieee80211_mgmt *payload = frame;
2299 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2303 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2304 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2305 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2307 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2308 if (payload_len < 0)
2310 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2311 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2313 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2315 rc = mwl8k_post_cmd(hw, &cmd->header);
2322 * CMD_SET_RTS_THRESHOLD.
2324 struct mwl8k_cmd_set_rts_threshold {
2325 struct mwl8k_cmd_pkt header;
2328 } __attribute__((packed));
2331 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2333 struct mwl8k_cmd_set_rts_threshold *cmd;
2336 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2340 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2341 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2342 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2343 cmd->threshold = cpu_to_le16(rts_thresh);
2345 rc = mwl8k_post_cmd(hw, &cmd->header);
2354 struct mwl8k_cmd_set_slot {
2355 struct mwl8k_cmd_pkt header;
2358 } __attribute__((packed));
2360 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2362 struct mwl8k_cmd_set_slot *cmd;
2365 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2369 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2370 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2371 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2372 cmd->short_slot = short_slot_time;
2374 rc = mwl8k_post_cmd(hw, &cmd->header);
2381 * CMD_SET_EDCA_PARAMS.
2383 struct mwl8k_cmd_set_edca_params {
2384 struct mwl8k_cmd_pkt header;
2386 /* See MWL8K_SET_EDCA_XXX below */
2389 /* TX opportunity in units of 32 us */
2394 /* Log exponent of max contention period: 0...15 */
2397 /* Log exponent of min contention period: 0...15 */
2400 /* Adaptive interframe spacing in units of 32us */
2403 /* TX queue to configure */
2407 /* Log exponent of max contention period: 0...15 */
2410 /* Log exponent of min contention period: 0...15 */
2413 /* Adaptive interframe spacing in units of 32us */
2416 /* TX queue to configure */
2420 } __attribute__((packed));
2422 #define MWL8K_SET_EDCA_CW 0x01
2423 #define MWL8K_SET_EDCA_TXOP 0x02
2424 #define MWL8K_SET_EDCA_AIFS 0x04
2426 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2427 MWL8K_SET_EDCA_TXOP | \
2428 MWL8K_SET_EDCA_AIFS)
2431 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2432 __u16 cw_min, __u16 cw_max,
2433 __u8 aifs, __u16 txop)
2435 struct mwl8k_priv *priv = hw->priv;
2436 struct mwl8k_cmd_set_edca_params *cmd;
2439 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2443 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2444 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2445 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2446 cmd->txop = cpu_to_le16(txop);
2448 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2449 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2450 cmd->ap.aifs = aifs;
2453 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2454 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2455 cmd->sta.aifs = aifs;
2456 cmd->sta.txq = qnum;
2459 rc = mwl8k_post_cmd(hw, &cmd->header);
2468 struct mwl8k_cmd_set_wmm_mode {
2469 struct mwl8k_cmd_pkt header;
2471 } __attribute__((packed));
2473 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2475 struct mwl8k_priv *priv = hw->priv;
2476 struct mwl8k_cmd_set_wmm_mode *cmd;
2479 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2483 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2484 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2485 cmd->action = cpu_to_le16(!!enable);
2487 rc = mwl8k_post_cmd(hw, &cmd->header);
2491 priv->wmm_enabled = enable;
2499 struct mwl8k_cmd_mimo_config {
2500 struct mwl8k_cmd_pkt header;
2502 __u8 rx_antenna_map;
2503 __u8 tx_antenna_map;
2504 } __attribute__((packed));
2506 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2508 struct mwl8k_cmd_mimo_config *cmd;
2511 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2515 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2516 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2517 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2518 cmd->rx_antenna_map = rx;
2519 cmd->tx_antenna_map = tx;
2521 rc = mwl8k_post_cmd(hw, &cmd->header);
2528 * CMD_USE_FIXED_RATE (STA version).
2530 struct mwl8k_cmd_use_fixed_rate_sta {
2531 struct mwl8k_cmd_pkt header;
2533 __le32 allow_rate_drop;
2537 __le32 enable_retry;
2544 } __attribute__((packed));
2546 #define MWL8K_USE_AUTO_RATE 0x0002
2547 #define MWL8K_UCAST_RATE 0
2549 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2551 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2554 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2558 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2559 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2560 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2561 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2563 rc = mwl8k_post_cmd(hw, &cmd->header);
2570 * CMD_USE_FIXED_RATE (AP version).
2572 struct mwl8k_cmd_use_fixed_rate_ap {
2573 struct mwl8k_cmd_pkt header;
2575 __le32 allow_rate_drop;
2577 struct mwl8k_rate_entry_ap {
2579 __le32 enable_retry;
2584 u8 multicast_rate_type;
2586 } __attribute__((packed));
2589 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2591 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2594 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2598 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2599 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2600 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2601 cmd->multicast_rate = mcast;
2602 cmd->management_rate = mgmt;
2604 rc = mwl8k_post_cmd(hw, &cmd->header);
2611 * CMD_ENABLE_SNIFFER.
2613 struct mwl8k_cmd_enable_sniffer {
2614 struct mwl8k_cmd_pkt header;
2616 } __attribute__((packed));
2618 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2620 struct mwl8k_cmd_enable_sniffer *cmd;
2623 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2627 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2628 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2629 cmd->action = cpu_to_le32(!!enable);
2631 rc = mwl8k_post_cmd(hw, &cmd->header);
2640 struct mwl8k_cmd_set_mac_addr {
2641 struct mwl8k_cmd_pkt header;
2645 __u8 mac_addr[ETH_ALEN];
2647 __u8 mac_addr[ETH_ALEN];
2649 } __attribute__((packed));
2651 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2652 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2654 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2656 struct mwl8k_priv *priv = hw->priv;
2657 struct mwl8k_cmd_set_mac_addr *cmd;
2660 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2664 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2665 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2667 cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
2668 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2670 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2673 rc = mwl8k_post_cmd(hw, &cmd->header);
2680 * CMD_SET_RATEADAPT_MODE.
2682 struct mwl8k_cmd_set_rate_adapt_mode {
2683 struct mwl8k_cmd_pkt header;
2686 } __attribute__((packed));
2688 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2690 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2693 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2697 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2698 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2699 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2700 cmd->mode = cpu_to_le16(mode);
2702 rc = mwl8k_post_cmd(hw, &cmd->header);
2711 struct mwl8k_cmd_bss_start {
2712 struct mwl8k_cmd_pkt header;
2714 } __attribute__((packed));
2716 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, int enable)
2718 struct mwl8k_cmd_bss_start *cmd;
2721 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2725 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2726 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2727 cmd->enable = cpu_to_le32(enable);
2729 rc = mwl8k_post_cmd(hw, &cmd->header);
2738 struct mwl8k_cmd_set_new_stn {
2739 struct mwl8k_cmd_pkt header;
2745 __le32 legacy_rates;
2748 __le16 ht_capabilities_info;
2749 __u8 mac_ht_param_info;
2751 __u8 control_channel;
2758 } __attribute__((packed));
2760 #define MWL8K_STA_ACTION_ADD 0
2761 #define MWL8K_STA_ACTION_REMOVE 2
2763 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2764 struct ieee80211_vif *vif,
2765 struct ieee80211_sta *sta)
2767 struct mwl8k_cmd_set_new_stn *cmd;
2770 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2774 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2775 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2776 cmd->aid = cpu_to_le16(sta->aid);
2777 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2778 cmd->stn_id = cpu_to_le16(sta->aid);
2779 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2780 cmd->legacy_rates = cpu_to_le32(sta->supp_rates[IEEE80211_BAND_2GHZ]);
2781 if (sta->ht_cap.ht_supported) {
2782 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2783 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2784 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2785 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2786 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2787 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2788 ((sta->ht_cap.ampdu_density & 7) << 2);
2789 cmd->is_qos_sta = 1;
2792 rc = mwl8k_post_cmd(hw, &cmd->header);
2798 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2799 struct ieee80211_vif *vif)
2801 struct mwl8k_cmd_set_new_stn *cmd;
2804 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2808 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2809 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2810 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2812 rc = mwl8k_post_cmd(hw, &cmd->header);
2818 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2819 struct ieee80211_vif *vif, u8 *addr)
2821 struct mwl8k_cmd_set_new_stn *cmd;
2824 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2828 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2829 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2830 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2831 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2833 rc = mwl8k_post_cmd(hw, &cmd->header);
2842 struct ewc_ht_info {
2846 } __attribute__((packed));
2848 struct peer_capability_info {
2849 /* Peer type - AP vs. STA. */
2852 /* Basic 802.11 capabilities from assoc resp. */
2855 /* Set if peer supports 802.11n high throughput (HT). */
2858 /* Valid if HT is supported. */
2860 __u8 extended_ht_caps;
2861 struct ewc_ht_info ewc_info;
2863 /* Legacy rate table. Intersection of our rates and peer rates. */
2864 __u8 legacy_rates[12];
2866 /* HT rate table. Intersection of our rates and peer rates. */
2870 /* If set, interoperability mode, no proprietary extensions. */
2874 __le16 amsdu_enabled;
2875 } __attribute__((packed));
2877 struct mwl8k_cmd_update_stadb {
2878 struct mwl8k_cmd_pkt header;
2880 /* See STADB_ACTION_TYPE */
2883 /* Peer MAC address */
2884 __u8 peer_addr[ETH_ALEN];
2888 /* Peer info - valid during add/update. */
2889 struct peer_capability_info peer_info;
2890 } __attribute__((packed));
2892 #define MWL8K_STA_DB_MODIFY_ENTRY 1
2893 #define MWL8K_STA_DB_DEL_ENTRY 2
2895 /* Peer Entry flags - used to define the type of the peer node */
2896 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
2898 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
2899 struct ieee80211_vif *vif,
2900 struct ieee80211_sta *sta)
2902 struct mwl8k_cmd_update_stadb *cmd;
2903 struct peer_capability_info *p;
2906 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2910 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2911 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2912 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
2913 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
2915 p = &cmd->peer_info;
2916 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2917 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
2918 p->ht_support = sta->ht_cap.ht_supported;
2919 p->ht_caps = sta->ht_cap.cap;
2920 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
2921 ((sta->ht_cap.ampdu_density & 7) << 2);
2922 legacy_rate_mask_to_array(p->legacy_rates,
2923 sta->supp_rates[IEEE80211_BAND_2GHZ]);
2924 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
2926 p->amsdu_enabled = 0;
2928 rc = mwl8k_post_cmd(hw, &cmd->header);
2931 return rc ? rc : p->station_id;
2934 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
2935 struct ieee80211_vif *vif, u8 *addr)
2937 struct mwl8k_cmd_update_stadb *cmd;
2940 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2944 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2945 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2946 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
2947 memcpy(cmd->peer_addr, addr, ETH_ALEN);
2949 rc = mwl8k_post_cmd(hw, &cmd->header);
2957 * Interrupt handling.
2959 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2961 struct ieee80211_hw *hw = dev_id;
2962 struct mwl8k_priv *priv = hw->priv;
2965 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2969 if (status & MWL8K_A2H_INT_TX_DONE) {
2970 status &= ~MWL8K_A2H_INT_TX_DONE;
2971 tasklet_schedule(&priv->poll_tx_task);
2974 if (status & MWL8K_A2H_INT_RX_READY) {
2975 status &= ~MWL8K_A2H_INT_RX_READY;
2976 tasklet_schedule(&priv->poll_rx_task);
2980 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2982 if (status & MWL8K_A2H_INT_OPC_DONE) {
2983 if (priv->hostcmd_wait != NULL)
2984 complete(priv->hostcmd_wait);
2987 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2988 if (!mutex_is_locked(&priv->fw_mutex) &&
2989 priv->radio_on && priv->pending_tx_pkts)
2990 mwl8k_tx_start(priv);
2996 static void mwl8k_tx_poll(unsigned long data)
2998 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
2999 struct mwl8k_priv *priv = hw->priv;
3005 spin_lock_bh(&priv->tx_lock);
3007 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3008 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3010 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3011 complete(priv->tx_wait);
3012 priv->tx_wait = NULL;
3015 spin_unlock_bh(&priv->tx_lock);
3018 writel(~MWL8K_A2H_INT_TX_DONE,
3019 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3021 tasklet_schedule(&priv->poll_tx_task);
3025 static void mwl8k_rx_poll(unsigned long data)
3027 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3028 struct mwl8k_priv *priv = hw->priv;
3032 limit -= rxq_process(hw, 0, limit);
3033 limit -= rxq_refill(hw, 0, limit);
3036 writel(~MWL8K_A2H_INT_RX_READY,
3037 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3039 tasklet_schedule(&priv->poll_rx_task);
3045 * Core driver operations.
3047 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3049 struct mwl8k_priv *priv = hw->priv;
3050 int index = skb_get_queue_mapping(skb);
3053 if (priv->current_channel == NULL) {
3054 printk(KERN_DEBUG "%s: dropped TX frame since radio "
3055 "disabled\n", wiphy_name(hw->wiphy));
3057 return NETDEV_TX_OK;
3060 rc = mwl8k_txq_xmit(hw, index, skb);
3065 static int mwl8k_start(struct ieee80211_hw *hw)
3067 struct mwl8k_priv *priv = hw->priv;
3070 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3071 IRQF_SHARED, MWL8K_NAME, hw);
3073 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3074 wiphy_name(hw->wiphy));
3078 /* Enable TX reclaim and RX tasklets. */
3079 tasklet_enable(&priv->poll_tx_task);
3080 tasklet_enable(&priv->poll_rx_task);
3082 /* Enable interrupts */
3083 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3085 rc = mwl8k_fw_lock(hw);
3087 rc = mwl8k_cmd_radio_enable(hw);
3091 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3094 rc = mwl8k_cmd_set_pre_scan(hw);
3097 rc = mwl8k_cmd_set_post_scan(hw,
3098 "\x00\x00\x00\x00\x00\x00");
3102 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3105 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3107 mwl8k_fw_unlock(hw);
3111 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3112 free_irq(priv->pdev->irq, hw);
3113 tasklet_disable(&priv->poll_tx_task);
3114 tasklet_disable(&priv->poll_rx_task);
3120 static void mwl8k_stop(struct ieee80211_hw *hw)
3122 struct mwl8k_priv *priv = hw->priv;
3125 mwl8k_cmd_radio_disable(hw);
3127 ieee80211_stop_queues(hw);
3129 /* Disable interrupts */
3130 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3131 free_irq(priv->pdev->irq, hw);
3133 /* Stop finalize join worker */
3134 cancel_work_sync(&priv->finalize_join_worker);
3135 if (priv->beacon_skb != NULL)
3136 dev_kfree_skb(priv->beacon_skb);
3138 /* Stop TX reclaim and RX tasklets. */
3139 tasklet_disable(&priv->poll_tx_task);
3140 tasklet_disable(&priv->poll_rx_task);
3142 /* Return all skbs to mac80211 */
3143 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3144 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3147 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3148 struct ieee80211_vif *vif)
3150 struct mwl8k_priv *priv = hw->priv;
3151 struct mwl8k_vif *mwl8k_vif;
3154 * We only support one active interface at a time.
3156 if (priv->vif != NULL)
3160 * Reject interface creation if sniffer mode is active, as
3161 * STA operation is mutually exclusive with hardware sniffer
3162 * mode. (Sniffer mode is only used on STA firmware.)
3164 if (priv->sniffer_enabled) {
3165 printk(KERN_INFO "%s: unable to create STA "
3166 "interface due to sniffer mode being enabled\n",
3167 wiphy_name(hw->wiphy));
3171 /* Set the mac address. */
3172 mwl8k_cmd_set_mac_addr(hw, vif->addr);
3175 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3177 /* Clean out driver private area */
3178 mwl8k_vif = MWL8K_VIF(vif);
3179 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3181 /* Set Initial sequence number to zero */
3182 mwl8k_vif->seqno = 0;
3185 priv->current_channel = NULL;
3190 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3191 struct ieee80211_vif *vif)
3193 struct mwl8k_priv *priv = hw->priv;
3196 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3198 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3203 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3205 struct ieee80211_conf *conf = &hw->conf;
3206 struct mwl8k_priv *priv = hw->priv;
3209 if (conf->flags & IEEE80211_CONF_IDLE) {
3210 mwl8k_cmd_radio_disable(hw);
3211 priv->current_channel = NULL;
3215 rc = mwl8k_fw_lock(hw);
3219 rc = mwl8k_cmd_radio_enable(hw);
3223 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3227 priv->current_channel = conf->channel;
3229 if (conf->power_level > 18)
3230 conf->power_level = 18;
3231 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3236 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3238 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3240 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3244 mwl8k_fw_unlock(hw);
3250 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3251 struct ieee80211_bss_conf *info, u32 changed)
3253 struct mwl8k_priv *priv = hw->priv;
3254 u32 ap_legacy_rates;
3255 u8 ap_mcs_rates[16];
3258 if (mwl8k_fw_lock(hw))
3262 * No need to capture a beacon if we're no longer associated.
3264 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3265 priv->capture_beacon = false;
3268 * Get the AP's legacy and MCS rates.
3270 ap_legacy_rates = 0;
3271 if (vif->bss_conf.assoc) {
3272 struct ieee80211_sta *ap;
3275 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3281 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3282 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3287 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3288 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3292 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3297 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3298 rc = mwl8k_set_radio_preamble(hw,
3299 vif->bss_conf.use_short_preamble);
3304 if (changed & BSS_CHANGED_ERP_SLOT) {
3305 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3310 if (((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) ||
3311 (changed & (BSS_CHANGED_ERP_CTS_PROT | BSS_CHANGED_HT))) {
3312 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3317 if (vif->bss_conf.assoc &&
3318 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3320 * Finalize the join. Tell rx handler to process
3321 * next beacon from our BSSID.
3323 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3324 priv->capture_beacon = true;
3328 mwl8k_fw_unlock(hw);
3332 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3333 struct ieee80211_bss_conf *info, u32 changed)
3337 if (mwl8k_fw_lock(hw))
3340 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3341 rc = mwl8k_set_radio_preamble(hw,
3342 vif->bss_conf.use_short_preamble);
3347 if (changed & BSS_CHANGED_BASIC_RATES) {
3352 * Use lowest supported basic rate for multicasts
3353 * and management frames (such as probe responses --
3354 * beacons will always go out at 1 Mb/s).
3356 idx = ffs(vif->bss_conf.basic_rates);
3357 rate = idx ? mwl8k_rates[idx - 1].hw_value : 2;
3359 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3362 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3363 struct sk_buff *skb;
3365 skb = ieee80211_beacon_get(hw, vif);
3367 mwl8k_cmd_set_beacon(hw, skb->data, skb->len);
3372 if (changed & BSS_CHANGED_BEACON_ENABLED)
3373 mwl8k_cmd_bss_start(hw, info->enable_beacon);
3376 mwl8k_fw_unlock(hw);
3380 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3381 struct ieee80211_bss_conf *info, u32 changed)
3383 struct mwl8k_priv *priv = hw->priv;
3386 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3388 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3391 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3392 int mc_count, struct dev_addr_list *mclist)
3394 struct mwl8k_cmd_pkt *cmd;
3397 * Synthesize and return a command packet that programs the
3398 * hardware multicast address filter. At this point we don't
3399 * know whether FIF_ALLMULTI is being requested, but if it is,
3400 * we'll end up throwing this packet away and creating a new
3401 * one in mwl8k_configure_filter().
3403 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3405 return (unsigned long)cmd;
3409 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3410 unsigned int changed_flags,
3411 unsigned int *total_flags)
3413 struct mwl8k_priv *priv = hw->priv;
3416 * Hardware sniffer mode is mutually exclusive with STA
3417 * operation, so refuse to enable sniffer mode if a STA
3418 * interface is active.
3420 if (priv->vif != NULL) {
3421 if (net_ratelimit())
3422 printk(KERN_INFO "%s: not enabling sniffer "
3423 "mode because STA interface is active\n",
3424 wiphy_name(hw->wiphy));
3428 if (!priv->sniffer_enabled) {
3429 if (mwl8k_cmd_enable_sniffer(hw, 1))
3431 priv->sniffer_enabled = true;
3434 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3435 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3441 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3442 unsigned int changed_flags,
3443 unsigned int *total_flags,
3446 struct mwl8k_priv *priv = hw->priv;
3447 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3450 * AP firmware doesn't allow fine-grained control over
3451 * the receive filter.
3454 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3460 * Enable hardware sniffer mode if FIF_CONTROL or
3461 * FIF_OTHER_BSS is requested.
3463 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3464 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3469 /* Clear unsupported feature flags */
3470 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3472 if (mwl8k_fw_lock(hw)) {
3477 if (priv->sniffer_enabled) {
3478 mwl8k_cmd_enable_sniffer(hw, 0);
3479 priv->sniffer_enabled = false;
3482 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3483 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3485 * Disable the BSS filter.
3487 mwl8k_cmd_set_pre_scan(hw);
3492 * Enable the BSS filter.
3494 * If there is an active STA interface, use that
3495 * interface's BSSID, otherwise use a dummy one
3496 * (where the OUI part needs to be nonzero for
3497 * the BSSID to be accepted by POST_SCAN).
3499 bssid = "\x01\x00\x00\x00\x00\x00";
3500 if (priv->vif != NULL)
3501 bssid = priv->vif->bss_conf.bssid;
3503 mwl8k_cmd_set_post_scan(hw, bssid);
3508 * If FIF_ALLMULTI is being requested, throw away the command
3509 * packet that ->prepare_multicast() built and replace it with
3510 * a command packet that enables reception of all multicast
3513 if (*total_flags & FIF_ALLMULTI) {
3515 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3519 mwl8k_post_cmd(hw, cmd);
3523 mwl8k_fw_unlock(hw);
3526 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3528 return mwl8k_cmd_set_rts_threshold(hw, value);
3531 struct mwl8k_sta_notify_item
3533 struct list_head list;
3534 struct ieee80211_vif *vif;
3535 enum sta_notify_cmd cmd;
3536 struct ieee80211_sta sta;
3540 mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
3542 struct mwl8k_priv *priv = hw->priv;
3545 * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
3547 if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3550 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
3552 struct ieee80211_sta *sta;
3555 sta = ieee80211_find_sta(s->vif, s->sta.addr);
3557 MWL8K_STA(sta)->peer_id = rc;
3560 } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3561 mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
3562 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3563 mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
3564 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3565 mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
3569 static void mwl8k_sta_notify_worker(struct work_struct *work)
3571 struct mwl8k_priv *priv =
3572 container_of(work, struct mwl8k_priv, sta_notify_worker);
3573 struct ieee80211_hw *hw = priv->hw;
3575 spin_lock_bh(&priv->sta_notify_list_lock);
3576 while (!list_empty(&priv->sta_notify_list)) {
3577 struct mwl8k_sta_notify_item *s;
3579 s = list_entry(priv->sta_notify_list.next,
3580 struct mwl8k_sta_notify_item, list);
3583 spin_unlock_bh(&priv->sta_notify_list_lock);
3585 mwl8k_do_sta_notify(hw, s);
3588 spin_lock_bh(&priv->sta_notify_list_lock);
3590 spin_unlock_bh(&priv->sta_notify_list_lock);
3594 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3595 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3597 struct mwl8k_priv *priv = hw->priv;
3598 struct mwl8k_sta_notify_item *s;
3600 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3603 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3609 spin_lock(&priv->sta_notify_list_lock);
3610 list_add_tail(&s->list, &priv->sta_notify_list);
3611 spin_unlock(&priv->sta_notify_list_lock);
3613 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3617 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3618 const struct ieee80211_tx_queue_params *params)
3620 struct mwl8k_priv *priv = hw->priv;
3623 rc = mwl8k_fw_lock(hw);
3625 if (!priv->wmm_enabled)
3626 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3629 rc = mwl8k_cmd_set_edca_params(hw, queue,
3635 mwl8k_fw_unlock(hw);
3641 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3642 struct ieee80211_tx_queue_stats *stats)
3644 struct mwl8k_priv *priv = hw->priv;
3645 struct mwl8k_tx_queue *txq;
3648 spin_lock_bh(&priv->tx_lock);
3649 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3650 txq = priv->txq + index;
3651 memcpy(&stats[index], &txq->stats,
3652 sizeof(struct ieee80211_tx_queue_stats));
3654 spin_unlock_bh(&priv->tx_lock);
3659 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3660 struct ieee80211_low_level_stats *stats)
3662 return mwl8k_cmd_get_stat(hw, stats);
3666 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3667 enum ieee80211_ampdu_mlme_action action,
3668 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3671 case IEEE80211_AMPDU_RX_START:
3672 case IEEE80211_AMPDU_RX_STOP:
3673 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3681 static const struct ieee80211_ops mwl8k_ops = {
3683 .start = mwl8k_start,
3685 .add_interface = mwl8k_add_interface,
3686 .remove_interface = mwl8k_remove_interface,
3687 .config = mwl8k_config,
3688 .bss_info_changed = mwl8k_bss_info_changed,
3689 .prepare_multicast = mwl8k_prepare_multicast,
3690 .configure_filter = mwl8k_configure_filter,
3691 .set_rts_threshold = mwl8k_set_rts_threshold,
3692 .sta_notify = mwl8k_sta_notify,
3693 .conf_tx = mwl8k_conf_tx,
3694 .get_tx_stats = mwl8k_get_tx_stats,
3695 .get_stats = mwl8k_get_stats,
3696 .ampdu_action = mwl8k_ampdu_action,
3699 static void mwl8k_finalize_join_worker(struct work_struct *work)
3701 struct mwl8k_priv *priv =
3702 container_of(work, struct mwl8k_priv, finalize_join_worker);
3703 struct sk_buff *skb = priv->beacon_skb;
3705 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3706 priv->vif->bss_conf.dtim_period);
3709 priv->beacon_skb = NULL;
3718 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3720 .part_name = "88w8363",
3721 .helper_image = "mwl8k/helper_8363.fw",
3722 .fw_image = "mwl8k/fmimage_8363.fw",
3725 .part_name = "88w8687",
3726 .helper_image = "mwl8k/helper_8687.fw",
3727 .fw_image = "mwl8k/fmimage_8687.fw",
3730 .part_name = "88w8366",
3731 .helper_image = "mwl8k/helper_8366.fw",
3732 .fw_image = "mwl8k/fmimage_8366.fw",
3733 .ap_rxd_ops = &rxd_8366_ap_ops,
3737 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3738 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3739 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3740 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3741 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3742 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3744 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3745 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3746 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3747 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3748 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3749 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3752 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3754 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3755 const struct pci_device_id *id)
3757 static int printed_version = 0;
3758 struct ieee80211_hw *hw;
3759 struct mwl8k_priv *priv;
3763 if (!printed_version) {
3764 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3765 printed_version = 1;
3769 rc = pci_enable_device(pdev);
3771 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3776 rc = pci_request_regions(pdev, MWL8K_NAME);
3778 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3780 goto err_disable_device;
3783 pci_set_master(pdev);
3786 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3788 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3793 SET_IEEE80211_DEV(hw, &pdev->dev);
3794 pci_set_drvdata(pdev, hw);
3799 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3802 priv->sram = pci_iomap(pdev, 0, 0x10000);
3803 if (priv->sram == NULL) {
3804 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3805 wiphy_name(hw->wiphy));
3810 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3811 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3813 priv->regs = pci_iomap(pdev, 1, 0x10000);
3814 if (priv->regs == NULL) {
3815 priv->regs = pci_iomap(pdev, 2, 0x10000);
3816 if (priv->regs == NULL) {
3817 printk(KERN_ERR "%s: Cannot map device registers\n",
3818 wiphy_name(hw->wiphy));
3824 /* Reset firmware and hardware */
3825 mwl8k_hw_reset(priv);
3827 /* Ask userland hotplug daemon for the device firmware */
3828 rc = mwl8k_request_firmware(priv);
3830 printk(KERN_ERR "%s: Firmware files not found\n",
3831 wiphy_name(hw->wiphy));
3832 goto err_stop_firmware;
3835 /* Load firmware into hardware */
3836 rc = mwl8k_load_firmware(hw);
3838 printk(KERN_ERR "%s: Cannot start firmware\n",
3839 wiphy_name(hw->wiphy));
3840 goto err_stop_firmware;
3843 /* Reclaim memory once firmware is successfully loaded */
3844 mwl8k_release_firmware(priv);
3848 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3849 if (priv->rxd_ops == NULL) {
3850 printk(KERN_ERR "%s: Driver does not have AP "
3851 "firmware image support for this hardware\n",
3852 wiphy_name(hw->wiphy));
3853 goto err_stop_firmware;
3856 priv->rxd_ops = &rxd_sta_ops;
3859 priv->sniffer_enabled = false;
3860 priv->wmm_enabled = false;
3861 priv->pending_tx_pkts = 0;
3864 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3865 priv->band.band = IEEE80211_BAND_2GHZ;
3866 priv->band.channels = priv->channels;
3867 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3868 priv->band.bitrates = priv->rates;
3869 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3870 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3872 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3873 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3876 * Extra headroom is the size of the required DMA header
3877 * minus the size of the smallest 802.11 frame (CTS frame).
3879 hw->extra_tx_headroom =
3880 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3882 hw->channel_change_time = 10;
3884 hw->queues = MWL8K_TX_QUEUES;
3886 /* Set rssi and noise values to dBm */
3887 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3888 hw->vif_data_size = sizeof(struct mwl8k_vif);
3889 hw->sta_data_size = sizeof(struct mwl8k_sta);
3892 /* Set default radio state and preamble */
3894 priv->radio_short_preamble = 0;
3896 /* Station database handling */
3897 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
3898 spin_lock_init(&priv->sta_notify_list_lock);
3899 INIT_LIST_HEAD(&priv->sta_notify_list);
3901 /* Finalize join worker */
3902 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3904 /* TX reclaim and RX tasklets. */
3905 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
3906 tasklet_disable(&priv->poll_tx_task);
3907 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
3908 tasklet_disable(&priv->poll_rx_task);
3910 /* Power management cookie */
3911 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3912 if (priv->cookie == NULL)
3913 goto err_stop_firmware;
3915 rc = mwl8k_rxq_init(hw, 0);
3917 goto err_free_cookie;
3918 rxq_refill(hw, 0, INT_MAX);
3920 mutex_init(&priv->fw_mutex);
3921 priv->fw_mutex_owner = NULL;
3922 priv->fw_mutex_depth = 0;
3923 priv->hostcmd_wait = NULL;
3925 spin_lock_init(&priv->tx_lock);
3927 priv->tx_wait = NULL;
3929 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3930 rc = mwl8k_txq_init(hw, i);
3932 goto err_free_queues;
3935 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3936 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3937 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
3938 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3939 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3941 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3942 IRQF_SHARED, MWL8K_NAME, hw);
3944 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3945 wiphy_name(hw->wiphy));
3946 goto err_free_queues;
3950 * Temporarily enable interrupts. Initial firmware host
3951 * commands use interrupts and avoid polling. Disable
3952 * interrupts when done.
3954 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3956 /* Get config data, mac addrs etc */
3958 rc = mwl8k_cmd_get_hw_spec_ap(hw);
3960 rc = mwl8k_cmd_set_hw_spec(hw);
3962 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
3964 rc = mwl8k_cmd_get_hw_spec_sta(hw);
3966 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3969 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3970 wiphy_name(hw->wiphy));
3974 /* Turn radio off */
3975 rc = mwl8k_cmd_radio_disable(hw);
3977 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3981 /* Clear MAC address */
3982 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3984 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3985 wiphy_name(hw->wiphy));
3989 /* Disable interrupts */
3990 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3991 free_irq(priv->pdev->irq, hw);
3993 rc = ieee80211_register_hw(hw);
3995 printk(KERN_ERR "%s: Cannot register device\n",
3996 wiphy_name(hw->wiphy));
3997 goto err_free_queues;
4000 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
4001 wiphy_name(hw->wiphy), priv->device_info->part_name,
4002 priv->hw_rev, hw->wiphy->perm_addr,
4003 priv->ap_fw ? "AP" : "STA",
4004 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4005 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4010 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4011 free_irq(priv->pdev->irq, hw);
4014 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4015 mwl8k_txq_deinit(hw, i);
4016 mwl8k_rxq_deinit(hw, 0);
4019 if (priv->cookie != NULL)
4020 pci_free_consistent(priv->pdev, 4,
4021 priv->cookie, priv->cookie_dma);
4024 mwl8k_hw_reset(priv);
4025 mwl8k_release_firmware(priv);
4028 if (priv->regs != NULL)
4029 pci_iounmap(pdev, priv->regs);
4031 if (priv->sram != NULL)
4032 pci_iounmap(pdev, priv->sram);
4034 pci_set_drvdata(pdev, NULL);
4035 ieee80211_free_hw(hw);
4038 pci_release_regions(pdev);
4041 pci_disable_device(pdev);
4046 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4048 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4051 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4053 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4054 struct mwl8k_priv *priv;
4061 ieee80211_stop_queues(hw);
4063 ieee80211_unregister_hw(hw);
4065 /* Remove TX reclaim and RX tasklets. */
4066 tasklet_kill(&priv->poll_tx_task);
4067 tasklet_kill(&priv->poll_rx_task);
4070 mwl8k_hw_reset(priv);
4072 /* Return all skbs to mac80211 */
4073 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4074 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4076 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4077 mwl8k_txq_deinit(hw, i);
4079 mwl8k_rxq_deinit(hw, 0);
4081 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4083 pci_iounmap(pdev, priv->regs);
4084 pci_iounmap(pdev, priv->sram);
4085 pci_set_drvdata(pdev, NULL);
4086 ieee80211_free_hw(hw);
4087 pci_release_regions(pdev);
4088 pci_disable_device(pdev);
4091 static struct pci_driver mwl8k_driver = {
4093 .id_table = mwl8k_pci_id_table,
4094 .probe = mwl8k_probe,
4095 .remove = __devexit_p(mwl8k_remove),
4096 .shutdown = __devexit_p(mwl8k_shutdown),
4099 static int __init mwl8k_init(void)
4101 return pci_register_driver(&mwl8k_driver);
4104 static void __exit mwl8k_exit(void)
4106 pci_unregister_driver(&mwl8k_driver);
4109 module_init(mwl8k_init);
4110 module_exit(mwl8k_exit);
4112 MODULE_DESCRIPTION(MWL8K_DESC);
4113 MODULE_VERSION(MWL8K_VERSION);
4114 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4115 MODULE_LICENSE("GPL");