2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <net/mac80211.h>
23 #include <linux/moduleparam.h>
24 #include <linux/firmware.h>
25 #include <linux/workqueue.h>
27 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
28 #define MWL8K_NAME KBUILD_MODNAME
29 #define MWL8K_VERSION "0.11"
31 /* Register definitions */
32 #define MWL8K_HIU_GEN_PTR 0x00000c10
33 #define MWL8K_MODE_STA 0x0000005a
34 #define MWL8K_MODE_AP 0x000000a5
35 #define MWL8K_HIU_INT_CODE 0x00000c14
36 #define MWL8K_FWSTA_READY 0xf0f1f2f4
37 #define MWL8K_FWAP_READY 0xf1f2f4a5
38 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
39 #define MWL8K_HIU_SCRATCH 0x00000c40
41 /* Host->device communications */
42 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
43 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
44 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
45 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
46 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
47 #define MWL8K_H2A_INT_DUMMY (1 << 20)
48 #define MWL8K_H2A_INT_RESET (1 << 15)
49 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
50 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
52 /* Device->host communications */
53 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
54 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
55 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
56 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
57 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
58 #define MWL8K_A2H_INT_DUMMY (1 << 20)
59 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
60 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
61 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
62 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
63 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
64 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
65 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
66 #define MWL8K_A2H_INT_RX_READY (1 << 1)
67 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
69 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
70 MWL8K_A2H_INT_CHNL_SWITCHED | \
71 MWL8K_A2H_INT_QUEUE_EMPTY | \
72 MWL8K_A2H_INT_RADAR_DETECT | \
73 MWL8K_A2H_INT_RADIO_ON | \
74 MWL8K_A2H_INT_RADIO_OFF | \
75 MWL8K_A2H_INT_MAC_EVENT | \
76 MWL8K_A2H_INT_OPC_DONE | \
77 MWL8K_A2H_INT_RX_READY | \
78 MWL8K_A2H_INT_TX_DONE)
80 #define MWL8K_RX_QUEUES 1
81 #define MWL8K_TX_QUEUES 4
85 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
86 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
87 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
91 struct mwl8k_device_info {
95 struct rxd_ops *ap_rxd_ops;
98 struct mwl8k_rx_queue {
101 /* hw receives here */
104 /* refill descs here */
111 DECLARE_PCI_UNMAP_ADDR(dma)
115 struct mwl8k_tx_queue {
116 /* hw transmits here */
119 /* sw appends here */
122 struct ieee80211_tx_queue_stats stats;
123 struct mwl8k_tx_desc *txd;
125 struct sk_buff **skb;
129 struct ieee80211_hw *hw;
130 struct pci_dev *pdev;
132 struct mwl8k_device_info *device_info;
138 struct firmware *fw_helper;
139 struct firmware *fw_ucode;
141 /* hardware/firmware parameters */
143 struct rxd_ops *rxd_ops;
144 struct ieee80211_supported_band band_24;
145 struct ieee80211_channel channels_24[14];
146 struct ieee80211_rate rates_24[14];
148 /* firmware access */
149 struct mutex fw_mutex;
150 struct task_struct *fw_mutex_owner;
152 struct completion *hostcmd_wait;
154 /* lock held over TX and TX reap */
157 /* TX quiesce completion, protected by fw_mutex and tx_lock */
158 struct completion *tx_wait;
160 struct ieee80211_vif *vif;
162 /* power management status cookie from firmware */
164 dma_addr_t cookie_dma;
171 * Running count of TX packets in flight, to avoid
172 * iterating over the transmit rings each time.
176 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
177 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
180 bool radio_short_preamble;
181 bool sniffer_enabled;
184 struct work_struct sta_notify_worker;
185 spinlock_t sta_notify_list_lock;
186 struct list_head sta_notify_list;
188 /* XXX need to convert this to handle multiple interfaces */
190 u8 capture_bssid[ETH_ALEN];
191 struct sk_buff *beacon_skb;
194 * This FJ worker has to be global as it is scheduled from the
195 * RX handler. At this point we don't know which interface it
196 * belongs to until the list of bssids waiting to complete join
199 struct work_struct finalize_join_worker;
201 /* Tasklet to perform TX reclaim. */
202 struct tasklet_struct poll_tx_task;
204 /* Tasklet to perform RX. */
205 struct tasklet_struct poll_rx_task;
208 /* Per interface specific private data */
210 /* Non AMPDU sequence number assigned by driver. */
213 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
216 /* Index into station database. Returned by UPDATE_STADB. */
219 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
221 static const struct ieee80211_channel mwl8k_channels_24[] = {
222 { .center_freq = 2412, .hw_value = 1, },
223 { .center_freq = 2417, .hw_value = 2, },
224 { .center_freq = 2422, .hw_value = 3, },
225 { .center_freq = 2427, .hw_value = 4, },
226 { .center_freq = 2432, .hw_value = 5, },
227 { .center_freq = 2437, .hw_value = 6, },
228 { .center_freq = 2442, .hw_value = 7, },
229 { .center_freq = 2447, .hw_value = 8, },
230 { .center_freq = 2452, .hw_value = 9, },
231 { .center_freq = 2457, .hw_value = 10, },
232 { .center_freq = 2462, .hw_value = 11, },
233 { .center_freq = 2467, .hw_value = 12, },
234 { .center_freq = 2472, .hw_value = 13, },
235 { .center_freq = 2484, .hw_value = 14, },
238 static const struct ieee80211_rate mwl8k_rates_24[] = {
239 { .bitrate = 10, .hw_value = 2, },
240 { .bitrate = 20, .hw_value = 4, },
241 { .bitrate = 55, .hw_value = 11, },
242 { .bitrate = 110, .hw_value = 22, },
243 { .bitrate = 220, .hw_value = 44, },
244 { .bitrate = 60, .hw_value = 12, },
245 { .bitrate = 90, .hw_value = 18, },
246 { .bitrate = 120, .hw_value = 24, },
247 { .bitrate = 180, .hw_value = 36, },
248 { .bitrate = 240, .hw_value = 48, },
249 { .bitrate = 360, .hw_value = 72, },
250 { .bitrate = 480, .hw_value = 96, },
251 { .bitrate = 540, .hw_value = 108, },
252 { .bitrate = 720, .hw_value = 144, },
255 /* Set or get info from Firmware */
256 #define MWL8K_CMD_SET 0x0001
257 #define MWL8K_CMD_GET 0x0000
259 /* Firmware command codes */
260 #define MWL8K_CMD_CODE_DNLD 0x0001
261 #define MWL8K_CMD_GET_HW_SPEC 0x0003
262 #define MWL8K_CMD_SET_HW_SPEC 0x0004
263 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
264 #define MWL8K_CMD_GET_STAT 0x0014
265 #define MWL8K_CMD_RADIO_CONTROL 0x001c
266 #define MWL8K_CMD_RF_TX_POWER 0x001e
267 #define MWL8K_CMD_RF_ANTENNA 0x0020
268 #define MWL8K_CMD_SET_BEACON 0x0100
269 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
270 #define MWL8K_CMD_SET_POST_SCAN 0x0108
271 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
272 #define MWL8K_CMD_SET_AID 0x010d
273 #define MWL8K_CMD_SET_RATE 0x0110
274 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
275 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
276 #define MWL8K_CMD_SET_SLOT 0x0114
277 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
278 #define MWL8K_CMD_SET_WMM_MODE 0x0123
279 #define MWL8K_CMD_MIMO_CONFIG 0x0125
280 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
281 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
282 #define MWL8K_CMD_SET_MAC_ADDR 0x0202
283 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
284 #define MWL8K_CMD_BSS_START 0x1100
285 #define MWL8K_CMD_SET_NEW_STN 0x1111
286 #define MWL8K_CMD_UPDATE_STADB 0x1123
288 static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
290 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
291 snprintf(buf, bufsize, "%s", #x);\
294 switch (cmd & ~0x8000) {
295 MWL8K_CMDNAME(CODE_DNLD);
296 MWL8K_CMDNAME(GET_HW_SPEC);
297 MWL8K_CMDNAME(SET_HW_SPEC);
298 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
299 MWL8K_CMDNAME(GET_STAT);
300 MWL8K_CMDNAME(RADIO_CONTROL);
301 MWL8K_CMDNAME(RF_TX_POWER);
302 MWL8K_CMDNAME(RF_ANTENNA);
303 MWL8K_CMDNAME(SET_BEACON);
304 MWL8K_CMDNAME(SET_PRE_SCAN);
305 MWL8K_CMDNAME(SET_POST_SCAN);
306 MWL8K_CMDNAME(SET_RF_CHANNEL);
307 MWL8K_CMDNAME(SET_AID);
308 MWL8K_CMDNAME(SET_RATE);
309 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
310 MWL8K_CMDNAME(RTS_THRESHOLD);
311 MWL8K_CMDNAME(SET_SLOT);
312 MWL8K_CMDNAME(SET_EDCA_PARAMS);
313 MWL8K_CMDNAME(SET_WMM_MODE);
314 MWL8K_CMDNAME(MIMO_CONFIG);
315 MWL8K_CMDNAME(USE_FIXED_RATE);
316 MWL8K_CMDNAME(ENABLE_SNIFFER);
317 MWL8K_CMDNAME(SET_MAC_ADDR);
318 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
319 MWL8K_CMDNAME(BSS_START);
320 MWL8K_CMDNAME(SET_NEW_STN);
321 MWL8K_CMDNAME(UPDATE_STADB);
323 snprintf(buf, bufsize, "0x%x", cmd);
330 /* Hardware and firmware reset */
331 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
333 iowrite32(MWL8K_H2A_INT_RESET,
334 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
335 iowrite32(MWL8K_H2A_INT_RESET,
336 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
340 /* Release fw image */
341 static void mwl8k_release_fw(struct firmware **fw)
345 release_firmware(*fw);
349 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
351 mwl8k_release_fw(&priv->fw_ucode);
352 mwl8k_release_fw(&priv->fw_helper);
355 /* Request fw image */
356 static int mwl8k_request_fw(struct mwl8k_priv *priv,
357 const char *fname, struct firmware **fw)
359 /* release current image */
361 mwl8k_release_fw(fw);
363 return request_firmware((const struct firmware **)fw,
364 fname, &priv->pdev->dev);
367 static int mwl8k_request_firmware(struct mwl8k_priv *priv)
369 struct mwl8k_device_info *di = priv->device_info;
372 if (di->helper_image != NULL) {
373 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
375 printk(KERN_ERR "%s: Error requesting helper "
376 "firmware file %s\n", pci_name(priv->pdev),
382 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
384 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
385 pci_name(priv->pdev), di->fw_image);
386 mwl8k_release_fw(&priv->fw_helper);
393 struct mwl8k_cmd_pkt {
399 } __attribute__((packed));
405 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
407 void __iomem *regs = priv->regs;
411 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
412 if (pci_dma_mapping_error(priv->pdev, dma_addr))
415 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
416 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
417 iowrite32(MWL8K_H2A_INT_DOORBELL,
418 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
419 iowrite32(MWL8K_H2A_INT_DUMMY,
420 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
426 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
427 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
428 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
436 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
438 return loops ? 0 : -ETIMEDOUT;
441 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
442 const u8 *data, size_t length)
444 struct mwl8k_cmd_pkt *cmd;
448 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
452 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
458 int block_size = length > 256 ? 256 : length;
460 memcpy(cmd->payload, data + done, block_size);
461 cmd->length = cpu_to_le16(block_size);
463 rc = mwl8k_send_fw_load_cmd(priv, cmd,
464 sizeof(*cmd) + block_size);
469 length -= block_size;
474 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
482 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
483 const u8 *data, size_t length)
485 unsigned char *buffer;
486 int may_continue, rc = 0;
487 u32 done, prev_block_size;
489 buffer = kmalloc(1024, GFP_KERNEL);
496 while (may_continue > 0) {
499 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
500 if (block_size & 1) {
504 done += prev_block_size;
505 length -= prev_block_size;
508 if (block_size > 1024 || block_size > length) {
518 if (block_size == 0) {
525 prev_block_size = block_size;
526 memcpy(buffer, data + done, block_size);
528 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
533 if (!rc && length != 0)
541 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
543 struct mwl8k_priv *priv = hw->priv;
544 struct firmware *fw = priv->fw_ucode;
548 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
549 struct firmware *helper = priv->fw_helper;
551 if (helper == NULL) {
552 printk(KERN_ERR "%s: helper image needed but none "
553 "given\n", pci_name(priv->pdev));
557 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
559 printk(KERN_ERR "%s: unable to load firmware "
560 "helper image\n", pci_name(priv->pdev));
565 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
567 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
571 printk(KERN_ERR "%s: unable to load firmware image\n",
572 pci_name(priv->pdev));
576 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
582 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
583 if (ready_code == MWL8K_FWAP_READY) {
586 } else if (ready_code == MWL8K_FWSTA_READY) {
595 return loops ? 0 : -ETIMEDOUT;
599 /* DMA header used by firmware and hardware. */
600 struct mwl8k_dma_data {
602 struct ieee80211_hdr wh;
604 } __attribute__((packed));
606 /* Routines to add/remove DMA header from skb. */
607 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
609 struct mwl8k_dma_data *tr;
612 tr = (struct mwl8k_dma_data *)skb->data;
613 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
615 if (hdrlen != sizeof(tr->wh)) {
616 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
617 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
618 *((__le16 *)(tr->data - 2)) = qos;
620 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
624 if (hdrlen != sizeof(*tr))
625 skb_pull(skb, sizeof(*tr) - hdrlen);
628 static inline void mwl8k_add_dma_header(struct sk_buff *skb)
630 struct ieee80211_hdr *wh;
632 struct mwl8k_dma_data *tr;
635 * Add a firmware DMA header; the firmware requires that we
636 * present a 2-byte payload length followed by a 4-address
637 * header (without QoS field), followed (optionally) by any
638 * WEP/ExtIV header (but only filled in for CCMP).
640 wh = (struct ieee80211_hdr *)skb->data;
642 hdrlen = ieee80211_hdrlen(wh->frame_control);
643 if (hdrlen != sizeof(*tr))
644 skb_push(skb, sizeof(*tr) - hdrlen);
646 if (ieee80211_is_data_qos(wh->frame_control))
649 tr = (struct mwl8k_dma_data *)skb->data;
651 memmove(&tr->wh, wh, hdrlen);
652 if (hdrlen != sizeof(tr->wh))
653 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
656 * Firmware length is the length of the fully formed "802.11
657 * payload". That is, everything except for the 802.11 header.
658 * This includes all crypto material including the MIC.
660 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
665 * Packet reception for 88w8366 AP firmware.
667 struct mwl8k_rxd_8366_ap {
671 __le32 pkt_phys_addr;
672 __le32 next_rxd_phys_addr;
676 __le32 hw_noise_floor_info;
683 } __attribute__((packed));
685 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
686 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
687 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
689 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
691 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
693 struct mwl8k_rxd_8366_ap *rxd = _rxd;
695 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
696 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
699 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
701 struct mwl8k_rxd_8366_ap *rxd = _rxd;
703 rxd->pkt_len = cpu_to_le16(len);
704 rxd->pkt_phys_addr = cpu_to_le32(addr);
710 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
713 struct mwl8k_rxd_8366_ap *rxd = _rxd;
715 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
719 memset(status, 0, sizeof(*status));
721 status->signal = -rxd->rssi;
722 status->noise = -rxd->noise_floor;
724 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
725 status->flag |= RX_FLAG_HT;
726 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
727 status->flag |= RX_FLAG_40MHZ;
728 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
732 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
733 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
734 status->rate_idx = i;
740 status->band = IEEE80211_BAND_2GHZ;
741 status->freq = ieee80211_channel_to_frequency(rxd->channel);
743 *qos = rxd->qos_control;
745 return le16_to_cpu(rxd->pkt_len);
748 static struct rxd_ops rxd_8366_ap_ops = {
749 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
750 .rxd_init = mwl8k_rxd_8366_ap_init,
751 .rxd_refill = mwl8k_rxd_8366_ap_refill,
752 .rxd_process = mwl8k_rxd_8366_ap_process,
756 * Packet reception for STA firmware.
758 struct mwl8k_rxd_sta {
762 __le32 pkt_phys_addr;
763 __le32 next_rxd_phys_addr;
773 } __attribute__((packed));
775 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
776 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
777 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
778 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
779 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
780 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
782 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
784 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
786 struct mwl8k_rxd_sta *rxd = _rxd;
788 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
789 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
792 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
794 struct mwl8k_rxd_sta *rxd = _rxd;
796 rxd->pkt_len = cpu_to_le16(len);
797 rxd->pkt_phys_addr = cpu_to_le32(addr);
803 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
806 struct mwl8k_rxd_sta *rxd = _rxd;
809 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
813 rate_info = le16_to_cpu(rxd->rate_info);
815 memset(status, 0, sizeof(*status));
817 status->signal = -rxd->rssi;
818 status->noise = -rxd->noise_level;
819 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
820 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
822 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
823 status->flag |= RX_FLAG_SHORTPRE;
824 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
825 status->flag |= RX_FLAG_40MHZ;
826 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
827 status->flag |= RX_FLAG_SHORT_GI;
828 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
829 status->flag |= RX_FLAG_HT;
831 status->band = IEEE80211_BAND_2GHZ;
832 status->freq = ieee80211_channel_to_frequency(rxd->channel);
834 *qos = rxd->qos_control;
836 return le16_to_cpu(rxd->pkt_len);
839 static struct rxd_ops rxd_sta_ops = {
840 .rxd_size = sizeof(struct mwl8k_rxd_sta),
841 .rxd_init = mwl8k_rxd_sta_init,
842 .rxd_refill = mwl8k_rxd_sta_refill,
843 .rxd_process = mwl8k_rxd_sta_process,
847 #define MWL8K_RX_DESCS 256
848 #define MWL8K_RX_MAXSZ 3800
850 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
852 struct mwl8k_priv *priv = hw->priv;
853 struct mwl8k_rx_queue *rxq = priv->rxq + index;
861 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
863 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
864 if (rxq->rxd == NULL) {
865 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
866 wiphy_name(hw->wiphy));
869 memset(rxq->rxd, 0, size);
871 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
872 if (rxq->buf == NULL) {
873 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
874 wiphy_name(hw->wiphy));
875 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
878 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
880 for (i = 0; i < MWL8K_RX_DESCS; i++) {
884 dma_addr_t next_dma_addr;
886 desc_size = priv->rxd_ops->rxd_size;
887 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
890 if (nexti == MWL8K_RX_DESCS)
892 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
894 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
900 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
902 struct mwl8k_priv *priv = hw->priv;
903 struct mwl8k_rx_queue *rxq = priv->rxq + index;
907 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
913 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
917 addr = pci_map_single(priv->pdev, skb->data,
918 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
922 if (rxq->tail == MWL8K_RX_DESCS)
924 rxq->buf[rx].skb = skb;
925 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
927 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
928 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
936 /* Must be called only when the card's reception is completely halted */
937 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
939 struct mwl8k_priv *priv = hw->priv;
940 struct mwl8k_rx_queue *rxq = priv->rxq + index;
943 for (i = 0; i < MWL8K_RX_DESCS; i++) {
944 if (rxq->buf[i].skb != NULL) {
945 pci_unmap_single(priv->pdev,
946 pci_unmap_addr(&rxq->buf[i], dma),
947 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
948 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
950 kfree_skb(rxq->buf[i].skb);
951 rxq->buf[i].skb = NULL;
958 pci_free_consistent(priv->pdev,
959 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
960 rxq->rxd, rxq->rxd_dma);
966 * Scan a list of BSSIDs to process for finalize join.
967 * Allows for extension to process multiple BSSIDs.
970 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
972 return priv->capture_beacon &&
973 ieee80211_is_beacon(wh->frame_control) &&
974 !compare_ether_addr(wh->addr3, priv->capture_bssid);
977 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
980 struct mwl8k_priv *priv = hw->priv;
982 priv->capture_beacon = false;
983 memset(priv->capture_bssid, 0, ETH_ALEN);
986 * Use GFP_ATOMIC as rxq_process is called from
987 * the primary interrupt handler, memory allocation call
990 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
991 if (priv->beacon_skb != NULL)
992 ieee80211_queue_work(hw, &priv->finalize_join_worker);
995 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
997 struct mwl8k_priv *priv = hw->priv;
998 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1002 while (rxq->rxd_count && limit--) {
1003 struct sk_buff *skb;
1006 struct ieee80211_rx_status status;
1009 skb = rxq->buf[rxq->head].skb;
1013 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1015 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1019 rxq->buf[rxq->head].skb = NULL;
1021 pci_unmap_single(priv->pdev,
1022 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1023 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1024 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1027 if (rxq->head == MWL8K_RX_DESCS)
1032 skb_put(skb, pkt_len);
1033 mwl8k_remove_dma_header(skb, qos);
1036 * Check for a pending join operation. Save a
1037 * copy of the beacon and schedule a tasklet to
1038 * send a FINALIZE_JOIN command to the firmware.
1040 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1041 mwl8k_save_beacon(hw, skb);
1043 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1044 ieee80211_rx_irqsafe(hw, skb);
1054 * Packet transmission.
1057 #define MWL8K_TXD_STATUS_OK 0x00000001
1058 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1059 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1060 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1061 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1063 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1064 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1065 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1066 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1067 #define MWL8K_QOS_EOSP 0x0010
1069 struct mwl8k_tx_desc {
1074 __le32 pkt_phys_addr;
1076 __u8 dest_MAC_addr[ETH_ALEN];
1077 __le32 next_txd_phys_addr;
1082 } __attribute__((packed));
1084 #define MWL8K_TX_DESCS 128
1086 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1088 struct mwl8k_priv *priv = hw->priv;
1089 struct mwl8k_tx_queue *txq = priv->txq + index;
1093 memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
1094 txq->stats.limit = MWL8K_TX_DESCS;
1098 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1100 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1101 if (txq->txd == NULL) {
1102 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1103 wiphy_name(hw->wiphy));
1106 memset(txq->txd, 0, size);
1108 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1109 if (txq->skb == NULL) {
1110 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1111 wiphy_name(hw->wiphy));
1112 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1115 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1117 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1118 struct mwl8k_tx_desc *tx_desc;
1121 tx_desc = txq->txd + i;
1122 nexti = (i + 1) % MWL8K_TX_DESCS;
1124 tx_desc->status = 0;
1125 tx_desc->next_txd_phys_addr =
1126 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1132 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1134 iowrite32(MWL8K_H2A_INT_PPA_READY,
1135 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1136 iowrite32(MWL8K_H2A_INT_DUMMY,
1137 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1138 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1141 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1143 struct mwl8k_priv *priv = hw->priv;
1146 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1147 struct mwl8k_tx_queue *txq = priv->txq + i;
1153 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1154 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1157 status = le32_to_cpu(tx_desc->status);
1158 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1163 if (tx_desc->pkt_len == 0)
1167 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1168 "fw_owned=%d drv_owned=%d unused=%d\n",
1169 wiphy_name(hw->wiphy), i,
1170 txq->stats.len, txq->head, txq->tail,
1171 fw_owned, drv_owned, unused);
1176 * Must be called with priv->fw_mutex held and tx queues stopped.
1178 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1180 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1182 struct mwl8k_priv *priv = hw->priv;
1183 DECLARE_COMPLETION_ONSTACK(tx_wait);
1190 * The TX queues are stopped at this point, so this test
1191 * doesn't need to take ->tx_lock.
1193 if (!priv->pending_tx_pkts)
1199 spin_lock_bh(&priv->tx_lock);
1200 priv->tx_wait = &tx_wait;
1203 unsigned long timeout;
1205 oldcount = priv->pending_tx_pkts;
1207 spin_unlock_bh(&priv->tx_lock);
1208 timeout = wait_for_completion_timeout(&tx_wait,
1209 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1210 spin_lock_bh(&priv->tx_lock);
1213 WARN_ON(priv->pending_tx_pkts);
1215 printk(KERN_NOTICE "%s: tx rings drained\n",
1216 wiphy_name(hw->wiphy));
1221 if (priv->pending_tx_pkts < oldcount) {
1222 printk(KERN_NOTICE "%s: waiting for tx rings "
1223 "to drain (%d -> %d pkts)\n",
1224 wiphy_name(hw->wiphy), oldcount,
1225 priv->pending_tx_pkts);
1230 priv->tx_wait = NULL;
1232 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1233 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1234 mwl8k_dump_tx_rings(hw);
1238 spin_unlock_bh(&priv->tx_lock);
1243 #define MWL8K_TXD_SUCCESS(status) \
1244 ((status) & (MWL8K_TXD_STATUS_OK | \
1245 MWL8K_TXD_STATUS_OK_RETRY | \
1246 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1249 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1251 struct mwl8k_priv *priv = hw->priv;
1252 struct mwl8k_tx_queue *txq = priv->txq + index;
1256 while (txq->stats.len > 0 && limit--) {
1258 struct mwl8k_tx_desc *tx_desc;
1261 struct sk_buff *skb;
1262 struct ieee80211_tx_info *info;
1266 tx_desc = txq->txd + tx;
1268 status = le32_to_cpu(tx_desc->status);
1270 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1274 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1277 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1278 BUG_ON(txq->stats.len == 0);
1280 priv->pending_tx_pkts--;
1282 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1283 size = le16_to_cpu(tx_desc->pkt_len);
1285 txq->skb[tx] = NULL;
1287 BUG_ON(skb == NULL);
1288 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1290 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1292 /* Mark descriptor as unused */
1293 tx_desc->pkt_phys_addr = 0;
1294 tx_desc->pkt_len = 0;
1296 info = IEEE80211_SKB_CB(skb);
1297 ieee80211_tx_info_clear_status(info);
1298 if (MWL8K_TXD_SUCCESS(status))
1299 info->flags |= IEEE80211_TX_STAT_ACK;
1301 ieee80211_tx_status_irqsafe(hw, skb);
1306 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1307 ieee80211_wake_queue(hw, index);
1312 /* must be called only when the card's transmit is completely halted */
1313 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1315 struct mwl8k_priv *priv = hw->priv;
1316 struct mwl8k_tx_queue *txq = priv->txq + index;
1318 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1323 pci_free_consistent(priv->pdev,
1324 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1325 txq->txd, txq->txd_dma);
1330 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1332 struct mwl8k_priv *priv = hw->priv;
1333 struct ieee80211_tx_info *tx_info;
1334 struct mwl8k_vif *mwl8k_vif;
1335 struct ieee80211_hdr *wh;
1336 struct mwl8k_tx_queue *txq;
1337 struct mwl8k_tx_desc *tx;
1343 wh = (struct ieee80211_hdr *)skb->data;
1344 if (ieee80211_is_data_qos(wh->frame_control))
1345 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1349 mwl8k_add_dma_header(skb);
1350 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1352 tx_info = IEEE80211_SKB_CB(skb);
1353 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1355 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1356 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1357 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1358 mwl8k_vif->seqno += 0x10;
1361 /* Setup firmware control bit fields for each frame type. */
1364 if (ieee80211_is_mgmt(wh->frame_control) ||
1365 ieee80211_is_ctl(wh->frame_control)) {
1367 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1368 } else if (ieee80211_is_data(wh->frame_control)) {
1370 if (is_multicast_ether_addr(wh->addr1))
1371 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1373 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1374 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1375 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1377 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1380 dma = pci_map_single(priv->pdev, skb->data,
1381 skb->len, PCI_DMA_TODEVICE);
1383 if (pci_dma_mapping_error(priv->pdev, dma)) {
1384 printk(KERN_DEBUG "%s: failed to dma map skb, "
1385 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1387 return NETDEV_TX_OK;
1390 spin_lock_bh(&priv->tx_lock);
1392 txq = priv->txq + index;
1394 BUG_ON(txq->skb[txq->tail] != NULL);
1395 txq->skb[txq->tail] = skb;
1397 tx = txq->txd + txq->tail;
1398 tx->data_rate = txdatarate;
1399 tx->tx_priority = index;
1400 tx->qos_control = cpu_to_le16(qos);
1401 tx->pkt_phys_addr = cpu_to_le32(dma);
1402 tx->pkt_len = cpu_to_le16(skb->len);
1404 if (!priv->ap_fw && tx_info->control.sta != NULL)
1405 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1409 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1413 priv->pending_tx_pkts++;
1416 if (txq->tail == MWL8K_TX_DESCS)
1419 if (txq->head == txq->tail)
1420 ieee80211_stop_queue(hw, index);
1422 mwl8k_tx_start(priv);
1424 spin_unlock_bh(&priv->tx_lock);
1426 return NETDEV_TX_OK;
1433 * We have the following requirements for issuing firmware commands:
1434 * - Some commands require that the packet transmit path is idle when
1435 * the command is issued. (For simplicity, we'll just quiesce the
1436 * transmit path for every command.)
1437 * - There are certain sequences of commands that need to be issued to
1438 * the hardware sequentially, with no other intervening commands.
1440 * This leads to an implementation of a "firmware lock" as a mutex that
1441 * can be taken recursively, and which is taken by both the low-level
1442 * command submission function (mwl8k_post_cmd) as well as any users of
1443 * that function that require issuing of an atomic sequence of commands,
1444 * and quiesces the transmit path whenever it's taken.
1446 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1448 struct mwl8k_priv *priv = hw->priv;
1450 if (priv->fw_mutex_owner != current) {
1453 mutex_lock(&priv->fw_mutex);
1454 ieee80211_stop_queues(hw);
1456 rc = mwl8k_tx_wait_empty(hw);
1458 ieee80211_wake_queues(hw);
1459 mutex_unlock(&priv->fw_mutex);
1464 priv->fw_mutex_owner = current;
1467 priv->fw_mutex_depth++;
1472 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1474 struct mwl8k_priv *priv = hw->priv;
1476 if (!--priv->fw_mutex_depth) {
1477 ieee80211_wake_queues(hw);
1478 priv->fw_mutex_owner = NULL;
1479 mutex_unlock(&priv->fw_mutex);
1485 * Command processing.
1488 /* Timeout firmware commands after 10s */
1489 #define MWL8K_CMD_TIMEOUT_MS 10000
1491 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1493 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1494 struct mwl8k_priv *priv = hw->priv;
1495 void __iomem *regs = priv->regs;
1496 dma_addr_t dma_addr;
1497 unsigned int dma_size;
1499 unsigned long timeout = 0;
1502 cmd->result = 0xffff;
1503 dma_size = le16_to_cpu(cmd->length);
1504 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1505 PCI_DMA_BIDIRECTIONAL);
1506 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1509 rc = mwl8k_fw_lock(hw);
1511 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1512 PCI_DMA_BIDIRECTIONAL);
1516 priv->hostcmd_wait = &cmd_wait;
1517 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1518 iowrite32(MWL8K_H2A_INT_DOORBELL,
1519 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1520 iowrite32(MWL8K_H2A_INT_DUMMY,
1521 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1523 timeout = wait_for_completion_timeout(&cmd_wait,
1524 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1526 priv->hostcmd_wait = NULL;
1528 mwl8k_fw_unlock(hw);
1530 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1531 PCI_DMA_BIDIRECTIONAL);
1534 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1535 wiphy_name(hw->wiphy),
1536 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1537 MWL8K_CMD_TIMEOUT_MS);
1542 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1544 rc = cmd->result ? -EINVAL : 0;
1546 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1547 wiphy_name(hw->wiphy),
1548 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1549 le16_to_cpu(cmd->result));
1551 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1552 wiphy_name(hw->wiphy),
1553 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1561 * CMD_GET_HW_SPEC (STA version).
1563 struct mwl8k_cmd_get_hw_spec_sta {
1564 struct mwl8k_cmd_pkt header;
1566 __u8 host_interface;
1568 __u8 perm_addr[ETH_ALEN];
1573 __u8 mcs_bitmap[16];
1574 __le32 rx_queue_ptr;
1575 __le32 num_tx_queues;
1576 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1578 __le32 num_tx_desc_per_queue;
1580 } __attribute__((packed));
1582 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1583 #define MWL8K_CAP_GREENFIELD 0x08000000
1584 #define MWL8K_CAP_AMPDU 0x04000000
1585 #define MWL8K_CAP_RX_STBC 0x01000000
1586 #define MWL8K_CAP_TX_STBC 0x00800000
1587 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1588 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1589 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1590 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1591 #define MWL8K_CAP_DELAY_BA 0x00003000
1592 #define MWL8K_CAP_MIMO 0x00000200
1593 #define MWL8K_CAP_40MHZ 0x00000100
1595 static void mwl8k_set_ht_caps(struct ieee80211_hw *hw, u32 cap)
1597 struct mwl8k_priv *priv = hw->priv;
1598 struct ieee80211_supported_band *band = &priv->band_24;
1602 band->ht_cap.ht_supported = 1;
1604 if (cap & MWL8K_CAP_MAX_AMSDU)
1605 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1606 if (cap & MWL8K_CAP_GREENFIELD)
1607 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1608 if (cap & MWL8K_CAP_AMPDU) {
1609 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1610 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1611 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1613 if (cap & MWL8K_CAP_RX_STBC)
1614 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1615 if (cap & MWL8K_CAP_TX_STBC)
1616 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1617 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1618 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1619 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1620 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1621 if (cap & MWL8K_CAP_DELAY_BA)
1622 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1623 if (cap & MWL8K_CAP_40MHZ)
1624 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1626 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1627 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1629 band->ht_cap.mcs.rx_mask[0] = 0xff;
1630 if (rx_streams >= 2)
1631 band->ht_cap.mcs.rx_mask[1] = 0xff;
1632 if (rx_streams >= 3)
1633 band->ht_cap.mcs.rx_mask[2] = 0xff;
1634 band->ht_cap.mcs.rx_mask[4] = 0x01;
1635 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1637 if (rx_streams != tx_streams) {
1638 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1639 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1640 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1644 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1646 struct mwl8k_priv *priv = hw->priv;
1647 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1651 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1655 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1656 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1658 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1659 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1660 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1661 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1662 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1663 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1664 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1665 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1667 rc = mwl8k_post_cmd(hw, &cmd->header);
1670 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1671 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1672 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1673 priv->hw_rev = cmd->hw_rev;
1674 if (cmd->caps & cpu_to_le32(MWL8K_CAP_MIMO))
1675 mwl8k_set_ht_caps(hw, le32_to_cpu(cmd->caps));
1683 * CMD_GET_HW_SPEC (AP version).
1685 struct mwl8k_cmd_get_hw_spec_ap {
1686 struct mwl8k_cmd_pkt header;
1688 __u8 host_interface;
1691 __u8 perm_addr[ETH_ALEN];
1702 } __attribute__((packed));
1704 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1706 struct mwl8k_priv *priv = hw->priv;
1707 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1710 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1714 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1715 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1717 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1718 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1720 rc = mwl8k_post_cmd(hw, &cmd->header);
1725 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1726 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1727 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1728 priv->hw_rev = cmd->hw_rev;
1730 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1731 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1733 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1734 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1736 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1737 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1739 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1740 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1742 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1743 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1745 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1746 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1756 struct mwl8k_cmd_set_hw_spec {
1757 struct mwl8k_cmd_pkt header;
1759 __u8 host_interface;
1761 __u8 perm_addr[ETH_ALEN];
1766 __le32 rx_queue_ptr;
1767 __le32 num_tx_queues;
1768 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1770 __le32 num_tx_desc_per_queue;
1772 } __attribute__((packed));
1774 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1775 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1776 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1778 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1780 struct mwl8k_priv *priv = hw->priv;
1781 struct mwl8k_cmd_set_hw_spec *cmd;
1785 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1789 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1790 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1792 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1793 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1794 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1795 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1796 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1797 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1798 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1799 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1800 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1801 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1803 rc = mwl8k_post_cmd(hw, &cmd->header);
1810 * CMD_MAC_MULTICAST_ADR.
1812 struct mwl8k_cmd_mac_multicast_adr {
1813 struct mwl8k_cmd_pkt header;
1816 __u8 addr[0][ETH_ALEN];
1819 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
1820 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
1821 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1822 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
1824 static struct mwl8k_cmd_pkt *
1825 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1826 int mc_count, struct dev_addr_list *mclist)
1828 struct mwl8k_priv *priv = hw->priv;
1829 struct mwl8k_cmd_mac_multicast_adr *cmd;
1832 if (allmulti || mc_count > priv->num_mcaddrs) {
1837 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1839 cmd = kzalloc(size, GFP_ATOMIC);
1843 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1844 cmd->header.length = cpu_to_le16(size);
1845 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1846 MWL8K_ENABLE_RX_BROADCAST);
1849 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1850 } else if (mc_count) {
1853 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1854 cmd->numaddr = cpu_to_le16(mc_count);
1855 for (i = 0; i < mc_count && mclist; i++) {
1856 if (mclist->da_addrlen != ETH_ALEN) {
1860 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1861 mclist = mclist->next;
1865 return &cmd->header;
1871 struct mwl8k_cmd_get_stat {
1872 struct mwl8k_cmd_pkt header;
1874 } __attribute__((packed));
1876 #define MWL8K_STAT_ACK_FAILURE 9
1877 #define MWL8K_STAT_RTS_FAILURE 12
1878 #define MWL8K_STAT_FCS_ERROR 24
1879 #define MWL8K_STAT_RTS_SUCCESS 11
1881 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1882 struct ieee80211_low_level_stats *stats)
1884 struct mwl8k_cmd_get_stat *cmd;
1887 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1891 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1892 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1894 rc = mwl8k_post_cmd(hw, &cmd->header);
1896 stats->dot11ACKFailureCount =
1897 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1898 stats->dot11RTSFailureCount =
1899 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1900 stats->dot11FCSErrorCount =
1901 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1902 stats->dot11RTSSuccessCount =
1903 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1911 * CMD_RADIO_CONTROL.
1913 struct mwl8k_cmd_radio_control {
1914 struct mwl8k_cmd_pkt header;
1918 } __attribute__((packed));
1921 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1923 struct mwl8k_priv *priv = hw->priv;
1924 struct mwl8k_cmd_radio_control *cmd;
1927 if (enable == priv->radio_on && !force)
1930 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1934 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1935 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1936 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1937 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
1938 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1940 rc = mwl8k_post_cmd(hw, &cmd->header);
1944 priv->radio_on = enable;
1949 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
1951 return mwl8k_cmd_radio_control(hw, 0, 0);
1954 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
1956 return mwl8k_cmd_radio_control(hw, 1, 0);
1960 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1962 struct mwl8k_priv *priv = hw->priv;
1964 priv->radio_short_preamble = short_preamble;
1966 return mwl8k_cmd_radio_control(hw, 1, 1);
1972 #define MWL8K_TX_POWER_LEVEL_TOTAL 8
1974 struct mwl8k_cmd_rf_tx_power {
1975 struct mwl8k_cmd_pkt header;
1977 __le16 support_level;
1978 __le16 current_level;
1980 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1981 } __attribute__((packed));
1983 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1985 struct mwl8k_cmd_rf_tx_power *cmd;
1988 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1992 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1993 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1994 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1995 cmd->support_level = cpu_to_le16(dBm);
1997 rc = mwl8k_post_cmd(hw, &cmd->header);
2006 struct mwl8k_cmd_rf_antenna {
2007 struct mwl8k_cmd_pkt header;
2010 } __attribute__((packed));
2012 #define MWL8K_RF_ANTENNA_RX 1
2013 #define MWL8K_RF_ANTENNA_TX 2
2016 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2018 struct mwl8k_cmd_rf_antenna *cmd;
2021 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2025 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2026 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2027 cmd->antenna = cpu_to_le16(antenna);
2028 cmd->mode = cpu_to_le16(mask);
2030 rc = mwl8k_post_cmd(hw, &cmd->header);
2039 struct mwl8k_cmd_set_beacon {
2040 struct mwl8k_cmd_pkt header;
2045 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, u8 *beacon, int len)
2047 struct mwl8k_cmd_set_beacon *cmd;
2050 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2054 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2055 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2056 cmd->beacon_len = cpu_to_le16(len);
2057 memcpy(cmd->beacon, beacon, len);
2059 rc = mwl8k_post_cmd(hw, &cmd->header);
2068 struct mwl8k_cmd_set_pre_scan {
2069 struct mwl8k_cmd_pkt header;
2070 } __attribute__((packed));
2072 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2074 struct mwl8k_cmd_set_pre_scan *cmd;
2077 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2081 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2082 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2084 rc = mwl8k_post_cmd(hw, &cmd->header);
2091 * CMD_SET_POST_SCAN.
2093 struct mwl8k_cmd_set_post_scan {
2094 struct mwl8k_cmd_pkt header;
2096 __u8 bssid[ETH_ALEN];
2097 } __attribute__((packed));
2100 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2102 struct mwl8k_cmd_set_post_scan *cmd;
2105 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2109 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2110 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2112 memcpy(cmd->bssid, mac, ETH_ALEN);
2114 rc = mwl8k_post_cmd(hw, &cmd->header);
2121 * CMD_SET_RF_CHANNEL.
2123 struct mwl8k_cmd_set_rf_channel {
2124 struct mwl8k_cmd_pkt header;
2126 __u8 current_channel;
2127 __le32 channel_flags;
2128 } __attribute__((packed));
2130 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2131 struct ieee80211_conf *conf)
2133 struct ieee80211_channel *channel = conf->channel;
2134 struct mwl8k_cmd_set_rf_channel *cmd;
2137 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2141 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2142 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2143 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2144 cmd->current_channel = channel->hw_value;
2146 if (channel->band == IEEE80211_BAND_2GHZ)
2147 cmd->channel_flags |= cpu_to_le32(0x00000001);
2149 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2150 conf->channel_type == NL80211_CHAN_HT20)
2151 cmd->channel_flags |= cpu_to_le32(0x00000080);
2152 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2153 cmd->channel_flags |= cpu_to_le32(0x000001900);
2154 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2155 cmd->channel_flags |= cpu_to_le32(0x000000900);
2157 rc = mwl8k_post_cmd(hw, &cmd->header);
2166 #define MWL8K_FRAME_PROT_DISABLED 0x00
2167 #define MWL8K_FRAME_PROT_11G 0x07
2168 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2169 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2171 struct mwl8k_cmd_update_set_aid {
2172 struct mwl8k_cmd_pkt header;
2175 /* AP's MAC address (BSSID) */
2176 __u8 bssid[ETH_ALEN];
2177 __le16 protection_mode;
2178 __u8 supp_rates[14];
2179 } __attribute__((packed));
2181 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2187 * Clear nonstandard rates 4 and 13.
2191 for (i = 0, j = 0; i < 14; i++) {
2192 if (mask & (1 << i))
2193 rates[j++] = mwl8k_rates_24[i].hw_value;
2198 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2199 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2201 struct mwl8k_cmd_update_set_aid *cmd;
2205 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2209 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2210 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2211 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2212 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2214 if (vif->bss_conf.use_cts_prot) {
2215 prot_mode = MWL8K_FRAME_PROT_11G;
2217 switch (vif->bss_conf.ht_operation_mode &
2218 IEEE80211_HT_OP_MODE_PROTECTION) {
2219 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2220 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2222 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2223 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2226 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2230 cmd->protection_mode = cpu_to_le16(prot_mode);
2232 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2234 rc = mwl8k_post_cmd(hw, &cmd->header);
2243 struct mwl8k_cmd_set_rate {
2244 struct mwl8k_cmd_pkt header;
2245 __u8 legacy_rates[14];
2247 /* Bitmap for supported MCS codes. */
2250 } __attribute__((packed));
2253 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2254 u32 legacy_rate_mask, u8 *mcs_rates)
2256 struct mwl8k_cmd_set_rate *cmd;
2259 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2263 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2264 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2265 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2266 memcpy(cmd->mcs_set, mcs_rates, 16);
2268 rc = mwl8k_post_cmd(hw, &cmd->header);
2275 * CMD_FINALIZE_JOIN.
2277 #define MWL8K_FJ_BEACON_MAXLEN 128
2279 struct mwl8k_cmd_finalize_join {
2280 struct mwl8k_cmd_pkt header;
2281 __le32 sleep_interval; /* Number of beacon periods to sleep */
2282 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2283 } __attribute__((packed));
2285 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2286 int framelen, int dtim)
2288 struct mwl8k_cmd_finalize_join *cmd;
2289 struct ieee80211_mgmt *payload = frame;
2293 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2297 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2298 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2299 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2301 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2302 if (payload_len < 0)
2304 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2305 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2307 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2309 rc = mwl8k_post_cmd(hw, &cmd->header);
2316 * CMD_SET_RTS_THRESHOLD.
2318 struct mwl8k_cmd_set_rts_threshold {
2319 struct mwl8k_cmd_pkt header;
2322 } __attribute__((packed));
2325 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2327 struct mwl8k_cmd_set_rts_threshold *cmd;
2330 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2334 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2335 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2336 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2337 cmd->threshold = cpu_to_le16(rts_thresh);
2339 rc = mwl8k_post_cmd(hw, &cmd->header);
2348 struct mwl8k_cmd_set_slot {
2349 struct mwl8k_cmd_pkt header;
2352 } __attribute__((packed));
2354 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2356 struct mwl8k_cmd_set_slot *cmd;
2359 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2363 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2364 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2365 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2366 cmd->short_slot = short_slot_time;
2368 rc = mwl8k_post_cmd(hw, &cmd->header);
2375 * CMD_SET_EDCA_PARAMS.
2377 struct mwl8k_cmd_set_edca_params {
2378 struct mwl8k_cmd_pkt header;
2380 /* See MWL8K_SET_EDCA_XXX below */
2383 /* TX opportunity in units of 32 us */
2388 /* Log exponent of max contention period: 0...15 */
2391 /* Log exponent of min contention period: 0...15 */
2394 /* Adaptive interframe spacing in units of 32us */
2397 /* TX queue to configure */
2401 /* Log exponent of max contention period: 0...15 */
2404 /* Log exponent of min contention period: 0...15 */
2407 /* Adaptive interframe spacing in units of 32us */
2410 /* TX queue to configure */
2414 } __attribute__((packed));
2416 #define MWL8K_SET_EDCA_CW 0x01
2417 #define MWL8K_SET_EDCA_TXOP 0x02
2418 #define MWL8K_SET_EDCA_AIFS 0x04
2420 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2421 MWL8K_SET_EDCA_TXOP | \
2422 MWL8K_SET_EDCA_AIFS)
2425 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2426 __u16 cw_min, __u16 cw_max,
2427 __u8 aifs, __u16 txop)
2429 struct mwl8k_priv *priv = hw->priv;
2430 struct mwl8k_cmd_set_edca_params *cmd;
2433 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2437 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2438 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2439 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2440 cmd->txop = cpu_to_le16(txop);
2442 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2443 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2444 cmd->ap.aifs = aifs;
2447 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2448 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2449 cmd->sta.aifs = aifs;
2450 cmd->sta.txq = qnum;
2453 rc = mwl8k_post_cmd(hw, &cmd->header);
2462 struct mwl8k_cmd_set_wmm_mode {
2463 struct mwl8k_cmd_pkt header;
2465 } __attribute__((packed));
2467 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2469 struct mwl8k_priv *priv = hw->priv;
2470 struct mwl8k_cmd_set_wmm_mode *cmd;
2473 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2477 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2478 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2479 cmd->action = cpu_to_le16(!!enable);
2481 rc = mwl8k_post_cmd(hw, &cmd->header);
2485 priv->wmm_enabled = enable;
2493 struct mwl8k_cmd_mimo_config {
2494 struct mwl8k_cmd_pkt header;
2496 __u8 rx_antenna_map;
2497 __u8 tx_antenna_map;
2498 } __attribute__((packed));
2500 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2502 struct mwl8k_cmd_mimo_config *cmd;
2505 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2509 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2510 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2511 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2512 cmd->rx_antenna_map = rx;
2513 cmd->tx_antenna_map = tx;
2515 rc = mwl8k_post_cmd(hw, &cmd->header);
2522 * CMD_USE_FIXED_RATE (STA version).
2524 struct mwl8k_cmd_use_fixed_rate_sta {
2525 struct mwl8k_cmd_pkt header;
2527 __le32 allow_rate_drop;
2531 __le32 enable_retry;
2538 } __attribute__((packed));
2540 #define MWL8K_USE_AUTO_RATE 0x0002
2541 #define MWL8K_UCAST_RATE 0
2543 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2545 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2548 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2552 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2553 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2554 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2555 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2557 rc = mwl8k_post_cmd(hw, &cmd->header);
2564 * CMD_USE_FIXED_RATE (AP version).
2566 struct mwl8k_cmd_use_fixed_rate_ap {
2567 struct mwl8k_cmd_pkt header;
2569 __le32 allow_rate_drop;
2571 struct mwl8k_rate_entry_ap {
2573 __le32 enable_retry;
2578 u8 multicast_rate_type;
2580 } __attribute__((packed));
2583 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2585 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2588 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2592 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2593 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2594 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2595 cmd->multicast_rate = mcast;
2596 cmd->management_rate = mgmt;
2598 rc = mwl8k_post_cmd(hw, &cmd->header);
2605 * CMD_ENABLE_SNIFFER.
2607 struct mwl8k_cmd_enable_sniffer {
2608 struct mwl8k_cmd_pkt header;
2610 } __attribute__((packed));
2612 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2614 struct mwl8k_cmd_enable_sniffer *cmd;
2617 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2621 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2622 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2623 cmd->action = cpu_to_le32(!!enable);
2625 rc = mwl8k_post_cmd(hw, &cmd->header);
2634 struct mwl8k_cmd_set_mac_addr {
2635 struct mwl8k_cmd_pkt header;
2639 __u8 mac_addr[ETH_ALEN];
2641 __u8 mac_addr[ETH_ALEN];
2643 } __attribute__((packed));
2645 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2646 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2648 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
2650 struct mwl8k_priv *priv = hw->priv;
2651 struct mwl8k_cmd_set_mac_addr *cmd;
2654 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2658 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2659 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2661 cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
2662 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2664 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2667 rc = mwl8k_post_cmd(hw, &cmd->header);
2674 * CMD_SET_RATEADAPT_MODE.
2676 struct mwl8k_cmd_set_rate_adapt_mode {
2677 struct mwl8k_cmd_pkt header;
2680 } __attribute__((packed));
2682 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2684 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2687 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2691 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2692 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2693 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2694 cmd->mode = cpu_to_le16(mode);
2696 rc = mwl8k_post_cmd(hw, &cmd->header);
2705 struct mwl8k_cmd_bss_start {
2706 struct mwl8k_cmd_pkt header;
2708 } __attribute__((packed));
2710 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, int enable)
2712 struct mwl8k_cmd_bss_start *cmd;
2715 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2719 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2720 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2721 cmd->enable = cpu_to_le32(enable);
2723 rc = mwl8k_post_cmd(hw, &cmd->header);
2732 struct mwl8k_cmd_set_new_stn {
2733 struct mwl8k_cmd_pkt header;
2739 __le32 legacy_rates;
2742 __le16 ht_capabilities_info;
2743 __u8 mac_ht_param_info;
2745 __u8 control_channel;
2752 } __attribute__((packed));
2754 #define MWL8K_STA_ACTION_ADD 0
2755 #define MWL8K_STA_ACTION_REMOVE 2
2757 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2758 struct ieee80211_vif *vif,
2759 struct ieee80211_sta *sta)
2761 struct mwl8k_cmd_set_new_stn *cmd;
2764 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2768 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2769 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2770 cmd->aid = cpu_to_le16(sta->aid);
2771 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2772 cmd->stn_id = cpu_to_le16(sta->aid);
2773 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2774 cmd->legacy_rates = cpu_to_le32(sta->supp_rates[IEEE80211_BAND_2GHZ]);
2775 if (sta->ht_cap.ht_supported) {
2776 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2777 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2778 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2779 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2780 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2781 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2782 ((sta->ht_cap.ampdu_density & 7) << 2);
2783 cmd->is_qos_sta = 1;
2786 rc = mwl8k_post_cmd(hw, &cmd->header);
2792 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2793 struct ieee80211_vif *vif)
2795 struct mwl8k_cmd_set_new_stn *cmd;
2798 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2802 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2803 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2804 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2806 rc = mwl8k_post_cmd(hw, &cmd->header);
2812 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2813 struct ieee80211_vif *vif, u8 *addr)
2815 struct mwl8k_cmd_set_new_stn *cmd;
2818 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2822 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2823 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2824 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2825 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2827 rc = mwl8k_post_cmd(hw, &cmd->header);
2836 struct ewc_ht_info {
2840 } __attribute__((packed));
2842 struct peer_capability_info {
2843 /* Peer type - AP vs. STA. */
2846 /* Basic 802.11 capabilities from assoc resp. */
2849 /* Set if peer supports 802.11n high throughput (HT). */
2852 /* Valid if HT is supported. */
2854 __u8 extended_ht_caps;
2855 struct ewc_ht_info ewc_info;
2857 /* Legacy rate table. Intersection of our rates and peer rates. */
2858 __u8 legacy_rates[12];
2860 /* HT rate table. Intersection of our rates and peer rates. */
2864 /* If set, interoperability mode, no proprietary extensions. */
2868 __le16 amsdu_enabled;
2869 } __attribute__((packed));
2871 struct mwl8k_cmd_update_stadb {
2872 struct mwl8k_cmd_pkt header;
2874 /* See STADB_ACTION_TYPE */
2877 /* Peer MAC address */
2878 __u8 peer_addr[ETH_ALEN];
2882 /* Peer info - valid during add/update. */
2883 struct peer_capability_info peer_info;
2884 } __attribute__((packed));
2886 #define MWL8K_STA_DB_MODIFY_ENTRY 1
2887 #define MWL8K_STA_DB_DEL_ENTRY 2
2889 /* Peer Entry flags - used to define the type of the peer node */
2890 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
2892 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
2893 struct ieee80211_vif *vif,
2894 struct ieee80211_sta *sta)
2896 struct mwl8k_cmd_update_stadb *cmd;
2897 struct peer_capability_info *p;
2900 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2904 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2905 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2906 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
2907 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
2909 p = &cmd->peer_info;
2910 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2911 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
2912 p->ht_support = sta->ht_cap.ht_supported;
2913 p->ht_caps = sta->ht_cap.cap;
2914 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
2915 ((sta->ht_cap.ampdu_density & 7) << 2);
2916 legacy_rate_mask_to_array(p->legacy_rates,
2917 sta->supp_rates[IEEE80211_BAND_2GHZ]);
2918 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
2920 p->amsdu_enabled = 0;
2922 rc = mwl8k_post_cmd(hw, &cmd->header);
2925 return rc ? rc : p->station_id;
2928 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
2929 struct ieee80211_vif *vif, u8 *addr)
2931 struct mwl8k_cmd_update_stadb *cmd;
2934 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2938 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2939 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2940 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
2941 memcpy(cmd->peer_addr, addr, ETH_ALEN);
2943 rc = mwl8k_post_cmd(hw, &cmd->header);
2951 * Interrupt handling.
2953 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2955 struct ieee80211_hw *hw = dev_id;
2956 struct mwl8k_priv *priv = hw->priv;
2959 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2963 if (status & MWL8K_A2H_INT_TX_DONE) {
2964 status &= ~MWL8K_A2H_INT_TX_DONE;
2965 tasklet_schedule(&priv->poll_tx_task);
2968 if (status & MWL8K_A2H_INT_RX_READY) {
2969 status &= ~MWL8K_A2H_INT_RX_READY;
2970 tasklet_schedule(&priv->poll_rx_task);
2974 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2976 if (status & MWL8K_A2H_INT_OPC_DONE) {
2977 if (priv->hostcmd_wait != NULL)
2978 complete(priv->hostcmd_wait);
2981 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2982 if (!mutex_is_locked(&priv->fw_mutex) &&
2983 priv->radio_on && priv->pending_tx_pkts)
2984 mwl8k_tx_start(priv);
2990 static void mwl8k_tx_poll(unsigned long data)
2992 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
2993 struct mwl8k_priv *priv = hw->priv;
2999 spin_lock_bh(&priv->tx_lock);
3001 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3002 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3004 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3005 complete(priv->tx_wait);
3006 priv->tx_wait = NULL;
3009 spin_unlock_bh(&priv->tx_lock);
3012 writel(~MWL8K_A2H_INT_TX_DONE,
3013 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3015 tasklet_schedule(&priv->poll_tx_task);
3019 static void mwl8k_rx_poll(unsigned long data)
3021 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3022 struct mwl8k_priv *priv = hw->priv;
3026 limit -= rxq_process(hw, 0, limit);
3027 limit -= rxq_refill(hw, 0, limit);
3030 writel(~MWL8K_A2H_INT_RX_READY,
3031 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3033 tasklet_schedule(&priv->poll_rx_task);
3039 * Core driver operations.
3041 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3043 struct mwl8k_priv *priv = hw->priv;
3044 int index = skb_get_queue_mapping(skb);
3047 if (!priv->radio_on) {
3048 printk(KERN_DEBUG "%s: dropped TX frame since radio "
3049 "disabled\n", wiphy_name(hw->wiphy));
3051 return NETDEV_TX_OK;
3054 rc = mwl8k_txq_xmit(hw, index, skb);
3059 static int mwl8k_start(struct ieee80211_hw *hw)
3061 struct mwl8k_priv *priv = hw->priv;
3064 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3065 IRQF_SHARED, MWL8K_NAME, hw);
3067 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3068 wiphy_name(hw->wiphy));
3072 /* Enable TX reclaim and RX tasklets. */
3073 tasklet_enable(&priv->poll_tx_task);
3074 tasklet_enable(&priv->poll_rx_task);
3076 /* Enable interrupts */
3077 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3079 rc = mwl8k_fw_lock(hw);
3081 rc = mwl8k_cmd_radio_enable(hw);
3085 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3088 rc = mwl8k_cmd_set_pre_scan(hw);
3091 rc = mwl8k_cmd_set_post_scan(hw,
3092 "\x00\x00\x00\x00\x00\x00");
3096 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3099 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3101 mwl8k_fw_unlock(hw);
3105 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3106 free_irq(priv->pdev->irq, hw);
3107 tasklet_disable(&priv->poll_tx_task);
3108 tasklet_disable(&priv->poll_rx_task);
3114 static void mwl8k_stop(struct ieee80211_hw *hw)
3116 struct mwl8k_priv *priv = hw->priv;
3119 mwl8k_cmd_radio_disable(hw);
3121 ieee80211_stop_queues(hw);
3123 /* Disable interrupts */
3124 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3125 free_irq(priv->pdev->irq, hw);
3127 /* Stop finalize join worker */
3128 cancel_work_sync(&priv->finalize_join_worker);
3129 if (priv->beacon_skb != NULL)
3130 dev_kfree_skb(priv->beacon_skb);
3132 /* Stop TX reclaim and RX tasklets. */
3133 tasklet_disable(&priv->poll_tx_task);
3134 tasklet_disable(&priv->poll_rx_task);
3136 /* Return all skbs to mac80211 */
3137 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3138 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3141 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3142 struct ieee80211_vif *vif)
3144 struct mwl8k_priv *priv = hw->priv;
3145 struct mwl8k_vif *mwl8k_vif;
3148 * We only support one active interface at a time.
3150 if (priv->vif != NULL)
3154 * Reject interface creation if sniffer mode is active, as
3155 * STA operation is mutually exclusive with hardware sniffer
3156 * mode. (Sniffer mode is only used on STA firmware.)
3158 if (priv->sniffer_enabled) {
3159 printk(KERN_INFO "%s: unable to create STA "
3160 "interface due to sniffer mode being enabled\n",
3161 wiphy_name(hw->wiphy));
3165 /* Set the mac address. */
3166 mwl8k_cmd_set_mac_addr(hw, vif->addr);
3169 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3171 /* Clean out driver private area */
3172 mwl8k_vif = MWL8K_VIF(vif);
3173 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3175 /* Set Initial sequence number to zero */
3176 mwl8k_vif->seqno = 0;
3183 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3184 struct ieee80211_vif *vif)
3186 struct mwl8k_priv *priv = hw->priv;
3189 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3191 mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3196 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3198 struct ieee80211_conf *conf = &hw->conf;
3199 struct mwl8k_priv *priv = hw->priv;
3202 if (conf->flags & IEEE80211_CONF_IDLE) {
3203 mwl8k_cmd_radio_disable(hw);
3207 rc = mwl8k_fw_lock(hw);
3211 rc = mwl8k_cmd_radio_enable(hw);
3215 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3219 if (conf->power_level > 18)
3220 conf->power_level = 18;
3221 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3226 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3228 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3230 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3234 mwl8k_fw_unlock(hw);
3240 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3241 struct ieee80211_bss_conf *info, u32 changed)
3243 struct mwl8k_priv *priv = hw->priv;
3244 u32 ap_legacy_rates;
3245 u8 ap_mcs_rates[16];
3248 if (mwl8k_fw_lock(hw))
3252 * No need to capture a beacon if we're no longer associated.
3254 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3255 priv->capture_beacon = false;
3258 * Get the AP's legacy and MCS rates.
3260 if (vif->bss_conf.assoc) {
3261 struct ieee80211_sta *ap;
3265 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3271 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3272 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3277 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3278 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3282 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3287 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3288 rc = mwl8k_set_radio_preamble(hw,
3289 vif->bss_conf.use_short_preamble);
3294 if (changed & BSS_CHANGED_ERP_SLOT) {
3295 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3300 if (vif->bss_conf.assoc &&
3301 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3303 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3308 if (vif->bss_conf.assoc &&
3309 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3311 * Finalize the join. Tell rx handler to process
3312 * next beacon from our BSSID.
3314 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3315 priv->capture_beacon = true;
3319 mwl8k_fw_unlock(hw);
3323 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3324 struct ieee80211_bss_conf *info, u32 changed)
3328 if (mwl8k_fw_lock(hw))
3331 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3332 rc = mwl8k_set_radio_preamble(hw,
3333 vif->bss_conf.use_short_preamble);
3338 if (changed & BSS_CHANGED_BASIC_RATES) {
3343 * Use lowest supported basic rate for multicasts
3344 * and management frames (such as probe responses --
3345 * beacons will always go out at 1 Mb/s).
3347 idx = ffs(vif->bss_conf.basic_rates);
3348 rate = idx ? mwl8k_rates_24[idx - 1].hw_value : 2;
3350 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3353 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3354 struct sk_buff *skb;
3356 skb = ieee80211_beacon_get(hw, vif);
3358 mwl8k_cmd_set_beacon(hw, skb->data, skb->len);
3363 if (changed & BSS_CHANGED_BEACON_ENABLED)
3364 mwl8k_cmd_bss_start(hw, info->enable_beacon);
3367 mwl8k_fw_unlock(hw);
3371 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3372 struct ieee80211_bss_conf *info, u32 changed)
3374 struct mwl8k_priv *priv = hw->priv;
3377 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3379 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3382 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3383 int mc_count, struct dev_addr_list *mclist)
3385 struct mwl8k_cmd_pkt *cmd;
3388 * Synthesize and return a command packet that programs the
3389 * hardware multicast address filter. At this point we don't
3390 * know whether FIF_ALLMULTI is being requested, but if it is,
3391 * we'll end up throwing this packet away and creating a new
3392 * one in mwl8k_configure_filter().
3394 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
3396 return (unsigned long)cmd;
3400 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3401 unsigned int changed_flags,
3402 unsigned int *total_flags)
3404 struct mwl8k_priv *priv = hw->priv;
3407 * Hardware sniffer mode is mutually exclusive with STA
3408 * operation, so refuse to enable sniffer mode if a STA
3409 * interface is active.
3411 if (priv->vif != NULL) {
3412 if (net_ratelimit())
3413 printk(KERN_INFO "%s: not enabling sniffer "
3414 "mode because STA interface is active\n",
3415 wiphy_name(hw->wiphy));
3419 if (!priv->sniffer_enabled) {
3420 if (mwl8k_cmd_enable_sniffer(hw, 1))
3422 priv->sniffer_enabled = true;
3425 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3426 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3432 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3433 unsigned int changed_flags,
3434 unsigned int *total_flags,
3437 struct mwl8k_priv *priv = hw->priv;
3438 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3441 * AP firmware doesn't allow fine-grained control over
3442 * the receive filter.
3445 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3451 * Enable hardware sniffer mode if FIF_CONTROL or
3452 * FIF_OTHER_BSS is requested.
3454 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3455 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3460 /* Clear unsupported feature flags */
3461 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3463 if (mwl8k_fw_lock(hw)) {
3468 if (priv->sniffer_enabled) {
3469 mwl8k_cmd_enable_sniffer(hw, 0);
3470 priv->sniffer_enabled = false;
3473 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3474 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3476 * Disable the BSS filter.
3478 mwl8k_cmd_set_pre_scan(hw);
3483 * Enable the BSS filter.
3485 * If there is an active STA interface, use that
3486 * interface's BSSID, otherwise use a dummy one
3487 * (where the OUI part needs to be nonzero for
3488 * the BSSID to be accepted by POST_SCAN).
3490 bssid = "\x01\x00\x00\x00\x00\x00";
3491 if (priv->vif != NULL)
3492 bssid = priv->vif->bss_conf.bssid;
3494 mwl8k_cmd_set_post_scan(hw, bssid);
3499 * If FIF_ALLMULTI is being requested, throw away the command
3500 * packet that ->prepare_multicast() built and replace it with
3501 * a command packet that enables reception of all multicast
3504 if (*total_flags & FIF_ALLMULTI) {
3506 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3510 mwl8k_post_cmd(hw, cmd);
3514 mwl8k_fw_unlock(hw);
3517 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3519 return mwl8k_cmd_set_rts_threshold(hw, value);
3522 struct mwl8k_sta_notify_item
3524 struct list_head list;
3525 struct ieee80211_vif *vif;
3526 enum sta_notify_cmd cmd;
3527 struct ieee80211_sta sta;
3531 mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
3533 struct mwl8k_priv *priv = hw->priv;
3536 * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
3538 if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3541 rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
3543 struct ieee80211_sta *sta;
3546 sta = ieee80211_find_sta(s->vif, s->sta.addr);
3548 MWL8K_STA(sta)->peer_id = rc;
3551 } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3552 mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
3553 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
3554 mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
3555 } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
3556 mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
3560 static void mwl8k_sta_notify_worker(struct work_struct *work)
3562 struct mwl8k_priv *priv =
3563 container_of(work, struct mwl8k_priv, sta_notify_worker);
3564 struct ieee80211_hw *hw = priv->hw;
3566 spin_lock_bh(&priv->sta_notify_list_lock);
3567 while (!list_empty(&priv->sta_notify_list)) {
3568 struct mwl8k_sta_notify_item *s;
3570 s = list_entry(priv->sta_notify_list.next,
3571 struct mwl8k_sta_notify_item, list);
3574 spin_unlock_bh(&priv->sta_notify_list_lock);
3576 mwl8k_do_sta_notify(hw, s);
3579 spin_lock_bh(&priv->sta_notify_list_lock);
3581 spin_unlock_bh(&priv->sta_notify_list_lock);
3585 mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3586 enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
3588 struct mwl8k_priv *priv = hw->priv;
3589 struct mwl8k_sta_notify_item *s;
3591 if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
3594 s = kmalloc(sizeof(*s), GFP_ATOMIC);
3600 spin_lock(&priv->sta_notify_list_lock);
3601 list_add_tail(&s->list, &priv->sta_notify_list);
3602 spin_unlock(&priv->sta_notify_list_lock);
3604 ieee80211_queue_work(hw, &priv->sta_notify_worker);
3608 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3609 const struct ieee80211_tx_queue_params *params)
3611 struct mwl8k_priv *priv = hw->priv;
3614 rc = mwl8k_fw_lock(hw);
3616 if (!priv->wmm_enabled)
3617 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3620 rc = mwl8k_cmd_set_edca_params(hw, queue,
3626 mwl8k_fw_unlock(hw);
3632 static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3633 struct ieee80211_tx_queue_stats *stats)
3635 struct mwl8k_priv *priv = hw->priv;
3636 struct mwl8k_tx_queue *txq;
3639 spin_lock_bh(&priv->tx_lock);
3640 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3641 txq = priv->txq + index;
3642 memcpy(&stats[index], &txq->stats,
3643 sizeof(struct ieee80211_tx_queue_stats));
3645 spin_unlock_bh(&priv->tx_lock);
3650 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3651 struct ieee80211_low_level_stats *stats)
3653 return mwl8k_cmd_get_stat(hw, stats);
3657 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3658 enum ieee80211_ampdu_mlme_action action,
3659 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3662 case IEEE80211_AMPDU_RX_START:
3663 case IEEE80211_AMPDU_RX_STOP:
3664 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3672 static const struct ieee80211_ops mwl8k_ops = {
3674 .start = mwl8k_start,
3676 .add_interface = mwl8k_add_interface,
3677 .remove_interface = mwl8k_remove_interface,
3678 .config = mwl8k_config,
3679 .bss_info_changed = mwl8k_bss_info_changed,
3680 .prepare_multicast = mwl8k_prepare_multicast,
3681 .configure_filter = mwl8k_configure_filter,
3682 .set_rts_threshold = mwl8k_set_rts_threshold,
3683 .sta_notify = mwl8k_sta_notify,
3684 .conf_tx = mwl8k_conf_tx,
3685 .get_tx_stats = mwl8k_get_tx_stats,
3686 .get_stats = mwl8k_get_stats,
3687 .ampdu_action = mwl8k_ampdu_action,
3690 static void mwl8k_finalize_join_worker(struct work_struct *work)
3692 struct mwl8k_priv *priv =
3693 container_of(work, struct mwl8k_priv, finalize_join_worker);
3694 struct sk_buff *skb = priv->beacon_skb;
3696 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
3697 priv->vif->bss_conf.dtim_period);
3700 priv->beacon_skb = NULL;
3709 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3711 .part_name = "88w8363",
3712 .helper_image = "mwl8k/helper_8363.fw",
3713 .fw_image = "mwl8k/fmimage_8363.fw",
3716 .part_name = "88w8687",
3717 .helper_image = "mwl8k/helper_8687.fw",
3718 .fw_image = "mwl8k/fmimage_8687.fw",
3721 .part_name = "88w8366",
3722 .helper_image = "mwl8k/helper_8366.fw",
3723 .fw_image = "mwl8k/fmimage_8366.fw",
3724 .ap_rxd_ops = &rxd_8366_ap_ops,
3728 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3729 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3730 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3731 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3732 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3733 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3735 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3736 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3737 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3738 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3739 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3740 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3741 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3744 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3746 static int __devinit mwl8k_probe(struct pci_dev *pdev,
3747 const struct pci_device_id *id)
3749 static int printed_version = 0;
3750 struct ieee80211_hw *hw;
3751 struct mwl8k_priv *priv;
3755 if (!printed_version) {
3756 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
3757 printed_version = 1;
3761 rc = pci_enable_device(pdev);
3763 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3768 rc = pci_request_regions(pdev, MWL8K_NAME);
3770 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3772 goto err_disable_device;
3775 pci_set_master(pdev);
3778 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3780 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3785 SET_IEEE80211_DEV(hw, &pdev->dev);
3786 pci_set_drvdata(pdev, hw);
3791 priv->device_info = &mwl8k_info_tbl[id->driver_data];
3794 priv->sram = pci_iomap(pdev, 0, 0x10000);
3795 if (priv->sram == NULL) {
3796 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3797 wiphy_name(hw->wiphy));
3802 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3803 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3805 priv->regs = pci_iomap(pdev, 1, 0x10000);
3806 if (priv->regs == NULL) {
3807 priv->regs = pci_iomap(pdev, 2, 0x10000);
3808 if (priv->regs == NULL) {
3809 printk(KERN_ERR "%s: Cannot map device registers\n",
3810 wiphy_name(hw->wiphy));
3816 /* Reset firmware and hardware */
3817 mwl8k_hw_reset(priv);
3819 /* Ask userland hotplug daemon for the device firmware */
3820 rc = mwl8k_request_firmware(priv);
3822 printk(KERN_ERR "%s: Firmware files not found\n",
3823 wiphy_name(hw->wiphy));
3824 goto err_stop_firmware;
3827 /* Load firmware into hardware */
3828 rc = mwl8k_load_firmware(hw);
3830 printk(KERN_ERR "%s: Cannot start firmware\n",
3831 wiphy_name(hw->wiphy));
3832 goto err_stop_firmware;
3835 /* Reclaim memory once firmware is successfully loaded */
3836 mwl8k_release_firmware(priv);
3840 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3841 if (priv->rxd_ops == NULL) {
3842 printk(KERN_ERR "%s: Driver does not have AP "
3843 "firmware image support for this hardware\n",
3844 wiphy_name(hw->wiphy));
3845 goto err_stop_firmware;
3848 priv->rxd_ops = &rxd_sta_ops;
3851 priv->sniffer_enabled = false;
3852 priv->wmm_enabled = false;
3853 priv->pending_tx_pkts = 0;
3856 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
3857 priv->band_24.band = IEEE80211_BAND_2GHZ;
3858 priv->band_24.channels = priv->channels_24;
3859 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
3860 priv->band_24.bitrates = priv->rates_24;
3861 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
3862 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
3864 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
3865 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
3868 * Extra headroom is the size of the required DMA header
3869 * minus the size of the smallest 802.11 frame (CTS frame).
3871 hw->extra_tx_headroom =
3872 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3874 hw->channel_change_time = 10;
3876 hw->queues = MWL8K_TX_QUEUES;
3878 /* Set rssi and noise values to dBm */
3879 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
3880 hw->vif_data_size = sizeof(struct mwl8k_vif);
3881 hw->sta_data_size = sizeof(struct mwl8k_sta);
3884 /* Set default radio state and preamble */
3886 priv->radio_short_preamble = 0;
3888 /* Station database handling */
3889 INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
3890 spin_lock_init(&priv->sta_notify_list_lock);
3891 INIT_LIST_HEAD(&priv->sta_notify_list);
3893 /* Finalize join worker */
3894 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3896 /* TX reclaim and RX tasklets. */
3897 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
3898 tasklet_disable(&priv->poll_tx_task);
3899 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
3900 tasklet_disable(&priv->poll_rx_task);
3902 /* Power management cookie */
3903 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3904 if (priv->cookie == NULL)
3905 goto err_stop_firmware;
3907 rc = mwl8k_rxq_init(hw, 0);
3909 goto err_free_cookie;
3910 rxq_refill(hw, 0, INT_MAX);
3912 mutex_init(&priv->fw_mutex);
3913 priv->fw_mutex_owner = NULL;
3914 priv->fw_mutex_depth = 0;
3915 priv->hostcmd_wait = NULL;
3917 spin_lock_init(&priv->tx_lock);
3919 priv->tx_wait = NULL;
3921 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3922 rc = mwl8k_txq_init(hw, i);
3924 goto err_free_queues;
3927 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3928 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3929 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
3930 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3931 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3933 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3934 IRQF_SHARED, MWL8K_NAME, hw);
3936 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3937 wiphy_name(hw->wiphy));
3938 goto err_free_queues;
3942 * Temporarily enable interrupts. Initial firmware host
3943 * commands use interrupts and avoid polling. Disable
3944 * interrupts when done.
3946 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3948 /* Get config data, mac addrs etc */
3950 rc = mwl8k_cmd_get_hw_spec_ap(hw);
3952 rc = mwl8k_cmd_set_hw_spec(hw);
3954 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
3956 rc = mwl8k_cmd_get_hw_spec_sta(hw);
3958 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
3961 printk(KERN_ERR "%s: Cannot initialise firmware\n",
3962 wiphy_name(hw->wiphy));
3966 /* Turn radio off */
3967 rc = mwl8k_cmd_radio_disable(hw);
3969 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
3973 /* Clear MAC address */
3974 rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
3976 printk(KERN_ERR "%s: Cannot clear MAC address\n",
3977 wiphy_name(hw->wiphy));
3981 /* Disable interrupts */
3982 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3983 free_irq(priv->pdev->irq, hw);
3985 rc = ieee80211_register_hw(hw);
3987 printk(KERN_ERR "%s: Cannot register device\n",
3988 wiphy_name(hw->wiphy));
3989 goto err_free_queues;
3992 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3993 wiphy_name(hw->wiphy), priv->device_info->part_name,
3994 priv->hw_rev, hw->wiphy->perm_addr,
3995 priv->ap_fw ? "AP" : "STA",
3996 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3997 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4002 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4003 free_irq(priv->pdev->irq, hw);
4006 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4007 mwl8k_txq_deinit(hw, i);
4008 mwl8k_rxq_deinit(hw, 0);
4011 if (priv->cookie != NULL)
4012 pci_free_consistent(priv->pdev, 4,
4013 priv->cookie, priv->cookie_dma);
4016 mwl8k_hw_reset(priv);
4017 mwl8k_release_firmware(priv);
4020 if (priv->regs != NULL)
4021 pci_iounmap(pdev, priv->regs);
4023 if (priv->sram != NULL)
4024 pci_iounmap(pdev, priv->sram);
4026 pci_set_drvdata(pdev, NULL);
4027 ieee80211_free_hw(hw);
4030 pci_release_regions(pdev);
4033 pci_disable_device(pdev);
4038 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4040 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4043 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4045 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4046 struct mwl8k_priv *priv;
4053 ieee80211_stop_queues(hw);
4055 ieee80211_unregister_hw(hw);
4057 /* Remove TX reclaim and RX tasklets. */
4058 tasklet_kill(&priv->poll_tx_task);
4059 tasklet_kill(&priv->poll_rx_task);
4062 mwl8k_hw_reset(priv);
4064 /* Return all skbs to mac80211 */
4065 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4066 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4068 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4069 mwl8k_txq_deinit(hw, i);
4071 mwl8k_rxq_deinit(hw, 0);
4073 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4075 pci_iounmap(pdev, priv->regs);
4076 pci_iounmap(pdev, priv->sram);
4077 pci_set_drvdata(pdev, NULL);
4078 ieee80211_free_hw(hw);
4079 pci_release_regions(pdev);
4080 pci_disable_device(pdev);
4083 static struct pci_driver mwl8k_driver = {
4085 .id_table = mwl8k_pci_id_table,
4086 .probe = mwl8k_probe,
4087 .remove = __devexit_p(mwl8k_remove),
4088 .shutdown = __devexit_p(mwl8k_shutdown),
4091 static int __init mwl8k_init(void)
4093 return pci_register_driver(&mwl8k_driver);
4096 static void __exit mwl8k_exit(void)
4098 pci_unregister_driver(&mwl8k_driver);
4101 module_init(mwl8k_init);
4102 module_exit(mwl8k_exit);
4104 MODULE_DESCRIPTION(MWL8K_DESC);
4105 MODULE_VERSION(MWL8K_VERSION);
4106 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4107 MODULE_LICENSE("GPL");