drivers/net/wireless/p54/p54pci.c

   1
   2 /*
   3  * Linux device driver for PCI based Prism54
   4  *
   5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
   7  *
   8  * Based on the islsm (softmac prism54) driver, which is:
   9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/pci.h>
  18 #include <linux/firmware.h>
  19 #include <linux/etherdevice.h>
  20 #include <linux/delay.h>
  21 #include <linux/completion.h>
  22 #include <net/mac80211.h>
  23
  24 #include "p54.h"
  25 #include "lmac.h"
  26 #include "p54pci.h"
  27
  28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  29 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
  30 MODULE_LICENSE("GPL");
  31 MODULE_ALIAS("prism54pci");
  32 MODULE_FIRMWARE("isl3886pci");
  33
  34 static struct pci_device_id p54p_table[] __devinitdata = {
  35         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
  36         { PCI_DEVICE(0x1260, 0x3890) },
  37         /* 3COM 3CRWE154G72 Wireless LAN adapter */
  38         { PCI_DEVICE(0x10b7, 0x6001) },
  39         /* Intersil PRISM Indigo Wireless LAN adapter */
  40         { PCI_DEVICE(0x1260, 0x3877) },
  41         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
  42         { PCI_DEVICE(0x1260, 0x3886) },
  43         { },
  44 };
  45
  46 MODULE_DEVICE_TABLE(pci, p54p_table);
  47
  48 static int p54p_upload_firmware(struct ieee80211_hw *dev)
  49 {
  50         struct p54p_priv *priv = dev->priv;
  51         __le32 reg;
  52         int err;
  53         __le32 *data;
  54         u32 remains, left, device_addr;
  55
  56         P54P_WRITE(int_enable, cpu_to_le32(0));
  57         P54P_READ(int_enable);
  58         udelay(10);
  59
  60         reg = P54P_READ(ctrl_stat);
  61         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  62         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
  63         P54P_WRITE(ctrl_stat, reg);
  64         P54P_READ(ctrl_stat);
  65         udelay(10);
  66
  67         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
  68         P54P_WRITE(ctrl_stat, reg);
  69         wmb();
  70         udelay(10);
  71
  72         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  73         P54P_WRITE(ctrl_stat, reg);
  74         wmb();
  75
  76         /* wait for the firmware to reset properly */
  77         mdelay(10);
  78
  79         err = p54_parse_firmware(dev, priv->firmware);
  80         if (err)
  81                 return err;
  82
  83         if (priv->common.fw_interface != FW_LM86) {
  84                 dev_err(&priv->pdev->dev, "wrong firmware, "
  85                         "please get a LM86(PCI) firmware a try again.\n");
  86                 return -EINVAL;
  87         }
  88
  89         data = (__le32 *) priv->firmware->data;
  90         remains = priv->firmware->size;
  91         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
  92         while (remains) {
  93                 u32 i = 0;
  94                 left = min((u32)0x1000, remains);
  95                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
  96                 P54P_READ(int_enable);
  97
  98                 device_addr += 0x1000;
  99                 while (i < left) {
 100                         P54P_WRITE(direct_mem_win[i], *data++);
 101                         i += sizeof(u32);
 102                 }
 103
 104                 remains -= left;
 105                 P54P_READ(int_enable);
 106         }
 107
 108         reg = P54P_READ(ctrl_stat);
 109         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
 110         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 111         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
 112         P54P_WRITE(ctrl_stat, reg);
 113         P54P_READ(ctrl_stat);
 114         udelay(10);
 115
 116         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
 117         P54P_WRITE(ctrl_stat, reg);
 118         wmb();
 119         udelay(10);
 120
 121         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 122         P54P_WRITE(ctrl_stat, reg);
 123         wmb();
 124         udelay(10);
 125
 126         /* wait for the firmware to boot properly */
 127         mdelay(100);
 128
 129         return 0;
 130 }
 131
 132 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
 133         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 134         struct sk_buff **rx_buf)
 135 {
 136         struct p54p_priv *priv = dev->priv;
 137         struct p54p_ring_control *ring_control = priv->ring_control;
 138         u32 limit, idx, i;
 139
 140         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
 141         limit = idx;
 142         limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
 143         limit = ring_limit - limit;
 144
 145         i = idx % ring_limit;
 146         while (limit-- > 1) {
 147                 struct p54p_desc *desc = &ring[i];
 148
 149                 if (!desc->host_addr) {
 150                         struct sk_buff *skb;
 151                         dma_addr_t mapping;
 152                         skb = dev_alloc_skb(priv->common.rx_mtu + 32);
 153                         if (!skb)
 154                                 break;
 155
 156                         mapping = pci_map_single(priv->pdev,
 157                                                  skb_tail_pointer(skb),
 158                                                  priv->common.rx_mtu + 32,
 159                                                  PCI_DMA_FROMDEVICE);
 160
 161                         if (pci_dma_mapping_error(priv->pdev, mapping)) {
 162                                 dev_kfree_skb_any(skb);
 163                                 dev_err(&priv->pdev->dev,
 164                                         "RX DMA Mapping error\n");
 165                                 break;
 166                         }
 167
 168                         desc->host_addr = cpu_to_le32(mapping);
 169                         desc->device_addr = 0;  // FIXME: necessary?
 170                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 171                         desc->flags = 0;
 172                         rx_buf[i] = skb;
 173                 }
 174
 175                 i++;
 176                 idx++;
 177                 i %= ring_limit;
 178         }
 179
 180         wmb();
 181         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
 182 }
 183
 184 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
 185         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 186         struct sk_buff **rx_buf)
 187 {
 188         struct p54p_priv *priv = dev->priv;
 189         struct p54p_ring_control *ring_control = priv->ring_control;
 190         struct p54p_desc *desc;
 191         u32 idx, i;
 192
 193         i = (*index) % ring_limit;
 194         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
 195         idx %= ring_limit;
 196         while (i != idx) {
 197                 u16 len;
 198                 struct sk_buff *skb;
 199                 desc = &ring[i];
 200                 len = le16_to_cpu(desc->len);
 201                 skb = rx_buf[i];
 202
 203                 if (!skb) {
 204                         i++;
 205                         i %= ring_limit;
 206                         continue;
 207                 }
 208                 skb_put(skb, len);
 209
 210                 if (p54_rx(dev, skb)) {
 211                         pci_unmap_single(priv->pdev,
 212                                          le32_to_cpu(desc->host_addr),
 213                                          priv->common.rx_mtu + 32,
 214                                          PCI_DMA_FROMDEVICE);
 215                         rx_buf[i] = NULL;
 216                         desc->host_addr = 0;
 217                 } else {
 218                         skb_trim(skb, 0);
 219                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 220                 }
 221
 222                 i++;
 223                 i %= ring_limit;
 224         }
 225
 226         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
 227 }
 228
 229 /* caller must hold priv->lock */
 230 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
 231         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 232         void **tx_buf)
 233 {
 234         struct p54p_priv *priv = dev->priv;
 235         struct p54p_ring_control *ring_control = priv->ring_control;
 236         struct p54p_desc *desc;
 237         u32 idx, i;
 238
 239         i = (*index) % ring_limit;
 240         (*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
 241         idx %= ring_limit;
 242
 243         while (i != idx) {
 244                 desc = &ring[i];
 245                 if (tx_buf[i])
 246                         if (FREE_AFTER_TX((struct sk_buff *) tx_buf[i]))
 247                                 p54_free_skb(dev, tx_buf[i]);
 248                 tx_buf[i] = NULL;
 249
 250                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 251                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 252
 253                 desc->host_addr = 0;
 254                 desc->device_addr = 0;
 255                 desc->len = 0;
 256                 desc->flags = 0;
 257
 258                 i++;
 259                 i %= ring_limit;
 260         }
 261 }
 262
 263 static void p54p_rx_tasklet(unsigned long dev_id)
 264 {
 265         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
 266         struct p54p_priv *priv = dev->priv;
 267         struct p54p_ring_control *ring_control = priv->ring_control;
 268
 269         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
 270                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
 271
 272         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
 273                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
 274
 275         wmb();
 276         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 277 }
 278
 279 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
 280 {
 281         struct ieee80211_hw *dev = dev_id;
 282         struct p54p_priv *priv = dev->priv;
 283         struct p54p_ring_control *ring_control = priv->ring_control;
 284         __le32 reg;
 285
 286         spin_lock(&priv->lock);
 287         reg = P54P_READ(int_ident);
 288         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
 289                 spin_unlock(&priv->lock);
 290                 return IRQ_HANDLED;
 291         }
 292
 293         P54P_WRITE(int_ack, reg);
 294
 295         reg &= P54P_READ(int_enable);
 296
 297         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
 298                 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt,
 299                                    3, ring_control->tx_mgmt,
 300                                    ARRAY_SIZE(ring_control->tx_mgmt),
 301                                    priv->tx_buf_mgmt);
 302
 303                 p54p_check_tx_ring(dev, &priv->tx_idx_data,
 304                                    1, ring_control->tx_data,
 305                                    ARRAY_SIZE(ring_control->tx_data),
 306                                    priv->tx_buf_data);
 307
 308                 tasklet_schedule(&priv->rx_tasklet);
 309
 310         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
 311                 complete(&priv->boot_comp);
 312
 313         spin_unlock(&priv->lock);
 314
 315         return reg ? IRQ_HANDLED : IRQ_NONE;
 316 }
 317
 318 static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 319 {
 320         struct p54p_priv *priv = dev->priv;
 321         struct p54p_ring_control *ring_control = priv->ring_control;
 322         unsigned long flags;
 323         struct p54p_desc *desc;
 324         dma_addr_t mapping;
 325         u32 device_idx, idx, i;
 326
 327         spin_lock_irqsave(&priv->lock, flags);
 328         device_idx = le32_to_cpu(ring_control->device_idx[1]);
 329         idx = le32_to_cpu(ring_control->host_idx[1]);
 330         i = idx % ARRAY_SIZE(ring_control->tx_data);
 331
 332         mapping = pci_map_single(priv->pdev, skb->data, skb->len,
 333                                  PCI_DMA_TODEVICE);
 334         if (pci_dma_mapping_error(priv->pdev, mapping)) {
 335                 spin_unlock_irqrestore(&priv->lock, flags);
 336                 p54_free_skb(dev, skb);
 337                 dev_err(&priv->pdev->dev, "TX DMA mapping error\n");
 338                 return ;
 339         }
 340         priv->tx_buf_data[i] = skb;
 341
 342         desc = &ring_control->tx_data[i];
 343         desc->host_addr = cpu_to_le32(mapping);
 344         desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
 345         desc->len = cpu_to_le16(skb->len);
 346         desc->flags = 0;
 347
 348         wmb();
 349         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
 350         spin_unlock_irqrestore(&priv->lock, flags);
 351
 352         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 353         P54P_READ(dev_int);
 354 }
 355
 356 static void p54p_stop(struct ieee80211_hw *dev)
 357 {
 358         struct p54p_priv *priv = dev->priv;
 359         struct p54p_ring_control *ring_control = priv->ring_control;
 360         unsigned int i;
 361         struct p54p_desc *desc;
 362
 363         tasklet_kill(&priv->rx_tasklet);
 364
 365         P54P_WRITE(int_enable, cpu_to_le32(0));
 366         P54P_READ(int_enable);
 367         udelay(10);
 368
 369         free_irq(priv->pdev->irq, dev);
 370
 371         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 372
 373         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
 374                 desc = &ring_control->rx_data[i];
 375                 if (desc->host_addr)
 376                         pci_unmap_single(priv->pdev,
 377                                          le32_to_cpu(desc->host_addr),
 378                                          priv->common.rx_mtu + 32,
 379                                          PCI_DMA_FROMDEVICE);
 380                 kfree_skb(priv->rx_buf_data[i]);
 381                 priv->rx_buf_data[i] = NULL;
 382         }
 383
 384         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
 385                 desc = &ring_control->rx_mgmt[i];
 386                 if (desc->host_addr)
 387                         pci_unmap_single(priv->pdev,
 388                                          le32_to_cpu(desc->host_addr),
 389                                          priv->common.rx_mtu + 32,
 390                                          PCI_DMA_FROMDEVICE);
 391                 kfree_skb(priv->rx_buf_mgmt[i]);
 392                 priv->rx_buf_mgmt[i] = NULL;
 393         }
 394
 395         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
 396                 desc = &ring_control->tx_data[i];
 397                 if (desc->host_addr)
 398                         pci_unmap_single(priv->pdev,
 399                                          le32_to_cpu(desc->host_addr),
 400                                          le16_to_cpu(desc->len),
 401                                          PCI_DMA_TODEVICE);
 402
 403                 p54_free_skb(dev, priv->tx_buf_data[i]);
 404                 priv->tx_buf_data[i] = NULL;
 405         }
 406
 407         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
 408                 desc = &ring_control->tx_mgmt[i];
 409                 if (desc->host_addr)
 410                         pci_unmap_single(priv->pdev,
 411                                          le32_to_cpu(desc->host_addr),
 412                                          le16_to_cpu(desc->len),
 413                                          PCI_DMA_TODEVICE);
 414
 415                 p54_free_skb(dev, priv->tx_buf_mgmt[i]);
 416                 priv->tx_buf_mgmt[i] = NULL;
 417         }
 418
 419         memset(ring_control, 0, sizeof(*ring_control));
 420 }
 421
 422 static int p54p_open(struct ieee80211_hw *dev)
 423 {
 424         struct p54p_priv *priv = dev->priv;
 425         int err;
 426
 427         init_completion(&priv->boot_comp);
 428         err = request_irq(priv->pdev->irq, &p54p_interrupt,
 429                           IRQF_SHARED, "p54pci", dev);
 430         if (err) {
 431                 dev_err(&priv->pdev->dev, "failed to register IRQ handler\n");
 432                 return err;
 433         }
 434
 435         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 436         err = p54p_upload_firmware(dev);
 437         if (err) {
 438                 free_irq(priv->pdev->irq, dev);
 439                 return err;
 440         }
 441         priv->rx_idx_data = priv->tx_idx_data = 0;
 442         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
 443
 444         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
 445                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
 446
 447         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
 448                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
 449
 450         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
 451         P54P_READ(ring_control_base);
 452         wmb();
 453         udelay(10);
 454
 455         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 456         P54P_READ(int_enable);
 457         wmb();
 458         udelay(10);
 459
 460         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 461         P54P_READ(dev_int);
 462
 463         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 464                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
 465                        wiphy_name(dev->wiphy));
 466                 p54p_stop(dev);
 467                 return -ETIMEDOUT;
 468         }
 469
 470         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 471         P54P_READ(int_enable);
 472         wmb();
 473         udelay(10);
 474
 475         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 476         P54P_READ(dev_int);
 477         wmb();
 478         udelay(10);
 479
 480         return 0;
 481 }
 482
 483 static int __devinit p54p_probe(struct pci_dev *pdev,
 484                                 const struct pci_device_id *id)
 485 {
 486         struct p54p_priv *priv;
 487         struct ieee80211_hw *dev;
 488         unsigned long mem_addr, mem_len;
 489         int err;
 490
 491         err = pci_enable_device(pdev);
 492         if (err) {
 493                 dev_err(&pdev->dev, "Cannot enable new PCI device\n");
 494                 return err;
 495         }
 496
 497         mem_addr = pci_resource_start(pdev, 0);
 498         mem_len = pci_resource_len(pdev, 0);
 499         if (mem_len < sizeof(struct p54p_csr)) {
 500                 dev_err(&pdev->dev, "Too short PCI resources\n");
 501                 goto err_disable_dev;
 502         }
 503
 504         err = pci_request_regions(pdev, "p54pci");
 505         if (err) {
 506                 dev_err(&pdev->dev, "Cannot obtain PCI resources\n");
 507                 goto err_disable_dev;
 508         }
 509
 510         if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) ||
 511             pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
 512                 dev_err(&pdev->dev, "No suitable DMA available\n");
 513                 goto err_free_reg;
 514         }
 515
 516         pci_set_master(pdev);
 517         pci_try_set_mwi(pdev);
 518
 519         pci_write_config_byte(pdev, 0x40, 0);
 520         pci_write_config_byte(pdev, 0x41, 0);
 521
 522         dev = p54_init_common(sizeof(*priv));
 523         if (!dev) {
 524                 dev_err(&pdev->dev, "ieee80211 alloc failed\n");
 525                 err = -ENOMEM;
 526                 goto err_free_reg;
 527         }
 528
 529         priv = dev->priv;
 530         priv->pdev = pdev;
 531
 532         SET_IEEE80211_DEV(dev, &pdev->dev);
 533         pci_set_drvdata(pdev, dev);
 534
 535         priv->map = ioremap(mem_addr, mem_len);
 536         if (!priv->map) {
 537                 dev_err(&pdev->dev, "Cannot map device memory\n");
 538                 err = -ENOMEM;
 539                 goto err_free_dev;
 540         }
 541
 542         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
 543                                                   &priv->ring_control_dma);
 544         if (!priv->ring_control) {
 545                 dev_err(&pdev->dev, "Cannot allocate rings\n");
 546                 err = -ENOMEM;
 547                 goto err_iounmap;
 548         }
 549         priv->common.open = p54p_open;
 550         priv->common.stop = p54p_stop;
 551         priv->common.tx = p54p_tx;
 552
 553         spin_lock_init(&priv->lock);
 554         tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev);
 555
 556         err = request_firmware(&priv->firmware, "isl3886pci",
 557                                &priv->pdev->dev);
 558         if (err) {
 559                 dev_err(&pdev->dev, "Cannot find firmware (isl3886pci)\n");
 560                 err = request_firmware(&priv->firmware, "isl3886",
 561                                        &priv->pdev->dev);
 562                 if (err)
 563                         goto err_free_common;
 564         }
 565
 566         err = p54p_open(dev);
 567         if (err)
 568                 goto err_free_common;
 569         err = p54_read_eeprom(dev);
 570         p54p_stop(dev);
 571         if (err)
 572                 goto err_free_common;
 573
 574         err = p54_register_common(dev, &pdev->dev);
 575         if (err)
 576                 goto err_free_common;
 577
 578         return 0;
 579
 580  err_free_common:
 581         release_firmware(priv->firmware);
 582         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 583                             priv->ring_control, priv->ring_control_dma);
 584
 585  err_iounmap:
 586         iounmap(priv->map);
 587
 588  err_free_dev:
 589         pci_set_drvdata(pdev, NULL);
 590         p54_free_common(dev);
 591
 592  err_free_reg:
 593         pci_release_regions(pdev);
 594  err_disable_dev:
 595         pci_disable_device(pdev);
 596         return err;
 597 }
 598
 599 static void __devexit p54p_remove(struct pci_dev *pdev)
 600 {
 601         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 602         struct p54p_priv *priv;
 603
 604         if (!dev)
 605                 return;
 606
 607         p54_unregister_common(dev);
 608         priv = dev->priv;
 609         release_firmware(priv->firmware);
 610         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 611                             priv->ring_control, priv->ring_control_dma);
 612         iounmap(priv->map);
 613         pci_release_regions(pdev);
 614         pci_disable_device(pdev);
 615         p54_free_common(dev);
 616 }
 617
 618 #ifdef CONFIG_PM
 619 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
 620 {
 621         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 622         struct p54p_priv *priv = dev->priv;
 623
 624         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 625                 ieee80211_stop_queues(dev);
 626                 p54p_stop(dev);
 627         }
 628
 629         pci_save_state(pdev);
 630         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 631         return 0;
 632 }
 633
 634 static int p54p_resume(struct pci_dev *pdev)
 635 {
 636         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 637         struct p54p_priv *priv = dev->priv;
 638
 639         pci_set_power_state(pdev, PCI_D0);
 640         pci_restore_state(pdev);
 641
 642         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 643                 p54p_open(dev);
 644                 ieee80211_wake_queues(dev);
 645         }
 646
 647         return 0;
 648 }
 649 #endif /* CONFIG_PM */
 650
 651 static struct pci_driver p54p_driver = {
 652         .name           = "p54pci",
 653         .id_table       = p54p_table,
 654         .probe          = p54p_probe,
 655         .remove         = __devexit_p(p54p_remove),
 656 #ifdef CONFIG_PM
 657         .suspend        = p54p_suspend,
 658         .resume         = p54p_resume,
 659 #endif /* CONFIG_PM */
 660 };
 661
 662 static int __init p54p_init(void)
 663 {
 664         return pci_register_driver(&p54p_driver);
 665 }
 666
 667 static void __exit p54p_exit(void)
 668 {
 669         pci_unregister_driver(&p54p_driver);
 670 }
 671
 672 module_init(p54p_init);
 673 module_exit(p54p_exit);