3 * Linux device driver for PCI based Prism54
5 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6 * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
8 * Based on the islsm (softmac prism54) driver, which is:
9 * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/init.h>
17 #include <linux/pci.h>
18 #include <linux/slab.h>
19 #include <linux/firmware.h>
20 #include <linux/etherdevice.h>
21 #include <linux/delay.h>
22 #include <linux/completion.h>
23 #include <net/mac80211.h>
29 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
30 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
31 MODULE_LICENSE("GPL");
32 MODULE_ALIAS("prism54pci");
33 MODULE_FIRMWARE("isl3886pci");
35 static DEFINE_PCI_DEVICE_TABLE(p54p_table) = {
36 /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
37 { PCI_DEVICE(0x1260, 0x3890) },
38 /* 3COM 3CRWE154G72 Wireless LAN adapter */
39 { PCI_DEVICE(0x10b7, 0x6001) },
40 /* Intersil PRISM Indigo Wireless LAN adapter */
41 { PCI_DEVICE(0x1260, 0x3877) },
42 /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
43 { PCI_DEVICE(0x1260, 0x3886) },
47 MODULE_DEVICE_TABLE(pci, p54p_table);
49 static int p54p_upload_firmware(struct ieee80211_hw *dev)
51 struct p54p_priv *priv = dev->priv;
55 u32 remains, left, device_addr;
57 P54P_WRITE(int_enable, cpu_to_le32(0));
58 P54P_READ(int_enable);
61 reg = P54P_READ(ctrl_stat);
62 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
63 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
64 P54P_WRITE(ctrl_stat, reg);
68 reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
69 P54P_WRITE(ctrl_stat, reg);
73 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
74 P54P_WRITE(ctrl_stat, reg);
77 /* wait for the firmware to reset properly */
80 err = p54_parse_firmware(dev, priv->firmware);
84 if (priv->common.fw_interface != FW_LM86) {
85 dev_err(&priv->pdev->dev, "wrong firmware, "
86 "please get a LM86(PCI) firmware a try again.\n");
90 data = (__le32 *) priv->firmware->data;
91 remains = priv->firmware->size;
92 device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
95 left = min((u32)0x1000, remains);
96 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
97 P54P_READ(int_enable);
99 device_addr += 0x1000;
101 P54P_WRITE(direct_mem_win[i], *data++);
106 P54P_READ(int_enable);
109 reg = P54P_READ(ctrl_stat);
110 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
111 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
112 reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
113 P54P_WRITE(ctrl_stat, reg);
114 P54P_READ(ctrl_stat);
117 reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
118 P54P_WRITE(ctrl_stat, reg);
122 reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
123 P54P_WRITE(ctrl_stat, reg);
127 /* wait for the firmware to boot properly */
133 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
134 int ring_index, struct p54p_desc *ring, u32 ring_limit,
135 struct sk_buff **rx_buf)
137 struct p54p_priv *priv = dev->priv;
138 struct p54p_ring_control *ring_control = priv->ring_control;
141 idx = le32_to_cpu(ring_control->host_idx[ring_index]);
143 limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
144 limit = ring_limit - limit;
146 i = idx % ring_limit;
147 while (limit-- > 1) {
148 struct p54p_desc *desc = &ring[i];
150 if (!desc->host_addr) {
153 skb = dev_alloc_skb(priv->common.rx_mtu + 32);
157 mapping = pci_map_single(priv->pdev,
158 skb_tail_pointer(skb),
159 priv->common.rx_mtu + 32,
162 if (pci_dma_mapping_error(priv->pdev, mapping)) {
163 dev_kfree_skb_any(skb);
164 dev_err(&priv->pdev->dev,
165 "RX DMA Mapping error\n");
169 desc->host_addr = cpu_to_le32(mapping);
170 desc->device_addr = 0; // FIXME: necessary?
171 desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
182 ring_control->host_idx[ring_index] = cpu_to_le32(idx);
185 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
186 int ring_index, struct p54p_desc *ring, u32 ring_limit,
187 struct sk_buff **rx_buf)
189 struct p54p_priv *priv = dev->priv;
190 struct p54p_ring_control *ring_control = priv->ring_control;
191 struct p54p_desc *desc;
194 i = (*index) % ring_limit;
195 (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
201 len = le16_to_cpu(desc->len);
210 if (unlikely(len > priv->common.rx_mtu)) {
212 dev_err(&priv->pdev->dev, "rx'd frame size "
213 "exceeds length threshold.\n");
215 len = priv->common.rx_mtu;
219 if (p54_rx(dev, skb)) {
220 pci_unmap_single(priv->pdev,
221 le32_to_cpu(desc->host_addr),
222 priv->common.rx_mtu + 32,
228 desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
235 p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
238 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
239 int ring_index, struct p54p_desc *ring, u32 ring_limit,
240 struct sk_buff **tx_buf)
242 struct p54p_priv *priv = dev->priv;
243 struct p54p_ring_control *ring_control = priv->ring_control;
244 struct p54p_desc *desc;
248 i = (*index) % ring_limit;
249 (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
258 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
259 le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
262 desc->device_addr = 0;
266 if (skb && FREE_AFTER_TX(skb))
267 p54_free_skb(dev, skb);
274 static void p54p_tasklet(unsigned long dev_id)
276 struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
277 struct p54p_priv *priv = dev->priv;
278 struct p54p_ring_control *ring_control = priv->ring_control;
280 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt, 3, ring_control->tx_mgmt,
281 ARRAY_SIZE(ring_control->tx_mgmt),
284 p54p_check_tx_ring(dev, &priv->tx_idx_data, 1, ring_control->tx_data,
285 ARRAY_SIZE(ring_control->tx_data),
288 p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
289 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
291 p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
292 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
295 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
298 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
300 struct ieee80211_hw *dev = dev_id;
301 struct p54p_priv *priv = dev->priv;
304 reg = P54P_READ(int_ident);
305 if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
308 P54P_WRITE(int_ack, reg);
310 reg &= P54P_READ(int_enable);
312 if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE))
313 tasklet_schedule(&priv->tasklet);
314 else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
315 complete(&priv->boot_comp);
318 return reg ? IRQ_HANDLED : IRQ_NONE;
321 static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
324 struct p54p_priv *priv = dev->priv;
325 struct p54p_ring_control *ring_control = priv->ring_control;
326 struct p54p_desc *desc;
328 u32 device_idx, idx, i;
330 spin_lock_irqsave(&priv->lock, flags);
331 device_idx = le32_to_cpu(ring_control->device_idx[1]);
332 idx = le32_to_cpu(ring_control->host_idx[1]);
333 i = idx % ARRAY_SIZE(ring_control->tx_data);
335 mapping = pci_map_single(priv->pdev, skb->data, skb->len,
337 if (pci_dma_mapping_error(priv->pdev, mapping)) {
338 spin_unlock_irqrestore(&priv->lock, flags);
339 p54_free_skb(dev, skb);
340 dev_err(&priv->pdev->dev, "TX DMA mapping error\n");
343 priv->tx_buf_data[i] = skb;
345 desc = &ring_control->tx_data[i];
346 desc->host_addr = cpu_to_le32(mapping);
347 desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
348 desc->len = cpu_to_le16(skb->len);
352 ring_control->host_idx[1] = cpu_to_le32(idx + 1);
353 spin_unlock_irqrestore(&priv->lock, flags);
355 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
359 static void p54p_stop(struct ieee80211_hw *dev)
361 struct p54p_priv *priv = dev->priv;
362 struct p54p_ring_control *ring_control = priv->ring_control;
364 struct p54p_desc *desc;
366 P54P_WRITE(int_enable, cpu_to_le32(0));
367 P54P_READ(int_enable);
370 free_irq(priv->pdev->irq, dev);
372 tasklet_kill(&priv->tasklet);
374 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
376 for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
377 desc = &ring_control->rx_data[i];
379 pci_unmap_single(priv->pdev,
380 le32_to_cpu(desc->host_addr),
381 priv->common.rx_mtu + 32,
383 kfree_skb(priv->rx_buf_data[i]);
384 priv->rx_buf_data[i] = NULL;
387 for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
388 desc = &ring_control->rx_mgmt[i];
390 pci_unmap_single(priv->pdev,
391 le32_to_cpu(desc->host_addr),
392 priv->common.rx_mtu + 32,
394 kfree_skb(priv->rx_buf_mgmt[i]);
395 priv->rx_buf_mgmt[i] = NULL;
398 for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
399 desc = &ring_control->tx_data[i];
401 pci_unmap_single(priv->pdev,
402 le32_to_cpu(desc->host_addr),
403 le16_to_cpu(desc->len),
406 p54_free_skb(dev, priv->tx_buf_data[i]);
407 priv->tx_buf_data[i] = NULL;
410 for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
411 desc = &ring_control->tx_mgmt[i];
413 pci_unmap_single(priv->pdev,
414 le32_to_cpu(desc->host_addr),
415 le16_to_cpu(desc->len),
418 p54_free_skb(dev, priv->tx_buf_mgmt[i]);
419 priv->tx_buf_mgmt[i] = NULL;
422 memset(ring_control, 0, sizeof(*ring_control));
425 static int p54p_open(struct ieee80211_hw *dev)
427 struct p54p_priv *priv = dev->priv;
430 init_completion(&priv->boot_comp);
431 err = request_irq(priv->pdev->irq, p54p_interrupt,
432 IRQF_SHARED, "p54pci", dev);
434 dev_err(&priv->pdev->dev, "failed to register IRQ handler\n");
438 memset(priv->ring_control, 0, sizeof(*priv->ring_control));
439 err = p54p_upload_firmware(dev);
441 free_irq(priv->pdev->irq, dev);
444 priv->rx_idx_data = priv->tx_idx_data = 0;
445 priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
447 p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
448 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
450 p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
451 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
453 P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
454 P54P_READ(ring_control_base);
458 P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
459 P54P_READ(int_enable);
463 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
466 if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
467 printk(KERN_ERR "%s: Cannot boot firmware!\n",
468 wiphy_name(dev->wiphy));
473 P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
474 P54P_READ(int_enable);
478 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
486 static int __devinit p54p_probe(struct pci_dev *pdev,
487 const struct pci_device_id *id)
489 struct p54p_priv *priv;
490 struct ieee80211_hw *dev;
491 unsigned long mem_addr, mem_len;
494 err = pci_enable_device(pdev);
496 dev_err(&pdev->dev, "Cannot enable new PCI device\n");
500 mem_addr = pci_resource_start(pdev, 0);
501 mem_len = pci_resource_len(pdev, 0);
502 if (mem_len < sizeof(struct p54p_csr)) {
503 dev_err(&pdev->dev, "Too short PCI resources\n");
504 goto err_disable_dev;
507 err = pci_request_regions(pdev, "p54pci");
509 dev_err(&pdev->dev, "Cannot obtain PCI resources\n");
510 goto err_disable_dev;
513 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) ||
514 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
515 dev_err(&pdev->dev, "No suitable DMA available\n");
519 pci_set_master(pdev);
520 pci_try_set_mwi(pdev);
522 pci_write_config_byte(pdev, 0x40, 0);
523 pci_write_config_byte(pdev, 0x41, 0);
525 dev = p54_init_common(sizeof(*priv));
527 dev_err(&pdev->dev, "ieee80211 alloc failed\n");
535 SET_IEEE80211_DEV(dev, &pdev->dev);
536 pci_set_drvdata(pdev, dev);
538 priv->map = ioremap(mem_addr, mem_len);
540 dev_err(&pdev->dev, "Cannot map device memory\n");
545 priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
546 &priv->ring_control_dma);
547 if (!priv->ring_control) {
548 dev_err(&pdev->dev, "Cannot allocate rings\n");
552 priv->common.open = p54p_open;
553 priv->common.stop = p54p_stop;
554 priv->common.tx = p54p_tx;
556 spin_lock_init(&priv->lock);
557 tasklet_init(&priv->tasklet, p54p_tasklet, (unsigned long)dev);
559 err = request_firmware(&priv->firmware, "isl3886pci",
562 dev_err(&pdev->dev, "Cannot find firmware (isl3886pci)\n");
563 err = request_firmware(&priv->firmware, "isl3886",
566 goto err_free_common;
569 err = p54p_open(dev);
571 goto err_free_common;
572 err = p54_read_eeprom(dev);
575 goto err_free_common;
577 err = p54_register_common(dev, &pdev->dev);
579 goto err_free_common;
584 release_firmware(priv->firmware);
585 pci_free_consistent(pdev, sizeof(*priv->ring_control),
586 priv->ring_control, priv->ring_control_dma);
592 pci_set_drvdata(pdev, NULL);
593 p54_free_common(dev);
596 pci_release_regions(pdev);
598 pci_disable_device(pdev);
602 static void __devexit p54p_remove(struct pci_dev *pdev)
604 struct ieee80211_hw *dev = pci_get_drvdata(pdev);
605 struct p54p_priv *priv;
610 p54_unregister_common(dev);
612 release_firmware(priv->firmware);
613 pci_free_consistent(pdev, sizeof(*priv->ring_control),
614 priv->ring_control, priv->ring_control_dma);
616 pci_release_regions(pdev);
617 pci_disable_device(pdev);
618 p54_free_common(dev);
622 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
624 struct ieee80211_hw *dev = pci_get_drvdata(pdev);
625 struct p54p_priv *priv = dev->priv;
627 if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
628 ieee80211_stop_queues(dev);
632 pci_save_state(pdev);
633 pci_set_power_state(pdev, pci_choose_state(pdev, state));
637 static int p54p_resume(struct pci_dev *pdev)
639 struct ieee80211_hw *dev = pci_get_drvdata(pdev);
640 struct p54p_priv *priv = dev->priv;
642 pci_set_power_state(pdev, PCI_D0);
643 pci_restore_state(pdev);
645 if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
647 ieee80211_wake_queues(dev);
652 #endif /* CONFIG_PM */
654 static struct pci_driver p54p_driver = {
656 .id_table = p54p_table,
658 .remove = __devexit_p(p54p_remove),
660 .suspend = p54p_suspend,
661 .resume = p54p_resume,
662 #endif /* CONFIG_PM */
665 static int __init p54p_init(void)
667 return pci_register_driver(&p54p_driver);
670 static void __exit p54p_exit(void)
672 pci_unregister_driver(&p54p_driver);
675 module_init(p54p_init);
676 module_exit(p54p_exit);