2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 Abstract: rt73usb device specific routines.
24 Supported chipsets: rt2571W & rt2671.
27 #include <linux/delay.h>
28 #include <linux/etherdevice.h>
29 #include <linux/init.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/usb.h>
35 #include "rt2x00usb.h"
40 * All access to the CSR registers will go through the methods
41 * rt73usb_register_read and rt73usb_register_write.
42 * BBP and RF register require indirect register access,
43 * and use the CSR registers BBPCSR and RFCSR to achieve this.
44 * These indirect registers work with busy bits,
45 * and we will try maximal REGISTER_BUSY_COUNT times to access
46 * the register while taking a REGISTER_BUSY_DELAY us delay
47 * between each attampt. When the busy bit is still set at that time,
48 * the access attempt is considered to have failed,
49 * and we will print an error.
50 * The _lock versions must be used if you already hold the usb_cache_mutex
52 static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
53 const unsigned int offset, u32 *value)
56 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
57 USB_VENDOR_REQUEST_IN, offset,
58 ®, sizeof(u32), REGISTER_TIMEOUT);
59 *value = le32_to_cpu(reg);
62 static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
63 const unsigned int offset, u32 *value)
66 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
67 USB_VENDOR_REQUEST_IN, offset,
68 ®, sizeof(u32), REGISTER_TIMEOUT);
69 *value = le32_to_cpu(reg);
72 static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev,
73 const unsigned int offset,
74 void *value, const u32 length)
76 int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
77 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
78 USB_VENDOR_REQUEST_IN, offset,
79 value, length, timeout);
82 static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
83 const unsigned int offset, u32 value)
85 __le32 reg = cpu_to_le32(value);
86 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
87 USB_VENDOR_REQUEST_OUT, offset,
88 ®, sizeof(u32), REGISTER_TIMEOUT);
91 static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
92 const unsigned int offset, u32 value)
94 __le32 reg = cpu_to_le32(value);
95 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
96 USB_VENDOR_REQUEST_OUT, offset,
97 ®, sizeof(u32), REGISTER_TIMEOUT);
100 static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
101 const unsigned int offset,
102 void *value, const u32 length)
104 int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
105 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
106 USB_VENDOR_REQUEST_OUT, offset,
107 value, length, timeout);
110 static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
115 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
116 rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, ®);
117 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
119 udelay(REGISTER_BUSY_DELAY);
125 static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
126 const unsigned int word, const u8 value)
130 mutex_lock(&rt2x00dev->usb_cache_mutex);
133 * Wait until the BBP becomes ready.
135 reg = rt73usb_bbp_check(rt2x00dev);
136 if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
137 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
138 mutex_unlock(&rt2x00dev->usb_cache_mutex);
143 * Write the data into the BBP.
146 rt2x00_set_field32(®, PHY_CSR3_VALUE, value);
147 rt2x00_set_field32(®, PHY_CSR3_REGNUM, word);
148 rt2x00_set_field32(®, PHY_CSR3_BUSY, 1);
149 rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 0);
151 rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
152 mutex_unlock(&rt2x00dev->usb_cache_mutex);
155 static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
156 const unsigned int word, u8 *value)
160 mutex_lock(&rt2x00dev->usb_cache_mutex);
163 * Wait until the BBP becomes ready.
165 reg = rt73usb_bbp_check(rt2x00dev);
166 if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
167 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
168 mutex_unlock(&rt2x00dev->usb_cache_mutex);
173 * Write the request into the BBP.
176 rt2x00_set_field32(®, PHY_CSR3_REGNUM, word);
177 rt2x00_set_field32(®, PHY_CSR3_BUSY, 1);
178 rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 1);
180 rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
183 * Wait until the BBP becomes ready.
185 reg = rt73usb_bbp_check(rt2x00dev);
186 if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
187 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
192 *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
193 mutex_unlock(&rt2x00dev->usb_cache_mutex);
196 static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
197 const unsigned int word, const u32 value)
205 mutex_lock(&rt2x00dev->usb_cache_mutex);
207 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
208 rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, ®);
209 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
211 udelay(REGISTER_BUSY_DELAY);
214 mutex_unlock(&rt2x00dev->usb_cache_mutex);
215 ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
220 rt2x00_set_field32(®, PHY_CSR4_VALUE, value);
223 * RF5225 and RF2527 contain 21 bits per RF register value,
224 * all others contain 20 bits.
226 rt2x00_set_field32(®, PHY_CSR4_NUMBER_OF_BITS,
227 20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
228 rt2x00_rf(&rt2x00dev->chip, RF2527)));
229 rt2x00_set_field32(®, PHY_CSR4_IF_SELECT, 0);
230 rt2x00_set_field32(®, PHY_CSR4_BUSY, 1);
232 rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
233 rt2x00_rf_write(rt2x00dev, word, value);
234 mutex_unlock(&rt2x00dev->usb_cache_mutex);
237 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
238 #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
240 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
241 const unsigned int word, u32 *data)
243 rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
246 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
247 const unsigned int word, u32 data)
249 rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
252 static const struct rt2x00debug rt73usb_rt2x00debug = {
253 .owner = THIS_MODULE,
255 .read = rt73usb_read_csr,
256 .write = rt73usb_write_csr,
257 .word_size = sizeof(u32),
258 .word_count = CSR_REG_SIZE / sizeof(u32),
261 .read = rt2x00_eeprom_read,
262 .write = rt2x00_eeprom_write,
263 .word_size = sizeof(u16),
264 .word_count = EEPROM_SIZE / sizeof(u16),
267 .read = rt73usb_bbp_read,
268 .write = rt73usb_bbp_write,
269 .word_size = sizeof(u8),
270 .word_count = BBP_SIZE / sizeof(u8),
273 .read = rt2x00_rf_read,
274 .write = rt73usb_rf_write,
275 .word_size = sizeof(u32),
276 .word_count = RF_SIZE / sizeof(u32),
279 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
281 #ifdef CONFIG_RT73USB_LEDS
282 static void rt73usb_led_brightness(struct led_classdev *led_cdev,
283 enum led_brightness brightness)
285 struct rt2x00_led *led =
286 container_of(led_cdev, struct rt2x00_led, led_dev);
287 unsigned int enabled = brightness != LED_OFF;
288 unsigned int a_mode =
289 (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_5GHZ);
290 unsigned int bg_mode =
291 (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
294 NOTICE(led->rt2x00dev,
295 "Ignoring LED brightness command for led %d", led->type);
299 if (led->type == LED_TYPE_RADIO) {
300 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
301 MCU_LEDCS_RADIO_STATUS, enabled);
303 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
304 0, led->rt2x00dev->led_mcu_reg,
306 } else if (led->type == LED_TYPE_ASSOC) {
307 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
308 MCU_LEDCS_LINK_BG_STATUS, bg_mode);
309 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
310 MCU_LEDCS_LINK_A_STATUS, a_mode);
312 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
313 0, led->rt2x00dev->led_mcu_reg,
315 } else if (led->type == LED_TYPE_QUALITY) {
317 * The brightness is divided into 6 levels (0 - 5),
318 * this means we need to convert the brightness
319 * argument into the matching level within that range.
321 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
322 brightness / (LED_FULL / 6),
323 led->rt2x00dev->led_mcu_reg,
328 #define rt73usb_led_brightness NULL
329 #endif /* CONFIG_RT73USB_LEDS */
332 * Configuration handlers.
334 static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
335 struct rt2x00_intf *intf,
336 struct rt2x00intf_conf *conf,
337 const unsigned int flags)
339 unsigned int beacon_base;
342 if (flags & CONFIG_UPDATE_TYPE) {
344 * Clear current synchronisation setup.
345 * For the Beacon base registers we only need to clear
346 * the first byte since that byte contains the VALID and OWNER
347 * bits which (when set to 0) will invalidate the entire beacon.
349 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
350 rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
351 rt73usb_register_write(rt2x00dev, beacon_base, 0);
354 * Enable synchronisation.
356 rt73usb_register_read(rt2x00dev, TXRX_CSR9, ®);
357 rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 1);
358 rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE,
359 (conf->sync == TSF_SYNC_BEACON));
360 rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0);
361 rt2x00_set_field32(®, TXRX_CSR9_TSF_SYNC, conf->sync);
362 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
365 if (flags & CONFIG_UPDATE_MAC) {
366 reg = le32_to_cpu(conf->mac[1]);
367 rt2x00_set_field32(®, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
368 conf->mac[1] = cpu_to_le32(reg);
370 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2,
371 conf->mac, sizeof(conf->mac));
374 if (flags & CONFIG_UPDATE_BSSID) {
375 reg = le32_to_cpu(conf->bssid[1]);
376 rt2x00_set_field32(®, MAC_CSR5_BSS_ID_MASK, 3);
377 conf->bssid[1] = cpu_to_le32(reg);
379 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4,
380 conf->bssid, sizeof(conf->bssid));
384 static int rt73usb_config_preamble(struct rt2x00_dev *rt2x00dev,
385 const int short_preamble,
386 const int ack_timeout,
387 const int ack_consume_time)
392 * When in atomic context, we should let rt2x00lib
393 * try this configuration again later.
398 rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®);
399 rt2x00_set_field32(®, TXRX_CSR0_RX_ACK_TIMEOUT, ack_timeout);
400 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
402 rt73usb_register_read(rt2x00dev, TXRX_CSR4, ®);
403 rt2x00_set_field32(®, TXRX_CSR4_AUTORESPOND_PREAMBLE,
405 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
410 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
411 const int basic_rate_mask)
413 rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
416 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
417 struct rf_channel *rf, const int txpower)
423 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
424 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
426 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
427 rt2x00_rf(&rt2x00dev->chip, RF2527));
429 rt73usb_bbp_read(rt2x00dev, 3, &r3);
430 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
431 rt73usb_bbp_write(rt2x00dev, 3, r3);
434 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
435 r94 += txpower - MAX_TXPOWER;
436 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
438 rt73usb_bbp_write(rt2x00dev, 94, r94);
440 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
441 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
442 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
443 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
445 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
446 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
447 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
448 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
450 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
451 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
452 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
453 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
458 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
461 struct rf_channel rf;
463 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
464 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
465 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
466 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
468 rt73usb_config_channel(rt2x00dev, &rf, txpower);
471 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
472 struct antenna_setup *ant)
479 rt73usb_bbp_read(rt2x00dev, 3, &r3);
480 rt73usb_bbp_read(rt2x00dev, 4, &r4);
481 rt73usb_bbp_read(rt2x00dev, 77, &r77);
483 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
486 * Configure the RX antenna.
489 case ANTENNA_HW_DIVERSITY:
490 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
491 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
492 && (rt2x00dev->curr_band != IEEE80211_BAND_5GHZ);
493 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
496 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
497 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
498 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
499 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
501 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
503 case ANTENNA_SW_DIVERSITY:
505 * NOTE: We should never come here because rt2x00lib is
506 * supposed to catch this and send us the correct antenna
507 * explicitely. However we are nog going to bug about this.
508 * Instead, just default to antenna B.
511 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
512 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
513 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
514 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
516 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
520 rt73usb_bbp_write(rt2x00dev, 77, r77);
521 rt73usb_bbp_write(rt2x00dev, 3, r3);
522 rt73usb_bbp_write(rt2x00dev, 4, r4);
525 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
526 struct antenna_setup *ant)
532 rt73usb_bbp_read(rt2x00dev, 3, &r3);
533 rt73usb_bbp_read(rt2x00dev, 4, &r4);
534 rt73usb_bbp_read(rt2x00dev, 77, &r77);
536 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
537 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
538 !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
541 * Configure the RX antenna.
544 case ANTENNA_HW_DIVERSITY:
545 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
548 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
549 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
551 case ANTENNA_SW_DIVERSITY:
553 * NOTE: We should never come here because rt2x00lib is
554 * supposed to catch this and send us the correct antenna
555 * explicitely. However we are nog going to bug about this.
556 * Instead, just default to antenna B.
559 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
560 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
564 rt73usb_bbp_write(rt2x00dev, 77, r77);
565 rt73usb_bbp_write(rt2x00dev, 3, r3);
566 rt73usb_bbp_write(rt2x00dev, 4, r4);
572 * value[0] -> non-LNA
578 static const struct antenna_sel antenna_sel_a[] = {
579 { 96, { 0x58, 0x78 } },
580 { 104, { 0x38, 0x48 } },
581 { 75, { 0xfe, 0x80 } },
582 { 86, { 0xfe, 0x80 } },
583 { 88, { 0xfe, 0x80 } },
584 { 35, { 0x60, 0x60 } },
585 { 97, { 0x58, 0x58 } },
586 { 98, { 0x58, 0x58 } },
589 static const struct antenna_sel antenna_sel_bg[] = {
590 { 96, { 0x48, 0x68 } },
591 { 104, { 0x2c, 0x3c } },
592 { 75, { 0xfe, 0x80 } },
593 { 86, { 0xfe, 0x80 } },
594 { 88, { 0xfe, 0x80 } },
595 { 35, { 0x50, 0x50 } },
596 { 97, { 0x48, 0x48 } },
597 { 98, { 0x48, 0x48 } },
600 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
601 struct antenna_setup *ant)
603 const struct antenna_sel *sel;
608 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
610 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
612 sel = antenna_sel_bg;
613 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
616 for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
617 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
619 rt73usb_register_read(rt2x00dev, PHY_CSR0, ®);
621 rt2x00_set_field32(®, PHY_CSR0_PA_PE_BG,
622 (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ));
623 rt2x00_set_field32(®, PHY_CSR0_PA_PE_A,
624 (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ));
626 rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
628 if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
629 rt2x00_rf(&rt2x00dev->chip, RF5225))
630 rt73usb_config_antenna_5x(rt2x00dev, ant);
631 else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
632 rt2x00_rf(&rt2x00dev->chip, RF2527))
633 rt73usb_config_antenna_2x(rt2x00dev, ant);
636 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
637 struct rt2x00lib_conf *libconf)
641 rt73usb_register_read(rt2x00dev, MAC_CSR9, ®);
642 rt2x00_set_field32(®, MAC_CSR9_SLOT_TIME, libconf->slot_time);
643 rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
645 rt73usb_register_read(rt2x00dev, MAC_CSR8, ®);
646 rt2x00_set_field32(®, MAC_CSR8_SIFS, libconf->sifs);
647 rt2x00_set_field32(®, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
648 rt2x00_set_field32(®, MAC_CSR8_EIFS, libconf->eifs);
649 rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
651 rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®);
652 rt2x00_set_field32(®, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
653 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
655 rt73usb_register_read(rt2x00dev, TXRX_CSR4, ®);
656 rt2x00_set_field32(®, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
657 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
659 rt73usb_register_read(rt2x00dev, TXRX_CSR9, ®);
660 rt2x00_set_field32(®, TXRX_CSR9_BEACON_INTERVAL,
661 libconf->conf->beacon_int * 16);
662 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
665 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
666 struct rt2x00lib_conf *libconf,
667 const unsigned int flags)
669 if (flags & CONFIG_UPDATE_PHYMODE)
670 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
671 if (flags & CONFIG_UPDATE_CHANNEL)
672 rt73usb_config_channel(rt2x00dev, &libconf->rf,
673 libconf->conf->power_level);
674 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
675 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
676 if (flags & CONFIG_UPDATE_ANTENNA)
677 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
678 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
679 rt73usb_config_duration(rt2x00dev, libconf);
685 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
686 struct link_qual *qual)
691 * Update FCS error count from register.
693 rt73usb_register_read(rt2x00dev, STA_CSR0, ®);
694 qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
697 * Update False CCA count from register.
699 rt73usb_register_read(rt2x00dev, STA_CSR1, ®);
700 qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
703 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
705 rt73usb_bbp_write(rt2x00dev, 17, 0x20);
706 rt2x00dev->link.vgc_level = 0x20;
709 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
711 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
716 rt73usb_bbp_read(rt2x00dev, 17, &r17);
719 * Determine r17 bounds.
721 if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
725 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
733 } else if (rssi > -84) {
741 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
748 * If we are not associated, we should go straight to the
749 * dynamic CCA tuning.
751 if (!rt2x00dev->intf_associated)
752 goto dynamic_cca_tune;
755 * Special big-R17 for very short distance
759 rt73usb_bbp_write(rt2x00dev, 17, 0x60);
764 * Special big-R17 for short distance
768 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
773 * Special big-R17 for middle-short distance
777 if (r17 != low_bound)
778 rt73usb_bbp_write(rt2x00dev, 17, low_bound);
783 * Special mid-R17 for middle distance
786 if (r17 != (low_bound + 0x10))
787 rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
792 * Special case: Change up_bound based on the rssi.
793 * Lower up_bound when rssi is weaker then -74 dBm.
795 up_bound -= 2 * (-74 - rssi);
796 if (low_bound > up_bound)
797 up_bound = low_bound;
799 if (r17 > up_bound) {
800 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
807 * r17 does not yet exceed upper limit, continue and base
808 * the r17 tuning on the false CCA count.
810 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
814 rt73usb_bbp_write(rt2x00dev, 17, r17);
815 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
819 rt73usb_bbp_write(rt2x00dev, 17, r17);
824 * Firmware name function.
826 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
828 return FIRMWARE_RT2571;
832 * Initialization functions.
834 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
846 * Wait for stable hardware.
848 for (i = 0; i < 100; i++) {
849 rt73usb_register_read(rt2x00dev, MAC_CSR0, ®);
856 ERROR(rt2x00dev, "Unstable hardware.\n");
861 * Write firmware to device.
862 * We setup a seperate cache for this action,
863 * since we are going to write larger chunks of data
864 * then normally used cache size.
866 cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
868 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
872 for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
873 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
874 timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32));
876 memcpy(cache, ptr, buflen);
878 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
879 USB_VENDOR_REQUEST_OUT,
880 FIRMWARE_IMAGE_BASE + i, 0,
881 cache, buflen, timeout);
889 * Send firmware request to device to load firmware,
890 * we need to specify a long timeout time.
892 status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
893 0, USB_MODE_FIRMWARE,
894 REGISTER_TIMEOUT_FIRMWARE);
896 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
903 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
907 rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®);
908 rt2x00_set_field32(®, TXRX_CSR0_AUTO_TX_SEQ, 1);
909 rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, 0);
910 rt2x00_set_field32(®, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
911 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
913 rt73usb_register_read(rt2x00dev, TXRX_CSR1, ®);
914 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
915 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID0_VALID, 1);
916 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
917 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID1_VALID, 1);
918 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
919 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID2_VALID, 1);
920 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
921 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID3_VALID, 1);
922 rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
925 * CCK TXD BBP registers
927 rt73usb_register_read(rt2x00dev, TXRX_CSR2, ®);
928 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID0, 13);
929 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID0_VALID, 1);
930 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID1, 12);
931 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID1_VALID, 1);
932 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID2, 11);
933 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID2_VALID, 1);
934 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID3, 10);
935 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID3_VALID, 1);
936 rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
939 * OFDM TXD BBP registers
941 rt73usb_register_read(rt2x00dev, TXRX_CSR3, ®);
942 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID0, 7);
943 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID0_VALID, 1);
944 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID1, 6);
945 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID1_VALID, 1);
946 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID2, 5);
947 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID2_VALID, 1);
948 rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
950 rt73usb_register_read(rt2x00dev, TXRX_CSR7, ®);
951 rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_6MBS, 59);
952 rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_9MBS, 53);
953 rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_12MBS, 49);
954 rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_18MBS, 46);
955 rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
957 rt73usb_register_read(rt2x00dev, TXRX_CSR8, ®);
958 rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_24MBS, 44);
959 rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_36MBS, 42);
960 rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_48MBS, 42);
961 rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_54MBS, 42);
962 rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
964 rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
966 rt73usb_register_read(rt2x00dev, MAC_CSR6, ®);
967 rt2x00_set_field32(®, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
968 rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
970 rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
972 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
975 rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
977 rt73usb_register_read(rt2x00dev, MAC_CSR14, ®);
978 rt2x00_set_field32(®, MAC_CSR14_ON_PERIOD, 70);
979 rt2x00_set_field32(®, MAC_CSR14_OFF_PERIOD, 30);
980 rt73usb_register_write(rt2x00dev, MAC_CSR14, reg);
983 * Invalidate all Shared Keys (SEC_CSR0),
984 * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
986 rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
987 rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
988 rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
991 if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
992 rt2x00_rf(&rt2x00dev->chip, RF2527))
993 rt2x00_set_field32(®, PHY_CSR1_RF_RPI, 1);
994 rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
996 rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
997 rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
998 rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1000 rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, ®);
1001 rt2x00_set_field32(®, AC_TXOP_CSR0_AC0_TX_OP, 0);
1002 rt2x00_set_field32(®, AC_TXOP_CSR0_AC1_TX_OP, 0);
1003 rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1005 rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, ®);
1006 rt2x00_set_field32(®, AC_TXOP_CSR1_AC2_TX_OP, 192);
1007 rt2x00_set_field32(®, AC_TXOP_CSR1_AC3_TX_OP, 48);
1008 rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1010 rt73usb_register_read(rt2x00dev, MAC_CSR9, ®);
1011 rt2x00_set_field32(®, MAC_CSR9_CW_SELECT, 0);
1012 rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1016 * For the Beacon base registers we only need to clear
1017 * the first byte since that byte contains the VALID and OWNER
1018 * bits which (when set to 0) will invalidate the entire beacon.
1020 rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1021 rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1022 rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1023 rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1026 * We must clear the error counters.
1027 * These registers are cleared on read,
1028 * so we may pass a useless variable to store the value.
1030 rt73usb_register_read(rt2x00dev, STA_CSR0, ®);
1031 rt73usb_register_read(rt2x00dev, STA_CSR1, ®);
1032 rt73usb_register_read(rt2x00dev, STA_CSR2, ®);
1035 * Reset MAC and BBP registers.
1037 rt73usb_register_read(rt2x00dev, MAC_CSR1, ®);
1038 rt2x00_set_field32(®, MAC_CSR1_SOFT_RESET, 1);
1039 rt2x00_set_field32(®, MAC_CSR1_BBP_RESET, 1);
1040 rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1042 rt73usb_register_read(rt2x00dev, MAC_CSR1, ®);
1043 rt2x00_set_field32(®, MAC_CSR1_SOFT_RESET, 0);
1044 rt2x00_set_field32(®, MAC_CSR1_BBP_RESET, 0);
1045 rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1047 rt73usb_register_read(rt2x00dev, MAC_CSR1, ®);
1048 rt2x00_set_field32(®, MAC_CSR1_HOST_READY, 1);
1049 rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1054 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1061 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1062 rt73usb_bbp_read(rt2x00dev, 0, &value);
1063 if ((value != 0xff) && (value != 0x00))
1064 goto continue_csr_init;
1065 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1066 udelay(REGISTER_BUSY_DELAY);
1069 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1073 rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1074 rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1075 rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1076 rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1077 rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1078 rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1079 rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1080 rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1081 rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1082 rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1083 rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1084 rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1085 rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1086 rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1087 rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1088 rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1089 rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1090 rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1091 rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1092 rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1093 rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1094 rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1095 rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1096 rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1097 rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1099 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1100 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1102 if (eeprom != 0xffff && eeprom != 0x0000) {
1103 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1104 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1105 rt73usb_bbp_write(rt2x00dev, reg_id, value);
1113 * Device state switch handlers.
1115 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1116 enum dev_state state)
1120 rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®);
1121 rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX,
1122 state == STATE_RADIO_RX_OFF);
1123 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1126 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1129 * Initialize all registers.
1131 if (rt73usb_init_registers(rt2x00dev) ||
1132 rt73usb_init_bbp(rt2x00dev)) {
1133 ERROR(rt2x00dev, "Register initialization failed.\n");
1140 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1142 rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1145 * Disable synchronisation.
1147 rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1149 rt2x00usb_disable_radio(rt2x00dev);
1152 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1159 put_to_sleep = (state != STATE_AWAKE);
1161 rt73usb_register_read(rt2x00dev, MAC_CSR12, ®);
1162 rt2x00_set_field32(®, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1163 rt2x00_set_field32(®, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1164 rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1167 * Device is not guaranteed to be in the requested state yet.
1168 * We must wait until the register indicates that the
1169 * device has entered the correct state.
1171 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1172 rt73usb_register_read(rt2x00dev, MAC_CSR12, ®);
1174 rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1175 if (current_state == !put_to_sleep)
1180 NOTICE(rt2x00dev, "Device failed to enter state %d, "
1181 "current device state %d.\n", !put_to_sleep, current_state);
1186 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1187 enum dev_state state)
1192 case STATE_RADIO_ON:
1193 retval = rt73usb_enable_radio(rt2x00dev);
1195 case STATE_RADIO_OFF:
1196 rt73usb_disable_radio(rt2x00dev);
1198 case STATE_RADIO_RX_ON:
1199 case STATE_RADIO_RX_ON_LINK:
1200 rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
1202 case STATE_RADIO_RX_OFF:
1203 case STATE_RADIO_RX_OFF_LINK:
1204 rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
1206 case STATE_DEEP_SLEEP:
1210 retval = rt73usb_set_state(rt2x00dev, state);
1221 * TX descriptor initialization
1223 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1224 struct sk_buff *skb,
1225 struct txentry_desc *txdesc,
1226 struct ieee80211_tx_control *control)
1228 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1229 __le32 *txd = skbdesc->desc;
1233 * Start writing the descriptor words.
1235 rt2x00_desc_read(txd, 1, &word);
1236 rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue);
1237 rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs);
1238 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1239 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1240 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1241 rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1242 rt2x00_desc_write(txd, 1, word);
1244 rt2x00_desc_read(txd, 2, &word);
1245 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1246 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1247 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1248 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1249 rt2x00_desc_write(txd, 2, word);
1251 rt2x00_desc_read(txd, 5, &word);
1252 rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1253 TXPOWER_TO_DEV(rt2x00dev->tx_power));
1254 rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1255 rt2x00_desc_write(txd, 5, word);
1257 rt2x00_desc_read(txd, 0, &word);
1258 rt2x00_set_field32(&word, TXD_W0_BURST,
1259 test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1260 rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1261 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1262 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1263 rt2x00_set_field32(&word, TXD_W0_ACK,
1264 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1265 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1266 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1267 rt2x00_set_field32(&word, TXD_W0_OFDM,
1268 test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
1269 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1270 rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1272 IEEE80211_TXCTL_LONG_RETRY_LIMIT));
1273 rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1274 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
1275 rt2x00_set_field32(&word, TXD_W0_BURST2,
1276 test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1277 rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1278 rt2x00_desc_write(txd, 0, word);
1281 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1282 struct sk_buff *skb)
1287 * The length _must_ be a multiple of 4,
1288 * but it must _not_ be a multiple of the USB packet size.
1290 length = roundup(skb->len, 4);
1291 length += (4 * !(length % rt2x00dev->usb_maxpacket));
1297 * TX data initialization
1299 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1300 const unsigned int queue)
1304 if (queue != RT2X00_BCN_QUEUE_BEACON)
1308 * For Wi-Fi faily generated beacons between participating stations.
1309 * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1311 rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1313 rt73usb_register_read(rt2x00dev, TXRX_CSR9, ®);
1314 if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1315 rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 1);
1316 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1321 * RX control handlers
1323 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1329 lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1344 if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
1345 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1346 if (lna == 3 || lna == 2)
1355 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1356 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1358 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1361 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1362 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1365 return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1368 static void rt73usb_fill_rxdone(struct queue_entry *entry,
1369 struct rxdone_entry_desc *rxdesc)
1371 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1372 __le32 *rxd = (__le32 *)entry->skb->data;
1373 struct ieee80211_hdr *hdr =
1374 (struct ieee80211_hdr *)entry->skb->data + entry->queue->desc_size;
1375 int header_size = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control));
1379 rt2x00_desc_read(rxd, 0, &word0);
1380 rt2x00_desc_read(rxd, 1, &word1);
1383 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1384 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1387 * Obtain the status about this packet.
1389 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1390 rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1);
1391 rxdesc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1392 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1393 rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS);
1396 * The data behind the ieee80211 header must be
1397 * aligned on a 4 byte boundary.
1399 if (header_size % 4 == 0) {
1400 skb_push(entry->skb, 2);
1401 memmove(entry->skb->data, entry->skb->data + 2,
1402 entry->skb->len - 2);
1406 * Set descriptor and data pointer.
1408 skbdesc->data = entry->skb->data + entry->queue->desc_size;
1409 skbdesc->data_len = rxdesc->size;
1410 skbdesc->desc = entry->skb->data;
1411 skbdesc->desc_len = entry->queue->desc_size;
1414 * Remove descriptor from skb buffer and trim the whole thing
1415 * down to only contain data.
1417 skb_pull(entry->skb, skbdesc->desc_len);
1418 skb_trim(entry->skb, rxdesc->size);
1422 * Device probe functions.
1424 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1430 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1433 * Start validation of the data that has been read.
1435 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1436 if (!is_valid_ether_addr(mac)) {
1437 DECLARE_MAC_BUF(macbuf);
1439 random_ether_addr(mac);
1440 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1443 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1444 if (word == 0xffff) {
1445 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1446 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1448 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1450 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1451 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1452 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1453 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1454 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1455 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1458 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1459 if (word == 0xffff) {
1460 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1461 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1462 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1465 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1466 if (word == 0xffff) {
1467 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1468 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1469 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1470 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1471 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1472 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1473 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1474 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1475 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1477 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1478 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1481 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1482 if (word == 0xffff) {
1483 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1484 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1485 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1486 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1489 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1490 if (word == 0xffff) {
1491 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1492 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1493 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1494 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1496 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1497 if (value < -10 || value > 10)
1498 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1499 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1500 if (value < -10 || value > 10)
1501 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1502 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1505 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1506 if (word == 0xffff) {
1507 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1508 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1509 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1510 EEPROM(rt2x00dev, "RSSI OFFSET A: 0x%04x\n", word);
1512 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1513 if (value < -10 || value > 10)
1514 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1515 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1516 if (value < -10 || value > 10)
1517 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1518 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1524 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1531 * Read EEPROM word for configuration.
1533 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1536 * Identify RF chipset.
1538 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1539 rt73usb_register_read(rt2x00dev, MAC_CSR0, ®);
1540 rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1542 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1543 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1547 if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1548 !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1549 !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1550 !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1551 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1556 * Identify default antenna configuration.
1558 rt2x00dev->default_ant.tx =
1559 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1560 rt2x00dev->default_ant.rx =
1561 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1564 * Read the Frame type.
1566 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1567 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1570 * Read frequency offset.
1572 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1573 rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1576 * Read external LNA informations.
1578 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1580 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1581 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1582 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1586 * Store led settings, for correct led behaviour.
1588 #ifdef CONFIG_RT73USB_LEDS
1589 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1592 case LED_MODE_TXRX_ACTIVITY:
1594 case LED_MODE_ALPHA:
1595 case LED_MODE_DEFAULT:
1596 rt2x00dev->led_flags =
1597 LED_SUPPORT_RADIO | LED_SUPPORT_ASSOC;
1599 case LED_MODE_SIGNAL_STRENGTH:
1600 rt2x00dev->led_flags =
1601 LED_SUPPORT_RADIO | LED_SUPPORT_ASSOC |
1602 LED_SUPPORT_QUALITY;
1606 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value);
1607 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0,
1608 rt2x00_get_field16(eeprom,
1609 EEPROM_LED_POLARITY_GPIO_0));
1610 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_1,
1611 rt2x00_get_field16(eeprom,
1612 EEPROM_LED_POLARITY_GPIO_1));
1613 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_2,
1614 rt2x00_get_field16(eeprom,
1615 EEPROM_LED_POLARITY_GPIO_2));
1616 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_3,
1617 rt2x00_get_field16(eeprom,
1618 EEPROM_LED_POLARITY_GPIO_3));
1619 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_4,
1620 rt2x00_get_field16(eeprom,
1621 EEPROM_LED_POLARITY_GPIO_4));
1622 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_ACT,
1623 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1624 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_BG,
1625 rt2x00_get_field16(eeprom,
1626 EEPROM_LED_POLARITY_RDY_G));
1627 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_A,
1628 rt2x00_get_field16(eeprom,
1629 EEPROM_LED_POLARITY_RDY_A));
1630 #endif /* CONFIG_RT73USB_LEDS */
1636 * RF value list for RF2528
1639 static const struct rf_channel rf_vals_bg_2528[] = {
1640 { 1, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1641 { 2, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1642 { 3, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1643 { 4, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1644 { 5, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1645 { 6, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1646 { 7, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1647 { 8, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1648 { 9, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1649 { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1650 { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1651 { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1652 { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1653 { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1657 * RF value list for RF5226
1658 * Supports: 2.4 GHz & 5.2 GHz
1660 static const struct rf_channel rf_vals_5226[] = {
1661 { 1, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1662 { 2, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1663 { 3, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1664 { 4, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1665 { 5, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1666 { 6, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1667 { 7, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1668 { 8, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1669 { 9, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1670 { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1671 { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1672 { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1673 { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1674 { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1676 /* 802.11 UNI / HyperLan 2 */
1677 { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1678 { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1679 { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1680 { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1681 { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1682 { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1683 { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1684 { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1686 /* 802.11 HyperLan 2 */
1687 { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1688 { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1689 { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1690 { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1691 { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1692 { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1693 { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1694 { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1695 { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1696 { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1699 { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1700 { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1701 { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1702 { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1703 { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1704 { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1706 /* MMAC(Japan)J52 ch 34,38,42,46 */
1707 { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1708 { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1709 { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1710 { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1714 * RF value list for RF5225 & RF2527
1715 * Supports: 2.4 GHz & 5.2 GHz
1717 static const struct rf_channel rf_vals_5225_2527[] = {
1718 { 1, 0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1719 { 2, 0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1720 { 3, 0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1721 { 4, 0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1722 { 5, 0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1723 { 6, 0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1724 { 7, 0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1725 { 8, 0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1726 { 9, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1727 { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1728 { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1729 { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1730 { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1731 { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1733 /* 802.11 UNI / HyperLan 2 */
1734 { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1735 { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1736 { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1737 { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1738 { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1739 { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1740 { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1741 { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1743 /* 802.11 HyperLan 2 */
1744 { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1745 { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1746 { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1747 { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1748 { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1749 { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1750 { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1751 { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1752 { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1753 { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1756 { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1757 { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1758 { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1759 { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1760 { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1761 { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1763 /* MMAC(Japan)J52 ch 34,38,42,46 */
1764 { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1765 { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1766 { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1767 { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1771 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1773 struct hw_mode_spec *spec = &rt2x00dev->spec;
1778 * Initialize all hw fields.
1780 rt2x00dev->hw->flags =
1781 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1782 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1783 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1784 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1785 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1786 rt2x00dev->hw->queues = 4;
1788 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1789 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1790 rt2x00_eeprom_addr(rt2x00dev,
1791 EEPROM_MAC_ADDR_0));
1794 * Convert tx_power array in eeprom.
1796 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1797 for (i = 0; i < 14; i++)
1798 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1801 * Initialize hw_mode information.
1803 spec->supported_bands = SUPPORT_BAND_2GHZ;
1804 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1805 spec->tx_power_a = NULL;
1806 spec->tx_power_bg = txpower;
1807 spec->tx_power_default = DEFAULT_TXPOWER;
1809 if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1810 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1811 spec->channels = rf_vals_bg_2528;
1812 } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1813 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1814 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1815 spec->channels = rf_vals_5226;
1816 } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1817 spec->num_channels = 14;
1818 spec->channels = rf_vals_5225_2527;
1819 } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1820 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1821 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1822 spec->channels = rf_vals_5225_2527;
1825 if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1826 rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1827 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1828 for (i = 0; i < 14; i++)
1829 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1831 spec->tx_power_a = txpower;
1835 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1840 * Allocate eeprom data.
1842 retval = rt73usb_validate_eeprom(rt2x00dev);
1846 retval = rt73usb_init_eeprom(rt2x00dev);
1851 * Initialize hw specifications.
1853 rt73usb_probe_hw_mode(rt2x00dev);
1856 * This device requires firmware.
1858 __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1859 __set_bit(DRIVER_REQUIRE_FIRMWARE_CRC_ITU_T, &rt2x00dev->flags);
1862 * Set the rssi offset.
1864 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1870 * IEEE80211 stack callback functions.
1872 static void rt73usb_configure_filter(struct ieee80211_hw *hw,
1873 unsigned int changed_flags,
1874 unsigned int *total_flags,
1876 struct dev_addr_list *mc_list)
1878 struct rt2x00_dev *rt2x00dev = hw->priv;
1882 * Mask off any flags we are going to ignore from
1883 * the total_flags field.
1894 * Apply some rules to the filters:
1895 * - Some filters imply different filters to be set.
1896 * - Some things we can't filter out at all.
1899 *total_flags |= FIF_ALLMULTI;
1900 if (*total_flags & FIF_OTHER_BSS ||
1901 *total_flags & FIF_PROMISC_IN_BSS)
1902 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1905 * Check if there is any work left for us.
1907 if (rt2x00dev->packet_filter == *total_flags)
1909 rt2x00dev->packet_filter = *total_flags;
1912 * When in atomic context, reschedule and let rt2x00lib
1913 * call this function again.
1916 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1921 * Start configuration steps.
1922 * Note that the version error will always be dropped
1923 * and broadcast frames will always be accepted since
1924 * there is no filter for it at this time.
1926 rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®);
1927 rt2x00_set_field32(®, TXRX_CSR0_DROP_CRC,
1928 !(*total_flags & FIF_FCSFAIL));
1929 rt2x00_set_field32(®, TXRX_CSR0_DROP_PHYSICAL,
1930 !(*total_flags & FIF_PLCPFAIL));
1931 rt2x00_set_field32(®, TXRX_CSR0_DROP_CONTROL,
1932 !(*total_flags & FIF_CONTROL));
1933 rt2x00_set_field32(®, TXRX_CSR0_DROP_NOT_TO_ME,
1934 !(*total_flags & FIF_PROMISC_IN_BSS));
1935 rt2x00_set_field32(®, TXRX_CSR0_DROP_TO_DS,
1936 !(*total_flags & FIF_PROMISC_IN_BSS));
1937 rt2x00_set_field32(®, TXRX_CSR0_DROP_VERSION_ERROR, 1);
1938 rt2x00_set_field32(®, TXRX_CSR0_DROP_MULTICAST,
1939 !(*total_flags & FIF_ALLMULTI));
1940 rt2x00_set_field32(®, TXRX_CSR0_DROP_BROADCAST, 0);
1941 rt2x00_set_field32(®, TXRX_CSR0_DROP_ACK_CTS,
1942 !(*total_flags & FIF_CONTROL));
1943 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1946 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1947 u32 short_retry, u32 long_retry)
1949 struct rt2x00_dev *rt2x00dev = hw->priv;
1952 rt73usb_register_read(rt2x00dev, TXRX_CSR4, ®);
1953 rt2x00_set_field32(®, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1954 rt2x00_set_field32(®, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1955 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1962 * Mac80211 demands get_tsf must be atomic.
1963 * This is not possible for rt73usb since all register access
1964 * functions require sleeping. Untill mac80211 no longer needs
1965 * get_tsf to be atomic, this function should be disabled.
1967 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1969 struct rt2x00_dev *rt2x00dev = hw->priv;
1973 rt73usb_register_read(rt2x00dev, TXRX_CSR13, ®);
1974 tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1975 rt73usb_register_read(rt2x00dev, TXRX_CSR12, ®);
1976 tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1981 #define rt73usb_get_tsf NULL
1984 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
1985 struct ieee80211_tx_control *control)
1987 struct rt2x00_dev *rt2x00dev = hw->priv;
1988 struct rt2x00_intf *intf = vif_to_intf(control->vif);
1989 struct skb_frame_desc *skbdesc;
1990 unsigned int beacon_base;
1991 unsigned int timeout;
1993 if (unlikely(!intf->beacon))
1997 * Add the descriptor in front of the skb.
1999 skb_push(skb, intf->beacon->queue->desc_size);
2000 memset(skb->data, 0, intf->beacon->queue->desc_size);
2003 * Fill in skb descriptor
2005 skbdesc = get_skb_frame_desc(skb);
2006 memset(skbdesc, 0, sizeof(*skbdesc));
2007 skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
2008 skbdesc->data = skb->data + intf->beacon->queue->desc_size;
2009 skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
2010 skbdesc->desc = skb->data;
2011 skbdesc->desc_len = intf->beacon->queue->desc_size;
2012 skbdesc->entry = intf->beacon;
2015 * mac80211 doesn't provide the control->queue variable
2016 * for beacons. Set our own queue identification so
2017 * it can be used during descriptor initialization.
2019 control->queue = RT2X00_BCN_QUEUE_BEACON;
2020 rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
2023 * Write entire beacon with descriptor to register,
2024 * and kick the beacon generator.
2026 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
2027 timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32));
2028 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
2029 USB_VENDOR_REQUEST_OUT, beacon_base, 0,
2030 skb->data, skb->len, timeout);
2031 rt73usb_kick_tx_queue(rt2x00dev, control->queue);
2036 static const struct ieee80211_ops rt73usb_mac80211_ops = {
2038 .start = rt2x00mac_start,
2039 .stop = rt2x00mac_stop,
2040 .add_interface = rt2x00mac_add_interface,
2041 .remove_interface = rt2x00mac_remove_interface,
2042 .config = rt2x00mac_config,
2043 .config_interface = rt2x00mac_config_interface,
2044 .configure_filter = rt73usb_configure_filter,
2045 .get_stats = rt2x00mac_get_stats,
2046 .set_retry_limit = rt73usb_set_retry_limit,
2047 .bss_info_changed = rt2x00mac_bss_info_changed,
2048 .conf_tx = rt2x00mac_conf_tx,
2049 .get_tx_stats = rt2x00mac_get_tx_stats,
2050 .get_tsf = rt73usb_get_tsf,
2051 .beacon_update = rt73usb_beacon_update,
2054 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2055 .probe_hw = rt73usb_probe_hw,
2056 .get_firmware_name = rt73usb_get_firmware_name,
2057 .load_firmware = rt73usb_load_firmware,
2058 .initialize = rt2x00usb_initialize,
2059 .uninitialize = rt2x00usb_uninitialize,
2060 .init_rxentry = rt2x00usb_init_rxentry,
2061 .init_txentry = rt2x00usb_init_txentry,
2062 .set_device_state = rt73usb_set_device_state,
2063 .link_stats = rt73usb_link_stats,
2064 .reset_tuner = rt73usb_reset_tuner,
2065 .link_tuner = rt73usb_link_tuner,
2066 .led_brightness = rt73usb_led_brightness,
2067 .write_tx_desc = rt73usb_write_tx_desc,
2068 .write_tx_data = rt2x00usb_write_tx_data,
2069 .get_tx_data_len = rt73usb_get_tx_data_len,
2070 .kick_tx_queue = rt73usb_kick_tx_queue,
2071 .fill_rxdone = rt73usb_fill_rxdone,
2072 .config_intf = rt73usb_config_intf,
2073 .config_preamble = rt73usb_config_preamble,
2074 .config = rt73usb_config,
2077 static const struct data_queue_desc rt73usb_queue_rx = {
2078 .entry_num = RX_ENTRIES,
2079 .data_size = DATA_FRAME_SIZE,
2080 .desc_size = RXD_DESC_SIZE,
2081 .priv_size = sizeof(struct queue_entry_priv_usb_rx),
2084 static const struct data_queue_desc rt73usb_queue_tx = {
2085 .entry_num = TX_ENTRIES,
2086 .data_size = DATA_FRAME_SIZE,
2087 .desc_size = TXD_DESC_SIZE,
2088 .priv_size = sizeof(struct queue_entry_priv_usb_tx),
2091 static const struct data_queue_desc rt73usb_queue_bcn = {
2092 .entry_num = 4 * BEACON_ENTRIES,
2093 .data_size = MGMT_FRAME_SIZE,
2094 .desc_size = TXINFO_SIZE,
2095 .priv_size = sizeof(struct queue_entry_priv_usb_tx),
2098 static const struct rt2x00_ops rt73usb_ops = {
2099 .name = KBUILD_MODNAME,
2102 .eeprom_size = EEPROM_SIZE,
2104 .rx = &rt73usb_queue_rx,
2105 .tx = &rt73usb_queue_tx,
2106 .bcn = &rt73usb_queue_bcn,
2107 .lib = &rt73usb_rt2x00_ops,
2108 .hw = &rt73usb_mac80211_ops,
2109 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2110 .debugfs = &rt73usb_rt2x00debug,
2111 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2115 * rt73usb module information.
2117 static struct usb_device_id rt73usb_device_table[] = {
2119 { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2121 { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2123 { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2124 { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2126 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2127 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2128 { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2129 { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2131 { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2133 { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2135 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2136 { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2138 { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2140 { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2141 { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2143 { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2145 { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2146 { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2148 { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2150 { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2151 { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2153 { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2154 { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2156 { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2157 { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2158 { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2159 { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2161 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2162 { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2164 { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2165 { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2166 { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2168 { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2170 { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2171 { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2173 { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2175 { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2176 { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2180 MODULE_AUTHOR(DRV_PROJECT);
2181 MODULE_VERSION(DRV_VERSION);
2182 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2183 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2184 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2185 MODULE_FIRMWARE(FIRMWARE_RT2571);
2186 MODULE_LICENSE("GPL");
2188 static struct usb_driver rt73usb_driver = {
2189 .name = KBUILD_MODNAME,
2190 .id_table = rt73usb_device_table,
2191 .probe = rt2x00usb_probe,
2192 .disconnect = rt2x00usb_disconnect,
2193 .suspend = rt2x00usb_suspend,
2194 .resume = rt2x00usb_resume,
2197 static int __init rt73usb_init(void)
2199 return usb_register(&rt73usb_driver);
2202 static void __exit rt73usb_exit(void)
2204 usb_deregister(&rt73usb_driver);
2207 module_init(rt73usb_init);
2208 module_exit(rt73usb_exit);