drivers/net/wireless/rtl8180_dev.c

   1
   2 /*
   3  * Linux device driver for RTL8180 / RTL8185
   4  *
   5  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   6  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   7  *
   8  * Based on the r8180 driver, which is:
   9  * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  10  *
  11  * Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/pci.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8180.h"
  26 #include "rtl8180_rtl8225.h"
  27 #include "rtl8180_sa2400.h"
  28 #include "rtl8180_max2820.h"
  29 #include "rtl8180_grf5101.h"
  30
  31 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  32 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  33 MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
  34 MODULE_LICENSE("GPL");
  35
  36 static struct pci_device_id rtl8180_table[] __devinitdata = {
  37         /* rtl8185 */
  38         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
  39         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
  40         { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x701f) },
  41
  42         /* rtl8180 */
  43         { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8180) },
  44         { PCI_DEVICE(0x1799, 0x6001) },
  45         { PCI_DEVICE(0x1799, 0x6020) },
  46         { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x3300) },
  47         { }
  48 };
  49
  50 MODULE_DEVICE_TABLE(pci, rtl8180_table);
  51
  52 static const struct ieee80211_rate rtl818x_rates[] = {
  53         { .bitrate = 10, .hw_value = 0, },
  54         { .bitrate = 20, .hw_value = 1, },
  55         { .bitrate = 55, .hw_value = 2, },
  56         { .bitrate = 110, .hw_value = 3, },
  57         { .bitrate = 60, .hw_value = 4, },
  58         { .bitrate = 90, .hw_value = 5, },
  59         { .bitrate = 120, .hw_value = 6, },
  60         { .bitrate = 180, .hw_value = 7, },
  61         { .bitrate = 240, .hw_value = 8, },
  62         { .bitrate = 360, .hw_value = 9, },
  63         { .bitrate = 480, .hw_value = 10, },
  64         { .bitrate = 540, .hw_value = 11, },
  65 };
  66
  67 static const struct ieee80211_channel rtl818x_channels[] = {
  68         { .center_freq = 2412 },
  69         { .center_freq = 2417 },
  70         { .center_freq = 2422 },
  71         { .center_freq = 2427 },
  72         { .center_freq = 2432 },
  73         { .center_freq = 2437 },
  74         { .center_freq = 2442 },
  75         { .center_freq = 2447 },
  76         { .center_freq = 2452 },
  77         { .center_freq = 2457 },
  78         { .center_freq = 2462 },
  79         { .center_freq = 2467 },
  80         { .center_freq = 2472 },
  81         { .center_freq = 2484 },
  82 };
  83
  84
  85
  86
  87 void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  88 {
  89         struct rtl8180_priv *priv = dev->priv;
  90         int i = 10;
  91         u32 buf;
  92
  93         buf = (data << 8) | addr;
  94
  95         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf | 0x80);
  96         while (i--) {
  97                 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->PHY[0], buf);
  98                 if (rtl818x_ioread8(priv, &priv->map->PHY[2]) == (data & 0xFF))
  99                         return;
 100         }
 101 }
 102
 103 static void rtl8180_handle_rx(struct ieee80211_hw *dev)
 104 {
 105         struct rtl8180_priv *priv = dev->priv;
 106         unsigned int count = 32;
 107
 108         while (count--) {
 109                 struct rtl8180_rx_desc *entry = &priv->rx_ring[priv->rx_idx];
 110                 struct sk_buff *skb = priv->rx_buf[priv->rx_idx];
 111                 u32 flags = le32_to_cpu(entry->flags);
 112
 113                 if (flags & RTL8180_RX_DESC_FLAG_OWN)
 114                         return;
 115
 116                 if (unlikely(flags & (RTL8180_RX_DESC_FLAG_DMA_FAIL |
 117                                       RTL8180_RX_DESC_FLAG_FOF |
 118                                       RTL8180_RX_DESC_FLAG_RX_ERR)))
 119                         goto done;
 120                 else {
 121                         u32 flags2 = le32_to_cpu(entry->flags2);
 122                         struct ieee80211_rx_status rx_status = {0};
 123                         struct sk_buff *new_skb = dev_alloc_skb(MAX_RX_SIZE);
 124
 125                         if (unlikely(!new_skb))
 126                                 goto done;
 127
 128                         pci_unmap_single(priv->pdev,
 129                                          *((dma_addr_t *)skb->cb),
 130                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 131                         skb_put(skb, flags & 0xFFF);
 132
 133                         rx_status.antenna = (flags2 >> 15) & 1;
 134                         /* TODO: improve signal/rssi reporting */
 135                         rx_status.qual = flags2 & 0xFF;
 136                         rx_status.signal = (flags2 >> 8) & 0x7F;
 137                         /* XXX: is this correct? */
 138                         rx_status.rate_idx = (flags >> 20) & 0xF;
 139                         rx_status.freq = dev->conf.channel->center_freq;
 140                         rx_status.band = dev->conf.channel->band;
 141                         rx_status.mactime = le64_to_cpu(entry->tsft);
 142                         rx_status.flag |= RX_FLAG_TSFT;
 143                         if (flags & RTL8180_RX_DESC_FLAG_CRC32_ERR)
 144                                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 145
 146                         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 147
 148                         skb = new_skb;
 149                         priv->rx_buf[priv->rx_idx] = skb;
 150                         *((dma_addr_t *) skb->cb) =
 151                                 pci_map_single(priv->pdev, skb_tail_pointer(skb),
 152                                                MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 153                 }
 154
 155         done:
 156                 entry->rx_buf = cpu_to_le32(*((dma_addr_t *)skb->cb));
 157                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
 158                                            MAX_RX_SIZE);
 159                 if (priv->rx_idx == 31)
 160                         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
 161                 priv->rx_idx = (priv->rx_idx + 1) % 32;
 162         }
 163 }
 164
 165 static void rtl8180_handle_tx(struct ieee80211_hw *dev, unsigned int prio)
 166 {
 167         struct rtl8180_priv *priv = dev->priv;
 168         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 169
 170         while (skb_queue_len(&ring->queue)) {
 171                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 172                 struct sk_buff *skb;
 173                 struct ieee80211_tx_status status;
 174                 struct ieee80211_tx_control *control;
 175                 u32 flags = le32_to_cpu(entry->flags);
 176
 177                 if (flags & RTL8180_TX_DESC_FLAG_OWN)
 178                         return;
 179
 180                 memset(&status, 0, sizeof(status));
 181
 182                 ring->idx = (ring->idx + 1) % ring->entries;
 183                 skb = __skb_dequeue(&ring->queue);
 184                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 185                                  skb->len, PCI_DMA_TODEVICE);
 186
 187                 control = *((struct ieee80211_tx_control **)skb->cb);
 188                 if (control)
 189                         memcpy(&status.control, control, sizeof(*control));
 190                 kfree(control);
 191
 192                 if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
 193                         if (flags & RTL8180_TX_DESC_FLAG_TX_OK)
 194                                 status.flags = IEEE80211_TX_STATUS_ACK;
 195                         else
 196                                 status.excessive_retries = 1;
 197                 }
 198                 status.retry_count = flags & 0xFF;
 199
 200                 ieee80211_tx_status_irqsafe(dev, skb, &status);
 201                 if (ring->entries - skb_queue_len(&ring->queue) == 2)
 202                         ieee80211_wake_queue(dev, prio);
 203         }
 204 }
 205
 206 static irqreturn_t rtl8180_interrupt(int irq, void *dev_id)
 207 {
 208         struct ieee80211_hw *dev = dev_id;
 209         struct rtl8180_priv *priv = dev->priv;
 210         u16 reg;
 211
 212         spin_lock(&priv->lock);
 213         reg = rtl818x_ioread16(priv, &priv->map->INT_STATUS);
 214         if (unlikely(reg == 0xFFFF)) {
 215                 spin_unlock(&priv->lock);
 216                 return IRQ_HANDLED;
 217         }
 218
 219         rtl818x_iowrite16(priv, &priv->map->INT_STATUS, reg);
 220
 221         if (reg & (RTL818X_INT_TXB_OK | RTL818X_INT_TXB_ERR))
 222                 rtl8180_handle_tx(dev, 3);
 223
 224         if (reg & (RTL818X_INT_TXH_OK | RTL818X_INT_TXH_ERR))
 225                 rtl8180_handle_tx(dev, 2);
 226
 227         if (reg & (RTL818X_INT_TXN_OK | RTL818X_INT_TXN_ERR))
 228                 rtl8180_handle_tx(dev, 1);
 229
 230         if (reg & (RTL818X_INT_TXL_OK | RTL818X_INT_TXL_ERR))
 231                 rtl8180_handle_tx(dev, 0);
 232
 233         if (reg & (RTL818X_INT_RX_OK | RTL818X_INT_RX_ERR))
 234                 rtl8180_handle_rx(dev);
 235
 236         spin_unlock(&priv->lock);
 237
 238         return IRQ_HANDLED;
 239 }
 240
 241 static int rtl8180_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
 242                       struct ieee80211_tx_control *control)
 243 {
 244         struct rtl8180_priv *priv = dev->priv;
 245         struct rtl8180_tx_ring *ring;
 246         struct rtl8180_tx_desc *entry;
 247         unsigned long flags;
 248         unsigned int idx, prio;
 249         dma_addr_t mapping;
 250         u32 tx_flags;
 251         u16 plcp_len = 0;
 252         __le16 rts_duration = 0;
 253
 254         prio = control->queue;
 255         ring = &priv->tx_ring[prio];
 256
 257         mapping = pci_map_single(priv->pdev, skb->data,
 258                                  skb->len, PCI_DMA_TODEVICE);
 259
 260         tx_flags = RTL8180_TX_DESC_FLAG_OWN | RTL8180_TX_DESC_FLAG_FS |
 261                    RTL8180_TX_DESC_FLAG_LS |
 262                    (ieee80211_get_tx_rate(dev, control)->hw_value << 24) |
 263                    skb->len;
 264
 265         if (priv->r8185)
 266                 tx_flags |= RTL8180_TX_DESC_FLAG_DMA |
 267                             RTL8180_TX_DESC_FLAG_NO_ENC;
 268
 269         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
 270                 tx_flags |= RTL8180_TX_DESC_FLAG_RTS;
 271                 tx_flags |= ieee80211_get_rts_cts_rate(dev, control)->hw_value << 19;
 272         } else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
 273                 tx_flags |= RTL8180_TX_DESC_FLAG_CTS;
 274                 tx_flags |= ieee80211_get_rts_cts_rate(dev, control)->hw_value << 19;
 275         }
 276
 277         *((struct ieee80211_tx_control **) skb->cb) =
 278                 kmemdup(control, sizeof(*control), GFP_ATOMIC);
 279
 280         if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
 281                 rts_duration = ieee80211_rts_duration(dev, priv->vif, skb->len,
 282                                                       control);
 283
 284         if (!priv->r8185) {
 285                 unsigned int remainder;
 286
 287                 plcp_len = DIV_ROUND_UP(16 * (skb->len + 4),
 288                                 (ieee80211_get_tx_rate(dev, control)->bitrate * 2) / 10);
 289                 remainder = (16 * (skb->len + 4)) %
 290                             ((ieee80211_get_tx_rate(dev, control)->bitrate * 2) / 10);
 291                 if (remainder > 0 && remainder <= 6)
 292                         plcp_len |= 1 << 15;
 293         }
 294
 295         spin_lock_irqsave(&priv->lock, flags);
 296         idx = (ring->idx + skb_queue_len(&ring->queue)) % ring->entries;
 297         entry = &ring->desc[idx];
 298
 299         entry->rts_duration = rts_duration;
 300         entry->plcp_len = cpu_to_le16(plcp_len);
 301         entry->tx_buf = cpu_to_le32(mapping);
 302         entry->frame_len = cpu_to_le32(skb->len);
 303         entry->flags2 = control->alt_retry_rate_idx >= 0 ?
 304                 ieee80211_get_alt_retry_rate(dev, control)->bitrate << 4 : 0;
 305         entry->retry_limit = control->retry_limit;
 306         entry->flags = cpu_to_le32(tx_flags);
 307         __skb_queue_tail(&ring->queue, skb);
 308         if (ring->entries - skb_queue_len(&ring->queue) < 2)
 309                 ieee80211_stop_queue(dev, control->queue);
 310         spin_unlock_irqrestore(&priv->lock, flags);
 311
 312         rtl818x_iowrite8(priv, &priv->map->TX_DMA_POLLING, (1 << (prio + 4)));
 313
 314         return 0;
 315 }
 316
 317 void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam)
 318 {
 319         u8 reg;
 320
 321         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 322         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 323         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 324                  reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 325         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 326         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 327                  reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 328         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 329 }
 330
 331 static int rtl8180_init_hw(struct ieee80211_hw *dev)
 332 {
 333         struct rtl8180_priv *priv = dev->priv;
 334         u16 reg;
 335
 336         rtl818x_iowrite8(priv, &priv->map->CMD, 0);
 337         rtl818x_ioread8(priv, &priv->map->CMD);
 338         msleep(10);
 339
 340         /* reset */
 341         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 342         rtl818x_ioread8(priv, &priv->map->CMD);
 343
 344         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 345         reg &= (1 << 1);
 346         reg |= RTL818X_CMD_RESET;
 347         rtl818x_iowrite8(priv, &priv->map->CMD, RTL818X_CMD_RESET);
 348         rtl818x_ioread8(priv, &priv->map->CMD);
 349         msleep(200);
 350
 351         /* check success of reset */
 352         if (rtl818x_ioread8(priv, &priv->map->CMD) & RTL818X_CMD_RESET) {
 353                 printk(KERN_ERR "%s: reset timeout!\n", wiphy_name(dev->wiphy));
 354                 return -ETIMEDOUT;
 355         }
 356
 357         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 358         rtl818x_ioread8(priv, &priv->map->CMD);
 359         msleep(200);
 360
 361         if (rtl818x_ioread8(priv, &priv->map->CONFIG3) & (1 << 3)) {
 362                 /* For cardbus */
 363                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 364                 reg |= 1 << 1;
 365                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 366                 reg = rtl818x_ioread16(priv, &priv->map->FEMR);
 367                 reg |= (1 << 15) | (1 << 14) | (1 << 4);
 368                 rtl818x_iowrite16(priv, &priv->map->FEMR, reg);
 369         }
 370
 371         rtl818x_iowrite8(priv, &priv->map->MSR, 0);
 372
 373         if (!priv->r8185)
 374                 rtl8180_set_anaparam(priv, priv->anaparam);
 375
 376         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 377         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 378         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 379         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 380         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 381
 382         /* TODO: necessary? specs indicate not */
 383         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 384         reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 385         rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg & ~(1 << 3));
 386         if (priv->r8185) {
 387                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG2);
 388                 rtl818x_iowrite8(priv, &priv->map->CONFIG2, reg | (1 << 4));
 389         }
 390         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 391
 392         /* TODO: set CONFIG5 for calibrating AGC on rtl8180 + philips radio? */
 393
 394         /* TODO: turn off hw wep on rtl8180 */
 395
 396         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 397
 398         if (priv->r8185) {
 399                 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 400                 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 401                 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 402
 403                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 404
 405                 /* TODO: set ClkRun enable? necessary? */
 406                 reg = rtl818x_ioread8(priv, &priv->map->GP_ENABLE);
 407                 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, reg & ~(1 << 6));
 408                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 409                 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 410                 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | (1 << 2));
 411                 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 412         } else {
 413                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x1);
 414                 rtl818x_iowrite8(priv, &priv->map->SECURITY, 0);
 415
 416                 rtl818x_iowrite8(priv, &priv->map->PHY_DELAY, 0x6);
 417                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 0x4C);
 418         }
 419
 420         priv->rf->init(dev);
 421         if (priv->r8185)
 422                 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 423         return 0;
 424 }
 425
 426 static int rtl8180_init_rx_ring(struct ieee80211_hw *dev)
 427 {
 428         struct rtl8180_priv *priv = dev->priv;
 429         struct rtl8180_rx_desc *entry;
 430         int i;
 431
 432         priv->rx_ring = pci_alloc_consistent(priv->pdev,
 433                                              sizeof(*priv->rx_ring) * 32,
 434                                              &priv->rx_ring_dma);
 435
 436         if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) {
 437                 printk(KERN_ERR "%s: Cannot allocate RX ring\n",
 438                        wiphy_name(dev->wiphy));
 439                 return -ENOMEM;
 440         }
 441
 442         memset(priv->rx_ring, 0, sizeof(*priv->rx_ring) * 32);
 443         priv->rx_idx = 0;
 444
 445         for (i = 0; i < 32; i++) {
 446                 struct sk_buff *skb = dev_alloc_skb(MAX_RX_SIZE);
 447                 dma_addr_t *mapping;
 448                 entry = &priv->rx_ring[i];
 449                 if (!skb)
 450                         return 0;
 451
 452                 priv->rx_buf[i] = skb;
 453                 mapping = (dma_addr_t *)skb->cb;
 454                 *mapping = pci_map_single(priv->pdev, skb_tail_pointer(skb),
 455                                           MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 456                 entry->rx_buf = cpu_to_le32(*mapping);
 457                 entry->flags = cpu_to_le32(RTL8180_RX_DESC_FLAG_OWN |
 458                                            MAX_RX_SIZE);
 459         }
 460         entry->flags |= cpu_to_le32(RTL8180_RX_DESC_FLAG_EOR);
 461         return 0;
 462 }
 463
 464 static void rtl8180_free_rx_ring(struct ieee80211_hw *dev)
 465 {
 466         struct rtl8180_priv *priv = dev->priv;
 467         int i;
 468
 469         for (i = 0; i < 32; i++) {
 470                 struct sk_buff *skb = priv->rx_buf[i];
 471                 if (!skb)
 472                         continue;
 473
 474                 pci_unmap_single(priv->pdev,
 475                                  *((dma_addr_t *)skb->cb),
 476                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 477                 kfree_skb(skb);
 478         }
 479
 480         pci_free_consistent(priv->pdev, sizeof(*priv->rx_ring) * 32,
 481                             priv->rx_ring, priv->rx_ring_dma);
 482         priv->rx_ring = NULL;
 483 }
 484
 485 static int rtl8180_init_tx_ring(struct ieee80211_hw *dev,
 486                                 unsigned int prio, unsigned int entries)
 487 {
 488         struct rtl8180_priv *priv = dev->priv;
 489         struct rtl8180_tx_desc *ring;
 490         dma_addr_t dma;
 491         int i;
 492
 493         ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma);
 494         if (!ring || (unsigned long)ring & 0xFF) {
 495                 printk(KERN_ERR "%s: Cannot allocate TX ring (prio = %d)\n",
 496                        wiphy_name(dev->wiphy), prio);
 497                 return -ENOMEM;
 498         }
 499
 500         memset(ring, 0, sizeof(*ring)*entries);
 501         priv->tx_ring[prio].desc = ring;
 502         priv->tx_ring[prio].dma = dma;
 503         priv->tx_ring[prio].idx = 0;
 504         priv->tx_ring[prio].entries = entries;
 505         skb_queue_head_init(&priv->tx_ring[prio].queue);
 506
 507         for (i = 0; i < entries; i++)
 508                 ring[i].next_tx_desc =
 509                         cpu_to_le32((u32)dma + ((i + 1) % entries) * sizeof(*ring));
 510
 511         return 0;
 512 }
 513
 514 static void rtl8180_free_tx_ring(struct ieee80211_hw *dev, unsigned int prio)
 515 {
 516         struct rtl8180_priv *priv = dev->priv;
 517         struct rtl8180_tx_ring *ring = &priv->tx_ring[prio];
 518
 519         while (skb_queue_len(&ring->queue)) {
 520                 struct rtl8180_tx_desc *entry = &ring->desc[ring->idx];
 521                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
 522
 523                 pci_unmap_single(priv->pdev, le32_to_cpu(entry->tx_buf),
 524                                  skb->len, PCI_DMA_TODEVICE);
 525                 kfree(*((struct ieee80211_tx_control **) skb->cb));
 526                 kfree_skb(skb);
 527                 ring->idx = (ring->idx + 1) % ring->entries;
 528         }
 529
 530         pci_free_consistent(priv->pdev, sizeof(*ring->desc)*ring->entries,
 531                             ring->desc, ring->dma);
 532         ring->desc = NULL;
 533 }
 534
 535 static int rtl8180_start(struct ieee80211_hw *dev)
 536 {
 537         struct rtl8180_priv *priv = dev->priv;
 538         int ret, i;
 539         u32 reg;
 540
 541         ret = rtl8180_init_rx_ring(dev);
 542         if (ret)
 543                 return ret;
 544
 545         for (i = 0; i < 4; i++)
 546                 if ((ret = rtl8180_init_tx_ring(dev, i, 16)))
 547                         goto err_free_rings;
 548
 549         ret = rtl8180_init_hw(dev);
 550         if (ret)
 551                 goto err_free_rings;
 552
 553         rtl818x_iowrite32(priv, &priv->map->RDSAR, priv->rx_ring_dma);
 554         rtl818x_iowrite32(priv, &priv->map->TBDA, priv->tx_ring[3].dma);
 555         rtl818x_iowrite32(priv, &priv->map->THPDA, priv->tx_ring[2].dma);
 556         rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
 557         rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
 558
 559         ret = request_irq(priv->pdev->irq, &rtl8180_interrupt,
 560                           IRQF_SHARED, KBUILD_MODNAME, dev);
 561         if (ret) {
 562                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 563                        wiphy_name(dev->wiphy));
 564                 goto err_free_rings;
 565         }
 566
 567         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 568
 569         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 570         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 571
 572         reg = RTL818X_RX_CONF_ONLYERLPKT |
 573               RTL818X_RX_CONF_RX_AUTORESETPHY |
 574               RTL818X_RX_CONF_MGMT |
 575               RTL818X_RX_CONF_DATA |
 576               (7 << 8 /* MAX RX DMA */) |
 577               RTL818X_RX_CONF_BROADCAST |
 578               RTL818X_RX_CONF_NICMAC;
 579
 580         if (priv->r8185)
 581                 reg |= RTL818X_RX_CONF_CSDM1 | RTL818X_RX_CONF_CSDM2;
 582         else {
 583                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE1)
 584                         ? RTL818X_RX_CONF_CSDM1 : 0;
 585                 reg |= (priv->rfparam & RF_PARAM_CARRIERSENSE2)
 586                         ? RTL818X_RX_CONF_CSDM2 : 0;
 587         }
 588
 589         priv->rx_conf = reg;
 590         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 591
 592         if (priv->r8185) {
 593                 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 594                 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 595                 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 596                 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 597
 598                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 599                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 600                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 601                 reg |=  RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 602                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 603
 604                 /* disable early TX */
 605                 rtl818x_iowrite8(priv, (u8 __iomem *)priv->map + 0xec, 0x3f);
 606         }
 607
 608         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 609         reg |= (6 << 21 /* MAX TX DMA */) |
 610                RTL818X_TX_CONF_NO_ICV;
 611
 612         if (priv->r8185)
 613                 reg &= ~RTL818X_TX_CONF_PROBE_DTS;
 614         else
 615                 reg &= ~RTL818X_TX_CONF_HW_SEQNUM;
 616
 617         /* different meaning, same value on both rtl8185 and rtl8180 */
 618         reg &= ~RTL818X_TX_CONF_SAT_HWPLCP;
 619
 620         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 621
 622         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 623         reg |= RTL818X_CMD_RX_ENABLE;
 624         reg |= RTL818X_CMD_TX_ENABLE;
 625         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 626
 627         priv->mode = IEEE80211_IF_TYPE_MNTR;
 628         return 0;
 629
 630  err_free_rings:
 631         rtl8180_free_rx_ring(dev);
 632         for (i = 0; i < 4; i++)
 633                 if (priv->tx_ring[i].desc)
 634                         rtl8180_free_tx_ring(dev, i);
 635
 636         return ret;
 637 }
 638
 639 static void rtl8180_stop(struct ieee80211_hw *dev)
 640 {
 641         struct rtl8180_priv *priv = dev->priv;
 642         u8 reg;
 643         int i;
 644
 645         priv->mode = IEEE80211_IF_TYPE_INVALID;
 646
 647         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 648
 649         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 650         reg &= ~RTL818X_CMD_TX_ENABLE;
 651         reg &= ~RTL818X_CMD_RX_ENABLE;
 652         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 653
 654         priv->rf->stop(dev);
 655
 656         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 657         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 658         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 659         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 660
 661         free_irq(priv->pdev->irq, dev);
 662
 663         rtl8180_free_rx_ring(dev);
 664         for (i = 0; i < 4; i++)
 665                 rtl8180_free_tx_ring(dev, i);
 666 }
 667
 668 static int rtl8180_add_interface(struct ieee80211_hw *dev,
 669                                  struct ieee80211_if_init_conf *conf)
 670 {
 671         struct rtl8180_priv *priv = dev->priv;
 672
 673         if (priv->mode != IEEE80211_IF_TYPE_MNTR)
 674                 return -EOPNOTSUPP;
 675
 676         switch (conf->type) {
 677         case IEEE80211_IF_TYPE_STA:
 678                 priv->mode = conf->type;
 679                 break;
 680         default:
 681                 return -EOPNOTSUPP;
 682         }
 683
 684         priv->vif = conf->vif;
 685
 686         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 687         rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
 688                           le32_to_cpu(*(__le32 *)conf->mac_addr));
 689         rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
 690                           le16_to_cpu(*(__le16 *)(conf->mac_addr + 4)));
 691         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 692
 693         return 0;
 694 }
 695
 696 static void rtl8180_remove_interface(struct ieee80211_hw *dev,
 697                                      struct ieee80211_if_init_conf *conf)
 698 {
 699         struct rtl8180_priv *priv = dev->priv;
 700         priv->mode = IEEE80211_IF_TYPE_MNTR;
 701         priv->vif = NULL;
 702 }
 703
 704 static int rtl8180_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 705 {
 706         struct rtl8180_priv *priv = dev->priv;
 707
 708         priv->rf->set_chan(dev, conf);
 709
 710         return 0;
 711 }
 712
 713 static int rtl8180_config_interface(struct ieee80211_hw *dev,
 714                                     struct ieee80211_vif *vif,
 715                                     struct ieee80211_if_conf *conf)
 716 {
 717         struct rtl8180_priv *priv = dev->priv;
 718         int i;
 719
 720         for (i = 0; i < ETH_ALEN; i++)
 721                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
 722
 723         if (is_valid_ether_addr(conf->bssid))
 724                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
 725         else
 726                 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
 727
 728         return 0;
 729 }
 730
 731 static void rtl8180_configure_filter(struct ieee80211_hw *dev,
 732                                      unsigned int changed_flags,
 733                                      unsigned int *total_flags,
 734                                      int mc_count, struct dev_addr_list *mclist)
 735 {
 736         struct rtl8180_priv *priv = dev->priv;
 737
 738         if (changed_flags & FIF_FCSFAIL)
 739                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 740         if (changed_flags & FIF_CONTROL)
 741                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 742         if (changed_flags & FIF_OTHER_BSS)
 743                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 744         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
 745                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 746         else
 747                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 748
 749         *total_flags = 0;
 750
 751         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 752                 *total_flags |= FIF_FCSFAIL;
 753         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 754                 *total_flags |= FIF_CONTROL;
 755         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 756                 *total_flags |= FIF_OTHER_BSS;
 757         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 758                 *total_flags |= FIF_ALLMULTI;
 759
 760         rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
 761 }
 762
 763 static const struct ieee80211_ops rtl8180_ops = {
 764         .tx                     = rtl8180_tx,
 765         .start                  = rtl8180_start,
 766         .stop                   = rtl8180_stop,
 767         .add_interface          = rtl8180_add_interface,
 768         .remove_interface       = rtl8180_remove_interface,
 769         .config                 = rtl8180_config,
 770         .config_interface       = rtl8180_config_interface,
 771         .configure_filter       = rtl8180_configure_filter,
 772 };
 773
 774 static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 775 {
 776         struct ieee80211_hw *dev = eeprom->data;
 777         struct rtl8180_priv *priv = dev->priv;
 778         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 779
 780         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 781         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 782         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 783         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 784 }
 785
 786 static void rtl8180_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 787 {
 788         struct ieee80211_hw *dev = eeprom->data;
 789         struct rtl8180_priv *priv = dev->priv;
 790         u8 reg = 2 << 6;
 791
 792         if (eeprom->reg_data_in)
 793                 reg |= RTL818X_EEPROM_CMD_WRITE;
 794         if (eeprom->reg_data_out)
 795                 reg |= RTL818X_EEPROM_CMD_READ;
 796         if (eeprom->reg_data_clock)
 797                 reg |= RTL818X_EEPROM_CMD_CK;
 798         if (eeprom->reg_chip_select)
 799                 reg |= RTL818X_EEPROM_CMD_CS;
 800
 801         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
 802         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 803         udelay(10);
 804 }
 805
 806 static int __devinit rtl8180_probe(struct pci_dev *pdev,
 807                                    const struct pci_device_id *id)
 808 {
 809         struct ieee80211_hw *dev;
 810         struct rtl8180_priv *priv;
 811         unsigned long mem_addr, mem_len;
 812         unsigned int io_addr, io_len;
 813         int err, i;
 814         struct eeprom_93cx6 eeprom;
 815         const char *chip_name, *rf_name = NULL;
 816         u32 reg;
 817         u16 eeprom_val;
 818         DECLARE_MAC_BUF(mac);
 819
 820         err = pci_enable_device(pdev);
 821         if (err) {
 822                 printk(KERN_ERR "%s (rtl8180): Cannot enable new PCI device\n",
 823                        pci_name(pdev));
 824                 return err;
 825         }
 826
 827         err = pci_request_regions(pdev, KBUILD_MODNAME);
 828         if (err) {
 829                 printk(KERN_ERR "%s (rtl8180): Cannot obtain PCI resources\n",
 830                        pci_name(pdev));
 831                 return err;
 832         }
 833
 834         io_addr = pci_resource_start(pdev, 0);
 835         io_len = pci_resource_len(pdev, 0);
 836         mem_addr = pci_resource_start(pdev, 1);
 837         mem_len = pci_resource_len(pdev, 1);
 838
 839         if (mem_len < sizeof(struct rtl818x_csr) ||
 840             io_len < sizeof(struct rtl818x_csr)) {
 841                 printk(KERN_ERR "%s (rtl8180): Too short PCI resources\n",
 842                        pci_name(pdev));
 843                 err = -ENOMEM;
 844                 goto err_free_reg;
 845         }
 846
 847         if ((err = pci_set_dma_mask(pdev, 0xFFFFFF00ULL)) ||
 848             (err = pci_set_consistent_dma_mask(pdev, 0xFFFFFF00ULL))) {
 849                 printk(KERN_ERR "%s (rtl8180): No suitable DMA available\n",
 850                        pci_name(pdev));
 851                 goto err_free_reg;
 852         }
 853
 854         pci_set_master(pdev);
 855
 856         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8180_ops);
 857         if (!dev) {
 858                 printk(KERN_ERR "%s (rtl8180): ieee80211 alloc failed\n",
 859                        pci_name(pdev));
 860                 err = -ENOMEM;
 861                 goto err_free_reg;
 862         }
 863
 864         priv = dev->priv;
 865         priv->pdev = pdev;
 866
 867         SET_IEEE80211_DEV(dev, &pdev->dev);
 868         pci_set_drvdata(pdev, dev);
 869
 870         priv->map = pci_iomap(pdev, 1, mem_len);
 871         if (!priv->map)
 872                 priv->map = pci_iomap(pdev, 0, io_len);
 873
 874         if (!priv->map) {
 875                 printk(KERN_ERR "%s (rtl8180): Cannot map device memory\n",
 876                        pci_name(pdev));
 877                 goto err_free_dev;
 878         }
 879
 880         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
 881         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
 882
 883         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
 884         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
 885
 886         priv->band.band = IEEE80211_BAND_2GHZ;
 887         priv->band.channels = priv->channels;
 888         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
 889         priv->band.bitrates = priv->rates;
 890         priv->band.n_bitrates = 4;
 891         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
 892
 893         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
 894                      IEEE80211_HW_RX_INCLUDES_FCS |
 895                      IEEE80211_HW_SIGNAL_UNSPEC;
 896         dev->queues = 1;
 897         dev->max_signal = 65;
 898
 899         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 900         reg &= RTL818X_TX_CONF_HWVER_MASK;
 901         switch (reg) {
 902         case RTL818X_TX_CONF_R8180_ABCD:
 903                 chip_name = "RTL8180";
 904                 break;
 905         case RTL818X_TX_CONF_R8180_F:
 906                 chip_name = "RTL8180vF";
 907                 break;
 908         case RTL818X_TX_CONF_R8185_ABC:
 909                 chip_name = "RTL8185";
 910                 break;
 911         case RTL818X_TX_CONF_R8185_D:
 912                 chip_name = "RTL8185vD";
 913                 break;
 914         default:
 915                 printk(KERN_ERR "%s (rtl8180): Unknown chip! (0x%x)\n",
 916                        pci_name(pdev), reg >> 25);
 917                 goto err_iounmap;
 918         }
 919
 920         priv->r8185 = reg & RTL818X_TX_CONF_R8185_ABC;
 921         if (priv->r8185) {
 922                 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
 923                 pci_try_set_mwi(pdev);
 924         }
 925
 926         eeprom.data = dev;
 927         eeprom.register_read = rtl8180_eeprom_register_read;
 928         eeprom.register_write = rtl8180_eeprom_register_write;
 929         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
 930                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
 931         else
 932                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
 933
 934         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_PROGRAM);
 935         rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 936         udelay(10);
 937
 938         eeprom_93cx6_read(&eeprom, 0x06, &eeprom_val);
 939         eeprom_val &= 0xFF;
 940         switch (eeprom_val) {
 941         case 1: rf_name = "Intersil";
 942                 break;
 943         case 2: rf_name = "RFMD";
 944                 break;
 945         case 3: priv->rf = &sa2400_rf_ops;
 946                 break;
 947         case 4: priv->rf = &max2820_rf_ops;
 948                 break;
 949         case 5: priv->rf = &grf5101_rf_ops;
 950                 break;
 951         case 9: priv->rf = rtl8180_detect_rf(dev);
 952                 break;
 953         case 10:
 954                 rf_name = "RTL8255";
 955                 break;
 956         default:
 957                 printk(KERN_ERR "%s (rtl8180): Unknown RF! (0x%x)\n",
 958                        pci_name(pdev), eeprom_val);
 959                 goto err_iounmap;
 960         }
 961
 962         if (!priv->rf) {
 963                 printk(KERN_ERR "%s (rtl8180): %s RF frontend not supported!\n",
 964                        pci_name(pdev), rf_name);
 965                 goto err_iounmap;
 966         }
 967
 968         eeprom_93cx6_read(&eeprom, 0x17, &eeprom_val);
 969         priv->csthreshold = eeprom_val >> 8;
 970         if (!priv->r8185) {
 971                 __le32 anaparam;
 972                 eeprom_93cx6_multiread(&eeprom, 0xD, (__le16 *)&anaparam, 2);
 973                 priv->anaparam = le32_to_cpu(anaparam);
 974                 eeprom_93cx6_read(&eeprom, 0x19, &priv->rfparam);
 975         }
 976
 977         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)dev->wiphy->perm_addr, 3);
 978         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
 979                 printk(KERN_WARNING "%s (rtl8180): Invalid hwaddr! Using"
 980                        " randomly generated MAC addr\n", pci_name(pdev));
 981                 random_ether_addr(dev->wiphy->perm_addr);
 982         }
 983
 984         /* CCK TX power */
 985         for (i = 0; i < 14; i += 2) {
 986                 u16 txpwr;
 987                 eeprom_93cx6_read(&eeprom, 0x10 + (i >> 1), &txpwr);
 988                 priv->channels[i].hw_value = txpwr & 0xFF;
 989                 priv->channels[i + 1].hw_value = txpwr >> 8;
 990         }
 991
 992         /* OFDM TX power */
 993         if (priv->r8185) {
 994                 for (i = 0; i < 14; i += 2) {
 995                         u16 txpwr;
 996                         eeprom_93cx6_read(&eeprom, 0x20 + (i >> 1), &txpwr);
 997                         priv->channels[i].hw_value |= (txpwr & 0xFF) << 8;
 998                         priv->channels[i + 1].hw_value |= txpwr & 0xFF00;
 999                 }
1000         }
1001
1002         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1003
1004         spin_lock_init(&priv->lock);
1005
1006         err = ieee80211_register_hw(dev);
1007         if (err) {
1008                 printk(KERN_ERR "%s (rtl8180): Cannot register device\n",
1009                        pci_name(pdev));
1010                 goto err_iounmap;
1011         }
1012
1013         printk(KERN_INFO "%s: hwaddr %s, %s + %s\n",
1014                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
1015                chip_name, priv->rf->name);
1016
1017         return 0;
1018
1019  err_iounmap:
1020         iounmap(priv->map);
1021
1022  err_free_dev:
1023         pci_set_drvdata(pdev, NULL);
1024         ieee80211_free_hw(dev);
1025
1026  err_free_reg:
1027         pci_release_regions(pdev);
1028         pci_disable_device(pdev);
1029         return err;
1030 }
1031
1032 static void __devexit rtl8180_remove(struct pci_dev *pdev)
1033 {
1034         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
1035         struct rtl8180_priv *priv;
1036
1037         if (!dev)
1038                 return;
1039
1040         ieee80211_unregister_hw(dev);
1041
1042         priv = dev->priv;
1043
1044         pci_iounmap(pdev, priv->map);
1045         pci_release_regions(pdev);
1046         pci_disable_device(pdev);
1047         ieee80211_free_hw(dev);
1048 }
1049
1050 #ifdef CONFIG_PM
1051 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
1052 {
1053         pci_save_state(pdev);
1054         pci_set_power_state(pdev, pci_choose_state(pdev, state));
1055         return 0;
1056 }
1057
1058 static int rtl8180_resume(struct pci_dev *pdev)
1059 {
1060         pci_set_power_state(pdev, PCI_D0);
1061         pci_restore_state(pdev);
1062         return 0;
1063 }
1064
1065 #endif /* CONFIG_PM */
1066
1067 static struct pci_driver rtl8180_driver = {
1068         .name           = KBUILD_MODNAME,
1069         .id_table       = rtl8180_table,
1070         .probe          = rtl8180_probe,
1071         .remove         = __devexit_p(rtl8180_remove),
1072 #ifdef CONFIG_PM
1073         .suspend        = rtl8180_suspend,
1074         .resume         = rtl8180_resume,
1075 #endif /* CONFIG_PM */
1076 };
1077
1078 static int __init rtl8180_init(void)
1079 {
1080         return pci_register_driver(&rtl8180_driver);
1081 }
1082
1083 static void __exit rtl8180_exit(void)
1084 {
1085         pci_unregister_driver(&rtl8180_driver);
1086 }
1087
1088 module_init(rtl8180_init);
1089 module_exit(rtl8180_exit);