drivers/net/wireless/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "core.h"
  31 #include "wifi.h"
  32 #include "pci.h"
  33 #include "base.h"
  34 #include "ps.h"
  35 #include "efuse.h"
  36
  37 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  38         PCI_VENDOR_ID_INTEL,
  39         PCI_VENDOR_ID_ATI,
  40         PCI_VENDOR_ID_AMD,
  41         PCI_VENDOR_ID_SI
  42 };
  43
  44 static const u8 ac_to_hwq[] = {
  45         VO_QUEUE,
  46         VI_QUEUE,
  47         BE_QUEUE,
  48         BK_QUEUE
  49 };
  50
  51 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  52                        struct sk_buff *skb)
  53 {
  54         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  55         __le16 fc = rtl_get_fc(skb);
  56         u8 queue_index = skb_get_queue_mapping(skb);
  57
  58         if (unlikely(ieee80211_is_beacon(fc)))
  59                 return BEACON_QUEUE;
  60         if (ieee80211_is_mgmt(fc))
  61                 return MGNT_QUEUE;
  62         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  63                 if (ieee80211_is_nullfunc(fc))
  64                         return HIGH_QUEUE;
  65
  66         return ac_to_hwq[queue_index];
  67 }
  68
  69 /* Update PCI dependent default settings*/
  70 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  71 {
  72         struct rtl_priv *rtlpriv = rtl_priv(hw);
  73         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  74         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  75         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  76         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  77         u8 init_aspm;
  78
  79         ppsc->reg_rfps_level = 0;
  80         ppsc->support_aspm = 0;
  81
  82         /*Update PCI ASPM setting */
  83         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  84         switch (rtlpci->const_pci_aspm) {
  85         case 0:
  86                 /*No ASPM */
  87                 break;
  88
  89         case 1:
  90                 /*ASPM dynamically enabled/disable. */
  91                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  92                 break;
  93
  94         case 2:
  95                 /*ASPM with Clock Req dynamically enabled/disable. */
  96                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
  97                                          RT_RF_OFF_LEVL_CLK_REQ);
  98                 break;
  99
 100         case 3:
 101                 /*
 102                  * Always enable ASPM and Clock Req
 103                  * from initialization to halt.
 104                  * */
 105                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 106                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 107                                          RT_RF_OFF_LEVL_CLK_REQ);
 108                 break;
 109
 110         case 4:
 111                 /*
 112                  * Always enable ASPM without Clock Req
 113                  * from initialization to halt.
 114                  * */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 116                                           RT_RF_OFF_LEVL_CLK_REQ);
 117                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 118                 break;
 119         }
 120
 121         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 122
 123         /*Update Radio OFF setting */
 124         switch (rtlpci->const_hwsw_rfoff_d3) {
 125         case 1:
 126                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 127                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 128                 break;
 129
 130         case 2:
 131                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 132                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 133                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 134                 break;
 135
 136         case 3:
 137                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 138                 break;
 139         }
 140
 141         /*Set HW definition to determine if it supports ASPM. */
 142         switch (rtlpci->const_support_pciaspm) {
 143         case 0:{
 144                         /*Not support ASPM. */
 145                         bool support_aspm = false;
 146                         ppsc->support_aspm = support_aspm;
 147                         break;
 148                 }
 149         case 1:{
 150                         /*Support ASPM. */
 151                         bool support_aspm = true;
 152                         bool support_backdoor = true;
 153                         ppsc->support_aspm = support_aspm;
 154
 155                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 156                            !priv->ndis_adapter.amd_l1_patch)
 157                            support_backdoor = false; */
 158
 159                         ppsc->support_backdoor = support_backdoor;
 160
 161                         break;
 162                 }
 163         case 2:
 164                 /*ASPM value set by chipset. */
 165                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 166                         bool support_aspm = true;
 167                         ppsc->support_aspm = support_aspm;
 168                 }
 169                 break;
 170         default:
 171                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 172                          ("switch case not process\n"));
 173                 break;
 174         }
 175
 176         /* toshiba aspm issue, toshiba will set aspm selfly
 177          * so we should not set aspm in driver */
 178         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 179         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 180                 init_aspm == 0x43)
 181                 ppsc->support_aspm = false;
 182 }
 183
 184 static bool _rtl_pci_platform_switch_device_pci_aspm(
 185                         struct ieee80211_hw *hw,
 186                         u8 value)
 187 {
 188         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 189         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 190
 191         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 192                 value |= 0x40;
 193
 194         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 195
 196         return false;
 197 }
 198
 199 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 200 static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 201 {
 202         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 203         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 204
 205         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 206
 207         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 208                 udelay(100);
 209
 210         return true;
 211 }
 212
 213 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 214 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 215 {
 216         struct rtl_priv *rtlpriv = rtl_priv(hw);
 217         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 218         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 219         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 220         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 221         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 222         /*Retrieve original configuration settings. */
 223         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 224         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 225                                 pcibridge_linkctrlreg;
 226         u16 aspmlevel = 0;
 227         u8 tmp_u1b = 0;
 228
 229         if (!ppsc->support_aspm)
 230                 return;
 231
 232         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 233                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 234                          ("PCI(Bridge) UNKNOWN.\n"));
 235
 236                 return;
 237         }
 238
 239         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 240                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 241                 _rtl_pci_switch_clk_req(hw, 0x0);
 242         }
 243
 244         /*for promising device will in L0 state after an I/O. */
 245         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 246
 247         /*Set corresponding value. */
 248         aspmlevel |= BIT(0) | BIT(1);
 249         linkctrl_reg &= ~aspmlevel;
 250         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 251
 252         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 253         udelay(50);
 254
 255         /*4 Disable Pci Bridge ASPM */
 256         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 257                               pcibridge_linkctrlreg);
 258
 259         udelay(50);
 260 }
 261
 262 /*
 263  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 264  *power saving We should follow the sequence to enable
 265  *RTL8192SE first then enable Pci Bridge ASPM
 266  *or the system will show bluescreen.
 267  */
 268 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 269 {
 270         struct rtl_priv *rtlpriv = rtl_priv(hw);
 271         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 272         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 273         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 274         u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
 275         u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
 276         u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
 277         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 278         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 279         u16 aspmlevel;
 280         u8 u_pcibridge_aspmsetting;
 281         u8 u_device_aspmsetting;
 282
 283         if (!ppsc->support_aspm)
 284                 return;
 285
 286         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 287                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 288                          ("PCI(Bridge) UNKNOWN.\n"));
 289                 return;
 290         }
 291
 292         /*4 Enable Pci Bridge ASPM */
 293
 294         u_pcibridge_aspmsetting =
 295             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 296             rtlpci->const_hostpci_aspm_setting;
 297
 298         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 299                 u_pcibridge_aspmsetting &= ~BIT(0);
 300
 301         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 302                               u_pcibridge_aspmsetting);
 303
 304         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 305                  ("PlatformEnableASPM():PciBridge busnumber[%x], "
 306                   "DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
 307                   pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
 308                   (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 309                   u_pcibridge_aspmsetting));
 310
 311         udelay(50);
 312
 313         /*Get ASPM level (with/without Clock Req) */
 314         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 315         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 316
 317         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 318         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 319
 320         u_device_aspmsetting |= aspmlevel;
 321
 322         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 323
 324         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 325                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 326                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 327                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 328         }
 329         udelay(100);
 330 }
 331
 332 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 333 {
 334         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 335
 336         bool status = false;
 337         u8 offset_e0;
 338         unsigned offset_e4;
 339
 340         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 341
 342         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 343
 344         if (offset_e0 == 0xA0) {
 345                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 346                 if (offset_e4 & BIT(23))
 347                         status = true;
 348         }
 349
 350         return status;
 351 }
 352
 353 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 354 {
 355         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 356         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 357         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 358         u8 linkctrl_reg;
 359         u8 num4bbytes;
 360
 361         num4bbytes = (capabilityoffset + 0x10) / 4;
 362
 363         /*Read  Link Control Register */
 364         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 365
 366         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 367 }
 368
 369 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 370                 struct ieee80211_hw *hw)
 371 {
 372         struct rtl_priv *rtlpriv = rtl_priv(hw);
 373         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 374
 375         u8 tmp;
 376         int pos;
 377         u8 linkctrl_reg;
 378
 379         /*Link Control Register */
 380         pos = pci_pcie_cap(pdev);
 381         pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
 382         pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
 383
 384         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
 385                  ("Link Control Register =%x\n",
 386                   pcipriv->ndis_adapter.linkctrl_reg));
 387
 388         pci_read_config_byte(pdev, 0x98, &tmp);
 389         tmp |= BIT(4);
 390         pci_write_config_byte(pdev, 0x98, tmp);
 391
 392         tmp = 0x17;
 393         pci_write_config_byte(pdev, 0x70f, tmp);
 394 }
 395
 396 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 397 {
 398         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 399
 400         _rtl_pci_update_default_setting(hw);
 401
 402         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 403                 /*Always enable ASPM & Clock Req. */
 404                 rtl_pci_enable_aspm(hw);
 405                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 406         }
 407
 408 }
 409
 410 static void _rtl_pci_io_handler_init(struct device *dev,
 411                                      struct ieee80211_hw *hw)
 412 {
 413         struct rtl_priv *rtlpriv = rtl_priv(hw);
 414
 415         rtlpriv->io.dev = dev;
 416
 417         rtlpriv->io.write8_async = pci_write8_async;
 418         rtlpriv->io.write16_async = pci_write16_async;
 419         rtlpriv->io.write32_async = pci_write32_async;
 420
 421         rtlpriv->io.read8_sync = pci_read8_sync;
 422         rtlpriv->io.read16_sync = pci_read16_sync;
 423         rtlpriv->io.read32_sync = pci_read32_sync;
 424
 425 }
 426
 427 static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
 428 {
 429 }
 430
 431 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 432                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 433 {
 434         struct rtl_priv *rtlpriv = rtl_priv(hw);
 435         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 436         u8 additionlen = FCS_LEN;
 437         struct sk_buff *next_skb;
 438
 439         /* here open is 4, wep/tkip is 8, aes is 12*/
 440         if (info->control.hw_key)
 441                 additionlen += info->control.hw_key->icv_len;
 442
 443         /* The most skb num is 6 */
 444         tcb_desc->empkt_num = 0;
 445         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 446         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 447                 struct ieee80211_tx_info *next_info;
 448
 449                 next_info = IEEE80211_SKB_CB(next_skb);
 450                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 451                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 452                                 next_skb->len + additionlen;
 453                         tcb_desc->empkt_num++;
 454                 } else {
 455                         break;
 456                 }
 457
 458                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 459                                       next_skb))
 460                         break;
 461
 462                 if (tcb_desc->empkt_num >= 5)
 463                         break;
 464         }
 465         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 466
 467         return true;
 468 }
 469
 470 /* just for early mode now */
 471 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 472 {
 473         struct rtl_priv *rtlpriv = rtl_priv(hw);
 474         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 475         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 476         struct sk_buff *skb = NULL;
 477         struct ieee80211_tx_info *info = NULL;
 478         int tid; /* should be int */
 479
 480         if (!rtlpriv->rtlhal.earlymode_enable)
 481                 return;
 482
 483         /* we juse use em for BE/BK/VI/VO */
 484         for (tid = 7; tid >= 0; tid--) {
 485                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(hw, tid)];
 486                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 487                 while (!mac->act_scanning &&
 488                        rtlpriv->psc.rfpwr_state == ERFON) {
 489                         struct rtl_tcb_desc tcb_desc;
 490                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 491
 492                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 493                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 494                            (ring->entries - skb_queue_len(&ring->queue) > 5)) {
 495                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 496                         } else {
 497                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 498                                 break;
 499                         }
 500                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 501
 502                         /* Some macaddr can't do early mode. like
 503                          * multicast/broadcast/no_qos data */
 504                         info = IEEE80211_SKB_CB(skb);
 505                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 506                                 _rtl_update_earlymode_info(hw, skb,
 507                                                            &tcb_desc, tid);
 508
 509                         rtlpriv->intf_ops->adapter_tx(hw, skb, &tcb_desc);
 510                 }
 511         }
 512 }
 513
 514
 515 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 516 {
 517         struct rtl_priv *rtlpriv = rtl_priv(hw);
 518         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 519
 520         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 521
 522         while (skb_queue_len(&ring->queue)) {
 523                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
 524                 struct sk_buff *skb;
 525                 struct ieee80211_tx_info *info;
 526                 __le16 fc;
 527                 u8 tid;
 528
 529                 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
 530                                                           HW_DESC_OWN);
 531
 532                 /*
 533                  *beacon packet will only use the first
 534                  *descriptor defautly,and the own may not
 535                  *be cleared by the hardware
 536                  */
 537                 if (own)
 538                         return;
 539                 ring->idx = (ring->idx + 1) % ring->entries;
 540
 541                 skb = __skb_dequeue(&ring->queue);
 542                 pci_unmap_single(rtlpci->pdev,
 543                                  rtlpriv->cfg->ops->
 544                                              get_desc((u8 *) entry, true,
 545                                                       HW_DESC_TXBUFF_ADDR),
 546                                  skb->len, PCI_DMA_TODEVICE);
 547
 548                 /* remove early mode header */
 549                 if (rtlpriv->rtlhal.earlymode_enable)
 550                         skb_pull(skb, EM_HDR_LEN);
 551
 552                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 553                          ("new ring->idx:%d, "
 554                           "free: skb_queue_len:%d, free: seq:%x\n",
 555                           ring->idx,
 556                           skb_queue_len(&ring->queue),
 557                           *(u16 *) (skb->data + 22)));
 558
 559                 if (prio == TXCMD_QUEUE) {
 560                         dev_kfree_skb(skb);
 561                         goto tx_status_ok;
 562
 563                 }
 564
 565                 /* for sw LPS, just after NULL skb send out, we can
 566                  * sure AP kown we are sleeped, our we should not let
 567                  * rf to sleep*/
 568                 fc = rtl_get_fc(skb);
 569                 if (ieee80211_is_nullfunc(fc)) {
 570                         if (ieee80211_has_pm(fc)) {
 571                                 rtlpriv->mac80211.offchan_delay = true;
 572                                 rtlpriv->psc.state_inap = 1;
 573                         } else {
 574                                 rtlpriv->psc.state_inap = 0;
 575                         }
 576                 }
 577
 578                 /* update tid tx pkt num */
 579                 tid = rtl_get_tid(skb);
 580                 if (tid <= 7)
 581                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 582
 583                 info = IEEE80211_SKB_CB(skb);
 584                 ieee80211_tx_info_clear_status(info);
 585
 586                 info->flags |= IEEE80211_TX_STAT_ACK;
 587                 /*info->status.rates[0].count = 1; */
 588
 589                 ieee80211_tx_status_irqsafe(hw, skb);
 590
 591                 if ((ring->entries - skb_queue_len(&ring->queue))
 592                                 == 2) {
 593
 594                         RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
 595                                         ("more desc left, wake"
 596                                          "skb_queue@%d,ring->idx = %d,"
 597                                          "skb_queue_len = 0x%d\n",
 598                                          prio, ring->idx,
 599                                          skb_queue_len(&ring->queue)));
 600
 601                         ieee80211_wake_queue(hw,
 602                                         skb_get_queue_mapping
 603                                         (skb));
 604                 }
 605 tx_status_ok:
 606                 skb = NULL;
 607         }
 608
 609         if (((rtlpriv->link_info.num_rx_inperiod +
 610                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 611                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 612                 tasklet_schedule(&rtlpriv->works.ips_leave_tasklet);
 613         }
 614 }
 615
 616 static void _rtl_receive_one(struct ieee80211_hw *hw, struct sk_buff *skb,
 617                              struct ieee80211_rx_status rx_status)
 618 {
 619         struct rtl_priv *rtlpriv = rtl_priv(hw);
 620         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
 621         __le16 fc = rtl_get_fc(skb);
 622         bool unicast = false;
 623         struct sk_buff *uskb = NULL;
 624         u8 *pdata;
 625
 626
 627         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 628
 629         if (is_broadcast_ether_addr(hdr->addr1)) {
 630                 ;/*TODO*/
 631         } else if (is_multicast_ether_addr(hdr->addr1)) {
 632                 ;/*TODO*/
 633         } else {
 634                 unicast = true;
 635                 rtlpriv->stats.rxbytesunicast += skb->len;
 636         }
 637
 638         rtl_is_special_data(hw, skb, false);
 639
 640         if (ieee80211_is_data(fc)) {
 641                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 642
 643                 if (unicast)
 644                         rtlpriv->link_info.num_rx_inperiod++;
 645         }
 646
 647         /* for sw lps */
 648         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 649         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 650         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 651             (rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G) &&
 652              (ieee80211_is_beacon(fc) || ieee80211_is_probe_resp(fc)))
 653                 return;
 654
 655         if (unlikely(!rtl_action_proc(hw, skb, false)))
 656                 return;
 657
 658         uskb = dev_alloc_skb(skb->len + 128);
 659         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status, sizeof(rx_status));
 660         pdata = (u8 *)skb_put(uskb, skb->len);
 661         memcpy(pdata, skb->data, skb->len);
 662
 663         ieee80211_rx_irqsafe(hw, uskb);
 664 }
 665
 666 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 667 {
 668         struct rtl_priv *rtlpriv = rtl_priv(hw);
 669         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 670         int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
 671
 672         struct ieee80211_rx_status rx_status = { 0 };
 673         unsigned int count = rtlpci->rxringcount;
 674         u8 own;
 675         u8 tmp_one;
 676         u32 bufferaddress;
 677
 678         struct rtl_stats stats = {
 679                 .signal = 0,
 680                 .noise = -98,
 681                 .rate = 0,
 682         };
 683         int index = rtlpci->rx_ring[rx_queue_idx].idx;
 684
 685         /*RX NORMAL PKT */
 686         while (count--) {
 687                 /*rx descriptor */
 688                 struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
 689                                 index];
 690                 /*rx pkt */
 691                 struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
 692                                 index];
 693                 struct sk_buff *new_skb = NULL;
 694
 695                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
 696                                                        false, HW_DESC_OWN);
 697
 698                 /*wait data to be filled by hardware */
 699                 if (own)
 700                         break;
 701
 702                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 703                                                  &rx_status,
 704                                                  (u8 *) pdesc, skb);
 705
 706                 if (stats.crc || stats.hwerror)
 707                         goto done;
 708
 709                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 710                 if (unlikely(!new_skb)) {
 711                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV),
 712                                  DBG_DMESG,
 713                                  ("can't alloc skb for rx\n"));
 714                         goto done;
 715                 }
 716
 717                 pci_unmap_single(rtlpci->pdev,
 718                                  *((dma_addr_t *) skb->cb),
 719                                  rtlpci->rxbuffersize,
 720                                  PCI_DMA_FROMDEVICE);
 721
 722                 skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc, false,
 723                         HW_DESC_RXPKT_LEN));
 724                 skb_reserve(skb, stats.rx_drvinfo_size + stats.rx_bufshift);
 725
 726                 /*
 727                  * NOTICE This can not be use for mac80211,
 728                  * this is done in mac80211 code,
 729                  * if you done here sec DHCP will fail
 730                  * skb_trim(skb, skb->len - 4);
 731                  */
 732
 733                 _rtl_receive_one(hw, skb, rx_status);
 734
 735                 if (((rtlpriv->link_info.num_rx_inperiod +
 736                         rtlpriv->link_info.num_tx_inperiod) > 8) ||
 737                         (rtlpriv->link_info.num_rx_inperiod > 2)) {
 738                         tasklet_schedule(&rtlpriv->works.ips_leave_tasklet);
 739                 }
 740
 741                 dev_kfree_skb_any(skb);
 742                 skb = new_skb;
 743
 744                 rtlpci->rx_ring[rx_queue_idx].rx_buf[index] = skb;
 745                 *((dma_addr_t *) skb->cb) =
 746                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 747                                            rtlpci->rxbuffersize,
 748                                            PCI_DMA_FROMDEVICE);
 749
 750 done:
 751                 bufferaddress = (*((dma_addr_t *)skb->cb));
 752                 tmp_one = 1;
 753                 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
 754                                             HW_DESC_RXBUFF_ADDR,
 755                                             (u8 *)&bufferaddress);
 756                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 757                                             HW_DESC_RXPKT_LEN,
 758                                             (u8 *)&rtlpci->rxbuffersize);
 759
 760                 if (index == rtlpci->rxringcount - 1)
 761                         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 762                                                     HW_DESC_RXERO,
 763                                                     (u8 *)&tmp_one);
 764
 765                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
 766                                             (u8 *)&tmp_one);
 767
 768                 index = (index + 1) % rtlpci->rxringcount;
 769         }
 770
 771         rtlpci->rx_ring[rx_queue_idx].idx = index;
 772 }
 773
 774 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 775 {
 776         struct ieee80211_hw *hw = dev_id;
 777         struct rtl_priv *rtlpriv = rtl_priv(hw);
 778         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 779         unsigned long flags;
 780         u32 inta = 0;
 781         u32 intb = 0;
 782
 783         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 784
 785         /*read ISR: 4/8bytes */
 786         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 787
 788         /*Shared IRQ or HW disappared */
 789         if (!inta || inta == 0xffff)
 790                 goto done;
 791
 792         /*<1> beacon related */
 793         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 794                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 795                          ("beacon ok interrupt!\n"));
 796         }
 797
 798         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 799                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 800                          ("beacon err interrupt!\n"));
 801         }
 802
 803         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 804                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 805                          ("beacon interrupt!\n"));
 806         }
 807
 808         if (inta & rtlpriv->cfg->maps[RTL_IMR_BcnInt]) {
 809                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 810                          ("prepare beacon for interrupt!\n"));
 811                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 812         }
 813
 814         /*<3> Tx related */
 815         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 816                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("IMR_TXFOVW!\n"));
 817
 818         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 819                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 820                          ("Manage ok interrupt!\n"));
 821                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 822         }
 823
 824         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 825                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 826                          ("HIGH_QUEUE ok interrupt!\n"));
 827                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 828         }
 829
 830         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 831                 rtlpriv->link_info.num_tx_inperiod++;
 832
 833                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 834                          ("BK Tx OK interrupt!\n"));
 835                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 836         }
 837
 838         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 839                 rtlpriv->link_info.num_tx_inperiod++;
 840
 841                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 842                          ("BE TX OK interrupt!\n"));
 843                 _rtl_pci_tx_isr(hw, BE_QUEUE);
 844         }
 845
 846         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 847                 rtlpriv->link_info.num_tx_inperiod++;
 848
 849                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 850                          ("VI TX OK interrupt!\n"));
 851                 _rtl_pci_tx_isr(hw, VI_QUEUE);
 852         }
 853
 854         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
 855                 rtlpriv->link_info.num_tx_inperiod++;
 856
 857                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 858                          ("Vo TX OK interrupt!\n"));
 859                 _rtl_pci_tx_isr(hw, VO_QUEUE);
 860         }
 861
 862         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
 863                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
 864                         rtlpriv->link_info.num_tx_inperiod++;
 865
 866                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 867                                         ("CMD TX OK interrupt!\n"));
 868                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
 869                 }
 870         }
 871
 872         /*<2> Rx related */
 873         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
 874                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n"));
 875                 _rtl_pci_rx_interrupt(hw);
 876         }
 877
 878         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
 879                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 880                          ("rx descriptor unavailable!\n"));
 881                 _rtl_pci_rx_interrupt(hw);
 882         }
 883
 884         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
 885                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n"));
 886                 _rtl_pci_rx_interrupt(hw);
 887         }
 888
 889         if (rtlpriv->rtlhal.earlymode_enable)
 890                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
 891
 892         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 893         return IRQ_HANDLED;
 894
 895 done:
 896         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 897         return IRQ_HANDLED;
 898 }
 899
 900 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
 901 {
 902         _rtl_pci_tx_chk_waitq(hw);
 903 }
 904
 905 static void _rtl_pci_ips_leave_tasklet(struct ieee80211_hw *hw)
 906 {
 907         rtl_lps_leave(hw);
 908 }
 909
 910 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
 911 {
 912         struct rtl_priv *rtlpriv = rtl_priv(hw);
 913         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 914         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 915         struct rtl8192_tx_ring *ring = NULL;
 916         struct ieee80211_hdr *hdr = NULL;
 917         struct ieee80211_tx_info *info = NULL;
 918         struct sk_buff *pskb = NULL;
 919         struct rtl_tx_desc *pdesc = NULL;
 920         struct rtl_tcb_desc tcb_desc;
 921         u8 temp_one = 1;
 922
 923         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 924         ring = &rtlpci->tx_ring[BEACON_QUEUE];
 925         pskb = __skb_dequeue(&ring->queue);
 926         if (pskb)
 927                 kfree_skb(pskb);
 928
 929         /*NB: the beacon data buffer must be 32-bit aligned. */
 930         pskb = ieee80211_beacon_get(hw, mac->vif);
 931         if (pskb == NULL)
 932                 return;
 933         hdr = rtl_get_hdr(pskb);
 934         info = IEEE80211_SKB_CB(pskb);
 935         pdesc = &ring->desc[0];
 936         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
 937                 info, pskb, BEACON_QUEUE, &tcb_desc);
 938
 939         __skb_queue_tail(&ring->queue, pskb);
 940
 941         rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
 942                                     (u8 *)&temp_one);
 943
 944         return;
 945 }
 946
 947 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
 948 {
 949         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 950         u8 i;
 951
 952         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
 953                 rtlpci->txringcount[i] = RT_TXDESC_NUM;
 954
 955         /*
 956          *we just alloc 2 desc for beacon queue,
 957          *because we just need first desc in hw beacon.
 958          */
 959         rtlpci->txringcount[BEACON_QUEUE] = 2;
 960
 961         /*
 962          *BE queue need more descriptor for performance
 963          *consideration or, No more tx desc will happen,
 964          *and may cause mac80211 mem leakage.
 965          */
 966         rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
 967
 968         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
 969         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
 970 }
 971
 972 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
 973                 struct pci_dev *pdev)
 974 {
 975         struct rtl_priv *rtlpriv = rtl_priv(hw);
 976         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 977         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 978         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 979
 980         rtlpci->up_first_time = true;
 981         rtlpci->being_init_adapter = false;
 982
 983         rtlhal->hw = hw;
 984         rtlpci->pdev = pdev;
 985
 986         /*Tx/Rx related var */
 987         _rtl_pci_init_trx_var(hw);
 988
 989         /*IBSS*/ mac->beacon_interval = 100;
 990
 991         /*AMPDU*/
 992         mac->min_space_cfg = 0;
 993         mac->max_mss_density = 0;
 994         /*set sane AMPDU defaults */
 995         mac->current_ampdu_density = 7;
 996         mac->current_ampdu_factor = 3;
 997
 998         /*QOS*/
 999         rtlpci->acm_method = eAcmWay2_SW;
1000
1001         /*task */
1002         tasklet_init(&rtlpriv->works.irq_tasklet,
1003                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1004                      (unsigned long)hw);
1005         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1006                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1007                      (unsigned long)hw);
1008         tasklet_init(&rtlpriv->works.ips_leave_tasklet,
1009                      (void (*)(unsigned long))_rtl_pci_ips_leave_tasklet,
1010                      (unsigned long)hw);
1011 }
1012
1013 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1014                                  unsigned int prio, unsigned int entries)
1015 {
1016         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1017         struct rtl_priv *rtlpriv = rtl_priv(hw);
1018         struct rtl_tx_desc *ring;
1019         dma_addr_t dma;
1020         u32 nextdescaddress;
1021         int i;
1022
1023         ring = pci_alloc_consistent(rtlpci->pdev,
1024                                     sizeof(*ring) * entries, &dma);
1025
1026         if (!ring || (unsigned long)ring & 0xFF) {
1027                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1028                          ("Cannot allocate TX ring (prio = %d)\n", prio));
1029                 return -ENOMEM;
1030         }
1031
1032         memset(ring, 0, sizeof(*ring) * entries);
1033         rtlpci->tx_ring[prio].desc = ring;
1034         rtlpci->tx_ring[prio].dma = dma;
1035         rtlpci->tx_ring[prio].idx = 0;
1036         rtlpci->tx_ring[prio].entries = entries;
1037         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1038
1039         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1040                  ("queue:%d, ring_addr:%p\n", prio, ring));
1041
1042         for (i = 0; i < entries; i++) {
1043                 nextdescaddress = (u32) dma +
1044                                               ((i + 1) % entries) *
1045                                               sizeof(*ring);
1046
1047                 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1048                                             true, HW_DESC_TX_NEXTDESC_ADDR,
1049                                             (u8 *)&nextdescaddress);
1050         }
1051
1052         return 0;
1053 }
1054
1055 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1056 {
1057         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1058         struct rtl_priv *rtlpriv = rtl_priv(hw);
1059         struct rtl_rx_desc *entry = NULL;
1060         int i, rx_queue_idx;
1061         u8 tmp_one = 1;
1062
1063         /*
1064          *rx_queue_idx 0:RX_MPDU_QUEUE
1065          *rx_queue_idx 1:RX_CMD_QUEUE
1066          */
1067         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1068              rx_queue_idx++) {
1069                 rtlpci->rx_ring[rx_queue_idx].desc =
1070                     pci_alloc_consistent(rtlpci->pdev,
1071                                          sizeof(*rtlpci->rx_ring[rx_queue_idx].
1072                                                 desc) * rtlpci->rxringcount,
1073                                          &rtlpci->rx_ring[rx_queue_idx].dma);
1074
1075                 if (!rtlpci->rx_ring[rx_queue_idx].desc ||
1076                     (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
1077                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1078                                  ("Cannot allocate RX ring\n"));
1079                         return -ENOMEM;
1080                 }
1081
1082                 memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
1083                        sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
1084                        rtlpci->rxringcount);
1085
1086                 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1087
1088                 /* If amsdu_8k is disabled, set buffersize to 4096. This
1089                  * change will reduce memory fragmentation.
1090                  */
1091                 if (rtlpci->rxbuffersize > 4096 &&
1092                     rtlpriv->rtlhal.disable_amsdu_8k)
1093                         rtlpci->rxbuffersize = 4096;
1094
1095                 for (i = 0; i < rtlpci->rxringcount; i++) {
1096                         struct sk_buff *skb =
1097                             dev_alloc_skb(rtlpci->rxbuffersize);
1098                         u32 bufferaddress;
1099                         if (!skb)
1100                                 return 0;
1101                         entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1102
1103                         /*skb->dev = dev; */
1104
1105                         rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
1106
1107                         /*
1108                          *just set skb->cb to mapping addr
1109                          *for pci_unmap_single use
1110                          */
1111                         *((dma_addr_t *) skb->cb) =
1112                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
1113                                            rtlpci->rxbuffersize,
1114                                            PCI_DMA_FROMDEVICE);
1115
1116                         bufferaddress = (*((dma_addr_t *)skb->cb));
1117                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1118                                                     HW_DESC_RXBUFF_ADDR,
1119                                                     (u8 *)&bufferaddress);
1120                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1121                                                     HW_DESC_RXPKT_LEN,
1122                                                     (u8 *)&rtlpci->
1123                                                     rxbuffersize);
1124                         rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1125                                                     HW_DESC_RXOWN,
1126                                                     (u8 *)&tmp_one);
1127                 }
1128
1129                 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1130                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1131         }
1132         return 0;
1133 }
1134
1135 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1136                 unsigned int prio)
1137 {
1138         struct rtl_priv *rtlpriv = rtl_priv(hw);
1139         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1140         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1141
1142         while (skb_queue_len(&ring->queue)) {
1143                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
1144                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1145
1146                 pci_unmap_single(rtlpci->pdev,
1147                                  rtlpriv->cfg->
1148                                              ops->get_desc((u8 *) entry, true,
1149                                                    HW_DESC_TXBUFF_ADDR),
1150                                  skb->len, PCI_DMA_TODEVICE);
1151                 kfree_skb(skb);
1152                 ring->idx = (ring->idx + 1) % ring->entries;
1153         }
1154
1155         pci_free_consistent(rtlpci->pdev,
1156                             sizeof(*ring->desc) * ring->entries,
1157                             ring->desc, ring->dma);
1158         ring->desc = NULL;
1159 }
1160
1161 static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
1162 {
1163         int i, rx_queue_idx;
1164
1165         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1166         /*rx_queue_idx 1:RX_CMD_QUEUE */
1167         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1168              rx_queue_idx++) {
1169                 for (i = 0; i < rtlpci->rxringcount; i++) {
1170                         struct sk_buff *skb =
1171                             rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
1172                         if (!skb)
1173                                 continue;
1174
1175                         pci_unmap_single(rtlpci->pdev,
1176                                          *((dma_addr_t *) skb->cb),
1177                                          rtlpci->rxbuffersize,
1178                                          PCI_DMA_FROMDEVICE);
1179                         kfree_skb(skb);
1180                 }
1181
1182                 pci_free_consistent(rtlpci->pdev,
1183                                     sizeof(*rtlpci->rx_ring[rx_queue_idx].
1184                                            desc) * rtlpci->rxringcount,
1185                                     rtlpci->rx_ring[rx_queue_idx].desc,
1186                                     rtlpci->rx_ring[rx_queue_idx].dma);
1187                 rtlpci->rx_ring[rx_queue_idx].desc = NULL;
1188         }
1189 }
1190
1191 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1192 {
1193         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1194         int ret;
1195         int i;
1196
1197         ret = _rtl_pci_init_rx_ring(hw);
1198         if (ret)
1199                 return ret;
1200
1201         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1202                 ret = _rtl_pci_init_tx_ring(hw, i,
1203                                  rtlpci->txringcount[i]);
1204                 if (ret)
1205                         goto err_free_rings;
1206         }
1207
1208         return 0;
1209
1210 err_free_rings:
1211         _rtl_pci_free_rx_ring(rtlpci);
1212
1213         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1214                 if (rtlpci->tx_ring[i].desc)
1215                         _rtl_pci_free_tx_ring(hw, i);
1216
1217         return 1;
1218 }
1219
1220 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1221 {
1222         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1223         u32 i;
1224
1225         /*free rx rings */
1226         _rtl_pci_free_rx_ring(rtlpci);
1227
1228         /*free tx rings */
1229         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1230                 _rtl_pci_free_tx_ring(hw, i);
1231
1232         return 0;
1233 }
1234
1235 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1236 {
1237         struct rtl_priv *rtlpriv = rtl_priv(hw);
1238         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1239         int i, rx_queue_idx;
1240         unsigned long flags;
1241         u8 tmp_one = 1;
1242
1243         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1244         /*rx_queue_idx 1:RX_CMD_QUEUE */
1245         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1246              rx_queue_idx++) {
1247                 /*
1248                  *force the rx_ring[RX_MPDU_QUEUE/
1249                  *RX_CMD_QUEUE].idx to the first one
1250                  */
1251                 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1252                         struct rtl_rx_desc *entry = NULL;
1253
1254                         for (i = 0; i < rtlpci->rxringcount; i++) {
1255                                 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1256                                 rtlpriv->cfg->ops->set_desc((u8 *) entry,
1257                                                             false,
1258                                                             HW_DESC_RXOWN,
1259                                                             (u8 *)&tmp_one);
1260                         }
1261                         rtlpci->rx_ring[rx_queue_idx].idx = 0;
1262                 }
1263         }
1264
1265         /*
1266          *after reset, release previous pending packet,
1267          *and force the  tx idx to the first one
1268          */
1269         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1270         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1271                 if (rtlpci->tx_ring[i].desc) {
1272                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1273
1274                         while (skb_queue_len(&ring->queue)) {
1275                                 struct rtl_tx_desc *entry =
1276                                     &ring->desc[ring->idx];
1277                                 struct sk_buff *skb =
1278                                     __skb_dequeue(&ring->queue);
1279
1280                                 pci_unmap_single(rtlpci->pdev,
1281                                                  rtlpriv->cfg->ops->
1282                                                          get_desc((u8 *)
1283                                                          entry,
1284                                                          true,
1285                                                          HW_DESC_TXBUFF_ADDR),
1286                                                  skb->len, PCI_DMA_TODEVICE);
1287                                 kfree_skb(skb);
1288                                 ring->idx = (ring->idx + 1) % ring->entries;
1289                         }
1290                         ring->idx = 0;
1291                 }
1292         }
1293
1294         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1295
1296         return 0;
1297 }
1298
1299 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1300                                         struct sk_buff *skb)
1301 {
1302         struct rtl_priv *rtlpriv = rtl_priv(hw);
1303         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1304         struct ieee80211_sta *sta = info->control.sta;
1305         struct rtl_sta_info *sta_entry = NULL;
1306         u8 tid = rtl_get_tid(skb);
1307
1308         if (!sta)
1309                 return false;
1310         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1311
1312         if (!rtlpriv->rtlhal.earlymode_enable)
1313                 return false;
1314         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1315                 return false;
1316         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1317                 return false;
1318         if (tid > 7)
1319                 return false;
1320
1321         /* maybe every tid should be checked */
1322         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1323                 return false;
1324
1325         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1326         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1327         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1328
1329         return true;
1330 }
1331
1332 static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1333                 struct rtl_tcb_desc *ptcb_desc)
1334 {
1335         struct rtl_priv *rtlpriv = rtl_priv(hw);
1336         struct rtl_sta_info *sta_entry = NULL;
1337         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1338         struct ieee80211_sta *sta = info->control.sta;
1339         struct rtl8192_tx_ring *ring;
1340         struct rtl_tx_desc *pdesc;
1341         u8 idx;
1342         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1343         unsigned long flags;
1344         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1345         __le16 fc = rtl_get_fc(skb);
1346         u8 *pda_addr = hdr->addr1;
1347         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1348         /*ssn */
1349         u8 tid = 0;
1350         u16 seq_number = 0;
1351         u8 own;
1352         u8 temp_one = 1;
1353
1354         if (ieee80211_is_auth(fc)) {
1355                 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
1356                 rtl_ips_nic_on(hw);
1357         }
1358
1359         if (rtlpriv->psc.sw_ps_enabled) {
1360                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1361                         !ieee80211_has_pm(fc))
1362                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1363         }
1364
1365         rtl_action_proc(hw, skb, true);
1366
1367         if (is_multicast_ether_addr(pda_addr))
1368                 rtlpriv->stats.txbytesmulticast += skb->len;
1369         else if (is_broadcast_ether_addr(pda_addr))
1370                 rtlpriv->stats.txbytesbroadcast += skb->len;
1371         else
1372                 rtlpriv->stats.txbytesunicast += skb->len;
1373
1374         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1375         ring = &rtlpci->tx_ring[hw_queue];
1376         if (hw_queue != BEACON_QUEUE)
1377                 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1378                                 ring->entries;
1379         else
1380                 idx = 0;
1381
1382         pdesc = &ring->desc[idx];
1383         own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
1384                         true, HW_DESC_OWN);
1385
1386         if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1387                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1388                          ("No more TX desc@%d, ring->idx = %d,"
1389                           "idx = %d, skb_queue_len = 0x%d\n",
1390                           hw_queue, ring->idx, idx,
1391                           skb_queue_len(&ring->queue)));
1392
1393                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1394                 return skb->len;
1395         }
1396
1397         if (ieee80211_is_data_qos(fc)) {
1398                 tid = rtl_get_tid(skb);
1399                 if (sta) {
1400                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1401                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1402                                       IEEE80211_SCTL_SEQ) >> 4;
1403                         seq_number += 1;
1404
1405                         if (!ieee80211_has_morefrags(hdr->frame_control))
1406                                 sta_entry->tids[tid].seq_number = seq_number;
1407                 }
1408         }
1409
1410         if (ieee80211_is_data(fc))
1411                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1412
1413         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1414                         info, skb, hw_queue, ptcb_desc);
1415
1416         __skb_queue_tail(&ring->queue, skb);
1417
1418         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
1419                                     HW_DESC_OWN, (u8 *)&temp_one);
1420
1421
1422         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1423             hw_queue != BEACON_QUEUE) {
1424
1425                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1426                          ("less desc left, stop skb_queue@%d, "
1427                           "ring->idx = %d,"
1428                           "idx = %d, skb_queue_len = 0x%d\n",
1429                           hw_queue, ring->idx, idx,
1430                           skb_queue_len(&ring->queue)));
1431
1432                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1433         }
1434
1435         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1436
1437         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1438
1439         return 0;
1440 }
1441
1442 static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1443 {
1444         struct rtl_priv *rtlpriv = rtl_priv(hw);
1445         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1446         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1447         u16 i = 0;
1448         int queue_id;
1449         struct rtl8192_tx_ring *ring;
1450
1451         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1452                 u32 queue_len;
1453                 ring = &pcipriv->dev.tx_ring[queue_id];
1454                 queue_len = skb_queue_len(&ring->queue);
1455                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1456                         queue_id == TXCMD_QUEUE) {
1457                         queue_id--;
1458                         continue;
1459                 } else {
1460                         msleep(20);
1461                         i++;
1462                 }
1463
1464                 /* we just wait 1s for all queues */
1465                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1466                         is_hal_stop(rtlhal) || i >= 200)
1467                         return;
1468         }
1469 }
1470
1471 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1472 {
1473         struct rtl_priv *rtlpriv = rtl_priv(hw);
1474         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1475
1476         _rtl_pci_deinit_trx_ring(hw);
1477
1478         synchronize_irq(rtlpci->pdev->irq);
1479         tasklet_kill(&rtlpriv->works.irq_tasklet);
1480         tasklet_kill(&rtlpriv->works.ips_leave_tasklet);
1481
1482         flush_workqueue(rtlpriv->works.rtl_wq);
1483         destroy_workqueue(rtlpriv->works.rtl_wq);
1484
1485 }
1486
1487 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1488 {
1489         struct rtl_priv *rtlpriv = rtl_priv(hw);
1490         int err;
1491
1492         _rtl_pci_init_struct(hw, pdev);
1493
1494         err = _rtl_pci_init_trx_ring(hw);
1495         if (err) {
1496                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1497                          ("tx ring initialization failed"));
1498                 return err;
1499         }
1500
1501         return 1;
1502 }
1503
1504 static int rtl_pci_start(struct ieee80211_hw *hw)
1505 {
1506         struct rtl_priv *rtlpriv = rtl_priv(hw);
1507         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1508         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1509         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1510
1511         int err;
1512
1513         rtl_pci_reset_trx_ring(hw);
1514
1515         rtlpci->driver_is_goingto_unload = false;
1516         err = rtlpriv->cfg->ops->hw_init(hw);
1517         if (err) {
1518                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1519                          ("Failed to config hardware!\n"));
1520                 return err;
1521         }
1522
1523         rtlpriv->cfg->ops->enable_interrupt(hw);
1524         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("enable_interrupt OK\n"));
1525
1526         rtl_init_rx_config(hw);
1527
1528         /*should after adapter start and interrupt enable. */
1529         set_hal_start(rtlhal);
1530
1531         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1532
1533         rtlpci->up_first_time = false;
1534
1535         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("OK\n"));
1536         return 0;
1537 }
1538
1539 static void rtl_pci_stop(struct ieee80211_hw *hw)
1540 {
1541         struct rtl_priv *rtlpriv = rtl_priv(hw);
1542         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1543         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1544         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1545         unsigned long flags;
1546         u8 RFInProgressTimeOut = 0;
1547
1548         /*
1549          *should before disable interrrupt&adapter
1550          *and will do it immediately.
1551          */
1552         set_hal_stop(rtlhal);
1553
1554         rtlpriv->cfg->ops->disable_interrupt(hw);
1555         tasklet_kill(&rtlpriv->works.ips_leave_tasklet);
1556
1557         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1558         while (ppsc->rfchange_inprogress) {
1559                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1560                 if (RFInProgressTimeOut > 100) {
1561                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1562                         break;
1563                 }
1564                 mdelay(1);
1565                 RFInProgressTimeOut++;
1566                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1567         }
1568         ppsc->rfchange_inprogress = true;
1569         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1570
1571         rtlpci->driver_is_goingto_unload = true;
1572         rtlpriv->cfg->ops->hw_disable(hw);
1573         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1574
1575         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1576         ppsc->rfchange_inprogress = false;
1577         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1578
1579         rtl_pci_enable_aspm(hw);
1580 }
1581
1582 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1583                 struct ieee80211_hw *hw)
1584 {
1585         struct rtl_priv *rtlpriv = rtl_priv(hw);
1586         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1587         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1588         struct pci_dev *bridge_pdev = pdev->bus->self;
1589         u16 venderid;
1590         u16 deviceid;
1591         u8 revisionid;
1592         u16 irqline;
1593         u8 tmp;
1594
1595         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1596         venderid = pdev->vendor;
1597         deviceid = pdev->device;
1598         pci_read_config_byte(pdev, 0x8, &revisionid);
1599         pci_read_config_word(pdev, 0x3C, &irqline);
1600
1601         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1602          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1603          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1604          * the correct driver is r8192e_pci, thus this routine should
1605          * return false.
1606          */
1607         if (deviceid == RTL_PCI_8192SE_DID &&
1608             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1609                 return false;
1610
1611         if (deviceid == RTL_PCI_8192_DID ||
1612             deviceid == RTL_PCI_0044_DID ||
1613             deviceid == RTL_PCI_0047_DID ||
1614             deviceid == RTL_PCI_8192SE_DID ||
1615             deviceid == RTL_PCI_8174_DID ||
1616             deviceid == RTL_PCI_8173_DID ||
1617             deviceid == RTL_PCI_8172_DID ||
1618             deviceid == RTL_PCI_8171_DID) {
1619                 switch (revisionid) {
1620                 case RTL_PCI_REVISION_ID_8192PCIE:
1621                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1622                                  ("8192 PCI-E is found - "
1623                                   "vid/did=%x/%x\n", venderid, deviceid));
1624                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1625                         break;
1626                 case RTL_PCI_REVISION_ID_8192SE:
1627                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1628                                  ("8192SE is found - "
1629                                   "vid/did=%x/%x\n", venderid, deviceid));
1630                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1631                         break;
1632                 default:
1633                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1634                                  ("Err: Unknown device - "
1635                                   "vid/did=%x/%x\n", venderid, deviceid));
1636                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1637                         break;
1638
1639                 }
1640         } else if (deviceid == RTL_PCI_8192CET_DID ||
1641                    deviceid == RTL_PCI_8192CE_DID ||
1642                    deviceid == RTL_PCI_8191CE_DID ||
1643                    deviceid == RTL_PCI_8188CE_DID) {
1644                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1645                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1646                          ("8192C PCI-E is found - "
1647                           "vid/did=%x/%x\n", venderid, deviceid));
1648         } else if (deviceid == RTL_PCI_8192DE_DID ||
1649                    deviceid == RTL_PCI_8192DE_DID2) {
1650                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1651                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1652                          ("8192D PCI-E is found - "
1653                           "vid/did=%x/%x\n", venderid, deviceid));
1654         } else {
1655                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1656                          ("Err: Unknown device -"
1657                           " vid/did=%x/%x\n", venderid, deviceid));
1658
1659                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1660         }
1661
1662         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1663                 if (revisionid == 0 || revisionid == 1) {
1664                         if (revisionid == 0) {
1665                                 RT_TRACE(rtlpriv, COMP_INIT,
1666                                          DBG_LOUD, ("Find 92DE MAC0.\n"));
1667                                 rtlhal->interfaceindex = 0;
1668                         } else if (revisionid == 1) {
1669                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1670                                         ("Find 92DE MAC1.\n"));
1671                                 rtlhal->interfaceindex = 1;
1672                         }
1673                 } else {
1674                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1675                                 ("Unknown device - "
1676                                 "VendorID/DeviceID=%x/%x, Revision=%x\n",
1677                                 venderid, deviceid, revisionid));
1678                         rtlhal->interfaceindex = 0;
1679                 }
1680         }
1681         /*find bus info */
1682         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1683         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
1684         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
1685
1686         if (bridge_pdev) {
1687                 /*find bridge info if available */
1688                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
1689                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
1690                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
1691                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
1692                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1693                                          ("Pci Bridge Vendor is found index:"
1694                                          " %d\n", tmp));
1695                                 break;
1696                         }
1697                 }
1698         }
1699
1700         if (pcipriv->ndis_adapter.pcibridge_vendor !=
1701                 PCI_BRIDGE_VENDOR_UNKNOWN) {
1702                 pcipriv->ndis_adapter.pcibridge_busnum =
1703                     bridge_pdev->bus->number;
1704                 pcipriv->ndis_adapter.pcibridge_devnum =
1705                     PCI_SLOT(bridge_pdev->devfn);
1706                 pcipriv->ndis_adapter.pcibridge_funcnum =
1707                     PCI_FUNC(bridge_pdev->devfn);
1708                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1709                     pci_pcie_cap(bridge_pdev);
1710                 pcipriv->ndis_adapter.num4bytes =
1711                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1712
1713                 rtl_pci_get_linkcontrol_field(hw);
1714
1715                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
1716                     PCI_BRIDGE_VENDOR_AMD) {
1717                         pcipriv->ndis_adapter.amd_l1_patch =
1718                             rtl_pci_get_amd_l1_patch(hw);
1719                 }
1720         }
1721
1722         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1723                  ("pcidev busnumber:devnumber:funcnumber:"
1724                   "vendor:link_ctl %d:%d:%d:%x:%x\n",
1725                   pcipriv->ndis_adapter.busnumber,
1726                   pcipriv->ndis_adapter.devnumber,
1727                   pcipriv->ndis_adapter.funcnumber,
1728                   pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg));
1729
1730         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1731                  ("pci_bridge busnumber:devnumber:funcnumber:vendor:"
1732                   "pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1733                   pcipriv->ndis_adapter.pcibridge_busnum,
1734                   pcipriv->ndis_adapter.pcibridge_devnum,
1735                   pcipriv->ndis_adapter.pcibridge_funcnum,
1736                   pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
1737                   pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
1738                   pcipriv->ndis_adapter.pcibridge_linkctrlreg,
1739                   pcipriv->ndis_adapter.amd_l1_patch));
1740
1741         rtl_pci_parse_configuration(pdev, hw);
1742
1743         return true;
1744 }
1745
1746 int __devinit rtl_pci_probe(struct pci_dev *pdev,
1747                             const struct pci_device_id *id)
1748 {
1749         struct ieee80211_hw *hw = NULL;
1750
1751         struct rtl_priv *rtlpriv = NULL;
1752         struct rtl_pci_priv *pcipriv = NULL;
1753         struct rtl_pci *rtlpci;
1754         unsigned long pmem_start, pmem_len, pmem_flags;
1755         int err;
1756
1757         err = pci_enable_device(pdev);
1758         if (err) {
1759                 RT_ASSERT(false,
1760                           ("%s : Cannot enable new PCI device\n",
1761                            pci_name(pdev)));
1762                 return err;
1763         }
1764
1765         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1766                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1767                         RT_ASSERT(false, ("Unable to obtain 32bit DMA "
1768                                           "for consistent allocations\n"));
1769                         pci_disable_device(pdev);
1770                         return -ENOMEM;
1771                 }
1772         }
1773
1774         pci_set_master(pdev);
1775
1776         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
1777                                 sizeof(struct rtl_priv), &rtl_ops);
1778         if (!hw) {
1779                 RT_ASSERT(false,
1780                           ("%s : ieee80211 alloc failed\n", pci_name(pdev)));
1781                 err = -ENOMEM;
1782                 goto fail1;
1783         }
1784
1785         SET_IEEE80211_DEV(hw, &pdev->dev);
1786         pci_set_drvdata(pdev, hw);
1787
1788         rtlpriv = hw->priv;
1789         pcipriv = (void *)rtlpriv->priv;
1790         pcipriv->dev.pdev = pdev;
1791
1792         /* init cfg & intf_ops */
1793         rtlpriv->rtlhal.interface = INTF_PCI;
1794         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1795         rtlpriv->intf_ops = &rtl_pci_ops;
1796
1797         /*
1798          *init dbgp flags before all
1799          *other functions, because we will
1800          *use it in other funtions like
1801          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1802          *you can not use these macro
1803          *before this
1804          */
1805         rtl_dbgp_flag_init(hw);
1806
1807         /* MEM map */
1808         err = pci_request_regions(pdev, KBUILD_MODNAME);
1809         if (err) {
1810                 RT_ASSERT(false, ("Can't obtain PCI resources\n"));
1811                 return err;
1812         }
1813
1814         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1815         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1816         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
1817
1818         /*shared mem start */
1819         rtlpriv->io.pci_mem_start =
1820                         (unsigned long)pci_iomap(pdev,
1821                         rtlpriv->cfg->bar_id, pmem_len);
1822         if (rtlpriv->io.pci_mem_start == 0) {
1823                 RT_ASSERT(false, ("Can't map PCI mem\n"));
1824                 goto fail2;
1825         }
1826
1827         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1828                  ("mem mapped space: start: 0x%08lx len:%08lx "
1829                   "flags:%08lx, after map:0x%08lx\n",
1830                   pmem_start, pmem_len, pmem_flags,
1831                   rtlpriv->io.pci_mem_start));
1832
1833         /* Disable Clk Request */
1834         pci_write_config_byte(pdev, 0x81, 0);
1835         /* leave D3 mode */
1836         pci_write_config_byte(pdev, 0x44, 0);
1837         pci_write_config_byte(pdev, 0x04, 0x06);
1838         pci_write_config_byte(pdev, 0x04, 0x07);
1839
1840         /* find adapter */
1841         if (!_rtl_pci_find_adapter(pdev, hw))
1842                 goto fail3;
1843
1844         /* Init IO handler */
1845         _rtl_pci_io_handler_init(&pdev->dev, hw);
1846
1847         /*like read eeprom and so on */
1848         rtlpriv->cfg->ops->read_eeprom_info(hw);
1849
1850         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
1851                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1852                          ("Can't init_sw_vars.\n"));
1853                 goto fail3;
1854         }
1855
1856         rtlpriv->cfg->ops->init_sw_leds(hw);
1857
1858         /*aspm */
1859         rtl_pci_init_aspm(hw);
1860
1861         /* Init mac80211 sw */
1862         err = rtl_init_core(hw);
1863         if (err) {
1864                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1865                          ("Can't allocate sw for mac80211.\n"));
1866                 goto fail3;
1867         }
1868
1869         /* Init PCI sw */
1870         err = !rtl_pci_init(hw, pdev);
1871         if (err) {
1872                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1873                          ("Failed to init PCI.\n"));
1874                 goto fail3;
1875         }
1876
1877         err = ieee80211_register_hw(hw);
1878         if (err) {
1879                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1880                          ("Can't register mac80211 hw.\n"));
1881                 goto fail3;
1882         } else {
1883                 rtlpriv->mac80211.mac80211_registered = 1;
1884         }
1885
1886         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
1887         if (err) {
1888                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1889                          ("failed to create sysfs device attributes\n"));
1890                 goto fail3;
1891         }
1892
1893         /*init rfkill */
1894         rtl_init_rfkill(hw);
1895
1896         rtlpci = rtl_pcidev(pcipriv);
1897         err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
1898                           IRQF_SHARED, KBUILD_MODNAME, hw);
1899         if (err) {
1900                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1901                          ("%s: failed to register IRQ handler\n",
1902                           wiphy_name(hw->wiphy)));
1903                 goto fail3;
1904         } else {
1905                 rtlpci->irq_alloc = 1;
1906         }
1907
1908         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1909         return 0;
1910
1911 fail3:
1912         pci_set_drvdata(pdev, NULL);
1913         rtl_deinit_core(hw);
1914         _rtl_pci_io_handler_release(hw);
1915         ieee80211_free_hw(hw);
1916
1917         if (rtlpriv->io.pci_mem_start != 0)
1918                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1919
1920 fail2:
1921         pci_release_regions(pdev);
1922
1923 fail1:
1924
1925         pci_disable_device(pdev);
1926
1927         return -ENODEV;
1928
1929 }
1930 EXPORT_SYMBOL(rtl_pci_probe);
1931
1932 void rtl_pci_disconnect(struct pci_dev *pdev)
1933 {
1934         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1935         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1936         struct rtl_priv *rtlpriv = rtl_priv(hw);
1937         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
1938         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
1939
1940         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1941
1942         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
1943
1944         /*ieee80211_unregister_hw will call ops_stop */
1945         if (rtlmac->mac80211_registered == 1) {
1946                 ieee80211_unregister_hw(hw);
1947                 rtlmac->mac80211_registered = 0;
1948         } else {
1949                 rtl_deinit_deferred_work(hw);
1950                 rtlpriv->intf_ops->adapter_stop(hw);
1951         }
1952
1953         /*deinit rfkill */
1954         rtl_deinit_rfkill(hw);
1955
1956         rtl_pci_deinit(hw);
1957         rtl_deinit_core(hw);
1958         _rtl_pci_io_handler_release(hw);
1959         rtlpriv->cfg->ops->deinit_sw_vars(hw);
1960
1961         if (rtlpci->irq_alloc) {
1962                 free_irq(rtlpci->pdev->irq, hw);
1963                 rtlpci->irq_alloc = 0;
1964         }
1965
1966         if (rtlpriv->io.pci_mem_start != 0) {
1967                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1968                 pci_release_regions(pdev);
1969         }
1970
1971         pci_disable_device(pdev);
1972
1973         rtl_pci_disable_aspm(hw);
1974
1975         pci_set_drvdata(pdev, NULL);
1976
1977         ieee80211_free_hw(hw);
1978 }
1979 EXPORT_SYMBOL(rtl_pci_disconnect);
1980
1981 /***************************************
1982 kernel pci power state define:
1983 PCI_D0         ((pci_power_t __force) 0)
1984 PCI_D1         ((pci_power_t __force) 1)
1985 PCI_D2         ((pci_power_t __force) 2)
1986 PCI_D3hot      ((pci_power_t __force) 3)
1987 PCI_D3cold     ((pci_power_t __force) 4)
1988 PCI_UNKNOWN    ((pci_power_t __force) 5)
1989
1990 This function is called when system
1991 goes into suspend state mac80211 will
1992 call rtl_mac_stop() from the mac80211
1993 suspend function first, So there is
1994 no need to call hw_disable here.
1995 ****************************************/
1996 int rtl_pci_suspend(struct device *dev)
1997 {
1998         struct pci_dev *pdev = to_pci_dev(dev);
1999         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2000         struct rtl_priv *rtlpriv = rtl_priv(hw);
2001
2002         rtlpriv->cfg->ops->hw_suspend(hw);
2003         rtl_deinit_rfkill(hw);
2004
2005         return 0;
2006 }
2007 EXPORT_SYMBOL(rtl_pci_suspend);
2008
2009 int rtl_pci_resume(struct device *dev)
2010 {
2011         struct pci_dev *pdev = to_pci_dev(dev);
2012         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2013         struct rtl_priv *rtlpriv = rtl_priv(hw);
2014
2015         rtlpriv->cfg->ops->hw_resume(hw);
2016         rtl_init_rfkill(hw);
2017         return 0;
2018 }
2019 EXPORT_SYMBOL(rtl_pci_resume);
2020
2021 struct rtl_intf_ops rtl_pci_ops = {
2022         .read_efuse_byte = read_efuse_byte,
2023         .adapter_start = rtl_pci_start,
2024         .adapter_stop = rtl_pci_stop,
2025         .adapter_tx = rtl_pci_tx,
2026         .flush = rtl_pci_flush,
2027         .reset_trx_ring = rtl_pci_reset_trx_ring,
2028         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2029
2030         .disable_aspm = rtl_pci_disable_aspm,
2031         .enable_aspm = rtl_pci_enable_aspm,
2032 };