drivers/net/wireless/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include <linux/export.h>
  31 #include "core.h"
  32 #include "wifi.h"
  33 #include "pci.h"
  34 #include "base.h"
  35 #include "ps.h"
  36 #include "efuse.h"
  37
  38 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  39         PCI_VENDOR_ID_INTEL,
  40         PCI_VENDOR_ID_ATI,
  41         PCI_VENDOR_ID_AMD,
  42         PCI_VENDOR_ID_SI
  43 };
  44
  45 static const u8 ac_to_hwq[] = {
  46         VO_QUEUE,
  47         VI_QUEUE,
  48         BE_QUEUE,
  49         BK_QUEUE
  50 };
  51
  52 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  53                        struct sk_buff *skb)
  54 {
  55         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  56         __le16 fc = rtl_get_fc(skb);
  57         u8 queue_index = skb_get_queue_mapping(skb);
  58
  59         if (unlikely(ieee80211_is_beacon(fc)))
  60                 return BEACON_QUEUE;
  61         if (ieee80211_is_mgmt(fc))
  62                 return MGNT_QUEUE;
  63         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  64                 if (ieee80211_is_nullfunc(fc))
  65                         return HIGH_QUEUE;
  66
  67         return ac_to_hwq[queue_index];
  68 }
  69
  70 /* Update PCI dependent default settings*/
  71 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  72 {
  73         struct rtl_priv *rtlpriv = rtl_priv(hw);
  74         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  75         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  76         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  77         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  78         u8 init_aspm;
  79
  80         ppsc->reg_rfps_level = 0;
  81         ppsc->support_aspm = false;
  82
  83         /*Update PCI ASPM setting */
  84         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  85         switch (rtlpci->const_pci_aspm) {
  86         case 0:
  87                 /*No ASPM */
  88                 break;
  89
  90         case 1:
  91                 /*ASPM dynamically enabled/disable. */
  92                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  93                 break;
  94
  95         case 2:
  96                 /*ASPM with Clock Req dynamically enabled/disable. */
  97                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
  98                                          RT_RF_OFF_LEVL_CLK_REQ);
  99                 break;
 100
 101         case 3:
 102                 /*
 103                  * Always enable ASPM and Clock Req
 104                  * from initialization to halt.
 105                  * */
 106                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 107                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 108                                          RT_RF_OFF_LEVL_CLK_REQ);
 109                 break;
 110
 111         case 4:
 112                 /*
 113                  * Always enable ASPM without Clock Req
 114                  * from initialization to halt.
 115                  * */
 116                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 117                                           RT_RF_OFF_LEVL_CLK_REQ);
 118                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 119                 break;
 120         }
 121
 122         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 123
 124         /*Update Radio OFF setting */
 125         switch (rtlpci->const_hwsw_rfoff_d3) {
 126         case 1:
 127                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 128                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 129                 break;
 130
 131         case 2:
 132                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 133                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 134                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 135                 break;
 136
 137         case 3:
 138                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 139                 break;
 140         }
 141
 142         /*Set HW definition to determine if it supports ASPM. */
 143         switch (rtlpci->const_support_pciaspm) {
 144         case 0:{
 145                         /*Not support ASPM. */
 146                         bool support_aspm = false;
 147                         ppsc->support_aspm = support_aspm;
 148                         break;
 149                 }
 150         case 1:{
 151                         /*Support ASPM. */
 152                         bool support_aspm = true;
 153                         bool support_backdoor = true;
 154                         ppsc->support_aspm = support_aspm;
 155
 156                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 157                            !priv->ndis_adapter.amd_l1_patch)
 158                            support_backdoor = false; */
 159
 160                         ppsc->support_backdoor = support_backdoor;
 161
 162                         break;
 163                 }
 164         case 2:
 165                 /*ASPM value set by chipset. */
 166                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 167                         bool support_aspm = true;
 168                         ppsc->support_aspm = support_aspm;
 169                 }
 170                 break;
 171         default:
 172                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 173                          ("switch case not process\n"));
 174                 break;
 175         }
 176
 177         /* toshiba aspm issue, toshiba will set aspm selfly
 178          * so we should not set aspm in driver */
 179         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 180         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 181                 init_aspm == 0x43)
 182                 ppsc->support_aspm = false;
 183 }
 184
 185 static bool _rtl_pci_platform_switch_device_pci_aspm(
 186                         struct ieee80211_hw *hw,
 187                         u8 value)
 188 {
 189         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 190         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 191
 192         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 193                 value |= 0x40;
 194
 195         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 196
 197         return false;
 198 }
 199
 200 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 201 static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 202 {
 203         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 204         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 205
 206         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 207
 208         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 209                 udelay(100);
 210
 211         return true;
 212 }
 213
 214 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 215 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 216 {
 217         struct rtl_priv *rtlpriv = rtl_priv(hw);
 218         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 219         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 220         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 221         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 222         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 223         /*Retrieve original configuration settings. */
 224         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 225         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 226                                 pcibridge_linkctrlreg;
 227         u16 aspmlevel = 0;
 228         u8 tmp_u1b = 0;
 229
 230         if (!ppsc->support_aspm)
 231                 return;
 232
 233         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 234                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 235                          ("PCI(Bridge) UNKNOWN.\n"));
 236
 237                 return;
 238         }
 239
 240         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 241                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 242                 _rtl_pci_switch_clk_req(hw, 0x0);
 243         }
 244
 245         /*for promising device will in L0 state after an I/O. */
 246         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 247
 248         /*Set corresponding value. */
 249         aspmlevel |= BIT(0) | BIT(1);
 250         linkctrl_reg &= ~aspmlevel;
 251         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 252
 253         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 254         udelay(50);
 255
 256         /*4 Disable Pci Bridge ASPM */
 257         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 258                               pcibridge_linkctrlreg);
 259
 260         udelay(50);
 261 }
 262
 263 /*
 264  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 265  *power saving We should follow the sequence to enable
 266  *RTL8192SE first then enable Pci Bridge ASPM
 267  *or the system will show bluescreen.
 268  */
 269 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 270 {
 271         struct rtl_priv *rtlpriv = rtl_priv(hw);
 272         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 273         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 274         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 275         u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
 276         u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
 277         u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
 278         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 279         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 280         u16 aspmlevel;
 281         u8 u_pcibridge_aspmsetting;
 282         u8 u_device_aspmsetting;
 283
 284         if (!ppsc->support_aspm)
 285                 return;
 286
 287         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 288                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 289                          ("PCI(Bridge) UNKNOWN.\n"));
 290                 return;
 291         }
 292
 293         /*4 Enable Pci Bridge ASPM */
 294
 295         u_pcibridge_aspmsetting =
 296             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 297             rtlpci->const_hostpci_aspm_setting;
 298
 299         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 300                 u_pcibridge_aspmsetting &= ~BIT(0);
 301
 302         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 303                               u_pcibridge_aspmsetting);
 304
 305         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 306                  ("PlatformEnableASPM():PciBridge busnumber[%x], "
 307                   "DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
 308                   pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
 309                   (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 310                   u_pcibridge_aspmsetting));
 311
 312         udelay(50);
 313
 314         /*Get ASPM level (with/without Clock Req) */
 315         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 316         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 317
 318         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 319         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 320
 321         u_device_aspmsetting |= aspmlevel;
 322
 323         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 324
 325         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 326                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 327                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 328                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 329         }
 330         udelay(100);
 331 }
 332
 333 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 334 {
 335         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 336
 337         bool status = false;
 338         u8 offset_e0;
 339         unsigned offset_e4;
 340
 341         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 342
 343         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 344
 345         if (offset_e0 == 0xA0) {
 346                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 347                 if (offset_e4 & BIT(23))
 348                         status = true;
 349         }
 350
 351         return status;
 352 }
 353
 354 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 355 {
 356         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 357         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 358         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 359         u8 linkctrl_reg;
 360         u8 num4bbytes;
 361
 362         num4bbytes = (capabilityoffset + 0x10) / 4;
 363
 364         /*Read  Link Control Register */
 365         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 366
 367         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 368 }
 369
 370 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 371                 struct ieee80211_hw *hw)
 372 {
 373         struct rtl_priv *rtlpriv = rtl_priv(hw);
 374         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 375
 376         u8 tmp;
 377         int pos;
 378         u8 linkctrl_reg;
 379
 380         /*Link Control Register */
 381         pos = pci_pcie_cap(pdev);
 382         pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
 383         pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
 384
 385         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
 386                  ("Link Control Register =%x\n",
 387                   pcipriv->ndis_adapter.linkctrl_reg));
 388
 389         pci_read_config_byte(pdev, 0x98, &tmp);
 390         tmp |= BIT(4);
 391         pci_write_config_byte(pdev, 0x98, tmp);
 392
 393         tmp = 0x17;
 394         pci_write_config_byte(pdev, 0x70f, tmp);
 395 }
 396
 397 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 398 {
 399         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 400
 401         _rtl_pci_update_default_setting(hw);
 402
 403         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 404                 /*Always enable ASPM & Clock Req. */
 405                 rtl_pci_enable_aspm(hw);
 406                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 407         }
 408
 409 }
 410
 411 static void _rtl_pci_io_handler_init(struct device *dev,
 412                                      struct ieee80211_hw *hw)
 413 {
 414         struct rtl_priv *rtlpriv = rtl_priv(hw);
 415
 416         rtlpriv->io.dev = dev;
 417
 418         rtlpriv->io.write8_async = pci_write8_async;
 419         rtlpriv->io.write16_async = pci_write16_async;
 420         rtlpriv->io.write32_async = pci_write32_async;
 421
 422         rtlpriv->io.read8_sync = pci_read8_sync;
 423         rtlpriv->io.read16_sync = pci_read16_sync;
 424         rtlpriv->io.read32_sync = pci_read32_sync;
 425
 426 }
 427
 428 static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
 429 {
 430 }
 431
 432 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 433                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 434 {
 435         struct rtl_priv *rtlpriv = rtl_priv(hw);
 436         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 437         u8 additionlen = FCS_LEN;
 438         struct sk_buff *next_skb;
 439
 440         /* here open is 4, wep/tkip is 8, aes is 12*/
 441         if (info->control.hw_key)
 442                 additionlen += info->control.hw_key->icv_len;
 443
 444         /* The most skb num is 6 */
 445         tcb_desc->empkt_num = 0;
 446         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 447         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 448                 struct ieee80211_tx_info *next_info;
 449
 450                 next_info = IEEE80211_SKB_CB(next_skb);
 451                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 452                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 453                                 next_skb->len + additionlen;
 454                         tcb_desc->empkt_num++;
 455                 } else {
 456                         break;
 457                 }
 458
 459                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 460                                       next_skb))
 461                         break;
 462
 463                 if (tcb_desc->empkt_num >= 5)
 464                         break;
 465         }
 466         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 467
 468         return true;
 469 }
 470
 471 /* just for early mode now */
 472 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 473 {
 474         struct rtl_priv *rtlpriv = rtl_priv(hw);
 475         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 476         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 477         struct sk_buff *skb = NULL;
 478         struct ieee80211_tx_info *info = NULL;
 479         int tid;
 480
 481         if (!rtlpriv->rtlhal.earlymode_enable)
 482                 return;
 483
 484         /* we juse use em for BE/BK/VI/VO */
 485         for (tid = 7; tid >= 0; tid--) {
 486                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(hw, tid)];
 487                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 488                 while (!mac->act_scanning &&
 489                        rtlpriv->psc.rfpwr_state == ERFON) {
 490                         struct rtl_tcb_desc tcb_desc;
 491                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 492
 493                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 494                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 495                            (ring->entries - skb_queue_len(&ring->queue) > 5)) {
 496                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 497                         } else {
 498                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 499                                 break;
 500                         }
 501                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 502
 503                         /* Some macaddr can't do early mode. like
 504                          * multicast/broadcast/no_qos data */
 505                         info = IEEE80211_SKB_CB(skb);
 506                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 507                                 _rtl_update_earlymode_info(hw, skb,
 508                                                            &tcb_desc, tid);
 509
 510                         rtlpriv->intf_ops->adapter_tx(hw, skb, &tcb_desc);
 511                 }
 512         }
 513 }
 514
 515
 516 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 517 {
 518         struct rtl_priv *rtlpriv = rtl_priv(hw);
 519         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 520
 521         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 522
 523         while (skb_queue_len(&ring->queue)) {
 524                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
 525                 struct sk_buff *skb;
 526                 struct ieee80211_tx_info *info;
 527                 __le16 fc;
 528                 u8 tid;
 529
 530                 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
 531                                                           HW_DESC_OWN);
 532
 533                 /*
 534                  *beacon packet will only use the first
 535                  *descriptor defautly,and the own may not
 536                  *be cleared by the hardware
 537                  */
 538                 if (own)
 539                         return;
 540                 ring->idx = (ring->idx + 1) % ring->entries;
 541
 542                 skb = __skb_dequeue(&ring->queue);
 543                 pci_unmap_single(rtlpci->pdev,
 544                                  rtlpriv->cfg->ops->
 545                                              get_desc((u8 *) entry, true,
 546                                                       HW_DESC_TXBUFF_ADDR),
 547                                  skb->len, PCI_DMA_TODEVICE);
 548
 549                 /* remove early mode header */
 550                 if (rtlpriv->rtlhal.earlymode_enable)
 551                         skb_pull(skb, EM_HDR_LEN);
 552
 553                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 554                          ("new ring->idx:%d, "
 555                           "free: skb_queue_len:%d, free: seq:%x\n",
 556                           ring->idx,
 557                           skb_queue_len(&ring->queue),
 558                           *(u16 *) (skb->data + 22)));
 559
 560                 if (prio == TXCMD_QUEUE) {
 561                         dev_kfree_skb(skb);
 562                         goto tx_status_ok;
 563
 564                 }
 565
 566                 /* for sw LPS, just after NULL skb send out, we can
 567                  * sure AP kown we are sleeped, our we should not let
 568                  * rf to sleep*/
 569                 fc = rtl_get_fc(skb);
 570                 if (ieee80211_is_nullfunc(fc)) {
 571                         if (ieee80211_has_pm(fc)) {
 572                                 rtlpriv->mac80211.offchan_delay = true;
 573                                 rtlpriv->psc.state_inap = true;
 574                         } else {
 575                                 rtlpriv->psc.state_inap = false;
 576                         }
 577                 }
 578
 579                 /* update tid tx pkt num */
 580                 tid = rtl_get_tid(skb);
 581                 if (tid <= 7)
 582                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 583
 584                 info = IEEE80211_SKB_CB(skb);
 585                 ieee80211_tx_info_clear_status(info);
 586
 587                 info->flags |= IEEE80211_TX_STAT_ACK;
 588                 /*info->status.rates[0].count = 1; */
 589
 590                 ieee80211_tx_status_irqsafe(hw, skb);
 591
 592                 if ((ring->entries - skb_queue_len(&ring->queue))
 593                                 == 2) {
 594
 595                         RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
 596                                         ("more desc left, wake"
 597                                          "skb_queue@%d,ring->idx = %d,"
 598                                          "skb_queue_len = 0x%d\n",
 599                                          prio, ring->idx,
 600                                          skb_queue_len(&ring->queue)));
 601
 602                         ieee80211_wake_queue(hw,
 603                                         skb_get_queue_mapping
 604                                         (skb));
 605                 }
 606 tx_status_ok:
 607                 skb = NULL;
 608         }
 609
 610         if (((rtlpriv->link_info.num_rx_inperiod +
 611                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 612                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 613                 schedule_work(&rtlpriv->works.lps_leave_work);
 614         }
 615 }
 616
 617 static void _rtl_receive_one(struct ieee80211_hw *hw, struct sk_buff *skb,
 618                              struct ieee80211_rx_status rx_status)
 619 {
 620         struct rtl_priv *rtlpriv = rtl_priv(hw);
 621         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
 622         __le16 fc = rtl_get_fc(skb);
 623         bool unicast = false;
 624         struct sk_buff *uskb = NULL;
 625         u8 *pdata;
 626
 627
 628         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 629
 630         if (is_broadcast_ether_addr(hdr->addr1)) {
 631                 ;/*TODO*/
 632         } else if (is_multicast_ether_addr(hdr->addr1)) {
 633                 ;/*TODO*/
 634         } else {
 635                 unicast = true;
 636                 rtlpriv->stats.rxbytesunicast += skb->len;
 637         }
 638
 639         rtl_is_special_data(hw, skb, false);
 640
 641         if (ieee80211_is_data(fc)) {
 642                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 643
 644                 if (unicast)
 645                         rtlpriv->link_info.num_rx_inperiod++;
 646         }
 647
 648         /* for sw lps */
 649         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 650         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 651         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 652             (rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G) &&
 653              (ieee80211_is_beacon(fc) || ieee80211_is_probe_resp(fc)))
 654                 return;
 655
 656         if (unlikely(!rtl_action_proc(hw, skb, false)))
 657                 return;
 658
 659         uskb = dev_alloc_skb(skb->len + 128);
 660         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status, sizeof(rx_status));
 661         pdata = (u8 *)skb_put(uskb, skb->len);
 662         memcpy(pdata, skb->data, skb->len);
 663
 664         ieee80211_rx_irqsafe(hw, uskb);
 665 }
 666
 667 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 668 {
 669         struct rtl_priv *rtlpriv = rtl_priv(hw);
 670         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 671         int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
 672
 673         struct ieee80211_rx_status rx_status = { 0 };
 674         unsigned int count = rtlpci->rxringcount;
 675         u8 own;
 676         u8 tmp_one;
 677         u32 bufferaddress;
 678
 679         struct rtl_stats stats = {
 680                 .signal = 0,
 681                 .noise = -98,
 682                 .rate = 0,
 683         };
 684         int index = rtlpci->rx_ring[rx_queue_idx].idx;
 685
 686         /*RX NORMAL PKT */
 687         while (count--) {
 688                 /*rx descriptor */
 689                 struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
 690                                 index];
 691                 /*rx pkt */
 692                 struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
 693                                 index];
 694                 struct sk_buff *new_skb = NULL;
 695
 696                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
 697                                                        false, HW_DESC_OWN);
 698
 699                 /*wait data to be filled by hardware */
 700                 if (own)
 701                         break;
 702
 703                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 704                                                  &rx_status,
 705                                                  (u8 *) pdesc, skb);
 706
 707                 if (stats.crc || stats.hwerror)
 708                         goto done;
 709
 710                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 711                 if (unlikely(!new_skb)) {
 712                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV),
 713                                  DBG_DMESG,
 714                                  ("can't alloc skb for rx\n"));
 715                         goto done;
 716                 }
 717
 718                 pci_unmap_single(rtlpci->pdev,
 719                                  *((dma_addr_t *) skb->cb),
 720                                  rtlpci->rxbuffersize,
 721                                  PCI_DMA_FROMDEVICE);
 722
 723                 skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc, false,
 724                         HW_DESC_RXPKT_LEN));
 725                 skb_reserve(skb, stats.rx_drvinfo_size + stats.rx_bufshift);
 726
 727                 /*
 728                  * NOTICE This can not be use for mac80211,
 729                  * this is done in mac80211 code,
 730                  * if you done here sec DHCP will fail
 731                  * skb_trim(skb, skb->len - 4);
 732                  */
 733
 734                 _rtl_receive_one(hw, skb, rx_status);
 735
 736                 if (((rtlpriv->link_info.num_rx_inperiod +
 737                         rtlpriv->link_info.num_tx_inperiod) > 8) ||
 738                         (rtlpriv->link_info.num_rx_inperiod > 2)) {
 739                         schedule_work(&rtlpriv->works.lps_leave_work);
 740                 }
 741
 742                 dev_kfree_skb_any(skb);
 743                 skb = new_skb;
 744
 745                 rtlpci->rx_ring[rx_queue_idx].rx_buf[index] = skb;
 746                 *((dma_addr_t *) skb->cb) =
 747                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 748                                            rtlpci->rxbuffersize,
 749                                            PCI_DMA_FROMDEVICE);
 750
 751 done:
 752                 bufferaddress = (*((dma_addr_t *)skb->cb));
 753                 tmp_one = 1;
 754                 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
 755                                             HW_DESC_RXBUFF_ADDR,
 756                                             (u8 *)&bufferaddress);
 757                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 758                                             HW_DESC_RXPKT_LEN,
 759                                             (u8 *)&rtlpci->rxbuffersize);
 760
 761                 if (index == rtlpci->rxringcount - 1)
 762                         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 763                                                     HW_DESC_RXERO,
 764                                                     (u8 *)&tmp_one);
 765
 766                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
 767                                             (u8 *)&tmp_one);
 768
 769                 index = (index + 1) % rtlpci->rxringcount;
 770         }
 771
 772         rtlpci->rx_ring[rx_queue_idx].idx = index;
 773 }
 774
 775 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 776 {
 777         struct ieee80211_hw *hw = dev_id;
 778         struct rtl_priv *rtlpriv = rtl_priv(hw);
 779         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 780         unsigned long flags;
 781         u32 inta = 0;
 782         u32 intb = 0;
 783         irqreturn_t ret = IRQ_HANDLED;
 784
 785         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 786
 787         /*read ISR: 4/8bytes */
 788         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 789
 790         /*Shared IRQ or HW disappared */
 791         if (!inta || inta == 0xffff) {
 792                 ret = IRQ_NONE;
 793                 goto done;
 794         }
 795
 796         /*<1> beacon related */
 797         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 798                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 799                          ("beacon ok interrupt!\n"));
 800         }
 801
 802         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 803                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 804                          ("beacon err interrupt!\n"));
 805         }
 806
 807         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 808                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 809                          ("beacon interrupt!\n"));
 810         }
 811
 812         if (inta & rtlpriv->cfg->maps[RTL_IMR_BcnInt]) {
 813                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 814                          ("prepare beacon for interrupt!\n"));
 815                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 816         }
 817
 818         /*<3> Tx related */
 819         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 820                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("IMR_TXFOVW!\n"));
 821
 822         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 823                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 824                          ("Manage ok interrupt!\n"));
 825                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 826         }
 827
 828         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 829                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 830                          ("HIGH_QUEUE ok interrupt!\n"));
 831                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 832         }
 833
 834         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 835                 rtlpriv->link_info.num_tx_inperiod++;
 836
 837                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 838                          ("BK Tx OK interrupt!\n"));
 839                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 840         }
 841
 842         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 843                 rtlpriv->link_info.num_tx_inperiod++;
 844
 845                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 846                          ("BE TX OK interrupt!\n"));
 847                 _rtl_pci_tx_isr(hw, BE_QUEUE);
 848         }
 849
 850         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 851                 rtlpriv->link_info.num_tx_inperiod++;
 852
 853                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 854                          ("VI TX OK interrupt!\n"));
 855                 _rtl_pci_tx_isr(hw, VI_QUEUE);
 856         }
 857
 858         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
 859                 rtlpriv->link_info.num_tx_inperiod++;
 860
 861                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 862                          ("Vo TX OK interrupt!\n"));
 863                 _rtl_pci_tx_isr(hw, VO_QUEUE);
 864         }
 865
 866         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
 867                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
 868                         rtlpriv->link_info.num_tx_inperiod++;
 869
 870                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 871                                         ("CMD TX OK interrupt!\n"));
 872                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
 873                 }
 874         }
 875
 876         /*<2> Rx related */
 877         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
 878                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n"));
 879                 _rtl_pci_rx_interrupt(hw);
 880         }
 881
 882         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
 883                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 884                          ("rx descriptor unavailable!\n"));
 885                 _rtl_pci_rx_interrupt(hw);
 886         }
 887
 888         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
 889                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n"));
 890                 _rtl_pci_rx_interrupt(hw);
 891         }
 892
 893         if (rtlpriv->rtlhal.earlymode_enable)
 894                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
 895
 896 done:
 897         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 898         return ret;
 899 }
 900
 901 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
 902 {
 903         _rtl_pci_tx_chk_waitq(hw);
 904 }
 905
 906 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
 907 {
 908         struct rtl_priv *rtlpriv = rtl_priv(hw);
 909         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 910         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 911         struct rtl8192_tx_ring *ring = NULL;
 912         struct ieee80211_hdr *hdr = NULL;
 913         struct ieee80211_tx_info *info = NULL;
 914         struct sk_buff *pskb = NULL;
 915         struct rtl_tx_desc *pdesc = NULL;
 916         struct rtl_tcb_desc tcb_desc;
 917         u8 temp_one = 1;
 918
 919         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 920         ring = &rtlpci->tx_ring[BEACON_QUEUE];
 921         pskb = __skb_dequeue(&ring->queue);
 922         if (pskb)
 923                 kfree_skb(pskb);
 924
 925         /*NB: the beacon data buffer must be 32-bit aligned. */
 926         pskb = ieee80211_beacon_get(hw, mac->vif);
 927         if (pskb == NULL)
 928                 return;
 929         hdr = rtl_get_hdr(pskb);
 930         info = IEEE80211_SKB_CB(pskb);
 931         pdesc = &ring->desc[0];
 932         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
 933                 info, pskb, BEACON_QUEUE, &tcb_desc);
 934
 935         __skb_queue_tail(&ring->queue, pskb);
 936
 937         rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
 938                                     (u8 *)&temp_one);
 939
 940         return;
 941 }
 942
 943 static void rtl_lps_leave_work_callback(struct work_struct *work)
 944 {
 945         struct rtl_works *rtlworks =
 946             container_of(work, struct rtl_works, lps_leave_work);
 947         struct ieee80211_hw *hw = rtlworks->hw;
 948
 949         rtl_lps_leave(hw);
 950 }
 951
 952 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
 953 {
 954         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 955         u8 i;
 956
 957         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
 958                 rtlpci->txringcount[i] = RT_TXDESC_NUM;
 959
 960         /*
 961          *we just alloc 2 desc for beacon queue,
 962          *because we just need first desc in hw beacon.
 963          */
 964         rtlpci->txringcount[BEACON_QUEUE] = 2;
 965
 966         /*
 967          *BE queue need more descriptor for performance
 968          *consideration or, No more tx desc will happen,
 969          *and may cause mac80211 mem leakage.
 970          */
 971         rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
 972
 973         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
 974         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
 975 }
 976
 977 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
 978                 struct pci_dev *pdev)
 979 {
 980         struct rtl_priv *rtlpriv = rtl_priv(hw);
 981         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 982         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 983         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 984
 985         rtlpci->up_first_time = true;
 986         rtlpci->being_init_adapter = false;
 987
 988         rtlhal->hw = hw;
 989         rtlpci->pdev = pdev;
 990
 991         /*Tx/Rx related var */
 992         _rtl_pci_init_trx_var(hw);
 993
 994         /*IBSS*/ mac->beacon_interval = 100;
 995
 996         /*AMPDU*/
 997         mac->min_space_cfg = 0;
 998         mac->max_mss_density = 0;
 999         /*set sane AMPDU defaults */
1000         mac->current_ampdu_density = 7;
1001         mac->current_ampdu_factor = 3;
1002
1003         /*QOS*/
1004         rtlpci->acm_method = eAcmWay2_SW;
1005
1006         /*task */
1007         tasklet_init(&rtlpriv->works.irq_tasklet,
1008                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1009                      (unsigned long)hw);
1010         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1011                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1012                      (unsigned long)hw);
1013         INIT_WORK(&rtlpriv->works.lps_leave_work, rtl_lps_leave_work_callback);
1014 }
1015
1016 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1017                                  unsigned int prio, unsigned int entries)
1018 {
1019         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1020         struct rtl_priv *rtlpriv = rtl_priv(hw);
1021         struct rtl_tx_desc *ring;
1022         dma_addr_t dma;
1023         u32 nextdescaddress;
1024         int i;
1025
1026         ring = pci_alloc_consistent(rtlpci->pdev,
1027                                     sizeof(*ring) * entries, &dma);
1028
1029         if (!ring || (unsigned long)ring & 0xFF) {
1030                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1031                          ("Cannot allocate TX ring (prio = %d)\n", prio));
1032                 return -ENOMEM;
1033         }
1034
1035         memset(ring, 0, sizeof(*ring) * entries);
1036         rtlpci->tx_ring[prio].desc = ring;
1037         rtlpci->tx_ring[prio].dma = dma;
1038         rtlpci->tx_ring[prio].idx = 0;
1039         rtlpci->tx_ring[prio].entries = entries;
1040         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1041
1042         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1043                  ("queue:%d, ring_addr:%p\n", prio, ring));
1044
1045         for (i = 0; i < entries; i++) {
1046                 nextdescaddress = (u32) dma +
1047                                               ((i + 1) % entries) *
1048                                               sizeof(*ring);
1049
1050                 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1051                                             true, HW_DESC_TX_NEXTDESC_ADDR,
1052                                             (u8 *)&nextdescaddress);
1053         }
1054
1055         return 0;
1056 }
1057
1058 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1059 {
1060         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1061         struct rtl_priv *rtlpriv = rtl_priv(hw);
1062         struct rtl_rx_desc *entry = NULL;
1063         int i, rx_queue_idx;
1064         u8 tmp_one = 1;
1065
1066         /*
1067          *rx_queue_idx 0:RX_MPDU_QUEUE
1068          *rx_queue_idx 1:RX_CMD_QUEUE
1069          */
1070         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1071              rx_queue_idx++) {
1072                 rtlpci->rx_ring[rx_queue_idx].desc =
1073                     pci_alloc_consistent(rtlpci->pdev,
1074                                          sizeof(*rtlpci->rx_ring[rx_queue_idx].
1075                                                 desc) * rtlpci->rxringcount,
1076                                          &rtlpci->rx_ring[rx_queue_idx].dma);
1077
1078                 if (!rtlpci->rx_ring[rx_queue_idx].desc ||
1079                     (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
1080                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1081                                  ("Cannot allocate RX ring\n"));
1082                         return -ENOMEM;
1083                 }
1084
1085                 memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
1086                        sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
1087                        rtlpci->rxringcount);
1088
1089                 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1090
1091                 /* If amsdu_8k is disabled, set buffersize to 4096. This
1092                  * change will reduce memory fragmentation.
1093                  */
1094                 if (rtlpci->rxbuffersize > 4096 &&
1095                     rtlpriv->rtlhal.disable_amsdu_8k)
1096                         rtlpci->rxbuffersize = 4096;
1097
1098                 for (i = 0; i < rtlpci->rxringcount; i++) {
1099                         struct sk_buff *skb =
1100                             dev_alloc_skb(rtlpci->rxbuffersize);
1101                         u32 bufferaddress;
1102                         if (!skb)
1103                                 return 0;
1104                         entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1105
1106                         /*skb->dev = dev; */
1107
1108                         rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
1109
1110                         /*
1111                          *just set skb->cb to mapping addr
1112                          *for pci_unmap_single use
1113                          */
1114                         *((dma_addr_t *) skb->cb) =
1115                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
1116                                            rtlpci->rxbuffersize,
1117                                            PCI_DMA_FROMDEVICE);
1118
1119                         bufferaddress = (*((dma_addr_t *)skb->cb));
1120                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1121                                                     HW_DESC_RXBUFF_ADDR,
1122                                                     (u8 *)&bufferaddress);
1123                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1124                                                     HW_DESC_RXPKT_LEN,
1125                                                     (u8 *)&rtlpci->
1126                                                     rxbuffersize);
1127                         rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1128                                                     HW_DESC_RXOWN,
1129                                                     (u8 *)&tmp_one);
1130                 }
1131
1132                 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1133                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1134         }
1135         return 0;
1136 }
1137
1138 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1139                 unsigned int prio)
1140 {
1141         struct rtl_priv *rtlpriv = rtl_priv(hw);
1142         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1143         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1144
1145         while (skb_queue_len(&ring->queue)) {
1146                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
1147                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1148
1149                 pci_unmap_single(rtlpci->pdev,
1150                                  rtlpriv->cfg->
1151                                              ops->get_desc((u8 *) entry, true,
1152                                                    HW_DESC_TXBUFF_ADDR),
1153                                  skb->len, PCI_DMA_TODEVICE);
1154                 kfree_skb(skb);
1155                 ring->idx = (ring->idx + 1) % ring->entries;
1156         }
1157
1158         pci_free_consistent(rtlpci->pdev,
1159                             sizeof(*ring->desc) * ring->entries,
1160                             ring->desc, ring->dma);
1161         ring->desc = NULL;
1162 }
1163
1164 static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
1165 {
1166         int i, rx_queue_idx;
1167
1168         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1169         /*rx_queue_idx 1:RX_CMD_QUEUE */
1170         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1171              rx_queue_idx++) {
1172                 for (i = 0; i < rtlpci->rxringcount; i++) {
1173                         struct sk_buff *skb =
1174                             rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
1175                         if (!skb)
1176                                 continue;
1177
1178                         pci_unmap_single(rtlpci->pdev,
1179                                          *((dma_addr_t *) skb->cb),
1180                                          rtlpci->rxbuffersize,
1181                                          PCI_DMA_FROMDEVICE);
1182                         kfree_skb(skb);
1183                 }
1184
1185                 pci_free_consistent(rtlpci->pdev,
1186                                     sizeof(*rtlpci->rx_ring[rx_queue_idx].
1187                                            desc) * rtlpci->rxringcount,
1188                                     rtlpci->rx_ring[rx_queue_idx].desc,
1189                                     rtlpci->rx_ring[rx_queue_idx].dma);
1190                 rtlpci->rx_ring[rx_queue_idx].desc = NULL;
1191         }
1192 }
1193
1194 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1195 {
1196         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1197         int ret;
1198         int i;
1199
1200         ret = _rtl_pci_init_rx_ring(hw);
1201         if (ret)
1202                 return ret;
1203
1204         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1205                 ret = _rtl_pci_init_tx_ring(hw, i,
1206                                  rtlpci->txringcount[i]);
1207                 if (ret)
1208                         goto err_free_rings;
1209         }
1210
1211         return 0;
1212
1213 err_free_rings:
1214         _rtl_pci_free_rx_ring(rtlpci);
1215
1216         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1217                 if (rtlpci->tx_ring[i].desc)
1218                         _rtl_pci_free_tx_ring(hw, i);
1219
1220         return 1;
1221 }
1222
1223 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1224 {
1225         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1226         u32 i;
1227
1228         /*free rx rings */
1229         _rtl_pci_free_rx_ring(rtlpci);
1230
1231         /*free tx rings */
1232         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1233                 _rtl_pci_free_tx_ring(hw, i);
1234
1235         return 0;
1236 }
1237
1238 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1239 {
1240         struct rtl_priv *rtlpriv = rtl_priv(hw);
1241         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1242         int i, rx_queue_idx;
1243         unsigned long flags;
1244         u8 tmp_one = 1;
1245
1246         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1247         /*rx_queue_idx 1:RX_CMD_QUEUE */
1248         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1249              rx_queue_idx++) {
1250                 /*
1251                  *force the rx_ring[RX_MPDU_QUEUE/
1252                  *RX_CMD_QUEUE].idx to the first one
1253                  */
1254                 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1255                         struct rtl_rx_desc *entry = NULL;
1256
1257                         for (i = 0; i < rtlpci->rxringcount; i++) {
1258                                 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1259                                 rtlpriv->cfg->ops->set_desc((u8 *) entry,
1260                                                             false,
1261                                                             HW_DESC_RXOWN,
1262                                                             (u8 *)&tmp_one);
1263                         }
1264                         rtlpci->rx_ring[rx_queue_idx].idx = 0;
1265                 }
1266         }
1267
1268         /*
1269          *after reset, release previous pending packet,
1270          *and force the  tx idx to the first one
1271          */
1272         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1273         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1274                 if (rtlpci->tx_ring[i].desc) {
1275                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1276
1277                         while (skb_queue_len(&ring->queue)) {
1278                                 struct rtl_tx_desc *entry =
1279                                     &ring->desc[ring->idx];
1280                                 struct sk_buff *skb =
1281                                     __skb_dequeue(&ring->queue);
1282
1283                                 pci_unmap_single(rtlpci->pdev,
1284                                                  rtlpriv->cfg->ops->
1285                                                          get_desc((u8 *)
1286                                                          entry,
1287                                                          true,
1288                                                          HW_DESC_TXBUFF_ADDR),
1289                                                  skb->len, PCI_DMA_TODEVICE);
1290                                 kfree_skb(skb);
1291                                 ring->idx = (ring->idx + 1) % ring->entries;
1292                         }
1293                         ring->idx = 0;
1294                 }
1295         }
1296
1297         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1298
1299         return 0;
1300 }
1301
1302 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1303                                         struct sk_buff *skb)
1304 {
1305         struct rtl_priv *rtlpriv = rtl_priv(hw);
1306         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1307         struct ieee80211_sta *sta = info->control.sta;
1308         struct rtl_sta_info *sta_entry = NULL;
1309         u8 tid = rtl_get_tid(skb);
1310
1311         if (!sta)
1312                 return false;
1313         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1314
1315         if (!rtlpriv->rtlhal.earlymode_enable)
1316                 return false;
1317         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1318                 return false;
1319         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1320                 return false;
1321         if (tid > 7)
1322                 return false;
1323
1324         /* maybe every tid should be checked */
1325         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1326                 return false;
1327
1328         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1329         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1330         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1331
1332         return true;
1333 }
1334
1335 static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1336                 struct rtl_tcb_desc *ptcb_desc)
1337 {
1338         struct rtl_priv *rtlpriv = rtl_priv(hw);
1339         struct rtl_sta_info *sta_entry = NULL;
1340         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1341         struct ieee80211_sta *sta = info->control.sta;
1342         struct rtl8192_tx_ring *ring;
1343         struct rtl_tx_desc *pdesc;
1344         u8 idx;
1345         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1346         unsigned long flags;
1347         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1348         __le16 fc = rtl_get_fc(skb);
1349         u8 *pda_addr = hdr->addr1;
1350         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1351         /*ssn */
1352         u8 tid = 0;
1353         u16 seq_number = 0;
1354         u8 own;
1355         u8 temp_one = 1;
1356
1357         if (ieee80211_is_auth(fc)) {
1358                 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
1359                 rtl_ips_nic_on(hw);
1360         }
1361
1362         if (rtlpriv->psc.sw_ps_enabled) {
1363                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1364                         !ieee80211_has_pm(fc))
1365                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1366         }
1367
1368         rtl_action_proc(hw, skb, true);
1369
1370         if (is_multicast_ether_addr(pda_addr))
1371                 rtlpriv->stats.txbytesmulticast += skb->len;
1372         else if (is_broadcast_ether_addr(pda_addr))
1373                 rtlpriv->stats.txbytesbroadcast += skb->len;
1374         else
1375                 rtlpriv->stats.txbytesunicast += skb->len;
1376
1377         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1378         ring = &rtlpci->tx_ring[hw_queue];
1379         if (hw_queue != BEACON_QUEUE)
1380                 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1381                                 ring->entries;
1382         else
1383                 idx = 0;
1384
1385         pdesc = &ring->desc[idx];
1386         own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
1387                         true, HW_DESC_OWN);
1388
1389         if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1390                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1391                          ("No more TX desc@%d, ring->idx = %d,"
1392                           "idx = %d, skb_queue_len = 0x%d\n",
1393                           hw_queue, ring->idx, idx,
1394                           skb_queue_len(&ring->queue)));
1395
1396                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1397                 return skb->len;
1398         }
1399
1400         if (ieee80211_is_data_qos(fc)) {
1401                 tid = rtl_get_tid(skb);
1402                 if (sta) {
1403                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1404                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1405                                       IEEE80211_SCTL_SEQ) >> 4;
1406                         seq_number += 1;
1407
1408                         if (!ieee80211_has_morefrags(hdr->frame_control))
1409                                 sta_entry->tids[tid].seq_number = seq_number;
1410                 }
1411         }
1412
1413         if (ieee80211_is_data(fc))
1414                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1415
1416         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1417                         info, skb, hw_queue, ptcb_desc);
1418
1419         __skb_queue_tail(&ring->queue, skb);
1420
1421         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
1422                                     HW_DESC_OWN, (u8 *)&temp_one);
1423
1424
1425         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1426             hw_queue != BEACON_QUEUE) {
1427
1428                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1429                          ("less desc left, stop skb_queue@%d, "
1430                           "ring->idx = %d,"
1431                           "idx = %d, skb_queue_len = 0x%d\n",
1432                           hw_queue, ring->idx, idx,
1433                           skb_queue_len(&ring->queue)));
1434
1435                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1436         }
1437
1438         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1439
1440         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1441
1442         return 0;
1443 }
1444
1445 static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1446 {
1447         struct rtl_priv *rtlpriv = rtl_priv(hw);
1448         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1449         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1450         u16 i = 0;
1451         int queue_id;
1452         struct rtl8192_tx_ring *ring;
1453
1454         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1455                 u32 queue_len;
1456                 ring = &pcipriv->dev.tx_ring[queue_id];
1457                 queue_len = skb_queue_len(&ring->queue);
1458                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1459                         queue_id == TXCMD_QUEUE) {
1460                         queue_id--;
1461                         continue;
1462                 } else {
1463                         msleep(20);
1464                         i++;
1465                 }
1466
1467                 /* we just wait 1s for all queues */
1468                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1469                         is_hal_stop(rtlhal) || i >= 200)
1470                         return;
1471         }
1472 }
1473
1474 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1475 {
1476         struct rtl_priv *rtlpriv = rtl_priv(hw);
1477         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1478
1479         _rtl_pci_deinit_trx_ring(hw);
1480
1481         synchronize_irq(rtlpci->pdev->irq);
1482         tasklet_kill(&rtlpriv->works.irq_tasklet);
1483         cancel_work_sync(&rtlpriv->works.lps_leave_work);
1484
1485         flush_workqueue(rtlpriv->works.rtl_wq);
1486         destroy_workqueue(rtlpriv->works.rtl_wq);
1487
1488 }
1489
1490 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1491 {
1492         struct rtl_priv *rtlpriv = rtl_priv(hw);
1493         int err;
1494
1495         _rtl_pci_init_struct(hw, pdev);
1496
1497         err = _rtl_pci_init_trx_ring(hw);
1498         if (err) {
1499                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1500                          ("tx ring initialization failed"));
1501                 return err;
1502         }
1503
1504         return 1;
1505 }
1506
1507 static int rtl_pci_start(struct ieee80211_hw *hw)
1508 {
1509         struct rtl_priv *rtlpriv = rtl_priv(hw);
1510         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1511         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1512         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1513
1514         int err;
1515
1516         rtl_pci_reset_trx_ring(hw);
1517
1518         rtlpci->driver_is_goingto_unload = false;
1519         err = rtlpriv->cfg->ops->hw_init(hw);
1520         if (err) {
1521                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1522                          ("Failed to config hardware!\n"));
1523                 return err;
1524         }
1525
1526         rtlpriv->cfg->ops->enable_interrupt(hw);
1527         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("enable_interrupt OK\n"));
1528
1529         rtl_init_rx_config(hw);
1530
1531         /*should be after adapter start and interrupt enable. */
1532         set_hal_start(rtlhal);
1533
1534         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1535
1536         rtlpci->up_first_time = false;
1537
1538         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("OK\n"));
1539         return 0;
1540 }
1541
1542 static void rtl_pci_stop(struct ieee80211_hw *hw)
1543 {
1544         struct rtl_priv *rtlpriv = rtl_priv(hw);
1545         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1546         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1547         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1548         unsigned long flags;
1549         u8 RFInProgressTimeOut = 0;
1550
1551         /*
1552          *should be before disable interrupt&adapter
1553          *and will do it immediately.
1554          */
1555         set_hal_stop(rtlhal);
1556
1557         rtlpriv->cfg->ops->disable_interrupt(hw);
1558         cancel_work_sync(&rtlpriv->works.lps_leave_work);
1559
1560         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1561         while (ppsc->rfchange_inprogress) {
1562                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1563                 if (RFInProgressTimeOut > 100) {
1564                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1565                         break;
1566                 }
1567                 mdelay(1);
1568                 RFInProgressTimeOut++;
1569                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1570         }
1571         ppsc->rfchange_inprogress = true;
1572         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1573
1574         rtlpci->driver_is_goingto_unload = true;
1575         rtlpriv->cfg->ops->hw_disable(hw);
1576         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1577
1578         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1579         ppsc->rfchange_inprogress = false;
1580         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1581
1582         rtl_pci_enable_aspm(hw);
1583 }
1584
1585 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1586                 struct ieee80211_hw *hw)
1587 {
1588         struct rtl_priv *rtlpriv = rtl_priv(hw);
1589         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1590         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1591         struct pci_dev *bridge_pdev = pdev->bus->self;
1592         u16 venderid;
1593         u16 deviceid;
1594         u8 revisionid;
1595         u16 irqline;
1596         u8 tmp;
1597
1598         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1599         venderid = pdev->vendor;
1600         deviceid = pdev->device;
1601         pci_read_config_byte(pdev, 0x8, &revisionid);
1602         pci_read_config_word(pdev, 0x3C, &irqline);
1603
1604         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1605          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1606          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1607          * the correct driver is r8192e_pci, thus this routine should
1608          * return false.
1609          */
1610         if (deviceid == RTL_PCI_8192SE_DID &&
1611             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1612                 return false;
1613
1614         if (deviceid == RTL_PCI_8192_DID ||
1615             deviceid == RTL_PCI_0044_DID ||
1616             deviceid == RTL_PCI_0047_DID ||
1617             deviceid == RTL_PCI_8192SE_DID ||
1618             deviceid == RTL_PCI_8174_DID ||
1619             deviceid == RTL_PCI_8173_DID ||
1620             deviceid == RTL_PCI_8172_DID ||
1621             deviceid == RTL_PCI_8171_DID) {
1622                 switch (revisionid) {
1623                 case RTL_PCI_REVISION_ID_8192PCIE:
1624                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1625                                  ("8192 PCI-E is found - "
1626                                   "vid/did=%x/%x\n", venderid, deviceid));
1627                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1628                         break;
1629                 case RTL_PCI_REVISION_ID_8192SE:
1630                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1631                                  ("8192SE is found - "
1632                                   "vid/did=%x/%x\n", venderid, deviceid));
1633                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1634                         break;
1635                 default:
1636                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1637                                  ("Err: Unknown device - "
1638                                   "vid/did=%x/%x\n", venderid, deviceid));
1639                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1640                         break;
1641
1642                 }
1643         } else if (deviceid == RTL_PCI_8192CET_DID ||
1644                    deviceid == RTL_PCI_8192CE_DID ||
1645                    deviceid == RTL_PCI_8191CE_DID ||
1646                    deviceid == RTL_PCI_8188CE_DID) {
1647                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1648                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1649                          ("8192C PCI-E is found - "
1650                           "vid/did=%x/%x\n", venderid, deviceid));
1651         } else if (deviceid == RTL_PCI_8192DE_DID ||
1652                    deviceid == RTL_PCI_8192DE_DID2) {
1653                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1654                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1655                          ("8192D PCI-E is found - "
1656                           "vid/did=%x/%x\n", venderid, deviceid));
1657         } else {
1658                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1659                          ("Err: Unknown device -"
1660                           " vid/did=%x/%x\n", venderid, deviceid));
1661
1662                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1663         }
1664
1665         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1666                 if (revisionid == 0 || revisionid == 1) {
1667                         if (revisionid == 0) {
1668                                 RT_TRACE(rtlpriv, COMP_INIT,
1669                                          DBG_LOUD, ("Find 92DE MAC0.\n"));
1670                                 rtlhal->interfaceindex = 0;
1671                         } else if (revisionid == 1) {
1672                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1673                                         ("Find 92DE MAC1.\n"));
1674                                 rtlhal->interfaceindex = 1;
1675                         }
1676                 } else {
1677                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1678                                 ("Unknown device - "
1679                                 "VendorID/DeviceID=%x/%x, Revision=%x\n",
1680                                 venderid, deviceid, revisionid));
1681                         rtlhal->interfaceindex = 0;
1682                 }
1683         }
1684         /*find bus info */
1685         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1686         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
1687         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
1688
1689         if (bridge_pdev) {
1690                 /*find bridge info if available */
1691                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
1692                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
1693                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
1694                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
1695                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1696                                          ("Pci Bridge Vendor is found index:"
1697                                          " %d\n", tmp));
1698                                 break;
1699                         }
1700                 }
1701         }
1702
1703         if (pcipriv->ndis_adapter.pcibridge_vendor !=
1704                 PCI_BRIDGE_VENDOR_UNKNOWN) {
1705                 pcipriv->ndis_adapter.pcibridge_busnum =
1706                     bridge_pdev->bus->number;
1707                 pcipriv->ndis_adapter.pcibridge_devnum =
1708                     PCI_SLOT(bridge_pdev->devfn);
1709                 pcipriv->ndis_adapter.pcibridge_funcnum =
1710                     PCI_FUNC(bridge_pdev->devfn);
1711                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1712                     pci_pcie_cap(bridge_pdev);
1713                 pcipriv->ndis_adapter.num4bytes =
1714                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1715
1716                 rtl_pci_get_linkcontrol_field(hw);
1717
1718                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
1719                     PCI_BRIDGE_VENDOR_AMD) {
1720                         pcipriv->ndis_adapter.amd_l1_patch =
1721                             rtl_pci_get_amd_l1_patch(hw);
1722                 }
1723         }
1724
1725         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1726                  ("pcidev busnumber:devnumber:funcnumber:"
1727                   "vendor:link_ctl %d:%d:%d:%x:%x\n",
1728                   pcipriv->ndis_adapter.busnumber,
1729                   pcipriv->ndis_adapter.devnumber,
1730                   pcipriv->ndis_adapter.funcnumber,
1731                   pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg));
1732
1733         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1734                  ("pci_bridge busnumber:devnumber:funcnumber:vendor:"
1735                   "pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1736                   pcipriv->ndis_adapter.pcibridge_busnum,
1737                   pcipriv->ndis_adapter.pcibridge_devnum,
1738                   pcipriv->ndis_adapter.pcibridge_funcnum,
1739                   pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
1740                   pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
1741                   pcipriv->ndis_adapter.pcibridge_linkctrlreg,
1742                   pcipriv->ndis_adapter.amd_l1_patch));
1743
1744         rtl_pci_parse_configuration(pdev, hw);
1745
1746         return true;
1747 }
1748
1749 int __devinit rtl_pci_probe(struct pci_dev *pdev,
1750                             const struct pci_device_id *id)
1751 {
1752         struct ieee80211_hw *hw = NULL;
1753
1754         struct rtl_priv *rtlpriv = NULL;
1755         struct rtl_pci_priv *pcipriv = NULL;
1756         struct rtl_pci *rtlpci;
1757         unsigned long pmem_start, pmem_len, pmem_flags;
1758         int err;
1759
1760         err = pci_enable_device(pdev);
1761         if (err) {
1762                 RT_ASSERT(false,
1763                           ("%s : Cannot enable new PCI device\n",
1764                            pci_name(pdev)));
1765                 return err;
1766         }
1767
1768         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1769                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1770                         RT_ASSERT(false, ("Unable to obtain 32bit DMA "
1771                                           "for consistent allocations\n"));
1772                         pci_disable_device(pdev);
1773                         return -ENOMEM;
1774                 }
1775         }
1776
1777         pci_set_master(pdev);
1778
1779         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
1780                                 sizeof(struct rtl_priv), &rtl_ops);
1781         if (!hw) {
1782                 RT_ASSERT(false,
1783                           ("%s : ieee80211 alloc failed\n", pci_name(pdev)));
1784                 err = -ENOMEM;
1785                 goto fail1;
1786         }
1787
1788         SET_IEEE80211_DEV(hw, &pdev->dev);
1789         pci_set_drvdata(pdev, hw);
1790
1791         rtlpriv = hw->priv;
1792         pcipriv = (void *)rtlpriv->priv;
1793         pcipriv->dev.pdev = pdev;
1794
1795         /* init cfg & intf_ops */
1796         rtlpriv->rtlhal.interface = INTF_PCI;
1797         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1798         rtlpriv->intf_ops = &rtl_pci_ops;
1799
1800         /*
1801          *init dbgp flags before all
1802          *other functions, because we will
1803          *use it in other funtions like
1804          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1805          *you can not use these macro
1806          *before this
1807          */
1808         rtl_dbgp_flag_init(hw);
1809
1810         /* MEM map */
1811         err = pci_request_regions(pdev, KBUILD_MODNAME);
1812         if (err) {
1813                 RT_ASSERT(false, ("Can't obtain PCI resources\n"));
1814                 return err;
1815         }
1816
1817         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1818         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1819         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
1820
1821         /*shared mem start */
1822         rtlpriv->io.pci_mem_start =
1823                         (unsigned long)pci_iomap(pdev,
1824                         rtlpriv->cfg->bar_id, pmem_len);
1825         if (rtlpriv->io.pci_mem_start == 0) {
1826                 RT_ASSERT(false, ("Can't map PCI mem\n"));
1827                 goto fail2;
1828         }
1829
1830         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1831                  ("mem mapped space: start: 0x%08lx len:%08lx "
1832                   "flags:%08lx, after map:0x%08lx\n",
1833                   pmem_start, pmem_len, pmem_flags,
1834                   rtlpriv->io.pci_mem_start));
1835
1836         /* Disable Clk Request */
1837         pci_write_config_byte(pdev, 0x81, 0);
1838         /* leave D3 mode */
1839         pci_write_config_byte(pdev, 0x44, 0);
1840         pci_write_config_byte(pdev, 0x04, 0x06);
1841         pci_write_config_byte(pdev, 0x04, 0x07);
1842
1843         /* find adapter */
1844         if (!_rtl_pci_find_adapter(pdev, hw))
1845                 goto fail3;
1846
1847         /* Init IO handler */
1848         _rtl_pci_io_handler_init(&pdev->dev, hw);
1849
1850         /*like read eeprom and so on */
1851         rtlpriv->cfg->ops->read_eeprom_info(hw);
1852
1853         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
1854                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1855                          ("Can't init_sw_vars.\n"));
1856                 goto fail3;
1857         }
1858
1859         rtlpriv->cfg->ops->init_sw_leds(hw);
1860
1861         /*aspm */
1862         rtl_pci_init_aspm(hw);
1863
1864         /* Init mac80211 sw */
1865         err = rtl_init_core(hw);
1866         if (err) {
1867                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1868                          ("Can't allocate sw for mac80211.\n"));
1869                 goto fail3;
1870         }
1871
1872         /* Init PCI sw */
1873         err = !rtl_pci_init(hw, pdev);
1874         if (err) {
1875                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1876                          ("Failed to init PCI.\n"));
1877                 goto fail3;
1878         }
1879
1880         err = ieee80211_register_hw(hw);
1881         if (err) {
1882                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1883                          ("Can't register mac80211 hw.\n"));
1884                 goto fail3;
1885         } else {
1886                 rtlpriv->mac80211.mac80211_registered = 1;
1887         }
1888
1889         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
1890         if (err) {
1891                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1892                          ("failed to create sysfs device attributes\n"));
1893                 goto fail3;
1894         }
1895
1896         /*init rfkill */
1897         rtl_init_rfkill(hw);
1898
1899         rtlpci = rtl_pcidev(pcipriv);
1900         err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
1901                           IRQF_SHARED, KBUILD_MODNAME, hw);
1902         if (err) {
1903                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1904                          ("%s: failed to register IRQ handler\n",
1905                           wiphy_name(hw->wiphy)));
1906                 goto fail3;
1907         } else {
1908                 rtlpci->irq_alloc = 1;
1909         }
1910
1911         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1912         return 0;
1913
1914 fail3:
1915         pci_set_drvdata(pdev, NULL);
1916         rtl_deinit_core(hw);
1917         _rtl_pci_io_handler_release(hw);
1918         ieee80211_free_hw(hw);
1919
1920         if (rtlpriv->io.pci_mem_start != 0)
1921                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1922
1923 fail2:
1924         pci_release_regions(pdev);
1925
1926 fail1:
1927
1928         pci_disable_device(pdev);
1929
1930         return -ENODEV;
1931
1932 }
1933 EXPORT_SYMBOL(rtl_pci_probe);
1934
1935 void rtl_pci_disconnect(struct pci_dev *pdev)
1936 {
1937         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1938         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1939         struct rtl_priv *rtlpriv = rtl_priv(hw);
1940         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
1941         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
1942
1943         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1944
1945         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
1946
1947         /*ieee80211_unregister_hw will call ops_stop */
1948         if (rtlmac->mac80211_registered == 1) {
1949                 ieee80211_unregister_hw(hw);
1950                 rtlmac->mac80211_registered = 0;
1951         } else {
1952                 rtl_deinit_deferred_work(hw);
1953                 rtlpriv->intf_ops->adapter_stop(hw);
1954         }
1955
1956         /*deinit rfkill */
1957         rtl_deinit_rfkill(hw);
1958
1959         rtl_pci_deinit(hw);
1960         rtl_deinit_core(hw);
1961         _rtl_pci_io_handler_release(hw);
1962         rtlpriv->cfg->ops->deinit_sw_vars(hw);
1963
1964         if (rtlpci->irq_alloc) {
1965                 free_irq(rtlpci->pdev->irq, hw);
1966                 rtlpci->irq_alloc = 0;
1967         }
1968
1969         if (rtlpriv->io.pci_mem_start != 0) {
1970                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1971                 pci_release_regions(pdev);
1972         }
1973
1974         pci_disable_device(pdev);
1975
1976         rtl_pci_disable_aspm(hw);
1977
1978         pci_set_drvdata(pdev, NULL);
1979
1980         ieee80211_free_hw(hw);
1981 }
1982 EXPORT_SYMBOL(rtl_pci_disconnect);
1983
1984 /***************************************
1985 kernel pci power state define:
1986 PCI_D0         ((pci_power_t __force) 0)
1987 PCI_D1         ((pci_power_t __force) 1)
1988 PCI_D2         ((pci_power_t __force) 2)
1989 PCI_D3hot      ((pci_power_t __force) 3)
1990 PCI_D3cold     ((pci_power_t __force) 4)
1991 PCI_UNKNOWN    ((pci_power_t __force) 5)
1992
1993 This function is called when system
1994 goes into suspend state mac80211 will
1995 call rtl_mac_stop() from the mac80211
1996 suspend function first, So there is
1997 no need to call hw_disable here.
1998 ****************************************/
1999 int rtl_pci_suspend(struct device *dev)
2000 {
2001         struct pci_dev *pdev = to_pci_dev(dev);
2002         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2003         struct rtl_priv *rtlpriv = rtl_priv(hw);
2004
2005         rtlpriv->cfg->ops->hw_suspend(hw);
2006         rtl_deinit_rfkill(hw);
2007
2008         return 0;
2009 }
2010 EXPORT_SYMBOL(rtl_pci_suspend);
2011
2012 int rtl_pci_resume(struct device *dev)
2013 {
2014         struct pci_dev *pdev = to_pci_dev(dev);
2015         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2016         struct rtl_priv *rtlpriv = rtl_priv(hw);
2017
2018         rtlpriv->cfg->ops->hw_resume(hw);
2019         rtl_init_rfkill(hw);
2020         return 0;
2021 }
2022 EXPORT_SYMBOL(rtl_pci_resume);
2023
2024 struct rtl_intf_ops rtl_pci_ops = {
2025         .read_efuse_byte = read_efuse_byte,
2026         .adapter_start = rtl_pci_start,
2027         .adapter_stop = rtl_pci_stop,
2028         .adapter_tx = rtl_pci_tx,
2029         .flush = rtl_pci_flush,
2030         .reset_trx_ring = rtl_pci_reset_trx_ring,
2031         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2032
2033         .disable_aspm = rtl_pci_disable_aspm,
2034         .enable_aspm = rtl_pci_enable_aspm,
2035 };