2 * This file is part of wl1271
4 * Copyright (C) 2008-2009 Nokia Corporation
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 #include <linux/module.h>
25 #include <linux/platform_device.h>
26 #include <linux/crc7.h>
27 #include <linux/spi/spi.h>
30 #include "wl12xx_80211.h"
31 #include "wl1271_spi.h"
33 static int wl1271_translate_addr(struct wl1271 *wl, int addr)
36 * To translate, first check to which window of addresses the
37 * particular address belongs. Then subtract the starting address
38 * of that window from the address. Then, add offset of the
41 * The translated regions occur next to each other in physical device
42 * memory, so just add the sizes of the preceeding address regions to
43 * get the offset to the new region.
45 * Currently, only the two first regions are addressed, and the
46 * assumption is that all addresses will fall into either of those
49 if ((addr >= wl->part.reg.start) &&
50 (addr < wl->part.reg.start + wl->part.reg.size))
51 return addr - wl->part.reg.start + wl->part.mem.size;
53 return addr - wl->part.mem.start;
56 void wl1271_spi_reset(struct wl1271 *wl)
59 struct spi_transfer t;
62 cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
64 wl1271_error("could not allocate cmd for spi reset");
68 memset(&t, 0, sizeof(t));
71 memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
74 t.len = WSPI_INIT_CMD_LEN;
75 spi_message_add_tail(&t, &m);
77 spi_sync(wl->spi, &m);
79 wl1271_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN);
82 void wl1271_spi_init(struct wl1271 *wl)
84 u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
85 struct spi_transfer t;
88 cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
90 wl1271_error("could not allocate cmd for spi init");
94 memset(crc, 0, sizeof(crc));
95 memset(&t, 0, sizeof(t));
99 * Set WSPI_INIT_COMMAND
100 * the data is being send from the MSB to LSB
104 cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
107 cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
108 cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
110 if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
111 cmd[5] |= WSPI_INIT_CMD_DIS_FIXEDBUSY;
113 cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY;
115 cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
116 | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;
124 cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
125 cmd[4] |= WSPI_INIT_CMD_END;
128 t.len = WSPI_INIT_CMD_LEN;
129 spi_message_add_tail(&t, &m);
131 spi_sync(wl->spi, &m);
133 wl1271_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN);
136 /* Set the SPI partitions to access the chip addresses
138 * To simplify driver code, a fixed (virtual) memory map is defined for
139 * register and memory addresses. Because in the chipset, in different stages
140 * of operation, those addresses will move around, an address translation
141 * mechanism is required.
143 * There are four partitions (three memory and one register partition),
144 * which are mapped to two different areas of the hardware memory.
150 * ...+----+--> mem.start
151 * Physical address ... | |
152 * space ... | | [PART_0]
154 * 00000000 <--+----+... ...+----+--> mem.start + mem.size
158 * mem.size <--+----+... | | {unused area)
161 * mem.size | | ... | |
162 * + <--+----+... ...+----+--> reg.start
163 * reg.size | | ... | |
164 * |MEM2| ... | | [PART_1]
166 * ...+----+--> reg.start + reg.size
170 int wl1271_set_partition(struct wl1271 *wl,
171 struct wl1271_partition_set *p)
173 /* copy partition info */
174 memcpy(&wl->part, p, sizeof(*p));
176 wl1271_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
177 p->mem.start, p->mem.size);
178 wl1271_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
179 p->reg.start, p->reg.size);
180 wl1271_debug(DEBUG_SPI, "mem2_start %08X mem2_size %08X",
181 p->mem2.start, p->mem2.size);
182 wl1271_debug(DEBUG_SPI, "mem3_start %08X mem3_size %08X",
183 p->mem3.start, p->mem3.size);
185 /* write partition info to the chipset */
186 wl1271_raw_write32(wl, HW_PART0_START_ADDR, p->mem.start);
187 wl1271_raw_write32(wl, HW_PART0_SIZE_ADDR, p->mem.size);
188 wl1271_raw_write32(wl, HW_PART1_START_ADDR, p->reg.start);
189 wl1271_raw_write32(wl, HW_PART1_SIZE_ADDR, p->reg.size);
190 wl1271_raw_write32(wl, HW_PART2_START_ADDR, p->mem2.start);
191 wl1271_raw_write32(wl, HW_PART2_SIZE_ADDR, p->mem2.size);
192 wl1271_raw_write32(wl, HW_PART3_START_ADDR, p->mem3.start);
197 #define WL1271_BUSY_WORD_TIMEOUT 1000
199 /* FIXME: Check busy words, removed due to SPI bug */
201 static void wl1271_spi_read_busy(struct wl1271 *wl, void *buf, size_t len)
203 struct spi_transfer t[1];
204 struct spi_message m;
206 int num_busy_bytes = 0;
208 wl1271_info("spi read BUSY!");
211 * Look for the non-busy word in the read buffer, and if found,
212 * read in the remaining data into the buffer.
214 busy_buf = (u32 *)buf;
215 for (; (u32)busy_buf < (u32)buf + len; busy_buf++) {
216 num_busy_bytes += sizeof(u32);
217 if (*busy_buf & 0x1) {
218 spi_message_init(&m);
219 memset(t, 0, sizeof(t));
220 memmove(buf, busy_buf, len - num_busy_bytes);
221 t[0].rx_buf = buf + (len - num_busy_bytes);
222 t[0].len = num_busy_bytes;
223 spi_message_add_tail(&t[0], &m);
224 spi_sync(wl->spi, &m);
230 * Read further busy words from SPI until a non-busy word is
231 * encountered, then read the data itself into the buffer.
233 wl1271_info("spi read BUSY-polling needed!");
235 num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
236 busy_buf = wl->buffer_busyword;
237 while (num_busy_bytes) {
239 spi_message_init(&m);
240 memset(t, 0, sizeof(t));
241 t[0].rx_buf = busy_buf;
242 t[0].len = sizeof(u32);
243 spi_message_add_tail(&t[0], &m);
244 spi_sync(wl->spi, &m);
246 if (*busy_buf & 0x1) {
247 spi_message_init(&m);
248 memset(t, 0, sizeof(t));
251 spi_message_add_tail(&t[0], &m);
252 spi_sync(wl->spi, &m);
257 /* The SPI bus is unresponsive, the read failed. */
259 wl1271_error("SPI read busy-word timeout!\n");
263 void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
264 size_t len, bool fixed)
266 struct spi_transfer t[3];
267 struct spi_message m;
271 cmd = &wl->buffer_cmd;
272 busy_buf = wl->buffer_busyword;
275 *cmd |= WSPI_CMD_READ;
276 *cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH;
277 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
280 *cmd |= WSPI_CMD_FIXED;
282 spi_message_init(&m);
283 memset(t, 0, sizeof(t));
287 spi_message_add_tail(&t[0], &m);
289 /* Busy and non busy words read */
290 t[1].rx_buf = busy_buf;
291 t[1].len = WL1271_BUSY_WORD_LEN;
292 spi_message_add_tail(&t[1], &m);
296 spi_message_add_tail(&t[2], &m);
298 spi_sync(wl->spi, &m);
300 /* FIXME: Check busy words, removed due to SPI bug */
301 /* if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1))
302 wl1271_spi_read_busy(wl, buf, len); */
304 wl1271_dump(DEBUG_SPI, "spi_read cmd -> ", cmd, sizeof(*cmd));
305 wl1271_dump(DEBUG_SPI, "spi_read buf <- ", buf, len);
308 void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
309 size_t len, bool fixed)
311 struct spi_transfer t[2];
312 struct spi_message m;
315 cmd = &wl->buffer_cmd;
318 *cmd |= WSPI_CMD_WRITE;
319 *cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH;
320 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
323 *cmd |= WSPI_CMD_FIXED;
325 spi_message_init(&m);
326 memset(t, 0, sizeof(t));
329 t[0].len = sizeof(*cmd);
330 spi_message_add_tail(&t[0], &m);
334 spi_message_add_tail(&t[1], &m);
336 spi_sync(wl->spi, &m);
338 wl1271_dump(DEBUG_SPI, "spi_write cmd -> ", cmd, sizeof(*cmd));
339 wl1271_dump(DEBUG_SPI, "spi_write buf -> ", buf, len);
342 void wl1271_spi_read(struct wl1271 *wl, int addr, void *buf, size_t len,
347 physical = wl1271_translate_addr(wl, addr);
349 wl1271_spi_raw_read(wl, physical, buf, len, fixed);
352 void wl1271_spi_write(struct wl1271 *wl, int addr, void *buf, size_t len,
357 physical = wl1271_translate_addr(wl, addr);
359 wl1271_spi_raw_write(wl, physical, buf, len, fixed);
362 u32 wl1271_spi_read32(struct wl1271 *wl, int addr)
364 return wl1271_raw_read32(wl, wl1271_translate_addr(wl, addr));
367 void wl1271_spi_write32(struct wl1271 *wl, int addr, u32 val)
369 wl1271_raw_write32(wl, wl1271_translate_addr(wl, addr), val);
372 void wl1271_top_reg_write(struct wl1271 *wl, int addr, u16 val)
374 /* write address >> 1 + 0x30000 to OCP_POR_CTR */
375 addr = (addr >> 1) + 0x30000;
376 wl1271_spi_write32(wl, OCP_POR_CTR, addr);
378 /* write value to OCP_POR_WDATA */
379 wl1271_spi_write32(wl, OCP_DATA_WRITE, val);
381 /* write 1 to OCP_CMD */
382 wl1271_spi_write32(wl, OCP_CMD, OCP_CMD_WRITE);
385 u16 wl1271_top_reg_read(struct wl1271 *wl, int addr)
388 int timeout = OCP_CMD_LOOP;
390 /* write address >> 1 + 0x30000 to OCP_POR_CTR */
391 addr = (addr >> 1) + 0x30000;
392 wl1271_spi_write32(wl, OCP_POR_CTR, addr);
394 /* write 2 to OCP_CMD */
395 wl1271_spi_write32(wl, OCP_CMD, OCP_CMD_READ);
397 /* poll for data ready */
399 val = wl1271_spi_read32(wl, OCP_DATA_READ);
400 } while (!(val & OCP_READY_MASK) && --timeout);
403 wl1271_warning("Top register access timed out.");
407 /* check data status and return if OK */
408 if ((val & OCP_STATUS_MASK) == OCP_STATUS_OK)
411 wl1271_warning("Top register access returned error.");