2 * (C) Copyright 2007 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * Based on Xilinx drivers
33 #include "xilinx_emac.h"
39 #define ENET_MAX_MTU PKTSIZE
40 #define ENET_ADDR_LENGTH 6
42 static unsigned int etherrxbuff[PKTSIZE_ALIGN/4]; /* Receive buffer */
44 static u8 emacaddr[ENET_ADDR_LENGTH] = { 0x00, 0x0a, 0x35, 0x00, 0x22, 0x01 };
55 int eth_init(bd_t * bis)
59 printf("EMAC Initialization Started\n\r");
62 puts("Emac is started\n");
66 memset (&emac, 0, sizeof (xemac));
68 emac.baseaddress = XILINX_EMAC_BASEADDR;
70 /* Setting up FIFOs */
71 emac.recvfifo.regbaseaddress = emac.baseaddress +
72 XEM_PFIFO_RXREG_OFFSET;
73 emac.recvfifo.databaseaddress = emac.baseaddress +
74 XEM_PFIFO_RXDATA_OFFSET;
75 out_be32 (emac.recvfifo.regbaseaddress, XPF_RESET_FIFO_MASK);
77 emac.sendfifo.regbaseaddress = emac.baseaddress +
78 XEM_PFIFO_TXREG_OFFSET;
79 emac.sendfifo.databaseaddress = emac.baseaddress +
80 XEM_PFIFO_TXDATA_OFFSET;
81 out_be32 (emac.sendfifo.regbaseaddress, XPF_RESET_FIFO_MASK);
83 /* Reset the entire IPIF */
84 out_be32 (emac.baseaddress + XIIF_V123B_RESETR_OFFSET,
85 XIIF_V123B_RESET_MASK);
87 /* Stopping EMAC for setting up MAC */
88 helpreg = in_be32 (emac.baseaddress + XEM_ECR_OFFSET);
89 helpreg &= ~(XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK);
90 out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg);
92 if (!getenv("ethaddr")) {
93 memcpy(bis->bi_enetaddr, emacaddr, ENET_ADDR_LENGTH);
96 /* Set the device station address high and low registers */
97 helpreg = (bis->bi_enetaddr[0] << 8) | bis->bi_enetaddr[1];
98 out_be32 (emac.baseaddress + XEM_SAH_OFFSET, helpreg);
99 helpreg = (bis->bi_enetaddr[2] << 24) | (bis->bi_enetaddr[3] << 16) |
100 (bis->bi_enetaddr[4] << 8) | bis->bi_enetaddr[5];
101 out_be32 (emac.baseaddress + XEM_SAL_OFFSET, helpreg);
104 helpreg = XEM_ECR_UNICAST_ENABLE_MASK | XEM_ECR_BROAD_ENABLE_MASK |
105 XEM_ECR_FULL_DUPLEX_MASK | XEM_ECR_XMIT_FCS_ENABLE_MASK |
106 XEM_ECR_XMIT_PAD_ENABLE_MASK | XEM_ECR_PHY_ENABLE_MASK;
107 out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg);
111 /* Enable the transmitter, and receiver */
112 helpreg = in_be32 (emac.baseaddress + XEM_ECR_OFFSET);
113 helpreg &= ~(XEM_ECR_XMIT_RESET_MASK | XEM_ECR_RECV_RESET_MASK);
114 helpreg |= (XEM_ECR_XMIT_ENABLE_MASK | XEM_ECR_RECV_ENABLE_MASK);
115 out_be32 (emac.baseaddress + XEM_ECR_OFFSET, helpreg);
117 printf("EMAC Initialization complete\n\r");
121 int eth_send(volatile void *ptr, int len)
128 u32 *wordbuffer = (u32 *) ptr;
130 if (len > ENET_MAX_MTU)
134 * Check for overruns and underruns for the transmit status and length
135 * FIFOs and make sure the send packet FIFO is not deadlocked.
136 * Any of these conditions is bad enough that we do not want to
137 * continue. The upper layer software should reset the device to resolve
140 intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET);
141 if (intrstatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK |
142 XEM_EIR_XMIT_LFIFO_OVER_MASK)) {
144 puts ("Transmitting overrun error\n");
147 } else if (intrstatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK |
148 XEM_EIR_XMIT_LFIFO_UNDER_MASK)) {
150 puts ("Transmitting underrun error\n");
153 } else if (in_be32 (emac.sendfifo.regbaseaddress +
154 XPF_COUNT_STATUS_REG_OFFSET) & XPF_DEADLOCK_MASK) {
156 puts("Transmitting fifo error\n");
162 * Before writing to the data FIFO, make sure the length FIFO is not
163 * full. The data FIFO might not be full yet even though the length FIFO
164 * is. This avoids an overrun condition on the length FIFO and keeps the
167 * Clear the latched LFIFO_FULL bit so next time around the most
168 * current status is represented
170 if (intrstatus & XEM_EIR_XMIT_LFIFO_FULL_MASK) {
171 out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET,
172 intrstatus & XEM_EIR_XMIT_LFIFO_FULL_MASK);
174 puts ("Fifo is full\n");
179 /* get the count of how many words may be inserted into the FIFO */
180 fifocount = in_be32 (emac.sendfifo.regbaseaddress +
181 XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK;
182 wordcount = len >> 2;
183 extrabytecount = len & 0x3;
185 if (fifocount < wordcount) {
187 puts ("Sending packet is larger then size of FIFO\n");
192 for (fifocount = 0; fifocount < wordcount; fifocount++) {
193 out_be32 (emac.sendfifo.databaseaddress, wordbuffer[fifocount]);
195 if (extrabytecount > 0) {
197 u8 *extrabytesbuffer = (u8 *) (wordbuffer + wordcount);
199 if (extrabytecount == 1) {
200 lastword = extrabytesbuffer[0] << 24;
201 } else if (extrabytecount == 2) {
202 lastword = extrabytesbuffer[0] << 24 |
203 extrabytesbuffer[1] << 16;
204 } else if (extrabytecount == 3) {
205 lastword = extrabytesbuffer[0] << 24 |
206 extrabytesbuffer[1] << 16 |
207 extrabytesbuffer[2] << 8;
209 out_be32 (emac.sendfifo.databaseaddress, lastword);
212 /* Loop on the MAC's status to wait for any pause to complete */
213 intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET);
214 while ((intrstatus & XEM_EIR_XMIT_PAUSE_MASK) != 0) {
215 intrstatus = in_be32 ((emac.baseaddress) +
216 XIIF_V123B_IISR_OFFSET);
217 /* Clear the pause status from the transmit status register */
218 out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET,
219 intrstatus & XEM_EIR_XMIT_PAUSE_MASK);
223 * Set the MAC's transmit packet length register to tell it to transmit
225 out_be32 (emac.baseaddress + XEM_TPLR_OFFSET, len);
228 * Loop on the MAC's status to wait for the transmit to complete.
229 * The transmit status is in the FIFO when the XMIT_DONE bit is set.
232 intrstatus = in_be32 ((emac.baseaddress) +
233 XIIF_V123B_IISR_OFFSET);
235 while ((intrstatus & XEM_EIR_XMIT_DONE_MASK) == 0);
237 xmitstatus = in_be32 (emac.baseaddress + XEM_TSR_OFFSET);
239 if (intrstatus & (XEM_EIR_XMIT_SFIFO_OVER_MASK |
240 XEM_EIR_XMIT_LFIFO_OVER_MASK)) {
242 puts ("Transmitting overrun error\n");
245 } else if (intrstatus & (XEM_EIR_XMIT_SFIFO_UNDER_MASK |
246 XEM_EIR_XMIT_LFIFO_UNDER_MASK)) {
248 puts ("Transmitting underrun error\n");
253 /* Clear the interrupt status register of transmit statuses */
254 out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET,
255 intrstatus & XEM_EIR_XMIT_ALL_MASK);
258 * Collision errors are stored in the transmit status register
259 * instead of the interrupt status register
261 if ((xmitstatus & XEM_TSR_EXCESS_DEFERRAL_MASK) ||
262 (xmitstatus & XEM_TSR_LATE_COLLISION_MASK)) {
264 puts ("Transmitting collision error\n");
279 u8 *extrabytesbuffer;
281 if (in_be32 (emac.recvfifo.regbaseaddress + XPF_COUNT_STATUS_REG_OFFSET)
282 & XPF_DEADLOCK_MASK) {
283 out_be32 (emac.recvfifo.regbaseaddress, XPF_RESET_FIFO_MASK);
285 puts ("Receiving FIFO deadlock\n");
291 * Get the interrupt status to know what happened (whether an error
292 * occurred and/or whether frames have been received successfully).
293 * When clearing the intr status register, clear only statuses that
294 * pertain to receive.
296 intrstatus = in_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET);
298 * Before reading from the length FIFO, make sure the length FIFO is not
299 * empty. We could cause an underrun error if we try to read from an
302 if (!(intrstatus & XEM_EIR_RECV_DONE_MASK)) {
304 /* puts("Receiving FIFO is empty\n"); */
310 * Determine, from the MAC, the length of the next packet available
311 * in the data FIFO (there should be a non-zero length here)
313 pktlength = in_be32 (emac.baseaddress + XEM_RPLR_OFFSET);
319 * Write the RECV_DONE bit in the status register to clear it. This bit
320 * indicates the RPLR is non-empty, and we know it's set at this point.
321 * We clear it so that subsequent entry into this routine will reflect
322 * the current status. This is done because the non-empty bit is latched
323 * in the IPIF, which means it may indicate a non-empty condition even
324 * though there is something in the FIFO.
326 out_be32 ((emac.baseaddress) + XIIF_V123B_IISR_OFFSET,
327 XEM_EIR_RECV_DONE_MASK);
329 fifocount = in_be32 (emac.recvfifo.regbaseaddress +
330 XPF_COUNT_STATUS_REG_OFFSET) & XPF_COUNT_MASK;
332 if ((fifocount * 4) < pktlength) {
334 puts ("Receiving FIFO is smaller than packet size.\n");
339 wordcount = pktlength >> 2;
340 extrabytecount = pktlength & 0x3;
342 for (fifocount = 0; fifocount < wordcount; fifocount++) {
343 etherrxbuff[fifocount] =
344 in_be32 (emac.recvfifo.databaseaddress);
348 * if there are extra bytes to handle, read the last word from the FIFO
349 * and insert the extra bytes into the buffer
351 if (extrabytecount > 0) {
352 extrabytesbuffer = (u8 *) (etherrxbuff + wordcount);
354 lastword = in_be32 (emac.recvfifo.databaseaddress);
357 * one extra byte in the last word, put the byte into the next
358 * location of the buffer, bytes in a word of the FIFO are
359 * ordered from most significant byte to least
361 if (extrabytecount == 1) {
362 extrabytesbuffer[0] = (u8) (lastword >> 24);
363 } else if (extrabytecount == 2) {
364 extrabytesbuffer[0] = (u8) (lastword >> 24);
365 extrabytesbuffer[1] = (u8) (lastword >> 16);
366 } else if (extrabytecount == 3) {
367 extrabytesbuffer[0] = (u8) (lastword >> 24);
368 extrabytesbuffer[1] = (u8) (lastword >> 16);
369 extrabytesbuffer[2] = (u8) (lastword >> 8);
372 NetReceive((uchar *)etherrxbuff, pktlength);