2 * HCI based Driver for NXP PN544 NFC Chip
4 * Copyright (C) 2012 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the
17 * Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 #include <linux/crc-ccitt.h>
22 #include <linux/module.h>
23 #include <linux/delay.h>
24 #include <linux/slab.h>
25 #include <linux/miscdevice.h>
26 #include <linux/interrupt.h>
27 #include <linux/gpio.h>
28 #include <linux/i2c.h>
30 #include <linux/nfc.h>
31 #include <net/nfc/hci.h>
32 #include <net/nfc/shdlc.h>
34 #include <linux/nfc/pn544.h>
36 #define DRIVER_DESC "HCI NFC driver for PN544"
38 #define PN544_HCI_DRIVER_NAME "pn544_hci"
40 /* Timing restrictions (ms) */
41 #define PN544_HCI_RESETVEN_TIME 30
43 static struct i2c_device_id pn544_hci_id_table[] = {
48 MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table);
53 /* framing in HCI mode */
54 #define PN544_HCI_LLC_LEN 1
55 #define PN544_HCI_LLC_CRC 2
56 #define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC)
57 #define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC)
58 #define PN544_HCI_LLC_MAX_PAYLOAD 29
59 #define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \
60 PN544_HCI_LLC_MAX_PAYLOAD)
68 #define FULL_VERSION_LEN 11
70 /* Proprietary commands */
71 #define PN544_WRITE 0x3f
73 /* Proprietary gates, events, commands and registers */
75 /* NFC_HCI_RF_READER_A_GATE additional registers and commands */
76 #define PN544_RF_READER_A_AUTO_ACTIVATION 0x10
77 #define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12
78 #define PN544_MIFARE_CMD 0x21
80 /* Commands that apply to all RF readers */
81 #define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30
82 #define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32
84 /* NFC_HCI_ID_MGMT_GATE additional registers */
85 #define PN544_ID_MGMT_FULL_VERSION_SW 0x10
87 #define PN544_RF_READER_ISO15693_GATE 0x12
89 #define PN544_RF_READER_F_GATE 0x14
90 #define PN544_FELICA_ID 0x04
91 #define PN544_FELICA_RAW 0x20
93 #define PN544_RF_READER_JEWEL_GATE 0x15
94 #define PN544_JEWEL_RAW_CMD 0x23
96 #define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30
97 #define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31
99 #define PN544_SYS_MGMT_GATE 0x90
100 #define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02
102 #define PN544_POLLING_LOOP_MGMT_GATE 0x94
103 #define PN544_PL_RDPHASES 0x06
104 #define PN544_PL_EMULATION 0x07
105 #define PN544_PL_NFCT_DEACTIVATED 0x09
107 #define PN544_SWP_MGMT_GATE 0xA0
109 #define PN544_NFC_WI_MGMT_GATE 0xA1
111 static u8 pn544_custom_gates[] = {
114 PN544_POLLING_LOOP_MGMT_GATE,
115 PN544_NFC_WI_MGMT_GATE,
116 PN544_RF_READER_F_GATE,
117 PN544_RF_READER_JEWEL_GATE,
118 PN544_RF_READER_ISO15693_GATE,
119 PN544_RF_READER_NFCIP1_INITIATOR_GATE,
120 PN544_RF_READER_NFCIP1_TARGET_GATE
123 /* Largest headroom needed for outgoing custom commands */
124 #define PN544_CMDS_HEADROOM 2
126 struct pn544_hci_info {
127 struct i2c_client *i2c_dev;
128 struct nfc_shdlc *shdlc;
130 enum pn544_state state;
132 struct mutex info_lock;
134 unsigned int gpio_en;
135 unsigned int gpio_irq;
136 unsigned int gpio_fw;
137 unsigned int en_polarity;
140 * < 0 if hardware error occured (e.g. i2c err)
141 * and prevents normal operation.
145 static void pn544_hci_platform_init(struct pn544_hci_info *info)
147 int polarity, retry, ret;
148 char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
149 int count = sizeof(rset_cmd);
151 pr_info(DRIVER_DESC ": %s\n", __func__);
152 dev_info(&info->i2c_dev->dev, "Detecting nfc_en polarity\n");
154 /* Disable fw download */
155 gpio_set_value(info->gpio_fw, 0);
157 for (polarity = 0; polarity < 2; polarity++) {
158 info->en_polarity = polarity;
162 gpio_set_value(info->gpio_en, !info->en_polarity);
163 usleep_range(10000, 15000);
166 gpio_set_value(info->gpio_en, info->en_polarity);
167 usleep_range(10000, 15000);
170 dev_dbg(&info->i2c_dev->dev, "Sending reset cmd\n");
171 ret = i2c_master_send(info->i2c_dev, rset_cmd, count);
173 dev_info(&info->i2c_dev->dev,
174 "nfc_en polarity : active %s\n",
175 (polarity == 0 ? "low" : "high"));
181 dev_err(&info->i2c_dev->dev,
182 "Could not detect nfc_en polarity, fallback to active high\n");
185 gpio_set_value(info->gpio_en, !info->en_polarity);
188 static int pn544_hci_enable(struct pn544_hci_info *info, int mode)
190 pr_info(DRIVER_DESC ": %s\n", __func__);
192 gpio_set_value(info->gpio_fw, 0);
193 gpio_set_value(info->gpio_en, info->en_polarity);
194 usleep_range(10000, 15000);
199 static void pn544_hci_disable(struct pn544_hci_info *info)
201 pr_info(DRIVER_DESC ": %s\n", __func__);
203 gpio_set_value(info->gpio_fw, 0);
204 gpio_set_value(info->gpio_en, !info->en_polarity);
205 usleep_range(10000, 15000);
207 gpio_set_value(info->gpio_en, info->en_polarity);
208 usleep_range(10000, 15000);
210 gpio_set_value(info->gpio_en, !info->en_polarity);
211 usleep_range(10000, 15000);
214 static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len)
218 usleep_range(3000, 6000);
220 r = i2c_master_send(client, buf, len);
222 if (r == -EREMOTEIO) { /* Retry, chip was in standby */
223 usleep_range(6000, 10000);
224 r = i2c_master_send(client, buf, len);
227 if (r >= 0 && r != len)
233 static int check_crc(u8 *buf, int buflen)
239 crc = crc_ccitt(0xffff, buf, len - 2);
242 if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {
243 pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n",
244 crc, buf[len - 1], buf[len - 2]);
246 pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
247 print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
248 16, 2, buf, buflen, false);
255 * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
256 * that i2c bus will be flushed and that next read will start on a new frame.
257 * returned skb contains only LLC header and payload.
259 * -EREMOTEIO : i2c read error (fatal)
260 * -EBADMSG : frame was incorrect and discarded
261 * -ENOMEM : cannot allocate skb, frame dropped
263 static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb)
267 u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1];
269 r = i2c_master_recv(client, &len, 1);
271 dev_err(&client->dev, "cannot read len byte\n");
275 if ((len < (PN544_HCI_LLC_MIN_SIZE - 1)) ||
276 (len > (PN544_HCI_LLC_MAX_SIZE - 1))) {
277 dev_err(&client->dev, "invalid len byte\n");
282 *skb = alloc_skb(1 + len, GFP_KERNEL);
288 *skb_put(*skb, 1) = len;
290 r = i2c_master_recv(client, skb_put(*skb, len), len);
296 r = check_crc((*skb)->data, (*skb)->len);
304 skb_trim(*skb, (*skb)->len - 2);
306 usleep_range(3000, 6000);
311 if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0)
314 usleep_range(3000, 6000);
320 * Reads an shdlc frame from the chip. This is not as straightforward as it
321 * seems. There are cases where we could loose the frame start synchronization.
322 * The frame format is len-data-crc, and corruption can occur anywhere while
323 * transiting on i2c bus, such that we could read an invalid len.
324 * In order to recover synchronization with the next frame, we must be sure
325 * to read the real amount of data without using the len byte. We do this by
326 * assuming the following:
327 * - the chip will always present only one single complete frame on the bus
328 * before triggering the interrupt
329 * - the chip will not present a new frame until we have completely read
330 * the previous one (or until we have handled the interrupt).
331 * The tricky case is when we read a corrupted len that is less than the real
332 * len. We must detect this here in order to determine that we need to flush
333 * the bus. This is the reason why we check the crc here.
335 static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id)
337 struct pn544_hci_info *info = dev_id;
338 struct i2c_client *client = info->i2c_dev;
339 struct sk_buff *skb = NULL;
343 BUG_ON(irq != info->i2c_dev->irq);
345 dev_dbg(&client->dev, "IRQ\n");
347 if (info->hard_fault != 0)
350 r = pn544_hci_i2c_read(client, &skb);
351 if (r == -EREMOTEIO) {
352 info->hard_fault = r;
354 nfc_shdlc_recv_frame(info->shdlc, NULL);
357 } else if ((r == -ENOMEM) || (r == -EBADMSG)) {
361 nfc_shdlc_recv_frame(info->shdlc, skb);
366 static int pn544_hci_open(struct nfc_shdlc *shdlc)
368 struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
371 mutex_lock(&info->info_lock);
373 if (info->state != PN544_ST_COLD) {
378 r = pn544_hci_enable(info, HCI_MODE);
381 mutex_unlock(&info->info_lock);
385 static void pn544_hci_close(struct nfc_shdlc *shdlc)
387 struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
389 mutex_lock(&info->info_lock);
391 if (info->state == PN544_ST_COLD)
394 pn544_hci_disable(info);
397 mutex_unlock(&info->info_lock);
400 static int pn544_hci_ready(struct nfc_shdlc *shdlc)
402 struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
404 static struct hw_config {
408 {{0x9f, 0x9a}, 0x00},
410 {{0x98, 0x10}, 0xbc},
412 {{0x9e, 0x71}, 0x00},
414 {{0x98, 0x09}, 0x00},
416 {{0x9e, 0xb4}, 0x00},
418 {{0x9e, 0xd9}, 0xff},
419 {{0x9e, 0xda}, 0xff},
420 {{0x9e, 0xdb}, 0x23},
421 {{0x9e, 0xdc}, 0x21},
422 {{0x9e, 0xdd}, 0x22},
423 {{0x9e, 0xde}, 0x24},
425 {{0x9c, 0x01}, 0x08},
427 {{0x9e, 0xaa}, 0x01},
429 {{0x9b, 0xd1}, 0x0d},
430 {{0x9b, 0xd2}, 0x24},
431 {{0x9b, 0xd3}, 0x0a},
432 {{0x9b, 0xd4}, 0x22},
433 {{0x9b, 0xd5}, 0x08},
434 {{0x9b, 0xd6}, 0x1e},
435 {{0x9b, 0xdd}, 0x1c},
437 {{0x9b, 0x84}, 0x13},
438 {{0x99, 0x81}, 0x7f},
439 {{0x99, 0x31}, 0x70},
441 {{0x98, 0x00}, 0x3f},
443 {{0x9f, 0x09}, 0x00},
445 {{0x9f, 0x0a}, 0x05},
447 {{0x9e, 0xd1}, 0xa1},
448 {{0x99, 0x23}, 0x00},
450 {{0x9e, 0x74}, 0x80},
452 {{0x9f, 0x28}, 0x10},
454 {{0x9f, 0x35}, 0x14},
456 {{0x9f, 0x36}, 0x60},
458 {{0x9c, 0x31}, 0x00},
460 {{0x9c, 0x32}, 0xc8},
462 {{0x9c, 0x19}, 0x40},
464 {{0x9c, 0x1a}, 0x40},
466 {{0x9c, 0x0c}, 0x00},
468 {{0x9c, 0x0d}, 0x00},
470 {{0x9c, 0x12}, 0x00},
472 {{0x9c, 0x13}, 0x00},
474 {{0x98, 0xa2}, 0x0e},
476 {{0x98, 0x93}, 0x40},
478 {{0x98, 0x7d}, 0x02},
479 {{0x98, 0x7e}, 0x00},
480 {{0x9f, 0xc8}, 0x01},
482 struct hw_config *p = hw_config;
483 int count = ARRAY_SIZE(hw_config);
484 struct sk_buff *res_skb;
490 param[1] = p->adr[0];
491 param[2] = p->adr[1];
494 r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE,
499 if (res_skb->len != 1) {
504 if (res_skb->data[0] != p->value) {
514 param[0] = NFC_HCI_UICC_HOST_ID;
515 r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE,
516 NFC_HCI_ADMIN_WHITELIST, param, 1);
521 r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE,
522 PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1);
527 r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE,
528 PN544_RF_READER_A_AUTO_ACTIVATION, param, 1);
532 r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
533 NFC_HCI_EVT_END_OPERATION, NULL, 0);
538 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
539 PN544_PL_NFCT_DEACTIVATED, param, 1);
544 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
545 PN544_PL_RDPHASES, param, 1);
549 r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE,
550 PN544_ID_MGMT_FULL_VERSION_SW, &skb);
554 if (skb->len != FULL_VERSION_LEN) {
559 print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ",
560 DUMP_PREFIX_NONE, 16, 1,
561 skb->data, FULL_VERSION_LEN, false);
568 static int pn544_hci_xmit(struct nfc_shdlc *shdlc, struct sk_buff *skb)
570 struct pn544_hci_info *info = nfc_shdlc_get_clientdata(shdlc);
571 struct i2c_client *client = info->i2c_dev;
573 if (info->hard_fault != 0)
574 return info->hard_fault;
576 return pn544_hci_i2c_write(client, skb->data, skb->len);
579 static int pn544_hci_start_poll(struct nfc_shdlc *shdlc,
580 u32 im_protocols, u32 tm_protocols)
582 struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
588 pr_info(DRIVER_DESC ": %s protocols 0x%x 0x%x\n",
589 __func__, im_protocols, tm_protocols);
591 r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
592 NFC_HCI_EVT_END_OPERATION, NULL, 0);
598 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
599 PN544_PL_EMULATION, duration, 2);
604 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
605 PN544_PL_NFCT_DEACTIVATED, &activated, 1);
609 if (im_protocols & (NFC_PROTO_ISO14443_MASK | NFC_PROTO_MIFARE_MASK |
610 NFC_PROTO_JEWEL_MASK))
611 phases |= 1; /* Type A */
612 if (im_protocols & NFC_PROTO_FELICA_MASK) {
613 phases |= (1 << 2); /* Type F 212 */
614 phases |= (1 << 3); /* Type F 424 */
617 phases |= (1 << 5); /* NFC active */
619 r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
620 PN544_PL_RDPHASES, &phases, 1);
624 r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
625 NFC_HCI_EVT_READER_REQUESTED, NULL, 0);
627 nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
628 NFC_HCI_EVT_END_OPERATION, NULL, 0);
633 static int pn544_hci_target_from_gate(struct nfc_shdlc *shdlc, u8 gate,
634 struct nfc_target *target)
637 case PN544_RF_READER_F_GATE:
638 target->supported_protocols = NFC_PROTO_FELICA_MASK;
640 case PN544_RF_READER_JEWEL_GATE:
641 target->supported_protocols = NFC_PROTO_JEWEL_MASK;
642 target->sens_res = 0x0c00;
651 static int pn544_hci_complete_target_discovered(struct nfc_shdlc *shdlc,
653 struct nfc_target *target)
655 struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
656 struct sk_buff *uid_skb;
659 if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
660 if (target->nfcid1_len != 4 && target->nfcid1_len != 7 &&
661 target->nfcid1_len != 10)
664 r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
665 PN544_RF_READER_CMD_ACTIVATE_NEXT,
666 target->nfcid1, target->nfcid1_len, NULL);
667 } else if (target->supported_protocols & NFC_PROTO_FELICA_MASK) {
668 r = nfc_hci_get_param(hdev, PN544_RF_READER_F_GATE,
669 PN544_FELICA_ID, &uid_skb);
673 if (uid_skb->len != 8) {
678 r = nfc_hci_send_cmd(hdev, PN544_RF_READER_F_GATE,
679 PN544_RF_READER_CMD_ACTIVATE_NEXT,
680 uid_skb->data, uid_skb->len, NULL);
682 } else if (target->supported_protocols & NFC_PROTO_ISO14443_MASK) {
684 * TODO: maybe other ISO 14443 require some kind of continue
685 * activation, but for now we've seen only this one below.
687 if (target->sens_res == 0x4403) /* Type 4 Mifare DESFire */
688 r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
689 PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION,
696 #define MIFARE_CMD_AUTH_KEY_A 0x60
697 #define MIFARE_CMD_AUTH_KEY_B 0x61
698 #define MIFARE_CMD_HEADER 2
699 #define MIFARE_UID_LEN 4
700 #define MIFARE_KEY_LEN 6
701 #define MIFARE_CMD_LEN 12
704 * <= 0: driver handled the data exchange
705 * 1: driver doesn't especially handle, please do standard processing
707 static int pn544_hci_data_exchange(struct nfc_shdlc *shdlc,
708 struct nfc_target *target,
710 struct sk_buff **res_skb)
712 struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
715 pr_info(DRIVER_DESC ": %s for gate=%d\n", __func__,
716 target->hci_reader_gate);
718 switch (target->hci_reader_gate) {
719 case NFC_HCI_RF_READER_A_GATE:
720 if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
722 * It seems that pn544 is inverting key and UID for
723 * MIFARE authentication commands.
725 if (skb->len == MIFARE_CMD_LEN &&
726 (skb->data[0] == MIFARE_CMD_AUTH_KEY_A ||
727 skb->data[0] == MIFARE_CMD_AUTH_KEY_B)) {
728 u8 uid[MIFARE_UID_LEN];
729 u8 *data = skb->data + MIFARE_CMD_HEADER;
731 memcpy(uid, data + MIFARE_KEY_LEN,
733 memmove(data + MIFARE_UID_LEN, data,
735 memcpy(data, uid, MIFARE_UID_LEN);
738 return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
740 skb->data, skb->len, res_skb);
743 case PN544_RF_READER_F_GATE:
744 *skb_push(skb, 1) = 0;
745 *skb_push(skb, 1) = 0;
747 r = nfc_hci_send_cmd(hdev, target->hci_reader_gate,
749 skb->data, skb->len, res_skb);
751 skb_pull(*res_skb, 1);
753 case PN544_RF_READER_JEWEL_GATE:
754 return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
756 skb->data, skb->len, res_skb);
762 static int pn544_hci_check_presence(struct nfc_shdlc *shdlc,
763 struct nfc_target *target)
765 struct nfc_hci_dev *hdev = nfc_shdlc_get_hci_dev(shdlc);
767 return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
768 PN544_RF_READER_CMD_PRESENCE_CHECK,
772 static struct nfc_shdlc_ops pn544_shdlc_ops = {
773 .open = pn544_hci_open,
774 .close = pn544_hci_close,
775 .hci_ready = pn544_hci_ready,
776 .xmit = pn544_hci_xmit,
777 .start_poll = pn544_hci_start_poll,
778 .target_from_gate = pn544_hci_target_from_gate,
779 .complete_target_discovered = pn544_hci_complete_target_discovered,
780 .data_exchange = pn544_hci_data_exchange,
781 .check_presence = pn544_hci_check_presence,
784 static int __devinit pn544_hci_probe(struct i2c_client *client,
785 const struct i2c_device_id *id)
787 struct pn544_hci_info *info;
788 struct pn544_nfc_platform_data *pdata;
791 struct nfc_hci_init_data init_data;
793 dev_dbg(&client->dev, "%s\n", __func__);
794 dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
796 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
797 dev_err(&client->dev, "Need I2C_FUNC_I2C\n");
801 info = kzalloc(sizeof(struct pn544_hci_info), GFP_KERNEL);
803 dev_err(&client->dev,
804 "Cannot allocate memory for pn544_hci_info.\n");
809 info->i2c_dev = client;
810 info->state = PN544_ST_COLD;
811 mutex_init(&info->info_lock);
812 i2c_set_clientdata(client, info);
814 pdata = client->dev.platform_data;
816 dev_err(&client->dev, "No platform data\n");
821 if (pdata->request_resources == NULL) {
822 dev_err(&client->dev, "request_resources() missing\n");
827 r = pdata->request_resources(client);
829 dev_err(&client->dev, "Cannot get platform resources\n");
833 info->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE);
834 info->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET);
835 info->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ);
837 pn544_hci_platform_init(info);
839 r = request_threaded_irq(client->irq, NULL, pn544_hci_irq_thread_fn,
840 IRQF_TRIGGER_RISING, PN544_HCI_DRIVER_NAME,
843 dev_err(&client->dev, "Unable to register IRQ handler\n");
847 init_data.gate_count = ARRAY_SIZE(pn544_custom_gates);
849 memcpy(init_data.gates, pn544_custom_gates,
850 ARRAY_SIZE(pn544_custom_gates));
853 * TODO: Session id must include the driver name + some bus addr
854 * persistent info to discriminate 2 identical chips
856 strcpy(init_data.session_id, "ID544HCI");
858 protocols = NFC_PROTO_JEWEL_MASK |
859 NFC_PROTO_MIFARE_MASK |
860 NFC_PROTO_FELICA_MASK |
861 NFC_PROTO_ISO14443_MASK |
862 NFC_PROTO_NFC_DEP_MASK;
864 info->shdlc = nfc_shdlc_allocate(&pn544_shdlc_ops,
865 &init_data, protocols,
866 PN544_CMDS_HEADROOM, 0,
867 PN544_HCI_LLC_MAX_PAYLOAD,
868 dev_name(&client->dev));
870 dev_err(&client->dev, "Cannot allocate nfc shdlc.\n");
875 nfc_shdlc_set_clientdata(info->shdlc, info);
880 free_irq(client->irq, info);
883 if (pdata->free_resources != NULL)
884 pdata->free_resources();
893 static __devexit int pn544_hci_remove(struct i2c_client *client)
895 struct pn544_hci_info *info = i2c_get_clientdata(client);
896 struct pn544_nfc_platform_data *pdata = client->dev.platform_data;
898 dev_dbg(&client->dev, "%s\n", __func__);
900 nfc_shdlc_free(info->shdlc);
902 if (info->state != PN544_ST_COLD) {
907 free_irq(client->irq, info);
908 if (pdata->free_resources)
909 pdata->free_resources();
916 static struct i2c_driver pn544_hci_driver = {
918 .name = PN544_HCI_DRIVER_NAME,
920 .probe = pn544_hci_probe,
921 .id_table = pn544_hci_id_table,
922 .remove = __devexit_p(pn544_hci_remove),
925 static int __init pn544_hci_init(void)
929 pr_debug(DRIVER_DESC ": %s\n", __func__);
931 r = i2c_add_driver(&pn544_hci_driver);
933 pr_err(PN544_HCI_DRIVER_NAME ": driver registration failed\n");
940 static void __exit pn544_hci_exit(void)
942 i2c_del_driver(&pn544_hci_driver);
945 module_init(pn544_hci_init);
946 module_exit(pn544_hci_exit);
948 MODULE_LICENSE("GPL");
949 MODULE_DESCRIPTION(DRIVER_DESC);