4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 * Copyright (C) 2011 Advanced Micro Devices,
7 * PCI Express I/O Virtualization (IOV) support.
8 * Address Translation Service 1.0
9 * Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com>
10 * PASID support added by Joerg Roedel <joerg.roedel@amd.com>
13 #include <linux/export.h>
14 #include <linux/pci-ats.h>
15 #include <linux/pci.h>
16 #include <linux/slab.h>
20 void pci_ats_init(struct pci_dev *dev)
25 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);
30 pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CAP, &cap);
31 dev->ats_qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) :
36 * pci_enable_ats - enable the ATS capability
37 * @dev: the PCI device
38 * @ps: the IOMMU page shift
40 * Returns 0 on success, or negative on failure.
42 int pci_enable_ats(struct pci_dev *dev, int ps)
46 BUG_ON(dev->ats_cap && dev->ats_enabled);
51 if (ps < PCI_ATS_MIN_STU)
55 * Note that enabling ATS on a VF fails unless it's already enabled
56 * with the same STU on the PF.
58 ctrl = PCI_ATS_CTRL_ENABLE;
60 struct pci_dev *pdev = dev->physfn;
62 if (pdev->ats_stu != ps)
65 atomic_inc(&pdev->ats_ref_cnt); /* count enabled VFs */
68 ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU);
70 pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
75 EXPORT_SYMBOL_GPL(pci_enable_ats);
78 * pci_disable_ats - disable the ATS capability
79 * @dev: the PCI device
81 void pci_disable_ats(struct pci_dev *dev)
85 BUG_ON(!dev->ats_cap || !dev->ats_enabled);
87 if (atomic_read(&dev->ats_ref_cnt))
88 return; /* VFs still enabled */
91 struct pci_dev *pdev = dev->physfn;
93 atomic_dec(&pdev->ats_ref_cnt);
96 pci_read_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, &ctrl);
97 ctrl &= ~PCI_ATS_CTRL_ENABLE;
98 pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
100 dev->ats_enabled = 0;
102 EXPORT_SYMBOL_GPL(pci_disable_ats);
104 void pci_restore_ats_state(struct pci_dev *dev)
108 if (!pci_ats_enabled(dev))
110 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS))
113 ctrl = PCI_ATS_CTRL_ENABLE;
115 ctrl |= PCI_ATS_CTRL_STU(dev->ats_stu - PCI_ATS_MIN_STU);
116 pci_write_config_word(dev, dev->ats_cap + PCI_ATS_CTRL, ctrl);
118 EXPORT_SYMBOL_GPL(pci_restore_ats_state);
121 * pci_ats_queue_depth - query the ATS Invalidate Queue Depth
122 * @dev: the PCI device
124 * Returns the queue depth on success, or negative on failure.
126 * The ATS spec uses 0 in the Invalidate Queue Depth field to
127 * indicate that the function can accept 32 Invalidate Request.
128 * But here we use the `real' values (i.e. 1~32) for the Queue
129 * Depth; and 0 indicates the function shares the Queue with
130 * other functions (doesn't exclusively own a Queue).
132 int pci_ats_queue_depth(struct pci_dev *dev)
140 return dev->ats_qdep;
142 EXPORT_SYMBOL_GPL(pci_ats_queue_depth);
144 #ifdef CONFIG_PCI_PRI
146 * pci_enable_pri - Enable PRI capability
147 * @ pdev: PCI device structure
149 * Returns 0 on success, negative value on error
151 int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
157 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
161 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
162 pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
163 if ((control & PCI_PRI_CTRL_ENABLE) ||
164 !(status & PCI_PRI_STATUS_STOPPED))
167 pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests);
168 reqs = min(max_requests, reqs);
169 pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs);
171 control |= PCI_PRI_CTRL_ENABLE;
172 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
176 EXPORT_SYMBOL_GPL(pci_enable_pri);
179 * pci_disable_pri - Disable PRI capability
180 * @pdev: PCI device structure
182 * Only clears the enabled-bit, regardless of its former value
184 void pci_disable_pri(struct pci_dev *pdev)
189 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
193 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
194 control &= ~PCI_PRI_CTRL_ENABLE;
195 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
197 EXPORT_SYMBOL_GPL(pci_disable_pri);
200 * pci_reset_pri - Resets device's PRI state
201 * @pdev: PCI device structure
203 * The PRI capability must be disabled before this function is called.
204 * Returns 0 on success, negative value on error.
206 int pci_reset_pri(struct pci_dev *pdev)
211 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
215 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
216 if (control & PCI_PRI_CTRL_ENABLE)
219 control |= PCI_PRI_CTRL_RESET;
221 pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
225 EXPORT_SYMBOL_GPL(pci_reset_pri);
226 #endif /* CONFIG_PCI_PRI */
228 #ifdef CONFIG_PCI_PASID
230 * pci_enable_pasid - Enable the PASID capability
231 * @pdev: PCI device structure
232 * @features: Features to enable
234 * Returns 0 on success, negative value on error. This function checks
235 * whether the features are actually supported by the device and returns
238 int pci_enable_pasid(struct pci_dev *pdev, int features)
240 u16 control, supported;
243 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
247 pci_read_config_word(pdev, pos + PCI_PASID_CTRL, &control);
248 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
250 if (control & PCI_PASID_CTRL_ENABLE)
253 supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
255 /* User wants to enable anything unsupported? */
256 if ((supported & features) != features)
259 control = PCI_PASID_CTRL_ENABLE | features;
261 pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
265 EXPORT_SYMBOL_GPL(pci_enable_pasid);
268 * pci_disable_pasid - Disable the PASID capability
269 * @pdev: PCI device structure
272 void pci_disable_pasid(struct pci_dev *pdev)
277 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
281 pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
283 EXPORT_SYMBOL_GPL(pci_disable_pasid);
286 * pci_pasid_features - Check which PASID features are supported
287 * @pdev: PCI device structure
289 * Returns a negative value when no PASI capability is present.
290 * Otherwise is returns a bitmask with supported features. Current
291 * features reported are:
292 * PCI_PASID_CAP_EXEC - Execute permission supported
293 * PCI_PASID_CAP_PRIV - Privileged mode supported
295 int pci_pasid_features(struct pci_dev *pdev)
300 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
304 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
306 supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV;
310 EXPORT_SYMBOL_GPL(pci_pasid_features);
312 #define PASID_NUMBER_SHIFT 8
313 #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
315 * pci_max_pasid - Get maximum number of PASIDs supported by device
316 * @pdev: PCI device structure
318 * Returns negative value when PASID capability is not present.
319 * Otherwise it returns the numer of supported PASIDs.
321 int pci_max_pasids(struct pci_dev *pdev)
326 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
330 pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported);
332 supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
334 return (1 << supported);
336 EXPORT_SYMBOL_GPL(pci_max_pasids);
337 #endif /* CONFIG_PCI_PASID */