2 * Copyright (c) Microsoft Corporation.
5 * Jake Oshins <jakeo@microsoft.com>
7 * This driver acts as a paravirtual front-end for PCI Express root buses.
8 * When a PCI Express function (either an entire device or an SR-IOV
9 * Virtual Function) is being passed through to the VM, this driver exposes
10 * a new bus to the guest VM. This is modeled as a root PCI bus because
11 * no bridges are being exposed to the VM. In fact, with a "Generation 2"
12 * VM within Hyper-V, there may seem to be no PCI bus at all in the VM
13 * until a device as been exposed using this driver.
15 * Each root PCI bus has its own PCI domain, which is called "Segment" in
16 * the PCI Firmware Specifications. Thus while each device passed through
17 * to the VM using this front-end will appear at "device 0", the domain will
18 * be unique. Typically, each bus will have one PCI function on it, though
19 * this driver does support more than one.
21 * In order to map the interrupts from the device through to the guest VM,
22 * this driver also implements an IRQ Domain, which handles interrupts (either
23 * MSI or MSI-X) associated with the functions on the bus. As interrupts are
24 * set up, torn down, or reaffined, this driver communicates with the
25 * underlying hypervisor to adjust the mappings in the I/O MMU so that each
26 * interrupt will be delivered to the correct virtual processor at the right
27 * vector. This driver does not support level-triggered (line-based)
28 * interrupts, and will report that the Interrupt Line register in the
29 * function's configuration space is zero.
31 * The rest of this driver mostly maps PCI concepts onto underlying Hyper-V
32 * facilities. For instance, the configuration space of a function exposed
33 * by Hyper-V is mapped into a single page of memory space, and the
34 * read and write handlers for config space must be aware of this mechanism.
35 * Similarly, device setup and teardown involves messages sent to and from
36 * the PCI back-end driver in Hyper-V.
38 * This program is free software; you can redistribute it and/or modify it
39 * under the terms of the GNU General Public License version 2 as published
40 * by the Free Software Foundation.
42 * This program is distributed in the hope that it will be useful, but
43 * WITHOUT ANY WARRANTY; without even the implied warranty of
44 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
45 * NON INFRINGEMENT. See the GNU General Public License for more
50 #include <linux/kernel.h>
51 #include <linux/module.h>
52 #include <linux/pci.h>
53 #include <linux/semaphore.h>
54 #include <linux/irqdomain.h>
55 #include <asm/irqdomain.h>
57 #include <linux/msi.h>
58 #include <linux/hyperv.h>
59 #include <asm/mshyperv.h>
62 * Protocol versions. The low word is the minor version, the high word the
66 #define PCI_MAKE_VERSION(major, minor) ((u32)(((major) << 16) | (major)))
67 #define PCI_MAJOR_VERSION(version) ((u32)(version) >> 16)
68 #define PCI_MINOR_VERSION(version) ((u32)(version) & 0xff)
71 PCI_PROTOCOL_VERSION_1_1 = PCI_MAKE_VERSION(1, 1),
72 PCI_PROTOCOL_VERSION_CURRENT = PCI_PROTOCOL_VERSION_1_1
75 #define PCI_CONFIG_MMIO_LENGTH 0x2000
76 #define CFG_PAGE_OFFSET 0x1000
77 #define CFG_PAGE_SIZE (PCI_CONFIG_MMIO_LENGTH - CFG_PAGE_OFFSET)
79 #define MAX_SUPPORTED_MSI_MESSAGES 0x400
85 enum pci_message_type {
89 PCI_MESSAGE_BASE = 0x42490000,
90 PCI_BUS_RELATIONS = PCI_MESSAGE_BASE + 0,
91 PCI_QUERY_BUS_RELATIONS = PCI_MESSAGE_BASE + 1,
92 PCI_POWER_STATE_CHANGE = PCI_MESSAGE_BASE + 4,
93 PCI_QUERY_RESOURCE_REQUIREMENTS = PCI_MESSAGE_BASE + 5,
94 PCI_QUERY_RESOURCE_RESOURCES = PCI_MESSAGE_BASE + 6,
95 PCI_BUS_D0ENTRY = PCI_MESSAGE_BASE + 7,
96 PCI_BUS_D0EXIT = PCI_MESSAGE_BASE + 8,
97 PCI_READ_BLOCK = PCI_MESSAGE_BASE + 9,
98 PCI_WRITE_BLOCK = PCI_MESSAGE_BASE + 0xA,
99 PCI_EJECT = PCI_MESSAGE_BASE + 0xB,
100 PCI_QUERY_STOP = PCI_MESSAGE_BASE + 0xC,
101 PCI_REENABLE = PCI_MESSAGE_BASE + 0xD,
102 PCI_QUERY_STOP_FAILED = PCI_MESSAGE_BASE + 0xE,
103 PCI_EJECTION_COMPLETE = PCI_MESSAGE_BASE + 0xF,
104 PCI_RESOURCES_ASSIGNED = PCI_MESSAGE_BASE + 0x10,
105 PCI_RESOURCES_RELEASED = PCI_MESSAGE_BASE + 0x11,
106 PCI_INVALIDATE_BLOCK = PCI_MESSAGE_BASE + 0x12,
107 PCI_QUERY_PROTOCOL_VERSION = PCI_MESSAGE_BASE + 0x13,
108 PCI_CREATE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x14,
109 PCI_DELETE_INTERRUPT_MESSAGE = PCI_MESSAGE_BASE + 0x15,
114 * Structures defining the virtual PCI Express protocol.
126 * Function numbers are 8-bits wide on Express, as interpreted through ARI,
127 * which is all this driver does. This representation is the one used in
128 * Windows, which is what is expected when sending this back and forth with
129 * the Hyper-V parent partition.
131 union win_slot_encoding {
140 * Pretty much as defined in the PCI Specifications.
142 struct pci_function_description {
143 u16 v_id; /* vendor ID */
144 u16 d_id; /* device ID */
150 union win_slot_encoding win_slot;
151 u32 ser; /* serial number */
157 * @delivery_mode: As defined in Intel's Programmer's
158 * Reference Manual, Volume 3, Chapter 8.
159 * @vector_count: Number of contiguous entries in the
160 * Interrupt Descriptor Table that are
161 * occupied by this Message-Signaled
162 * Interrupt. For "MSI", as first defined
163 * in PCI 2.2, this can be between 1 and
164 * 32. For "MSI-X," as first defined in PCI
165 * 3.0, this must be 1, as each MSI-X table
166 * entry would have its own descriptor.
167 * @reserved: Empty space
168 * @cpu_mask: All the target virtual processors.
179 * struct tran_int_desc
180 * @reserved: unused, padding
181 * @vector_count: same as in hv_msi_desc
182 * @data: This is the "data payload" value that is
183 * written by the device when it generates
184 * a message-signaled interrupt, either MSI
186 * @address: This is the address to which the data
187 * payload is written on interrupt
190 struct tran_int_desc {
198 * A generic message format for virtual PCI.
199 * Specific message formats are defined later in the file.
206 struct pci_child_message {
207 struct pci_message message_type;
208 union win_slot_encoding wslot;
211 struct pci_incoming_message {
212 struct vmpacket_descriptor hdr;
213 struct pci_message message_type;
216 struct pci_response {
217 struct vmpacket_descriptor hdr;
218 s32 status; /* negative values are failures */
222 void (*completion_func)(void *context, struct pci_response *resp,
223 int resp_packet_size);
226 struct pci_message message[0];
230 * Specific message types supporting the PCI protocol.
234 * Version negotiation message. Sent from the guest to the host.
235 * The guest is free to try different versions until the host
236 * accepts the version.
238 * pci_version: The protocol version requested.
239 * is_last_attempt: If TRUE, this is the last version guest will request.
240 * reservedz: Reserved field, set to zero.
243 struct pci_version_request {
244 struct pci_message message_type;
245 enum pci_message_type protocol_version;
249 * Bus D0 Entry. This is sent from the guest to the host when the virtual
250 * bus (PCI Express port) is ready for action.
253 struct pci_bus_d0_entry {
254 struct pci_message message_type;
259 struct pci_bus_relations {
260 struct pci_incoming_message incoming;
262 struct pci_function_description func[0];
265 struct pci_q_res_req_response {
266 struct vmpacket_descriptor hdr;
267 s32 status; /* negative values are failures */
271 struct pci_set_power {
272 struct pci_message message_type;
273 union win_slot_encoding wslot;
274 u32 power_state; /* In Windows terms */
278 struct pci_set_power_response {
279 struct vmpacket_descriptor hdr;
280 s32 status; /* negative values are failures */
281 union win_slot_encoding wslot;
282 u32 resultant_state; /* In Windows terms */
286 struct pci_resources_assigned {
287 struct pci_message message_type;
288 union win_slot_encoding wslot;
289 u8 memory_range[0x14][6]; /* not used here */
294 struct pci_create_interrupt {
295 struct pci_message message_type;
296 union win_slot_encoding wslot;
297 struct hv_msi_desc int_desc;
300 struct pci_create_int_response {
301 struct pci_response response;
303 struct tran_int_desc int_desc;
306 struct pci_delete_interrupt {
307 struct pci_message message_type;
308 union win_slot_encoding wslot;
309 struct tran_int_desc int_desc;
312 struct pci_dev_incoming {
313 struct pci_incoming_message incoming;
314 union win_slot_encoding wslot;
317 struct pci_eject_response {
318 struct pci_message message_type;
319 union win_slot_encoding wslot;
323 static int pci_ring_size = (4 * PAGE_SIZE);
326 * Definitions or interrupt steering hypercall.
328 #define HV_PARTITION_ID_SELF ((u64)-1)
329 #define HVCALL_RETARGET_INTERRUPT 0x7e
331 struct retarget_msi_interrupt {
332 u64 partition_id; /* use "self" */
334 u32 source; /* 1 for MSI(-X) */
345 * Driver specific state.
348 enum hv_pcibus_state {
355 struct hv_pcibus_device {
356 struct pci_sysdata sysdata;
357 enum hv_pcibus_state state;
358 atomic_t remove_lock;
359 struct hv_device *hdev;
360 resource_size_t low_mmio_space;
361 resource_size_t high_mmio_space;
362 struct resource *mem_config;
363 struct resource *low_mmio_res;
364 struct resource *high_mmio_res;
365 struct completion *survey_event;
366 struct completion remove_event;
367 struct pci_bus *pci_bus;
368 spinlock_t config_lock; /* Avoid two threads writing index page */
369 spinlock_t device_list_lock; /* Protect lists below */
370 void __iomem *cfg_addr;
372 struct semaphore enum_sem;
373 struct list_head resources_for_children;
375 struct list_head children;
376 struct list_head dr_list;
378 struct msi_domain_info msi_info;
379 struct msi_controller msi_chip;
380 struct irq_domain *irq_domain;
384 * Tracks "Device Relations" messages from the host, which must be both
385 * processed in order and deferred so that they don't run in the context
386 * of the incoming packet callback.
389 struct work_struct wrk;
390 struct hv_pcibus_device *bus;
394 struct list_head list_entry;
396 struct pci_function_description func[0];
399 enum hv_pcichild_state {
400 hv_pcichild_init = 0,
401 hv_pcichild_requirements,
402 hv_pcichild_resourced,
403 hv_pcichild_ejecting,
407 enum hv_pcidev_ref_reason {
408 hv_pcidev_ref_invalid = 0,
409 hv_pcidev_ref_initial,
410 hv_pcidev_ref_by_slot,
411 hv_pcidev_ref_packet,
413 hv_pcidev_ref_childlist,
419 /* List protected by pci_rescan_remove_lock */
420 struct list_head list_entry;
422 enum hv_pcichild_state state;
423 struct pci_function_description desc;
424 bool reported_missing;
425 struct hv_pcibus_device *hbus;
426 struct work_struct wrk;
429 * What would be observed if one wrote 0xFFFFFFFF to a BAR and then
430 * read it back, for each of the BAR offsets within config space.
435 struct hv_pci_compl {
436 struct completion host_event;
437 s32 completion_status;
441 * hv_pci_generic_compl() - Invoked for a completion packet
442 * @context: Set up by the sender of the packet.
443 * @resp: The response packet
444 * @resp_packet_size: Size in bytes of the packet
446 * This function is used to trigger an event and report status
447 * for any message for which the completion packet contains a
448 * status and nothing else.
450 static void hv_pci_generic_compl(void *context, struct pci_response *resp,
451 int resp_packet_size)
453 struct hv_pci_compl *comp_pkt = context;
455 if (resp_packet_size >= offsetofend(struct pci_response, status))
456 comp_pkt->completion_status = resp->status;
458 comp_pkt->completion_status = -1;
460 complete(&comp_pkt->host_event);
463 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
465 static void get_pcichild(struct hv_pci_dev *hv_pcidev,
466 enum hv_pcidev_ref_reason reason);
467 static void put_pcichild(struct hv_pci_dev *hv_pcidev,
468 enum hv_pcidev_ref_reason reason);
470 static void get_hvpcibus(struct hv_pcibus_device *hv_pcibus);
471 static void put_hvpcibus(struct hv_pcibus_device *hv_pcibus);
474 * devfn_to_wslot() - Convert from Linux PCI slot to Windows
475 * @devfn: The Linux representation of PCI slot
477 * Windows uses a slightly different representation of PCI slot.
479 * Return: The Windows representation
481 static u32 devfn_to_wslot(int devfn)
483 union win_slot_encoding wslot;
486 wslot.bits.func = PCI_SLOT(devfn) | (PCI_FUNC(devfn) << 5);
492 * wslot_to_devfn() - Convert from Windows PCI slot to Linux
493 * @wslot: The Windows representation of PCI slot
495 * Windows uses a slightly different representation of PCI slot.
497 * Return: The Linux representation
499 static int wslot_to_devfn(u32 wslot)
501 union win_slot_encoding slot_no;
503 slot_no.slot = wslot;
504 return PCI_DEVFN(0, slot_no.bits.func);
508 * PCI Configuration Space for these root PCI buses is implemented as a pair
509 * of pages in memory-mapped I/O space. Writing to the first page chooses
510 * the PCI function being written or read. Once the first page has been
511 * written to, the following page maps in the entire configuration space of
516 * _hv_pcifront_read_config() - Internal PCI config read
517 * @hpdev: The PCI driver's representation of the device
518 * @where: Offset within config space
519 * @size: Size of the transfer
520 * @val: Pointer to the buffer receiving the data
522 static void _hv_pcifront_read_config(struct hv_pci_dev *hpdev, int where,
526 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
529 * If the attempt is to read the IDs or the ROM BAR, simulate that.
531 if (where + size <= PCI_COMMAND) {
532 memcpy(val, ((u8 *)&hpdev->desc.v_id) + where, size);
533 } else if (where >= PCI_CLASS_REVISION && where + size <=
534 PCI_CACHE_LINE_SIZE) {
535 memcpy(val, ((u8 *)&hpdev->desc.rev) + where -
536 PCI_CLASS_REVISION, size);
537 } else if (where >= PCI_SUBSYSTEM_VENDOR_ID && where + size <=
539 memcpy(val, (u8 *)&hpdev->desc.subsystem_id + where -
540 PCI_SUBSYSTEM_VENDOR_ID, size);
541 } else if (where >= PCI_ROM_ADDRESS && where + size <=
542 PCI_CAPABILITY_LIST) {
543 /* ROM BARs are unimplemented */
545 } else if (where >= PCI_INTERRUPT_LINE && where + size <=
548 * Interrupt Line and Interrupt PIN are hard-wired to zero
549 * because this front-end only supports message-signaled
553 } else if (where + size <= CFG_PAGE_SIZE) {
554 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
555 /* Choose the function to be read. (See comment above) */
556 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
557 /* Make sure the function was chosen before we start reading. */
559 /* Read from that function's config space. */
572 * Make sure the write was done before we release the spinlock
573 * allowing consecutive reads/writes.
576 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
578 dev_err(&hpdev->hbus->hdev->device,
579 "Attempt to read beyond a function's config space.\n");
584 * _hv_pcifront_write_config() - Internal PCI config write
585 * @hpdev: The PCI driver's representation of the device
586 * @where: Offset within config space
587 * @size: Size of the transfer
588 * @val: The data being transferred
590 static void _hv_pcifront_write_config(struct hv_pci_dev *hpdev, int where,
594 void __iomem *addr = hpdev->hbus->cfg_addr + CFG_PAGE_OFFSET + where;
596 if (where >= PCI_SUBSYSTEM_VENDOR_ID &&
597 where + size <= PCI_CAPABILITY_LIST) {
598 /* SSIDs and ROM BARs are read-only */
599 } else if (where >= PCI_COMMAND && where + size <= CFG_PAGE_SIZE) {
600 spin_lock_irqsave(&hpdev->hbus->config_lock, flags);
601 /* Choose the function to be written. (See comment above) */
602 writel(hpdev->desc.win_slot.slot, hpdev->hbus->cfg_addr);
603 /* Make sure the function was chosen before we start writing. */
605 /* Write to that function's config space. */
618 * Make sure the write was done before we release the spinlock
619 * allowing consecutive reads/writes.
622 spin_unlock_irqrestore(&hpdev->hbus->config_lock, flags);
624 dev_err(&hpdev->hbus->hdev->device,
625 "Attempt to write beyond a function's config space.\n");
630 * hv_pcifront_read_config() - Read configuration space
631 * @bus: PCI Bus structure
632 * @devfn: Device/function
633 * @where: Offset from base
634 * @size: Byte/word/dword
635 * @val: Value to be read
637 * Return: PCIBIOS_SUCCESSFUL on success
638 * PCIBIOS_DEVICE_NOT_FOUND on failure
640 static int hv_pcifront_read_config(struct pci_bus *bus, unsigned int devfn,
641 int where, int size, u32 *val)
643 struct hv_pcibus_device *hbus =
644 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
645 struct hv_pci_dev *hpdev;
647 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
649 return PCIBIOS_DEVICE_NOT_FOUND;
651 _hv_pcifront_read_config(hpdev, where, size, val);
653 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
654 return PCIBIOS_SUCCESSFUL;
658 * hv_pcifront_write_config() - Write configuration space
659 * @bus: PCI Bus structure
660 * @devfn: Device/function
661 * @where: Offset from base
662 * @size: Byte/word/dword
663 * @val: Value to be written to device
665 * Return: PCIBIOS_SUCCESSFUL on success
666 * PCIBIOS_DEVICE_NOT_FOUND on failure
668 static int hv_pcifront_write_config(struct pci_bus *bus, unsigned int devfn,
669 int where, int size, u32 val)
671 struct hv_pcibus_device *hbus =
672 container_of(bus->sysdata, struct hv_pcibus_device, sysdata);
673 struct hv_pci_dev *hpdev;
675 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(devfn));
677 return PCIBIOS_DEVICE_NOT_FOUND;
679 _hv_pcifront_write_config(hpdev, where, size, val);
681 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
682 return PCIBIOS_SUCCESSFUL;
685 /* PCIe operations */
686 static struct pci_ops hv_pcifront_ops = {
687 .read = hv_pcifront_read_config,
688 .write = hv_pcifront_write_config,
691 /* Interrupt management hooks */
692 static void hv_int_desc_free(struct hv_pci_dev *hpdev,
693 struct tran_int_desc *int_desc)
695 struct pci_delete_interrupt *int_pkt;
697 struct pci_packet pkt;
698 u8 buffer[sizeof(struct pci_delete_interrupt)];
701 memset(&ctxt, 0, sizeof(ctxt));
702 int_pkt = (struct pci_delete_interrupt *)&ctxt.pkt.message;
703 int_pkt->message_type.type =
704 PCI_DELETE_INTERRUPT_MESSAGE;
705 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
706 int_pkt->int_desc = *int_desc;
707 vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt, sizeof(*int_pkt),
708 (unsigned long)&ctxt.pkt, VM_PKT_DATA_INBAND, 0);
713 * hv_msi_free() - Free the MSI.
714 * @domain: The interrupt domain pointer
715 * @info: Extra MSI-related context
716 * @irq: Identifies the IRQ.
718 * The Hyper-V parent partition and hypervisor are tracking the
719 * messages that are in use, keeping the interrupt redirection
720 * table up to date. This callback sends a message that frees
721 * the IRT entry and related tracking nonsense.
723 static void hv_msi_free(struct irq_domain *domain, struct msi_domain_info *info,
726 struct hv_pcibus_device *hbus;
727 struct hv_pci_dev *hpdev;
728 struct pci_dev *pdev;
729 struct tran_int_desc *int_desc;
730 struct irq_data *irq_data = irq_domain_get_irq_data(domain, irq);
731 struct msi_desc *msi = irq_data_get_msi_desc(irq_data);
733 pdev = msi_desc_to_pci_dev(msi);
735 int_desc = irq_data_get_irq_chip_data(irq_data);
739 irq_data->chip_data = NULL;
740 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
746 hv_int_desc_free(hpdev, int_desc);
747 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
750 static int hv_set_affinity(struct irq_data *data, const struct cpumask *dest,
753 struct irq_data *parent = data->parent_data;
755 return parent->chip->irq_set_affinity(parent, dest, force);
758 void hv_irq_mask(struct irq_data *data)
760 pci_msi_mask_irq(data);
764 * hv_irq_unmask() - "Unmask" the IRQ by setting its current
766 * @data: Describes the IRQ
768 * Build new a destination for the MSI and make a hypercall to
769 * update the Interrupt Redirection Table. "Device Logical ID"
770 * is built out of this PCI bus's instance GUID and the function
771 * number of the device.
773 void hv_irq_unmask(struct irq_data *data)
775 struct msi_desc *msi_desc = irq_data_get_msi_desc(data);
776 struct irq_cfg *cfg = irqd_cfg(data);
777 struct retarget_msi_interrupt params;
778 struct hv_pcibus_device *hbus;
779 struct cpumask *dest;
780 struct pci_bus *pbus;
781 struct pci_dev *pdev;
784 dest = irq_data_get_affinity_mask(data);
785 pdev = msi_desc_to_pci_dev(msi_desc);
787 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
789 memset(¶ms, 0, sizeof(params));
790 params.partition_id = HV_PARTITION_ID_SELF;
791 params.source = 1; /* MSI(-X) */
792 params.address = msi_desc->msg.address_lo;
793 params.data = msi_desc->msg.data;
794 params.device_id = (hbus->hdev->dev_instance.b[5] << 24) |
795 (hbus->hdev->dev_instance.b[4] << 16) |
796 (hbus->hdev->dev_instance.b[7] << 8) |
797 (hbus->hdev->dev_instance.b[6] & 0xf8) |
798 PCI_FUNC(pdev->devfn);
799 params.vector = cfg->vector;
801 for_each_cpu_and(cpu, dest, cpu_online_mask)
802 params.vp_mask |= (1ULL << vmbus_cpu_number_to_vp_number(cpu));
804 hv_do_hypercall(HVCALL_RETARGET_INTERRUPT, ¶ms, NULL);
806 pci_msi_unmask_irq(data);
809 struct compose_comp_ctxt {
810 struct hv_pci_compl comp_pkt;
811 struct tran_int_desc int_desc;
814 static void hv_pci_compose_compl(void *context, struct pci_response *resp,
815 int resp_packet_size)
817 struct compose_comp_ctxt *comp_pkt = context;
818 struct pci_create_int_response *int_resp =
819 (struct pci_create_int_response *)resp;
821 comp_pkt->comp_pkt.completion_status = resp->status;
822 comp_pkt->int_desc = int_resp->int_desc;
823 complete(&comp_pkt->comp_pkt.host_event);
827 * hv_compose_msi_msg() - Supplies a valid MSI address/data
828 * @data: Everything about this MSI
829 * @msg: Buffer that is filled in by this function
831 * This function unpacks the IRQ looking for target CPU set, IDT
832 * vector and mode and sends a message to the parent partition
833 * asking for a mapping for that tuple in this partition. The
834 * response supplies a data value and address to which that data
835 * should be written to trigger that interrupt.
837 static void hv_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
839 struct irq_cfg *cfg = irqd_cfg(data);
840 struct hv_pcibus_device *hbus;
841 struct hv_pci_dev *hpdev;
842 struct pci_bus *pbus;
843 struct pci_dev *pdev;
844 struct pci_create_interrupt *int_pkt;
845 struct compose_comp_ctxt comp;
846 struct tran_int_desc *int_desc;
847 struct cpumask *affinity;
849 struct pci_packet pkt;
850 u8 buffer[sizeof(struct pci_create_interrupt)];
855 pdev = msi_desc_to_pci_dev(irq_data_get_msi_desc(data));
857 hbus = container_of(pbus->sysdata, struct hv_pcibus_device, sysdata);
858 hpdev = get_pcichild_wslot(hbus, devfn_to_wslot(pdev->devfn));
860 goto return_null_message;
862 /* Free any previous message that might have already been composed. */
863 if (data->chip_data) {
864 int_desc = data->chip_data;
865 data->chip_data = NULL;
866 hv_int_desc_free(hpdev, int_desc);
869 int_desc = kzalloc(sizeof(*int_desc), GFP_KERNEL);
873 memset(&ctxt, 0, sizeof(ctxt));
874 init_completion(&comp.comp_pkt.host_event);
875 ctxt.pkt.completion_func = hv_pci_compose_compl;
876 ctxt.pkt.compl_ctxt = ∁
877 int_pkt = (struct pci_create_interrupt *)&ctxt.pkt.message;
878 int_pkt->message_type.type = PCI_CREATE_INTERRUPT_MESSAGE;
879 int_pkt->wslot.slot = hpdev->desc.win_slot.slot;
880 int_pkt->int_desc.vector = cfg->vector;
881 int_pkt->int_desc.vector_count = 1;
882 int_pkt->int_desc.delivery_mode =
883 (apic->irq_delivery_mode == dest_LowestPrio) ? 1 : 0;
886 * This bit doesn't have to work on machines with more than 64
887 * processors because Hyper-V only supports 64 in a guest.
889 affinity = irq_data_get_affinity_mask(data);
890 for_each_cpu_and(cpu, affinity, cpu_online_mask) {
891 int_pkt->int_desc.cpu_mask |=
892 (1ULL << vmbus_cpu_number_to_vp_number(cpu));
895 ret = vmbus_sendpacket(hpdev->hbus->hdev->channel, int_pkt,
896 sizeof(*int_pkt), (unsigned long)&ctxt.pkt,
898 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
902 wait_for_completion(&comp.comp_pkt.host_event);
904 if (comp.comp_pkt.completion_status < 0) {
905 dev_err(&hbus->hdev->device,
906 "Request for interrupt failed: 0x%x",
907 comp.comp_pkt.completion_status);
912 * Record the assignment so that this can be unwound later. Using
913 * irq_set_chip_data() here would be appropriate, but the lock it takes
916 *int_desc = comp.int_desc;
917 data->chip_data = int_desc;
919 /* Pass up the result. */
920 msg->address_hi = comp.int_desc.address >> 32;
921 msg->address_lo = comp.int_desc.address & 0xffffffff;
922 msg->data = comp.int_desc.data;
924 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
930 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
937 /* HW Interrupt Chip Descriptor */
938 static struct irq_chip hv_msi_irq_chip = {
939 .name = "Hyper-V PCIe MSI",
940 .irq_compose_msi_msg = hv_compose_msi_msg,
941 .irq_set_affinity = hv_set_affinity,
942 .irq_ack = irq_chip_ack_parent,
943 .irq_mask = hv_irq_mask,
944 .irq_unmask = hv_irq_unmask,
947 static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
948 msi_alloc_info_t *arg)
950 return arg->msi_hwirq;
953 static struct msi_domain_ops hv_msi_ops = {
954 .get_hwirq = hv_msi_domain_ops_get_hwirq,
955 .msi_prepare = pci_msi_prepare,
956 .set_desc = pci_msi_set_desc,
957 .msi_free = hv_msi_free,
961 * hv_pcie_init_irq_domain() - Initialize IRQ domain
962 * @hbus: The root PCI bus
964 * This function creates an IRQ domain which will be used for
965 * interrupts from devices that have been passed through. These
966 * devices only support MSI and MSI-X, not line-based interrupts
967 * or simulations of line-based interrupts through PCIe's
968 * fabric-layer messages. Because interrupts are remapped, we
969 * can support multi-message MSI here.
971 * Return: '0' on success and error value on failure
973 static int hv_pcie_init_irq_domain(struct hv_pcibus_device *hbus)
975 hbus->msi_info.chip = &hv_msi_irq_chip;
976 hbus->msi_info.ops = &hv_msi_ops;
977 hbus->msi_info.flags = (MSI_FLAG_USE_DEF_DOM_OPS |
978 MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI |
980 hbus->msi_info.handler = handle_edge_irq;
981 hbus->msi_info.handler_name = "edge";
982 hbus->msi_info.data = hbus;
983 hbus->irq_domain = pci_msi_create_irq_domain(hbus->sysdata.fwnode,
986 if (!hbus->irq_domain) {
987 dev_err(&hbus->hdev->device,
988 "Failed to build an MSI IRQ domain\n");
996 * get_bar_size() - Get the address space consumed by a BAR
997 * @bar_val: Value that a BAR returned after -1 was written
1000 * This function returns the size of the BAR, rounded up to 1
1001 * page. It has to be rounded up because the hypervisor's page
1002 * table entry that maps the BAR into the VM can't specify an
1003 * offset within a page. The invariant is that the hypervisor
1004 * must place any BARs of smaller than page length at the
1005 * beginning of a page.
1007 * Return: Size in bytes of the consumed MMIO space.
1009 static u64 get_bar_size(u64 bar_val)
1011 return round_up((1 + ~(bar_val & PCI_BASE_ADDRESS_MEM_MASK)),
1016 * survey_child_resources() - Total all MMIO requirements
1017 * @hbus: Root PCI bus, as understood by this driver
1019 static void survey_child_resources(struct hv_pcibus_device *hbus)
1021 struct list_head *iter;
1022 struct hv_pci_dev *hpdev;
1023 resource_size_t bar_size = 0;
1024 unsigned long flags;
1025 struct completion *event;
1029 /* If nobody is waiting on the answer, don't compute it. */
1030 event = xchg(&hbus->survey_event, NULL);
1034 /* If the answer has already been computed, go with it. */
1035 if (hbus->low_mmio_space || hbus->high_mmio_space) {
1040 spin_lock_irqsave(&hbus->device_list_lock, flags);
1043 * Due to an interesting quirk of the PCI spec, all memory regions
1044 * for a child device are a power of 2 in size and aligned in memory,
1045 * so it's sufficient to just add them up without tracking alignment.
1047 list_for_each(iter, &hbus->children) {
1048 hpdev = container_of(iter, struct hv_pci_dev, list_entry);
1049 for (i = 0; i < 6; i++) {
1050 if (hpdev->probed_bar[i] & PCI_BASE_ADDRESS_SPACE_IO)
1051 dev_err(&hbus->hdev->device,
1052 "There's an I/O BAR in this list!\n");
1054 if (hpdev->probed_bar[i] != 0) {
1056 * A probed BAR has all the upper bits set that
1060 bar_val = hpdev->probed_bar[i];
1061 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1063 ((u64)hpdev->probed_bar[++i] << 32);
1065 bar_val |= 0xffffffff00000000ULL;
1067 bar_size = get_bar_size(bar_val);
1069 if (bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64)
1070 hbus->high_mmio_space += bar_size;
1072 hbus->low_mmio_space += bar_size;
1077 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1082 * prepopulate_bars() - Fill in BARs with defaults
1083 * @hbus: Root PCI bus, as understood by this driver
1085 * The core PCI driver code seems much, much happier if the BARs
1086 * for a device have values upon first scan. So fill them in.
1087 * The algorithm below works down from large sizes to small,
1088 * attempting to pack the assignments optimally. The assumption,
1089 * enforced in other parts of the code, is that the beginning of
1090 * the memory-mapped I/O space will be aligned on the largest
1093 static void prepopulate_bars(struct hv_pcibus_device *hbus)
1095 resource_size_t high_size = 0;
1096 resource_size_t low_size = 0;
1097 resource_size_t high_base = 0;
1098 resource_size_t low_base = 0;
1099 resource_size_t bar_size;
1100 struct hv_pci_dev *hpdev;
1101 struct list_head *iter;
1102 unsigned long flags;
1108 if (hbus->low_mmio_space) {
1109 low_size = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1110 low_base = hbus->low_mmio_res->start;
1113 if (hbus->high_mmio_space) {
1115 (63 - __builtin_clzll(hbus->high_mmio_space));
1116 high_base = hbus->high_mmio_res->start;
1119 spin_lock_irqsave(&hbus->device_list_lock, flags);
1121 /* Pick addresses for the BARs. */
1123 list_for_each(iter, &hbus->children) {
1124 hpdev = container_of(iter, struct hv_pci_dev,
1126 for (i = 0; i < 6; i++) {
1127 bar_val = hpdev->probed_bar[i];
1130 high = bar_val & PCI_BASE_ADDRESS_MEM_TYPE_64;
1133 ((u64)hpdev->probed_bar[i + 1]
1136 bar_val |= 0xffffffffULL << 32;
1138 bar_size = get_bar_size(bar_val);
1140 if (high_size != bar_size) {
1144 _hv_pcifront_write_config(hpdev,
1145 PCI_BASE_ADDRESS_0 + (4 * i),
1147 (u32)(high_base & 0xffffff00));
1149 _hv_pcifront_write_config(hpdev,
1150 PCI_BASE_ADDRESS_0 + (4 * i),
1151 4, (u32)(high_base >> 32));
1152 high_base += bar_size;
1154 if (low_size != bar_size)
1156 _hv_pcifront_write_config(hpdev,
1157 PCI_BASE_ADDRESS_0 + (4 * i),
1159 (u32)(low_base & 0xffffff00));
1160 low_base += bar_size;
1163 if (high_size <= 1 && low_size <= 1) {
1164 /* Set the memory enable bit. */
1165 _hv_pcifront_read_config(hpdev, PCI_COMMAND, 2,
1167 command |= PCI_COMMAND_MEMORY;
1168 _hv_pcifront_write_config(hpdev, PCI_COMMAND, 2,
1176 } while (high_size || low_size);
1178 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1182 * create_root_hv_pci_bus() - Expose a new root PCI bus
1183 * @hbus: Root PCI bus, as understood by this driver
1185 * Return: 0 on success, -errno on failure
1187 static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus)
1189 /* Register the device */
1190 hbus->pci_bus = pci_create_root_bus(&hbus->hdev->device,
1191 0, /* bus number is always zero */
1194 &hbus->resources_for_children);
1198 hbus->pci_bus->msi = &hbus->msi_chip;
1199 hbus->pci_bus->msi->dev = &hbus->hdev->device;
1201 pci_scan_child_bus(hbus->pci_bus);
1202 pci_bus_assign_resources(hbus->pci_bus);
1203 pci_bus_add_devices(hbus->pci_bus);
1204 hbus->state = hv_pcibus_installed;
1208 struct q_res_req_compl {
1209 struct completion host_event;
1210 struct hv_pci_dev *hpdev;
1214 * q_resource_requirements() - Query Resource Requirements
1215 * @context: The completion context.
1216 * @resp: The response that came from the host.
1217 * @resp_packet_size: The size in bytes of resp.
1219 * This function is invoked on completion of a Query Resource
1220 * Requirements packet.
1222 static void q_resource_requirements(void *context, struct pci_response *resp,
1223 int resp_packet_size)
1225 struct q_res_req_compl *completion = context;
1226 struct pci_q_res_req_response *q_res_req =
1227 (struct pci_q_res_req_response *)resp;
1230 if (resp->status < 0) {
1231 dev_err(&completion->hpdev->hbus->hdev->device,
1232 "query resource requirements failed: %x\n",
1235 for (i = 0; i < 6; i++) {
1236 completion->hpdev->probed_bar[i] =
1237 q_res_req->probed_bar[i];
1241 complete(&completion->host_event);
1244 static void get_pcichild(struct hv_pci_dev *hpdev,
1245 enum hv_pcidev_ref_reason reason)
1247 atomic_inc(&hpdev->refs);
1250 static void put_pcichild(struct hv_pci_dev *hpdev,
1251 enum hv_pcidev_ref_reason reason)
1253 if (atomic_dec_and_test(&hpdev->refs))
1258 * new_pcichild_device() - Create a new child device
1259 * @hbus: The internal struct tracking this root PCI bus.
1260 * @desc: The information supplied so far from the host
1263 * This function creates the tracking structure for a new child
1264 * device and kicks off the process of figuring out what it is.
1266 * Return: Pointer to the new tracking struct
1268 static struct hv_pci_dev *new_pcichild_device(struct hv_pcibus_device *hbus,
1269 struct pci_function_description *desc)
1271 struct hv_pci_dev *hpdev;
1272 struct pci_child_message *res_req;
1273 struct q_res_req_compl comp_pkt;
1275 struct pci_packet init_packet;
1278 unsigned long flags;
1281 hpdev = kzalloc(sizeof(*hpdev), GFP_ATOMIC);
1287 memset(&pkt, 0, sizeof(pkt));
1288 init_completion(&comp_pkt.host_event);
1289 comp_pkt.hpdev = hpdev;
1290 pkt.init_packet.compl_ctxt = &comp_pkt;
1291 pkt.init_packet.completion_func = q_resource_requirements;
1292 res_req = (struct pci_child_message *)&pkt.init_packet.message;
1293 res_req->message_type.type = PCI_QUERY_RESOURCE_REQUIREMENTS;
1294 res_req->wslot.slot = desc->win_slot.slot;
1296 ret = vmbus_sendpacket(hbus->hdev->channel, res_req,
1297 sizeof(struct pci_child_message),
1298 (unsigned long)&pkt.init_packet,
1300 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1304 wait_for_completion(&comp_pkt.host_event);
1306 hpdev->desc = *desc;
1307 get_pcichild(hpdev, hv_pcidev_ref_initial);
1308 get_pcichild(hpdev, hv_pcidev_ref_childlist);
1309 spin_lock_irqsave(&hbus->device_list_lock, flags);
1310 list_add_tail(&hpdev->list_entry, &hbus->children);
1311 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1320 * get_pcichild_wslot() - Find device from slot
1321 * @hbus: Root PCI bus, as understood by this driver
1322 * @wslot: Location on the bus
1324 * This function looks up a PCI device and returns the internal
1325 * representation of it. It acquires a reference on it, so that
1326 * the device won't be deleted while somebody is using it. The
1327 * caller is responsible for calling put_pcichild() to release
1330 * Return: Internal representation of a PCI device
1332 static struct hv_pci_dev *get_pcichild_wslot(struct hv_pcibus_device *hbus,
1335 unsigned long flags;
1336 struct hv_pci_dev *iter, *hpdev = NULL;
1338 spin_lock_irqsave(&hbus->device_list_lock, flags);
1339 list_for_each_entry(iter, &hbus->children, list_entry) {
1340 if (iter->desc.win_slot.slot == wslot) {
1342 get_pcichild(hpdev, hv_pcidev_ref_by_slot);
1346 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1352 * pci_devices_present_work() - Handle new list of child devices
1353 * @work: Work struct embedded in struct hv_dr_work
1355 * "Bus Relations" is the Windows term for "children of this
1356 * bus." The terminology is preserved here for people trying to
1357 * debug the interaction between Hyper-V and Linux. This
1358 * function is called when the parent partition reports a list
1359 * of functions that should be observed under this PCI Express
1362 * This function updates the list, and must tolerate being
1363 * called multiple times with the same information. The typical
1364 * number of child devices is one, with very atypical cases
1365 * involving three or four, so the algorithms used here can be
1366 * simple and inefficient.
1368 * It must also treat the omission of a previously observed device as
1369 * notification that the device no longer exists.
1371 * Note that this function is a work item, and it may not be
1372 * invoked in the order that it was queued. Back to back
1373 * updates of the list of present devices may involve queuing
1374 * multiple work items, and this one may run before ones that
1375 * were sent later. As such, this function only does something
1376 * if is the last one in the queue.
1378 static void pci_devices_present_work(struct work_struct *work)
1382 struct list_head *iter;
1383 struct pci_function_description *new_desc;
1384 struct hv_pci_dev *hpdev;
1385 struct hv_pcibus_device *hbus;
1386 struct list_head removed;
1387 struct hv_dr_work *dr_wrk;
1388 struct hv_dr_state *dr = NULL;
1389 unsigned long flags;
1391 dr_wrk = container_of(work, struct hv_dr_work, wrk);
1395 INIT_LIST_HEAD(&removed);
1397 if (down_interruptible(&hbus->enum_sem)) {
1402 /* Pull this off the queue and process it if it was the last one. */
1403 spin_lock_irqsave(&hbus->device_list_lock, flags);
1404 while (!list_empty(&hbus->dr_list)) {
1405 dr = list_first_entry(&hbus->dr_list, struct hv_dr_state,
1407 list_del(&dr->list_entry);
1409 /* Throw this away if the list still has stuff in it. */
1410 if (!list_empty(&hbus->dr_list)) {
1415 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1418 up(&hbus->enum_sem);
1423 /* First, mark all existing children as reported missing. */
1424 spin_lock_irqsave(&hbus->device_list_lock, flags);
1425 list_for_each(iter, &hbus->children) {
1426 hpdev = container_of(iter, struct hv_pci_dev,
1428 hpdev->reported_missing = true;
1430 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1432 /* Next, add back any reported devices. */
1433 for (child_no = 0; child_no < dr->device_count; child_no++) {
1435 new_desc = &dr->func[child_no];
1437 spin_lock_irqsave(&hbus->device_list_lock, flags);
1438 list_for_each(iter, &hbus->children) {
1439 hpdev = container_of(iter, struct hv_pci_dev,
1441 if ((hpdev->desc.win_slot.slot ==
1442 new_desc->win_slot.slot) &&
1443 (hpdev->desc.v_id == new_desc->v_id) &&
1444 (hpdev->desc.d_id == new_desc->d_id) &&
1445 (hpdev->desc.ser == new_desc->ser)) {
1446 hpdev->reported_missing = false;
1450 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1453 hpdev = new_pcichild_device(hbus, new_desc);
1455 dev_err(&hbus->hdev->device,
1456 "couldn't record a child device.\n");
1460 /* Move missing children to a list on the stack. */
1461 spin_lock_irqsave(&hbus->device_list_lock, flags);
1464 list_for_each(iter, &hbus->children) {
1465 hpdev = container_of(iter, struct hv_pci_dev,
1467 if (hpdev->reported_missing) {
1469 put_pcichild(hpdev, hv_pcidev_ref_childlist);
1470 list_move_tail(&hpdev->list_entry, &removed);
1475 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1477 /* Delete everything that should no longer exist. */
1478 while (!list_empty(&removed)) {
1479 hpdev = list_first_entry(&removed, struct hv_pci_dev,
1481 list_del(&hpdev->list_entry);
1482 put_pcichild(hpdev, hv_pcidev_ref_initial);
1485 /* Tell the core to rescan bus because there may have been changes. */
1486 if (hbus->state == hv_pcibus_installed) {
1487 pci_lock_rescan_remove();
1488 pci_scan_child_bus(hbus->pci_bus);
1489 pci_unlock_rescan_remove();
1491 survey_child_resources(hbus);
1494 up(&hbus->enum_sem);
1500 * hv_pci_devices_present() - Handles list of new children
1501 * @hbus: Root PCI bus, as understood by this driver
1502 * @relations: Packet from host listing children
1504 * This function is invoked whenever a new list of devices for
1507 static void hv_pci_devices_present(struct hv_pcibus_device *hbus,
1508 struct pci_bus_relations *relations)
1510 struct hv_dr_state *dr;
1511 struct hv_dr_work *dr_wrk;
1512 unsigned long flags;
1514 dr_wrk = kzalloc(sizeof(*dr_wrk), GFP_NOWAIT);
1518 dr = kzalloc(offsetof(struct hv_dr_state, func) +
1519 (sizeof(struct pci_function_description) *
1520 (relations->device_count)), GFP_NOWAIT);
1526 INIT_WORK(&dr_wrk->wrk, pci_devices_present_work);
1528 dr->device_count = relations->device_count;
1529 if (dr->device_count != 0) {
1530 memcpy(dr->func, relations->func,
1531 sizeof(struct pci_function_description) *
1535 spin_lock_irqsave(&hbus->device_list_lock, flags);
1536 list_add_tail(&dr->list_entry, &hbus->dr_list);
1537 spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1540 schedule_work(&dr_wrk->wrk);
1544 * hv_eject_device_work() - Asynchronously handles ejection
1545 * @work: Work struct embedded in internal device struct
1547 * This function handles ejecting a device. Windows will
1548 * attempt to gracefully eject a device, waiting 60 seconds to
1549 * hear back from the guest OS that this completed successfully.
1550 * If this timer expires, the device will be forcibly removed.
1552 static void hv_eject_device_work(struct work_struct *work)
1554 struct pci_eject_response *ejct_pkt;
1555 struct hv_pci_dev *hpdev;
1556 struct pci_dev *pdev;
1557 unsigned long flags;
1560 struct pci_packet pkt;
1561 u8 buffer[sizeof(struct pci_eject_response)];
1564 hpdev = container_of(work, struct hv_pci_dev, wrk);
1566 if (hpdev->state != hv_pcichild_ejecting) {
1567 put_pcichild(hpdev, hv_pcidev_ref_pnp);
1572 * Ejection can come before or after the PCI bus has been set up, so
1573 * attempt to find it and tear down the bus state, if it exists. This
1574 * must be done without constructs like pci_domain_nr(hbus->pci_bus)
1575 * because hbus->pci_bus may not exist yet.
1577 wslot = wslot_to_devfn(hpdev->desc.win_slot.slot);
1578 pdev = pci_get_domain_bus_and_slot(hpdev->hbus->sysdata.domain, 0,
1581 pci_stop_and_remove_bus_device(pdev);
1585 memset(&ctxt, 0, sizeof(ctxt));
1586 ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
1587 ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;
1588 ejct_pkt->wslot.slot = hpdev->desc.win_slot.slot;
1589 vmbus_sendpacket(hpdev->hbus->hdev->channel, ejct_pkt,
1590 sizeof(*ejct_pkt), (unsigned long)&ctxt.pkt,
1591 VM_PKT_DATA_INBAND, 0);
1593 spin_lock_irqsave(&hpdev->hbus->device_list_lock, flags);
1594 list_del(&hpdev->list_entry);
1595 spin_unlock_irqrestore(&hpdev->hbus->device_list_lock, flags);
1597 put_pcichild(hpdev, hv_pcidev_ref_childlist);
1598 put_pcichild(hpdev, hv_pcidev_ref_pnp);
1599 put_hvpcibus(hpdev->hbus);
1603 * hv_pci_eject_device() - Handles device ejection
1604 * @hpdev: Internal device tracking struct
1606 * This function is invoked when an ejection packet arrives. It
1607 * just schedules work so that we don't re-enter the packet
1608 * delivery code handling the ejection.
1610 static void hv_pci_eject_device(struct hv_pci_dev *hpdev)
1612 hpdev->state = hv_pcichild_ejecting;
1613 get_pcichild(hpdev, hv_pcidev_ref_pnp);
1614 INIT_WORK(&hpdev->wrk, hv_eject_device_work);
1615 get_hvpcibus(hpdev->hbus);
1616 schedule_work(&hpdev->wrk);
1620 * hv_pci_onchannelcallback() - Handles incoming packets
1621 * @context: Internal bus tracking struct
1623 * This function is invoked whenever the host sends a packet to
1624 * this channel (which is private to this root PCI bus).
1626 static void hv_pci_onchannelcallback(void *context)
1628 const int packet_size = 0x100;
1630 struct hv_pcibus_device *hbus = context;
1633 struct vmpacket_descriptor *desc;
1634 unsigned char *buffer;
1635 int bufferlen = packet_size;
1636 struct pci_packet *comp_packet;
1637 struct pci_response *response;
1638 struct pci_incoming_message *new_message;
1639 struct pci_bus_relations *bus_rel;
1640 struct pci_dev_incoming *dev_message;
1641 struct hv_pci_dev *hpdev;
1643 buffer = kmalloc(bufferlen, GFP_ATOMIC);
1648 ret = vmbus_recvpacket_raw(hbus->hdev->channel, buffer,
1649 bufferlen, &bytes_recvd, &req_id);
1651 if (ret == -ENOBUFS) {
1653 /* Handle large packet */
1654 bufferlen = bytes_recvd;
1655 buffer = kmalloc(bytes_recvd, GFP_ATOMIC);
1661 /* Zero length indicates there are no more packets. */
1662 if (ret || !bytes_recvd)
1666 * All incoming packets must be at least as large as a
1669 if (bytes_recvd <= sizeof(struct pci_response))
1671 desc = (struct vmpacket_descriptor *)buffer;
1673 switch (desc->type) {
1677 * The host is trusted, and thus it's safe to interpret
1678 * this transaction ID as a pointer.
1680 comp_packet = (struct pci_packet *)req_id;
1681 response = (struct pci_response *)buffer;
1682 comp_packet->completion_func(comp_packet->compl_ctxt,
1687 case VM_PKT_DATA_INBAND:
1689 new_message = (struct pci_incoming_message *)buffer;
1690 switch (new_message->message_type.type) {
1691 case PCI_BUS_RELATIONS:
1693 bus_rel = (struct pci_bus_relations *)buffer;
1695 offsetof(struct pci_bus_relations, func) +
1696 (sizeof(struct pci_function_description) *
1697 (bus_rel->device_count))) {
1698 dev_err(&hbus->hdev->device,
1699 "bus relations too small\n");
1703 hv_pci_devices_present(hbus, bus_rel);
1708 dev_message = (struct pci_dev_incoming *)buffer;
1709 hpdev = get_pcichild_wslot(hbus,
1710 dev_message->wslot.slot);
1712 hv_pci_eject_device(hpdev);
1714 hv_pcidev_ref_by_slot);
1719 dev_warn(&hbus->hdev->device,
1720 "Unimplemented protocol message %x\n",
1721 new_message->message_type.type);
1727 dev_err(&hbus->hdev->device,
1728 "unhandled packet type %d, tid %llx len %d\n",
1729 desc->type, req_id, bytes_recvd);
1738 * hv_pci_protocol_negotiation() - Set up protocol
1739 * @hdev: VMBus's tracking struct for this root PCI bus
1741 * This driver is intended to support running on Windows 10
1742 * (server) and later versions. It will not run on earlier
1743 * versions, as they assume that many of the operations which
1744 * Linux needs accomplished with a spinlock held were done via
1745 * asynchronous messaging via VMBus. Windows 10 increases the
1746 * surface area of PCI emulation so that these actions can take
1747 * place by suspending a virtual processor for their duration.
1749 * This function negotiates the channel protocol version,
1750 * failing if the host doesn't support the necessary protocol
1753 static int hv_pci_protocol_negotiation(struct hv_device *hdev)
1755 struct pci_version_request *version_req;
1756 struct hv_pci_compl comp_pkt;
1757 struct pci_packet *pkt;
1761 * Initiate the handshake with the host and negotiate
1762 * a version that the host can support. We start with the
1763 * highest version number and go down if the host cannot
1766 pkt = kzalloc(sizeof(*pkt) + sizeof(*version_req), GFP_KERNEL);
1770 init_completion(&comp_pkt.host_event);
1771 pkt->completion_func = hv_pci_generic_compl;
1772 pkt->compl_ctxt = &comp_pkt;
1773 version_req = (struct pci_version_request *)&pkt->message;
1774 version_req->message_type.type = PCI_QUERY_PROTOCOL_VERSION;
1775 version_req->protocol_version = PCI_PROTOCOL_VERSION_CURRENT;
1777 ret = vmbus_sendpacket(hdev->channel, version_req,
1778 sizeof(struct pci_version_request),
1779 (unsigned long)pkt, VM_PKT_DATA_INBAND,
1780 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1784 wait_for_completion(&comp_pkt.host_event);
1786 if (comp_pkt.completion_status < 0) {
1787 dev_err(&hdev->device,
1788 "PCI Pass-through VSP failed version request %x\n",
1789 comp_pkt.completion_status);
1802 * hv_pci_free_bridge_windows() - Release memory regions for the
1804 * @hbus: Root PCI bus, as understood by this driver
1806 static void hv_pci_free_bridge_windows(struct hv_pcibus_device *hbus)
1809 * Set the resources back to the way they looked when they
1810 * were allocated by setting IORESOURCE_BUSY again.
1813 if (hbus->low_mmio_space && hbus->low_mmio_res) {
1814 hbus->low_mmio_res->flags |= IORESOURCE_BUSY;
1815 vmbus_free_mmio(hbus->low_mmio_res->start,
1816 resource_size(hbus->low_mmio_res));
1819 if (hbus->high_mmio_space && hbus->high_mmio_res) {
1820 hbus->high_mmio_res->flags |= IORESOURCE_BUSY;
1821 vmbus_free_mmio(hbus->high_mmio_res->start,
1822 resource_size(hbus->high_mmio_res));
1827 * hv_pci_allocate_bridge_windows() - Allocate memory regions
1829 * @hbus: Root PCI bus, as understood by this driver
1831 * This function calls vmbus_allocate_mmio(), which is itself a
1832 * bit of a compromise. Ideally, we might change the pnp layer
1833 * in the kernel such that it comprehends either PCI devices
1834 * which are "grandchildren of ACPI," with some intermediate bus
1835 * node (in this case, VMBus) or change it such that it
1836 * understands VMBus. The pnp layer, however, has been declared
1837 * deprecated, and not subject to change.
1839 * The workaround, implemented here, is to ask VMBus to allocate
1840 * MMIO space for this bus. VMBus itself knows which ranges are
1841 * appropriate by looking at its own ACPI objects. Then, after
1842 * these ranges are claimed, they're modified to look like they
1843 * would have looked if the ACPI and pnp code had allocated
1844 * bridge windows. These descriptors have to exist in this form
1845 * in order to satisfy the code which will get invoked when the
1846 * endpoint PCI function driver calls request_mem_region() or
1847 * request_mem_region_exclusive().
1849 * Return: 0 on success, -errno on failure
1851 static int hv_pci_allocate_bridge_windows(struct hv_pcibus_device *hbus)
1853 resource_size_t align;
1856 if (hbus->low_mmio_space) {
1857 align = 1ULL << (63 - __builtin_clzll(hbus->low_mmio_space));
1858 ret = vmbus_allocate_mmio(&hbus->low_mmio_res, hbus->hdev, 0,
1859 (u64)(u32)0xffffffff,
1860 hbus->low_mmio_space,
1863 dev_err(&hbus->hdev->device,
1864 "Need %#llx of low MMIO space. Consider reconfiguring the VM.\n",
1865 hbus->low_mmio_space);
1869 /* Modify this resource to become a bridge window. */
1870 hbus->low_mmio_res->flags |= IORESOURCE_WINDOW;
1871 hbus->low_mmio_res->flags &= ~IORESOURCE_BUSY;
1872 pci_add_resource(&hbus->resources_for_children,
1873 hbus->low_mmio_res);
1876 if (hbus->high_mmio_space) {
1877 align = 1ULL << (63 - __builtin_clzll(hbus->high_mmio_space));
1878 ret = vmbus_allocate_mmio(&hbus->high_mmio_res, hbus->hdev,
1880 hbus->high_mmio_space, align,
1883 dev_err(&hbus->hdev->device,
1884 "Need %#llx of high MMIO space. Consider reconfiguring the VM.\n",
1885 hbus->high_mmio_space);
1886 goto release_low_mmio;
1889 /* Modify this resource to become a bridge window. */
1890 hbus->high_mmio_res->flags |= IORESOURCE_WINDOW;
1891 hbus->high_mmio_res->flags &= ~IORESOURCE_BUSY;
1892 pci_add_resource(&hbus->resources_for_children,
1893 hbus->high_mmio_res);
1899 if (hbus->low_mmio_res) {
1900 vmbus_free_mmio(hbus->low_mmio_res->start,
1901 resource_size(hbus->low_mmio_res));
1908 * hv_allocate_config_window() - Find MMIO space for PCI Config
1909 * @hbus: Root PCI bus, as understood by this driver
1911 * This function claims memory-mapped I/O space for accessing
1912 * configuration space for the functions on this bus.
1914 * Return: 0 on success, -errno on failure
1916 static int hv_allocate_config_window(struct hv_pcibus_device *hbus)
1921 * Set up a region of MMIO space to use for accessing configuration
1924 ret = vmbus_allocate_mmio(&hbus->mem_config, hbus->hdev, 0, -1,
1925 PCI_CONFIG_MMIO_LENGTH, 0x1000, false);
1930 * vmbus_allocate_mmio() gets used for allocating both device endpoint
1931 * resource claims (those which cannot be overlapped) and the ranges
1932 * which are valid for the children of this bus, which are intended
1933 * to be overlapped by those children. Set the flag on this claim
1934 * meaning that this region can't be overlapped.
1937 hbus->mem_config->flags |= IORESOURCE_BUSY;
1942 static void hv_free_config_window(struct hv_pcibus_device *hbus)
1944 vmbus_free_mmio(hbus->mem_config->start, PCI_CONFIG_MMIO_LENGTH);
1948 * hv_pci_enter_d0() - Bring the "bus" into the D0 power state
1949 * @hdev: VMBus's tracking struct for this root PCI bus
1951 * Return: 0 on success, -errno on failure
1953 static int hv_pci_enter_d0(struct hv_device *hdev)
1955 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
1956 struct pci_bus_d0_entry *d0_entry;
1957 struct hv_pci_compl comp_pkt;
1958 struct pci_packet *pkt;
1962 * Tell the host that the bus is ready to use, and moved into the
1963 * powered-on state. This includes telling the host which region
1964 * of memory-mapped I/O space has been chosen for configuration space
1967 pkt = kzalloc(sizeof(*pkt) + sizeof(*d0_entry), GFP_KERNEL);
1971 init_completion(&comp_pkt.host_event);
1972 pkt->completion_func = hv_pci_generic_compl;
1973 pkt->compl_ctxt = &comp_pkt;
1974 d0_entry = (struct pci_bus_d0_entry *)&pkt->message;
1975 d0_entry->message_type.type = PCI_BUS_D0ENTRY;
1976 d0_entry->mmio_base = hbus->mem_config->start;
1978 ret = vmbus_sendpacket(hdev->channel, d0_entry, sizeof(*d0_entry),
1979 (unsigned long)pkt, VM_PKT_DATA_INBAND,
1980 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
1984 wait_for_completion(&comp_pkt.host_event);
1986 if (comp_pkt.completion_status < 0) {
1987 dev_err(&hdev->device,
1988 "PCI Pass-through VSP failed D0 Entry with status %x\n",
1989 comp_pkt.completion_status);
2002 * hv_pci_query_relations() - Ask host to send list of child
2004 * @hdev: VMBus's tracking struct for this root PCI bus
2006 * Return: 0 on success, -errno on failure
2008 static int hv_pci_query_relations(struct hv_device *hdev)
2010 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2011 struct pci_message message;
2012 struct completion comp;
2015 /* Ask the host to send along the list of child devices */
2016 init_completion(&comp);
2017 if (cmpxchg(&hbus->survey_event, NULL, &comp))
2020 memset(&message, 0, sizeof(message));
2021 message.type = PCI_QUERY_BUS_RELATIONS;
2023 ret = vmbus_sendpacket(hdev->channel, &message, sizeof(message),
2024 0, VM_PKT_DATA_INBAND, 0);
2028 wait_for_completion(&comp);
2033 * hv_send_resources_allocated() - Report local resource choices
2034 * @hdev: VMBus's tracking struct for this root PCI bus
2036 * The host OS is expecting to be sent a request as a message
2037 * which contains all the resources that the device will use.
2038 * The response contains those same resources, "translated"
2039 * which is to say, the values which should be used by the
2040 * hardware, when it delivers an interrupt. (MMIO resources are
2041 * used in local terms.) This is nice for Windows, and lines up
2042 * with the FDO/PDO split, which doesn't exist in Linux. Linux
2043 * is deeply expecting to scan an emulated PCI configuration
2044 * space. So this message is sent here only to drive the state
2045 * machine on the host forward.
2047 * Return: 0 on success, -errno on failure
2049 static int hv_send_resources_allocated(struct hv_device *hdev)
2051 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2052 struct pci_resources_assigned *res_assigned;
2053 struct hv_pci_compl comp_pkt;
2054 struct hv_pci_dev *hpdev;
2055 struct pci_packet *pkt;
2059 pkt = kmalloc(sizeof(*pkt) + sizeof(*res_assigned), GFP_KERNEL);
2065 for (wslot = 0; wslot < 256; wslot++) {
2066 hpdev = get_pcichild_wslot(hbus, wslot);
2070 memset(pkt, 0, sizeof(*pkt) + sizeof(*res_assigned));
2071 init_completion(&comp_pkt.host_event);
2072 pkt->completion_func = hv_pci_generic_compl;
2073 pkt->compl_ctxt = &comp_pkt;
2074 res_assigned = (struct pci_resources_assigned *)&pkt->message;
2075 res_assigned->message_type.type = PCI_RESOURCES_ASSIGNED;
2076 res_assigned->wslot.slot = hpdev->desc.win_slot.slot;
2078 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
2080 ret = vmbus_sendpacket(
2081 hdev->channel, &pkt->message,
2082 sizeof(*res_assigned),
2085 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2089 wait_for_completion(&comp_pkt.host_event);
2091 if (comp_pkt.completion_status < 0) {
2093 dev_err(&hdev->device,
2094 "resource allocated returned 0x%x",
2095 comp_pkt.completion_status);
2105 * hv_send_resources_released() - Report local resources
2107 * @hdev: VMBus's tracking struct for this root PCI bus
2109 * Return: 0 on success, -errno on failure
2111 static int hv_send_resources_released(struct hv_device *hdev)
2113 struct hv_pcibus_device *hbus = hv_get_drvdata(hdev);
2114 struct pci_child_message pkt;
2115 struct hv_pci_dev *hpdev;
2119 for (wslot = 0; wslot < 256; wslot++) {
2120 hpdev = get_pcichild_wslot(hbus, wslot);
2124 memset(&pkt, 0, sizeof(pkt));
2125 pkt.message_type.type = PCI_RESOURCES_RELEASED;
2126 pkt.wslot.slot = hpdev->desc.win_slot.slot;
2128 put_pcichild(hpdev, hv_pcidev_ref_by_slot);
2130 ret = vmbus_sendpacket(hdev->channel, &pkt, sizeof(pkt), 0,
2131 VM_PKT_DATA_INBAND, 0);
2139 static void get_hvpcibus(struct hv_pcibus_device *hbus)
2141 atomic_inc(&hbus->remove_lock);
2144 static void put_hvpcibus(struct hv_pcibus_device *hbus)
2146 if (atomic_dec_and_test(&hbus->remove_lock))
2147 complete(&hbus->remove_event);
2151 * hv_pci_probe() - New VMBus channel probe, for a root PCI bus
2152 * @hdev: VMBus's tracking struct for this root PCI bus
2153 * @dev_id: Identifies the device itself
2155 * Return: 0 on success, -errno on failure
2157 static int hv_pci_probe(struct hv_device *hdev,
2158 const struct hv_vmbus_device_id *dev_id)
2160 struct hv_pcibus_device *hbus;
2163 hbus = kzalloc(sizeof(*hbus), GFP_KERNEL);
2168 * The PCI bus "domain" is what is called "segment" in ACPI and
2169 * other specs. Pull it from the instance ID, to get something
2170 * unique. Bytes 8 and 9 are what is used in Windows guests, so
2171 * do the same thing for consistency. Note that, since this code
2172 * only runs in a Hyper-V VM, Hyper-V can (and does) guarantee
2173 * that (1) the only domain in use for something that looks like
2174 * a physical PCI bus (which is actually emulated by the
2175 * hypervisor) is domain 0 and (2) there will be no overlap
2176 * between domains derived from these instance IDs in the same
2179 hbus->sysdata.domain = hdev->dev_instance.b[9] |
2180 hdev->dev_instance.b[8] << 8;
2183 atomic_inc(&hbus->remove_lock);
2184 INIT_LIST_HEAD(&hbus->children);
2185 INIT_LIST_HEAD(&hbus->dr_list);
2186 INIT_LIST_HEAD(&hbus->resources_for_children);
2187 spin_lock_init(&hbus->config_lock);
2188 spin_lock_init(&hbus->device_list_lock);
2189 sema_init(&hbus->enum_sem, 1);
2190 init_completion(&hbus->remove_event);
2192 ret = vmbus_open(hdev->channel, pci_ring_size, pci_ring_size, NULL, 0,
2193 hv_pci_onchannelcallback, hbus);
2197 hv_set_drvdata(hdev, hbus);
2199 ret = hv_pci_protocol_negotiation(hdev);
2203 ret = hv_allocate_config_window(hbus);
2207 hbus->cfg_addr = ioremap(hbus->mem_config->start,
2208 PCI_CONFIG_MMIO_LENGTH);
2209 if (!hbus->cfg_addr) {
2210 dev_err(&hdev->device,
2211 "Unable to map a virtual address for config space\n");
2216 hbus->sysdata.fwnode = irq_domain_alloc_fwnode(hbus);
2217 if (!hbus->sysdata.fwnode) {
2222 ret = hv_pcie_init_irq_domain(hbus);
2226 ret = hv_pci_query_relations(hdev);
2228 goto free_irq_domain;
2230 ret = hv_pci_enter_d0(hdev);
2232 goto free_irq_domain;
2234 ret = hv_pci_allocate_bridge_windows(hbus);
2236 goto free_irq_domain;
2238 ret = hv_send_resources_allocated(hdev);
2242 prepopulate_bars(hbus);
2244 hbus->state = hv_pcibus_probed;
2246 ret = create_root_hv_pci_bus(hbus);
2253 hv_pci_free_bridge_windows(hbus);
2255 irq_domain_remove(hbus->irq_domain);
2257 irq_domain_free_fwnode(hbus->sysdata.fwnode);
2259 iounmap(hbus->cfg_addr);
2261 hv_free_config_window(hbus);
2263 vmbus_close(hdev->channel);
2270 * hv_pci_remove() - Remove routine for this VMBus channel
2271 * @hdev: VMBus's tracking struct for this root PCI bus
2273 * Return: 0 on success, -errno on failure
2275 static int hv_pci_remove(struct hv_device *hdev)
2278 struct hv_pcibus_device *hbus;
2280 struct pci_packet teardown_packet;
2283 struct pci_bus_relations relations;
2284 struct hv_pci_compl comp_pkt;
2286 hbus = hv_get_drvdata(hdev);
2288 memset(&pkt.teardown_packet, 0, sizeof(pkt.teardown_packet));
2289 init_completion(&comp_pkt.host_event);
2290 pkt.teardown_packet.completion_func = hv_pci_generic_compl;
2291 pkt.teardown_packet.compl_ctxt = &comp_pkt;
2292 pkt.teardown_packet.message[0].type = PCI_BUS_D0EXIT;
2294 ret = vmbus_sendpacket(hdev->channel, &pkt.teardown_packet.message,
2295 sizeof(struct pci_message),
2296 (unsigned long)&pkt.teardown_packet,
2298 VMBUS_DATA_PACKET_FLAG_COMPLETION_REQUESTED);
2300 wait_for_completion_timeout(&comp_pkt.host_event, 10 * HZ);
2302 if (hbus->state == hv_pcibus_installed) {
2303 /* Remove the bus from PCI's point of view. */
2304 pci_lock_rescan_remove();
2305 pci_stop_root_bus(hbus->pci_bus);
2306 pci_remove_root_bus(hbus->pci_bus);
2307 pci_unlock_rescan_remove();
2310 ret = hv_send_resources_released(hdev);
2312 dev_err(&hdev->device,
2313 "Couldn't send resources released packet(s)\n");
2315 vmbus_close(hdev->channel);
2317 /* Delete any children which might still exist. */
2318 memset(&relations, 0, sizeof(relations));
2319 hv_pci_devices_present(hbus, &relations);
2321 iounmap(hbus->cfg_addr);
2322 hv_free_config_window(hbus);
2323 pci_free_resource_list(&hbus->resources_for_children);
2324 hv_pci_free_bridge_windows(hbus);
2325 irq_domain_remove(hbus->irq_domain);
2326 irq_domain_free_fwnode(hbus->sysdata.fwnode);
2328 wait_for_completion(&hbus->remove_event);
2333 static const struct hv_vmbus_device_id hv_pci_id_table[] = {
2334 /* PCI Pass-through Class ID */
2335 /* 44C4F61D-4444-4400-9D52-802E27EDE19F */
2340 MODULE_DEVICE_TABLE(vmbus, hv_pci_id_table);
2342 static struct hv_driver hv_pci_drv = {
2344 .id_table = hv_pci_id_table,
2345 .probe = hv_pci_probe,
2346 .remove = hv_pci_remove,
2349 static void __exit exit_hv_pci_drv(void)
2351 vmbus_driver_unregister(&hv_pci_drv);
2354 static int __init init_hv_pci_drv(void)
2356 return vmbus_driver_register(&hv_pci_drv);
2359 module_init(init_hv_pci_drv);
2360 module_exit(exit_hv_pci_drv);
2362 MODULE_DESCRIPTION("Hyper-V PCI");
2363 MODULE_LICENSE("GPL v2");