2 * Synopsys Designware PCIe host controller driver
4 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * Author: Jingoo Han <jg1.han@samsung.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 struct pcie_port_info {
19 phys_addr_t io_bus_addr;
20 phys_addr_t mem_bus_addr;
24 * Maximum number of MSI IRQs can be 256 per controller. But keep
25 * it 32 as of now. Probably we will never need more than 32. If needed,
26 * then increment it in multiple of 32.
28 #define MAX_MSI_IRQS 32
29 #define MAX_MSI_CTRLS (MAX_MSI_IRQS / 32)
34 void __iomem *dbi_base;
36 void __iomem *va_cfg0_base;
38 void __iomem *va_cfg1_base;
45 struct pcie_port_info config;
48 struct pcie_host_ops *ops;
51 unsigned long msi_data;
52 DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
55 struct pcie_host_ops {
56 void (*readl_rc)(struct pcie_port *pp,
57 void __iomem *dbi_base, u32 *val);
58 void (*writel_rc)(struct pcie_port *pp,
59 u32 val, void __iomem *dbi_base);
60 int (*rd_own_conf)(struct pcie_port *pp, int where, int size, u32 *val);
61 int (*wr_own_conf)(struct pcie_port *pp, int where, int size, u32 val);
62 int (*link_up)(struct pcie_port *pp);
63 void (*host_init)(struct pcie_port *pp);
66 extern unsigned long global_io_offset;
68 int cfg_read(void __iomem *addr, int where, int size, u32 *val);
69 int cfg_write(void __iomem *addr, int where, int size, u32 val);
70 int dw_pcie_wr_own_conf(struct pcie_port *pp, int where, int size, u32 val);
71 int dw_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, u32 *val);
72 void dw_handle_msi_irq(struct pcie_port *pp);
73 void dw_pcie_msi_init(struct pcie_port *pp);
74 int dw_pcie_link_up(struct pcie_port *pp);
75 void dw_pcie_setup_rc(struct pcie_port *pp);
76 int dw_pcie_host_init(struct pcie_port *pp);
77 int dw_pcie_setup(int nr, struct pci_sys_data *sys);
78 struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys);
79 int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);