1 #include <linux/pci-ecam.h>
2 #include <linux/delay.h>
5 #define SMP8759_MUX 0x48
6 #define SMP8759_TEST_OUT 0x74
12 static int smp8759_config_read(struct pci_bus *bus, unsigned int devfn,
13 int where, int size, u32 *val)
15 struct pci_config_window *cfg = bus->sysdata;
16 struct tango_pcie *pcie = dev_get_drvdata(cfg->parent);
19 /* Reads in configuration space outside devfn 0 return garbage */
21 return PCIBIOS_FUNC_NOT_SUPPORTED;
24 * PCI config and MMIO accesses are muxed. Linux doesn't have a
25 * mutual exclusion mechanism for config vs. MMIO accesses, so
26 * concurrent accesses may cause corruption.
28 writel_relaxed(1, pcie->base + SMP8759_MUX);
29 ret = pci_generic_config_read(bus, devfn, where, size, val);
30 writel_relaxed(0, pcie->base + SMP8759_MUX);
35 static int smp8759_config_write(struct pci_bus *bus, unsigned int devfn,
36 int where, int size, u32 val)
38 struct pci_config_window *cfg = bus->sysdata;
39 struct tango_pcie *pcie = dev_get_drvdata(cfg->parent);
42 writel_relaxed(1, pcie->base + SMP8759_MUX);
43 ret = pci_generic_config_write(bus, devfn, where, size, val);
44 writel_relaxed(0, pcie->base + SMP8759_MUX);
49 static struct pci_ecam_ops smp8759_ecam_ops = {
52 .map_bus = pci_ecam_map_bus,
53 .read = smp8759_config_read,
54 .write = smp8759_config_write,
58 static int tango_pcie_link_up(struct tango_pcie *pcie)
60 void __iomem *test_out = pcie->base + SMP8759_TEST_OUT;
63 writel_relaxed(16, test_out);
64 for (i = 0; i < 10; ++i) {
65 u32 ltssm_state = readl_relaxed(test_out) >> 8;
66 if ((ltssm_state & 0x1f) == 0xf) /* L0 */
68 usleep_range(3000, 4000);
74 static int tango_pcie_probe(struct platform_device *pdev)
76 struct device *dev = &pdev->dev;
77 struct tango_pcie *pcie;
81 dev_warn(dev, "simultaneous PCI config and MMIO accesses may cause data corruption\n");
82 add_taint(TAINT_CRAP, LOCKDEP_STILL_OK);
84 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
88 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
89 pcie->base = devm_ioremap_resource(dev, res);
90 if (IS_ERR(pcie->base))
91 return PTR_ERR(pcie->base);
93 platform_set_drvdata(pdev, pcie);
95 if (!tango_pcie_link_up(pcie))
98 return pci_host_common_probe(pdev, &smp8759_ecam_ops);
101 static const struct of_device_id tango_pcie_ids[] = {
102 { .compatible = "sigma,smp8759-pcie" },
106 static struct platform_driver tango_pcie_driver = {
107 .probe = tango_pcie_probe,
109 .name = KBUILD_MODNAME,
110 .of_match_table = tango_pcie_ids,
111 .suppress_bind_attrs = true,
114 builtin_platform_driver(tango_pcie_driver);
117 * The root complex advertises the wrong device class.
118 * Header Type 1 is for PCI-to-PCI bridges.
120 static void tango_fixup_class(struct pci_dev *dev)
122 dev->class = PCI_CLASS_BRIDGE_PCI << 8;
124 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIGMA, 0x0024, tango_fixup_class);
125 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIGMA, 0x0028, tango_fixup_class);
128 * The root complex exposes a "fake" BAR, which is used to filter
129 * bus-to-system accesses. Only accesses within the range defined by this
130 * BAR are forwarded to the host, others are ignored.
132 * By default, the DMA framework expects an identity mapping, and DRAM0 is
133 * mapped at 0x80000000.
135 static void tango_fixup_bar(struct pci_dev *dev)
137 dev->non_compliant_bars = true;
138 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x80000000);
140 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIGMA, 0x0024, tango_fixup_bar);
141 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIGMA, 0x0028, tango_fixup_bar);