drivers/pci/hotplug/cpqphp_pci.c

   1 /*
   2  * Compaq Hot Plug Controller Driver
   3  *
   4  * Copyright (C) 1995,2001 Compaq Computer Corporation
   5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
   6  * Copyright (C) 2001 IBM Corp.
   7  *
   8  * All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18  * NON INFRINGEMENT.  See the GNU General Public License for more
  19  * details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  *
  25  * Send feedback to <greg@kroah.com>
  26  *
  27  */
  28
  29 #include <linux/module.h>
  30 #include <linux/kernel.h>
  31 #include <linux/types.h>
  32 #include <linux/slab.h>
  33 #include <linux/workqueue.h>
  34 #include <linux/proc_fs.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci_hotplug.h>
  37 #include "../pci.h"
  38 #include "cpqphp.h"
  39 #include "cpqphp_nvram.h"
  40 #include <asm/pci_x86.h>
  41
  42
  43 u8 cpqhp_nic_irq;
  44 u8 cpqhp_disk_irq;
  45
  46 static u16 unused_IRQ;
  47
  48 /*
  49  * detect_HRT_floating_pointer
  50  *
  51  * find the Hot Plug Resource Table in the specified region of memory.
  52  *
  53  */
  54 static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iomem *end)
  55 {
  56         void __iomem *fp;
  57         void __iomem *endp;
  58         u8 temp1, temp2, temp3, temp4;
  59         int status = 0;
  60
  61         endp = (end - sizeof(struct hrt) + 1);
  62
  63         for (fp = begin; fp <= endp; fp += 16) {
  64                 temp1 = readb(fp + SIG0);
  65                 temp2 = readb(fp + SIG1);
  66                 temp3 = readb(fp + SIG2);
  67                 temp4 = readb(fp + SIG3);
  68                 if (temp1 == '$' &&
  69                     temp2 == 'H' &&
  70                     temp3 == 'R' &&
  71                     temp4 == 'T') {
  72                         status = 1;
  73                         break;
  74                 }
  75         }
  76
  77         if (!status)
  78                 fp = NULL;
  79
  80         dbg("Discovered Hotplug Resource Table at %p\n", fp);
  81         return fp;
  82 }
  83
  84
  85 int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func)
  86 {
  87         unsigned char bus;
  88         struct pci_bus *child;
  89         int num;
  90
  91         if (func->pci_dev == NULL)
  92                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
  93
  94         /* No pci device, we need to create it then */
  95         if (func->pci_dev == NULL) {
  96                 dbg("INFO: pci_dev still null\n");
  97
  98                 num = pci_scan_slot(ctrl->pci_dev->bus, PCI_DEVFN(func->device, func->function));
  99                 if (num)
 100                         pci_bus_add_devices(ctrl->pci_dev->bus);
 101
 102                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
 103                 if (func->pci_dev == NULL) {
 104                         dbg("ERROR: pci_dev still null\n");
 105                         return 0;
 106                 }
 107         }
 108
 109         if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
 110                 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
 111                 child = (struct pci_bus*) pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
 112                 pci_do_scan_bus(child);
 113         }
 114
 115         return 0;
 116 }
 117
 118
 119 int cpqhp_unconfigure_device(struct pci_func* func)
 120 {
 121         int j;
 122
 123         dbg("%s: bus/dev/func = %x/%x/%x\n", __func__, func->bus, func->device, func->function);
 124
 125         for (j=0; j<8 ; j++) {
 126                 struct pci_dev* temp = pci_find_slot(func->bus, PCI_DEVFN(func->device, j));
 127                 if (temp)
 128                         pci_remove_bus_device(temp);
 129         }
 130         return 0;
 131 }
 132
 133 static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn, u8 offset, u32 *value)
 134 {
 135         u32 vendID = 0;
 136
 137         if (pci_bus_read_config_dword (bus, devfn, PCI_VENDOR_ID, &vendID) == -1)
 138                 return -1;
 139         if (vendID == 0xffffffff)
 140                 return -1;
 141         return pci_bus_read_config_dword (bus, devfn, offset, value);
 142 }
 143
 144
 145 /*
 146  * cpqhp_set_irq
 147  *
 148  * @bus_num: bus number of PCI device
 149  * @dev_num: device number of PCI device
 150  * @slot: pointer to u8 where slot number will be returned
 151  */
 152 int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
 153 {
 154         int rc = 0;
 155
 156         if (cpqhp_legacy_mode) {
 157                 struct pci_dev *fakedev;
 158                 struct pci_bus *fakebus;
 159                 u16 temp_word;
 160
 161                 fakedev = kmalloc(sizeof(*fakedev), GFP_KERNEL);
 162                 fakebus = kmalloc(sizeof(*fakebus), GFP_KERNEL);
 163                 if (!fakedev || !fakebus) {
 164                         kfree(fakedev);
 165                         kfree(fakebus);
 166                         return -ENOMEM;
 167                 }
 168
 169                 fakedev->devfn = dev_num << 3;
 170                 fakedev->bus = fakebus;
 171                 fakebus->number = bus_num;
 172                 dbg("%s: dev %d, bus %d, pin %d, num %d\n",
 173                     __func__, dev_num, bus_num, int_pin, irq_num);
 174                 rc = pcibios_set_irq_routing(fakedev, int_pin - 1, irq_num);
 175                 kfree(fakedev);
 176                 kfree(fakebus);
 177                 dbg("%s: rc %d\n", __func__, rc);
 178                 if (!rc)
 179                         return !rc;
 180
 181                 /* set the Edge Level Control Register (ELCR) */
 182                 temp_word = inb(0x4d0);
 183                 temp_word |= inb(0x4d1) << 8;
 184
 185                 temp_word |= 0x01 << irq_num;
 186
 187                 /* This should only be for x86 as it sets the Edge Level
 188                  * Control Register
 189                  */
 190                 outb((u8) (temp_word & 0xFF), 0x4d0); outb((u8) ((temp_word &
 191                 0xFF00) >> 8), 0x4d1); rc = 0; }
 192
 193         return rc;
 194 }
 195
 196
 197 /*
 198  * WTF??? This function isn't in the code, yet a function calls it, but the
 199  * compiler optimizes it away?  strange.  Here as a placeholder to keep the
 200  * compiler happy.
 201  */
 202 static int PCI_ScanBusNonBridge (u8 bus, u8 device)
 203 {
 204         return 0;
 205 }
 206
 207 static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev_num)
 208 {
 209         u16 tdevice;
 210         u32 work;
 211         u8 tbus;
 212
 213         ctrl->pci_bus->number = bus_num;
 214
 215         for (tdevice = 0; tdevice < 0xFF; tdevice++) {
 216                 /* Scan for access first */
 217                 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
 218                         continue;
 219                 dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice);
 220                 /* Yep we got one. Not a bridge ? */
 221                 if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) {
 222                         *dev_num = tdevice;
 223                         dbg("found it !\n");
 224                         return 0;
 225                 }
 226         }
 227         for (tdevice = 0; tdevice < 0xFF; tdevice++) {
 228                 /* Scan for access first */
 229                 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
 230                         continue;
 231                 dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice);
 232                 /* Yep we got one. bridge ? */
 233                 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 234                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus);
 235                         dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice);
 236                         if (PCI_ScanBusNonBridge(tbus, tdevice) == 0)
 237                                 return 0;
 238                 }
 239         }
 240
 241         return -1;
 242 }
 243
 244
 245 static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot, u8 nobridge)
 246 {
 247         struct irq_routing_table *PCIIRQRoutingInfoLength;
 248         long len;
 249         long loop;
 250         u32 work;
 251
 252         u8 tbus, tdevice, tslot;
 253
 254         PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
 255         if (!PCIIRQRoutingInfoLength)
 256                 return -1;
 257
 258         len = (PCIIRQRoutingInfoLength->size -
 259                sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
 260         /* Make sure I got at least one entry */
 261         if (len == 0) {
 262                 kfree(PCIIRQRoutingInfoLength );
 263                 return -1;
 264         }
 265
 266         for (loop = 0; loop < len; ++loop) {
 267                 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
 268                 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn;
 269                 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
 270
 271                 if (tslot == slot) {
 272                         *bus_num = tbus;
 273                         *dev_num = tdevice;
 274                         ctrl->pci_bus->number = tbus;
 275                         pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work);
 276                         if (!nobridge || (work == 0xffffffff)) {
 277                                 kfree(PCIIRQRoutingInfoLength );
 278                                 return 0;
 279                         }
 280
 281                         dbg("bus_num %d devfn %d\n", *bus_num, *dev_num);
 282                         pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_CLASS_REVISION, &work);
 283                         dbg("work >> 8 (%x) = BRIDGE (%x)\n", work >> 8, PCI_TO_PCI_BRIDGE_CLASS);
 284
 285                         if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 286                                 pci_bus_read_config_byte (ctrl->pci_bus, *dev_num, PCI_SECONDARY_BUS, &tbus);
 287                                 dbg("Scan bus for Non Bridge: bus %d\n", tbus);
 288                                 if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) {
 289                                         *bus_num = tbus;
 290                                         kfree(PCIIRQRoutingInfoLength );
 291                                         return 0;
 292                                 }
 293                         } else {
 294                                 kfree(PCIIRQRoutingInfoLength );
 295                                 return 0;
 296                         }
 297
 298                 }
 299         }
 300         kfree(PCIIRQRoutingInfoLength );
 301         return -1;
 302 }
 303
 304
 305 int cpqhp_get_bus_dev (struct controller *ctrl, u8 * bus_num, u8 * dev_num, u8 slot)
 306 {
 307         /* plain (bridges allowed) */
 308         return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0);
 309 }
 310
 311
 312 /* More PCI configuration routines; this time centered around hotplug
 313  * controller
 314  */
 315
 316
 317 /*
 318  * cpqhp_save_config
 319  *
 320  * Reads configuration for all slots in a PCI bus and saves info.
 321  *
 322  * Note:  For non-hot plug busses, the slot # saved is the device #
 323  *
 324  * returns 0 if success
 325  */
 326 int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
 327 {
 328         long rc;
 329         u8 class_code;
 330         u8 header_type;
 331         u32 ID;
 332         u8 secondary_bus;
 333         struct pci_func *new_slot;
 334         int sub_bus;
 335         int FirstSupported;
 336         int LastSupported;
 337         int max_functions;
 338         int function;
 339         u8 DevError;
 340         int device = 0;
 341         int cloop = 0;
 342         int stop_it;
 343         int index;
 344
 345         /* Decide which slots are supported */
 346
 347         if (is_hot_plug) {
 348                 /*
 349                  * is_hot_plug is the slot mask
 350                  */
 351                 FirstSupported = is_hot_plug >> 4;
 352                 LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1;
 353         } else {
 354                 FirstSupported = 0;
 355                 LastSupported = 0x1F;
 356         }
 357
 358         /* Save PCI configuration space for all devices in supported slots */
 359         ctrl->pci_bus->number = busnumber;
 360         for (device = FirstSupported; device <= LastSupported; device++) {
 361                 ID = 0xFFFFFFFF;
 362                 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
 363
 364                 if (ID != 0xFFFFFFFF) {   /* device in slot */
 365                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code);
 366                         if (rc)
 367                                 return rc;
 368
 369                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_HEADER_TYPE, &header_type);
 370                         if (rc)
 371                                 return rc;
 372
 373                         /* If multi-function device, set max_functions to 8 */
 374                         if (header_type & 0x80)
 375                                 max_functions = 8;
 376                         else
 377                                 max_functions = 1;
 378
 379                         function = 0;
 380
 381                         do {
 382                                 DevError = 0;
 383                                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 384                                         /* Recurse the subordinate bus
 385                                          * get the subordinate bus number
 386                                          */
 387                                         rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus);
 388                                         if (rc) {
 389                                                 return rc;
 390                                         } else {
 391                                                 sub_bus = (int) secondary_bus;
 392
 393                                                 /* Save secondary bus cfg spc
 394                                                  * with this recursive call.
 395                                                  */
 396                                                 rc = cpqhp_save_config(ctrl, sub_bus, 0);
 397                                                 if (rc)
 398                                                         return rc;
 399                                                 ctrl->pci_bus->number = busnumber;
 400                                         }
 401                                 }
 402
 403                                 index = 0;
 404                                 new_slot = cpqhp_slot_find(busnumber, device, index++);
 405                                 while (new_slot &&
 406                                        (new_slot->function != (u8) function))
 407                                         new_slot = cpqhp_slot_find(busnumber, device, index++);
 408
 409                                 if (!new_slot) {
 410                                         /* Setup slot structure. */
 411                                         new_slot = cpqhp_slot_create(busnumber);
 412
 413                                         if (new_slot == NULL)
 414                                                 return(1);
 415                                 }
 416
 417                                 new_slot->bus = (u8) busnumber;
 418                                 new_slot->device = (u8) device;
 419                                 new_slot->function = (u8) function;
 420                                 new_slot->is_a_board = 1;
 421                                 new_slot->switch_save = 0x10;
 422                                 /* In case of unsupported board */
 423                                 new_slot->status = DevError;
 424                                 new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function);
 425
 426                                 for (cloop = 0; cloop < 0x20; cloop++) {
 427                                         rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
 428                                         if (rc)
 429                                                 return rc;
 430                                 }
 431
 432                                 function++;
 433
 434                                 stop_it = 0;
 435
 436                                 /* this loop skips to the next present function
 437                                  * reading in Class Code and Header type.
 438                                  */
 439
 440                                 while ((function < max_functions)&&(!stop_it)) {
 441                                         rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID);
 442                                         if (ID == 0xFFFFFFFF) {  /* nothing there. */
 443                                                 function++;
 444                                         } else {  /* Something there */
 445                                                 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code);
 446                                                 if (rc)
 447                                                         return rc;
 448
 449                                                 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_HEADER_TYPE, &header_type);
 450                                                 if (rc)
 451                                                         return rc;
 452
 453                                                 stop_it++;
 454                                         }
 455                                 }
 456
 457                         } while (function < max_functions);
 458                 }               /* End of IF (device in slot?) */
 459                 else if (is_hot_plug) {
 460                         /* Setup slot structure with entry for empty slot */
 461                         new_slot = cpqhp_slot_create(busnumber);
 462
 463                         if (new_slot == NULL) {
 464                                 return(1);
 465                         }
 466
 467                         new_slot->bus = (u8) busnumber;
 468                         new_slot->device = (u8) device;
 469                         new_slot->function = 0;
 470                         new_slot->is_a_board = 0;
 471                         new_slot->presence_save = 0;
 472                         new_slot->switch_save = 0;
 473                 }
 474         }                       /* End of FOR loop */
 475
 476         return(0);
 477 }
 478
 479
 480 /*
 481  * cpqhp_save_slot_config
 482  *
 483  * Saves configuration info for all PCI devices in a given slot
 484  * including subordinate busses.
 485  *
 486  * returns 0 if success
 487  */
 488 int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
 489 {
 490         long rc;
 491         u8 class_code;
 492         u8 header_type;
 493         u32 ID;
 494         u8 secondary_bus;
 495         int sub_bus;
 496         int max_functions;
 497         int function = 0;
 498         int cloop = 0;
 499         int stop_it;
 500
 501         ID = 0xFFFFFFFF;
 502
 503         ctrl->pci_bus->number = new_slot->bus;
 504         pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID);
 505
 506         if (ID == 0xFFFFFFFF)
 507                 return 2;
 508
 509         pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
 510         pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
 511
 512         if (header_type & 0x80) /* Multi-function device */
 513                 max_functions = 8;
 514         else
 515                 max_functions = 1;
 516
 517         while (function < max_functions) {
 518                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 519                         /*  Recurse the subordinate bus */
 520                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
 521
 522                         sub_bus = (int) secondary_bus;
 523
 524                         /* Save the config headers for the secondary
 525                          * bus.
 526                          */
 527                         rc = cpqhp_save_config(ctrl, sub_bus, 0);
 528                         if (rc)
 529                                 return(rc);
 530                         ctrl->pci_bus->number = new_slot->bus;
 531
 532                 }
 533
 534                 new_slot->status = 0;
 535
 536                 for (cloop = 0; cloop < 0x20; cloop++)
 537                         pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
 538
 539                 function++;
 540
 541                 stop_it = 0;
 542
 543                 /* this loop skips to the next present function
 544                  * reading in the Class Code and the Header type.
 545                  */
 546                 while ((function < max_functions) && (!stop_it)) {
 547                         pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID);
 548
 549                         if (ID == 0xFFFFFFFF)
 550                                 function++;
 551                         else {
 552                                 pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code);
 553                                 pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type);
 554                                 stop_it++;
 555                         }
 556                 }
 557
 558         }
 559
 560         return 0;
 561 }
 562
 563
 564 /*
 565  * cpqhp_save_base_addr_length
 566  *
 567  * Saves the length of all base address registers for the
 568  * specified slot.  this is for hot plug REPLACE
 569  *
 570  * returns 0 if success
 571  */
 572 int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
 573 {
 574         u8 cloop;
 575         u8 header_type;
 576         u8 secondary_bus;
 577         u8 type;
 578         int sub_bus;
 579         u32 temp_register;
 580         u32 base;
 581         u32 rc;
 582         struct pci_func *next;
 583         int index = 0;
 584         struct pci_bus *pci_bus = ctrl->pci_bus;
 585         unsigned int devfn;
 586
 587         func = cpqhp_slot_find(func->bus, func->device, index++);
 588
 589         while (func != NULL) {
 590                 pci_bus->number = func->bus;
 591                 devfn = PCI_DEVFN(func->device, func->function);
 592
 593                 /* Check for Bridge */
 594                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 595
 596                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 597                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 598
 599                         sub_bus = (int) secondary_bus;
 600
 601                         next = cpqhp_slot_list[sub_bus];
 602
 603                         while (next != NULL) {
 604                                 rc = cpqhp_save_base_addr_length(ctrl, next);
 605                                 if (rc)
 606                                         return rc;
 607
 608                                 next = next->next;
 609                         }
 610                         pci_bus->number = func->bus;
 611
 612                         /* FIXME: this loop is duplicated in the non-bridge
 613                          * case.  The two could be rolled together Figure out
 614                          * IO and memory base lengths
 615                          */
 616                         for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
 617                                 temp_register = 0xFFFFFFFF;
 618                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 619                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 620                                 /* If this register is implemented */
 621                                 if (base) {
 622                                         if (base & 0x01L) {
 623                                                 /* IO base
 624                                                  * set base = amount of IO space
 625                                                  * requested
 626                                                  */
 627                                                 base = base & 0xFFFFFFFE;
 628                                                 base = (~base) + 1;
 629
 630                                                 type = 1;
 631                                         } else {
 632                                                 /* memory base */
 633                                                 base = base & 0xFFFFFFF0;
 634                                                 base = (~base) + 1;
 635
 636                                                 type = 0;
 637                                         }
 638                                 } else {
 639                                         base = 0x0L;
 640                                         type = 0;
 641                                 }
 642
 643                                 /* Save information in slot structure */
 644                                 func->base_length[(cloop - 0x10) >> 2] =
 645                                 base;
 646                                 func->base_type[(cloop - 0x10) >> 2] = type;
 647
 648                         }       /* End of base register loop */
 649
 650                 } else if ((header_type & 0x7F) == 0x00) {
 651                         /* Figure out IO and memory base lengths */
 652                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
 653                                 temp_register = 0xFFFFFFFF;
 654                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 655                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 656
 657                                 /* If this register is implemented */
 658                                 if (base) {
 659                                         if (base & 0x01L) {
 660                                                 /* IO base
 661                                                  * base = amount of IO space
 662                                                  * requested
 663                                                  */
 664                                                 base = base & 0xFFFFFFFE;
 665                                                 base = (~base) + 1;
 666
 667                                                 type = 1;
 668                                         } else {
 669                                                 /* memory base
 670                                                  * base = amount of memory
 671                                                  * space requested
 672                                                  */
 673                                                 base = base & 0xFFFFFFF0;
 674                                                 base = (~base) + 1;
 675
 676                                                 type = 0;
 677                                         }
 678                                 } else {
 679                                         base = 0x0L;
 680                                         type = 0;
 681                                 }
 682
 683                                 /* Save information in slot structure */
 684                                 func->base_length[(cloop - 0x10) >> 2] = base;
 685                                 func->base_type[(cloop - 0x10) >> 2] = type;
 686
 687                         }       /* End of base register loop */
 688
 689                 } else {          /* Some other unknown header type */
 690                 }
 691
 692                 /* find the next device in this slot */
 693                 func = cpqhp_slot_find(func->bus, func->device, index++);
 694         }
 695
 696         return(0);
 697 }
 698
 699
 700 /*
 701  * cpqhp_save_used_resources
 702  *
 703  * Stores used resource information for existing boards.  this is
 704  * for boards that were in the system when this driver was loaded.
 705  * this function is for hot plug ADD
 706  *
 707  * returns 0 if success
 708  */
 709 int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
 710 {
 711         u8 cloop;
 712         u8 header_type;
 713         u8 secondary_bus;
 714         u8 temp_byte;
 715         u8 b_base;
 716         u8 b_length;
 717         u16 command;
 718         u16 save_command;
 719         u16 w_base;
 720         u16 w_length;
 721         u32 temp_register;
 722         u32 save_base;
 723         u32 base;
 724         int index = 0;
 725         struct pci_resource *mem_node;
 726         struct pci_resource *p_mem_node;
 727         struct pci_resource *io_node;
 728         struct pci_resource *bus_node;
 729         struct pci_bus *pci_bus = ctrl->pci_bus;
 730         unsigned int devfn;
 731
 732         func = cpqhp_slot_find(func->bus, func->device, index++);
 733
 734         while ((func != NULL) && func->is_a_board) {
 735                 pci_bus->number = func->bus;
 736                 devfn = PCI_DEVFN(func->device, func->function);
 737
 738                 /* Save the command register */
 739                 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
 740
 741                 /* disable card */
 742                 command = 0x00;
 743                 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
 744
 745                 /* Check for Bridge */
 746                 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 747
 748                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 749                         /* Clear Bridge Control Register */
 750                         command = 0x00;
 751                         pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
 752                         pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 753                         pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
 754
 755                         bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
 756                         if (!bus_node)
 757                                 return -ENOMEM;
 758
 759                         bus_node->base = secondary_bus;
 760                         bus_node->length = temp_byte - secondary_bus + 1;
 761
 762                         bus_node->next = func->bus_head;
 763                         func->bus_head = bus_node;
 764
 765                         /* Save IO base and Limit registers */
 766                         pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base);
 767                         pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length);
 768
 769                         if ((b_base <= b_length) && (save_command & 0x01)) {
 770                                 io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
 771                                 if (!io_node)
 772                                         return -ENOMEM;
 773
 774                                 io_node->base = (b_base & 0xF0) << 8;
 775                                 io_node->length = (b_length - b_base + 0x10) << 8;
 776
 777                                 io_node->next = func->io_head;
 778                                 func->io_head = io_node;
 779                         }
 780
 781                         /* Save memory base and Limit registers */
 782                         pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
 783                         pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
 784
 785                         if ((w_base <= w_length) && (save_command & 0x02)) {
 786                                 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
 787                                 if (!mem_node)
 788                                         return -ENOMEM;
 789
 790                                 mem_node->base = w_base << 16;
 791                                 mem_node->length = (w_length - w_base + 0x10) << 16;
 792
 793                                 mem_node->next = func->mem_head;
 794                                 func->mem_head = mem_node;
 795                         }
 796
 797                         /* Save prefetchable memory base and Limit registers */
 798                         pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
 799                         pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
 800
 801                         if ((w_base <= w_length) && (save_command & 0x02)) {
 802                                 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
 803                                 if (!p_mem_node)
 804                                         return -ENOMEM;
 805
 806                                 p_mem_node->base = w_base << 16;
 807                                 p_mem_node->length = (w_length - w_base + 0x10) << 16;
 808
 809                                 p_mem_node->next = func->p_mem_head;
 810                                 func->p_mem_head = p_mem_node;
 811                         }
 812                         /* Figure out IO and memory base lengths */
 813                         for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
 814                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base);
 815
 816                                 temp_register = 0xFFFFFFFF;
 817                                 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
 818                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
 819
 820                                 temp_register = base;
 821
 822                                 /* If this register is implemented */
 823                                 if (base) {
 824                                         if (((base & 0x03L) == 0x01)
 825                                             && (save_command & 0x01)) {
 826                                                 /* IO base
 827                                                  * set temp_register = amount
 828                                                  * of IO space requested
 829                                                  */
 830                                                 temp_register = base & 0xFFFFFFFE;
 831                                                 temp_register = (~temp_register) + 1;
 832
 833                                                 io_node = kmalloc(sizeof(*io_node),
 834                                                                 GFP_KERNEL);
 835                                                 if (!io_node)
 836                                                         return -ENOMEM;
 837
 838                                                 io_node->base =
 839                                                 save_base & (~0x03L);
 840                                                 io_node->length = temp_register;
 841
 842                                                 io_node->next = func->io_head;
 843                                                 func->io_head = io_node;
 844                                         } else
 845                                                 if (((base & 0x0BL) == 0x08)
 846                                                     && (save_command & 0x02)) {
 847                                                 /* prefetchable memory base */
 848                                                 temp_register = base & 0xFFFFFFF0;
 849                                                 temp_register = (~temp_register) + 1;
 850
 851                                                 p_mem_node = kmalloc(sizeof(*p_mem_node),
 852                                                                 GFP_KERNEL);
 853                                                 if (!p_mem_node)
 854                                                         return -ENOMEM;
 855
 856                                                 p_mem_node->base = save_base & (~0x0FL);
 857                                                 p_mem_node->length = temp_register;
 858
 859                                                 p_mem_node->next = func->p_mem_head;
 860                                                 func->p_mem_head = p_mem_node;
 861                                         } else
 862                                                 if (((base & 0x0BL) == 0x00)
 863                                                     && (save_command & 0x02)) {
 864                                                 /* prefetchable memory base */
 865                                                 temp_register = base & 0xFFFFFFF0;
 866                                                 temp_register = (~temp_register) + 1;
 867
 868                                                 mem_node = kmalloc(sizeof(*mem_node),
 869                                                                 GFP_KERNEL);
 870                                                 if (!mem_node)
 871                                                         return -ENOMEM;
 872
 873                                                 mem_node->base = save_base & (~0x0FL);
 874                                                 mem_node->length = temp_register;
 875
 876                                                 mem_node->next = func->mem_head;
 877                                                 func->mem_head = mem_node;
 878                                         } else
 879                                                 return(1);
 880                                 }
 881                         }       /* End of base register loop */
 882                 /* Standard header */
 883                 } else if ((header_type & 0x7F) == 0x00) {
 884                         /* Figure out IO and memory base lengths */
 885                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
 886                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
 887
 888                                 temp_register = 0xFFFFFFFF;
 889                                 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
 890                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
 891
 892                                 temp_register = base;
 893
 894                                 /* If this register is implemented */
 895                                 if (base) {
 896                                         if (((base & 0x03L) == 0x01)
 897                                             && (save_command & 0x01)) {
 898                                                 /* IO base
 899                                                  * set temp_register = amount
 900                                                  * of IO space requested
 901                                                  */
 902                                                 temp_register = base & 0xFFFFFFFE;
 903                                                 temp_register = (~temp_register) + 1;
 904
 905                                                 io_node = kmalloc(sizeof(*io_node),
 906                                                                 GFP_KERNEL);
 907                                                 if (!io_node)
 908                                                         return -ENOMEM;
 909
 910                                                 io_node->base = save_base & (~0x01L);
 911                                                 io_node->length = temp_register;
 912
 913                                                 io_node->next = func->io_head;
 914                                                 func->io_head = io_node;
 915                                         } else
 916                                                 if (((base & 0x0BL) == 0x08)
 917                                                     && (save_command & 0x02)) {
 918                                                 /* prefetchable memory base */
 919                                                 temp_register = base & 0xFFFFFFF0;
 920                                                 temp_register = (~temp_register) + 1;
 921
 922                                                 p_mem_node = kmalloc(sizeof(*p_mem_node),
 923                                                                 GFP_KERNEL);
 924                                                 if (!p_mem_node)
 925                                                         return -ENOMEM;
 926
 927                                                 p_mem_node->base = save_base & (~0x0FL);
 928                                                 p_mem_node->length = temp_register;
 929
 930                                                 p_mem_node->next = func->p_mem_head;
 931                                                 func->p_mem_head = p_mem_node;
 932                                         } else
 933                                                 if (((base & 0x0BL) == 0x00)
 934                                                     && (save_command & 0x02)) {
 935                                                 /* prefetchable memory base */
 936                                                 temp_register = base & 0xFFFFFFF0;
 937                                                 temp_register = (~temp_register) + 1;
 938
 939                                                 mem_node = kmalloc(sizeof(*mem_node),
 940                                                                 GFP_KERNEL);
 941                                                 if (!mem_node)
 942                                                         return -ENOMEM;
 943
 944                                                 mem_node->base = save_base & (~0x0FL);
 945                                                 mem_node->length = temp_register;
 946
 947                                                 mem_node->next = func->mem_head;
 948                                                 func->mem_head = mem_node;
 949                                         } else
 950                                                 return(1);
 951                                 }
 952                         }       /* End of base register loop */
 953                 }
 954
 955                 /* find the next device in this slot */
 956                 func = cpqhp_slot_find(func->bus, func->device, index++);
 957         }
 958
 959         return 0;
 960 }
 961
 962
 963 /*
 964  * cpqhp_configure_board
 965  *
 966  * Copies saved configuration information to one slot.
 967  * this is called recursively for bridge devices.
 968  * this is for hot plug REPLACE!
 969  *
 970  * returns 0 if success
 971  */
 972 int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func)
 973 {
 974         int cloop;
 975         u8 header_type;
 976         u8 secondary_bus;
 977         int sub_bus;
 978         struct pci_func *next;
 979         u32 temp;
 980         u32 rc;
 981         int index = 0;
 982         struct pci_bus *pci_bus = ctrl->pci_bus;
 983         unsigned int devfn;
 984
 985         func = cpqhp_slot_find(func->bus, func->device, index++);
 986
 987         while (func != NULL) {
 988                 pci_bus->number = func->bus;
 989                 devfn = PCI_DEVFN(func->device, func->function);
 990
 991                 /* Start at the top of config space so that the control
 992                  * registers are programmed last
 993                  */
 994                 for (cloop = 0x3C; cloop > 0; cloop -= 4)
 995                         pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]);
 996
 997                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 998
 999                 /* If this is a bridge device, restore subordinate devices */
1000                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
1001                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
1002
1003                         sub_bus = (int) secondary_bus;
1004
1005                         next = cpqhp_slot_list[sub_bus];
1006
1007                         while (next != NULL) {
1008                                 rc = cpqhp_configure_board(ctrl, next);
1009                                 if (rc)
1010                                         return rc;
1011
1012                                 next = next->next;
1013                         }
1014                 } else {
1015
1016                         /* Check all the base Address Registers to make sure
1017                          * they are the same.  If not, the board is different.
1018                          */
1019
1020                         for (cloop = 16; cloop < 40; cloop += 4) {
1021                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp);
1022
1023                                 if (temp != func->config_space[cloop >> 2]) {
1024                                         dbg("Config space compare failure!!! offset = %x\n", cloop);
1025                                         dbg("bus = %x, device = %x, function = %x\n", func->bus, func->device, func->function);
1026                                         dbg("temp = %x, config space = %x\n\n", temp, func->config_space[cloop >> 2]);
1027                                         return 1;
1028                                 }
1029                         }
1030                 }
1031
1032                 func->configured = 1;
1033
1034                 func = cpqhp_slot_find(func->bus, func->device, index++);
1035         }
1036
1037         return 0;
1038 }
1039
1040
1041 /*
1042  * cpqhp_valid_replace
1043  *
1044  * this function checks to see if a board is the same as the
1045  * one it is replacing.  this check will detect if the device's
1046  * vendor or device id's are the same
1047  *
1048  * returns 0 if the board is the same nonzero otherwise
1049  */
1050 int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
1051 {
1052         u8 cloop;
1053         u8 header_type;
1054         u8 secondary_bus;
1055         u8 type;
1056         u32 temp_register = 0;
1057         u32 base;
1058         u32 rc;
1059         struct pci_func *next;
1060         int index = 0;
1061         struct pci_bus *pci_bus = ctrl->pci_bus;
1062         unsigned int devfn;
1063
1064         if (!func->is_a_board)
1065                 return(ADD_NOT_SUPPORTED);
1066
1067         func = cpqhp_slot_find(func->bus, func->device, index++);
1068
1069         while (func != NULL) {
1070                 pci_bus->number = func->bus;
1071                 devfn = PCI_DEVFN(func->device, func->function);
1072
1073                 pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register);
1074
1075                 /* No adapter present */
1076                 if (temp_register == 0xFFFFFFFF)
1077                         return(NO_ADAPTER_PRESENT);
1078
1079                 if (temp_register != func->config_space[0])
1080                         return(ADAPTER_NOT_SAME);
1081
1082                 /* Check for same revision number and class code */
1083                 pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register);
1084
1085                 /* Adapter not the same */
1086                 if (temp_register != func->config_space[0x08 >> 2])
1087                         return(ADAPTER_NOT_SAME);
1088
1089                 /* Check for Bridge */
1090                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1091
1092                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
1093                         /* In order to continue checking, we must program the
1094                          * bus registers in the bridge to respond to accesses
1095                          * for its subordinate bus(es)
1096                          */
1097
1098                         temp_register = func->config_space[0x18 >> 2];
1099                         pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register);
1100
1101                         secondary_bus = (temp_register >> 8) & 0xFF;
1102
1103                         next = cpqhp_slot_list[secondary_bus];
1104
1105                         while (next != NULL) {
1106                                 rc = cpqhp_valid_replace(ctrl, next);
1107                                 if (rc)
1108                                         return rc;
1109
1110                                 next = next->next;
1111                         }
1112
1113                 }
1114                 /* Check to see if it is a standard config header */
1115                 else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
1116                         /* Check subsystem vendor and ID */
1117                         pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
1118
1119                         if (temp_register != func->config_space[0x2C >> 2]) {
1120                                 /* If it's a SMART-2 and the register isn't
1121                                  * filled in, ignore the difference because
1122                                  * they just have an old rev of the firmware
1123                                  */
1124                                 if (!((func->config_space[0] == 0xAE100E11)
1125                                       && (temp_register == 0x00L)))
1126                                         return(ADAPTER_NOT_SAME);
1127                         }
1128                         /* Figure out IO and memory base lengths */
1129                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
1130                                 temp_register = 0xFFFFFFFF;
1131                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
1132                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
1133
1134                                 /* If this register is implemented */
1135                                 if (base) {
1136                                         if (base & 0x01L) {
1137                                                 /* IO base
1138                                                  * set base = amount of IO
1139                                                  * space requested
1140                                                  */
1141                                                 base = base & 0xFFFFFFFE;
1142                                                 base = (~base) + 1;
1143
1144                                                 type = 1;
1145                                         } else {
1146                                                 /* memory base */
1147                                                 base = base & 0xFFFFFFF0;
1148                                                 base = (~base) + 1;
1149
1150                                                 type = 0;
1151                                         }
1152                                 } else {
1153                                         base = 0x0L;
1154                                         type = 0;
1155                                 }
1156
1157                                 /* Check information in slot structure */
1158                                 if (func->base_length[(cloop - 0x10) >> 2] != base)
1159                                         return(ADAPTER_NOT_SAME);
1160
1161                                 if (func->base_type[(cloop - 0x10) >> 2] != type)
1162                                         return(ADAPTER_NOT_SAME);
1163
1164                         }       /* End of base register loop */
1165
1166                 }               /* End of (type 0 config space) else */
1167                 else {
1168                         /* this is not a type 0 or 1 config space header so
1169                          * we don't know how to do it
1170                          */
1171                         return(DEVICE_TYPE_NOT_SUPPORTED);
1172                 }
1173
1174                 /* Get the next function */
1175                 func = cpqhp_slot_find(func->bus, func->device, index++);
1176         }
1177
1178
1179         return 0;
1180 }
1181
1182
1183 /*
1184  * cpqhp_find_available_resources
1185  *
1186  * Finds available memory, IO, and IRQ resources for programming
1187  * devices which may be added to the system
1188  * this function is for hot plug ADD!
1189  *
1190  * returns 0 if success
1191  */
1192 int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_start)
1193 {
1194         u8 temp;
1195         u8 populated_slot;
1196         u8 bridged_slot;
1197         void __iomem *one_slot;
1198         void __iomem *rom_resource_table;
1199         struct pci_func *func = NULL;
1200         int i = 10, index;
1201         u32 temp_dword, rc;
1202         struct pci_resource *mem_node;
1203         struct pci_resource *p_mem_node;
1204         struct pci_resource *io_node;
1205         struct pci_resource *bus_node;
1206
1207         rom_resource_table = detect_HRT_floating_pointer(rom_start, rom_start+0xffff);
1208         dbg("rom_resource_table = %p\n", rom_resource_table);
1209
1210         if (rom_resource_table == NULL)
1211                 return -ENODEV;
1212
1213         /* Sum all resources and setup resource maps */
1214         unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
1215         dbg("unused_IRQ = %x\n", unused_IRQ);
1216
1217         temp = 0;
1218         while (unused_IRQ) {
1219                 if (unused_IRQ & 1) {
1220                         cpqhp_disk_irq = temp;
1221                         break;
1222                 }
1223                 unused_IRQ = unused_IRQ >> 1;
1224                 temp++;
1225         }
1226
1227         dbg("cpqhp_disk_irq= %d\n", cpqhp_disk_irq);
1228         unused_IRQ = unused_IRQ >> 1;
1229         temp++;
1230
1231         while (unused_IRQ) {
1232                 if (unused_IRQ & 1) {
1233                         cpqhp_nic_irq = temp;
1234                         break;
1235                 }
1236                 unused_IRQ = unused_IRQ >> 1;
1237                 temp++;
1238         }
1239
1240         dbg("cpqhp_nic_irq= %d\n", cpqhp_nic_irq);
1241         unused_IRQ = readl(rom_resource_table + PCIIRQ);
1242
1243         temp = 0;
1244
1245         if (!cpqhp_nic_irq)
1246                 cpqhp_nic_irq = ctrl->cfgspc_irq;
1247
1248         if (!cpqhp_disk_irq)
1249                 cpqhp_disk_irq = ctrl->cfgspc_irq;
1250
1251         dbg("cpqhp_disk_irq, cpqhp_nic_irq= %d, %d\n", cpqhp_disk_irq, cpqhp_nic_irq);
1252
1253         rc = compaq_nvram_load(rom_start, ctrl);
1254         if (rc)
1255                 return rc;
1256
1257         one_slot = rom_resource_table + sizeof (struct hrt);
1258
1259         i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
1260         dbg("number_of_entries = %d\n", i);
1261
1262         if (!readb(one_slot + SECONDARY_BUS))
1263                 return 1;
1264
1265         dbg("dev|IO base|length|Mem base|length|Pre base|length|PB SB MB\n");
1266
1267         while (i && readb(one_slot + SECONDARY_BUS)) {
1268                 u8 dev_func = readb(one_slot + DEV_FUNC);
1269                 u8 primary_bus = readb(one_slot + PRIMARY_BUS);
1270                 u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
1271                 u8 max_bus = readb(one_slot + MAX_BUS);
1272                 u16 io_base = readw(one_slot + IO_BASE);
1273                 u16 io_length = readw(one_slot + IO_LENGTH);
1274                 u16 mem_base = readw(one_slot + MEM_BASE);
1275                 u16 mem_length = readw(one_slot + MEM_LENGTH);
1276                 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
1277                 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
1278
1279                 dbg("%2.2x | %4.4x  | %4.4x | %4.4x   | %4.4x | %4.4x   | %4.4x |%2.2x %2.2x %2.2x\n",
1280                     dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
1281                     primary_bus, secondary_bus, max_bus);
1282
1283                 /* If this entry isn't for our controller's bus, ignore it */
1284                 if (primary_bus != ctrl->bus) {
1285                         i--;
1286                         one_slot += sizeof (struct slot_rt);
1287                         continue;
1288                 }
1289                 /* find out if this entry is for an occupied slot */
1290                 ctrl->pci_bus->number = primary_bus;
1291                 pci_bus_read_config_dword (ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
1292                 dbg("temp_D_word = %x\n", temp_dword);
1293
1294                 if (temp_dword != 0xFFFFFFFF) {
1295                         index = 0;
1296                         func = cpqhp_slot_find(primary_bus, dev_func >> 3, 0);
1297
1298                         while (func && (func->function != (dev_func & 0x07))) {
1299                                 dbg("func = %p (bus, dev, fun) = (%d, %d, %d)\n", func, primary_bus, dev_func >> 3, index);
1300                                 func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++);
1301                         }
1302
1303                         /* If we can't find a match, skip this table entry */
1304                         if (!func) {
1305                                 i--;
1306                                 one_slot += sizeof (struct slot_rt);
1307                                 continue;
1308                         }
1309                         /* this may not work and shouldn't be used */
1310                         if (secondary_bus != primary_bus)
1311                                 bridged_slot = 1;
1312                         else
1313                                 bridged_slot = 0;
1314
1315                         populated_slot = 1;
1316                 } else {
1317                         populated_slot = 0;
1318                         bridged_slot = 0;
1319                 }
1320
1321
1322                 /* If we've got a valid IO base, use it */
1323
1324                 temp_dword = io_base + io_length;
1325
1326                 if ((io_base) && (temp_dword < 0x10000)) {
1327                         io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
1328                         if (!io_node)
1329                                 return -ENOMEM;
1330
1331                         io_node->base = io_base;
1332                         io_node->length = io_length;
1333
1334                         dbg("found io_node(base, length) = %x, %x\n",
1335                                         io_node->base, io_node->length);
1336                         dbg("populated slot =%d \n", populated_slot);
1337                         if (!populated_slot) {
1338                                 io_node->next = ctrl->io_head;
1339                                 ctrl->io_head = io_node;
1340                         } else {
1341                                 io_node->next = func->io_head;
1342                                 func->io_head = io_node;
1343                         }
1344                 }
1345
1346                 /* If we've got a valid memory base, use it */
1347                 temp_dword = mem_base + mem_length;
1348                 if ((mem_base) && (temp_dword < 0x10000)) {
1349                         mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
1350                         if (!mem_node)
1351                                 return -ENOMEM;
1352
1353                         mem_node->base = mem_base << 16;
1354
1355                         mem_node->length = mem_length << 16;
1356
1357                         dbg("found mem_node(base, length) = %x, %x\n",
1358                                         mem_node->base, mem_node->length);
1359                         dbg("populated slot =%d \n", populated_slot);
1360                         if (!populated_slot) {
1361                                 mem_node->next = ctrl->mem_head;
1362                                 ctrl->mem_head = mem_node;
1363                         } else {
1364                                 mem_node->next = func->mem_head;
1365                                 func->mem_head = mem_node;
1366                         }
1367                 }
1368
1369                 /* If we've got a valid prefetchable memory base, and
1370                  * the base + length isn't greater than 0xFFFF
1371                  */
1372                 temp_dword = pre_mem_base + pre_mem_length;
1373                 if ((pre_mem_base) && (temp_dword < 0x10000)) {
1374                         p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
1375                         if (!p_mem_node)
1376                                 return -ENOMEM;
1377
1378                         p_mem_node->base = pre_mem_base << 16;
1379
1380                         p_mem_node->length = pre_mem_length << 16;
1381                         dbg("found p_mem_node(base, length) = %x, %x\n",
1382                                         p_mem_node->base, p_mem_node->length);
1383                         dbg("populated slot =%d \n", populated_slot);
1384
1385                         if (!populated_slot) {
1386                                 p_mem_node->next = ctrl->p_mem_head;
1387                                 ctrl->p_mem_head = p_mem_node;
1388                         } else {
1389                                 p_mem_node->next = func->p_mem_head;
1390                                 func->p_mem_head = p_mem_node;
1391                         }
1392                 }
1393
1394                 /* If we've got a valid bus number, use it
1395                  * The second condition is to ignore bus numbers on
1396                  * populated slots that don't have PCI-PCI bridges
1397                  */
1398                 if (secondary_bus && (secondary_bus != primary_bus)) {
1399                         bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
1400                         if (!bus_node)
1401                                 return -ENOMEM;
1402
1403                         bus_node->base = secondary_bus;
1404                         bus_node->length = max_bus - secondary_bus + 1;
1405                         dbg("found bus_node(base, length) = %x, %x\n",
1406                                         bus_node->base, bus_node->length);
1407                         dbg("populated slot =%d \n", populated_slot);
1408                         if (!populated_slot) {
1409                                 bus_node->next = ctrl->bus_head;
1410                                 ctrl->bus_head = bus_node;
1411                         } else {
1412                                 bus_node->next = func->bus_head;
1413                                 func->bus_head = bus_node;
1414                         }
1415                 }
1416
1417                 i--;
1418                 one_slot += sizeof (struct slot_rt);
1419         }
1420
1421         /* If all of the following fail, we don't have any resources for
1422          * hot plug add
1423          */
1424         rc = 1;
1425         rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1426         rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1427         rc &= cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1428         rc &= cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1429
1430         return rc;
1431 }
1432
1433
1434 /*
1435  * cpqhp_return_board_resources
1436  *
1437  * this routine returns all resources allocated to a board to
1438  * the available pool.
1439  *
1440  * returns 0 if success
1441  */
1442 int cpqhp_return_board_resources(struct pci_func * func, struct resource_lists * resources)
1443 {
1444         int rc = 0;
1445         struct pci_resource *node;
1446         struct pci_resource *t_node;
1447         dbg("%s\n", __func__);
1448
1449         if (!func)
1450                 return 1;
1451
1452         node = func->io_head;
1453         func->io_head = NULL;
1454         while (node) {
1455                 t_node = node->next;
1456                 return_resource(&(resources->io_head), node);
1457                 node = t_node;
1458         }
1459
1460         node = func->mem_head;
1461         func->mem_head = NULL;
1462         while (node) {
1463                 t_node = node->next;
1464                 return_resource(&(resources->mem_head), node);
1465                 node = t_node;
1466         }
1467
1468         node = func->p_mem_head;
1469         func->p_mem_head = NULL;
1470         while (node) {
1471                 t_node = node->next;
1472                 return_resource(&(resources->p_mem_head), node);
1473                 node = t_node;
1474         }
1475
1476         node = func->bus_head;
1477         func->bus_head = NULL;
1478         while (node) {
1479                 t_node = node->next;
1480                 return_resource(&(resources->bus_head), node);
1481                 node = t_node;
1482         }
1483
1484         rc |= cpqhp_resource_sort_and_combine(&(resources->mem_head));
1485         rc |= cpqhp_resource_sort_and_combine(&(resources->p_mem_head));
1486         rc |= cpqhp_resource_sort_and_combine(&(resources->io_head));
1487         rc |= cpqhp_resource_sort_and_combine(&(resources->bus_head));
1488
1489         return rc;
1490 }
1491
1492
1493 /*
1494  * cpqhp_destroy_resource_list
1495  *
1496  * Puts node back in the resource list pointed to by head
1497  */
1498 void cpqhp_destroy_resource_list (struct resource_lists * resources)
1499 {
1500         struct pci_resource *res, *tres;
1501
1502         res = resources->io_head;
1503         resources->io_head = NULL;
1504
1505         while (res) {
1506                 tres = res;
1507                 res = res->next;
1508                 kfree(tres);
1509         }
1510
1511         res = resources->mem_head;
1512         resources->mem_head = NULL;
1513
1514         while (res) {
1515                 tres = res;
1516                 res = res->next;
1517                 kfree(tres);
1518         }
1519
1520         res = resources->p_mem_head;
1521         resources->p_mem_head = NULL;
1522
1523         while (res) {
1524                 tres = res;
1525                 res = res->next;
1526                 kfree(tres);
1527         }
1528
1529         res = resources->bus_head;
1530         resources->bus_head = NULL;
1531
1532         while (res) {
1533                 tres = res;
1534                 res = res->next;
1535                 kfree(tres);
1536         }
1537 }
1538
1539
1540 /*
1541  * cpqhp_destroy_board_resources
1542  *
1543  * Puts node back in the resource list pointed to by head
1544  */
1545 void cpqhp_destroy_board_resources (struct pci_func * func)
1546 {
1547         struct pci_resource *res, *tres;
1548
1549         res = func->io_head;
1550         func->io_head = NULL;
1551
1552         while (res) {
1553                 tres = res;
1554                 res = res->next;
1555                 kfree(tres);
1556         }
1557
1558         res = func->mem_head;
1559         func->mem_head = NULL;
1560
1561         while (res) {
1562                 tres = res;
1563                 res = res->next;
1564                 kfree(tres);
1565         }
1566
1567         res = func->p_mem_head;
1568         func->p_mem_head = NULL;
1569
1570         while (res) {
1571                 tres = res;
1572                 res = res->next;
1573                 kfree(tres);
1574         }
1575
1576         res = func->bus_head;
1577         func->bus_head = NULL;
1578
1579         while (res) {
1580                 tres = res;
1581                 res = res->next;
1582                 kfree(tres);
1583         }
1584 }
1585