3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
10 #include <linux/irq.h>
11 #include <linux/interrupt.h>
12 #include <linux/init.h>
13 #include <linux/config.h>
14 #include <linux/ioport.h>
15 #include <linux/smp_lock.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
19 #include <asm/errno.h>
26 static DEFINE_SPINLOCK(msi_lock);
27 static struct msi_desc* msi_desc[NR_IRQS] = { [0 ... NR_IRQS-1] = NULL };
28 static kmem_cache_t* msi_cachep;
30 static int pci_msi_enable = 1;
31 static int last_alloc_vector;
32 static int nr_released_vectors;
33 static int nr_reserved_vectors = NR_HP_RESERVED_VECTORS;
34 static int nr_msix_devices;
36 #ifndef CONFIG_X86_IO_APIC
37 int vector_irq[NR_VECTORS] = { [0 ... NR_VECTORS - 1] = -1};
38 u8 irq_vector[NR_IRQ_VECTORS];
41 static struct msi_ops *msi_ops;
44 msi_register(struct msi_ops *ops)
50 static void msi_cache_ctor(void *p, kmem_cache_t *cache, unsigned long flags)
52 memset(p, 0, NR_IRQS * sizeof(struct msi_desc));
55 static int msi_cache_init(void)
57 msi_cachep = kmem_cache_create("msi_cache",
58 NR_IRQS * sizeof(struct msi_desc),
59 0, SLAB_HWCACHE_ALIGN, msi_cache_ctor, NULL);
66 static void msi_set_mask_bit(unsigned int vector, int flag)
68 struct msi_desc *entry;
70 entry = (struct msi_desc *)msi_desc[vector];
71 if (!entry || !entry->dev || !entry->mask_base)
73 switch (entry->msi_attrib.type) {
79 pos = (long)entry->mask_base;
80 pci_read_config_dword(entry->dev, pos, &mask_bits);
83 pci_write_config_dword(entry->dev, pos, mask_bits);
88 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
89 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
90 writel(flag, entry->mask_base + offset);
99 static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
101 struct msi_desc *entry;
102 u32 address_hi, address_lo;
103 unsigned int irq = vector;
104 unsigned int dest_cpu = first_cpu(cpu_mask);
106 entry = (struct msi_desc *)msi_desc[vector];
107 if (!entry || !entry->dev)
110 switch (entry->msi_attrib.type) {
113 int pos = pci_find_capability(entry->dev, PCI_CAP_ID_MSI);
118 pci_read_config_dword(entry->dev, msi_upper_address_reg(pos),
120 pci_read_config_dword(entry->dev, msi_lower_address_reg(pos),
123 msi_ops->target(vector, dest_cpu, &address_hi, &address_lo);
125 pci_write_config_dword(entry->dev, msi_upper_address_reg(pos),
127 pci_write_config_dword(entry->dev, msi_lower_address_reg(pos),
129 set_native_irq_info(irq, cpu_mask);
132 case PCI_CAP_ID_MSIX:
135 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
136 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET;
138 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
139 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET;
141 address_hi = readl(entry->mask_base + offset_hi);
142 address_lo = readl(entry->mask_base + offset_lo);
144 msi_ops->target(vector, dest_cpu, &address_hi, &address_lo);
146 writel(address_hi, entry->mask_base + offset_hi);
147 writel(address_lo, entry->mask_base + offset_lo);
148 set_native_irq_info(irq, cpu_mask);
156 #define set_msi_affinity NULL
157 #endif /* CONFIG_SMP */
159 static void mask_MSI_irq(unsigned int vector)
161 msi_set_mask_bit(vector, 1);
164 static void unmask_MSI_irq(unsigned int vector)
166 msi_set_mask_bit(vector, 0);
169 static unsigned int startup_msi_irq_wo_maskbit(unsigned int vector)
171 struct msi_desc *entry;
174 spin_lock_irqsave(&msi_lock, flags);
175 entry = msi_desc[vector];
176 if (!entry || !entry->dev) {
177 spin_unlock_irqrestore(&msi_lock, flags);
180 entry->msi_attrib.state = 1; /* Mark it active */
181 spin_unlock_irqrestore(&msi_lock, flags);
183 return 0; /* never anything pending */
186 static unsigned int startup_msi_irq_w_maskbit(unsigned int vector)
188 startup_msi_irq_wo_maskbit(vector);
189 unmask_MSI_irq(vector);
190 return 0; /* never anything pending */
193 static void shutdown_msi_irq(unsigned int vector)
195 struct msi_desc *entry;
198 spin_lock_irqsave(&msi_lock, flags);
199 entry = msi_desc[vector];
200 if (entry && entry->dev)
201 entry->msi_attrib.state = 0; /* Mark it not active */
202 spin_unlock_irqrestore(&msi_lock, flags);
205 static void end_msi_irq_wo_maskbit(unsigned int vector)
207 move_native_irq(vector);
211 static void end_msi_irq_w_maskbit(unsigned int vector)
213 move_native_irq(vector);
214 unmask_MSI_irq(vector);
218 static void do_nothing(unsigned int vector)
223 * Interrupt Type for MSI-X PCI/PCI-X/PCI-Express Devices,
224 * which implement the MSI-X Capability Structure.
226 static struct hw_interrupt_type msix_irq_type = {
227 .typename = "PCI-MSI-X",
228 .startup = startup_msi_irq_w_maskbit,
229 .shutdown = shutdown_msi_irq,
230 .enable = unmask_MSI_irq,
231 .disable = mask_MSI_irq,
233 .end = end_msi_irq_w_maskbit,
234 .set_affinity = set_msi_affinity
238 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
239 * which implement the MSI Capability Structure with
240 * Mask-and-Pending Bits.
242 static struct hw_interrupt_type msi_irq_w_maskbit_type = {
243 .typename = "PCI-MSI",
244 .startup = startup_msi_irq_w_maskbit,
245 .shutdown = shutdown_msi_irq,
246 .enable = unmask_MSI_irq,
247 .disable = mask_MSI_irq,
249 .end = end_msi_irq_w_maskbit,
250 .set_affinity = set_msi_affinity
254 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
255 * which implement the MSI Capability Structure without
256 * Mask-and-Pending Bits.
258 static struct hw_interrupt_type msi_irq_wo_maskbit_type = {
259 .typename = "PCI-MSI",
260 .startup = startup_msi_irq_wo_maskbit,
261 .shutdown = shutdown_msi_irq,
262 .enable = do_nothing,
263 .disable = do_nothing,
265 .end = end_msi_irq_wo_maskbit,
266 .set_affinity = set_msi_affinity
269 static int msi_free_vector(struct pci_dev* dev, int vector, int reassign);
270 static int assign_msi_vector(void)
272 static int new_vector_avail = 1;
277 * msi_lock is provided to ensure that successful allocation of MSI
278 * vector is assigned unique among drivers.
280 spin_lock_irqsave(&msi_lock, flags);
282 if (!new_vector_avail) {
286 * vector_irq[] = -1 indicates that this specific vector is:
287 * - assigned for MSI (since MSI have no associated IRQ) or
288 * - assigned for legacy if less than 16, or
289 * - having no corresponding 1:1 vector-to-IOxAPIC IRQ mapping
290 * vector_irq[] = 0 indicates that this vector, previously
291 * assigned for MSI, is freed by hotplug removed operations.
292 * This vector will be reused for any subsequent hotplug added
294 * vector_irq[] > 0 indicates that this vector is assigned for
295 * IOxAPIC IRQs. This vector and its value provides a 1-to-1
296 * vector-to-IOxAPIC IRQ mapping.
298 for (vector = FIRST_DEVICE_VECTOR; vector < NR_IRQS; vector++) {
299 if (vector_irq[vector] != 0)
301 free_vector = vector;
302 if (!msi_desc[vector])
308 spin_unlock_irqrestore(&msi_lock, flags);
311 vector_irq[free_vector] = -1;
312 nr_released_vectors--;
313 spin_unlock_irqrestore(&msi_lock, flags);
314 if (msi_desc[free_vector] != NULL) {
318 /* free all linked vectors before re-assign */
320 spin_lock_irqsave(&msi_lock, flags);
321 dev = msi_desc[free_vector]->dev;
322 tail = msi_desc[free_vector]->link.tail;
323 spin_unlock_irqrestore(&msi_lock, flags);
324 msi_free_vector(dev, tail, 1);
325 } while (free_vector != tail);
330 vector = assign_irq_vector(AUTO_ASSIGN);
331 last_alloc_vector = vector;
332 if (vector == LAST_DEVICE_VECTOR)
333 new_vector_avail = 0;
335 spin_unlock_irqrestore(&msi_lock, flags);
339 static int get_new_vector(void)
341 int vector = assign_msi_vector();
344 set_intr_gate(vector, interrupt[vector]);
349 static int msi_init(void)
351 static int status = -ENOMEM;
358 printk(KERN_WARNING "PCI: MSI quirk detected. MSI disabled.\n");
363 status = msi_arch_init();
367 "PCI: MSI arch init failed. MSI disabled.\n");
373 "PCI: MSI ops not registered. MSI disabled.\n");
378 last_alloc_vector = assign_irq_vector(AUTO_ASSIGN);
379 status = msi_cache_init();
382 printk(KERN_WARNING "PCI: MSI cache init failed\n");
386 #ifndef CONFIG_X86_IO_APIC
387 irq_vector[0] = FIRST_DEVICE_VECTOR;
390 if (last_alloc_vector < 0) {
392 printk(KERN_WARNING "PCI: No interrupt vectors available for MSI\n");
396 vector_irq[last_alloc_vector] = 0;
397 nr_released_vectors++;
402 static int get_msi_vector(struct pci_dev *dev)
404 return get_new_vector();
407 static struct msi_desc* alloc_msi_entry(void)
409 struct msi_desc *entry;
411 entry = kmem_cache_alloc(msi_cachep, SLAB_KERNEL);
415 memset(entry, 0, sizeof(struct msi_desc));
416 entry->link.tail = entry->link.head = 0; /* single message */
422 static void attach_msi_entry(struct msi_desc *entry, int vector)
426 spin_lock_irqsave(&msi_lock, flags);
427 msi_desc[vector] = entry;
428 spin_unlock_irqrestore(&msi_lock, flags);
431 static void irq_handler_init(int cap_id, int pos, int mask)
435 spin_lock_irqsave(&irq_desc[pos].lock, flags);
436 if (cap_id == PCI_CAP_ID_MSIX)
437 irq_desc[pos].handler = &msix_irq_type;
440 irq_desc[pos].handler = &msi_irq_wo_maskbit_type;
442 irq_desc[pos].handler = &msi_irq_w_maskbit_type;
444 spin_unlock_irqrestore(&irq_desc[pos].lock, flags);
447 static void enable_msi_mode(struct pci_dev *dev, int pos, int type)
451 pci_read_config_word(dev, msi_control_reg(pos), &control);
452 if (type == PCI_CAP_ID_MSI) {
453 /* Set enabled bits to single MSI & enable MSI_enable bit */
454 msi_enable(control, 1);
455 pci_write_config_word(dev, msi_control_reg(pos), control);
457 msix_enable(control);
458 pci_write_config_word(dev, msi_control_reg(pos), control);
460 if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
461 /* PCI Express Endpoint device detected */
462 pci_intx(dev, 0); /* disable intx */
466 void disable_msi_mode(struct pci_dev *dev, int pos, int type)
470 pci_read_config_word(dev, msi_control_reg(pos), &control);
471 if (type == PCI_CAP_ID_MSI) {
472 /* Set enabled bits to single MSI & enable MSI_enable bit */
473 msi_disable(control);
474 pci_write_config_word(dev, msi_control_reg(pos), control);
476 msix_disable(control);
477 pci_write_config_word(dev, msi_control_reg(pos), control);
479 if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
480 /* PCI Express Endpoint device detected */
481 pci_intx(dev, 1); /* enable intx */
485 static int msi_lookup_vector(struct pci_dev *dev, int type)
490 spin_lock_irqsave(&msi_lock, flags);
491 for (vector = FIRST_DEVICE_VECTOR; vector < NR_IRQS; vector++) {
492 if (!msi_desc[vector] || msi_desc[vector]->dev != dev ||
493 msi_desc[vector]->msi_attrib.type != type ||
494 msi_desc[vector]->msi_attrib.default_vector != dev->irq)
496 spin_unlock_irqrestore(&msi_lock, flags);
497 /* This pre-assigned MSI vector for this device
498 already exits. Override dev->irq with this vector */
502 spin_unlock_irqrestore(&msi_lock, flags);
507 void pci_scan_msi_device(struct pci_dev *dev)
512 if (pci_find_capability(dev, PCI_CAP_ID_MSIX) > 0)
514 else if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0)
515 nr_reserved_vectors++;
519 int pci_save_msi_state(struct pci_dev *dev)
523 struct pci_cap_saved_state *save_state;
526 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
527 if (pos <= 0 || dev->no_msi)
530 pci_read_config_word(dev, msi_control_reg(pos), &control);
531 if (!(control & PCI_MSI_FLAGS_ENABLE))
534 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
537 printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
540 cap = &save_state->data[0];
542 pci_read_config_dword(dev, pos, &cap[i++]);
543 control = cap[0] >> 16;
544 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
545 if (control & PCI_MSI_FLAGS_64BIT) {
546 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
547 pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
549 pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
550 if (control & PCI_MSI_FLAGS_MASKBIT)
551 pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
552 disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
553 save_state->cap_nr = PCI_CAP_ID_MSI;
554 pci_add_saved_cap(dev, save_state);
558 void pci_restore_msi_state(struct pci_dev *dev)
562 struct pci_cap_saved_state *save_state;
565 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
566 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
567 if (!save_state || pos <= 0)
569 cap = &save_state->data[0];
571 control = cap[i++] >> 16;
572 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
573 if (control & PCI_MSI_FLAGS_64BIT) {
574 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
575 pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
577 pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
578 if (control & PCI_MSI_FLAGS_MASKBIT)
579 pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
580 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
581 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
582 pci_remove_saved_cap(save_state);
586 int pci_save_msix_state(struct pci_dev *dev)
590 int vector, head, tail = 0;
592 struct pci_cap_saved_state *save_state;
594 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
595 if (pos <= 0 || dev->no_msi)
598 /* save the capability */
599 pci_read_config_word(dev, msi_control_reg(pos), &control);
600 if (!(control & PCI_MSIX_FLAGS_ENABLE))
602 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
605 printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
608 *((u16 *)&save_state->data[0]) = control;
612 if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
617 vector = head = dev->irq;
618 while (head != tail) {
621 struct msi_desc *entry;
623 entry = msi_desc[vector];
624 base = entry->mask_base;
625 j = entry->msi_attrib.entry_nr;
627 entry->address_lo_save =
628 readl(base + j * PCI_MSIX_ENTRY_SIZE +
629 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
630 entry->address_hi_save =
631 readl(base + j * PCI_MSIX_ENTRY_SIZE +
632 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
634 readl(base + j * PCI_MSIX_ENTRY_SIZE +
635 PCI_MSIX_ENTRY_DATA_OFFSET);
637 tail = msi_desc[vector]->link.tail;
642 disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
643 save_state->cap_nr = PCI_CAP_ID_MSIX;
644 pci_add_saved_cap(dev, save_state);
648 void pci_restore_msix_state(struct pci_dev *dev)
652 int vector, head, tail = 0;
655 struct msi_desc *entry;
657 struct pci_cap_saved_state *save_state;
659 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
662 save = *((u16 *)&save_state->data[0]);
663 pci_remove_saved_cap(save_state);
666 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
670 /* route the table */
672 if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX))
674 vector = head = dev->irq;
675 while (head != tail) {
676 entry = msi_desc[vector];
677 base = entry->mask_base;
678 j = entry->msi_attrib.entry_nr;
680 writel(entry->address_lo_save,
681 base + j * PCI_MSIX_ENTRY_SIZE +
682 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
683 writel(entry->address_hi_save,
684 base + j * PCI_MSIX_ENTRY_SIZE +
685 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
686 writel(entry->data_save,
687 base + j * PCI_MSIX_ENTRY_SIZE +
688 PCI_MSIX_ENTRY_DATA_OFFSET);
690 tail = msi_desc[vector]->link.tail;
695 pci_write_config_word(dev, msi_control_reg(pos), save);
696 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
700 static int msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
706 int pos, vector = dev->irq;
709 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
710 pci_read_config_word(dev, msi_control_reg(pos), &control);
712 /* Configure MSI capability structure */
713 status = msi_ops->setup(dev, vector, &address_hi, &address_lo, &data);
717 pci_write_config_dword(dev, msi_lower_address_reg(pos), address_lo);
718 if (is_64bit_address(control)) {
719 pci_write_config_dword(dev,
720 msi_upper_address_reg(pos), address_hi);
721 pci_write_config_word(dev,
722 msi_data_reg(pos, 1), data);
724 pci_write_config_word(dev,
725 msi_data_reg(pos, 0), data);
726 if (entry->msi_attrib.maskbit) {
727 unsigned int maskbits, temp;
728 /* All MSIs are unmasked by default, Mask them all */
729 pci_read_config_dword(dev,
730 msi_mask_bits_reg(pos, is_64bit_address(control)),
732 temp = (1 << multi_msi_capable(control));
733 temp = ((temp - 1) & ~temp);
735 pci_write_config_dword(dev,
736 msi_mask_bits_reg(pos, is_64bit_address(control)),
744 * msi_capability_init - configure device's MSI capability structure
745 * @dev: pointer to the pci_dev data structure of MSI device function
747 * Setup the MSI capability structure of device function with a single
748 * MSI vector, regardless of device function is capable of handling
749 * multiple messages. A return of zero indicates the successful setup
750 * of an entry zero with the new MSI vector or non-zero for otherwise.
752 static int msi_capability_init(struct pci_dev *dev)
755 struct msi_desc *entry;
759 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
760 pci_read_config_word(dev, msi_control_reg(pos), &control);
761 /* MSI Entry Initialization */
762 entry = alloc_msi_entry();
766 vector = get_msi_vector(dev);
768 kmem_cache_free(msi_cachep, entry);
771 entry->link.head = vector;
772 entry->link.tail = vector;
773 entry->msi_attrib.type = PCI_CAP_ID_MSI;
774 entry->msi_attrib.state = 0; /* Mark it not active */
775 entry->msi_attrib.entry_nr = 0;
776 entry->msi_attrib.maskbit = is_mask_bit_support(control);
777 entry->msi_attrib.default_vector = dev->irq; /* Save IOAPIC IRQ */
780 if (is_mask_bit_support(control)) {
781 entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
782 is_64bit_address(control));
784 /* Replace with MSI handler */
785 irq_handler_init(PCI_CAP_ID_MSI, vector, entry->msi_attrib.maskbit);
786 /* Configure MSI capability structure */
787 status = msi_register_init(dev, entry);
789 dev->irq = entry->msi_attrib.default_vector;
790 kmem_cache_free(msi_cachep, entry);
794 attach_msi_entry(entry, vector);
795 /* Set MSI enabled bits */
796 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
802 * msix_capability_init - configure device's MSI-X capability
803 * @dev: pointer to the pci_dev data structure of MSI-X device function
804 * @entries: pointer to an array of struct msix_entry entries
805 * @nvec: number of @entries
807 * Setup the MSI-X capability structure of device function with a
808 * single MSI-X vector. A return of zero indicates the successful setup of
809 * requested MSI-X entries with allocated vectors or non-zero for otherwise.
811 static int msix_capability_init(struct pci_dev *dev,
812 struct msix_entry *entries, int nvec)
814 struct msi_desc *head = NULL, *tail = NULL, *entry = NULL;
819 int vector, pos, i, j, nr_entries, temp = 0;
820 unsigned long phys_addr;
826 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
827 /* Request & Map MSI-X table region */
828 pci_read_config_word(dev, msi_control_reg(pos), &control);
829 nr_entries = multi_msix_capable(control);
831 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
832 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
833 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
834 phys_addr = pci_resource_start (dev, bir) + table_offset;
835 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
839 /* MSI-X Table Initialization */
840 for (i = 0; i < nvec; i++) {
841 entry = alloc_msi_entry();
844 vector = get_msi_vector(dev);
846 kmem_cache_free(msi_cachep, entry);
850 j = entries[i].entry;
851 entries[i].vector = vector;
852 entry->msi_attrib.type = PCI_CAP_ID_MSIX;
853 entry->msi_attrib.state = 0; /* Mark it not active */
854 entry->msi_attrib.entry_nr = j;
855 entry->msi_attrib.maskbit = 1;
856 entry->msi_attrib.default_vector = dev->irq;
858 entry->mask_base = base;
860 entry->link.head = vector;
861 entry->link.tail = vector;
864 entry->link.head = temp;
865 entry->link.tail = tail->link.tail;
866 tail->link.tail = vector;
867 head->link.head = vector;
871 /* Replace with MSI-X handler */
872 irq_handler_init(PCI_CAP_ID_MSIX, vector, 1);
873 /* Configure MSI-X capability structure */
874 status = msi_ops->setup(dev, vector,
882 base + j * PCI_MSIX_ENTRY_SIZE +
883 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
885 base + j * PCI_MSIX_ENTRY_SIZE +
886 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
888 base + j * PCI_MSIX_ENTRY_SIZE +
889 PCI_MSIX_ENTRY_DATA_OFFSET);
890 attach_msi_entry(entry, vector);
894 for (; i >= 0; i--) {
895 vector = (entries + i)->vector;
896 msi_free_vector(dev, vector, 0);
897 (entries + i)->vector = 0;
901 /* Set MSI-X enabled bits */
902 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
908 * pci_enable_msi - configure device's MSI capability structure
909 * @dev: pointer to the pci_dev data structure of MSI device function
911 * Setup the MSI capability structure of device function with
912 * a single MSI vector upon its software driver call to request for
913 * MSI mode enabled on its hardware device function. A return of zero
914 * indicates the successful setup of an entry zero with the new MSI
915 * vector or non-zero for otherwise.
917 int pci_enable_msi(struct pci_dev* dev)
919 int pos, temp, status = -EINVAL;
922 if (!pci_msi_enable || !dev)
928 if (dev->bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
937 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
941 pci_read_config_word(dev, msi_control_reg(pos), &control);
942 if (control & PCI_MSI_FLAGS_ENABLE)
943 return 0; /* Already in MSI mode */
945 if (!msi_lookup_vector(dev, PCI_CAP_ID_MSI)) {
949 spin_lock_irqsave(&msi_lock, flags);
950 if (!vector_irq[dev->irq]) {
951 msi_desc[dev->irq]->msi_attrib.state = 0;
952 vector_irq[dev->irq] = -1;
953 nr_released_vectors--;
954 spin_unlock_irqrestore(&msi_lock, flags);
955 status = msi_register_init(dev, msi_desc[dev->irq]);
957 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
960 spin_unlock_irqrestore(&msi_lock, flags);
963 /* Check whether driver already requested for MSI-X vectors */
964 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
965 if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
966 printk(KERN_INFO "PCI: %s: Can't enable MSI. "
967 "Device already has MSI-X vectors assigned\n",
972 status = msi_capability_init(dev);
975 nr_reserved_vectors--; /* Only MSI capable */
976 else if (nr_msix_devices > 0)
977 nr_msix_devices--; /* Both MSI and MSI-X capable,
978 but choose enabling MSI */
984 void pci_disable_msi(struct pci_dev* dev)
986 struct msi_desc *entry;
987 int pos, default_vector;
996 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
1000 pci_read_config_word(dev, msi_control_reg(pos), &control);
1001 if (!(control & PCI_MSI_FLAGS_ENABLE))
1004 spin_lock_irqsave(&msi_lock, flags);
1005 entry = msi_desc[dev->irq];
1006 if (!entry || !entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) {
1007 spin_unlock_irqrestore(&msi_lock, flags);
1010 if (entry->msi_attrib.state) {
1011 spin_unlock_irqrestore(&msi_lock, flags);
1012 printk(KERN_WARNING "PCI: %s: pci_disable_msi() called without "
1013 "free_irq() on MSI vector %d\n",
1014 pci_name(dev), dev->irq);
1015 BUG_ON(entry->msi_attrib.state > 0);
1017 vector_irq[dev->irq] = 0; /* free it */
1018 nr_released_vectors++;
1019 default_vector = entry->msi_attrib.default_vector;
1020 spin_unlock_irqrestore(&msi_lock, flags);
1021 /* Restore dev->irq to its default pin-assertion vector */
1022 dev->irq = default_vector;
1023 disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI),
1028 static int msi_free_vector(struct pci_dev* dev, int vector, int reassign)
1030 struct msi_desc *entry;
1031 int head, entry_nr, type;
1033 unsigned long flags;
1035 msi_ops->teardown(vector);
1037 spin_lock_irqsave(&msi_lock, flags);
1038 entry = msi_desc[vector];
1039 if (!entry || entry->dev != dev) {
1040 spin_unlock_irqrestore(&msi_lock, flags);
1043 type = entry->msi_attrib.type;
1044 entry_nr = entry->msi_attrib.entry_nr;
1045 head = entry->link.head;
1046 base = entry->mask_base;
1047 msi_desc[entry->link.head]->link.tail = entry->link.tail;
1048 msi_desc[entry->link.tail]->link.head = entry->link.head;
1051 vector_irq[vector] = 0;
1052 nr_released_vectors++;
1054 msi_desc[vector] = NULL;
1055 spin_unlock_irqrestore(&msi_lock, flags);
1057 kmem_cache_free(msi_cachep, entry);
1059 if (type == PCI_CAP_ID_MSIX) {
1062 entry_nr * PCI_MSIX_ENTRY_SIZE +
1063 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
1065 if (head == vector) {
1067 * Detect last MSI-X vector to be released.
1068 * Release the MSI-X memory-mapped table.
1071 int pos, nr_entries;
1072 unsigned long phys_addr;
1077 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1078 pci_read_config_word(dev, msi_control_reg(pos),
1080 nr_entries = multi_msix_capable(control);
1081 pci_read_config_dword(dev, msix_table_offset_reg(pos),
1083 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
1084 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
1085 phys_addr = pci_resource_start(dev, bir) + table_offset;
1087 * FIXME! and what did you want to do with phys_addr?
1097 static int reroute_msix_table(int head, struct msix_entry *entries, int *nvec)
1099 int vector = head, tail = 0;
1100 int i, j = 0, nr_entries = 0;
1102 unsigned long flags;
1104 spin_lock_irqsave(&msi_lock, flags);
1105 while (head != tail) {
1107 tail = msi_desc[vector]->link.tail;
1108 if (entries[0].entry == msi_desc[vector]->msi_attrib.entry_nr)
1112 if (*nvec > nr_entries) {
1113 spin_unlock_irqrestore(&msi_lock, flags);
1117 vector = ((j > 0) ? j : head);
1118 for (i = 0; i < *nvec; i++) {
1119 j = msi_desc[vector]->msi_attrib.entry_nr;
1120 msi_desc[vector]->msi_attrib.state = 0; /* Mark it not active */
1121 vector_irq[vector] = -1; /* Mark it busy */
1122 nr_released_vectors--;
1123 entries[i].vector = vector;
1124 if (j != (entries + i)->entry) {
1125 base = msi_desc[vector]->mask_base;
1126 msi_desc[vector]->msi_attrib.entry_nr =
1127 (entries + i)->entry;
1128 writel( readl(base + j * PCI_MSIX_ENTRY_SIZE +
1129 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET), base +
1130 (entries + i)->entry * PCI_MSIX_ENTRY_SIZE +
1131 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
1132 writel( readl(base + j * PCI_MSIX_ENTRY_SIZE +
1133 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET), base +
1134 (entries + i)->entry * PCI_MSIX_ENTRY_SIZE +
1135 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
1136 writel( (readl(base + j * PCI_MSIX_ENTRY_SIZE +
1137 PCI_MSIX_ENTRY_DATA_OFFSET) & 0xff00) | vector,
1138 base + (entries+i)->entry*PCI_MSIX_ENTRY_SIZE +
1139 PCI_MSIX_ENTRY_DATA_OFFSET);
1141 vector = msi_desc[vector]->link.tail;
1143 spin_unlock_irqrestore(&msi_lock, flags);
1149 * pci_enable_msix - configure device's MSI-X capability structure
1150 * @dev: pointer to the pci_dev data structure of MSI-X device function
1151 * @entries: pointer to an array of MSI-X entries
1152 * @nvec: number of MSI-X vectors requested for allocation by device driver
1154 * Setup the MSI-X capability structure of device function with the number
1155 * of requested vectors upon its software driver call to request for
1156 * MSI-X mode enabled on its hardware device function. A return of zero
1157 * indicates the successful configuration of MSI-X capability structure
1158 * with new allocated MSI-X vectors. A return of < 0 indicates a failure.
1159 * Or a return of > 0 indicates that driver request is exceeding the number
1160 * of vectors available. Driver should use the returned value to re-send
1163 int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
1165 int status, pos, nr_entries, free_vectors;
1168 unsigned long flags;
1170 if (!pci_msi_enable || !dev || !entries)
1173 status = msi_init();
1177 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1181 pci_read_config_word(dev, msi_control_reg(pos), &control);
1182 if (control & PCI_MSIX_FLAGS_ENABLE)
1183 return -EINVAL; /* Already in MSI-X mode */
1185 nr_entries = multi_msix_capable(control);
1186 if (nvec > nr_entries)
1189 /* Check for any invalid entries */
1190 for (i = 0; i < nvec; i++) {
1191 if (entries[i].entry >= nr_entries)
1192 return -EINVAL; /* invalid entry */
1193 for (j = i + 1; j < nvec; j++) {
1194 if (entries[i].entry == entries[j].entry)
1195 return -EINVAL; /* duplicate entry */
1199 if (!msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
1202 /* Reroute MSI-X table */
1203 if (reroute_msix_table(dev->irq, entries, &nr_entries)) {
1204 /* #requested > #previous-assigned */
1209 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
1212 /* Check whether driver already requested for MSI vector */
1213 if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0 &&
1214 !msi_lookup_vector(dev, PCI_CAP_ID_MSI)) {
1215 printk(KERN_INFO "PCI: %s: Can't enable MSI-X. "
1216 "Device already has an MSI vector assigned\n",
1222 spin_lock_irqsave(&msi_lock, flags);
1224 * msi_lock is provided to ensure that enough vectors resources are
1225 * available before granting.
1227 free_vectors = pci_vector_resources(last_alloc_vector,
1228 nr_released_vectors);
1229 /* Ensure that each MSI/MSI-X device has one vector reserved by
1230 default to avoid any MSI-X driver to take all available
1232 free_vectors -= nr_reserved_vectors;
1233 /* Find the average of free vectors among MSI-X devices */
1234 if (nr_msix_devices > 0)
1235 free_vectors /= nr_msix_devices;
1236 spin_unlock_irqrestore(&msi_lock, flags);
1238 if (nvec > free_vectors) {
1239 if (free_vectors > 0)
1240 return free_vectors;
1245 status = msix_capability_init(dev, entries, nvec);
1246 if (!status && nr_msix_devices > 0)
1252 void pci_disable_msix(struct pci_dev* dev)
1257 if (!pci_msi_enable)
1262 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1266 pci_read_config_word(dev, msi_control_reg(pos), &control);
1267 if (!(control & PCI_MSIX_FLAGS_ENABLE))
1271 if (!msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
1272 int state, vector, head, tail = 0, warning = 0;
1273 unsigned long flags;
1275 vector = head = dev->irq;
1276 spin_lock_irqsave(&msi_lock, flags);
1277 while (head != tail) {
1278 state = msi_desc[vector]->msi_attrib.state;
1282 vector_irq[vector] = 0; /* free it */
1283 nr_released_vectors++;
1285 tail = msi_desc[vector]->link.tail;
1288 spin_unlock_irqrestore(&msi_lock, flags);
1291 printk(KERN_WARNING "PCI: %s: pci_disable_msix() called without "
1292 "free_irq() on all MSI-X vectors\n",
1294 BUG_ON(warning > 0);
1297 disable_msi_mode(dev,
1298 pci_find_capability(dev, PCI_CAP_ID_MSIX),
1306 * msi_remove_pci_irq_vectors - reclaim MSI(X) vectors to unused state
1307 * @dev: pointer to the pci_dev data structure of MSI(X) device function
1309 * Being called during hotplug remove, from which the device function
1310 * is hot-removed. All previous assigned MSI/MSI-X vectors, if
1311 * allocated for this device function, are reclaimed to unused state,
1312 * which may be used later on.
1314 void msi_remove_pci_irq_vectors(struct pci_dev* dev)
1316 int state, pos, temp;
1317 unsigned long flags;
1319 if (!pci_msi_enable || !dev)
1322 temp = dev->irq; /* Save IOAPIC IRQ */
1323 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
1324 if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSI)) {
1325 spin_lock_irqsave(&msi_lock, flags);
1326 state = msi_desc[dev->irq]->msi_attrib.state;
1327 spin_unlock_irqrestore(&msi_lock, flags);
1329 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
1330 "called without free_irq() on MSI vector %d\n",
1331 pci_name(dev), dev->irq);
1333 } else /* Release MSI vector assigned to this device */
1334 msi_free_vector(dev, dev->irq, 0);
1335 dev->irq = temp; /* Restore IOAPIC IRQ */
1337 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1338 if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
1339 int vector, head, tail = 0, warning = 0;
1340 void __iomem *base = NULL;
1342 vector = head = dev->irq;
1343 while (head != tail) {
1344 spin_lock_irqsave(&msi_lock, flags);
1345 state = msi_desc[vector]->msi_attrib.state;
1346 tail = msi_desc[vector]->link.tail;
1347 base = msi_desc[vector]->mask_base;
1348 spin_unlock_irqrestore(&msi_lock, flags);
1351 else if (vector != head) /* Release MSI-X vector */
1352 msi_free_vector(dev, vector, 0);
1355 msi_free_vector(dev, vector, 0);
1357 /* Force to release the MSI-X memory-mapped table */
1359 unsigned long phys_addr;
1364 pci_read_config_word(dev, msi_control_reg(pos),
1366 pci_read_config_dword(dev, msix_table_offset_reg(pos),
1368 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
1369 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
1370 phys_addr = pci_resource_start(dev, bir) + table_offset;
1372 * FIXME! and what did you want to do with phys_addr?
1376 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
1377 "called without free_irq() on all MSI-X vectors\n",
1379 BUG_ON(warning > 0);
1381 dev->irq = temp; /* Restore IOAPIC IRQ */
1385 void pci_no_msi(void)
1390 EXPORT_SYMBOL(pci_enable_msi);
1391 EXPORT_SYMBOL(pci_disable_msi);
1392 EXPORT_SYMBOL(pci_enable_msix);
1393 EXPORT_SYMBOL(pci_disable_msix);